1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * This file contains low-level assembler routines for managing 4 * the PowerPC 603 tlb invalidation. 5 */ 6 7#include <asm/page.h> 8#include <asm/ppc_asm.h> 9#include <asm/asm-offsets.h> 10 11/* 12 * Flush an entry from the TLB 13 */ 14#ifdef CONFIG_SMP 15_GLOBAL(_tlbie) 16 lwz r8,TASK_CPU(r2) 17 oris r8,r8,11 18 mfmsr r10 19 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ 20 rlwinm r0,r0,0,28,26 /* clear DR */ 21 mtmsr r0 22 isync 23 lis r9,mmu_hash_lock@h 24 ori r9,r9,mmu_hash_lock@l 25 tophys(r9,r9) 2610: lwarx r7,0,r9 27 cmpwi 0,r7,0 28 bne- 10b 29 stwcx. r8,0,r9 30 bne- 10b 31 eieio 32 tlbie r3 33 sync 34 TLBSYNC 35 li r0,0 36 stw r0,0(r9) /* clear mmu_hash_lock */ 37 mtmsr r10 38 isync 39 blr 40_ASM_NOKPROBE_SYMBOL(_tlbie) 41#endif /* CONFIG_SMP */ 42 43/* 44 * Flush the entire TLB. 603/603e only 45 */ 46_GLOBAL(_tlbia) 47#if defined(CONFIG_SMP) 48 lwz r8,TASK_CPU(r2) 49 oris r8,r8,10 50 mfmsr r10 51 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ 52 rlwinm r0,r0,0,28,26 /* clear DR */ 53 mtmsr r0 54 isync 55 lis r9,mmu_hash_lock@h 56 ori r9,r9,mmu_hash_lock@l 57 tophys(r9,r9) 5810: lwarx r7,0,r9 59 cmpwi 0,r7,0 60 bne- 10b 61 stwcx. r8,0,r9 62 bne- 10b 63#endif /* CONFIG_SMP */ 64 li r5, 32 65 lis r4, KERNELBASE@h 66 mtctr r5 67 sync 680: tlbie r4 69 addi r4, r4, 0x1000 70 bdnz 0b 71 sync 72#ifdef CONFIG_SMP 73 TLBSYNC 74 li r0,0 75 stw r0,0(r9) /* clear mmu_hash_lock */ 76 mtmsr r10 77 isync 78#endif /* CONFIG_SMP */ 79 blr 80_ASM_NOKPROBE_SYMBOL(_tlbia) 81