1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright IBM Corp. 2007 16 * Copyright 2010-2011 Freescale Semiconductor, Inc. 17 * 18 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20 * Scott Wood <scottwood@freescale.com> 21 * Varun Sethi <varun.sethi@freescale.com> 22 */ 23 24 #include <linux/errno.h> 25 #include <linux/err.h> 26 #include <linux/kvm_host.h> 27 #include <linux/gfp.h> 28 #include <linux/module.h> 29 #include <linux/vmalloc.h> 30 #include <linux/fs.h> 31 32 #include <asm/cputable.h> 33 #include <asm/uaccess.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/cacheflush.h> 36 #include <asm/dbell.h> 37 #include <asm/hw_irq.h> 38 #include <asm/irq.h> 39 #include <asm/time.h> 40 41 #include "timing.h" 42 #include "booke.h" 43 44 #define CREATE_TRACE_POINTS 45 #include "trace_booke.h" 46 47 unsigned long kvmppc_booke_handlers; 48 49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 51 52 struct kvm_stats_debugfs_item debugfs_entries[] = { 53 { "mmio", VCPU_STAT(mmio_exits) }, 54 { "sig", VCPU_STAT(signal_exits) }, 55 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 56 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 57 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 58 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 59 { "sysc", VCPU_STAT(syscall_exits) }, 60 { "isi", VCPU_STAT(isi_exits) }, 61 { "dsi", VCPU_STAT(dsi_exits) }, 62 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 63 { "dec", VCPU_STAT(dec_exits) }, 64 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 65 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 66 { "doorbell", VCPU_STAT(dbell_exits) }, 67 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 68 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 69 { NULL } 70 }; 71 72 /* TODO: use vcpu_printf() */ 73 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 74 { 75 int i; 76 77 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 78 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 79 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 80 vcpu->arch.shared->srr1); 81 82 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 83 84 for (i = 0; i < 32; i += 4) { 85 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 86 kvmppc_get_gpr(vcpu, i), 87 kvmppc_get_gpr(vcpu, i+1), 88 kvmppc_get_gpr(vcpu, i+2), 89 kvmppc_get_gpr(vcpu, i+3)); 90 } 91 } 92 93 #ifdef CONFIG_SPE 94 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 95 { 96 preempt_disable(); 97 enable_kernel_spe(); 98 kvmppc_save_guest_spe(vcpu); 99 vcpu->arch.shadow_msr &= ~MSR_SPE; 100 preempt_enable(); 101 } 102 103 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 104 { 105 preempt_disable(); 106 enable_kernel_spe(); 107 kvmppc_load_guest_spe(vcpu); 108 vcpu->arch.shadow_msr |= MSR_SPE; 109 preempt_enable(); 110 } 111 112 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 113 { 114 if (vcpu->arch.shared->msr & MSR_SPE) { 115 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 116 kvmppc_vcpu_enable_spe(vcpu); 117 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 118 kvmppc_vcpu_disable_spe(vcpu); 119 } 120 } 121 #else 122 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 123 { 124 } 125 #endif 126 127 /* 128 * Load up guest vcpu FP state if it's needed. 129 * It also set the MSR_FP in thread so that host know 130 * we're holding FPU, and then host can help to save 131 * guest vcpu FP state if other threads require to use FPU. 132 * This simulates an FP unavailable fault. 133 * 134 * It requires to be called with preemption disabled. 135 */ 136 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu) 137 { 138 #ifdef CONFIG_PPC_FPU 139 if (!(current->thread.regs->msr & MSR_FP)) { 140 enable_kernel_fp(); 141 load_fp_state(&vcpu->arch.fp); 142 current->thread.fp_save_area = &vcpu->arch.fp; 143 current->thread.regs->msr |= MSR_FP; 144 } 145 #endif 146 } 147 148 /* 149 * Save guest vcpu FP state into thread. 150 * It requires to be called with preemption disabled. 151 */ 152 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu) 153 { 154 #ifdef CONFIG_PPC_FPU 155 if (current->thread.regs->msr & MSR_FP) 156 giveup_fpu(current); 157 current->thread.fp_save_area = NULL; 158 #endif 159 } 160 161 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 162 { 163 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 164 /* We always treat the FP bit as enabled from the host 165 perspective, so only need to adjust the shadow MSR */ 166 vcpu->arch.shadow_msr &= ~MSR_FP; 167 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 168 #endif 169 } 170 171 /* 172 * Simulate AltiVec unavailable fault to load guest state 173 * from thread to AltiVec unit. 174 * It requires to be called with preemption disabled. 175 */ 176 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu) 177 { 178 #ifdef CONFIG_ALTIVEC 179 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 180 if (!(current->thread.regs->msr & MSR_VEC)) { 181 enable_kernel_altivec(); 182 load_vr_state(&vcpu->arch.vr); 183 current->thread.vr_save_area = &vcpu->arch.vr; 184 current->thread.regs->msr |= MSR_VEC; 185 } 186 } 187 #endif 188 } 189 190 /* 191 * Save guest vcpu AltiVec state into thread. 192 * It requires to be called with preemption disabled. 193 */ 194 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu) 195 { 196 #ifdef CONFIG_ALTIVEC 197 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 198 if (current->thread.regs->msr & MSR_VEC) 199 giveup_altivec(current); 200 current->thread.vr_save_area = NULL; 201 } 202 #endif 203 } 204 205 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu) 206 { 207 /* Synchronize guest's desire to get debug interrupts into shadow MSR */ 208 #ifndef CONFIG_KVM_BOOKE_HV 209 vcpu->arch.shadow_msr &= ~MSR_DE; 210 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; 211 #endif 212 213 /* Force enable debug interrupts when user space wants to debug */ 214 if (vcpu->guest_debug) { 215 #ifdef CONFIG_KVM_BOOKE_HV 216 /* 217 * Since there is no shadow MSR, sync MSR_DE into the guest 218 * visible MSR. 219 */ 220 vcpu->arch.shared->msr |= MSR_DE; 221 #else 222 vcpu->arch.shadow_msr |= MSR_DE; 223 vcpu->arch.shared->msr &= ~MSR_DE; 224 #endif 225 } 226 } 227 228 /* 229 * Helper function for "full" MSR writes. No need to call this if only 230 * EE/CE/ME/DE/RI are changing. 231 */ 232 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 233 { 234 u32 old_msr = vcpu->arch.shared->msr; 235 236 #ifdef CONFIG_KVM_BOOKE_HV 237 new_msr |= MSR_GS; 238 #endif 239 240 vcpu->arch.shared->msr = new_msr; 241 242 kvmppc_mmu_msr_notify(vcpu, old_msr); 243 kvmppc_vcpu_sync_spe(vcpu); 244 kvmppc_vcpu_sync_fpu(vcpu); 245 kvmppc_vcpu_sync_debug(vcpu); 246 } 247 248 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 249 unsigned int priority) 250 { 251 trace_kvm_booke_queue_irqprio(vcpu, priority); 252 set_bit(priority, &vcpu->arch.pending_exceptions); 253 } 254 255 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 256 ulong dear_flags, ulong esr_flags) 257 { 258 vcpu->arch.queued_dear = dear_flags; 259 vcpu->arch.queued_esr = esr_flags; 260 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 261 } 262 263 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 264 ulong dear_flags, ulong esr_flags) 265 { 266 vcpu->arch.queued_dear = dear_flags; 267 vcpu->arch.queued_esr = esr_flags; 268 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 269 } 270 271 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu) 272 { 273 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 274 } 275 276 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags) 277 { 278 vcpu->arch.queued_esr = esr_flags; 279 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 280 } 281 282 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 283 ulong esr_flags) 284 { 285 vcpu->arch.queued_dear = dear_flags; 286 vcpu->arch.queued_esr = esr_flags; 287 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 288 } 289 290 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 291 { 292 vcpu->arch.queued_esr = esr_flags; 293 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 294 } 295 296 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 297 { 298 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 299 } 300 301 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 302 { 303 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 304 } 305 306 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 307 { 308 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 309 } 310 311 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 312 struct kvm_interrupt *irq) 313 { 314 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 315 316 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 317 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 318 319 kvmppc_booke_queue_irqprio(vcpu, prio); 320 } 321 322 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 323 { 324 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 325 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 326 } 327 328 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 329 { 330 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 331 } 332 333 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 334 { 335 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 336 } 337 338 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu) 339 { 340 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG); 341 } 342 343 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu) 344 { 345 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions); 346 } 347 348 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 349 { 350 kvmppc_set_srr0(vcpu, srr0); 351 kvmppc_set_srr1(vcpu, srr1); 352 } 353 354 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 355 { 356 vcpu->arch.csrr0 = srr0; 357 vcpu->arch.csrr1 = srr1; 358 } 359 360 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 361 { 362 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 363 vcpu->arch.dsrr0 = srr0; 364 vcpu->arch.dsrr1 = srr1; 365 } else { 366 set_guest_csrr(vcpu, srr0, srr1); 367 } 368 } 369 370 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 371 { 372 vcpu->arch.mcsrr0 = srr0; 373 vcpu->arch.mcsrr1 = srr1; 374 } 375 376 /* Deliver the interrupt of the corresponding priority, if possible. */ 377 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 378 unsigned int priority) 379 { 380 int allowed = 0; 381 ulong msr_mask = 0; 382 bool update_esr = false, update_dear = false, update_epr = false; 383 ulong crit_raw = vcpu->arch.shared->critical; 384 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 385 bool crit; 386 bool keep_irq = false; 387 enum int_class int_class; 388 ulong new_msr = vcpu->arch.shared->msr; 389 390 /* Truncate crit indicators in 32 bit mode */ 391 if (!(vcpu->arch.shared->msr & MSR_SF)) { 392 crit_raw &= 0xffffffff; 393 crit_r1 &= 0xffffffff; 394 } 395 396 /* Critical section when crit == r1 */ 397 crit = (crit_raw == crit_r1); 398 /* ... and we're in supervisor mode */ 399 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 400 401 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 402 priority = BOOKE_IRQPRIO_EXTERNAL; 403 keep_irq = true; 404 } 405 406 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 407 update_epr = true; 408 409 switch (priority) { 410 case BOOKE_IRQPRIO_DTLB_MISS: 411 case BOOKE_IRQPRIO_DATA_STORAGE: 412 case BOOKE_IRQPRIO_ALIGNMENT: 413 update_dear = true; 414 /* fall through */ 415 case BOOKE_IRQPRIO_INST_STORAGE: 416 case BOOKE_IRQPRIO_PROGRAM: 417 update_esr = true; 418 /* fall through */ 419 case BOOKE_IRQPRIO_ITLB_MISS: 420 case BOOKE_IRQPRIO_SYSCALL: 421 case BOOKE_IRQPRIO_FP_UNAVAIL: 422 #ifdef CONFIG_SPE_POSSIBLE 423 case BOOKE_IRQPRIO_SPE_UNAVAIL: 424 case BOOKE_IRQPRIO_SPE_FP_DATA: 425 case BOOKE_IRQPRIO_SPE_FP_ROUND: 426 #endif 427 #ifdef CONFIG_ALTIVEC 428 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL: 429 case BOOKE_IRQPRIO_ALTIVEC_ASSIST: 430 #endif 431 case BOOKE_IRQPRIO_AP_UNAVAIL: 432 allowed = 1; 433 msr_mask = MSR_CE | MSR_ME | MSR_DE; 434 int_class = INT_CLASS_NONCRIT; 435 break; 436 case BOOKE_IRQPRIO_WATCHDOG: 437 case BOOKE_IRQPRIO_CRITICAL: 438 case BOOKE_IRQPRIO_DBELL_CRIT: 439 allowed = vcpu->arch.shared->msr & MSR_CE; 440 allowed = allowed && !crit; 441 msr_mask = MSR_ME; 442 int_class = INT_CLASS_CRIT; 443 break; 444 case BOOKE_IRQPRIO_MACHINE_CHECK: 445 allowed = vcpu->arch.shared->msr & MSR_ME; 446 allowed = allowed && !crit; 447 int_class = INT_CLASS_MC; 448 break; 449 case BOOKE_IRQPRIO_DECREMENTER: 450 case BOOKE_IRQPRIO_FIT: 451 keep_irq = true; 452 /* fall through */ 453 case BOOKE_IRQPRIO_EXTERNAL: 454 case BOOKE_IRQPRIO_DBELL: 455 allowed = vcpu->arch.shared->msr & MSR_EE; 456 allowed = allowed && !crit; 457 msr_mask = MSR_CE | MSR_ME | MSR_DE; 458 int_class = INT_CLASS_NONCRIT; 459 break; 460 case BOOKE_IRQPRIO_DEBUG: 461 allowed = vcpu->arch.shared->msr & MSR_DE; 462 allowed = allowed && !crit; 463 msr_mask = MSR_ME; 464 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 465 int_class = INT_CLASS_DBG; 466 else 467 int_class = INT_CLASS_CRIT; 468 469 break; 470 } 471 472 if (allowed) { 473 switch (int_class) { 474 case INT_CLASS_NONCRIT: 475 set_guest_srr(vcpu, vcpu->arch.pc, 476 vcpu->arch.shared->msr); 477 break; 478 case INT_CLASS_CRIT: 479 set_guest_csrr(vcpu, vcpu->arch.pc, 480 vcpu->arch.shared->msr); 481 break; 482 case INT_CLASS_DBG: 483 set_guest_dsrr(vcpu, vcpu->arch.pc, 484 vcpu->arch.shared->msr); 485 break; 486 case INT_CLASS_MC: 487 set_guest_mcsrr(vcpu, vcpu->arch.pc, 488 vcpu->arch.shared->msr); 489 break; 490 } 491 492 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 493 if (update_esr == true) 494 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr); 495 if (update_dear == true) 496 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear); 497 if (update_epr == true) { 498 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 499 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 500 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 501 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 502 kvmppc_mpic_set_epr(vcpu); 503 } 504 } 505 506 new_msr &= msr_mask; 507 #if defined(CONFIG_64BIT) 508 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 509 new_msr |= MSR_CM; 510 #endif 511 kvmppc_set_msr(vcpu, new_msr); 512 513 if (!keep_irq) 514 clear_bit(priority, &vcpu->arch.pending_exceptions); 515 } 516 517 #ifdef CONFIG_KVM_BOOKE_HV 518 /* 519 * If an interrupt is pending but masked, raise a guest doorbell 520 * so that we are notified when the guest enables the relevant 521 * MSR bit. 522 */ 523 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 524 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 525 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 526 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 527 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 528 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 529 #endif 530 531 return allowed; 532 } 533 534 /* 535 * Return the number of jiffies until the next timeout. If the timeout is 536 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 537 * because the larger value can break the timer APIs. 538 */ 539 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 540 { 541 u64 tb, wdt_tb, wdt_ticks = 0; 542 u64 nr_jiffies = 0; 543 u32 period = TCR_GET_WP(vcpu->arch.tcr); 544 545 wdt_tb = 1ULL << (63 - period); 546 tb = get_tb(); 547 /* 548 * The watchdog timeout will hapeen when TB bit corresponding 549 * to watchdog will toggle from 0 to 1. 550 */ 551 if (tb & wdt_tb) 552 wdt_ticks = wdt_tb; 553 554 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 555 556 /* Convert timebase ticks to jiffies */ 557 nr_jiffies = wdt_ticks; 558 559 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 560 nr_jiffies++; 561 562 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 563 } 564 565 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 566 { 567 unsigned long nr_jiffies; 568 unsigned long flags; 569 570 /* 571 * If TSR_ENW and TSR_WIS are not set then no need to exit to 572 * userspace, so clear the KVM_REQ_WATCHDOG request. 573 */ 574 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 575 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 576 577 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 578 nr_jiffies = watchdog_next_timeout(vcpu); 579 /* 580 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 581 * then do not run the watchdog timer as this can break timer APIs. 582 */ 583 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 584 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 585 else 586 del_timer(&vcpu->arch.wdt_timer); 587 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 588 } 589 590 void kvmppc_watchdog_func(unsigned long data) 591 { 592 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 593 u32 tsr, new_tsr; 594 int final; 595 596 do { 597 new_tsr = tsr = vcpu->arch.tsr; 598 final = 0; 599 600 /* Time out event */ 601 if (tsr & TSR_ENW) { 602 if (tsr & TSR_WIS) 603 final = 1; 604 else 605 new_tsr = tsr | TSR_WIS; 606 } else { 607 new_tsr = tsr | TSR_ENW; 608 } 609 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 610 611 if (new_tsr & TSR_WIS) { 612 smp_wmb(); 613 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 614 kvm_vcpu_kick(vcpu); 615 } 616 617 /* 618 * If this is final watchdog expiry and some action is required 619 * then exit to userspace. 620 */ 621 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 622 vcpu->arch.watchdog_enabled) { 623 smp_wmb(); 624 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 625 kvm_vcpu_kick(vcpu); 626 } 627 628 /* 629 * Stop running the watchdog timer after final expiration to 630 * prevent the host from being flooded with timers if the 631 * guest sets a short period. 632 * Timers will resume when TSR/TCR is updated next time. 633 */ 634 if (!final) 635 arm_next_watchdog(vcpu); 636 } 637 638 static void update_timer_ints(struct kvm_vcpu *vcpu) 639 { 640 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 641 kvmppc_core_queue_dec(vcpu); 642 else 643 kvmppc_core_dequeue_dec(vcpu); 644 645 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 646 kvmppc_core_queue_watchdog(vcpu); 647 else 648 kvmppc_core_dequeue_watchdog(vcpu); 649 } 650 651 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 652 { 653 unsigned long *pending = &vcpu->arch.pending_exceptions; 654 unsigned int priority; 655 656 priority = __ffs(*pending); 657 while (priority < BOOKE_IRQPRIO_MAX) { 658 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 659 break; 660 661 priority = find_next_bit(pending, 662 BITS_PER_BYTE * sizeof(*pending), 663 priority + 1); 664 } 665 666 /* Tell the guest about our interrupt status */ 667 vcpu->arch.shared->int_pending = !!*pending; 668 } 669 670 /* Check pending exceptions and deliver one, if possible. */ 671 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 672 { 673 int r = 0; 674 WARN_ON_ONCE(!irqs_disabled()); 675 676 kvmppc_core_check_exceptions(vcpu); 677 678 if (vcpu->requests) { 679 /* Exception delivery raised request; start over */ 680 return 1; 681 } 682 683 if (vcpu->arch.shared->msr & MSR_WE) { 684 local_irq_enable(); 685 kvm_vcpu_block(vcpu); 686 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 687 hard_irq_disable(); 688 689 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 690 r = 1; 691 }; 692 693 return r; 694 } 695 696 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 697 { 698 int r = 1; /* Indicate we want to get back into the guest */ 699 700 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 701 update_timer_ints(vcpu); 702 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 703 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 704 kvmppc_core_flush_tlb(vcpu); 705 #endif 706 707 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 708 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 709 r = 0; 710 } 711 712 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 713 vcpu->run->epr.epr = 0; 714 vcpu->arch.epr_needed = true; 715 vcpu->run->exit_reason = KVM_EXIT_EPR; 716 r = 0; 717 } 718 719 return r; 720 } 721 722 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 723 { 724 int ret, s; 725 struct debug_reg debug; 726 727 if (!vcpu->arch.sane) { 728 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 729 return -EINVAL; 730 } 731 732 s = kvmppc_prepare_to_enter(vcpu); 733 if (s <= 0) { 734 ret = s; 735 goto out; 736 } 737 /* interrupts now hard-disabled */ 738 739 #ifdef CONFIG_PPC_FPU 740 /* Save userspace FPU state in stack */ 741 enable_kernel_fp(); 742 743 /* 744 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 745 * as always using the FPU. 746 */ 747 kvmppc_load_guest_fp(vcpu); 748 #endif 749 750 #ifdef CONFIG_ALTIVEC 751 /* Save userspace AltiVec state in stack */ 752 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 753 enable_kernel_altivec(); 754 /* 755 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest 756 * as always using the AltiVec. 757 */ 758 kvmppc_load_guest_altivec(vcpu); 759 #endif 760 761 /* Switch to guest debug context */ 762 debug = vcpu->arch.dbg_reg; 763 switch_booke_debug_regs(&debug); 764 debug = current->thread.debug; 765 current->thread.debug = vcpu->arch.dbg_reg; 766 767 vcpu->arch.pgdir = current->mm->pgd; 768 kvmppc_fix_ee_before_entry(); 769 770 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 771 772 /* No need for kvm_guest_exit. It's done in handle_exit. 773 We also get here with interrupts enabled. */ 774 775 /* Switch back to user space debug context */ 776 switch_booke_debug_regs(&debug); 777 current->thread.debug = debug; 778 779 #ifdef CONFIG_PPC_FPU 780 kvmppc_save_guest_fp(vcpu); 781 #endif 782 783 #ifdef CONFIG_ALTIVEC 784 kvmppc_save_guest_altivec(vcpu); 785 #endif 786 787 out: 788 vcpu->mode = OUTSIDE_GUEST_MODE; 789 return ret; 790 } 791 792 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 793 { 794 enum emulation_result er; 795 796 er = kvmppc_emulate_instruction(run, vcpu); 797 switch (er) { 798 case EMULATE_DONE: 799 /* don't overwrite subtypes, just account kvm_stats */ 800 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 801 /* Future optimization: only reload non-volatiles if 802 * they were actually modified by emulation. */ 803 return RESUME_GUEST_NV; 804 805 case EMULATE_AGAIN: 806 return RESUME_GUEST; 807 808 case EMULATE_FAIL: 809 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 810 __func__, vcpu->arch.pc, vcpu->arch.last_inst); 811 /* For debugging, encode the failing instruction and 812 * report it to userspace. */ 813 run->hw.hardware_exit_reason = ~0ULL << 32; 814 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 815 kvmppc_core_queue_program(vcpu, ESR_PIL); 816 return RESUME_HOST; 817 818 case EMULATE_EXIT_USER: 819 return RESUME_HOST; 820 821 default: 822 BUG(); 823 } 824 } 825 826 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu) 827 { 828 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg); 829 u32 dbsr = vcpu->arch.dbsr; 830 831 if (vcpu->guest_debug == 0) { 832 /* 833 * Debug resources belong to Guest. 834 * Imprecise debug event is not injected 835 */ 836 if (dbsr & DBSR_IDE) { 837 dbsr &= ~DBSR_IDE; 838 if (!dbsr) 839 return RESUME_GUEST; 840 } 841 842 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) && 843 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM)) 844 kvmppc_core_queue_debug(vcpu); 845 846 /* Inject a program interrupt if trap debug is not allowed */ 847 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE)) 848 kvmppc_core_queue_program(vcpu, ESR_PTR); 849 850 return RESUME_GUEST; 851 } 852 853 /* 854 * Debug resource owned by userspace. 855 * Clear guest dbsr (vcpu->arch.dbsr) 856 */ 857 vcpu->arch.dbsr = 0; 858 run->debug.arch.status = 0; 859 run->debug.arch.address = vcpu->arch.pc; 860 861 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) { 862 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT; 863 } else { 864 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W)) 865 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE; 866 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R)) 867 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ; 868 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W)) 869 run->debug.arch.address = dbg_reg->dac1; 870 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W)) 871 run->debug.arch.address = dbg_reg->dac2; 872 } 873 874 return RESUME_HOST; 875 } 876 877 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 878 { 879 ulong r1, ip, msr, lr; 880 881 asm("mr %0, 1" : "=r"(r1)); 882 asm("mflr %0" : "=r"(lr)); 883 asm("mfmsr %0" : "=r"(msr)); 884 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 885 886 memset(regs, 0, sizeof(*regs)); 887 regs->gpr[1] = r1; 888 regs->nip = ip; 889 regs->msr = msr; 890 regs->link = lr; 891 } 892 893 /* 894 * For interrupts needed to be handled by host interrupt handlers, 895 * corresponding host handler are called from here in similar way 896 * (but not exact) as they are called from low level handler 897 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 898 */ 899 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 900 unsigned int exit_nr) 901 { 902 struct pt_regs regs; 903 904 switch (exit_nr) { 905 case BOOKE_INTERRUPT_EXTERNAL: 906 kvmppc_fill_pt_regs(®s); 907 do_IRQ(®s); 908 break; 909 case BOOKE_INTERRUPT_DECREMENTER: 910 kvmppc_fill_pt_regs(®s); 911 timer_interrupt(®s); 912 break; 913 #if defined(CONFIG_PPC_DOORBELL) 914 case BOOKE_INTERRUPT_DOORBELL: 915 kvmppc_fill_pt_regs(®s); 916 doorbell_exception(®s); 917 break; 918 #endif 919 case BOOKE_INTERRUPT_MACHINE_CHECK: 920 /* FIXME */ 921 break; 922 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 923 kvmppc_fill_pt_regs(®s); 924 performance_monitor_exception(®s); 925 break; 926 case BOOKE_INTERRUPT_WATCHDOG: 927 kvmppc_fill_pt_regs(®s); 928 #ifdef CONFIG_BOOKE_WDT 929 WatchdogException(®s); 930 #else 931 unknown_exception(®s); 932 #endif 933 break; 934 case BOOKE_INTERRUPT_CRITICAL: 935 unknown_exception(®s); 936 break; 937 case BOOKE_INTERRUPT_DEBUG: 938 /* Save DBSR before preemption is enabled */ 939 vcpu->arch.dbsr = mfspr(SPRN_DBSR); 940 kvmppc_clear_dbsr(); 941 break; 942 } 943 } 944 945 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu, 946 enum emulation_result emulated, u32 last_inst) 947 { 948 switch (emulated) { 949 case EMULATE_AGAIN: 950 return RESUME_GUEST; 951 952 case EMULATE_FAIL: 953 pr_debug("%s: load instruction from guest address %lx failed\n", 954 __func__, vcpu->arch.pc); 955 /* For debugging, encode the failing instruction and 956 * report it to userspace. */ 957 run->hw.hardware_exit_reason = ~0ULL << 32; 958 run->hw.hardware_exit_reason |= last_inst; 959 kvmppc_core_queue_program(vcpu, ESR_PIL); 960 return RESUME_HOST; 961 962 default: 963 BUG(); 964 } 965 } 966 967 /** 968 * kvmppc_handle_exit 969 * 970 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 971 */ 972 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 973 unsigned int exit_nr) 974 { 975 int r = RESUME_HOST; 976 int s; 977 int idx; 978 u32 last_inst = KVM_INST_FETCH_FAILED; 979 enum emulation_result emulated = EMULATE_DONE; 980 981 /* update before a new last_exit_type is rewritten */ 982 kvmppc_update_timing_stats(vcpu); 983 984 /* restart interrupts if they were meant for the host */ 985 kvmppc_restart_interrupt(vcpu, exit_nr); 986 987 /* 988 * get last instruction before beeing preempted 989 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA 990 */ 991 switch (exit_nr) { 992 case BOOKE_INTERRUPT_DATA_STORAGE: 993 case BOOKE_INTERRUPT_DTLB_MISS: 994 case BOOKE_INTERRUPT_HV_PRIV: 995 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 996 break; 997 case BOOKE_INTERRUPT_PROGRAM: 998 /* SW breakpoints arrive as illegal instructions on HV */ 999 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) 1000 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1001 break; 1002 default: 1003 break; 1004 } 1005 1006 local_irq_enable(); 1007 1008 trace_kvm_exit(exit_nr, vcpu); 1009 kvm_guest_exit(); 1010 1011 run->exit_reason = KVM_EXIT_UNKNOWN; 1012 run->ready_for_interrupt_injection = 1; 1013 1014 if (emulated != EMULATE_DONE) { 1015 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst); 1016 goto out; 1017 } 1018 1019 switch (exit_nr) { 1020 case BOOKE_INTERRUPT_MACHINE_CHECK: 1021 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 1022 kvmppc_dump_vcpu(vcpu); 1023 /* For debugging, send invalid exit reason to user space */ 1024 run->hw.hardware_exit_reason = ~1ULL << 32; 1025 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 1026 r = RESUME_HOST; 1027 break; 1028 1029 case BOOKE_INTERRUPT_EXTERNAL: 1030 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 1031 r = RESUME_GUEST; 1032 break; 1033 1034 case BOOKE_INTERRUPT_DECREMENTER: 1035 kvmppc_account_exit(vcpu, DEC_EXITS); 1036 r = RESUME_GUEST; 1037 break; 1038 1039 case BOOKE_INTERRUPT_WATCHDOG: 1040 r = RESUME_GUEST; 1041 break; 1042 1043 case BOOKE_INTERRUPT_DOORBELL: 1044 kvmppc_account_exit(vcpu, DBELL_EXITS); 1045 r = RESUME_GUEST; 1046 break; 1047 1048 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 1049 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1050 1051 /* 1052 * We are here because there is a pending guest interrupt 1053 * which could not be delivered as MSR_CE or MSR_ME was not 1054 * set. Once we break from here we will retry delivery. 1055 */ 1056 r = RESUME_GUEST; 1057 break; 1058 1059 case BOOKE_INTERRUPT_GUEST_DBELL: 1060 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1061 1062 /* 1063 * We are here because there is a pending guest interrupt 1064 * which could not be delivered as MSR_EE was not set. Once 1065 * we break from here we will retry delivery. 1066 */ 1067 r = RESUME_GUEST; 1068 break; 1069 1070 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 1071 r = RESUME_GUEST; 1072 break; 1073 1074 case BOOKE_INTERRUPT_HV_PRIV: 1075 r = emulation_exit(run, vcpu); 1076 break; 1077 1078 case BOOKE_INTERRUPT_PROGRAM: 1079 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) && 1080 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) { 1081 /* 1082 * We are here because of an SW breakpoint instr, 1083 * so lets return to host to handle. 1084 */ 1085 r = kvmppc_handle_debug(run, vcpu); 1086 run->exit_reason = KVM_EXIT_DEBUG; 1087 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1088 break; 1089 } 1090 1091 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 1092 /* 1093 * Program traps generated by user-level software must 1094 * be handled by the guest kernel. 1095 * 1096 * In GS mode, hypervisor privileged instructions trap 1097 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 1098 * actual program interrupts, handled by the guest. 1099 */ 1100 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 1101 r = RESUME_GUEST; 1102 kvmppc_account_exit(vcpu, USR_PR_INST); 1103 break; 1104 } 1105 1106 r = emulation_exit(run, vcpu); 1107 break; 1108 1109 case BOOKE_INTERRUPT_FP_UNAVAIL: 1110 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 1111 kvmppc_account_exit(vcpu, FP_UNAVAIL); 1112 r = RESUME_GUEST; 1113 break; 1114 1115 #ifdef CONFIG_SPE 1116 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 1117 if (vcpu->arch.shared->msr & MSR_SPE) 1118 kvmppc_vcpu_enable_spe(vcpu); 1119 else 1120 kvmppc_booke_queue_irqprio(vcpu, 1121 BOOKE_IRQPRIO_SPE_UNAVAIL); 1122 r = RESUME_GUEST; 1123 break; 1124 } 1125 1126 case BOOKE_INTERRUPT_SPE_FP_DATA: 1127 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 1128 r = RESUME_GUEST; 1129 break; 1130 1131 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1132 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 1133 r = RESUME_GUEST; 1134 break; 1135 #elif defined(CONFIG_SPE_POSSIBLE) 1136 case BOOKE_INTERRUPT_SPE_UNAVAIL: 1137 /* 1138 * Guest wants SPE, but host kernel doesn't support it. Send 1139 * an "unimplemented operation" program check to the guest. 1140 */ 1141 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 1142 r = RESUME_GUEST; 1143 break; 1144 1145 /* 1146 * These really should never happen without CONFIG_SPE, 1147 * as we should never enable the real MSR[SPE] in the guest. 1148 */ 1149 case BOOKE_INTERRUPT_SPE_FP_DATA: 1150 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1151 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 1152 __func__, exit_nr, vcpu->arch.pc); 1153 run->hw.hardware_exit_reason = exit_nr; 1154 r = RESUME_HOST; 1155 break; 1156 #endif /* CONFIG_SPE_POSSIBLE */ 1157 1158 /* 1159 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC, 1160 * see kvmppc_core_check_processor_compat(). 1161 */ 1162 #ifdef CONFIG_ALTIVEC 1163 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL: 1164 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 1165 r = RESUME_GUEST; 1166 break; 1167 1168 case BOOKE_INTERRUPT_ALTIVEC_ASSIST: 1169 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST); 1170 r = RESUME_GUEST; 1171 break; 1172 #endif 1173 1174 case BOOKE_INTERRUPT_DATA_STORAGE: 1175 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 1176 vcpu->arch.fault_esr); 1177 kvmppc_account_exit(vcpu, DSI_EXITS); 1178 r = RESUME_GUEST; 1179 break; 1180 1181 case BOOKE_INTERRUPT_INST_STORAGE: 1182 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 1183 kvmppc_account_exit(vcpu, ISI_EXITS); 1184 r = RESUME_GUEST; 1185 break; 1186 1187 case BOOKE_INTERRUPT_ALIGNMENT: 1188 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1189 vcpu->arch.fault_esr); 1190 r = RESUME_GUEST; 1191 break; 1192 1193 #ifdef CONFIG_KVM_BOOKE_HV 1194 case BOOKE_INTERRUPT_HV_SYSCALL: 1195 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1196 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1197 } else { 1198 /* 1199 * hcall from guest userspace -- send privileged 1200 * instruction program check. 1201 */ 1202 kvmppc_core_queue_program(vcpu, ESR_PPR); 1203 } 1204 1205 r = RESUME_GUEST; 1206 break; 1207 #else 1208 case BOOKE_INTERRUPT_SYSCALL: 1209 if (!(vcpu->arch.shared->msr & MSR_PR) && 1210 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1211 /* KVM PV hypercalls */ 1212 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1213 r = RESUME_GUEST; 1214 } else { 1215 /* Guest syscalls */ 1216 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1217 } 1218 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1219 r = RESUME_GUEST; 1220 break; 1221 #endif 1222 1223 case BOOKE_INTERRUPT_DTLB_MISS: { 1224 unsigned long eaddr = vcpu->arch.fault_dear; 1225 int gtlb_index; 1226 gpa_t gpaddr; 1227 gfn_t gfn; 1228 1229 #ifdef CONFIG_KVM_E500V2 1230 if (!(vcpu->arch.shared->msr & MSR_PR) && 1231 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1232 kvmppc_map_magic(vcpu); 1233 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1234 r = RESUME_GUEST; 1235 1236 break; 1237 } 1238 #endif 1239 1240 /* Check the guest TLB. */ 1241 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1242 if (gtlb_index < 0) { 1243 /* The guest didn't have a mapping for it. */ 1244 kvmppc_core_queue_dtlb_miss(vcpu, 1245 vcpu->arch.fault_dear, 1246 vcpu->arch.fault_esr); 1247 kvmppc_mmu_dtlb_miss(vcpu); 1248 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1249 r = RESUME_GUEST; 1250 break; 1251 } 1252 1253 idx = srcu_read_lock(&vcpu->kvm->srcu); 1254 1255 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1256 gfn = gpaddr >> PAGE_SHIFT; 1257 1258 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1259 /* The guest TLB had a mapping, but the shadow TLB 1260 * didn't, and it is RAM. This could be because: 1261 * a) the entry is mapping the host kernel, or 1262 * b) the guest used a large mapping which we're faking 1263 * Either way, we need to satisfy the fault without 1264 * invoking the guest. */ 1265 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1266 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1267 r = RESUME_GUEST; 1268 } else { 1269 /* Guest has mapped and accessed a page which is not 1270 * actually RAM. */ 1271 vcpu->arch.paddr_accessed = gpaddr; 1272 vcpu->arch.vaddr_accessed = eaddr; 1273 r = kvmppc_emulate_mmio(run, vcpu); 1274 kvmppc_account_exit(vcpu, MMIO_EXITS); 1275 } 1276 1277 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1278 break; 1279 } 1280 1281 case BOOKE_INTERRUPT_ITLB_MISS: { 1282 unsigned long eaddr = vcpu->arch.pc; 1283 gpa_t gpaddr; 1284 gfn_t gfn; 1285 int gtlb_index; 1286 1287 r = RESUME_GUEST; 1288 1289 /* Check the guest TLB. */ 1290 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1291 if (gtlb_index < 0) { 1292 /* The guest didn't have a mapping for it. */ 1293 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1294 kvmppc_mmu_itlb_miss(vcpu); 1295 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1296 break; 1297 } 1298 1299 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1300 1301 idx = srcu_read_lock(&vcpu->kvm->srcu); 1302 1303 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1304 gfn = gpaddr >> PAGE_SHIFT; 1305 1306 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1307 /* The guest TLB had a mapping, but the shadow TLB 1308 * didn't. This could be because: 1309 * a) the entry is mapping the host kernel, or 1310 * b) the guest used a large mapping which we're faking 1311 * Either way, we need to satisfy the fault without 1312 * invoking the guest. */ 1313 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1314 } else { 1315 /* Guest mapped and leaped at non-RAM! */ 1316 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1317 } 1318 1319 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1320 break; 1321 } 1322 1323 case BOOKE_INTERRUPT_DEBUG: { 1324 r = kvmppc_handle_debug(run, vcpu); 1325 if (r == RESUME_HOST) 1326 run->exit_reason = KVM_EXIT_DEBUG; 1327 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1328 break; 1329 } 1330 1331 default: 1332 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1333 BUG(); 1334 } 1335 1336 out: 1337 /* 1338 * To avoid clobbering exit_reason, only check for signals if we 1339 * aren't already exiting to userspace for some other reason. 1340 */ 1341 if (!(r & RESUME_HOST)) { 1342 s = kvmppc_prepare_to_enter(vcpu); 1343 if (s <= 0) 1344 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1345 else { 1346 /* interrupts now hard-disabled */ 1347 kvmppc_fix_ee_before_entry(); 1348 kvmppc_load_guest_fp(vcpu); 1349 kvmppc_load_guest_altivec(vcpu); 1350 } 1351 } 1352 1353 return r; 1354 } 1355 1356 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1357 { 1358 u32 old_tsr = vcpu->arch.tsr; 1359 1360 vcpu->arch.tsr = new_tsr; 1361 1362 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1363 arm_next_watchdog(vcpu); 1364 1365 update_timer_ints(vcpu); 1366 } 1367 1368 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1369 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1370 { 1371 int i; 1372 int r; 1373 1374 vcpu->arch.pc = 0; 1375 vcpu->arch.shared->pir = vcpu->vcpu_id; 1376 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1377 kvmppc_set_msr(vcpu, 0); 1378 1379 #ifndef CONFIG_KVM_BOOKE_HV 1380 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS; 1381 vcpu->arch.shadow_pid = 1; 1382 vcpu->arch.shared->msr = 0; 1383 #endif 1384 1385 /* Eye-catching numbers so we know if the guest takes an interrupt 1386 * before it's programmed its own IVPR/IVORs. */ 1387 vcpu->arch.ivpr = 0x55550000; 1388 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1389 vcpu->arch.ivor[i] = 0x7700 | i * 4; 1390 1391 kvmppc_init_timing_stats(vcpu); 1392 1393 r = kvmppc_core_vcpu_setup(vcpu); 1394 kvmppc_sanity_check(vcpu); 1395 return r; 1396 } 1397 1398 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1399 { 1400 /* setup watchdog timer once */ 1401 spin_lock_init(&vcpu->arch.wdt_lock); 1402 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1403 (unsigned long)vcpu); 1404 1405 /* 1406 * Clear DBSR.MRR to avoid guest debug interrupt as 1407 * this is of host interest 1408 */ 1409 mtspr(SPRN_DBSR, DBSR_MRR); 1410 return 0; 1411 } 1412 1413 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1414 { 1415 del_timer_sync(&vcpu->arch.wdt_timer); 1416 } 1417 1418 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1419 { 1420 int i; 1421 1422 regs->pc = vcpu->arch.pc; 1423 regs->cr = kvmppc_get_cr(vcpu); 1424 regs->ctr = vcpu->arch.ctr; 1425 regs->lr = vcpu->arch.lr; 1426 regs->xer = kvmppc_get_xer(vcpu); 1427 regs->msr = vcpu->arch.shared->msr; 1428 regs->srr0 = kvmppc_get_srr0(vcpu); 1429 regs->srr1 = kvmppc_get_srr1(vcpu); 1430 regs->pid = vcpu->arch.pid; 1431 regs->sprg0 = kvmppc_get_sprg0(vcpu); 1432 regs->sprg1 = kvmppc_get_sprg1(vcpu); 1433 regs->sprg2 = kvmppc_get_sprg2(vcpu); 1434 regs->sprg3 = kvmppc_get_sprg3(vcpu); 1435 regs->sprg4 = kvmppc_get_sprg4(vcpu); 1436 regs->sprg5 = kvmppc_get_sprg5(vcpu); 1437 regs->sprg6 = kvmppc_get_sprg6(vcpu); 1438 regs->sprg7 = kvmppc_get_sprg7(vcpu); 1439 1440 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1441 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1442 1443 return 0; 1444 } 1445 1446 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1447 { 1448 int i; 1449 1450 vcpu->arch.pc = regs->pc; 1451 kvmppc_set_cr(vcpu, regs->cr); 1452 vcpu->arch.ctr = regs->ctr; 1453 vcpu->arch.lr = regs->lr; 1454 kvmppc_set_xer(vcpu, regs->xer); 1455 kvmppc_set_msr(vcpu, regs->msr); 1456 kvmppc_set_srr0(vcpu, regs->srr0); 1457 kvmppc_set_srr1(vcpu, regs->srr1); 1458 kvmppc_set_pid(vcpu, regs->pid); 1459 kvmppc_set_sprg0(vcpu, regs->sprg0); 1460 kvmppc_set_sprg1(vcpu, regs->sprg1); 1461 kvmppc_set_sprg2(vcpu, regs->sprg2); 1462 kvmppc_set_sprg3(vcpu, regs->sprg3); 1463 kvmppc_set_sprg4(vcpu, regs->sprg4); 1464 kvmppc_set_sprg5(vcpu, regs->sprg5); 1465 kvmppc_set_sprg6(vcpu, regs->sprg6); 1466 kvmppc_set_sprg7(vcpu, regs->sprg7); 1467 1468 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1469 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1470 1471 return 0; 1472 } 1473 1474 static void get_sregs_base(struct kvm_vcpu *vcpu, 1475 struct kvm_sregs *sregs) 1476 { 1477 u64 tb = get_tb(); 1478 1479 sregs->u.e.features |= KVM_SREGS_E_BASE; 1480 1481 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1482 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1483 sregs->u.e.mcsr = vcpu->arch.mcsr; 1484 sregs->u.e.esr = kvmppc_get_esr(vcpu); 1485 sregs->u.e.dear = kvmppc_get_dar(vcpu); 1486 sregs->u.e.tsr = vcpu->arch.tsr; 1487 sregs->u.e.tcr = vcpu->arch.tcr; 1488 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1489 sregs->u.e.tb = tb; 1490 sregs->u.e.vrsave = vcpu->arch.vrsave; 1491 } 1492 1493 static int set_sregs_base(struct kvm_vcpu *vcpu, 1494 struct kvm_sregs *sregs) 1495 { 1496 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1497 return 0; 1498 1499 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1500 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1501 vcpu->arch.mcsr = sregs->u.e.mcsr; 1502 kvmppc_set_esr(vcpu, sregs->u.e.esr); 1503 kvmppc_set_dar(vcpu, sregs->u.e.dear); 1504 vcpu->arch.vrsave = sregs->u.e.vrsave; 1505 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1506 1507 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1508 vcpu->arch.dec = sregs->u.e.dec; 1509 kvmppc_emulate_dec(vcpu); 1510 } 1511 1512 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1513 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1514 1515 return 0; 1516 } 1517 1518 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1519 struct kvm_sregs *sregs) 1520 { 1521 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1522 1523 sregs->u.e.pir = vcpu->vcpu_id; 1524 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1525 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1526 sregs->u.e.decar = vcpu->arch.decar; 1527 sregs->u.e.ivpr = vcpu->arch.ivpr; 1528 } 1529 1530 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1531 struct kvm_sregs *sregs) 1532 { 1533 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1534 return 0; 1535 1536 if (sregs->u.e.pir != vcpu->vcpu_id) 1537 return -EINVAL; 1538 1539 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1540 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1541 vcpu->arch.decar = sregs->u.e.decar; 1542 vcpu->arch.ivpr = sregs->u.e.ivpr; 1543 1544 return 0; 1545 } 1546 1547 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1548 { 1549 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1550 1551 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1552 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1553 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1554 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1555 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1556 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1557 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1558 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1559 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1560 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1561 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1562 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1563 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1564 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1565 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1566 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1567 return 0; 1568 } 1569 1570 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1571 { 1572 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1573 return 0; 1574 1575 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1576 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1577 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1578 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1579 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1580 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1581 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1582 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1583 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1584 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1585 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1586 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1587 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1588 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1589 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1590 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1591 1592 return 0; 1593 } 1594 1595 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1596 struct kvm_sregs *sregs) 1597 { 1598 sregs->pvr = vcpu->arch.pvr; 1599 1600 get_sregs_base(vcpu, sregs); 1601 get_sregs_arch206(vcpu, sregs); 1602 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 1603 } 1604 1605 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1606 struct kvm_sregs *sregs) 1607 { 1608 int ret; 1609 1610 if (vcpu->arch.pvr != sregs->pvr) 1611 return -EINVAL; 1612 1613 ret = set_sregs_base(vcpu, sregs); 1614 if (ret < 0) 1615 return ret; 1616 1617 ret = set_sregs_arch206(vcpu, sregs); 1618 if (ret < 0) 1619 return ret; 1620 1621 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 1622 } 1623 1624 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 1625 union kvmppc_one_reg *val) 1626 { 1627 int r = 0; 1628 1629 switch (id) { 1630 case KVM_REG_PPC_IAC1: 1631 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1); 1632 break; 1633 case KVM_REG_PPC_IAC2: 1634 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2); 1635 break; 1636 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1637 case KVM_REG_PPC_IAC3: 1638 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3); 1639 break; 1640 case KVM_REG_PPC_IAC4: 1641 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4); 1642 break; 1643 #endif 1644 case KVM_REG_PPC_DAC1: 1645 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1); 1646 break; 1647 case KVM_REG_PPC_DAC2: 1648 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2); 1649 break; 1650 case KVM_REG_PPC_EPR: { 1651 u32 epr = kvmppc_get_epr(vcpu); 1652 *val = get_reg_val(id, epr); 1653 break; 1654 } 1655 #if defined(CONFIG_64BIT) 1656 case KVM_REG_PPC_EPCR: 1657 *val = get_reg_val(id, vcpu->arch.epcr); 1658 break; 1659 #endif 1660 case KVM_REG_PPC_TCR: 1661 *val = get_reg_val(id, vcpu->arch.tcr); 1662 break; 1663 case KVM_REG_PPC_TSR: 1664 *val = get_reg_val(id, vcpu->arch.tsr); 1665 break; 1666 case KVM_REG_PPC_DEBUG_INST: 1667 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1668 break; 1669 case KVM_REG_PPC_VRSAVE: 1670 *val = get_reg_val(id, vcpu->arch.vrsave); 1671 break; 1672 default: 1673 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 1674 break; 1675 } 1676 1677 return r; 1678 } 1679 1680 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 1681 union kvmppc_one_reg *val) 1682 { 1683 int r = 0; 1684 1685 switch (id) { 1686 case KVM_REG_PPC_IAC1: 1687 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val); 1688 break; 1689 case KVM_REG_PPC_IAC2: 1690 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val); 1691 break; 1692 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1693 case KVM_REG_PPC_IAC3: 1694 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val); 1695 break; 1696 case KVM_REG_PPC_IAC4: 1697 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val); 1698 break; 1699 #endif 1700 case KVM_REG_PPC_DAC1: 1701 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val); 1702 break; 1703 case KVM_REG_PPC_DAC2: 1704 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val); 1705 break; 1706 case KVM_REG_PPC_EPR: { 1707 u32 new_epr = set_reg_val(id, *val); 1708 kvmppc_set_epr(vcpu, new_epr); 1709 break; 1710 } 1711 #if defined(CONFIG_64BIT) 1712 case KVM_REG_PPC_EPCR: { 1713 u32 new_epcr = set_reg_val(id, *val); 1714 kvmppc_set_epcr(vcpu, new_epcr); 1715 break; 1716 } 1717 #endif 1718 case KVM_REG_PPC_OR_TSR: { 1719 u32 tsr_bits = set_reg_val(id, *val); 1720 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1721 break; 1722 } 1723 case KVM_REG_PPC_CLEAR_TSR: { 1724 u32 tsr_bits = set_reg_val(id, *val); 1725 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1726 break; 1727 } 1728 case KVM_REG_PPC_TSR: { 1729 u32 tsr = set_reg_val(id, *val); 1730 kvmppc_set_tsr(vcpu, tsr); 1731 break; 1732 } 1733 case KVM_REG_PPC_TCR: { 1734 u32 tcr = set_reg_val(id, *val); 1735 kvmppc_set_tcr(vcpu, tcr); 1736 break; 1737 } 1738 case KVM_REG_PPC_VRSAVE: 1739 vcpu->arch.vrsave = set_reg_val(id, *val); 1740 break; 1741 default: 1742 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 1743 break; 1744 } 1745 1746 return r; 1747 } 1748 1749 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1750 { 1751 return -ENOTSUPP; 1752 } 1753 1754 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1755 { 1756 return -ENOTSUPP; 1757 } 1758 1759 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1760 struct kvm_translation *tr) 1761 { 1762 int r; 1763 1764 r = kvmppc_core_vcpu_translate(vcpu, tr); 1765 return r; 1766 } 1767 1768 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1769 { 1770 return -ENOTSUPP; 1771 } 1772 1773 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 1774 struct kvm_memory_slot *dont) 1775 { 1776 } 1777 1778 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 1779 unsigned long npages) 1780 { 1781 return 0; 1782 } 1783 1784 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1785 struct kvm_memory_slot *memslot, 1786 struct kvm_userspace_memory_region *mem) 1787 { 1788 return 0; 1789 } 1790 1791 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1792 struct kvm_userspace_memory_region *mem, 1793 const struct kvm_memory_slot *old) 1794 { 1795 } 1796 1797 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1798 { 1799 } 1800 1801 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1802 { 1803 #if defined(CONFIG_64BIT) 1804 vcpu->arch.epcr = new_epcr; 1805 #ifdef CONFIG_KVM_BOOKE_HV 1806 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1807 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1808 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1809 #endif 1810 #endif 1811 } 1812 1813 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1814 { 1815 vcpu->arch.tcr = new_tcr; 1816 arm_next_watchdog(vcpu); 1817 update_timer_ints(vcpu); 1818 } 1819 1820 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1821 { 1822 set_bits(tsr_bits, &vcpu->arch.tsr); 1823 smp_wmb(); 1824 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1825 kvm_vcpu_kick(vcpu); 1826 } 1827 1828 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1829 { 1830 clear_bits(tsr_bits, &vcpu->arch.tsr); 1831 1832 /* 1833 * We may have stopped the watchdog due to 1834 * being stuck on final expiration. 1835 */ 1836 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1837 arm_next_watchdog(vcpu); 1838 1839 update_timer_ints(vcpu); 1840 } 1841 1842 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 1843 { 1844 if (vcpu->arch.tcr & TCR_ARE) { 1845 vcpu->arch.dec = vcpu->arch.decar; 1846 kvmppc_emulate_dec(vcpu); 1847 } 1848 1849 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1850 } 1851 1852 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg, 1853 uint64_t addr, int index) 1854 { 1855 switch (index) { 1856 case 0: 1857 dbg_reg->dbcr0 |= DBCR0_IAC1; 1858 dbg_reg->iac1 = addr; 1859 break; 1860 case 1: 1861 dbg_reg->dbcr0 |= DBCR0_IAC2; 1862 dbg_reg->iac2 = addr; 1863 break; 1864 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1865 case 2: 1866 dbg_reg->dbcr0 |= DBCR0_IAC3; 1867 dbg_reg->iac3 = addr; 1868 break; 1869 case 3: 1870 dbg_reg->dbcr0 |= DBCR0_IAC4; 1871 dbg_reg->iac4 = addr; 1872 break; 1873 #endif 1874 default: 1875 return -EINVAL; 1876 } 1877 1878 dbg_reg->dbcr0 |= DBCR0_IDM; 1879 return 0; 1880 } 1881 1882 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr, 1883 int type, int index) 1884 { 1885 switch (index) { 1886 case 0: 1887 if (type & KVMPPC_DEBUG_WATCH_READ) 1888 dbg_reg->dbcr0 |= DBCR0_DAC1R; 1889 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1890 dbg_reg->dbcr0 |= DBCR0_DAC1W; 1891 dbg_reg->dac1 = addr; 1892 break; 1893 case 1: 1894 if (type & KVMPPC_DEBUG_WATCH_READ) 1895 dbg_reg->dbcr0 |= DBCR0_DAC2R; 1896 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1897 dbg_reg->dbcr0 |= DBCR0_DAC2W; 1898 dbg_reg->dac2 = addr; 1899 break; 1900 default: 1901 return -EINVAL; 1902 } 1903 1904 dbg_reg->dbcr0 |= DBCR0_IDM; 1905 return 0; 1906 } 1907 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set) 1908 { 1909 /* XXX: Add similar MSR protection for BookE-PR */ 1910 #ifdef CONFIG_KVM_BOOKE_HV 1911 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP)); 1912 if (set) { 1913 if (prot_bitmap & MSR_UCLE) 1914 vcpu->arch.shadow_msrp |= MSRP_UCLEP; 1915 if (prot_bitmap & MSR_DE) 1916 vcpu->arch.shadow_msrp |= MSRP_DEP; 1917 if (prot_bitmap & MSR_PMM) 1918 vcpu->arch.shadow_msrp |= MSRP_PMMP; 1919 } else { 1920 if (prot_bitmap & MSR_UCLE) 1921 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP; 1922 if (prot_bitmap & MSR_DE) 1923 vcpu->arch.shadow_msrp &= ~MSRP_DEP; 1924 if (prot_bitmap & MSR_PMM) 1925 vcpu->arch.shadow_msrp &= ~MSRP_PMMP; 1926 } 1927 #endif 1928 } 1929 1930 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 1931 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 1932 { 1933 int gtlb_index; 1934 gpa_t gpaddr; 1935 1936 #ifdef CONFIG_KVM_E500V2 1937 if (!(vcpu->arch.shared->msr & MSR_PR) && 1938 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1939 pte->eaddr = eaddr; 1940 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) | 1941 (eaddr & ~PAGE_MASK); 1942 pte->vpage = eaddr >> PAGE_SHIFT; 1943 pte->may_read = true; 1944 pte->may_write = true; 1945 pte->may_execute = true; 1946 1947 return 0; 1948 } 1949 #endif 1950 1951 /* Check the guest TLB. */ 1952 switch (xlid) { 1953 case XLATE_INST: 1954 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1955 break; 1956 case XLATE_DATA: 1957 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1958 break; 1959 default: 1960 BUG(); 1961 } 1962 1963 /* Do we have a TLB entry at all? */ 1964 if (gtlb_index < 0) 1965 return -ENOENT; 1966 1967 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1968 1969 pte->eaddr = eaddr; 1970 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK); 1971 pte->vpage = eaddr >> PAGE_SHIFT; 1972 1973 /* XXX read permissions from the guest TLB */ 1974 pte->may_read = true; 1975 pte->may_write = true; 1976 pte->may_execute = true; 1977 1978 return 0; 1979 } 1980 1981 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1982 struct kvm_guest_debug *dbg) 1983 { 1984 struct debug_reg *dbg_reg; 1985 int n, b = 0, w = 0; 1986 1987 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { 1988 vcpu->arch.dbg_reg.dbcr0 = 0; 1989 vcpu->guest_debug = 0; 1990 kvm_guest_protect_msr(vcpu, MSR_DE, false); 1991 return 0; 1992 } 1993 1994 kvm_guest_protect_msr(vcpu, MSR_DE, true); 1995 vcpu->guest_debug = dbg->control; 1996 vcpu->arch.dbg_reg.dbcr0 = 0; 1997 1998 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 1999 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC; 2000 2001 /* Code below handles only HW breakpoints */ 2002 dbg_reg = &(vcpu->arch.dbg_reg); 2003 2004 #ifdef CONFIG_KVM_BOOKE_HV 2005 /* 2006 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1 2007 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0 2008 */ 2009 dbg_reg->dbcr1 = 0; 2010 dbg_reg->dbcr2 = 0; 2011 #else 2012 /* 2013 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1 2014 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR 2015 * is set. 2016 */ 2017 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US | 2018 DBCR1_IAC4US; 2019 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 2020 #endif 2021 2022 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) 2023 return 0; 2024 2025 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) { 2026 uint64_t addr = dbg->arch.bp[n].addr; 2027 uint32_t type = dbg->arch.bp[n].type; 2028 2029 if (type == KVMPPC_DEBUG_NONE) 2030 continue; 2031 2032 if (type & !(KVMPPC_DEBUG_WATCH_READ | 2033 KVMPPC_DEBUG_WATCH_WRITE | 2034 KVMPPC_DEBUG_BREAKPOINT)) 2035 return -EINVAL; 2036 2037 if (type & KVMPPC_DEBUG_BREAKPOINT) { 2038 /* Setting H/W breakpoint */ 2039 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++)) 2040 return -EINVAL; 2041 } else { 2042 /* Setting H/W watchpoint */ 2043 if (kvmppc_booke_add_watchpoint(dbg_reg, addr, 2044 type, w++)) 2045 return -EINVAL; 2046 } 2047 } 2048 2049 return 0; 2050 } 2051 2052 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2053 { 2054 vcpu->cpu = smp_processor_id(); 2055 current->thread.kvm_vcpu = vcpu; 2056 } 2057 2058 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 2059 { 2060 current->thread.kvm_vcpu = NULL; 2061 vcpu->cpu = -1; 2062 2063 /* Clear pending debug event in DBSR */ 2064 kvmppc_clear_dbsr(); 2065 } 2066 2067 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 2068 { 2069 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 2070 } 2071 2072 int kvmppc_core_init_vm(struct kvm *kvm) 2073 { 2074 return kvm->arch.kvm_ops->init_vm(kvm); 2075 } 2076 2077 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 2078 { 2079 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 2080 } 2081 2082 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 2083 { 2084 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2085 } 2086 2087 void kvmppc_core_destroy_vm(struct kvm *kvm) 2088 { 2089 kvm->arch.kvm_ops->destroy_vm(kvm); 2090 } 2091 2092 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2093 { 2094 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 2095 } 2096 2097 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 2098 { 2099 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 2100 } 2101 2102 int __init kvmppc_booke_init(void) 2103 { 2104 #ifndef CONFIG_KVM_BOOKE_HV 2105 unsigned long ivor[16]; 2106 unsigned long *handler = kvmppc_booke_handler_addr; 2107 unsigned long max_ivor = 0; 2108 unsigned long handler_len; 2109 int i; 2110 2111 /* We install our own exception handlers by hijacking IVPR. IVPR must 2112 * be 16-bit aligned, so we need a 64KB allocation. */ 2113 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 2114 VCPU_SIZE_ORDER); 2115 if (!kvmppc_booke_handlers) 2116 return -ENOMEM; 2117 2118 /* XXX make sure our handlers are smaller than Linux's */ 2119 2120 /* Copy our interrupt handlers to match host IVORs. That way we don't 2121 * have to swap the IVORs on every guest/host transition. */ 2122 ivor[0] = mfspr(SPRN_IVOR0); 2123 ivor[1] = mfspr(SPRN_IVOR1); 2124 ivor[2] = mfspr(SPRN_IVOR2); 2125 ivor[3] = mfspr(SPRN_IVOR3); 2126 ivor[4] = mfspr(SPRN_IVOR4); 2127 ivor[5] = mfspr(SPRN_IVOR5); 2128 ivor[6] = mfspr(SPRN_IVOR6); 2129 ivor[7] = mfspr(SPRN_IVOR7); 2130 ivor[8] = mfspr(SPRN_IVOR8); 2131 ivor[9] = mfspr(SPRN_IVOR9); 2132 ivor[10] = mfspr(SPRN_IVOR10); 2133 ivor[11] = mfspr(SPRN_IVOR11); 2134 ivor[12] = mfspr(SPRN_IVOR12); 2135 ivor[13] = mfspr(SPRN_IVOR13); 2136 ivor[14] = mfspr(SPRN_IVOR14); 2137 ivor[15] = mfspr(SPRN_IVOR15); 2138 2139 for (i = 0; i < 16; i++) { 2140 if (ivor[i] > max_ivor) 2141 max_ivor = i; 2142 2143 handler_len = handler[i + 1] - handler[i]; 2144 memcpy((void *)kvmppc_booke_handlers + ivor[i], 2145 (void *)handler[i], handler_len); 2146 } 2147 2148 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 2149 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 2150 ivor[max_ivor] + handler_len); 2151 #endif /* !BOOKE_HV */ 2152 return 0; 2153 } 2154 2155 void __exit kvmppc_booke_exit(void) 2156 { 2157 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 2158 kvm_exit(); 2159 } 2160