1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * Paul Mackerras <paulus@samba.org> 8 * 9 * Description: 10 * Functions relating to running KVM on Book 3S processors where 11 * we don't have access to hypervisor mode, and we run the guest 12 * in problem state (user mode). 13 * 14 * This file is derived from arch/powerpc/kvm/44x.c, 15 * by Hollis Blanchard <hollisb@us.ibm.com>. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License, version 2, as 19 * published by the Free Software Foundation. 20 */ 21 22 #include <linux/kvm_host.h> 23 #include <linux/export.h> 24 #include <linux/err.h> 25 #include <linux/slab.h> 26 27 #include <asm/reg.h> 28 #include <asm/cputable.h> 29 #include <asm/cacheflush.h> 30 #include <asm/tlbflush.h> 31 #include <asm/uaccess.h> 32 #include <asm/io.h> 33 #include <asm/kvm_ppc.h> 34 #include <asm/kvm_book3s.h> 35 #include <asm/mmu_context.h> 36 #include <asm/switch_to.h> 37 #include <asm/firmware.h> 38 #include <asm/hvcall.h> 39 #include <linux/gfp.h> 40 #include <linux/sched.h> 41 #include <linux/vmalloc.h> 42 #include <linux/highmem.h> 43 #include <linux/module.h> 44 #include <linux/miscdevice.h> 45 46 #include "book3s.h" 47 48 #define CREATE_TRACE_POINTS 49 #include "trace_pr.h" 50 51 /* #define EXIT_DEBUG */ 52 /* #define DEBUG_EXT */ 53 54 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, 55 ulong msr); 56 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac); 57 58 /* Some compatibility defines */ 59 #ifdef CONFIG_PPC_BOOK3S_32 60 #define MSR_USER32 MSR_USER 61 #define MSR_USER64 MSR_USER 62 #define HW_PAGE_SIZE PAGE_SIZE 63 #endif 64 65 static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu) 66 { 67 ulong msr = kvmppc_get_msr(vcpu); 68 return (msr & (MSR_IR|MSR_DR)) == MSR_DR; 69 } 70 71 static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu) 72 { 73 ulong msr = kvmppc_get_msr(vcpu); 74 ulong pc = kvmppc_get_pc(vcpu); 75 76 /* We are in DR only split real mode */ 77 if ((msr & (MSR_IR|MSR_DR)) != MSR_DR) 78 return; 79 80 /* We have not fixed up the guest already */ 81 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) 82 return; 83 84 /* The code is in fixupable address space */ 85 if (pc & SPLIT_HACK_MASK) 86 return; 87 88 vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK; 89 kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS); 90 } 91 92 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu); 93 94 static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu) 95 { 96 #ifdef CONFIG_PPC_BOOK3S_64 97 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 98 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb)); 99 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max; 100 svcpu->in_use = 0; 101 svcpu_put(svcpu); 102 #endif 103 104 /* Disable AIL if supported */ 105 if (cpu_has_feature(CPU_FTR_HVMODE) && 106 cpu_has_feature(CPU_FTR_ARCH_207S)) 107 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL); 108 109 vcpu->cpu = smp_processor_id(); 110 #ifdef CONFIG_PPC_BOOK3S_32 111 current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu; 112 #endif 113 114 if (kvmppc_is_split_real(vcpu)) 115 kvmppc_fixup_split_real(vcpu); 116 } 117 118 static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu) 119 { 120 #ifdef CONFIG_PPC_BOOK3S_64 121 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 122 if (svcpu->in_use) { 123 kvmppc_copy_from_svcpu(vcpu, svcpu); 124 } 125 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb)); 126 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max; 127 svcpu_put(svcpu); 128 #endif 129 130 if (kvmppc_is_split_real(vcpu)) 131 kvmppc_unfixup_split_real(vcpu); 132 133 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); 134 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG); 135 136 /* Enable AIL if supported */ 137 if (cpu_has_feature(CPU_FTR_HVMODE) && 138 cpu_has_feature(CPU_FTR_ARCH_207S)) 139 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3); 140 141 vcpu->cpu = -1; 142 } 143 144 /* Copy data needed by real-mode code from vcpu to shadow vcpu */ 145 void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu, 146 struct kvm_vcpu *vcpu) 147 { 148 svcpu->gpr[0] = vcpu->arch.gpr[0]; 149 svcpu->gpr[1] = vcpu->arch.gpr[1]; 150 svcpu->gpr[2] = vcpu->arch.gpr[2]; 151 svcpu->gpr[3] = vcpu->arch.gpr[3]; 152 svcpu->gpr[4] = vcpu->arch.gpr[4]; 153 svcpu->gpr[5] = vcpu->arch.gpr[5]; 154 svcpu->gpr[6] = vcpu->arch.gpr[6]; 155 svcpu->gpr[7] = vcpu->arch.gpr[7]; 156 svcpu->gpr[8] = vcpu->arch.gpr[8]; 157 svcpu->gpr[9] = vcpu->arch.gpr[9]; 158 svcpu->gpr[10] = vcpu->arch.gpr[10]; 159 svcpu->gpr[11] = vcpu->arch.gpr[11]; 160 svcpu->gpr[12] = vcpu->arch.gpr[12]; 161 svcpu->gpr[13] = vcpu->arch.gpr[13]; 162 svcpu->cr = vcpu->arch.cr; 163 svcpu->xer = vcpu->arch.xer; 164 svcpu->ctr = vcpu->arch.ctr; 165 svcpu->lr = vcpu->arch.lr; 166 svcpu->pc = vcpu->arch.pc; 167 #ifdef CONFIG_PPC_BOOK3S_64 168 svcpu->shadow_fscr = vcpu->arch.shadow_fscr; 169 #endif 170 /* 171 * Now also save the current time base value. We use this 172 * to find the guest purr and spurr value. 173 */ 174 vcpu->arch.entry_tb = get_tb(); 175 vcpu->arch.entry_vtb = get_vtb(); 176 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 177 vcpu->arch.entry_ic = mfspr(SPRN_IC); 178 svcpu->in_use = true; 179 } 180 181 /* Copy data touched by real-mode code from shadow vcpu back to vcpu */ 182 void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu, 183 struct kvmppc_book3s_shadow_vcpu *svcpu) 184 { 185 /* 186 * vcpu_put would just call us again because in_use hasn't 187 * been updated yet. 188 */ 189 preempt_disable(); 190 191 /* 192 * Maybe we were already preempted and synced the svcpu from 193 * our preempt notifiers. Don't bother touching this svcpu then. 194 */ 195 if (!svcpu->in_use) 196 goto out; 197 198 vcpu->arch.gpr[0] = svcpu->gpr[0]; 199 vcpu->arch.gpr[1] = svcpu->gpr[1]; 200 vcpu->arch.gpr[2] = svcpu->gpr[2]; 201 vcpu->arch.gpr[3] = svcpu->gpr[3]; 202 vcpu->arch.gpr[4] = svcpu->gpr[4]; 203 vcpu->arch.gpr[5] = svcpu->gpr[5]; 204 vcpu->arch.gpr[6] = svcpu->gpr[6]; 205 vcpu->arch.gpr[7] = svcpu->gpr[7]; 206 vcpu->arch.gpr[8] = svcpu->gpr[8]; 207 vcpu->arch.gpr[9] = svcpu->gpr[9]; 208 vcpu->arch.gpr[10] = svcpu->gpr[10]; 209 vcpu->arch.gpr[11] = svcpu->gpr[11]; 210 vcpu->arch.gpr[12] = svcpu->gpr[12]; 211 vcpu->arch.gpr[13] = svcpu->gpr[13]; 212 vcpu->arch.cr = svcpu->cr; 213 vcpu->arch.xer = svcpu->xer; 214 vcpu->arch.ctr = svcpu->ctr; 215 vcpu->arch.lr = svcpu->lr; 216 vcpu->arch.pc = svcpu->pc; 217 vcpu->arch.shadow_srr1 = svcpu->shadow_srr1; 218 vcpu->arch.fault_dar = svcpu->fault_dar; 219 vcpu->arch.fault_dsisr = svcpu->fault_dsisr; 220 vcpu->arch.last_inst = svcpu->last_inst; 221 #ifdef CONFIG_PPC_BOOK3S_64 222 vcpu->arch.shadow_fscr = svcpu->shadow_fscr; 223 #endif 224 /* 225 * Update purr and spurr using time base on exit. 226 */ 227 vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb; 228 vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb; 229 vcpu->arch.vtb += get_vtb() - vcpu->arch.entry_vtb; 230 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 231 vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic; 232 svcpu->in_use = false; 233 234 out: 235 preempt_enable(); 236 } 237 238 static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu) 239 { 240 int r = 1; /* Indicate we want to get back into the guest */ 241 242 /* We misuse TLB_FLUSH to indicate that we want to clear 243 all shadow cache entries */ 244 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 245 kvmppc_mmu_pte_flush(vcpu, 0, 0); 246 247 return r; 248 } 249 250 /************* MMU Notifiers *************/ 251 static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start, 252 unsigned long end) 253 { 254 long i; 255 struct kvm_vcpu *vcpu; 256 struct kvm_memslots *slots; 257 struct kvm_memory_slot *memslot; 258 259 slots = kvm_memslots(kvm); 260 kvm_for_each_memslot(memslot, slots) { 261 unsigned long hva_start, hva_end; 262 gfn_t gfn, gfn_end; 263 264 hva_start = max(start, memslot->userspace_addr); 265 hva_end = min(end, memslot->userspace_addr + 266 (memslot->npages << PAGE_SHIFT)); 267 if (hva_start >= hva_end) 268 continue; 269 /* 270 * {gfn(page) | page intersects with [hva_start, hva_end)} = 271 * {gfn, gfn+1, ..., gfn_end-1}. 272 */ 273 gfn = hva_to_gfn_memslot(hva_start, memslot); 274 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); 275 kvm_for_each_vcpu(i, vcpu, kvm) 276 kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT, 277 gfn_end << PAGE_SHIFT); 278 } 279 } 280 281 static int kvm_unmap_hva_pr(struct kvm *kvm, unsigned long hva) 282 { 283 trace_kvm_unmap_hva(hva); 284 285 do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE); 286 287 return 0; 288 } 289 290 static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start, 291 unsigned long end) 292 { 293 do_kvm_unmap_hva(kvm, start, end); 294 295 return 0; 296 } 297 298 static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start, 299 unsigned long end) 300 { 301 /* XXX could be more clever ;) */ 302 return 0; 303 } 304 305 static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva) 306 { 307 /* XXX could be more clever ;) */ 308 return 0; 309 } 310 311 static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte) 312 { 313 /* The page will get remapped properly on its next fault */ 314 do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE); 315 } 316 317 /*****************************************/ 318 319 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) 320 { 321 ulong guest_msr = kvmppc_get_msr(vcpu); 322 ulong smsr = guest_msr; 323 324 /* Guest MSR values */ 325 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE; 326 /* Process MSR values */ 327 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; 328 /* External providers the guest reserved */ 329 smsr |= (guest_msr & vcpu->arch.guest_owned_ext); 330 /* 64-bit Process MSR values */ 331 #ifdef CONFIG_PPC_BOOK3S_64 332 smsr |= MSR_ISF | MSR_HV; 333 #endif 334 vcpu->arch.shadow_msr = smsr; 335 } 336 337 static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr) 338 { 339 ulong old_msr = kvmppc_get_msr(vcpu); 340 341 #ifdef EXIT_DEBUG 342 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); 343 #endif 344 345 msr &= to_book3s(vcpu)->msr_mask; 346 kvmppc_set_msr_fast(vcpu, msr); 347 kvmppc_recalc_shadow_msr(vcpu); 348 349 if (msr & MSR_POW) { 350 if (!vcpu->arch.pending_exceptions) { 351 kvm_vcpu_block(vcpu); 352 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 353 vcpu->stat.halt_wakeup++; 354 355 /* Unset POW bit after we woke up */ 356 msr &= ~MSR_POW; 357 kvmppc_set_msr_fast(vcpu, msr); 358 } 359 } 360 361 if (kvmppc_is_split_real(vcpu)) 362 kvmppc_fixup_split_real(vcpu); 363 else 364 kvmppc_unfixup_split_real(vcpu); 365 366 if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) != 367 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { 368 kvmppc_mmu_flush_segments(vcpu); 369 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 370 371 /* Preload magic page segment when in kernel mode */ 372 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) { 373 struct kvm_vcpu_arch *a = &vcpu->arch; 374 375 if (msr & MSR_DR) 376 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea); 377 else 378 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa); 379 } 380 } 381 382 /* 383 * When switching from 32 to 64-bit, we may have a stale 32-bit 384 * magic page around, we need to flush it. Typically 32-bit magic 385 * page will be instanciated when calling into RTAS. Note: We 386 * assume that such transition only happens while in kernel mode, 387 * ie, we never transition from user 32-bit to kernel 64-bit with 388 * a 32-bit magic page around. 389 */ 390 if (vcpu->arch.magic_page_pa && 391 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) { 392 /* going from RTAS to normal kernel code */ 393 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa, 394 ~0xFFFUL); 395 } 396 397 /* Preload FPU if it's enabled */ 398 if (kvmppc_get_msr(vcpu) & MSR_FP) 399 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); 400 } 401 402 void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr) 403 { 404 u32 host_pvr; 405 406 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; 407 vcpu->arch.pvr = pvr; 408 #ifdef CONFIG_PPC_BOOK3S_64 409 if ((pvr >= 0x330000) && (pvr < 0x70330000)) { 410 kvmppc_mmu_book3s_64_init(vcpu); 411 if (!to_book3s(vcpu)->hior_explicit) 412 to_book3s(vcpu)->hior = 0xfff00000; 413 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; 414 vcpu->arch.cpu_type = KVM_CPU_3S_64; 415 } else 416 #endif 417 { 418 kvmppc_mmu_book3s_32_init(vcpu); 419 if (!to_book3s(vcpu)->hior_explicit) 420 to_book3s(vcpu)->hior = 0; 421 to_book3s(vcpu)->msr_mask = 0xffffffffULL; 422 vcpu->arch.cpu_type = KVM_CPU_3S_32; 423 } 424 425 kvmppc_sanity_check(vcpu); 426 427 /* If we are in hypervisor level on 970, we can tell the CPU to 428 * treat DCBZ as 32 bytes store */ 429 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32; 430 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) && 431 !strcmp(cur_cpu_spec->platform, "ppc970")) 432 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 433 434 /* Cell performs badly if MSR_FEx are set. So let's hope nobody 435 really needs them in a VM on Cell and force disable them. */ 436 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) 437 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); 438 439 /* 440 * If they're asking for POWER6 or later, set the flag 441 * indicating that we can do multiple large page sizes 442 * and 1TB segments. 443 * Also set the flag that indicates that tlbie has the large 444 * page bit in the RB operand instead of the instruction. 445 */ 446 switch (PVR_VER(pvr)) { 447 case PVR_POWER6: 448 case PVR_POWER7: 449 case PVR_POWER7p: 450 case PVR_POWER8: 451 vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE | 452 BOOK3S_HFLAG_NEW_TLBIE; 453 break; 454 } 455 456 #ifdef CONFIG_PPC_BOOK3S_32 457 /* 32 bit Book3S always has 32 byte dcbz */ 458 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 459 #endif 460 461 /* On some CPUs we can execute paired single operations natively */ 462 asm ( "mfpvr %0" : "=r"(host_pvr)); 463 switch (host_pvr) { 464 case 0x00080200: /* lonestar 2.0 */ 465 case 0x00088202: /* lonestar 2.2 */ 466 case 0x70000100: /* gekko 1.0 */ 467 case 0x00080100: /* gekko 2.0 */ 468 case 0x00083203: /* gekko 2.3a */ 469 case 0x00083213: /* gekko 2.3b */ 470 case 0x00083204: /* gekko 2.4 */ 471 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ 472 case 0x00087200: /* broadway */ 473 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; 474 /* Enable HID2.PSE - in case we need it later */ 475 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); 476 } 477 } 478 479 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To 480 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to 481 * emulate 32 bytes dcbz length. 482 * 483 * The Book3s_64 inventors also realized this case and implemented a special bit 484 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it. 485 * 486 * My approach here is to patch the dcbz instruction on executing pages. 487 */ 488 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) 489 { 490 struct page *hpage; 491 u64 hpage_offset; 492 u32 *page; 493 int i; 494 495 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); 496 if (is_error_page(hpage)) 497 return; 498 499 hpage_offset = pte->raddr & ~PAGE_MASK; 500 hpage_offset &= ~0xFFFULL; 501 hpage_offset /= 4; 502 503 get_page(hpage); 504 page = kmap_atomic(hpage); 505 506 /* patch dcbz into reserved instruction, so we trap */ 507 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) 508 if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ) 509 page[i] &= cpu_to_be32(0xfffffff7); 510 511 kunmap_atomic(page); 512 put_page(hpage); 513 } 514 515 static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa) 516 { 517 ulong mp_pa = vcpu->arch.magic_page_pa; 518 519 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 520 mp_pa = (uint32_t)mp_pa; 521 522 gpa &= ~0xFFFULL; 523 if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) { 524 return true; 525 } 526 527 return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT); 528 } 529 530 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, 531 ulong eaddr, int vec) 532 { 533 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE); 534 bool iswrite = false; 535 int r = RESUME_GUEST; 536 int relocated; 537 int page_found = 0; 538 struct kvmppc_pte pte; 539 bool is_mmio = false; 540 bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false; 541 bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false; 542 u64 vsid; 543 544 relocated = data ? dr : ir; 545 if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE)) 546 iswrite = true; 547 548 /* Resolve real address if translation turned on */ 549 if (relocated) { 550 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite); 551 } else { 552 pte.may_execute = true; 553 pte.may_read = true; 554 pte.may_write = true; 555 pte.raddr = eaddr & KVM_PAM; 556 pte.eaddr = eaddr; 557 pte.vpage = eaddr >> 12; 558 pte.page_size = MMU_PAGE_64K; 559 } 560 561 switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) { 562 case 0: 563 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); 564 break; 565 case MSR_DR: 566 if (!data && 567 (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 568 ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 569 pte.raddr &= ~SPLIT_HACK_MASK; 570 /* fall through */ 571 case MSR_IR: 572 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); 573 574 if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR) 575 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); 576 else 577 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); 578 pte.vpage |= vsid; 579 580 if (vsid == -1) 581 page_found = -EINVAL; 582 break; 583 } 584 585 if (vcpu->arch.mmu.is_dcbz32(vcpu) && 586 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { 587 /* 588 * If we do the dcbz hack, we have to NX on every execution, 589 * so we can patch the executing code. This renders our guest 590 * NX-less. 591 */ 592 pte.may_execute = !data; 593 } 594 595 if (page_found == -ENOENT) { 596 /* Page not found in guest PTE entries */ 597 u64 ssrr1 = vcpu->arch.shadow_srr1; 598 u64 msr = kvmppc_get_msr(vcpu); 599 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); 600 kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr); 601 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL)); 602 kvmppc_book3s_queue_irqprio(vcpu, vec); 603 } else if (page_found == -EPERM) { 604 /* Storage protection */ 605 u32 dsisr = vcpu->arch.fault_dsisr; 606 u64 ssrr1 = vcpu->arch.shadow_srr1; 607 u64 msr = kvmppc_get_msr(vcpu); 608 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); 609 dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT; 610 kvmppc_set_dsisr(vcpu, dsisr); 611 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL)); 612 kvmppc_book3s_queue_irqprio(vcpu, vec); 613 } else if (page_found == -EINVAL) { 614 /* Page not found in guest SLB */ 615 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); 616 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); 617 } else if (!is_mmio && 618 kvmppc_visible_gpa(vcpu, pte.raddr)) { 619 if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) { 620 /* 621 * There is already a host HPTE there, presumably 622 * a read-only one for a page the guest thinks 623 * is writable, so get rid of it first. 624 */ 625 kvmppc_mmu_unmap_page(vcpu, &pte); 626 } 627 /* The guest's PTE is not mapped yet. Map on the host */ 628 kvmppc_mmu_map_page(vcpu, &pte, iswrite); 629 if (data) 630 vcpu->stat.sp_storage++; 631 else if (vcpu->arch.mmu.is_dcbz32(vcpu) && 632 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) 633 kvmppc_patch_dcbz(vcpu, &pte); 634 } else { 635 /* MMIO */ 636 vcpu->stat.mmio_exits++; 637 vcpu->arch.paddr_accessed = pte.raddr; 638 vcpu->arch.vaddr_accessed = pte.eaddr; 639 r = kvmppc_emulate_mmio(run, vcpu); 640 if ( r == RESUME_HOST_NV ) 641 r = RESUME_HOST; 642 } 643 644 return r; 645 } 646 647 /* Give up external provider (FPU, Altivec, VSX) */ 648 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) 649 { 650 struct thread_struct *t = ¤t->thread; 651 652 /* 653 * VSX instructions can access FP and vector registers, so if 654 * we are giving up VSX, make sure we give up FP and VMX as well. 655 */ 656 if (msr & MSR_VSX) 657 msr |= MSR_FP | MSR_VEC; 658 659 msr &= vcpu->arch.guest_owned_ext; 660 if (!msr) 661 return; 662 663 #ifdef DEBUG_EXT 664 printk(KERN_INFO "Giving up ext 0x%lx\n", msr); 665 #endif 666 667 if (msr & MSR_FP) { 668 /* 669 * Note that on CPUs with VSX, giveup_fpu stores 670 * both the traditional FP registers and the added VSX 671 * registers into thread.fp_state.fpr[]. 672 */ 673 if (t->regs->msr & MSR_FP) 674 giveup_fpu(current); 675 t->fp_save_area = NULL; 676 } 677 678 #ifdef CONFIG_ALTIVEC 679 if (msr & MSR_VEC) { 680 if (current->thread.regs->msr & MSR_VEC) 681 giveup_altivec(current); 682 t->vr_save_area = NULL; 683 } 684 #endif 685 686 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); 687 kvmppc_recalc_shadow_msr(vcpu); 688 } 689 690 /* Give up facility (TAR / EBB / DSCR) */ 691 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac) 692 { 693 #ifdef CONFIG_PPC_BOOK3S_64 694 if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) { 695 /* Facility not available to the guest, ignore giveup request*/ 696 return; 697 } 698 699 switch (fac) { 700 case FSCR_TAR_LG: 701 vcpu->arch.tar = mfspr(SPRN_TAR); 702 mtspr(SPRN_TAR, current->thread.tar); 703 vcpu->arch.shadow_fscr &= ~FSCR_TAR; 704 break; 705 } 706 #endif 707 } 708 709 /* Handle external providers (FPU, Altivec, VSX) */ 710 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, 711 ulong msr) 712 { 713 struct thread_struct *t = ¤t->thread; 714 715 /* When we have paired singles, we emulate in software */ 716 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) 717 return RESUME_GUEST; 718 719 if (!(kvmppc_get_msr(vcpu) & msr)) { 720 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 721 return RESUME_GUEST; 722 } 723 724 if (msr == MSR_VSX) { 725 /* No VSX? Give an illegal instruction interrupt */ 726 #ifdef CONFIG_VSX 727 if (!cpu_has_feature(CPU_FTR_VSX)) 728 #endif 729 { 730 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 731 return RESUME_GUEST; 732 } 733 734 /* 735 * We have to load up all the FP and VMX registers before 736 * we can let the guest use VSX instructions. 737 */ 738 msr = MSR_FP | MSR_VEC | MSR_VSX; 739 } 740 741 /* See if we already own all the ext(s) needed */ 742 msr &= ~vcpu->arch.guest_owned_ext; 743 if (!msr) 744 return RESUME_GUEST; 745 746 #ifdef DEBUG_EXT 747 printk(KERN_INFO "Loading up ext 0x%lx\n", msr); 748 #endif 749 750 if (msr & MSR_FP) { 751 preempt_disable(); 752 enable_kernel_fp(); 753 load_fp_state(&vcpu->arch.fp); 754 disable_kernel_fp(); 755 t->fp_save_area = &vcpu->arch.fp; 756 preempt_enable(); 757 } 758 759 if (msr & MSR_VEC) { 760 #ifdef CONFIG_ALTIVEC 761 preempt_disable(); 762 enable_kernel_altivec(); 763 load_vr_state(&vcpu->arch.vr); 764 disable_kernel_altivec(); 765 t->vr_save_area = &vcpu->arch.vr; 766 preempt_enable(); 767 #endif 768 } 769 770 t->regs->msr |= msr; 771 vcpu->arch.guest_owned_ext |= msr; 772 kvmppc_recalc_shadow_msr(vcpu); 773 774 return RESUME_GUEST; 775 } 776 777 /* 778 * Kernel code using FP or VMX could have flushed guest state to 779 * the thread_struct; if so, get it back now. 780 */ 781 static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu) 782 { 783 unsigned long lost_ext; 784 785 lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr; 786 if (!lost_ext) 787 return; 788 789 if (lost_ext & MSR_FP) { 790 preempt_disable(); 791 enable_kernel_fp(); 792 load_fp_state(&vcpu->arch.fp); 793 disable_kernel_fp(); 794 preempt_enable(); 795 } 796 #ifdef CONFIG_ALTIVEC 797 if (lost_ext & MSR_VEC) { 798 preempt_disable(); 799 enable_kernel_altivec(); 800 load_vr_state(&vcpu->arch.vr); 801 disable_kernel_altivec(); 802 preempt_enable(); 803 } 804 #endif 805 current->thread.regs->msr |= lost_ext; 806 } 807 808 #ifdef CONFIG_PPC_BOOK3S_64 809 810 static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac) 811 { 812 /* Inject the Interrupt Cause field and trigger a guest interrupt */ 813 vcpu->arch.fscr &= ~(0xffULL << 56); 814 vcpu->arch.fscr |= (fac << 56); 815 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL); 816 } 817 818 static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac) 819 { 820 enum emulation_result er = EMULATE_FAIL; 821 822 if (!(kvmppc_get_msr(vcpu) & MSR_PR)) 823 er = kvmppc_emulate_instruction(vcpu->run, vcpu); 824 825 if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) { 826 /* Couldn't emulate, trigger interrupt in guest */ 827 kvmppc_trigger_fac_interrupt(vcpu, fac); 828 } 829 } 830 831 /* Enable facilities (TAR, EBB, DSCR) for the guest */ 832 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac) 833 { 834 bool guest_fac_enabled; 835 BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S)); 836 837 /* 838 * Not every facility is enabled by FSCR bits, check whether the 839 * guest has this facility enabled at all. 840 */ 841 switch (fac) { 842 case FSCR_TAR_LG: 843 case FSCR_EBB_LG: 844 guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac)); 845 break; 846 case FSCR_TM_LG: 847 guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM; 848 break; 849 default: 850 guest_fac_enabled = false; 851 break; 852 } 853 854 if (!guest_fac_enabled) { 855 /* Facility not enabled by the guest */ 856 kvmppc_trigger_fac_interrupt(vcpu, fac); 857 return RESUME_GUEST; 858 } 859 860 switch (fac) { 861 case FSCR_TAR_LG: 862 /* TAR switching isn't lazy in Linux yet */ 863 current->thread.tar = mfspr(SPRN_TAR); 864 mtspr(SPRN_TAR, vcpu->arch.tar); 865 vcpu->arch.shadow_fscr |= FSCR_TAR; 866 break; 867 default: 868 kvmppc_emulate_fac(vcpu, fac); 869 break; 870 } 871 872 return RESUME_GUEST; 873 } 874 875 void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr) 876 { 877 if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) { 878 /* TAR got dropped, drop it in shadow too */ 879 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG); 880 } 881 vcpu->arch.fscr = fscr; 882 } 883 #endif 884 885 static void kvmppc_setup_debug(struct kvm_vcpu *vcpu) 886 { 887 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { 888 u64 msr = kvmppc_get_msr(vcpu); 889 890 kvmppc_set_msr(vcpu, msr | MSR_SE); 891 } 892 } 893 894 static void kvmppc_clear_debug(struct kvm_vcpu *vcpu) 895 { 896 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { 897 u64 msr = kvmppc_get_msr(vcpu); 898 899 kvmppc_set_msr(vcpu, msr & ~MSR_SE); 900 } 901 } 902 903 int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu, 904 unsigned int exit_nr) 905 { 906 int r = RESUME_HOST; 907 int s; 908 909 vcpu->stat.sum_exits++; 910 911 run->exit_reason = KVM_EXIT_UNKNOWN; 912 run->ready_for_interrupt_injection = 1; 913 914 /* We get here with MSR.EE=1 */ 915 916 trace_kvm_exit(exit_nr, vcpu); 917 kvm_guest_exit(); 918 919 switch (exit_nr) { 920 case BOOK3S_INTERRUPT_INST_STORAGE: 921 { 922 ulong shadow_srr1 = vcpu->arch.shadow_srr1; 923 vcpu->stat.pf_instruc++; 924 925 if (kvmppc_is_split_real(vcpu)) 926 kvmppc_fixup_split_real(vcpu); 927 928 #ifdef CONFIG_PPC_BOOK3S_32 929 /* We set segments as unused segments when invalidating them. So 930 * treat the respective fault as segment fault. */ 931 { 932 struct kvmppc_book3s_shadow_vcpu *svcpu; 933 u32 sr; 934 935 svcpu = svcpu_get(vcpu); 936 sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT]; 937 svcpu_put(svcpu); 938 if (sr == SR_INVALID) { 939 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 940 r = RESUME_GUEST; 941 break; 942 } 943 } 944 #endif 945 946 /* only care about PTEG not found errors, but leave NX alone */ 947 if (shadow_srr1 & 0x40000000) { 948 int idx = srcu_read_lock(&vcpu->kvm->srcu); 949 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); 950 srcu_read_unlock(&vcpu->kvm->srcu, idx); 951 vcpu->stat.sp_instruc++; 952 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && 953 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { 954 /* 955 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page, 956 * so we can't use the NX bit inside the guest. Let's cross our fingers, 957 * that no guest that needs the dcbz hack does NX. 958 */ 959 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); 960 r = RESUME_GUEST; 961 } else { 962 u64 msr = kvmppc_get_msr(vcpu); 963 msr |= shadow_srr1 & 0x58000000; 964 kvmppc_set_msr_fast(vcpu, msr); 965 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 966 r = RESUME_GUEST; 967 } 968 break; 969 } 970 case BOOK3S_INTERRUPT_DATA_STORAGE: 971 { 972 ulong dar = kvmppc_get_fault_dar(vcpu); 973 u32 fault_dsisr = vcpu->arch.fault_dsisr; 974 vcpu->stat.pf_storage++; 975 976 #ifdef CONFIG_PPC_BOOK3S_32 977 /* We set segments as unused segments when invalidating them. So 978 * treat the respective fault as segment fault. */ 979 { 980 struct kvmppc_book3s_shadow_vcpu *svcpu; 981 u32 sr; 982 983 svcpu = svcpu_get(vcpu); 984 sr = svcpu->sr[dar >> SID_SHIFT]; 985 svcpu_put(svcpu); 986 if (sr == SR_INVALID) { 987 kvmppc_mmu_map_segment(vcpu, dar); 988 r = RESUME_GUEST; 989 break; 990 } 991 } 992 #endif 993 994 /* 995 * We need to handle missing shadow PTEs, and 996 * protection faults due to us mapping a page read-only 997 * when the guest thinks it is writable. 998 */ 999 if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) { 1000 int idx = srcu_read_lock(&vcpu->kvm->srcu); 1001 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); 1002 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1003 } else { 1004 kvmppc_set_dar(vcpu, dar); 1005 kvmppc_set_dsisr(vcpu, fault_dsisr); 1006 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 1007 r = RESUME_GUEST; 1008 } 1009 break; 1010 } 1011 case BOOK3S_INTERRUPT_DATA_SEGMENT: 1012 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { 1013 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); 1014 kvmppc_book3s_queue_irqprio(vcpu, 1015 BOOK3S_INTERRUPT_DATA_SEGMENT); 1016 } 1017 r = RESUME_GUEST; 1018 break; 1019 case BOOK3S_INTERRUPT_INST_SEGMENT: 1020 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { 1021 kvmppc_book3s_queue_irqprio(vcpu, 1022 BOOK3S_INTERRUPT_INST_SEGMENT); 1023 } 1024 r = RESUME_GUEST; 1025 break; 1026 /* We're good on these - the host merely wanted to get our attention */ 1027 case BOOK3S_INTERRUPT_DECREMENTER: 1028 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1029 case BOOK3S_INTERRUPT_DOORBELL: 1030 case BOOK3S_INTERRUPT_H_DOORBELL: 1031 vcpu->stat.dec_exits++; 1032 r = RESUME_GUEST; 1033 break; 1034 case BOOK3S_INTERRUPT_EXTERNAL: 1035 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL: 1036 case BOOK3S_INTERRUPT_EXTERNAL_HV: 1037 vcpu->stat.ext_intr_exits++; 1038 r = RESUME_GUEST; 1039 break; 1040 case BOOK3S_INTERRUPT_PERFMON: 1041 r = RESUME_GUEST; 1042 break; 1043 case BOOK3S_INTERRUPT_PROGRAM: 1044 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1045 { 1046 enum emulation_result er; 1047 ulong flags; 1048 u32 last_inst; 1049 int emul; 1050 1051 program_interrupt: 1052 flags = vcpu->arch.shadow_srr1 & 0x1f0000ull; 1053 1054 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1055 if (emul != EMULATE_DONE) { 1056 r = RESUME_GUEST; 1057 break; 1058 } 1059 1060 if (kvmppc_get_msr(vcpu) & MSR_PR) { 1061 #ifdef EXIT_DEBUG 1062 pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n", 1063 kvmppc_get_pc(vcpu), last_inst); 1064 #endif 1065 if ((last_inst & 0xff0007ff) != 1066 (INS_DCBZ & 0xfffffff7)) { 1067 kvmppc_core_queue_program(vcpu, flags); 1068 r = RESUME_GUEST; 1069 break; 1070 } 1071 } 1072 1073 vcpu->stat.emulated_inst_exits++; 1074 er = kvmppc_emulate_instruction(run, vcpu); 1075 switch (er) { 1076 case EMULATE_DONE: 1077 r = RESUME_GUEST_NV; 1078 break; 1079 case EMULATE_AGAIN: 1080 r = RESUME_GUEST; 1081 break; 1082 case EMULATE_FAIL: 1083 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 1084 __func__, kvmppc_get_pc(vcpu), last_inst); 1085 kvmppc_core_queue_program(vcpu, flags); 1086 r = RESUME_GUEST; 1087 break; 1088 case EMULATE_DO_MMIO: 1089 run->exit_reason = KVM_EXIT_MMIO; 1090 r = RESUME_HOST_NV; 1091 break; 1092 case EMULATE_EXIT_USER: 1093 r = RESUME_HOST_NV; 1094 break; 1095 default: 1096 BUG(); 1097 } 1098 break; 1099 } 1100 case BOOK3S_INTERRUPT_SYSCALL: 1101 { 1102 u32 last_sc; 1103 int emul; 1104 1105 /* Get last sc for papr */ 1106 if (vcpu->arch.papr_enabled) { 1107 /* The sc instuction points SRR0 to the next inst */ 1108 emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc); 1109 if (emul != EMULATE_DONE) { 1110 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4); 1111 r = RESUME_GUEST; 1112 break; 1113 } 1114 } 1115 1116 if (vcpu->arch.papr_enabled && 1117 (last_sc == 0x44000022) && 1118 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 1119 /* SC 1 papr hypercalls */ 1120 ulong cmd = kvmppc_get_gpr(vcpu, 3); 1121 int i; 1122 1123 #ifdef CONFIG_PPC_BOOK3S_64 1124 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { 1125 r = RESUME_GUEST; 1126 break; 1127 } 1128 #endif 1129 1130 run->papr_hcall.nr = cmd; 1131 for (i = 0; i < 9; ++i) { 1132 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i); 1133 run->papr_hcall.args[i] = gpr; 1134 } 1135 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1136 vcpu->arch.hcall_needed = 1; 1137 r = RESUME_HOST; 1138 } else if (vcpu->arch.osi_enabled && 1139 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && 1140 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { 1141 /* MOL hypercalls */ 1142 u64 *gprs = run->osi.gprs; 1143 int i; 1144 1145 run->exit_reason = KVM_EXIT_OSI; 1146 for (i = 0; i < 32; i++) 1147 gprs[i] = kvmppc_get_gpr(vcpu, i); 1148 vcpu->arch.osi_needed = 1; 1149 r = RESUME_HOST_NV; 1150 } else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && 1151 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1152 /* KVM PV hypercalls */ 1153 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1154 r = RESUME_GUEST; 1155 } else { 1156 /* Guest syscalls */ 1157 vcpu->stat.syscall_exits++; 1158 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 1159 r = RESUME_GUEST; 1160 } 1161 break; 1162 } 1163 case BOOK3S_INTERRUPT_FP_UNAVAIL: 1164 case BOOK3S_INTERRUPT_ALTIVEC: 1165 case BOOK3S_INTERRUPT_VSX: 1166 { 1167 int ext_msr = 0; 1168 int emul; 1169 u32 last_inst; 1170 1171 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) { 1172 /* Do paired single instruction emulation */ 1173 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, 1174 &last_inst); 1175 if (emul == EMULATE_DONE) 1176 goto program_interrupt; 1177 else 1178 r = RESUME_GUEST; 1179 1180 break; 1181 } 1182 1183 /* Enable external provider */ 1184 switch (exit_nr) { 1185 case BOOK3S_INTERRUPT_FP_UNAVAIL: 1186 ext_msr = MSR_FP; 1187 break; 1188 1189 case BOOK3S_INTERRUPT_ALTIVEC: 1190 ext_msr = MSR_VEC; 1191 break; 1192 1193 case BOOK3S_INTERRUPT_VSX: 1194 ext_msr = MSR_VSX; 1195 break; 1196 } 1197 1198 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); 1199 break; 1200 } 1201 case BOOK3S_INTERRUPT_ALIGNMENT: 1202 { 1203 u32 last_inst; 1204 int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1205 1206 if (emul == EMULATE_DONE) { 1207 u32 dsisr; 1208 u64 dar; 1209 1210 dsisr = kvmppc_alignment_dsisr(vcpu, last_inst); 1211 dar = kvmppc_alignment_dar(vcpu, last_inst); 1212 1213 kvmppc_set_dsisr(vcpu, dsisr); 1214 kvmppc_set_dar(vcpu, dar); 1215 1216 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 1217 } 1218 r = RESUME_GUEST; 1219 break; 1220 } 1221 #ifdef CONFIG_PPC_BOOK3S_64 1222 case BOOK3S_INTERRUPT_FAC_UNAVAIL: 1223 kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56); 1224 r = RESUME_GUEST; 1225 break; 1226 #endif 1227 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1228 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 1229 r = RESUME_GUEST; 1230 break; 1231 case BOOK3S_INTERRUPT_TRACE: 1232 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) { 1233 run->exit_reason = KVM_EXIT_DEBUG; 1234 r = RESUME_HOST; 1235 } else { 1236 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 1237 r = RESUME_GUEST; 1238 } 1239 break; 1240 default: 1241 { 1242 ulong shadow_srr1 = vcpu->arch.shadow_srr1; 1243 /* Ugh - bork here! What did we get? */ 1244 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", 1245 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1); 1246 r = RESUME_HOST; 1247 BUG(); 1248 break; 1249 } 1250 } 1251 1252 if (!(r & RESUME_HOST)) { 1253 /* To avoid clobbering exit_reason, only check for signals if 1254 * we aren't already exiting to userspace for some other 1255 * reason. */ 1256 1257 /* 1258 * Interrupts could be timers for the guest which we have to 1259 * inject again, so let's postpone them until we're in the guest 1260 * and if we really did time things so badly, then we just exit 1261 * again due to a host external interrupt. 1262 */ 1263 s = kvmppc_prepare_to_enter(vcpu); 1264 if (s <= 0) 1265 r = s; 1266 else { 1267 /* interrupts now hard-disabled */ 1268 kvmppc_fix_ee_before_entry(); 1269 } 1270 1271 kvmppc_handle_lost_ext(vcpu); 1272 } 1273 1274 trace_kvm_book3s_reenter(r, vcpu); 1275 1276 return r; 1277 } 1278 1279 static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu, 1280 struct kvm_sregs *sregs) 1281 { 1282 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); 1283 int i; 1284 1285 sregs->pvr = vcpu->arch.pvr; 1286 1287 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; 1288 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { 1289 for (i = 0; i < 64; i++) { 1290 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i; 1291 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1292 } 1293 } else { 1294 for (i = 0; i < 16; i++) 1295 sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i); 1296 1297 for (i = 0; i < 8; i++) { 1298 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw; 1299 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; 1300 } 1301 } 1302 1303 return 0; 1304 } 1305 1306 static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu, 1307 struct kvm_sregs *sregs) 1308 { 1309 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); 1310 int i; 1311 1312 kvmppc_set_pvr_pr(vcpu, sregs->pvr); 1313 1314 vcpu3s->sdr1 = sregs->u.s.sdr1; 1315 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { 1316 for (i = 0; i < 64; i++) { 1317 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv, 1318 sregs->u.s.ppc64.slb[i].slbe); 1319 } 1320 } else { 1321 for (i = 0; i < 16; i++) { 1322 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]); 1323 } 1324 for (i = 0; i < 8; i++) { 1325 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false, 1326 (u32)sregs->u.s.ppc32.ibat[i]); 1327 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true, 1328 (u32)(sregs->u.s.ppc32.ibat[i] >> 32)); 1329 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false, 1330 (u32)sregs->u.s.ppc32.dbat[i]); 1331 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true, 1332 (u32)(sregs->u.s.ppc32.dbat[i] >> 32)); 1333 } 1334 } 1335 1336 /* Flush the MMU after messing with the segments */ 1337 kvmppc_mmu_pte_flush(vcpu, 0, 0); 1338 1339 return 0; 1340 } 1341 1342 static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id, 1343 union kvmppc_one_reg *val) 1344 { 1345 int r = 0; 1346 1347 switch (id) { 1348 case KVM_REG_PPC_DEBUG_INST: 1349 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1350 break; 1351 case KVM_REG_PPC_HIOR: 1352 *val = get_reg_val(id, to_book3s(vcpu)->hior); 1353 break; 1354 case KVM_REG_PPC_LPCR: 1355 case KVM_REG_PPC_LPCR_64: 1356 /* 1357 * We are only interested in the LPCR_ILE bit 1358 */ 1359 if (vcpu->arch.intr_msr & MSR_LE) 1360 *val = get_reg_val(id, LPCR_ILE); 1361 else 1362 *val = get_reg_val(id, 0); 1363 break; 1364 default: 1365 r = -EINVAL; 1366 break; 1367 } 1368 1369 return r; 1370 } 1371 1372 static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr) 1373 { 1374 if (new_lpcr & LPCR_ILE) 1375 vcpu->arch.intr_msr |= MSR_LE; 1376 else 1377 vcpu->arch.intr_msr &= ~MSR_LE; 1378 } 1379 1380 static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id, 1381 union kvmppc_one_reg *val) 1382 { 1383 int r = 0; 1384 1385 switch (id) { 1386 case KVM_REG_PPC_HIOR: 1387 to_book3s(vcpu)->hior = set_reg_val(id, *val); 1388 to_book3s(vcpu)->hior_explicit = true; 1389 break; 1390 case KVM_REG_PPC_LPCR: 1391 case KVM_REG_PPC_LPCR_64: 1392 kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val)); 1393 break; 1394 default: 1395 r = -EINVAL; 1396 break; 1397 } 1398 1399 return r; 1400 } 1401 1402 static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm, 1403 unsigned int id) 1404 { 1405 struct kvmppc_vcpu_book3s *vcpu_book3s; 1406 struct kvm_vcpu *vcpu; 1407 int err = -ENOMEM; 1408 unsigned long p; 1409 1410 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); 1411 if (!vcpu) 1412 goto out; 1413 1414 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s)); 1415 if (!vcpu_book3s) 1416 goto free_vcpu; 1417 vcpu->arch.book3s = vcpu_book3s; 1418 1419 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1420 vcpu->arch.shadow_vcpu = 1421 kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL); 1422 if (!vcpu->arch.shadow_vcpu) 1423 goto free_vcpu3s; 1424 #endif 1425 1426 err = kvm_vcpu_init(vcpu, kvm, id); 1427 if (err) 1428 goto free_shadow_vcpu; 1429 1430 err = -ENOMEM; 1431 p = __get_free_page(GFP_KERNEL|__GFP_ZERO); 1432 if (!p) 1433 goto uninit_vcpu; 1434 vcpu->arch.shared = (void *)p; 1435 #ifdef CONFIG_PPC_BOOK3S_64 1436 /* Always start the shared struct in native endian mode */ 1437 #ifdef __BIG_ENDIAN__ 1438 vcpu->arch.shared_big_endian = true; 1439 #else 1440 vcpu->arch.shared_big_endian = false; 1441 #endif 1442 1443 /* 1444 * Default to the same as the host if we're on sufficiently 1445 * recent machine that we have 1TB segments; 1446 * otherwise default to PPC970FX. 1447 */ 1448 vcpu->arch.pvr = 0x3C0301; 1449 if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1450 vcpu->arch.pvr = mfspr(SPRN_PVR); 1451 vcpu->arch.intr_msr = MSR_SF; 1452 #else 1453 /* default to book3s_32 (750) */ 1454 vcpu->arch.pvr = 0x84202; 1455 #endif 1456 kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr); 1457 vcpu->arch.slb_nr = 64; 1458 1459 vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE; 1460 1461 err = kvmppc_mmu_init(vcpu); 1462 if (err < 0) 1463 goto uninit_vcpu; 1464 1465 return vcpu; 1466 1467 uninit_vcpu: 1468 kvm_vcpu_uninit(vcpu); 1469 free_shadow_vcpu: 1470 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1471 kfree(vcpu->arch.shadow_vcpu); 1472 free_vcpu3s: 1473 #endif 1474 vfree(vcpu_book3s); 1475 free_vcpu: 1476 kmem_cache_free(kvm_vcpu_cache, vcpu); 1477 out: 1478 return ERR_PTR(err); 1479 } 1480 1481 static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu) 1482 { 1483 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 1484 1485 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK); 1486 kvm_vcpu_uninit(vcpu); 1487 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1488 kfree(vcpu->arch.shadow_vcpu); 1489 #endif 1490 vfree(vcpu_book3s); 1491 kmem_cache_free(kvm_vcpu_cache, vcpu); 1492 } 1493 1494 static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 1495 { 1496 int ret; 1497 #ifdef CONFIG_ALTIVEC 1498 unsigned long uninitialized_var(vrsave); 1499 #endif 1500 1501 /* Check if we can run the vcpu at all */ 1502 if (!vcpu->arch.sane) { 1503 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1504 ret = -EINVAL; 1505 goto out; 1506 } 1507 1508 kvmppc_setup_debug(vcpu); 1509 1510 /* 1511 * Interrupts could be timers for the guest which we have to inject 1512 * again, so let's postpone them until we're in the guest and if we 1513 * really did time things so badly, then we just exit again due to 1514 * a host external interrupt. 1515 */ 1516 ret = kvmppc_prepare_to_enter(vcpu); 1517 if (ret <= 0) 1518 goto out; 1519 /* interrupts now hard-disabled */ 1520 1521 /* Save FPU, Altivec and VSX state */ 1522 giveup_all(current); 1523 1524 /* Preload FPU if it's enabled */ 1525 if (kvmppc_get_msr(vcpu) & MSR_FP) 1526 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); 1527 1528 kvmppc_fix_ee_before_entry(); 1529 1530 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 1531 1532 kvmppc_clear_debug(vcpu); 1533 1534 /* No need for kvm_guest_exit. It's done in handle_exit. 1535 We also get here with interrupts enabled. */ 1536 1537 /* Make sure we save the guest FPU/Altivec/VSX state */ 1538 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); 1539 1540 /* Make sure we save the guest TAR/EBB/DSCR state */ 1541 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG); 1542 1543 out: 1544 vcpu->mode = OUTSIDE_GUEST_MODE; 1545 return ret; 1546 } 1547 1548 /* 1549 * Get (and clear) the dirty memory log for a memory slot. 1550 */ 1551 static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm, 1552 struct kvm_dirty_log *log) 1553 { 1554 struct kvm_memslots *slots; 1555 struct kvm_memory_slot *memslot; 1556 struct kvm_vcpu *vcpu; 1557 ulong ga, ga_end; 1558 int is_dirty = 0; 1559 int r; 1560 unsigned long n; 1561 1562 mutex_lock(&kvm->slots_lock); 1563 1564 r = kvm_get_dirty_log(kvm, log, &is_dirty); 1565 if (r) 1566 goto out; 1567 1568 /* If nothing is dirty, don't bother messing with page tables. */ 1569 if (is_dirty) { 1570 slots = kvm_memslots(kvm); 1571 memslot = id_to_memslot(slots, log->slot); 1572 1573 ga = memslot->base_gfn << PAGE_SHIFT; 1574 ga_end = ga + (memslot->npages << PAGE_SHIFT); 1575 1576 kvm_for_each_vcpu(n, vcpu, kvm) 1577 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); 1578 1579 n = kvm_dirty_bitmap_bytes(memslot); 1580 memset(memslot->dirty_bitmap, 0, n); 1581 } 1582 1583 r = 0; 1584 out: 1585 mutex_unlock(&kvm->slots_lock); 1586 return r; 1587 } 1588 1589 static void kvmppc_core_flush_memslot_pr(struct kvm *kvm, 1590 struct kvm_memory_slot *memslot) 1591 { 1592 return; 1593 } 1594 1595 static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm, 1596 struct kvm_memory_slot *memslot, 1597 const struct kvm_userspace_memory_region *mem) 1598 { 1599 return 0; 1600 } 1601 1602 static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm, 1603 const struct kvm_userspace_memory_region *mem, 1604 const struct kvm_memory_slot *old, 1605 const struct kvm_memory_slot *new) 1606 { 1607 return; 1608 } 1609 1610 static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free, 1611 struct kvm_memory_slot *dont) 1612 { 1613 return; 1614 } 1615 1616 static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot, 1617 unsigned long npages) 1618 { 1619 return 0; 1620 } 1621 1622 1623 #ifdef CONFIG_PPC64 1624 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm, 1625 struct kvm_ppc_smmu_info *info) 1626 { 1627 long int i; 1628 struct kvm_vcpu *vcpu; 1629 1630 info->flags = 0; 1631 1632 /* SLB is always 64 entries */ 1633 info->slb_size = 64; 1634 1635 /* Standard 4k base page size segment */ 1636 info->sps[0].page_shift = 12; 1637 info->sps[0].slb_enc = 0; 1638 info->sps[0].enc[0].page_shift = 12; 1639 info->sps[0].enc[0].pte_enc = 0; 1640 1641 /* 1642 * 64k large page size. 1643 * We only want to put this in if the CPUs we're emulating 1644 * support it, but unfortunately we don't have a vcpu easily 1645 * to hand here to test. Just pick the first vcpu, and if 1646 * that doesn't exist yet, report the minimum capability, 1647 * i.e., no 64k pages. 1648 * 1T segment support goes along with 64k pages. 1649 */ 1650 i = 1; 1651 vcpu = kvm_get_vcpu(kvm, 0); 1652 if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) { 1653 info->flags = KVM_PPC_1T_SEGMENTS; 1654 info->sps[i].page_shift = 16; 1655 info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01; 1656 info->sps[i].enc[0].page_shift = 16; 1657 info->sps[i].enc[0].pte_enc = 1; 1658 ++i; 1659 } 1660 1661 /* Standard 16M large page size segment */ 1662 info->sps[i].page_shift = 24; 1663 info->sps[i].slb_enc = SLB_VSID_L; 1664 info->sps[i].enc[0].page_shift = 24; 1665 info->sps[i].enc[0].pte_enc = 0; 1666 1667 return 0; 1668 } 1669 #else 1670 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm, 1671 struct kvm_ppc_smmu_info *info) 1672 { 1673 /* We should not get called */ 1674 BUG(); 1675 } 1676 #endif /* CONFIG_PPC64 */ 1677 1678 static unsigned int kvm_global_user_count = 0; 1679 static DEFINE_SPINLOCK(kvm_global_user_count_lock); 1680 1681 static int kvmppc_core_init_vm_pr(struct kvm *kvm) 1682 { 1683 mutex_init(&kvm->arch.hpt_mutex); 1684 1685 #ifdef CONFIG_PPC_BOOK3S_64 1686 /* Start out with the default set of hcalls enabled */ 1687 kvmppc_pr_init_default_hcalls(kvm); 1688 #endif 1689 1690 if (firmware_has_feature(FW_FEATURE_SET_MODE)) { 1691 spin_lock(&kvm_global_user_count_lock); 1692 if (++kvm_global_user_count == 1) 1693 pSeries_disable_reloc_on_exc(); 1694 spin_unlock(&kvm_global_user_count_lock); 1695 } 1696 return 0; 1697 } 1698 1699 static void kvmppc_core_destroy_vm_pr(struct kvm *kvm) 1700 { 1701 #ifdef CONFIG_PPC64 1702 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 1703 #endif 1704 1705 if (firmware_has_feature(FW_FEATURE_SET_MODE)) { 1706 spin_lock(&kvm_global_user_count_lock); 1707 BUG_ON(kvm_global_user_count == 0); 1708 if (--kvm_global_user_count == 0) 1709 pSeries_enable_reloc_on_exc(); 1710 spin_unlock(&kvm_global_user_count_lock); 1711 } 1712 } 1713 1714 static int kvmppc_core_check_processor_compat_pr(void) 1715 { 1716 /* 1717 * Disable KVM for Power9 untill the required bits merged. 1718 */ 1719 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1720 return -EIO; 1721 return 0; 1722 } 1723 1724 static long kvm_arch_vm_ioctl_pr(struct file *filp, 1725 unsigned int ioctl, unsigned long arg) 1726 { 1727 return -ENOTTY; 1728 } 1729 1730 static struct kvmppc_ops kvm_ops_pr = { 1731 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr, 1732 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr, 1733 .get_one_reg = kvmppc_get_one_reg_pr, 1734 .set_one_reg = kvmppc_set_one_reg_pr, 1735 .vcpu_load = kvmppc_core_vcpu_load_pr, 1736 .vcpu_put = kvmppc_core_vcpu_put_pr, 1737 .set_msr = kvmppc_set_msr_pr, 1738 .vcpu_run = kvmppc_vcpu_run_pr, 1739 .vcpu_create = kvmppc_core_vcpu_create_pr, 1740 .vcpu_free = kvmppc_core_vcpu_free_pr, 1741 .check_requests = kvmppc_core_check_requests_pr, 1742 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr, 1743 .flush_memslot = kvmppc_core_flush_memslot_pr, 1744 .prepare_memory_region = kvmppc_core_prepare_memory_region_pr, 1745 .commit_memory_region = kvmppc_core_commit_memory_region_pr, 1746 .unmap_hva = kvm_unmap_hva_pr, 1747 .unmap_hva_range = kvm_unmap_hva_range_pr, 1748 .age_hva = kvm_age_hva_pr, 1749 .test_age_hva = kvm_test_age_hva_pr, 1750 .set_spte_hva = kvm_set_spte_hva_pr, 1751 .mmu_destroy = kvmppc_mmu_destroy_pr, 1752 .free_memslot = kvmppc_core_free_memslot_pr, 1753 .create_memslot = kvmppc_core_create_memslot_pr, 1754 .init_vm = kvmppc_core_init_vm_pr, 1755 .destroy_vm = kvmppc_core_destroy_vm_pr, 1756 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr, 1757 .emulate_op = kvmppc_core_emulate_op_pr, 1758 .emulate_mtspr = kvmppc_core_emulate_mtspr_pr, 1759 .emulate_mfspr = kvmppc_core_emulate_mfspr_pr, 1760 .fast_vcpu_kick = kvm_vcpu_kick, 1761 .arch_vm_ioctl = kvm_arch_vm_ioctl_pr, 1762 #ifdef CONFIG_PPC_BOOK3S_64 1763 .hcall_implemented = kvmppc_hcall_impl_pr, 1764 #endif 1765 }; 1766 1767 1768 int kvmppc_book3s_init_pr(void) 1769 { 1770 int r; 1771 1772 r = kvmppc_core_check_processor_compat_pr(); 1773 if (r < 0) 1774 return r; 1775 1776 kvm_ops_pr.owner = THIS_MODULE; 1777 kvmppc_pr_ops = &kvm_ops_pr; 1778 1779 r = kvmppc_mmu_hpte_sysinit(); 1780 return r; 1781 } 1782 1783 void kvmppc_book3s_exit_pr(void) 1784 { 1785 kvmppc_pr_ops = NULL; 1786 kvmppc_mmu_hpte_sysexit(); 1787 } 1788 1789 /* 1790 * We only support separate modules for book3s 64 1791 */ 1792 #ifdef CONFIG_PPC_BOOK3S_64 1793 1794 module_init(kvmppc_book3s_init_pr); 1795 module_exit(kvmppc_book3s_exit_pr); 1796 1797 MODULE_LICENSE("GPL"); 1798 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1799 MODULE_ALIAS("devname:kvm"); 1800 #endif 1801