1 /* 2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 4 * 5 * Authors: 6 * Paul Mackerras <paulus@au1.ibm.com> 7 * Alexander Graf <agraf@suse.de> 8 * Kevin Wolf <mail@kevin-wolf.de> 9 * 10 * Description: KVM functions specific to running on Book 3S 11 * processors in hypervisor mode (specifically POWER7 and later). 12 * 13 * This file is derived from arch/powerpc/kvm/book3s.c, 14 * by Alexander Graf <agraf@suse.de>. 15 * 16 * This program is free software; you can redistribute it and/or modify 17 * it under the terms of the GNU General Public License, version 2, as 18 * published by the Free Software Foundation. 19 */ 20 21 #include <linux/kvm_host.h> 22 #include <linux/kernel.h> 23 #include <linux/err.h> 24 #include <linux/slab.h> 25 #include <linux/preempt.h> 26 #include <linux/sched/signal.h> 27 #include <linux/sched/stat.h> 28 #include <linux/delay.h> 29 #include <linux/export.h> 30 #include <linux/fs.h> 31 #include <linux/anon_inodes.h> 32 #include <linux/cpu.h> 33 #include <linux/cpumask.h> 34 #include <linux/spinlock.h> 35 #include <linux/page-flags.h> 36 #include <linux/srcu.h> 37 #include <linux/miscdevice.h> 38 #include <linux/debugfs.h> 39 #include <linux/gfp.h> 40 #include <linux/vmalloc.h> 41 #include <linux/highmem.h> 42 #include <linux/hugetlb.h> 43 #include <linux/kvm_irqfd.h> 44 #include <linux/irqbypass.h> 45 #include <linux/module.h> 46 #include <linux/compiler.h> 47 #include <linux/of.h> 48 49 #include <asm/ftrace.h> 50 #include <asm/reg.h> 51 #include <asm/ppc-opcode.h> 52 #include <asm/asm-prototypes.h> 53 #include <asm/archrandom.h> 54 #include <asm/debug.h> 55 #include <asm/disassemble.h> 56 #include <asm/cputable.h> 57 #include <asm/cacheflush.h> 58 #include <linux/uaccess.h> 59 #include <asm/io.h> 60 #include <asm/kvm_ppc.h> 61 #include <asm/kvm_book3s.h> 62 #include <asm/mmu_context.h> 63 #include <asm/lppaca.h> 64 #include <asm/processor.h> 65 #include <asm/cputhreads.h> 66 #include <asm/page.h> 67 #include <asm/hvcall.h> 68 #include <asm/switch_to.h> 69 #include <asm/smp.h> 70 #include <asm/dbell.h> 71 #include <asm/hmi.h> 72 #include <asm/pnv-pci.h> 73 #include <asm/mmu.h> 74 #include <asm/opal.h> 75 #include <asm/xics.h> 76 #include <asm/xive.h> 77 #include <asm/hw_breakpoint.h> 78 79 #include "book3s.h" 80 81 #define CREATE_TRACE_POINTS 82 #include "trace_hv.h" 83 84 /* #define EXIT_DEBUG */ 85 /* #define EXIT_DEBUG_SIMPLE */ 86 /* #define EXIT_DEBUG_INT */ 87 88 /* Used to indicate that a guest page fault needs to be handled */ 89 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 90 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 91 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 92 93 /* Used as a "null" value for timebase values */ 94 #define TB_NIL (~(u64)0) 95 96 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 97 98 static int dynamic_mt_modes = 6; 99 module_param(dynamic_mt_modes, int, 0644); 100 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 101 static int target_smt_mode; 102 module_param(target_smt_mode, int, 0644); 103 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 104 105 static bool indep_threads_mode = true; 106 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 107 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static inline bool nesting_enabled(struct kvm *kvm) 132 { 133 return kvm->arch.nested_enable && kvm_is_radix(kvm); 134 } 135 136 /* If set, the threads on each CPU core have to be in the same MMU mode */ 137 static bool no_mixing_hpt_and_radix; 138 139 static void kvmppc_end_cede(struct kvm_vcpu *vcpu); 140 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 141 142 /* 143 * RWMR values for POWER8. These control the rate at which PURR 144 * and SPURR count and should be set according to the number of 145 * online threads in the vcore being run. 146 */ 147 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 148 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 149 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 150 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 151 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 153 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 154 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 155 156 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 157 RWMR_RPA_P8_1THREAD, 158 RWMR_RPA_P8_1THREAD, 159 RWMR_RPA_P8_2THREAD, 160 RWMR_RPA_P8_3THREAD, 161 RWMR_RPA_P8_4THREAD, 162 RWMR_RPA_P8_5THREAD, 163 RWMR_RPA_P8_6THREAD, 164 RWMR_RPA_P8_7THREAD, 165 RWMR_RPA_P8_8THREAD, 166 }; 167 168 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 169 int *ip) 170 { 171 int i = *ip; 172 struct kvm_vcpu *vcpu; 173 174 while (++i < MAX_SMT_THREADS) { 175 vcpu = READ_ONCE(vc->runnable_threads[i]); 176 if (vcpu) { 177 *ip = i; 178 return vcpu; 179 } 180 } 181 return NULL; 182 } 183 184 /* Used to traverse the list of runnable threads for a given vcore */ 185 #define for_each_runnable_thread(i, vcpu, vc) \ 186 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 187 188 static bool kvmppc_ipi_thread(int cpu) 189 { 190 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 191 192 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 193 if (kvmhv_on_pseries()) 194 return false; 195 196 /* On POWER9 we can use msgsnd to IPI any cpu */ 197 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 198 msg |= get_hard_smp_processor_id(cpu); 199 smp_mb(); 200 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 201 return true; 202 } 203 204 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 205 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 206 preempt_disable(); 207 if (cpu_first_thread_sibling(cpu) == 208 cpu_first_thread_sibling(smp_processor_id())) { 209 msg |= cpu_thread_in_core(cpu); 210 smp_mb(); 211 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 212 preempt_enable(); 213 return true; 214 } 215 preempt_enable(); 216 } 217 218 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 219 if (cpu >= 0 && cpu < nr_cpu_ids) { 220 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 221 xics_wake_cpu(cpu); 222 return true; 223 } 224 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 225 return true; 226 } 227 #endif 228 229 return false; 230 } 231 232 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 233 { 234 int cpu; 235 struct swait_queue_head *wqp; 236 237 wqp = kvm_arch_vcpu_wq(vcpu); 238 if (swq_has_sleeper(wqp)) { 239 swake_up_one(wqp); 240 ++vcpu->stat.halt_wakeup; 241 } 242 243 cpu = READ_ONCE(vcpu->arch.thread_cpu); 244 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 245 return; 246 247 /* CPU points to the first thread of the core */ 248 cpu = vcpu->cpu; 249 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 250 smp_send_reschedule(cpu); 251 } 252 253 /* 254 * We use the vcpu_load/put functions to measure stolen time. 255 * Stolen time is counted as time when either the vcpu is able to 256 * run as part of a virtual core, but the task running the vcore 257 * is preempted or sleeping, or when the vcpu needs something done 258 * in the kernel by the task running the vcpu, but that task is 259 * preempted or sleeping. Those two things have to be counted 260 * separately, since one of the vcpu tasks will take on the job 261 * of running the core, and the other vcpu tasks in the vcore will 262 * sleep waiting for it to do that, but that sleep shouldn't count 263 * as stolen time. 264 * 265 * Hence we accumulate stolen time when the vcpu can run as part of 266 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 267 * needs its task to do other things in the kernel (for example, 268 * service a page fault) in busy_stolen. We don't accumulate 269 * stolen time for a vcore when it is inactive, or for a vcpu 270 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 271 * a misnomer; it means that the vcpu task is not executing in 272 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 273 * the kernel. We don't have any way of dividing up that time 274 * between time that the vcpu is genuinely stopped, time that 275 * the task is actively working on behalf of the vcpu, and time 276 * that the task is preempted, so we don't count any of it as 277 * stolen. 278 * 279 * Updates to busy_stolen are protected by arch.tbacct_lock; 280 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 281 * lock. The stolen times are measured in units of timebase ticks. 282 * (Note that the != TB_NIL checks below are purely defensive; 283 * they should never fail.) 284 */ 285 286 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 287 { 288 unsigned long flags; 289 290 spin_lock_irqsave(&vc->stoltb_lock, flags); 291 vc->preempt_tb = mftb(); 292 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 293 } 294 295 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 296 { 297 unsigned long flags; 298 299 spin_lock_irqsave(&vc->stoltb_lock, flags); 300 if (vc->preempt_tb != TB_NIL) { 301 vc->stolen_tb += mftb() - vc->preempt_tb; 302 vc->preempt_tb = TB_NIL; 303 } 304 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 305 } 306 307 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 308 { 309 struct kvmppc_vcore *vc = vcpu->arch.vcore; 310 unsigned long flags; 311 312 /* 313 * We can test vc->runner without taking the vcore lock, 314 * because only this task ever sets vc->runner to this 315 * vcpu, and once it is set to this vcpu, only this task 316 * ever sets it to NULL. 317 */ 318 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 319 kvmppc_core_end_stolen(vc); 320 321 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 322 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 323 vcpu->arch.busy_preempt != TB_NIL) { 324 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 325 vcpu->arch.busy_preempt = TB_NIL; 326 } 327 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 328 } 329 330 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 331 { 332 struct kvmppc_vcore *vc = vcpu->arch.vcore; 333 unsigned long flags; 334 335 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 336 kvmppc_core_start_stolen(vc); 337 338 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 339 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 340 vcpu->arch.busy_preempt = mftb(); 341 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 342 } 343 344 static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) 345 { 346 /* 347 * Check for illegal transactional state bit combination 348 * and if we find it, force the TS field to a safe state. 349 */ 350 if ((msr & MSR_TS_MASK) == MSR_TS_MASK) 351 msr &= ~MSR_TS_MASK; 352 vcpu->arch.shregs.msr = msr; 353 kvmppc_end_cede(vcpu); 354 } 355 356 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 357 { 358 vcpu->arch.pvr = pvr; 359 } 360 361 /* Dummy value used in computing PCR value below */ 362 #define PCR_ARCH_300 (PCR_ARCH_207 << 1) 363 364 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 365 { 366 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 367 struct kvmppc_vcore *vc = vcpu->arch.vcore; 368 369 /* We can (emulate) our own architecture version and anything older */ 370 if (cpu_has_feature(CPU_FTR_ARCH_300)) 371 host_pcr_bit = PCR_ARCH_300; 372 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 373 host_pcr_bit = PCR_ARCH_207; 374 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 375 host_pcr_bit = PCR_ARCH_206; 376 else 377 host_pcr_bit = PCR_ARCH_205; 378 379 /* Determine lowest PCR bit needed to run guest in given PVR level */ 380 guest_pcr_bit = host_pcr_bit; 381 if (arch_compat) { 382 switch (arch_compat) { 383 case PVR_ARCH_205: 384 guest_pcr_bit = PCR_ARCH_205; 385 break; 386 case PVR_ARCH_206: 387 case PVR_ARCH_206p: 388 guest_pcr_bit = PCR_ARCH_206; 389 break; 390 case PVR_ARCH_207: 391 guest_pcr_bit = PCR_ARCH_207; 392 break; 393 case PVR_ARCH_300: 394 guest_pcr_bit = PCR_ARCH_300; 395 break; 396 default: 397 return -EINVAL; 398 } 399 } 400 401 /* Check requested PCR bits don't exceed our capabilities */ 402 if (guest_pcr_bit > host_pcr_bit) 403 return -EINVAL; 404 405 spin_lock(&vc->lock); 406 vc->arch_compat = arch_compat; 407 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */ 408 vc->pcr = host_pcr_bit - guest_pcr_bit; 409 spin_unlock(&vc->lock); 410 411 return 0; 412 } 413 414 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 415 { 416 int r; 417 418 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 419 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 420 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 421 for (r = 0; r < 16; ++r) 422 pr_err("r%2d = %.16lx r%d = %.16lx\n", 423 r, kvmppc_get_gpr(vcpu, r), 424 r+16, kvmppc_get_gpr(vcpu, r+16)); 425 pr_err("ctr = %.16lx lr = %.16lx\n", 426 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 427 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 428 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 429 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 430 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 431 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 432 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 433 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 434 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 435 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 436 pr_err("fault dar = %.16lx dsisr = %.8x\n", 437 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 438 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 439 for (r = 0; r < vcpu->arch.slb_max; ++r) 440 pr_err(" ESID = %.16llx VSID = %.16llx\n", 441 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 442 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 443 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 444 vcpu->arch.last_inst); 445 } 446 447 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 448 { 449 return kvm_get_vcpu_by_id(kvm, id); 450 } 451 452 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 453 { 454 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 455 vpa->yield_count = cpu_to_be32(1); 456 } 457 458 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 459 unsigned long addr, unsigned long len) 460 { 461 /* check address is cacheline aligned */ 462 if (addr & (L1_CACHE_BYTES - 1)) 463 return -EINVAL; 464 spin_lock(&vcpu->arch.vpa_update_lock); 465 if (v->next_gpa != addr || v->len != len) { 466 v->next_gpa = addr; 467 v->len = addr ? len : 0; 468 v->update_pending = 1; 469 } 470 spin_unlock(&vcpu->arch.vpa_update_lock); 471 return 0; 472 } 473 474 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 475 struct reg_vpa { 476 u32 dummy; 477 union { 478 __be16 hword; 479 __be32 word; 480 } length; 481 }; 482 483 static int vpa_is_registered(struct kvmppc_vpa *vpap) 484 { 485 if (vpap->update_pending) 486 return vpap->next_gpa != 0; 487 return vpap->pinned_addr != NULL; 488 } 489 490 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 491 unsigned long flags, 492 unsigned long vcpuid, unsigned long vpa) 493 { 494 struct kvm *kvm = vcpu->kvm; 495 unsigned long len, nb; 496 void *va; 497 struct kvm_vcpu *tvcpu; 498 int err; 499 int subfunc; 500 struct kvmppc_vpa *vpap; 501 502 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 503 if (!tvcpu) 504 return H_PARAMETER; 505 506 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 507 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 508 subfunc == H_VPA_REG_SLB) { 509 /* Registering new area - address must be cache-line aligned */ 510 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 511 return H_PARAMETER; 512 513 /* convert logical addr to kernel addr and read length */ 514 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 515 if (va == NULL) 516 return H_PARAMETER; 517 if (subfunc == H_VPA_REG_VPA) 518 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 519 else 520 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 521 kvmppc_unpin_guest_page(kvm, va, vpa, false); 522 523 /* Check length */ 524 if (len > nb || len < sizeof(struct reg_vpa)) 525 return H_PARAMETER; 526 } else { 527 vpa = 0; 528 len = 0; 529 } 530 531 err = H_PARAMETER; 532 vpap = NULL; 533 spin_lock(&tvcpu->arch.vpa_update_lock); 534 535 switch (subfunc) { 536 case H_VPA_REG_VPA: /* register VPA */ 537 /* 538 * The size of our lppaca is 1kB because of the way we align 539 * it for the guest to avoid crossing a 4kB boundary. We only 540 * use 640 bytes of the structure though, so we should accept 541 * clients that set a size of 640. 542 */ 543 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 544 if (len < sizeof(struct lppaca)) 545 break; 546 vpap = &tvcpu->arch.vpa; 547 err = 0; 548 break; 549 550 case H_VPA_REG_DTL: /* register DTL */ 551 if (len < sizeof(struct dtl_entry)) 552 break; 553 len -= len % sizeof(struct dtl_entry); 554 555 /* Check that they have previously registered a VPA */ 556 err = H_RESOURCE; 557 if (!vpa_is_registered(&tvcpu->arch.vpa)) 558 break; 559 560 vpap = &tvcpu->arch.dtl; 561 err = 0; 562 break; 563 564 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 565 /* Check that they have previously registered a VPA */ 566 err = H_RESOURCE; 567 if (!vpa_is_registered(&tvcpu->arch.vpa)) 568 break; 569 570 vpap = &tvcpu->arch.slb_shadow; 571 err = 0; 572 break; 573 574 case H_VPA_DEREG_VPA: /* deregister VPA */ 575 /* Check they don't still have a DTL or SLB buf registered */ 576 err = H_RESOURCE; 577 if (vpa_is_registered(&tvcpu->arch.dtl) || 578 vpa_is_registered(&tvcpu->arch.slb_shadow)) 579 break; 580 581 vpap = &tvcpu->arch.vpa; 582 err = 0; 583 break; 584 585 case H_VPA_DEREG_DTL: /* deregister DTL */ 586 vpap = &tvcpu->arch.dtl; 587 err = 0; 588 break; 589 590 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 591 vpap = &tvcpu->arch.slb_shadow; 592 err = 0; 593 break; 594 } 595 596 if (vpap) { 597 vpap->next_gpa = vpa; 598 vpap->len = len; 599 vpap->update_pending = 1; 600 } 601 602 spin_unlock(&tvcpu->arch.vpa_update_lock); 603 604 return err; 605 } 606 607 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 608 { 609 struct kvm *kvm = vcpu->kvm; 610 void *va; 611 unsigned long nb; 612 unsigned long gpa; 613 614 /* 615 * We need to pin the page pointed to by vpap->next_gpa, 616 * but we can't call kvmppc_pin_guest_page under the lock 617 * as it does get_user_pages() and down_read(). So we 618 * have to drop the lock, pin the page, then get the lock 619 * again and check that a new area didn't get registered 620 * in the meantime. 621 */ 622 for (;;) { 623 gpa = vpap->next_gpa; 624 spin_unlock(&vcpu->arch.vpa_update_lock); 625 va = NULL; 626 nb = 0; 627 if (gpa) 628 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 629 spin_lock(&vcpu->arch.vpa_update_lock); 630 if (gpa == vpap->next_gpa) 631 break; 632 /* sigh... unpin that one and try again */ 633 if (va) 634 kvmppc_unpin_guest_page(kvm, va, gpa, false); 635 } 636 637 vpap->update_pending = 0; 638 if (va && nb < vpap->len) { 639 /* 640 * If it's now too short, it must be that userspace 641 * has changed the mappings underlying guest memory, 642 * so unregister the region. 643 */ 644 kvmppc_unpin_guest_page(kvm, va, gpa, false); 645 va = NULL; 646 } 647 if (vpap->pinned_addr) 648 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 649 vpap->dirty); 650 vpap->gpa = gpa; 651 vpap->pinned_addr = va; 652 vpap->dirty = false; 653 if (va) 654 vpap->pinned_end = va + vpap->len; 655 } 656 657 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 658 { 659 if (!(vcpu->arch.vpa.update_pending || 660 vcpu->arch.slb_shadow.update_pending || 661 vcpu->arch.dtl.update_pending)) 662 return; 663 664 spin_lock(&vcpu->arch.vpa_update_lock); 665 if (vcpu->arch.vpa.update_pending) { 666 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 667 if (vcpu->arch.vpa.pinned_addr) 668 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 669 } 670 if (vcpu->arch.dtl.update_pending) { 671 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 672 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 673 vcpu->arch.dtl_index = 0; 674 } 675 if (vcpu->arch.slb_shadow.update_pending) 676 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 677 spin_unlock(&vcpu->arch.vpa_update_lock); 678 } 679 680 /* 681 * Return the accumulated stolen time for the vcore up until `now'. 682 * The caller should hold the vcore lock. 683 */ 684 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 685 { 686 u64 p; 687 unsigned long flags; 688 689 spin_lock_irqsave(&vc->stoltb_lock, flags); 690 p = vc->stolen_tb; 691 if (vc->vcore_state != VCORE_INACTIVE && 692 vc->preempt_tb != TB_NIL) 693 p += now - vc->preempt_tb; 694 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 695 return p; 696 } 697 698 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 699 struct kvmppc_vcore *vc) 700 { 701 struct dtl_entry *dt; 702 struct lppaca *vpa; 703 unsigned long stolen; 704 unsigned long core_stolen; 705 u64 now; 706 unsigned long flags; 707 708 dt = vcpu->arch.dtl_ptr; 709 vpa = vcpu->arch.vpa.pinned_addr; 710 now = mftb(); 711 core_stolen = vcore_stolen_time(vc, now); 712 stolen = core_stolen - vcpu->arch.stolen_logged; 713 vcpu->arch.stolen_logged = core_stolen; 714 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 715 stolen += vcpu->arch.busy_stolen; 716 vcpu->arch.busy_stolen = 0; 717 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 718 if (!dt || !vpa) 719 return; 720 memset(dt, 0, sizeof(struct dtl_entry)); 721 dt->dispatch_reason = 7; 722 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 723 dt->timebase = cpu_to_be64(now + vc->tb_offset); 724 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 725 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 726 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 727 ++dt; 728 if (dt == vcpu->arch.dtl.pinned_end) 729 dt = vcpu->arch.dtl.pinned_addr; 730 vcpu->arch.dtl_ptr = dt; 731 /* order writing *dt vs. writing vpa->dtl_idx */ 732 smp_wmb(); 733 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 734 vcpu->arch.dtl.dirty = true; 735 } 736 737 /* See if there is a doorbell interrupt pending for a vcpu */ 738 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 739 { 740 int thr; 741 struct kvmppc_vcore *vc; 742 743 if (vcpu->arch.doorbell_request) 744 return true; 745 /* 746 * Ensure that the read of vcore->dpdes comes after the read 747 * of vcpu->doorbell_request. This barrier matches the 748 * smp_wmb() in kvmppc_guest_entry_inject(). 749 */ 750 smp_rmb(); 751 vc = vcpu->arch.vcore; 752 thr = vcpu->vcpu_id - vc->first_vcpuid; 753 return !!(vc->dpdes & (1 << thr)); 754 } 755 756 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 757 { 758 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 759 return true; 760 if ((!vcpu->arch.vcore->arch_compat) && 761 cpu_has_feature(CPU_FTR_ARCH_207S)) 762 return true; 763 return false; 764 } 765 766 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 767 unsigned long resource, unsigned long value1, 768 unsigned long value2) 769 { 770 switch (resource) { 771 case H_SET_MODE_RESOURCE_SET_CIABR: 772 if (!kvmppc_power8_compatible(vcpu)) 773 return H_P2; 774 if (value2) 775 return H_P4; 776 if (mflags) 777 return H_UNSUPPORTED_FLAG_START; 778 /* Guests can't breakpoint the hypervisor */ 779 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 780 return H_P3; 781 vcpu->arch.ciabr = value1; 782 return H_SUCCESS; 783 case H_SET_MODE_RESOURCE_SET_DAWR: 784 if (!kvmppc_power8_compatible(vcpu)) 785 return H_P2; 786 if (!ppc_breakpoint_available()) 787 return H_P2; 788 if (mflags) 789 return H_UNSUPPORTED_FLAG_START; 790 if (value2 & DABRX_HYP) 791 return H_P4; 792 vcpu->arch.dawr = value1; 793 vcpu->arch.dawrx = value2; 794 return H_SUCCESS; 795 default: 796 return H_TOO_HARD; 797 } 798 } 799 800 /* Copy guest memory in place - must reside within a single memslot */ 801 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 802 unsigned long len) 803 { 804 struct kvm_memory_slot *to_memslot = NULL; 805 struct kvm_memory_slot *from_memslot = NULL; 806 unsigned long to_addr, from_addr; 807 int r; 808 809 /* Get HPA for from address */ 810 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 811 if (!from_memslot) 812 return -EFAULT; 813 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 814 << PAGE_SHIFT)) 815 return -EINVAL; 816 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 817 if (kvm_is_error_hva(from_addr)) 818 return -EFAULT; 819 from_addr |= (from & (PAGE_SIZE - 1)); 820 821 /* Get HPA for to address */ 822 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 823 if (!to_memslot) 824 return -EFAULT; 825 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 826 << PAGE_SHIFT)) 827 return -EINVAL; 828 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 829 if (kvm_is_error_hva(to_addr)) 830 return -EFAULT; 831 to_addr |= (to & (PAGE_SIZE - 1)); 832 833 /* Perform copy */ 834 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 835 len); 836 if (r) 837 return -EFAULT; 838 mark_page_dirty(kvm, to >> PAGE_SHIFT); 839 return 0; 840 } 841 842 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 843 unsigned long dest, unsigned long src) 844 { 845 u64 pg_sz = SZ_4K; /* 4K page size */ 846 u64 pg_mask = SZ_4K - 1; 847 int ret; 848 849 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 850 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 851 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 852 return H_PARAMETER; 853 854 /* dest (and src if copy_page flag set) must be page aligned */ 855 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 856 return H_PARAMETER; 857 858 /* zero and/or copy the page as determined by the flags */ 859 if (flags & H_COPY_PAGE) { 860 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 861 if (ret < 0) 862 return H_PARAMETER; 863 } else if (flags & H_ZERO_PAGE) { 864 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 865 if (ret < 0) 866 return H_PARAMETER; 867 } 868 869 /* We can ignore the remaining flags */ 870 871 return H_SUCCESS; 872 } 873 874 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 875 { 876 struct kvmppc_vcore *vcore = target->arch.vcore; 877 878 /* 879 * We expect to have been called by the real mode handler 880 * (kvmppc_rm_h_confer()) which would have directly returned 881 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 882 * have useful work to do and should not confer) so we don't 883 * recheck that here. 884 */ 885 886 spin_lock(&vcore->lock); 887 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 888 vcore->vcore_state != VCORE_INACTIVE && 889 vcore->runner) 890 target = vcore->runner; 891 spin_unlock(&vcore->lock); 892 893 return kvm_vcpu_yield_to(target); 894 } 895 896 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 897 { 898 int yield_count = 0; 899 struct lppaca *lppaca; 900 901 spin_lock(&vcpu->arch.vpa_update_lock); 902 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 903 if (lppaca) 904 yield_count = be32_to_cpu(lppaca->yield_count); 905 spin_unlock(&vcpu->arch.vpa_update_lock); 906 return yield_count; 907 } 908 909 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 910 { 911 unsigned long req = kvmppc_get_gpr(vcpu, 3); 912 unsigned long target, ret = H_SUCCESS; 913 int yield_count; 914 struct kvm_vcpu *tvcpu; 915 int idx, rc; 916 917 if (req <= MAX_HCALL_OPCODE && 918 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 919 return RESUME_HOST; 920 921 switch (req) { 922 case H_CEDE: 923 break; 924 case H_PROD: 925 target = kvmppc_get_gpr(vcpu, 4); 926 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 927 if (!tvcpu) { 928 ret = H_PARAMETER; 929 break; 930 } 931 tvcpu->arch.prodded = 1; 932 smp_mb(); 933 if (tvcpu->arch.ceded) 934 kvmppc_fast_vcpu_kick_hv(tvcpu); 935 break; 936 case H_CONFER: 937 target = kvmppc_get_gpr(vcpu, 4); 938 if (target == -1) 939 break; 940 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 941 if (!tvcpu) { 942 ret = H_PARAMETER; 943 break; 944 } 945 yield_count = kvmppc_get_gpr(vcpu, 5); 946 if (kvmppc_get_yield_count(tvcpu) != yield_count) 947 break; 948 kvm_arch_vcpu_yield_to(tvcpu); 949 break; 950 case H_REGISTER_VPA: 951 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 952 kvmppc_get_gpr(vcpu, 5), 953 kvmppc_get_gpr(vcpu, 6)); 954 break; 955 case H_RTAS: 956 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 957 return RESUME_HOST; 958 959 idx = srcu_read_lock(&vcpu->kvm->srcu); 960 rc = kvmppc_rtas_hcall(vcpu); 961 srcu_read_unlock(&vcpu->kvm->srcu, idx); 962 963 if (rc == -ENOENT) 964 return RESUME_HOST; 965 else if (rc == 0) 966 break; 967 968 /* Send the error out to userspace via KVM_RUN */ 969 return rc; 970 case H_LOGICAL_CI_LOAD: 971 ret = kvmppc_h_logical_ci_load(vcpu); 972 if (ret == H_TOO_HARD) 973 return RESUME_HOST; 974 break; 975 case H_LOGICAL_CI_STORE: 976 ret = kvmppc_h_logical_ci_store(vcpu); 977 if (ret == H_TOO_HARD) 978 return RESUME_HOST; 979 break; 980 case H_SET_MODE: 981 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 982 kvmppc_get_gpr(vcpu, 5), 983 kvmppc_get_gpr(vcpu, 6), 984 kvmppc_get_gpr(vcpu, 7)); 985 if (ret == H_TOO_HARD) 986 return RESUME_HOST; 987 break; 988 case H_XIRR: 989 case H_CPPR: 990 case H_EOI: 991 case H_IPI: 992 case H_IPOLL: 993 case H_XIRR_X: 994 if (kvmppc_xics_enabled(vcpu)) { 995 if (xics_on_xive()) { 996 ret = H_NOT_AVAILABLE; 997 return RESUME_GUEST; 998 } 999 ret = kvmppc_xics_hcall(vcpu, req); 1000 break; 1001 } 1002 return RESUME_HOST; 1003 case H_SET_DABR: 1004 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1005 break; 1006 case H_SET_XDABR: 1007 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1008 kvmppc_get_gpr(vcpu, 5)); 1009 break; 1010 #ifdef CONFIG_SPAPR_TCE_IOMMU 1011 case H_GET_TCE: 1012 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1013 kvmppc_get_gpr(vcpu, 5)); 1014 if (ret == H_TOO_HARD) 1015 return RESUME_HOST; 1016 break; 1017 case H_PUT_TCE: 1018 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1019 kvmppc_get_gpr(vcpu, 5), 1020 kvmppc_get_gpr(vcpu, 6)); 1021 if (ret == H_TOO_HARD) 1022 return RESUME_HOST; 1023 break; 1024 case H_PUT_TCE_INDIRECT: 1025 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1026 kvmppc_get_gpr(vcpu, 5), 1027 kvmppc_get_gpr(vcpu, 6), 1028 kvmppc_get_gpr(vcpu, 7)); 1029 if (ret == H_TOO_HARD) 1030 return RESUME_HOST; 1031 break; 1032 case H_STUFF_TCE: 1033 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1034 kvmppc_get_gpr(vcpu, 5), 1035 kvmppc_get_gpr(vcpu, 6), 1036 kvmppc_get_gpr(vcpu, 7)); 1037 if (ret == H_TOO_HARD) 1038 return RESUME_HOST; 1039 break; 1040 #endif 1041 case H_RANDOM: 1042 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1043 ret = H_HARDWARE; 1044 break; 1045 1046 case H_SET_PARTITION_TABLE: 1047 ret = H_FUNCTION; 1048 if (nesting_enabled(vcpu->kvm)) 1049 ret = kvmhv_set_partition_table(vcpu); 1050 break; 1051 case H_ENTER_NESTED: 1052 ret = H_FUNCTION; 1053 if (!nesting_enabled(vcpu->kvm)) 1054 break; 1055 ret = kvmhv_enter_nested_guest(vcpu); 1056 if (ret == H_INTERRUPT) { 1057 kvmppc_set_gpr(vcpu, 3, 0); 1058 vcpu->arch.hcall_needed = 0; 1059 return -EINTR; 1060 } else if (ret == H_TOO_HARD) { 1061 kvmppc_set_gpr(vcpu, 3, 0); 1062 vcpu->arch.hcall_needed = 0; 1063 return RESUME_HOST; 1064 } 1065 break; 1066 case H_TLB_INVALIDATE: 1067 ret = H_FUNCTION; 1068 if (nesting_enabled(vcpu->kvm)) 1069 ret = kvmhv_do_nested_tlbie(vcpu); 1070 break; 1071 case H_COPY_TOFROM_GUEST: 1072 ret = H_FUNCTION; 1073 if (nesting_enabled(vcpu->kvm)) 1074 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1075 break; 1076 case H_PAGE_INIT: 1077 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1078 kvmppc_get_gpr(vcpu, 5), 1079 kvmppc_get_gpr(vcpu, 6)); 1080 break; 1081 default: 1082 return RESUME_HOST; 1083 } 1084 kvmppc_set_gpr(vcpu, 3, ret); 1085 vcpu->arch.hcall_needed = 0; 1086 return RESUME_GUEST; 1087 } 1088 1089 /* 1090 * Handle H_CEDE in the nested virtualization case where we haven't 1091 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1092 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1093 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1094 */ 1095 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1096 { 1097 vcpu->arch.shregs.msr |= MSR_EE; 1098 vcpu->arch.ceded = 1; 1099 smp_mb(); 1100 if (vcpu->arch.prodded) { 1101 vcpu->arch.prodded = 0; 1102 smp_mb(); 1103 vcpu->arch.ceded = 0; 1104 } 1105 } 1106 1107 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1108 { 1109 switch (cmd) { 1110 case H_CEDE: 1111 case H_PROD: 1112 case H_CONFER: 1113 case H_REGISTER_VPA: 1114 case H_SET_MODE: 1115 case H_LOGICAL_CI_LOAD: 1116 case H_LOGICAL_CI_STORE: 1117 #ifdef CONFIG_KVM_XICS 1118 case H_XIRR: 1119 case H_CPPR: 1120 case H_EOI: 1121 case H_IPI: 1122 case H_IPOLL: 1123 case H_XIRR_X: 1124 #endif 1125 case H_PAGE_INIT: 1126 return 1; 1127 } 1128 1129 /* See if it's in the real-mode table */ 1130 return kvmppc_hcall_impl_hv_realmode(cmd); 1131 } 1132 1133 static int kvmppc_emulate_debug_inst(struct kvm_run *run, 1134 struct kvm_vcpu *vcpu) 1135 { 1136 u32 last_inst; 1137 1138 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1139 EMULATE_DONE) { 1140 /* 1141 * Fetch failed, so return to guest and 1142 * try executing it again. 1143 */ 1144 return RESUME_GUEST; 1145 } 1146 1147 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1148 run->exit_reason = KVM_EXIT_DEBUG; 1149 run->debug.arch.address = kvmppc_get_pc(vcpu); 1150 return RESUME_HOST; 1151 } else { 1152 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1153 return RESUME_GUEST; 1154 } 1155 } 1156 1157 static void do_nothing(void *x) 1158 { 1159 } 1160 1161 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1162 { 1163 int thr, cpu, pcpu, nthreads; 1164 struct kvm_vcpu *v; 1165 unsigned long dpdes; 1166 1167 nthreads = vcpu->kvm->arch.emul_smt_mode; 1168 dpdes = 0; 1169 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1170 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1171 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1172 if (!v) 1173 continue; 1174 /* 1175 * If the vcpu is currently running on a physical cpu thread, 1176 * interrupt it in order to pull it out of the guest briefly, 1177 * which will update its vcore->dpdes value. 1178 */ 1179 pcpu = READ_ONCE(v->cpu); 1180 if (pcpu >= 0) 1181 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1182 if (kvmppc_doorbell_pending(v)) 1183 dpdes |= 1 << thr; 1184 } 1185 return dpdes; 1186 } 1187 1188 /* 1189 * On POWER9, emulate doorbell-related instructions in order to 1190 * give the guest the illusion of running on a multi-threaded core. 1191 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1192 * and mfspr DPDES. 1193 */ 1194 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1195 { 1196 u32 inst, rb, thr; 1197 unsigned long arg; 1198 struct kvm *kvm = vcpu->kvm; 1199 struct kvm_vcpu *tvcpu; 1200 1201 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1202 return RESUME_GUEST; 1203 if (get_op(inst) != 31) 1204 return EMULATE_FAIL; 1205 rb = get_rb(inst); 1206 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1207 switch (get_xop(inst)) { 1208 case OP_31_XOP_MSGSNDP: 1209 arg = kvmppc_get_gpr(vcpu, rb); 1210 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1211 break; 1212 arg &= 0x3f; 1213 if (arg >= kvm->arch.emul_smt_mode) 1214 break; 1215 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1216 if (!tvcpu) 1217 break; 1218 if (!tvcpu->arch.doorbell_request) { 1219 tvcpu->arch.doorbell_request = 1; 1220 kvmppc_fast_vcpu_kick_hv(tvcpu); 1221 } 1222 break; 1223 case OP_31_XOP_MSGCLRP: 1224 arg = kvmppc_get_gpr(vcpu, rb); 1225 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1226 break; 1227 vcpu->arch.vcore->dpdes = 0; 1228 vcpu->arch.doorbell_request = 0; 1229 break; 1230 case OP_31_XOP_MFSPR: 1231 switch (get_sprn(inst)) { 1232 case SPRN_TIR: 1233 arg = thr; 1234 break; 1235 case SPRN_DPDES: 1236 arg = kvmppc_read_dpdes(vcpu); 1237 break; 1238 default: 1239 return EMULATE_FAIL; 1240 } 1241 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1242 break; 1243 default: 1244 return EMULATE_FAIL; 1245 } 1246 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1247 return RESUME_GUEST; 1248 } 1249 1250 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 1251 struct task_struct *tsk) 1252 { 1253 int r = RESUME_HOST; 1254 1255 vcpu->stat.sum_exits++; 1256 1257 /* 1258 * This can happen if an interrupt occurs in the last stages 1259 * of guest entry or the first stages of guest exit (i.e. after 1260 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1261 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1262 * That can happen due to a bug, or due to a machine check 1263 * occurring at just the wrong time. 1264 */ 1265 if (vcpu->arch.shregs.msr & MSR_HV) { 1266 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1267 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1268 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1269 vcpu->arch.shregs.msr); 1270 kvmppc_dump_regs(vcpu); 1271 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1272 run->hw.hardware_exit_reason = vcpu->arch.trap; 1273 return RESUME_HOST; 1274 } 1275 run->exit_reason = KVM_EXIT_UNKNOWN; 1276 run->ready_for_interrupt_injection = 1; 1277 switch (vcpu->arch.trap) { 1278 /* We're good on these - the host merely wanted to get our attention */ 1279 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1280 vcpu->stat.dec_exits++; 1281 r = RESUME_GUEST; 1282 break; 1283 case BOOK3S_INTERRUPT_EXTERNAL: 1284 case BOOK3S_INTERRUPT_H_DOORBELL: 1285 case BOOK3S_INTERRUPT_H_VIRT: 1286 vcpu->stat.ext_intr_exits++; 1287 r = RESUME_GUEST; 1288 break; 1289 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1290 case BOOK3S_INTERRUPT_HMI: 1291 case BOOK3S_INTERRUPT_PERFMON: 1292 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1293 r = RESUME_GUEST; 1294 break; 1295 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1296 /* Print the MCE event to host console. */ 1297 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1298 1299 /* 1300 * If the guest can do FWNMI, exit to userspace so it can 1301 * deliver a FWNMI to the guest. 1302 * Otherwise we synthesize a machine check for the guest 1303 * so that it knows that the machine check occurred. 1304 */ 1305 if (!vcpu->kvm->arch.fwnmi_enabled) { 1306 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1307 kvmppc_core_queue_machine_check(vcpu, flags); 1308 r = RESUME_GUEST; 1309 break; 1310 } 1311 1312 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1313 run->exit_reason = KVM_EXIT_NMI; 1314 run->hw.hardware_exit_reason = vcpu->arch.trap; 1315 /* Clear out the old NMI status from run->flags */ 1316 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1317 /* Now set the NMI status */ 1318 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1319 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1320 else 1321 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1322 1323 r = RESUME_HOST; 1324 break; 1325 case BOOK3S_INTERRUPT_PROGRAM: 1326 { 1327 ulong flags; 1328 /* 1329 * Normally program interrupts are delivered directly 1330 * to the guest by the hardware, but we can get here 1331 * as a result of a hypervisor emulation interrupt 1332 * (e40) getting turned into a 700 by BML RTAS. 1333 */ 1334 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1335 kvmppc_core_queue_program(vcpu, flags); 1336 r = RESUME_GUEST; 1337 break; 1338 } 1339 case BOOK3S_INTERRUPT_SYSCALL: 1340 { 1341 /* hcall - punt to userspace */ 1342 int i; 1343 1344 /* hypercall with MSR_PR has already been handled in rmode, 1345 * and never reaches here. 1346 */ 1347 1348 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1349 for (i = 0; i < 9; ++i) 1350 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1351 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1352 vcpu->arch.hcall_needed = 1; 1353 r = RESUME_HOST; 1354 break; 1355 } 1356 /* 1357 * We get these next two if the guest accesses a page which it thinks 1358 * it has mapped but which is not actually present, either because 1359 * it is for an emulated I/O device or because the corresonding 1360 * host page has been paged out. Any other HDSI/HISI interrupts 1361 * have been handled already. 1362 */ 1363 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1364 r = RESUME_PAGE_FAULT; 1365 break; 1366 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1367 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1368 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1369 DSISR_SRR1_MATCH_64S; 1370 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1371 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1372 r = RESUME_PAGE_FAULT; 1373 break; 1374 /* 1375 * This occurs if the guest executes an illegal instruction. 1376 * If the guest debug is disabled, generate a program interrupt 1377 * to the guest. If guest debug is enabled, we need to check 1378 * whether the instruction is a software breakpoint instruction. 1379 * Accordingly return to Guest or Host. 1380 */ 1381 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1382 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1383 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1384 swab32(vcpu->arch.emul_inst) : 1385 vcpu->arch.emul_inst; 1386 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1387 r = kvmppc_emulate_debug_inst(run, vcpu); 1388 } else { 1389 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1390 r = RESUME_GUEST; 1391 } 1392 break; 1393 /* 1394 * This occurs if the guest (kernel or userspace), does something that 1395 * is prohibited by HFSCR. 1396 * On POWER9, this could be a doorbell instruction that we need 1397 * to emulate. 1398 * Otherwise, we just generate a program interrupt to the guest. 1399 */ 1400 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1401 r = EMULATE_FAIL; 1402 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1403 cpu_has_feature(CPU_FTR_ARCH_300)) 1404 r = kvmppc_emulate_doorbell_instr(vcpu); 1405 if (r == EMULATE_FAIL) { 1406 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1407 r = RESUME_GUEST; 1408 } 1409 break; 1410 1411 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1412 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1413 /* 1414 * This occurs for various TM-related instructions that 1415 * we need to emulate on POWER9 DD2.2. We have already 1416 * handled the cases where the guest was in real-suspend 1417 * mode and was transitioning to transactional state. 1418 */ 1419 r = kvmhv_p9_tm_emulation(vcpu); 1420 break; 1421 #endif 1422 1423 case BOOK3S_INTERRUPT_HV_RM_HARD: 1424 r = RESUME_PASSTHROUGH; 1425 break; 1426 default: 1427 kvmppc_dump_regs(vcpu); 1428 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1429 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1430 vcpu->arch.shregs.msr); 1431 run->hw.hardware_exit_reason = vcpu->arch.trap; 1432 r = RESUME_HOST; 1433 break; 1434 } 1435 1436 return r; 1437 } 1438 1439 static int kvmppc_handle_nested_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 1440 { 1441 int r; 1442 int srcu_idx; 1443 1444 vcpu->stat.sum_exits++; 1445 1446 /* 1447 * This can happen if an interrupt occurs in the last stages 1448 * of guest entry or the first stages of guest exit (i.e. after 1449 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1450 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1451 * That can happen due to a bug, or due to a machine check 1452 * occurring at just the wrong time. 1453 */ 1454 if (vcpu->arch.shregs.msr & MSR_HV) { 1455 pr_emerg("KVM trap in HV mode while nested!\n"); 1456 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1457 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1458 vcpu->arch.shregs.msr); 1459 kvmppc_dump_regs(vcpu); 1460 return RESUME_HOST; 1461 } 1462 switch (vcpu->arch.trap) { 1463 /* We're good on these - the host merely wanted to get our attention */ 1464 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1465 vcpu->stat.dec_exits++; 1466 r = RESUME_GUEST; 1467 break; 1468 case BOOK3S_INTERRUPT_EXTERNAL: 1469 vcpu->stat.ext_intr_exits++; 1470 r = RESUME_HOST; 1471 break; 1472 case BOOK3S_INTERRUPT_H_DOORBELL: 1473 case BOOK3S_INTERRUPT_H_VIRT: 1474 vcpu->stat.ext_intr_exits++; 1475 r = RESUME_GUEST; 1476 break; 1477 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1478 case BOOK3S_INTERRUPT_HMI: 1479 case BOOK3S_INTERRUPT_PERFMON: 1480 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1481 r = RESUME_GUEST; 1482 break; 1483 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1484 /* Pass the machine check to the L1 guest */ 1485 r = RESUME_HOST; 1486 /* Print the MCE event to host console. */ 1487 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1488 break; 1489 /* 1490 * We get these next two if the guest accesses a page which it thinks 1491 * it has mapped but which is not actually present, either because 1492 * it is for an emulated I/O device or because the corresonding 1493 * host page has been paged out. 1494 */ 1495 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1496 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1497 r = kvmhv_nested_page_fault(run, vcpu); 1498 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1499 break; 1500 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1501 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1502 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1503 DSISR_SRR1_MATCH_64S; 1504 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1505 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1506 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1507 r = kvmhv_nested_page_fault(run, vcpu); 1508 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1509 break; 1510 1511 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1512 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1513 /* 1514 * This occurs for various TM-related instructions that 1515 * we need to emulate on POWER9 DD2.2. We have already 1516 * handled the cases where the guest was in real-suspend 1517 * mode and was transitioning to transactional state. 1518 */ 1519 r = kvmhv_p9_tm_emulation(vcpu); 1520 break; 1521 #endif 1522 1523 case BOOK3S_INTERRUPT_HV_RM_HARD: 1524 vcpu->arch.trap = 0; 1525 r = RESUME_GUEST; 1526 if (!xics_on_xive()) 1527 kvmppc_xics_rm_complete(vcpu, 0); 1528 break; 1529 default: 1530 r = RESUME_HOST; 1531 break; 1532 } 1533 1534 return r; 1535 } 1536 1537 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1538 struct kvm_sregs *sregs) 1539 { 1540 int i; 1541 1542 memset(sregs, 0, sizeof(struct kvm_sregs)); 1543 sregs->pvr = vcpu->arch.pvr; 1544 for (i = 0; i < vcpu->arch.slb_max; i++) { 1545 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1546 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1547 } 1548 1549 return 0; 1550 } 1551 1552 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1553 struct kvm_sregs *sregs) 1554 { 1555 int i, j; 1556 1557 /* Only accept the same PVR as the host's, since we can't spoof it */ 1558 if (sregs->pvr != vcpu->arch.pvr) 1559 return -EINVAL; 1560 1561 j = 0; 1562 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1563 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1564 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1565 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1566 ++j; 1567 } 1568 } 1569 vcpu->arch.slb_max = j; 1570 1571 return 0; 1572 } 1573 1574 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1575 bool preserve_top32) 1576 { 1577 struct kvm *kvm = vcpu->kvm; 1578 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1579 u64 mask; 1580 1581 spin_lock(&vc->lock); 1582 /* 1583 * If ILE (interrupt little-endian) has changed, update the 1584 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1585 */ 1586 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1587 struct kvm_vcpu *vcpu; 1588 int i; 1589 1590 kvm_for_each_vcpu(i, vcpu, kvm) { 1591 if (vcpu->arch.vcore != vc) 1592 continue; 1593 if (new_lpcr & LPCR_ILE) 1594 vcpu->arch.intr_msr |= MSR_LE; 1595 else 1596 vcpu->arch.intr_msr &= ~MSR_LE; 1597 } 1598 } 1599 1600 /* 1601 * Userspace can only modify DPFD (default prefetch depth), 1602 * ILE (interrupt little-endian) and TC (translation control). 1603 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1604 */ 1605 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1606 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1607 mask |= LPCR_AIL; 1608 /* 1609 * On POWER9, allow userspace to enable large decrementer for the 1610 * guest, whether or not the host has it enabled. 1611 */ 1612 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1613 mask |= LPCR_LD; 1614 1615 /* Broken 32-bit version of LPCR must not clear top bits */ 1616 if (preserve_top32) 1617 mask &= 0xFFFFFFFF; 1618 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1619 spin_unlock(&vc->lock); 1620 } 1621 1622 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1623 union kvmppc_one_reg *val) 1624 { 1625 int r = 0; 1626 long int i; 1627 1628 switch (id) { 1629 case KVM_REG_PPC_DEBUG_INST: 1630 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1631 break; 1632 case KVM_REG_PPC_HIOR: 1633 *val = get_reg_val(id, 0); 1634 break; 1635 case KVM_REG_PPC_DABR: 1636 *val = get_reg_val(id, vcpu->arch.dabr); 1637 break; 1638 case KVM_REG_PPC_DABRX: 1639 *val = get_reg_val(id, vcpu->arch.dabrx); 1640 break; 1641 case KVM_REG_PPC_DSCR: 1642 *val = get_reg_val(id, vcpu->arch.dscr); 1643 break; 1644 case KVM_REG_PPC_PURR: 1645 *val = get_reg_val(id, vcpu->arch.purr); 1646 break; 1647 case KVM_REG_PPC_SPURR: 1648 *val = get_reg_val(id, vcpu->arch.spurr); 1649 break; 1650 case KVM_REG_PPC_AMR: 1651 *val = get_reg_val(id, vcpu->arch.amr); 1652 break; 1653 case KVM_REG_PPC_UAMOR: 1654 *val = get_reg_val(id, vcpu->arch.uamor); 1655 break; 1656 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1657 i = id - KVM_REG_PPC_MMCR0; 1658 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1659 break; 1660 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1661 i = id - KVM_REG_PPC_PMC1; 1662 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1663 break; 1664 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1665 i = id - KVM_REG_PPC_SPMC1; 1666 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1667 break; 1668 case KVM_REG_PPC_SIAR: 1669 *val = get_reg_val(id, vcpu->arch.siar); 1670 break; 1671 case KVM_REG_PPC_SDAR: 1672 *val = get_reg_val(id, vcpu->arch.sdar); 1673 break; 1674 case KVM_REG_PPC_SIER: 1675 *val = get_reg_val(id, vcpu->arch.sier); 1676 break; 1677 case KVM_REG_PPC_IAMR: 1678 *val = get_reg_val(id, vcpu->arch.iamr); 1679 break; 1680 case KVM_REG_PPC_PSPB: 1681 *val = get_reg_val(id, vcpu->arch.pspb); 1682 break; 1683 case KVM_REG_PPC_DPDES: 1684 *val = get_reg_val(id, vcpu->arch.vcore->dpdes); 1685 break; 1686 case KVM_REG_PPC_VTB: 1687 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1688 break; 1689 case KVM_REG_PPC_DAWR: 1690 *val = get_reg_val(id, vcpu->arch.dawr); 1691 break; 1692 case KVM_REG_PPC_DAWRX: 1693 *val = get_reg_val(id, vcpu->arch.dawrx); 1694 break; 1695 case KVM_REG_PPC_CIABR: 1696 *val = get_reg_val(id, vcpu->arch.ciabr); 1697 break; 1698 case KVM_REG_PPC_CSIGR: 1699 *val = get_reg_val(id, vcpu->arch.csigr); 1700 break; 1701 case KVM_REG_PPC_TACR: 1702 *val = get_reg_val(id, vcpu->arch.tacr); 1703 break; 1704 case KVM_REG_PPC_TCSCR: 1705 *val = get_reg_val(id, vcpu->arch.tcscr); 1706 break; 1707 case KVM_REG_PPC_PID: 1708 *val = get_reg_val(id, vcpu->arch.pid); 1709 break; 1710 case KVM_REG_PPC_ACOP: 1711 *val = get_reg_val(id, vcpu->arch.acop); 1712 break; 1713 case KVM_REG_PPC_WORT: 1714 *val = get_reg_val(id, vcpu->arch.wort); 1715 break; 1716 case KVM_REG_PPC_TIDR: 1717 *val = get_reg_val(id, vcpu->arch.tid); 1718 break; 1719 case KVM_REG_PPC_PSSCR: 1720 *val = get_reg_val(id, vcpu->arch.psscr); 1721 break; 1722 case KVM_REG_PPC_VPA_ADDR: 1723 spin_lock(&vcpu->arch.vpa_update_lock); 1724 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1725 spin_unlock(&vcpu->arch.vpa_update_lock); 1726 break; 1727 case KVM_REG_PPC_VPA_SLB: 1728 spin_lock(&vcpu->arch.vpa_update_lock); 1729 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1730 val->vpaval.length = vcpu->arch.slb_shadow.len; 1731 spin_unlock(&vcpu->arch.vpa_update_lock); 1732 break; 1733 case KVM_REG_PPC_VPA_DTL: 1734 spin_lock(&vcpu->arch.vpa_update_lock); 1735 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1736 val->vpaval.length = vcpu->arch.dtl.len; 1737 spin_unlock(&vcpu->arch.vpa_update_lock); 1738 break; 1739 case KVM_REG_PPC_TB_OFFSET: 1740 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1741 break; 1742 case KVM_REG_PPC_LPCR: 1743 case KVM_REG_PPC_LPCR_64: 1744 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1745 break; 1746 case KVM_REG_PPC_PPR: 1747 *val = get_reg_val(id, vcpu->arch.ppr); 1748 break; 1749 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1750 case KVM_REG_PPC_TFHAR: 1751 *val = get_reg_val(id, vcpu->arch.tfhar); 1752 break; 1753 case KVM_REG_PPC_TFIAR: 1754 *val = get_reg_val(id, vcpu->arch.tfiar); 1755 break; 1756 case KVM_REG_PPC_TEXASR: 1757 *val = get_reg_val(id, vcpu->arch.texasr); 1758 break; 1759 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1760 i = id - KVM_REG_PPC_TM_GPR0; 1761 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1762 break; 1763 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1764 { 1765 int j; 1766 i = id - KVM_REG_PPC_TM_VSR0; 1767 if (i < 32) 1768 for (j = 0; j < TS_FPRWIDTH; j++) 1769 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1770 else { 1771 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1772 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1773 else 1774 r = -ENXIO; 1775 } 1776 break; 1777 } 1778 case KVM_REG_PPC_TM_CR: 1779 *val = get_reg_val(id, vcpu->arch.cr_tm); 1780 break; 1781 case KVM_REG_PPC_TM_XER: 1782 *val = get_reg_val(id, vcpu->arch.xer_tm); 1783 break; 1784 case KVM_REG_PPC_TM_LR: 1785 *val = get_reg_val(id, vcpu->arch.lr_tm); 1786 break; 1787 case KVM_REG_PPC_TM_CTR: 1788 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1789 break; 1790 case KVM_REG_PPC_TM_FPSCR: 1791 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1792 break; 1793 case KVM_REG_PPC_TM_AMR: 1794 *val = get_reg_val(id, vcpu->arch.amr_tm); 1795 break; 1796 case KVM_REG_PPC_TM_PPR: 1797 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1798 break; 1799 case KVM_REG_PPC_TM_VRSAVE: 1800 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1801 break; 1802 case KVM_REG_PPC_TM_VSCR: 1803 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1804 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1805 else 1806 r = -ENXIO; 1807 break; 1808 case KVM_REG_PPC_TM_DSCR: 1809 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1810 break; 1811 case KVM_REG_PPC_TM_TAR: 1812 *val = get_reg_val(id, vcpu->arch.tar_tm); 1813 break; 1814 #endif 1815 case KVM_REG_PPC_ARCH_COMPAT: 1816 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1817 break; 1818 case KVM_REG_PPC_DEC_EXPIRY: 1819 *val = get_reg_val(id, vcpu->arch.dec_expires + 1820 vcpu->arch.vcore->tb_offset); 1821 break; 1822 case KVM_REG_PPC_ONLINE: 1823 *val = get_reg_val(id, vcpu->arch.online); 1824 break; 1825 case KVM_REG_PPC_PTCR: 1826 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1827 break; 1828 default: 1829 r = -EINVAL; 1830 break; 1831 } 1832 1833 return r; 1834 } 1835 1836 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1837 union kvmppc_one_reg *val) 1838 { 1839 int r = 0; 1840 long int i; 1841 unsigned long addr, len; 1842 1843 switch (id) { 1844 case KVM_REG_PPC_HIOR: 1845 /* Only allow this to be set to zero */ 1846 if (set_reg_val(id, *val)) 1847 r = -EINVAL; 1848 break; 1849 case KVM_REG_PPC_DABR: 1850 vcpu->arch.dabr = set_reg_val(id, *val); 1851 break; 1852 case KVM_REG_PPC_DABRX: 1853 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1854 break; 1855 case KVM_REG_PPC_DSCR: 1856 vcpu->arch.dscr = set_reg_val(id, *val); 1857 break; 1858 case KVM_REG_PPC_PURR: 1859 vcpu->arch.purr = set_reg_val(id, *val); 1860 break; 1861 case KVM_REG_PPC_SPURR: 1862 vcpu->arch.spurr = set_reg_val(id, *val); 1863 break; 1864 case KVM_REG_PPC_AMR: 1865 vcpu->arch.amr = set_reg_val(id, *val); 1866 break; 1867 case KVM_REG_PPC_UAMOR: 1868 vcpu->arch.uamor = set_reg_val(id, *val); 1869 break; 1870 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1871 i = id - KVM_REG_PPC_MMCR0; 1872 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1873 break; 1874 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1875 i = id - KVM_REG_PPC_PMC1; 1876 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1877 break; 1878 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1879 i = id - KVM_REG_PPC_SPMC1; 1880 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1881 break; 1882 case KVM_REG_PPC_SIAR: 1883 vcpu->arch.siar = set_reg_val(id, *val); 1884 break; 1885 case KVM_REG_PPC_SDAR: 1886 vcpu->arch.sdar = set_reg_val(id, *val); 1887 break; 1888 case KVM_REG_PPC_SIER: 1889 vcpu->arch.sier = set_reg_val(id, *val); 1890 break; 1891 case KVM_REG_PPC_IAMR: 1892 vcpu->arch.iamr = set_reg_val(id, *val); 1893 break; 1894 case KVM_REG_PPC_PSPB: 1895 vcpu->arch.pspb = set_reg_val(id, *val); 1896 break; 1897 case KVM_REG_PPC_DPDES: 1898 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 1899 break; 1900 case KVM_REG_PPC_VTB: 1901 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 1902 break; 1903 case KVM_REG_PPC_DAWR: 1904 vcpu->arch.dawr = set_reg_val(id, *val); 1905 break; 1906 case KVM_REG_PPC_DAWRX: 1907 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP; 1908 break; 1909 case KVM_REG_PPC_CIABR: 1910 vcpu->arch.ciabr = set_reg_val(id, *val); 1911 /* Don't allow setting breakpoints in hypervisor code */ 1912 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 1913 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 1914 break; 1915 case KVM_REG_PPC_CSIGR: 1916 vcpu->arch.csigr = set_reg_val(id, *val); 1917 break; 1918 case KVM_REG_PPC_TACR: 1919 vcpu->arch.tacr = set_reg_val(id, *val); 1920 break; 1921 case KVM_REG_PPC_TCSCR: 1922 vcpu->arch.tcscr = set_reg_val(id, *val); 1923 break; 1924 case KVM_REG_PPC_PID: 1925 vcpu->arch.pid = set_reg_val(id, *val); 1926 break; 1927 case KVM_REG_PPC_ACOP: 1928 vcpu->arch.acop = set_reg_val(id, *val); 1929 break; 1930 case KVM_REG_PPC_WORT: 1931 vcpu->arch.wort = set_reg_val(id, *val); 1932 break; 1933 case KVM_REG_PPC_TIDR: 1934 vcpu->arch.tid = set_reg_val(id, *val); 1935 break; 1936 case KVM_REG_PPC_PSSCR: 1937 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 1938 break; 1939 case KVM_REG_PPC_VPA_ADDR: 1940 addr = set_reg_val(id, *val); 1941 r = -EINVAL; 1942 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 1943 vcpu->arch.dtl.next_gpa)) 1944 break; 1945 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 1946 break; 1947 case KVM_REG_PPC_VPA_SLB: 1948 addr = val->vpaval.addr; 1949 len = val->vpaval.length; 1950 r = -EINVAL; 1951 if (addr && !vcpu->arch.vpa.next_gpa) 1952 break; 1953 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 1954 break; 1955 case KVM_REG_PPC_VPA_DTL: 1956 addr = val->vpaval.addr; 1957 len = val->vpaval.length; 1958 r = -EINVAL; 1959 if (addr && (len < sizeof(struct dtl_entry) || 1960 !vcpu->arch.vpa.next_gpa)) 1961 break; 1962 len -= len % sizeof(struct dtl_entry); 1963 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 1964 break; 1965 case KVM_REG_PPC_TB_OFFSET: 1966 /* round up to multiple of 2^24 */ 1967 vcpu->arch.vcore->tb_offset = 1968 ALIGN(set_reg_val(id, *val), 1UL << 24); 1969 break; 1970 case KVM_REG_PPC_LPCR: 1971 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 1972 break; 1973 case KVM_REG_PPC_LPCR_64: 1974 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 1975 break; 1976 case KVM_REG_PPC_PPR: 1977 vcpu->arch.ppr = set_reg_val(id, *val); 1978 break; 1979 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1980 case KVM_REG_PPC_TFHAR: 1981 vcpu->arch.tfhar = set_reg_val(id, *val); 1982 break; 1983 case KVM_REG_PPC_TFIAR: 1984 vcpu->arch.tfiar = set_reg_val(id, *val); 1985 break; 1986 case KVM_REG_PPC_TEXASR: 1987 vcpu->arch.texasr = set_reg_val(id, *val); 1988 break; 1989 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1990 i = id - KVM_REG_PPC_TM_GPR0; 1991 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 1992 break; 1993 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1994 { 1995 int j; 1996 i = id - KVM_REG_PPC_TM_VSR0; 1997 if (i < 32) 1998 for (j = 0; j < TS_FPRWIDTH; j++) 1999 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2000 else 2001 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2002 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2003 else 2004 r = -ENXIO; 2005 break; 2006 } 2007 case KVM_REG_PPC_TM_CR: 2008 vcpu->arch.cr_tm = set_reg_val(id, *val); 2009 break; 2010 case KVM_REG_PPC_TM_XER: 2011 vcpu->arch.xer_tm = set_reg_val(id, *val); 2012 break; 2013 case KVM_REG_PPC_TM_LR: 2014 vcpu->arch.lr_tm = set_reg_val(id, *val); 2015 break; 2016 case KVM_REG_PPC_TM_CTR: 2017 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2018 break; 2019 case KVM_REG_PPC_TM_FPSCR: 2020 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2021 break; 2022 case KVM_REG_PPC_TM_AMR: 2023 vcpu->arch.amr_tm = set_reg_val(id, *val); 2024 break; 2025 case KVM_REG_PPC_TM_PPR: 2026 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2027 break; 2028 case KVM_REG_PPC_TM_VRSAVE: 2029 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2030 break; 2031 case KVM_REG_PPC_TM_VSCR: 2032 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2033 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2034 else 2035 r = - ENXIO; 2036 break; 2037 case KVM_REG_PPC_TM_DSCR: 2038 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2039 break; 2040 case KVM_REG_PPC_TM_TAR: 2041 vcpu->arch.tar_tm = set_reg_val(id, *val); 2042 break; 2043 #endif 2044 case KVM_REG_PPC_ARCH_COMPAT: 2045 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2046 break; 2047 case KVM_REG_PPC_DEC_EXPIRY: 2048 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2049 vcpu->arch.vcore->tb_offset; 2050 break; 2051 case KVM_REG_PPC_ONLINE: 2052 i = set_reg_val(id, *val); 2053 if (i && !vcpu->arch.online) 2054 atomic_inc(&vcpu->arch.vcore->online_count); 2055 else if (!i && vcpu->arch.online) 2056 atomic_dec(&vcpu->arch.vcore->online_count); 2057 vcpu->arch.online = i; 2058 break; 2059 case KVM_REG_PPC_PTCR: 2060 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2061 break; 2062 default: 2063 r = -EINVAL; 2064 break; 2065 } 2066 2067 return r; 2068 } 2069 2070 /* 2071 * On POWER9, threads are independent and can be in different partitions. 2072 * Therefore we consider each thread to be a subcore. 2073 * There is a restriction that all threads have to be in the same 2074 * MMU mode (radix or HPT), unfortunately, but since we only support 2075 * HPT guests on a HPT host so far, that isn't an impediment yet. 2076 */ 2077 static int threads_per_vcore(struct kvm *kvm) 2078 { 2079 if (kvm->arch.threads_indep) 2080 return 1; 2081 return threads_per_subcore; 2082 } 2083 2084 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2085 { 2086 struct kvmppc_vcore *vcore; 2087 2088 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2089 2090 if (vcore == NULL) 2091 return NULL; 2092 2093 spin_lock_init(&vcore->lock); 2094 spin_lock_init(&vcore->stoltb_lock); 2095 init_swait_queue_head(&vcore->wq); 2096 vcore->preempt_tb = TB_NIL; 2097 vcore->lpcr = kvm->arch.lpcr; 2098 vcore->first_vcpuid = id; 2099 vcore->kvm = kvm; 2100 INIT_LIST_HEAD(&vcore->preempt_list); 2101 2102 return vcore; 2103 } 2104 2105 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2106 static struct debugfs_timings_element { 2107 const char *name; 2108 size_t offset; 2109 } timings[] = { 2110 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2111 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2112 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2113 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2114 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2115 }; 2116 2117 #define N_TIMINGS (ARRAY_SIZE(timings)) 2118 2119 struct debugfs_timings_state { 2120 struct kvm_vcpu *vcpu; 2121 unsigned int buflen; 2122 char buf[N_TIMINGS * 100]; 2123 }; 2124 2125 static int debugfs_timings_open(struct inode *inode, struct file *file) 2126 { 2127 struct kvm_vcpu *vcpu = inode->i_private; 2128 struct debugfs_timings_state *p; 2129 2130 p = kzalloc(sizeof(*p), GFP_KERNEL); 2131 if (!p) 2132 return -ENOMEM; 2133 2134 kvm_get_kvm(vcpu->kvm); 2135 p->vcpu = vcpu; 2136 file->private_data = p; 2137 2138 return nonseekable_open(inode, file); 2139 } 2140 2141 static int debugfs_timings_release(struct inode *inode, struct file *file) 2142 { 2143 struct debugfs_timings_state *p = file->private_data; 2144 2145 kvm_put_kvm(p->vcpu->kvm); 2146 kfree(p); 2147 return 0; 2148 } 2149 2150 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2151 size_t len, loff_t *ppos) 2152 { 2153 struct debugfs_timings_state *p = file->private_data; 2154 struct kvm_vcpu *vcpu = p->vcpu; 2155 char *s, *buf_end; 2156 struct kvmhv_tb_accumulator tb; 2157 u64 count; 2158 loff_t pos; 2159 ssize_t n; 2160 int i, loops; 2161 bool ok; 2162 2163 if (!p->buflen) { 2164 s = p->buf; 2165 buf_end = s + sizeof(p->buf); 2166 for (i = 0; i < N_TIMINGS; ++i) { 2167 struct kvmhv_tb_accumulator *acc; 2168 2169 acc = (struct kvmhv_tb_accumulator *) 2170 ((unsigned long)vcpu + timings[i].offset); 2171 ok = false; 2172 for (loops = 0; loops < 1000; ++loops) { 2173 count = acc->seqcount; 2174 if (!(count & 1)) { 2175 smp_rmb(); 2176 tb = *acc; 2177 smp_rmb(); 2178 if (count == acc->seqcount) { 2179 ok = true; 2180 break; 2181 } 2182 } 2183 udelay(1); 2184 } 2185 if (!ok) 2186 snprintf(s, buf_end - s, "%s: stuck\n", 2187 timings[i].name); 2188 else 2189 snprintf(s, buf_end - s, 2190 "%s: %llu %llu %llu %llu\n", 2191 timings[i].name, count / 2, 2192 tb_to_ns(tb.tb_total), 2193 tb_to_ns(tb.tb_min), 2194 tb_to_ns(tb.tb_max)); 2195 s += strlen(s); 2196 } 2197 p->buflen = s - p->buf; 2198 } 2199 2200 pos = *ppos; 2201 if (pos >= p->buflen) 2202 return 0; 2203 if (len > p->buflen - pos) 2204 len = p->buflen - pos; 2205 n = copy_to_user(buf, p->buf + pos, len); 2206 if (n) { 2207 if (n == len) 2208 return -EFAULT; 2209 len -= n; 2210 } 2211 *ppos = pos + len; 2212 return len; 2213 } 2214 2215 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2216 size_t len, loff_t *ppos) 2217 { 2218 return -EACCES; 2219 } 2220 2221 static const struct file_operations debugfs_timings_ops = { 2222 .owner = THIS_MODULE, 2223 .open = debugfs_timings_open, 2224 .release = debugfs_timings_release, 2225 .read = debugfs_timings_read, 2226 .write = debugfs_timings_write, 2227 .llseek = generic_file_llseek, 2228 }; 2229 2230 /* Create a debugfs directory for the vcpu */ 2231 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2232 { 2233 char buf[16]; 2234 struct kvm *kvm = vcpu->kvm; 2235 2236 snprintf(buf, sizeof(buf), "vcpu%u", id); 2237 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir)) 2238 return; 2239 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2240 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir)) 2241 return; 2242 vcpu->arch.debugfs_timings = 2243 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, 2244 vcpu, &debugfs_timings_ops); 2245 } 2246 2247 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2248 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2249 { 2250 } 2251 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2252 2253 static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm, 2254 unsigned int id) 2255 { 2256 struct kvm_vcpu *vcpu; 2257 int err; 2258 int core; 2259 struct kvmppc_vcore *vcore; 2260 2261 err = -ENOMEM; 2262 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); 2263 if (!vcpu) 2264 goto out; 2265 2266 err = kvm_vcpu_init(vcpu, kvm, id); 2267 if (err) 2268 goto free_vcpu; 2269 2270 vcpu->arch.shared = &vcpu->arch.shregs; 2271 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2272 /* 2273 * The shared struct is never shared on HV, 2274 * so we can always use host endianness 2275 */ 2276 #ifdef __BIG_ENDIAN__ 2277 vcpu->arch.shared_big_endian = true; 2278 #else 2279 vcpu->arch.shared_big_endian = false; 2280 #endif 2281 #endif 2282 vcpu->arch.mmcr[0] = MMCR0_FC; 2283 vcpu->arch.ctrl = CTRL_RUNLATCH; 2284 /* default to host PVR, since we can't spoof it */ 2285 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2286 spin_lock_init(&vcpu->arch.vpa_update_lock); 2287 spin_lock_init(&vcpu->arch.tbacct_lock); 2288 vcpu->arch.busy_preempt = TB_NIL; 2289 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2290 2291 /* 2292 * Set the default HFSCR for the guest from the host value. 2293 * This value is only used on POWER9. 2294 * On POWER9, we want to virtualize the doorbell facility, so we 2295 * don't set the HFSCR_MSGP bit, and that causes those instructions 2296 * to trap and then we emulate them. 2297 */ 2298 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2299 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP; 2300 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2301 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2302 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2303 vcpu->arch.hfscr |= HFSCR_TM; 2304 } 2305 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2306 vcpu->arch.hfscr |= HFSCR_TM; 2307 2308 kvmppc_mmu_book3s_hv_init(vcpu); 2309 2310 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2311 2312 init_waitqueue_head(&vcpu->arch.cpu_run); 2313 2314 mutex_lock(&kvm->lock); 2315 vcore = NULL; 2316 err = -EINVAL; 2317 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2318 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2319 pr_devel("KVM: VCPU ID too high\n"); 2320 core = KVM_MAX_VCORES; 2321 } else { 2322 BUG_ON(kvm->arch.smt_mode != 1); 2323 core = kvmppc_pack_vcpu_id(kvm, id); 2324 } 2325 } else { 2326 core = id / kvm->arch.smt_mode; 2327 } 2328 if (core < KVM_MAX_VCORES) { 2329 vcore = kvm->arch.vcores[core]; 2330 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2331 pr_devel("KVM: collision on id %u", id); 2332 vcore = NULL; 2333 } else if (!vcore) { 2334 /* 2335 * Take mmu_setup_lock for mutual exclusion 2336 * with kvmppc_update_lpcr(). 2337 */ 2338 err = -ENOMEM; 2339 vcore = kvmppc_vcore_create(kvm, 2340 id & ~(kvm->arch.smt_mode - 1)); 2341 mutex_lock(&kvm->arch.mmu_setup_lock); 2342 kvm->arch.vcores[core] = vcore; 2343 kvm->arch.online_vcores++; 2344 mutex_unlock(&kvm->arch.mmu_setup_lock); 2345 } 2346 } 2347 mutex_unlock(&kvm->lock); 2348 2349 if (!vcore) 2350 goto free_vcpu; 2351 2352 spin_lock(&vcore->lock); 2353 ++vcore->num_threads; 2354 spin_unlock(&vcore->lock); 2355 vcpu->arch.vcore = vcore; 2356 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2357 vcpu->arch.thread_cpu = -1; 2358 vcpu->arch.prev_cpu = -1; 2359 2360 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2361 kvmppc_sanity_check(vcpu); 2362 2363 debugfs_vcpu_init(vcpu, id); 2364 2365 return vcpu; 2366 2367 free_vcpu: 2368 kmem_cache_free(kvm_vcpu_cache, vcpu); 2369 out: 2370 return ERR_PTR(err); 2371 } 2372 2373 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2374 unsigned long flags) 2375 { 2376 int err; 2377 int esmt = 0; 2378 2379 if (flags) 2380 return -EINVAL; 2381 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2382 return -EINVAL; 2383 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2384 /* 2385 * On POWER8 (or POWER7), the threading mode is "strict", 2386 * so we pack smt_mode vcpus per vcore. 2387 */ 2388 if (smt_mode > threads_per_subcore) 2389 return -EINVAL; 2390 } else { 2391 /* 2392 * On POWER9, the threading mode is "loose", 2393 * so each vcpu gets its own vcore. 2394 */ 2395 esmt = smt_mode; 2396 smt_mode = 1; 2397 } 2398 mutex_lock(&kvm->lock); 2399 err = -EBUSY; 2400 if (!kvm->arch.online_vcores) { 2401 kvm->arch.smt_mode = smt_mode; 2402 kvm->arch.emul_smt_mode = esmt; 2403 err = 0; 2404 } 2405 mutex_unlock(&kvm->lock); 2406 2407 return err; 2408 } 2409 2410 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2411 { 2412 if (vpa->pinned_addr) 2413 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2414 vpa->dirty); 2415 } 2416 2417 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2418 { 2419 spin_lock(&vcpu->arch.vpa_update_lock); 2420 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2421 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2422 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2423 spin_unlock(&vcpu->arch.vpa_update_lock); 2424 kvm_vcpu_uninit(vcpu); 2425 kmem_cache_free(kvm_vcpu_cache, vcpu); 2426 } 2427 2428 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2429 { 2430 /* Indicate we want to get back into the guest */ 2431 return 1; 2432 } 2433 2434 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2435 { 2436 unsigned long dec_nsec, now; 2437 2438 now = get_tb(); 2439 if (now > vcpu->arch.dec_expires) { 2440 /* decrementer has already gone negative */ 2441 kvmppc_core_queue_dec(vcpu); 2442 kvmppc_core_prepare_to_enter(vcpu); 2443 return; 2444 } 2445 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2446 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2447 vcpu->arch.timer_running = 1; 2448 } 2449 2450 static void kvmppc_end_cede(struct kvm_vcpu *vcpu) 2451 { 2452 vcpu->arch.ceded = 0; 2453 if (vcpu->arch.timer_running) { 2454 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2455 vcpu->arch.timer_running = 0; 2456 } 2457 } 2458 2459 extern int __kvmppc_vcore_entry(void); 2460 2461 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2462 struct kvm_vcpu *vcpu) 2463 { 2464 u64 now; 2465 2466 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2467 return; 2468 spin_lock_irq(&vcpu->arch.tbacct_lock); 2469 now = mftb(); 2470 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2471 vcpu->arch.stolen_logged; 2472 vcpu->arch.busy_preempt = now; 2473 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2474 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2475 --vc->n_runnable; 2476 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2477 } 2478 2479 static int kvmppc_grab_hwthread(int cpu) 2480 { 2481 struct paca_struct *tpaca; 2482 long timeout = 10000; 2483 2484 tpaca = paca_ptrs[cpu]; 2485 2486 /* Ensure the thread won't go into the kernel if it wakes */ 2487 tpaca->kvm_hstate.kvm_vcpu = NULL; 2488 tpaca->kvm_hstate.kvm_vcore = NULL; 2489 tpaca->kvm_hstate.napping = 0; 2490 smp_wmb(); 2491 tpaca->kvm_hstate.hwthread_req = 1; 2492 2493 /* 2494 * If the thread is already executing in the kernel (e.g. handling 2495 * a stray interrupt), wait for it to get back to nap mode. 2496 * The smp_mb() is to ensure that our setting of hwthread_req 2497 * is visible before we look at hwthread_state, so if this 2498 * races with the code at system_reset_pSeries and the thread 2499 * misses our setting of hwthread_req, we are sure to see its 2500 * setting of hwthread_state, and vice versa. 2501 */ 2502 smp_mb(); 2503 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2504 if (--timeout <= 0) { 2505 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2506 return -EBUSY; 2507 } 2508 udelay(1); 2509 } 2510 return 0; 2511 } 2512 2513 static void kvmppc_release_hwthread(int cpu) 2514 { 2515 struct paca_struct *tpaca; 2516 2517 tpaca = paca_ptrs[cpu]; 2518 tpaca->kvm_hstate.hwthread_req = 0; 2519 tpaca->kvm_hstate.kvm_vcpu = NULL; 2520 tpaca->kvm_hstate.kvm_vcore = NULL; 2521 tpaca->kvm_hstate.kvm_split_mode = NULL; 2522 } 2523 2524 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2525 { 2526 struct kvm_nested_guest *nested = vcpu->arch.nested; 2527 cpumask_t *cpu_in_guest; 2528 int i; 2529 2530 cpu = cpu_first_thread_sibling(cpu); 2531 if (nested) { 2532 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2533 cpu_in_guest = &nested->cpu_in_guest; 2534 } else { 2535 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2536 cpu_in_guest = &kvm->arch.cpu_in_guest; 2537 } 2538 /* 2539 * Make sure setting of bit in need_tlb_flush precedes 2540 * testing of cpu_in_guest bits. The matching barrier on 2541 * the other side is the first smp_mb() in kvmppc_run_core(). 2542 */ 2543 smp_mb(); 2544 for (i = 0; i < threads_per_core; ++i) 2545 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2546 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2547 } 2548 2549 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2550 { 2551 struct kvm_nested_guest *nested = vcpu->arch.nested; 2552 struct kvm *kvm = vcpu->kvm; 2553 int prev_cpu; 2554 2555 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2556 return; 2557 2558 if (nested) 2559 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2560 else 2561 prev_cpu = vcpu->arch.prev_cpu; 2562 2563 /* 2564 * With radix, the guest can do TLB invalidations itself, 2565 * and it could choose to use the local form (tlbiel) if 2566 * it is invalidating a translation that has only ever been 2567 * used on one vcpu. However, that doesn't mean it has 2568 * only ever been used on one physical cpu, since vcpus 2569 * can move around between pcpus. To cope with this, when 2570 * a vcpu moves from one pcpu to another, we need to tell 2571 * any vcpus running on the same core as this vcpu previously 2572 * ran to flush the TLB. The TLB is shared between threads, 2573 * so we use a single bit in .need_tlb_flush for all 4 threads. 2574 */ 2575 if (prev_cpu != pcpu) { 2576 if (prev_cpu >= 0 && 2577 cpu_first_thread_sibling(prev_cpu) != 2578 cpu_first_thread_sibling(pcpu)) 2579 radix_flush_cpu(kvm, prev_cpu, vcpu); 2580 if (nested) 2581 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2582 else 2583 vcpu->arch.prev_cpu = pcpu; 2584 } 2585 } 2586 2587 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2588 { 2589 int cpu; 2590 struct paca_struct *tpaca; 2591 struct kvm *kvm = vc->kvm; 2592 2593 cpu = vc->pcpu; 2594 if (vcpu) { 2595 if (vcpu->arch.timer_running) { 2596 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2597 vcpu->arch.timer_running = 0; 2598 } 2599 cpu += vcpu->arch.ptid; 2600 vcpu->cpu = vc->pcpu; 2601 vcpu->arch.thread_cpu = cpu; 2602 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2603 } 2604 tpaca = paca_ptrs[cpu]; 2605 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2606 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2607 tpaca->kvm_hstate.fake_suspend = 0; 2608 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2609 smp_wmb(); 2610 tpaca->kvm_hstate.kvm_vcore = vc; 2611 if (cpu != smp_processor_id()) 2612 kvmppc_ipi_thread(cpu); 2613 } 2614 2615 static void kvmppc_wait_for_nap(int n_threads) 2616 { 2617 int cpu = smp_processor_id(); 2618 int i, loops; 2619 2620 if (n_threads <= 1) 2621 return; 2622 for (loops = 0; loops < 1000000; ++loops) { 2623 /* 2624 * Check if all threads are finished. 2625 * We set the vcore pointer when starting a thread 2626 * and the thread clears it when finished, so we look 2627 * for any threads that still have a non-NULL vcore ptr. 2628 */ 2629 for (i = 1; i < n_threads; ++i) 2630 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2631 break; 2632 if (i == n_threads) { 2633 HMT_medium(); 2634 return; 2635 } 2636 HMT_low(); 2637 } 2638 HMT_medium(); 2639 for (i = 1; i < n_threads; ++i) 2640 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2641 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2642 } 2643 2644 /* 2645 * Check that we are on thread 0 and that any other threads in 2646 * this core are off-line. Then grab the threads so they can't 2647 * enter the kernel. 2648 */ 2649 static int on_primary_thread(void) 2650 { 2651 int cpu = smp_processor_id(); 2652 int thr; 2653 2654 /* Are we on a primary subcore? */ 2655 if (cpu_thread_in_subcore(cpu)) 2656 return 0; 2657 2658 thr = 0; 2659 while (++thr < threads_per_subcore) 2660 if (cpu_online(cpu + thr)) 2661 return 0; 2662 2663 /* Grab all hw threads so they can't go into the kernel */ 2664 for (thr = 1; thr < threads_per_subcore; ++thr) { 2665 if (kvmppc_grab_hwthread(cpu + thr)) { 2666 /* Couldn't grab one; let the others go */ 2667 do { 2668 kvmppc_release_hwthread(cpu + thr); 2669 } while (--thr > 0); 2670 return 0; 2671 } 2672 } 2673 return 1; 2674 } 2675 2676 /* 2677 * A list of virtual cores for each physical CPU. 2678 * These are vcores that could run but their runner VCPU tasks are 2679 * (or may be) preempted. 2680 */ 2681 struct preempted_vcore_list { 2682 struct list_head list; 2683 spinlock_t lock; 2684 }; 2685 2686 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2687 2688 static void init_vcore_lists(void) 2689 { 2690 int cpu; 2691 2692 for_each_possible_cpu(cpu) { 2693 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2694 spin_lock_init(&lp->lock); 2695 INIT_LIST_HEAD(&lp->list); 2696 } 2697 } 2698 2699 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2700 { 2701 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2702 2703 vc->vcore_state = VCORE_PREEMPT; 2704 vc->pcpu = smp_processor_id(); 2705 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2706 spin_lock(&lp->lock); 2707 list_add_tail(&vc->preempt_list, &lp->list); 2708 spin_unlock(&lp->lock); 2709 } 2710 2711 /* Start accumulating stolen time */ 2712 kvmppc_core_start_stolen(vc); 2713 } 2714 2715 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2716 { 2717 struct preempted_vcore_list *lp; 2718 2719 kvmppc_core_end_stolen(vc); 2720 if (!list_empty(&vc->preempt_list)) { 2721 lp = &per_cpu(preempted_vcores, vc->pcpu); 2722 spin_lock(&lp->lock); 2723 list_del_init(&vc->preempt_list); 2724 spin_unlock(&lp->lock); 2725 } 2726 vc->vcore_state = VCORE_INACTIVE; 2727 } 2728 2729 /* 2730 * This stores information about the virtual cores currently 2731 * assigned to a physical core. 2732 */ 2733 struct core_info { 2734 int n_subcores; 2735 int max_subcore_threads; 2736 int total_threads; 2737 int subcore_threads[MAX_SUBCORES]; 2738 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2739 }; 2740 2741 /* 2742 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2743 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2744 */ 2745 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2746 2747 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2748 { 2749 memset(cip, 0, sizeof(*cip)); 2750 cip->n_subcores = 1; 2751 cip->max_subcore_threads = vc->num_threads; 2752 cip->total_threads = vc->num_threads; 2753 cip->subcore_threads[0] = vc->num_threads; 2754 cip->vc[0] = vc; 2755 } 2756 2757 static bool subcore_config_ok(int n_subcores, int n_threads) 2758 { 2759 /* 2760 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2761 * split-core mode, with one thread per subcore. 2762 */ 2763 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2764 return n_subcores <= 4 && n_threads == 1; 2765 2766 /* On POWER8, can only dynamically split if unsplit to begin with */ 2767 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2768 return false; 2769 if (n_subcores > MAX_SUBCORES) 2770 return false; 2771 if (n_subcores > 1) { 2772 if (!(dynamic_mt_modes & 2)) 2773 n_subcores = 4; 2774 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2775 return false; 2776 } 2777 2778 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2779 } 2780 2781 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2782 { 2783 vc->entry_exit_map = 0; 2784 vc->in_guest = 0; 2785 vc->napping_threads = 0; 2786 vc->conferring_threads = 0; 2787 vc->tb_offset_applied = 0; 2788 } 2789 2790 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2791 { 2792 int n_threads = vc->num_threads; 2793 int sub; 2794 2795 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2796 return false; 2797 2798 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2799 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2800 return false; 2801 2802 /* Some POWER9 chips require all threads to be in the same MMU mode */ 2803 if (no_mixing_hpt_and_radix && 2804 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm)) 2805 return false; 2806 2807 if (n_threads < cip->max_subcore_threads) 2808 n_threads = cip->max_subcore_threads; 2809 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2810 return false; 2811 cip->max_subcore_threads = n_threads; 2812 2813 sub = cip->n_subcores; 2814 ++cip->n_subcores; 2815 cip->total_threads += vc->num_threads; 2816 cip->subcore_threads[sub] = vc->num_threads; 2817 cip->vc[sub] = vc; 2818 init_vcore_to_run(vc); 2819 list_del_init(&vc->preempt_list); 2820 2821 return true; 2822 } 2823 2824 /* 2825 * Work out whether it is possible to piggyback the execution of 2826 * vcore *pvc onto the execution of the other vcores described in *cip. 2827 */ 2828 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2829 int target_threads) 2830 { 2831 if (cip->total_threads + pvc->num_threads > target_threads) 2832 return false; 2833 2834 return can_dynamic_split(pvc, cip); 2835 } 2836 2837 static void prepare_threads(struct kvmppc_vcore *vc) 2838 { 2839 int i; 2840 struct kvm_vcpu *vcpu; 2841 2842 for_each_runnable_thread(i, vcpu, vc) { 2843 if (signal_pending(vcpu->arch.run_task)) 2844 vcpu->arch.ret = -EINTR; 2845 else if (vcpu->arch.vpa.update_pending || 2846 vcpu->arch.slb_shadow.update_pending || 2847 vcpu->arch.dtl.update_pending) 2848 vcpu->arch.ret = RESUME_GUEST; 2849 else 2850 continue; 2851 kvmppc_remove_runnable(vc, vcpu); 2852 wake_up(&vcpu->arch.cpu_run); 2853 } 2854 } 2855 2856 static void collect_piggybacks(struct core_info *cip, int target_threads) 2857 { 2858 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2859 struct kvmppc_vcore *pvc, *vcnext; 2860 2861 spin_lock(&lp->lock); 2862 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2863 if (!spin_trylock(&pvc->lock)) 2864 continue; 2865 prepare_threads(pvc); 2866 if (!pvc->n_runnable) { 2867 list_del_init(&pvc->preempt_list); 2868 if (pvc->runner == NULL) { 2869 pvc->vcore_state = VCORE_INACTIVE; 2870 kvmppc_core_end_stolen(pvc); 2871 } 2872 spin_unlock(&pvc->lock); 2873 continue; 2874 } 2875 if (!can_piggyback(pvc, cip, target_threads)) { 2876 spin_unlock(&pvc->lock); 2877 continue; 2878 } 2879 kvmppc_core_end_stolen(pvc); 2880 pvc->vcore_state = VCORE_PIGGYBACK; 2881 if (cip->total_threads >= target_threads) 2882 break; 2883 } 2884 spin_unlock(&lp->lock); 2885 } 2886 2887 static bool recheck_signals(struct core_info *cip) 2888 { 2889 int sub, i; 2890 struct kvm_vcpu *vcpu; 2891 2892 for (sub = 0; sub < cip->n_subcores; ++sub) 2893 for_each_runnable_thread(i, vcpu, cip->vc[sub]) 2894 if (signal_pending(vcpu->arch.run_task)) 2895 return true; 2896 return false; 2897 } 2898 2899 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2900 { 2901 int still_running = 0, i; 2902 u64 now; 2903 long ret; 2904 struct kvm_vcpu *vcpu; 2905 2906 spin_lock(&vc->lock); 2907 now = get_tb(); 2908 for_each_runnable_thread(i, vcpu, vc) { 2909 /* 2910 * It's safe to unlock the vcore in the loop here, because 2911 * for_each_runnable_thread() is safe against removal of 2912 * the vcpu, and the vcore state is VCORE_EXITING here, 2913 * so any vcpus becoming runnable will have their arch.trap 2914 * set to zero and can't actually run in the guest. 2915 */ 2916 spin_unlock(&vc->lock); 2917 /* cancel pending dec exception if dec is positive */ 2918 if (now < vcpu->arch.dec_expires && 2919 kvmppc_core_pending_dec(vcpu)) 2920 kvmppc_core_dequeue_dec(vcpu); 2921 2922 trace_kvm_guest_exit(vcpu); 2923 2924 ret = RESUME_GUEST; 2925 if (vcpu->arch.trap) 2926 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu, 2927 vcpu->arch.run_task); 2928 2929 vcpu->arch.ret = ret; 2930 vcpu->arch.trap = 0; 2931 2932 spin_lock(&vc->lock); 2933 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 2934 if (vcpu->arch.pending_exceptions) 2935 kvmppc_core_prepare_to_enter(vcpu); 2936 if (vcpu->arch.ceded) 2937 kvmppc_set_timer(vcpu); 2938 else 2939 ++still_running; 2940 } else { 2941 kvmppc_remove_runnable(vc, vcpu); 2942 wake_up(&vcpu->arch.cpu_run); 2943 } 2944 } 2945 if (!is_master) { 2946 if (still_running > 0) { 2947 kvmppc_vcore_preempt(vc); 2948 } else if (vc->runner) { 2949 vc->vcore_state = VCORE_PREEMPT; 2950 kvmppc_core_start_stolen(vc); 2951 } else { 2952 vc->vcore_state = VCORE_INACTIVE; 2953 } 2954 if (vc->n_runnable > 0 && vc->runner == NULL) { 2955 /* make sure there's a candidate runner awake */ 2956 i = -1; 2957 vcpu = next_runnable_thread(vc, &i); 2958 wake_up(&vcpu->arch.cpu_run); 2959 } 2960 } 2961 spin_unlock(&vc->lock); 2962 } 2963 2964 /* 2965 * Clear core from the list of active host cores as we are about to 2966 * enter the guest. Only do this if it is the primary thread of the 2967 * core (not if a subcore) that is entering the guest. 2968 */ 2969 static inline int kvmppc_clear_host_core(unsigned int cpu) 2970 { 2971 int core; 2972 2973 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2974 return 0; 2975 /* 2976 * Memory barrier can be omitted here as we will do a smp_wmb() 2977 * later in kvmppc_start_thread and we need ensure that state is 2978 * visible to other CPUs only after we enter guest. 2979 */ 2980 core = cpu >> threads_shift; 2981 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 2982 return 0; 2983 } 2984 2985 /* 2986 * Advertise this core as an active host core since we exited the guest 2987 * Only need to do this if it is the primary thread of the core that is 2988 * exiting. 2989 */ 2990 static inline int kvmppc_set_host_core(unsigned int cpu) 2991 { 2992 int core; 2993 2994 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2995 return 0; 2996 2997 /* 2998 * Memory barrier can be omitted here because we do a spin_unlock 2999 * immediately after this which provides the memory barrier. 3000 */ 3001 core = cpu >> threads_shift; 3002 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3003 return 0; 3004 } 3005 3006 static void set_irq_happened(int trap) 3007 { 3008 switch (trap) { 3009 case BOOK3S_INTERRUPT_EXTERNAL: 3010 local_paca->irq_happened |= PACA_IRQ_EE; 3011 break; 3012 case BOOK3S_INTERRUPT_H_DOORBELL: 3013 local_paca->irq_happened |= PACA_IRQ_DBELL; 3014 break; 3015 case BOOK3S_INTERRUPT_HMI: 3016 local_paca->irq_happened |= PACA_IRQ_HMI; 3017 break; 3018 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3019 replay_system_reset(); 3020 break; 3021 } 3022 } 3023 3024 /* 3025 * Run a set of guest threads on a physical core. 3026 * Called with vc->lock held. 3027 */ 3028 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3029 { 3030 struct kvm_vcpu *vcpu; 3031 int i; 3032 int srcu_idx; 3033 struct core_info core_info; 3034 struct kvmppc_vcore *pvc; 3035 struct kvm_split_mode split_info, *sip; 3036 int split, subcore_size, active; 3037 int sub; 3038 bool thr0_done; 3039 unsigned long cmd_bit, stat_bit; 3040 int pcpu, thr; 3041 int target_threads; 3042 int controlled_threads; 3043 int trap; 3044 bool is_power8; 3045 bool hpt_on_radix; 3046 3047 /* 3048 * Remove from the list any threads that have a signal pending 3049 * or need a VPA update done 3050 */ 3051 prepare_threads(vc); 3052 3053 /* if the runner is no longer runnable, let the caller pick a new one */ 3054 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3055 return; 3056 3057 /* 3058 * Initialize *vc. 3059 */ 3060 init_vcore_to_run(vc); 3061 vc->preempt_tb = TB_NIL; 3062 3063 /* 3064 * Number of threads that we will be controlling: the same as 3065 * the number of threads per subcore, except on POWER9, 3066 * where it's 1 because the threads are (mostly) independent. 3067 */ 3068 controlled_threads = threads_per_vcore(vc->kvm); 3069 3070 /* 3071 * Make sure we are running on primary threads, and that secondary 3072 * threads are offline. Also check if the number of threads in this 3073 * guest are greater than the current system threads per guest. 3074 * On POWER9, we need to be not in independent-threads mode if 3075 * this is a HPT guest on a radix host machine where the 3076 * CPU threads may not be in different MMU modes. 3077 */ 3078 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() && 3079 !kvm_is_radix(vc->kvm); 3080 if (((controlled_threads > 1) && 3081 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) || 3082 (hpt_on_radix && vc->kvm->arch.threads_indep)) { 3083 for_each_runnable_thread(i, vcpu, vc) { 3084 vcpu->arch.ret = -EBUSY; 3085 kvmppc_remove_runnable(vc, vcpu); 3086 wake_up(&vcpu->arch.cpu_run); 3087 } 3088 goto out; 3089 } 3090 3091 /* 3092 * See if we could run any other vcores on the physical core 3093 * along with this one. 3094 */ 3095 init_core_info(&core_info, vc); 3096 pcpu = smp_processor_id(); 3097 target_threads = controlled_threads; 3098 if (target_smt_mode && target_smt_mode < target_threads) 3099 target_threads = target_smt_mode; 3100 if (vc->num_threads < target_threads) 3101 collect_piggybacks(&core_info, target_threads); 3102 3103 /* 3104 * On radix, arrange for TLB flushing if necessary. 3105 * This has to be done before disabling interrupts since 3106 * it uses smp_call_function(). 3107 */ 3108 pcpu = smp_processor_id(); 3109 if (kvm_is_radix(vc->kvm)) { 3110 for (sub = 0; sub < core_info.n_subcores; ++sub) 3111 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3112 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3113 } 3114 3115 /* 3116 * Hard-disable interrupts, and check resched flag and signals. 3117 * If we need to reschedule or deliver a signal, clean up 3118 * and return without going into the guest(s). 3119 * If the mmu_ready flag has been cleared, don't go into the 3120 * guest because that means a HPT resize operation is in progress. 3121 */ 3122 local_irq_disable(); 3123 hard_irq_disable(); 3124 if (lazy_irq_pending() || need_resched() || 3125 recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) { 3126 local_irq_enable(); 3127 vc->vcore_state = VCORE_INACTIVE; 3128 /* Unlock all except the primary vcore */ 3129 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3130 pvc = core_info.vc[sub]; 3131 /* Put back on to the preempted vcores list */ 3132 kvmppc_vcore_preempt(pvc); 3133 spin_unlock(&pvc->lock); 3134 } 3135 for (i = 0; i < controlled_threads; ++i) 3136 kvmppc_release_hwthread(pcpu + i); 3137 return; 3138 } 3139 3140 kvmppc_clear_host_core(pcpu); 3141 3142 /* Decide on micro-threading (split-core) mode */ 3143 subcore_size = threads_per_subcore; 3144 cmd_bit = stat_bit = 0; 3145 split = core_info.n_subcores; 3146 sip = NULL; 3147 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3148 && !cpu_has_feature(CPU_FTR_ARCH_300); 3149 3150 if (split > 1 || hpt_on_radix) { 3151 sip = &split_info; 3152 memset(&split_info, 0, sizeof(split_info)); 3153 for (sub = 0; sub < core_info.n_subcores; ++sub) 3154 split_info.vc[sub] = core_info.vc[sub]; 3155 3156 if (is_power8) { 3157 if (split == 2 && (dynamic_mt_modes & 2)) { 3158 cmd_bit = HID0_POWER8_1TO2LPAR; 3159 stat_bit = HID0_POWER8_2LPARMODE; 3160 } else { 3161 split = 4; 3162 cmd_bit = HID0_POWER8_1TO4LPAR; 3163 stat_bit = HID0_POWER8_4LPARMODE; 3164 } 3165 subcore_size = MAX_SMT_THREADS / split; 3166 split_info.rpr = mfspr(SPRN_RPR); 3167 split_info.pmmar = mfspr(SPRN_PMMAR); 3168 split_info.ldbar = mfspr(SPRN_LDBAR); 3169 split_info.subcore_size = subcore_size; 3170 } else { 3171 split_info.subcore_size = 1; 3172 if (hpt_on_radix) { 3173 /* Use the split_info for LPCR/LPIDR changes */ 3174 split_info.lpcr_req = vc->lpcr; 3175 split_info.lpidr_req = vc->kvm->arch.lpid; 3176 split_info.host_lpcr = vc->kvm->arch.host_lpcr; 3177 split_info.do_set = 1; 3178 } 3179 } 3180 3181 /* order writes to split_info before kvm_split_mode pointer */ 3182 smp_wmb(); 3183 } 3184 3185 for (thr = 0; thr < controlled_threads; ++thr) { 3186 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3187 3188 paca->kvm_hstate.tid = thr; 3189 paca->kvm_hstate.napping = 0; 3190 paca->kvm_hstate.kvm_split_mode = sip; 3191 } 3192 3193 /* Initiate micro-threading (split-core) on POWER8 if required */ 3194 if (cmd_bit) { 3195 unsigned long hid0 = mfspr(SPRN_HID0); 3196 3197 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3198 mb(); 3199 mtspr(SPRN_HID0, hid0); 3200 isync(); 3201 for (;;) { 3202 hid0 = mfspr(SPRN_HID0); 3203 if (hid0 & stat_bit) 3204 break; 3205 cpu_relax(); 3206 } 3207 } 3208 3209 /* 3210 * On POWER8, set RWMR register. 3211 * Since it only affects PURR and SPURR, it doesn't affect 3212 * the host, so we don't save/restore the host value. 3213 */ 3214 if (is_power8) { 3215 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3216 int n_online = atomic_read(&vc->online_count); 3217 3218 /* 3219 * Use the 8-thread value if we're doing split-core 3220 * or if the vcore's online count looks bogus. 3221 */ 3222 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3223 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3224 rwmr_val = p8_rwmr_values[n_online]; 3225 mtspr(SPRN_RWMR, rwmr_val); 3226 } 3227 3228 /* Start all the threads */ 3229 active = 0; 3230 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3231 thr = is_power8 ? subcore_thread_map[sub] : sub; 3232 thr0_done = false; 3233 active |= 1 << thr; 3234 pvc = core_info.vc[sub]; 3235 pvc->pcpu = pcpu + thr; 3236 for_each_runnable_thread(i, vcpu, pvc) { 3237 kvmppc_start_thread(vcpu, pvc); 3238 kvmppc_create_dtl_entry(vcpu, pvc); 3239 trace_kvm_guest_enter(vcpu); 3240 if (!vcpu->arch.ptid) 3241 thr0_done = true; 3242 active |= 1 << (thr + vcpu->arch.ptid); 3243 } 3244 /* 3245 * We need to start the first thread of each subcore 3246 * even if it doesn't have a vcpu. 3247 */ 3248 if (!thr0_done) 3249 kvmppc_start_thread(NULL, pvc); 3250 } 3251 3252 /* 3253 * Ensure that split_info.do_nap is set after setting 3254 * the vcore pointer in the PACA of the secondaries. 3255 */ 3256 smp_mb(); 3257 3258 /* 3259 * When doing micro-threading, poke the inactive threads as well. 3260 * This gets them to the nap instruction after kvm_do_nap, 3261 * which reduces the time taken to unsplit later. 3262 * For POWER9 HPT guest on radix host, we need all the secondary 3263 * threads woken up so they can do the LPCR/LPIDR change. 3264 */ 3265 if (cmd_bit || hpt_on_radix) { 3266 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3267 for (thr = 1; thr < threads_per_subcore; ++thr) 3268 if (!(active & (1 << thr))) 3269 kvmppc_ipi_thread(pcpu + thr); 3270 } 3271 3272 vc->vcore_state = VCORE_RUNNING; 3273 preempt_disable(); 3274 3275 trace_kvmppc_run_core(vc, 0); 3276 3277 for (sub = 0; sub < core_info.n_subcores; ++sub) 3278 spin_unlock(&core_info.vc[sub]->lock); 3279 3280 guest_enter_irqoff(); 3281 3282 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3283 3284 this_cpu_disable_ftrace(); 3285 3286 /* 3287 * Interrupts will be enabled once we get into the guest, 3288 * so tell lockdep that we're about to enable interrupts. 3289 */ 3290 trace_hardirqs_on(); 3291 3292 trap = __kvmppc_vcore_entry(); 3293 3294 trace_hardirqs_off(); 3295 3296 this_cpu_enable_ftrace(); 3297 3298 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3299 3300 set_irq_happened(trap); 3301 3302 spin_lock(&vc->lock); 3303 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3304 vc->vcore_state = VCORE_EXITING; 3305 3306 /* wait for secondary threads to finish writing their state to memory */ 3307 kvmppc_wait_for_nap(controlled_threads); 3308 3309 /* Return to whole-core mode if we split the core earlier */ 3310 if (cmd_bit) { 3311 unsigned long hid0 = mfspr(SPRN_HID0); 3312 unsigned long loops = 0; 3313 3314 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3315 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3316 mb(); 3317 mtspr(SPRN_HID0, hid0); 3318 isync(); 3319 for (;;) { 3320 hid0 = mfspr(SPRN_HID0); 3321 if (!(hid0 & stat_bit)) 3322 break; 3323 cpu_relax(); 3324 ++loops; 3325 } 3326 } else if (hpt_on_radix) { 3327 /* Wait for all threads to have seen final sync */ 3328 for (thr = 1; thr < controlled_threads; ++thr) { 3329 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3330 3331 while (paca->kvm_hstate.kvm_split_mode) { 3332 HMT_low(); 3333 barrier(); 3334 } 3335 HMT_medium(); 3336 } 3337 } 3338 split_info.do_nap = 0; 3339 3340 kvmppc_set_host_core(pcpu); 3341 3342 local_irq_enable(); 3343 guest_exit(); 3344 3345 /* Let secondaries go back to the offline loop */ 3346 for (i = 0; i < controlled_threads; ++i) { 3347 kvmppc_release_hwthread(pcpu + i); 3348 if (sip && sip->napped[i]) 3349 kvmppc_ipi_thread(pcpu + i); 3350 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3351 } 3352 3353 spin_unlock(&vc->lock); 3354 3355 /* make sure updates to secondary vcpu structs are visible now */ 3356 smp_mb(); 3357 3358 preempt_enable(); 3359 3360 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3361 pvc = core_info.vc[sub]; 3362 post_guest_process(pvc, pvc == vc); 3363 } 3364 3365 spin_lock(&vc->lock); 3366 3367 out: 3368 vc->vcore_state = VCORE_INACTIVE; 3369 trace_kvmppc_run_core(vc, 1); 3370 } 3371 3372 /* 3373 * Load up hypervisor-mode registers on P9. 3374 */ 3375 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3376 unsigned long lpcr) 3377 { 3378 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3379 s64 hdec; 3380 u64 tb, purr, spurr; 3381 int trap; 3382 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3383 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3384 unsigned long host_dawr = mfspr(SPRN_DAWR); 3385 unsigned long host_dawrx = mfspr(SPRN_DAWRX); 3386 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3387 unsigned long host_pidr = mfspr(SPRN_PID); 3388 3389 hdec = time_limit - mftb(); 3390 if (hdec < 0) 3391 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3392 mtspr(SPRN_HDEC, hdec); 3393 3394 if (vc->tb_offset) { 3395 u64 new_tb = mftb() + vc->tb_offset; 3396 mtspr(SPRN_TBU40, new_tb); 3397 tb = mftb(); 3398 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3399 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3400 vc->tb_offset_applied = vc->tb_offset; 3401 } 3402 3403 if (vc->pcr) 3404 mtspr(SPRN_PCR, vc->pcr); 3405 mtspr(SPRN_DPDES, vc->dpdes); 3406 mtspr(SPRN_VTB, vc->vtb); 3407 3408 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3409 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3410 mtspr(SPRN_PURR, vcpu->arch.purr); 3411 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3412 3413 if (dawr_enabled()) { 3414 mtspr(SPRN_DAWR, vcpu->arch.dawr); 3415 mtspr(SPRN_DAWRX, vcpu->arch.dawrx); 3416 } 3417 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3418 mtspr(SPRN_IC, vcpu->arch.ic); 3419 mtspr(SPRN_PID, vcpu->arch.pid); 3420 3421 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3422 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3423 3424 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3425 3426 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3427 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3428 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3429 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3430 3431 mtspr(SPRN_AMOR, ~0UL); 3432 3433 mtspr(SPRN_LPCR, lpcr); 3434 isync(); 3435 3436 kvmppc_xive_push_vcpu(vcpu); 3437 3438 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3439 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3440 3441 trap = __kvmhv_vcpu_entry_p9(vcpu); 3442 3443 /* Advance host PURR/SPURR by the amount used by guest */ 3444 purr = mfspr(SPRN_PURR); 3445 spurr = mfspr(SPRN_SPURR); 3446 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3447 purr - vcpu->arch.purr); 3448 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3449 spurr - vcpu->arch.spurr); 3450 vcpu->arch.purr = purr; 3451 vcpu->arch.spurr = spurr; 3452 3453 vcpu->arch.ic = mfspr(SPRN_IC); 3454 vcpu->arch.pid = mfspr(SPRN_PID); 3455 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3456 3457 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3458 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3459 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3460 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3461 3462 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */ 3463 mtspr(SPRN_PSSCR, host_psscr | 3464 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3465 mtspr(SPRN_HFSCR, host_hfscr); 3466 mtspr(SPRN_CIABR, host_ciabr); 3467 mtspr(SPRN_DAWR, host_dawr); 3468 mtspr(SPRN_DAWRX, host_dawrx); 3469 mtspr(SPRN_PID, host_pidr); 3470 3471 /* 3472 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3473 * case we interrupted the guest between a tlbie and a ptesync. 3474 */ 3475 asm volatile("eieio; tlbsync; ptesync"); 3476 3477 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3478 isync(); 3479 3480 vc->dpdes = mfspr(SPRN_DPDES); 3481 vc->vtb = mfspr(SPRN_VTB); 3482 mtspr(SPRN_DPDES, 0); 3483 if (vc->pcr) 3484 mtspr(SPRN_PCR, 0); 3485 3486 if (vc->tb_offset_applied) { 3487 u64 new_tb = mftb() - vc->tb_offset_applied; 3488 mtspr(SPRN_TBU40, new_tb); 3489 tb = mftb(); 3490 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3491 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3492 vc->tb_offset_applied = 0; 3493 } 3494 3495 mtspr(SPRN_HDEC, 0x7fffffff); 3496 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3497 3498 return trap; 3499 } 3500 3501 /* 3502 * Virtual-mode guest entry for POWER9 and later when the host and 3503 * guest are both using the radix MMU. The LPIDR has already been set. 3504 */ 3505 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3506 unsigned long lpcr) 3507 { 3508 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3509 unsigned long host_dscr = mfspr(SPRN_DSCR); 3510 unsigned long host_tidr = mfspr(SPRN_TIDR); 3511 unsigned long host_iamr = mfspr(SPRN_IAMR); 3512 unsigned long host_amr = mfspr(SPRN_AMR); 3513 s64 dec; 3514 u64 tb; 3515 int trap, save_pmu; 3516 3517 dec = mfspr(SPRN_DEC); 3518 tb = mftb(); 3519 if (dec < 512) 3520 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3521 local_paca->kvm_hstate.dec_expires = dec + tb; 3522 if (local_paca->kvm_hstate.dec_expires < time_limit) 3523 time_limit = local_paca->kvm_hstate.dec_expires; 3524 3525 vcpu->arch.ceded = 0; 3526 3527 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3528 3529 kvmppc_subcore_enter_guest(); 3530 3531 vc->entry_exit_map = 1; 3532 vc->in_guest = 1; 3533 3534 if (vcpu->arch.vpa.pinned_addr) { 3535 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3536 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3537 lp->yield_count = cpu_to_be32(yield_count); 3538 vcpu->arch.vpa.dirty = 1; 3539 } 3540 3541 if (cpu_has_feature(CPU_FTR_TM) || 3542 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3543 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3544 3545 kvmhv_load_guest_pmu(vcpu); 3546 3547 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3548 load_fp_state(&vcpu->arch.fp); 3549 #ifdef CONFIG_ALTIVEC 3550 load_vr_state(&vcpu->arch.vr); 3551 #endif 3552 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3553 3554 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3555 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3556 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3557 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3558 mtspr(SPRN_TAR, vcpu->arch.tar); 3559 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3560 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3561 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3562 mtspr(SPRN_WORT, vcpu->arch.wort); 3563 mtspr(SPRN_TIDR, vcpu->arch.tid); 3564 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3565 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3566 mtspr(SPRN_AMR, vcpu->arch.amr); 3567 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3568 3569 if (!(vcpu->arch.ctrl & 1)) 3570 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3571 3572 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3573 3574 if (kvmhv_on_pseries()) { 3575 /* call our hypervisor to load up HV regs and go */ 3576 struct hv_guest_state hvregs; 3577 3578 kvmhv_save_hv_regs(vcpu, &hvregs); 3579 hvregs.lpcr = lpcr; 3580 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3581 hvregs.version = HV_GUEST_STATE_VERSION; 3582 if (vcpu->arch.nested) { 3583 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3584 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3585 } else { 3586 hvregs.lpid = vcpu->kvm->arch.lpid; 3587 hvregs.vcpu_token = vcpu->vcpu_id; 3588 } 3589 hvregs.hdec_expiry = time_limit; 3590 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3591 __pa(&vcpu->arch.regs)); 3592 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3593 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3594 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3595 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3596 3597 /* H_CEDE has to be handled now, not later */ 3598 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3599 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3600 kvmppc_nested_cede(vcpu); 3601 trap = 0; 3602 } 3603 } else { 3604 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3605 } 3606 3607 vcpu->arch.slb_max = 0; 3608 dec = mfspr(SPRN_DEC); 3609 tb = mftb(); 3610 vcpu->arch.dec_expires = dec + tb; 3611 vcpu->cpu = -1; 3612 vcpu->arch.thread_cpu = -1; 3613 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3614 3615 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3616 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3617 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3618 vcpu->arch.tar = mfspr(SPRN_TAR); 3619 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3620 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3621 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3622 vcpu->arch.wort = mfspr(SPRN_WORT); 3623 vcpu->arch.tid = mfspr(SPRN_TIDR); 3624 vcpu->arch.amr = mfspr(SPRN_AMR); 3625 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3626 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3627 3628 mtspr(SPRN_PSPB, 0); 3629 mtspr(SPRN_WORT, 0); 3630 mtspr(SPRN_UAMOR, 0); 3631 mtspr(SPRN_DSCR, host_dscr); 3632 mtspr(SPRN_TIDR, host_tidr); 3633 mtspr(SPRN_IAMR, host_iamr); 3634 mtspr(SPRN_PSPB, 0); 3635 3636 if (host_amr != vcpu->arch.amr) 3637 mtspr(SPRN_AMR, host_amr); 3638 3639 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3640 store_fp_state(&vcpu->arch.fp); 3641 #ifdef CONFIG_ALTIVEC 3642 store_vr_state(&vcpu->arch.vr); 3643 #endif 3644 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3645 3646 if (cpu_has_feature(CPU_FTR_TM) || 3647 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3648 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3649 3650 save_pmu = 1; 3651 if (vcpu->arch.vpa.pinned_addr) { 3652 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3653 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3654 lp->yield_count = cpu_to_be32(yield_count); 3655 vcpu->arch.vpa.dirty = 1; 3656 save_pmu = lp->pmcregs_in_use; 3657 } 3658 3659 kvmhv_save_guest_pmu(vcpu, save_pmu); 3660 3661 vc->entry_exit_map = 0x101; 3662 vc->in_guest = 0; 3663 3664 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3665 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso); 3666 3667 kvmhv_load_host_pmu(); 3668 3669 kvmppc_subcore_exit_guest(); 3670 3671 return trap; 3672 } 3673 3674 /* 3675 * Wait for some other vcpu thread to execute us, and 3676 * wake us up when we need to handle something in the host. 3677 */ 3678 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3679 struct kvm_vcpu *vcpu, int wait_state) 3680 { 3681 DEFINE_WAIT(wait); 3682 3683 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3684 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3685 spin_unlock(&vc->lock); 3686 schedule(); 3687 spin_lock(&vc->lock); 3688 } 3689 finish_wait(&vcpu->arch.cpu_run, &wait); 3690 } 3691 3692 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3693 { 3694 if (!halt_poll_ns_grow) 3695 return; 3696 3697 vc->halt_poll_ns *= halt_poll_ns_grow; 3698 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 3699 vc->halt_poll_ns = halt_poll_ns_grow_start; 3700 } 3701 3702 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3703 { 3704 if (halt_poll_ns_shrink == 0) 3705 vc->halt_poll_ns = 0; 3706 else 3707 vc->halt_poll_ns /= halt_poll_ns_shrink; 3708 } 3709 3710 #ifdef CONFIG_KVM_XICS 3711 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3712 { 3713 if (!xics_on_xive()) 3714 return false; 3715 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3716 vcpu->arch.xive_saved_state.cppr; 3717 } 3718 #else 3719 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3720 { 3721 return false; 3722 } 3723 #endif /* CONFIG_KVM_XICS */ 3724 3725 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3726 { 3727 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3728 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3729 return true; 3730 3731 return false; 3732 } 3733 3734 /* 3735 * Check to see if any of the runnable vcpus on the vcore have pending 3736 * exceptions or are no longer ceded 3737 */ 3738 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3739 { 3740 struct kvm_vcpu *vcpu; 3741 int i; 3742 3743 for_each_runnable_thread(i, vcpu, vc) { 3744 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3745 return 1; 3746 } 3747 3748 return 0; 3749 } 3750 3751 /* 3752 * All the vcpus in this vcore are idle, so wait for a decrementer 3753 * or external interrupt to one of the vcpus. vc->lock is held. 3754 */ 3755 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3756 { 3757 ktime_t cur, start_poll, start_wait; 3758 int do_sleep = 1; 3759 u64 block_ns; 3760 DECLARE_SWAITQUEUE(wait); 3761 3762 /* Poll for pending exceptions and ceded state */ 3763 cur = start_poll = ktime_get(); 3764 if (vc->halt_poll_ns) { 3765 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3766 ++vc->runner->stat.halt_attempted_poll; 3767 3768 vc->vcore_state = VCORE_POLLING; 3769 spin_unlock(&vc->lock); 3770 3771 do { 3772 if (kvmppc_vcore_check_block(vc)) { 3773 do_sleep = 0; 3774 break; 3775 } 3776 cur = ktime_get(); 3777 } while (single_task_running() && ktime_before(cur, stop)); 3778 3779 spin_lock(&vc->lock); 3780 vc->vcore_state = VCORE_INACTIVE; 3781 3782 if (!do_sleep) { 3783 ++vc->runner->stat.halt_successful_poll; 3784 goto out; 3785 } 3786 } 3787 3788 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE); 3789 3790 if (kvmppc_vcore_check_block(vc)) { 3791 finish_swait(&vc->wq, &wait); 3792 do_sleep = 0; 3793 /* If we polled, count this as a successful poll */ 3794 if (vc->halt_poll_ns) 3795 ++vc->runner->stat.halt_successful_poll; 3796 goto out; 3797 } 3798 3799 start_wait = ktime_get(); 3800 3801 vc->vcore_state = VCORE_SLEEPING; 3802 trace_kvmppc_vcore_blocked(vc, 0); 3803 spin_unlock(&vc->lock); 3804 schedule(); 3805 finish_swait(&vc->wq, &wait); 3806 spin_lock(&vc->lock); 3807 vc->vcore_state = VCORE_INACTIVE; 3808 trace_kvmppc_vcore_blocked(vc, 1); 3809 ++vc->runner->stat.halt_successful_wait; 3810 3811 cur = ktime_get(); 3812 3813 out: 3814 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3815 3816 /* Attribute wait time */ 3817 if (do_sleep) { 3818 vc->runner->stat.halt_wait_ns += 3819 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3820 /* Attribute failed poll time */ 3821 if (vc->halt_poll_ns) 3822 vc->runner->stat.halt_poll_fail_ns += 3823 ktime_to_ns(start_wait) - 3824 ktime_to_ns(start_poll); 3825 } else { 3826 /* Attribute successful poll time */ 3827 if (vc->halt_poll_ns) 3828 vc->runner->stat.halt_poll_success_ns += 3829 ktime_to_ns(cur) - 3830 ktime_to_ns(start_poll); 3831 } 3832 3833 /* Adjust poll time */ 3834 if (halt_poll_ns) { 3835 if (block_ns <= vc->halt_poll_ns) 3836 ; 3837 /* We slept and blocked for longer than the max halt time */ 3838 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3839 shrink_halt_poll_ns(vc); 3840 /* We slept and our poll time is too small */ 3841 else if (vc->halt_poll_ns < halt_poll_ns && 3842 block_ns < halt_poll_ns) 3843 grow_halt_poll_ns(vc); 3844 if (vc->halt_poll_ns > halt_poll_ns) 3845 vc->halt_poll_ns = halt_poll_ns; 3846 } else 3847 vc->halt_poll_ns = 0; 3848 3849 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3850 } 3851 3852 /* 3853 * This never fails for a radix guest, as none of the operations it does 3854 * for a radix guest can fail or have a way to report failure. 3855 * kvmhv_run_single_vcpu() relies on this fact. 3856 */ 3857 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3858 { 3859 int r = 0; 3860 struct kvm *kvm = vcpu->kvm; 3861 3862 mutex_lock(&kvm->arch.mmu_setup_lock); 3863 if (!kvm->arch.mmu_ready) { 3864 if (!kvm_is_radix(kvm)) 3865 r = kvmppc_hv_setup_htab_rma(vcpu); 3866 if (!r) { 3867 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3868 kvmppc_setup_partition_table(kvm); 3869 kvm->arch.mmu_ready = 1; 3870 } 3871 } 3872 mutex_unlock(&kvm->arch.mmu_setup_lock); 3873 return r; 3874 } 3875 3876 static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 3877 { 3878 int n_ceded, i, r; 3879 struct kvmppc_vcore *vc; 3880 struct kvm_vcpu *v; 3881 3882 trace_kvmppc_run_vcpu_enter(vcpu); 3883 3884 kvm_run->exit_reason = 0; 3885 vcpu->arch.ret = RESUME_GUEST; 3886 vcpu->arch.trap = 0; 3887 kvmppc_update_vpas(vcpu); 3888 3889 /* 3890 * Synchronize with other threads in this virtual core 3891 */ 3892 vc = vcpu->arch.vcore; 3893 spin_lock(&vc->lock); 3894 vcpu->arch.ceded = 0; 3895 vcpu->arch.run_task = current; 3896 vcpu->arch.kvm_run = kvm_run; 3897 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3898 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3899 vcpu->arch.busy_preempt = TB_NIL; 3900 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 3901 ++vc->n_runnable; 3902 3903 /* 3904 * This happens the first time this is called for a vcpu. 3905 * If the vcore is already running, we may be able to start 3906 * this thread straight away and have it join in. 3907 */ 3908 if (!signal_pending(current)) { 3909 if ((vc->vcore_state == VCORE_PIGGYBACK || 3910 vc->vcore_state == VCORE_RUNNING) && 3911 !VCORE_IS_EXITING(vc)) { 3912 kvmppc_create_dtl_entry(vcpu, vc); 3913 kvmppc_start_thread(vcpu, vc); 3914 trace_kvm_guest_enter(vcpu); 3915 } else if (vc->vcore_state == VCORE_SLEEPING) { 3916 swake_up_one(&vc->wq); 3917 } 3918 3919 } 3920 3921 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3922 !signal_pending(current)) { 3923 /* See if the MMU is ready to go */ 3924 if (!vcpu->kvm->arch.mmu_ready) { 3925 spin_unlock(&vc->lock); 3926 r = kvmhv_setup_mmu(vcpu); 3927 spin_lock(&vc->lock); 3928 if (r) { 3929 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; 3930 kvm_run->fail_entry. 3931 hardware_entry_failure_reason = 0; 3932 vcpu->arch.ret = r; 3933 break; 3934 } 3935 } 3936 3937 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3938 kvmppc_vcore_end_preempt(vc); 3939 3940 if (vc->vcore_state != VCORE_INACTIVE) { 3941 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 3942 continue; 3943 } 3944 for_each_runnable_thread(i, v, vc) { 3945 kvmppc_core_prepare_to_enter(v); 3946 if (signal_pending(v->arch.run_task)) { 3947 kvmppc_remove_runnable(vc, v); 3948 v->stat.signal_exits++; 3949 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR; 3950 v->arch.ret = -EINTR; 3951 wake_up(&v->arch.cpu_run); 3952 } 3953 } 3954 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 3955 break; 3956 n_ceded = 0; 3957 for_each_runnable_thread(i, v, vc) { 3958 if (!kvmppc_vcpu_woken(v)) 3959 n_ceded += v->arch.ceded; 3960 else 3961 v->arch.ceded = 0; 3962 } 3963 vc->runner = vcpu; 3964 if (n_ceded == vc->n_runnable) { 3965 kvmppc_vcore_blocked(vc); 3966 } else if (need_resched()) { 3967 kvmppc_vcore_preempt(vc); 3968 /* Let something else run */ 3969 cond_resched_lock(&vc->lock); 3970 if (vc->vcore_state == VCORE_PREEMPT) 3971 kvmppc_vcore_end_preempt(vc); 3972 } else { 3973 kvmppc_run_core(vc); 3974 } 3975 vc->runner = NULL; 3976 } 3977 3978 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3979 (vc->vcore_state == VCORE_RUNNING || 3980 vc->vcore_state == VCORE_EXITING || 3981 vc->vcore_state == VCORE_PIGGYBACK)) 3982 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 3983 3984 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3985 kvmppc_vcore_end_preempt(vc); 3986 3987 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3988 kvmppc_remove_runnable(vc, vcpu); 3989 vcpu->stat.signal_exits++; 3990 kvm_run->exit_reason = KVM_EXIT_INTR; 3991 vcpu->arch.ret = -EINTR; 3992 } 3993 3994 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 3995 /* Wake up some vcpu to run the core */ 3996 i = -1; 3997 v = next_runnable_thread(vc, &i); 3998 wake_up(&v->arch.cpu_run); 3999 } 4000 4001 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4002 spin_unlock(&vc->lock); 4003 return vcpu->arch.ret; 4004 } 4005 4006 int kvmhv_run_single_vcpu(struct kvm_run *kvm_run, 4007 struct kvm_vcpu *vcpu, u64 time_limit, 4008 unsigned long lpcr) 4009 { 4010 int trap, r, pcpu; 4011 int srcu_idx, lpid; 4012 struct kvmppc_vcore *vc; 4013 struct kvm *kvm = vcpu->kvm; 4014 struct kvm_nested_guest *nested = vcpu->arch.nested; 4015 4016 trace_kvmppc_run_vcpu_enter(vcpu); 4017 4018 kvm_run->exit_reason = 0; 4019 vcpu->arch.ret = RESUME_GUEST; 4020 vcpu->arch.trap = 0; 4021 4022 vc = vcpu->arch.vcore; 4023 vcpu->arch.ceded = 0; 4024 vcpu->arch.run_task = current; 4025 vcpu->arch.kvm_run = kvm_run; 4026 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4027 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4028 vcpu->arch.busy_preempt = TB_NIL; 4029 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4030 vc->runnable_threads[0] = vcpu; 4031 vc->n_runnable = 1; 4032 vc->runner = vcpu; 4033 4034 /* See if the MMU is ready to go */ 4035 if (!kvm->arch.mmu_ready) 4036 kvmhv_setup_mmu(vcpu); 4037 4038 if (need_resched()) 4039 cond_resched(); 4040 4041 kvmppc_update_vpas(vcpu); 4042 4043 init_vcore_to_run(vc); 4044 vc->preempt_tb = TB_NIL; 4045 4046 preempt_disable(); 4047 pcpu = smp_processor_id(); 4048 vc->pcpu = pcpu; 4049 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4050 4051 local_irq_disable(); 4052 hard_irq_disable(); 4053 if (signal_pending(current)) 4054 goto sigpend; 4055 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4056 goto out; 4057 4058 if (!nested) { 4059 kvmppc_core_prepare_to_enter(vcpu); 4060 if (vcpu->arch.doorbell_request) { 4061 vc->dpdes = 1; 4062 smp_wmb(); 4063 vcpu->arch.doorbell_request = 0; 4064 } 4065 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4066 &vcpu->arch.pending_exceptions)) 4067 lpcr |= LPCR_MER; 4068 } else if (vcpu->arch.pending_exceptions || 4069 vcpu->arch.doorbell_request || 4070 xive_interrupt_pending(vcpu)) { 4071 vcpu->arch.ret = RESUME_HOST; 4072 goto out; 4073 } 4074 4075 kvmppc_clear_host_core(pcpu); 4076 4077 local_paca->kvm_hstate.tid = 0; 4078 local_paca->kvm_hstate.napping = 0; 4079 local_paca->kvm_hstate.kvm_split_mode = NULL; 4080 kvmppc_start_thread(vcpu, vc); 4081 kvmppc_create_dtl_entry(vcpu, vc); 4082 trace_kvm_guest_enter(vcpu); 4083 4084 vc->vcore_state = VCORE_RUNNING; 4085 trace_kvmppc_run_core(vc, 0); 4086 4087 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4088 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid; 4089 mtspr(SPRN_LPID, lpid); 4090 isync(); 4091 kvmppc_check_need_tlb_flush(kvm, pcpu, nested); 4092 } 4093 4094 guest_enter_irqoff(); 4095 4096 srcu_idx = srcu_read_lock(&kvm->srcu); 4097 4098 this_cpu_disable_ftrace(); 4099 4100 /* Tell lockdep that we're about to enable interrupts */ 4101 trace_hardirqs_on(); 4102 4103 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4104 vcpu->arch.trap = trap; 4105 4106 trace_hardirqs_off(); 4107 4108 this_cpu_enable_ftrace(); 4109 4110 srcu_read_unlock(&kvm->srcu, srcu_idx); 4111 4112 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4113 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4114 isync(); 4115 } 4116 4117 set_irq_happened(trap); 4118 4119 kvmppc_set_host_core(pcpu); 4120 4121 local_irq_enable(); 4122 guest_exit(); 4123 4124 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4125 4126 preempt_enable(); 4127 4128 /* cancel pending decrementer exception if DEC is now positive */ 4129 if (get_tb() < vcpu->arch.dec_expires && kvmppc_core_pending_dec(vcpu)) 4130 kvmppc_core_dequeue_dec(vcpu); 4131 4132 trace_kvm_guest_exit(vcpu); 4133 r = RESUME_GUEST; 4134 if (trap) { 4135 if (!nested) 4136 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current); 4137 else 4138 r = kvmppc_handle_nested_exit(kvm_run, vcpu); 4139 } 4140 vcpu->arch.ret = r; 4141 4142 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4143 !kvmppc_vcpu_woken(vcpu)) { 4144 kvmppc_set_timer(vcpu); 4145 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4146 if (signal_pending(current)) { 4147 vcpu->stat.signal_exits++; 4148 kvm_run->exit_reason = KVM_EXIT_INTR; 4149 vcpu->arch.ret = -EINTR; 4150 break; 4151 } 4152 spin_lock(&vc->lock); 4153 kvmppc_vcore_blocked(vc); 4154 spin_unlock(&vc->lock); 4155 } 4156 } 4157 vcpu->arch.ceded = 0; 4158 4159 vc->vcore_state = VCORE_INACTIVE; 4160 trace_kvmppc_run_core(vc, 1); 4161 4162 done: 4163 kvmppc_remove_runnable(vc, vcpu); 4164 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4165 4166 return vcpu->arch.ret; 4167 4168 sigpend: 4169 vcpu->stat.signal_exits++; 4170 kvm_run->exit_reason = KVM_EXIT_INTR; 4171 vcpu->arch.ret = -EINTR; 4172 out: 4173 local_irq_enable(); 4174 preempt_enable(); 4175 goto done; 4176 } 4177 4178 static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu) 4179 { 4180 int r; 4181 int srcu_idx; 4182 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4183 unsigned long user_tar = 0; 4184 unsigned int user_vrsave; 4185 struct kvm *kvm; 4186 4187 if (!vcpu->arch.sane) { 4188 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4189 return -EINVAL; 4190 } 4191 4192 /* 4193 * Don't allow entry with a suspended transaction, because 4194 * the guest entry/exit code will lose it. 4195 * If the guest has TM enabled, save away their TM-related SPRs 4196 * (they will get restored by the TM unavailable interrupt). 4197 */ 4198 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4199 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4200 (current->thread.regs->msr & MSR_TM)) { 4201 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4202 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4203 run->fail_entry.hardware_entry_failure_reason = 0; 4204 return -EINVAL; 4205 } 4206 /* Enable TM so we can read the TM SPRs */ 4207 mtmsr(mfmsr() | MSR_TM); 4208 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4209 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4210 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4211 current->thread.regs->msr &= ~MSR_TM; 4212 } 4213 #endif 4214 4215 /* 4216 * Force online to 1 for the sake of old userspace which doesn't 4217 * set it. 4218 */ 4219 if (!vcpu->arch.online) { 4220 atomic_inc(&vcpu->arch.vcore->online_count); 4221 vcpu->arch.online = 1; 4222 } 4223 4224 kvmppc_core_prepare_to_enter(vcpu); 4225 4226 /* No need to go into the guest when all we'll do is come back out */ 4227 if (signal_pending(current)) { 4228 run->exit_reason = KVM_EXIT_INTR; 4229 return -EINTR; 4230 } 4231 4232 kvm = vcpu->kvm; 4233 atomic_inc(&kvm->arch.vcpus_running); 4234 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4235 smp_mb(); 4236 4237 flush_all_to_thread(current); 4238 4239 /* Save userspace EBB and other register values */ 4240 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4241 ebb_regs[0] = mfspr(SPRN_EBBHR); 4242 ebb_regs[1] = mfspr(SPRN_EBBRR); 4243 ebb_regs[2] = mfspr(SPRN_BESCR); 4244 user_tar = mfspr(SPRN_TAR); 4245 } 4246 user_vrsave = mfspr(SPRN_VRSAVE); 4247 4248 vcpu->arch.wqp = &vcpu->arch.vcore->wq; 4249 vcpu->arch.pgdir = current->mm->pgd; 4250 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4251 4252 do { 4253 /* 4254 * The early POWER9 chips that can't mix radix and HPT threads 4255 * on the same core also need the workaround for the problem 4256 * where the TLB would prefetch entries in the guest exit path 4257 * for radix guests using the guest PIDR value and LPID 0. 4258 * The workaround is in the old path (kvmppc_run_vcpu()) 4259 * but not the new path (kvmhv_run_single_vcpu()). 4260 */ 4261 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4262 !no_mixing_hpt_and_radix) 4263 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0, 4264 vcpu->arch.vcore->lpcr); 4265 else 4266 r = kvmppc_run_vcpu(run, vcpu); 4267 4268 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4269 !(vcpu->arch.shregs.msr & MSR_PR)) { 4270 trace_kvm_hcall_enter(vcpu); 4271 r = kvmppc_pseries_do_hcall(vcpu); 4272 trace_kvm_hcall_exit(vcpu, r); 4273 kvmppc_core_prepare_to_enter(vcpu); 4274 } else if (r == RESUME_PAGE_FAULT) { 4275 srcu_idx = srcu_read_lock(&kvm->srcu); 4276 r = kvmppc_book3s_hv_page_fault(run, vcpu, 4277 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4278 srcu_read_unlock(&kvm->srcu, srcu_idx); 4279 } else if (r == RESUME_PASSTHROUGH) { 4280 if (WARN_ON(xics_on_xive())) 4281 r = H_SUCCESS; 4282 else 4283 r = kvmppc_xics_rm_complete(vcpu, 0); 4284 } 4285 } while (is_kvmppc_resume_guest(r)); 4286 4287 /* Restore userspace EBB and other register values */ 4288 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4289 mtspr(SPRN_EBBHR, ebb_regs[0]); 4290 mtspr(SPRN_EBBRR, ebb_regs[1]); 4291 mtspr(SPRN_BESCR, ebb_regs[2]); 4292 mtspr(SPRN_TAR, user_tar); 4293 mtspr(SPRN_FSCR, current->thread.fscr); 4294 } 4295 mtspr(SPRN_VRSAVE, user_vrsave); 4296 4297 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4298 atomic_dec(&kvm->arch.vcpus_running); 4299 return r; 4300 } 4301 4302 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4303 int shift, int sllp) 4304 { 4305 (*sps)->page_shift = shift; 4306 (*sps)->slb_enc = sllp; 4307 (*sps)->enc[0].page_shift = shift; 4308 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4309 /* 4310 * Add 16MB MPSS support (may get filtered out by userspace) 4311 */ 4312 if (shift != 24) { 4313 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4314 if (penc != -1) { 4315 (*sps)->enc[1].page_shift = 24; 4316 (*sps)->enc[1].pte_enc = penc; 4317 } 4318 } 4319 (*sps)++; 4320 } 4321 4322 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4323 struct kvm_ppc_smmu_info *info) 4324 { 4325 struct kvm_ppc_one_seg_page_size *sps; 4326 4327 /* 4328 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4329 * POWER7 doesn't support keys for instruction accesses, 4330 * POWER8 and POWER9 do. 4331 */ 4332 info->data_keys = 32; 4333 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4334 4335 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4336 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4337 info->slb_size = 32; 4338 4339 /* We only support these sizes for now, and no muti-size segments */ 4340 sps = &info->sps[0]; 4341 kvmppc_add_seg_page_size(&sps, 12, 0); 4342 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4343 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4344 4345 /* If running as a nested hypervisor, we don't support HPT guests */ 4346 if (kvmhv_on_pseries()) 4347 info->flags |= KVM_PPC_NO_HASH; 4348 4349 return 0; 4350 } 4351 4352 /* 4353 * Get (and clear) the dirty memory log for a memory slot. 4354 */ 4355 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4356 struct kvm_dirty_log *log) 4357 { 4358 struct kvm_memslots *slots; 4359 struct kvm_memory_slot *memslot; 4360 int i, r; 4361 unsigned long n; 4362 unsigned long *buf, *p; 4363 struct kvm_vcpu *vcpu; 4364 4365 mutex_lock(&kvm->slots_lock); 4366 4367 r = -EINVAL; 4368 if (log->slot >= KVM_USER_MEM_SLOTS) 4369 goto out; 4370 4371 slots = kvm_memslots(kvm); 4372 memslot = id_to_memslot(slots, log->slot); 4373 r = -ENOENT; 4374 if (!memslot->dirty_bitmap) 4375 goto out; 4376 4377 /* 4378 * Use second half of bitmap area because both HPT and radix 4379 * accumulate bits in the first half. 4380 */ 4381 n = kvm_dirty_bitmap_bytes(memslot); 4382 buf = memslot->dirty_bitmap + n / sizeof(long); 4383 memset(buf, 0, n); 4384 4385 if (kvm_is_radix(kvm)) 4386 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4387 else 4388 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4389 if (r) 4390 goto out; 4391 4392 /* 4393 * We accumulate dirty bits in the first half of the 4394 * memslot's dirty_bitmap area, for when pages are paged 4395 * out or modified by the host directly. Pick up these 4396 * bits and add them to the map. 4397 */ 4398 p = memslot->dirty_bitmap; 4399 for (i = 0; i < n / sizeof(long); ++i) 4400 buf[i] |= xchg(&p[i], 0); 4401 4402 /* Harvest dirty bits from VPA and DTL updates */ 4403 /* Note: we never modify the SLB shadow buffer areas */ 4404 kvm_for_each_vcpu(i, vcpu, kvm) { 4405 spin_lock(&vcpu->arch.vpa_update_lock); 4406 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4407 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4408 spin_unlock(&vcpu->arch.vpa_update_lock); 4409 } 4410 4411 r = -EFAULT; 4412 if (copy_to_user(log->dirty_bitmap, buf, n)) 4413 goto out; 4414 4415 r = 0; 4416 out: 4417 mutex_unlock(&kvm->slots_lock); 4418 return r; 4419 } 4420 4421 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free, 4422 struct kvm_memory_slot *dont) 4423 { 4424 if (!dont || free->arch.rmap != dont->arch.rmap) { 4425 vfree(free->arch.rmap); 4426 free->arch.rmap = NULL; 4427 } 4428 } 4429 4430 static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot, 4431 unsigned long npages) 4432 { 4433 slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap))); 4434 if (!slot->arch.rmap) 4435 return -ENOMEM; 4436 4437 return 0; 4438 } 4439 4440 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4441 struct kvm_memory_slot *memslot, 4442 const struct kvm_userspace_memory_region *mem) 4443 { 4444 return 0; 4445 } 4446 4447 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4448 const struct kvm_userspace_memory_region *mem, 4449 const struct kvm_memory_slot *old, 4450 const struct kvm_memory_slot *new, 4451 enum kvm_mr_change change) 4452 { 4453 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4454 4455 /* 4456 * If we are making a new memslot, it might make 4457 * some address that was previously cached as emulated 4458 * MMIO be no longer emulated MMIO, so invalidate 4459 * all the caches of emulated MMIO translations. 4460 */ 4461 if (npages) 4462 atomic64_inc(&kvm->arch.mmio_update); 4463 4464 /* 4465 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4466 * have already called kvm_arch_flush_shadow_memslot() to 4467 * flush shadow mappings. For KVM_MR_CREATE we have no 4468 * previous mappings. So the only case to handle is 4469 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4470 * has been changed. 4471 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4472 * to get rid of any THP PTEs in the partition-scoped page tables 4473 * so we can track dirtiness at the page level; we flush when 4474 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4475 * using THP PTEs. 4476 */ 4477 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4478 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4479 kvmppc_radix_flush_memslot(kvm, old); 4480 } 4481 4482 /* 4483 * Update LPCR values in kvm->arch and in vcores. 4484 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4485 * of kvm->arch.lpcr update). 4486 */ 4487 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4488 { 4489 long int i; 4490 u32 cores_done = 0; 4491 4492 if ((kvm->arch.lpcr & mask) == lpcr) 4493 return; 4494 4495 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4496 4497 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4498 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4499 if (!vc) 4500 continue; 4501 spin_lock(&vc->lock); 4502 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4503 spin_unlock(&vc->lock); 4504 if (++cores_done >= kvm->arch.online_vcores) 4505 break; 4506 } 4507 } 4508 4509 static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu) 4510 { 4511 return; 4512 } 4513 4514 void kvmppc_setup_partition_table(struct kvm *kvm) 4515 { 4516 unsigned long dw0, dw1; 4517 4518 if (!kvm_is_radix(kvm)) { 4519 /* PS field - page size for VRMA */ 4520 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4521 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4522 /* HTABSIZE and HTABORG fields */ 4523 dw0 |= kvm->arch.sdr1; 4524 4525 /* Second dword as set by userspace */ 4526 dw1 = kvm->arch.process_table; 4527 } else { 4528 dw0 = PATB_HR | radix__get_tree_size() | 4529 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4530 dw1 = PATB_GR | kvm->arch.process_table; 4531 } 4532 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4533 } 4534 4535 /* 4536 * Set up HPT (hashed page table) and RMA (real-mode area). 4537 * Must be called with kvm->arch.mmu_setup_lock held. 4538 */ 4539 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4540 { 4541 int err = 0; 4542 struct kvm *kvm = vcpu->kvm; 4543 unsigned long hva; 4544 struct kvm_memory_slot *memslot; 4545 struct vm_area_struct *vma; 4546 unsigned long lpcr = 0, senc; 4547 unsigned long psize, porder; 4548 int srcu_idx; 4549 4550 /* Allocate hashed page table (if not done already) and reset it */ 4551 if (!kvm->arch.hpt.virt) { 4552 int order = KVM_DEFAULT_HPT_ORDER; 4553 struct kvm_hpt_info info; 4554 4555 err = kvmppc_allocate_hpt(&info, order); 4556 /* If we get here, it means userspace didn't specify a 4557 * size explicitly. So, try successively smaller 4558 * sizes if the default failed. */ 4559 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4560 err = kvmppc_allocate_hpt(&info, order); 4561 4562 if (err < 0) { 4563 pr_err("KVM: Couldn't alloc HPT\n"); 4564 goto out; 4565 } 4566 4567 kvmppc_set_hpt(kvm, &info); 4568 } 4569 4570 /* Look up the memslot for guest physical address 0 */ 4571 srcu_idx = srcu_read_lock(&kvm->srcu); 4572 memslot = gfn_to_memslot(kvm, 0); 4573 4574 /* We must have some memory at 0 by now */ 4575 err = -EINVAL; 4576 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4577 goto out_srcu; 4578 4579 /* Look up the VMA for the start of this memory slot */ 4580 hva = memslot->userspace_addr; 4581 down_read(¤t->mm->mmap_sem); 4582 vma = find_vma(current->mm, hva); 4583 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4584 goto up_out; 4585 4586 psize = vma_kernel_pagesize(vma); 4587 4588 up_read(¤t->mm->mmap_sem); 4589 4590 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4591 if (psize >= 0x1000000) 4592 psize = 0x1000000; 4593 else if (psize >= 0x10000) 4594 psize = 0x10000; 4595 else 4596 psize = 0x1000; 4597 porder = __ilog2(psize); 4598 4599 senc = slb_pgsize_encoding(psize); 4600 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4601 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4602 /* Create HPTEs in the hash page table for the VRMA */ 4603 kvmppc_map_vrma(vcpu, memslot, porder); 4604 4605 /* Update VRMASD field in the LPCR */ 4606 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4607 /* the -4 is to account for senc values starting at 0x10 */ 4608 lpcr = senc << (LPCR_VRMASD_SH - 4); 4609 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4610 } 4611 4612 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4613 smp_wmb(); 4614 err = 0; 4615 out_srcu: 4616 srcu_read_unlock(&kvm->srcu, srcu_idx); 4617 out: 4618 return err; 4619 4620 up_out: 4621 up_read(¤t->mm->mmap_sem); 4622 goto out_srcu; 4623 } 4624 4625 /* 4626 * Must be called with kvm->arch.mmu_setup_lock held and 4627 * mmu_ready = 0 and no vcpus running. 4628 */ 4629 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4630 { 4631 if (nesting_enabled(kvm)) 4632 kvmhv_release_all_nested(kvm); 4633 kvmppc_rmap_reset(kvm); 4634 kvm->arch.process_table = 0; 4635 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4636 spin_lock(&kvm->mmu_lock); 4637 kvm->arch.radix = 0; 4638 spin_unlock(&kvm->mmu_lock); 4639 kvmppc_free_radix(kvm); 4640 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4641 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4642 return 0; 4643 } 4644 4645 /* 4646 * Must be called with kvm->arch.mmu_setup_lock held and 4647 * mmu_ready = 0 and no vcpus running. 4648 */ 4649 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4650 { 4651 int err; 4652 4653 err = kvmppc_init_vm_radix(kvm); 4654 if (err) 4655 return err; 4656 kvmppc_rmap_reset(kvm); 4657 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4658 spin_lock(&kvm->mmu_lock); 4659 kvm->arch.radix = 1; 4660 spin_unlock(&kvm->mmu_lock); 4661 kvmppc_free_hpt(&kvm->arch.hpt); 4662 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4663 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4664 return 0; 4665 } 4666 4667 #ifdef CONFIG_KVM_XICS 4668 /* 4669 * Allocate a per-core structure for managing state about which cores are 4670 * running in the host versus the guest and for exchanging data between 4671 * real mode KVM and CPU running in the host. 4672 * This is only done for the first VM. 4673 * The allocated structure stays even if all VMs have stopped. 4674 * It is only freed when the kvm-hv module is unloaded. 4675 * It's OK for this routine to fail, we just don't support host 4676 * core operations like redirecting H_IPI wakeups. 4677 */ 4678 void kvmppc_alloc_host_rm_ops(void) 4679 { 4680 struct kvmppc_host_rm_ops *ops; 4681 unsigned long l_ops; 4682 int cpu, core; 4683 int size; 4684 4685 /* Not the first time here ? */ 4686 if (kvmppc_host_rm_ops_hv != NULL) 4687 return; 4688 4689 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4690 if (!ops) 4691 return; 4692 4693 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4694 ops->rm_core = kzalloc(size, GFP_KERNEL); 4695 4696 if (!ops->rm_core) { 4697 kfree(ops); 4698 return; 4699 } 4700 4701 cpus_read_lock(); 4702 4703 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4704 if (!cpu_online(cpu)) 4705 continue; 4706 4707 core = cpu >> threads_shift; 4708 ops->rm_core[core].rm_state.in_host = 1; 4709 } 4710 4711 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4712 4713 /* 4714 * Make the contents of the kvmppc_host_rm_ops structure visible 4715 * to other CPUs before we assign it to the global variable. 4716 * Do an atomic assignment (no locks used here), but if someone 4717 * beats us to it, just free our copy and return. 4718 */ 4719 smp_wmb(); 4720 l_ops = (unsigned long) ops; 4721 4722 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4723 cpus_read_unlock(); 4724 kfree(ops->rm_core); 4725 kfree(ops); 4726 return; 4727 } 4728 4729 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4730 "ppc/kvm_book3s:prepare", 4731 kvmppc_set_host_core, 4732 kvmppc_clear_host_core); 4733 cpus_read_unlock(); 4734 } 4735 4736 void kvmppc_free_host_rm_ops(void) 4737 { 4738 if (kvmppc_host_rm_ops_hv) { 4739 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4740 kfree(kvmppc_host_rm_ops_hv->rm_core); 4741 kfree(kvmppc_host_rm_ops_hv); 4742 kvmppc_host_rm_ops_hv = NULL; 4743 } 4744 } 4745 #endif 4746 4747 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4748 { 4749 unsigned long lpcr, lpid; 4750 char buf[32]; 4751 int ret; 4752 4753 mutex_init(&kvm->arch.mmu_setup_lock); 4754 4755 /* Allocate the guest's logical partition ID */ 4756 4757 lpid = kvmppc_alloc_lpid(); 4758 if ((long)lpid < 0) 4759 return -ENOMEM; 4760 kvm->arch.lpid = lpid; 4761 4762 kvmppc_alloc_host_rm_ops(); 4763 4764 kvmhv_vm_nested_init(kvm); 4765 4766 /* 4767 * Since we don't flush the TLB when tearing down a VM, 4768 * and this lpid might have previously been used, 4769 * make sure we flush on each core before running the new VM. 4770 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4771 * does this flush for us. 4772 */ 4773 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4774 cpumask_setall(&kvm->arch.need_tlb_flush); 4775 4776 /* Start out with the default set of hcalls enabled */ 4777 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4778 sizeof(kvm->arch.enabled_hcalls)); 4779 4780 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4781 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4782 4783 /* Init LPCR for virtual RMA mode */ 4784 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4785 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4786 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4787 lpcr &= LPCR_PECE | LPCR_LPES; 4788 } else { 4789 lpcr = 0; 4790 } 4791 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4792 LPCR_VPM0 | LPCR_VPM1; 4793 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4794 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4795 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4796 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4797 lpcr |= LPCR_ONL; 4798 /* 4799 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4800 * Set HVICE bit to enable hypervisor virtualization interrupts. 4801 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4802 * be unnecessary but better safe than sorry in case we re-enable 4803 * EE in HV mode with this LPCR still set) 4804 */ 4805 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4806 lpcr &= ~LPCR_VPM0; 4807 lpcr |= LPCR_HVICE | LPCR_HEIC; 4808 4809 /* 4810 * If xive is enabled, we route 0x500 interrupts directly 4811 * to the guest. 4812 */ 4813 if (xics_on_xive()) 4814 lpcr |= LPCR_LPES; 4815 } 4816 4817 /* 4818 * If the host uses radix, the guest starts out as radix. 4819 */ 4820 if (radix_enabled()) { 4821 kvm->arch.radix = 1; 4822 kvm->arch.mmu_ready = 1; 4823 lpcr &= ~LPCR_VPM1; 4824 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4825 ret = kvmppc_init_vm_radix(kvm); 4826 if (ret) { 4827 kvmppc_free_lpid(kvm->arch.lpid); 4828 return ret; 4829 } 4830 kvmppc_setup_partition_table(kvm); 4831 } 4832 4833 kvm->arch.lpcr = lpcr; 4834 4835 /* Initialization for future HPT resizes */ 4836 kvm->arch.resize_hpt = NULL; 4837 4838 /* 4839 * Work out how many sets the TLB has, for the use of 4840 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4841 */ 4842 if (radix_enabled()) 4843 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4844 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4845 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4846 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4847 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4848 else 4849 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4850 4851 /* 4852 * Track that we now have a HV mode VM active. This blocks secondary 4853 * CPU threads from coming online. 4854 * On POWER9, we only need to do this if the "indep_threads_mode" 4855 * module parameter has been set to N. 4856 */ 4857 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4858 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 4859 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 4860 kvm->arch.threads_indep = true; 4861 } else { 4862 kvm->arch.threads_indep = indep_threads_mode; 4863 } 4864 } 4865 if (!kvm->arch.threads_indep) 4866 kvm_hv_vm_activated(); 4867 4868 /* 4869 * Initialize smt_mode depending on processor. 4870 * POWER8 and earlier have to use "strict" threading, where 4871 * all vCPUs in a vcore have to run on the same (sub)core, 4872 * whereas on POWER9 the threads can each run a different 4873 * guest. 4874 */ 4875 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4876 kvm->arch.smt_mode = threads_per_subcore; 4877 else 4878 kvm->arch.smt_mode = 1; 4879 kvm->arch.emul_smt_mode = 1; 4880 4881 /* 4882 * Create a debugfs directory for the VM 4883 */ 4884 snprintf(buf, sizeof(buf), "vm%d", current->pid); 4885 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 4886 kvmppc_mmu_debugfs_init(kvm); 4887 if (radix_enabled()) 4888 kvmhv_radix_debugfs_init(kvm); 4889 4890 return 0; 4891 } 4892 4893 static void kvmppc_free_vcores(struct kvm *kvm) 4894 { 4895 long int i; 4896 4897 for (i = 0; i < KVM_MAX_VCORES; ++i) 4898 kfree(kvm->arch.vcores[i]); 4899 kvm->arch.online_vcores = 0; 4900 } 4901 4902 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 4903 { 4904 debugfs_remove_recursive(kvm->arch.debugfs_dir); 4905 4906 if (!kvm->arch.threads_indep) 4907 kvm_hv_vm_deactivated(); 4908 4909 kvmppc_free_vcores(kvm); 4910 4911 4912 if (kvm_is_radix(kvm)) 4913 kvmppc_free_radix(kvm); 4914 else 4915 kvmppc_free_hpt(&kvm->arch.hpt); 4916 4917 /* Perform global invalidation and return lpid to the pool */ 4918 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4919 if (nesting_enabled(kvm)) 4920 kvmhv_release_all_nested(kvm); 4921 kvm->arch.process_table = 0; 4922 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 4923 } 4924 kvmppc_free_lpid(kvm->arch.lpid); 4925 4926 kvmppc_free_pimap(kvm); 4927 } 4928 4929 /* We don't need to emulate any privileged instructions or dcbz */ 4930 static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 4931 unsigned int inst, int *advance) 4932 { 4933 return EMULATE_FAIL; 4934 } 4935 4936 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 4937 ulong spr_val) 4938 { 4939 return EMULATE_FAIL; 4940 } 4941 4942 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 4943 ulong *spr_val) 4944 { 4945 return EMULATE_FAIL; 4946 } 4947 4948 static int kvmppc_core_check_processor_compat_hv(void) 4949 { 4950 if (cpu_has_feature(CPU_FTR_HVMODE) && 4951 cpu_has_feature(CPU_FTR_ARCH_206)) 4952 return 0; 4953 4954 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 4955 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 4956 return 0; 4957 4958 return -EIO; 4959 } 4960 4961 #ifdef CONFIG_KVM_XICS 4962 4963 void kvmppc_free_pimap(struct kvm *kvm) 4964 { 4965 kfree(kvm->arch.pimap); 4966 } 4967 4968 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 4969 { 4970 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 4971 } 4972 4973 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 4974 { 4975 struct irq_desc *desc; 4976 struct kvmppc_irq_map *irq_map; 4977 struct kvmppc_passthru_irqmap *pimap; 4978 struct irq_chip *chip; 4979 int i, rc = 0; 4980 4981 if (!kvm_irq_bypass) 4982 return 1; 4983 4984 desc = irq_to_desc(host_irq); 4985 if (!desc) 4986 return -EIO; 4987 4988 mutex_lock(&kvm->lock); 4989 4990 pimap = kvm->arch.pimap; 4991 if (pimap == NULL) { 4992 /* First call, allocate structure to hold IRQ map */ 4993 pimap = kvmppc_alloc_pimap(); 4994 if (pimap == NULL) { 4995 mutex_unlock(&kvm->lock); 4996 return -ENOMEM; 4997 } 4998 kvm->arch.pimap = pimap; 4999 } 5000 5001 /* 5002 * For now, we only support interrupts for which the EOI operation 5003 * is an OPAL call followed by a write to XIRR, since that's 5004 * what our real-mode EOI code does, or a XIVE interrupt 5005 */ 5006 chip = irq_data_get_irq_chip(&desc->irq_data); 5007 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 5008 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5009 host_irq, guest_gsi); 5010 mutex_unlock(&kvm->lock); 5011 return -ENOENT; 5012 } 5013 5014 /* 5015 * See if we already have an entry for this guest IRQ number. 5016 * If it's mapped to a hardware IRQ number, that's an error, 5017 * otherwise re-use this entry. 5018 */ 5019 for (i = 0; i < pimap->n_mapped; i++) { 5020 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5021 if (pimap->mapped[i].r_hwirq) { 5022 mutex_unlock(&kvm->lock); 5023 return -EINVAL; 5024 } 5025 break; 5026 } 5027 } 5028 5029 if (i == KVMPPC_PIRQ_MAPPED) { 5030 mutex_unlock(&kvm->lock); 5031 return -EAGAIN; /* table is full */ 5032 } 5033 5034 irq_map = &pimap->mapped[i]; 5035 5036 irq_map->v_hwirq = guest_gsi; 5037 irq_map->desc = desc; 5038 5039 /* 5040 * Order the above two stores before the next to serialize with 5041 * the KVM real mode handler. 5042 */ 5043 smp_wmb(); 5044 irq_map->r_hwirq = desc->irq_data.hwirq; 5045 5046 if (i == pimap->n_mapped) 5047 pimap->n_mapped++; 5048 5049 if (xics_on_xive()) 5050 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5051 else 5052 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5053 if (rc) 5054 irq_map->r_hwirq = 0; 5055 5056 mutex_unlock(&kvm->lock); 5057 5058 return 0; 5059 } 5060 5061 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5062 { 5063 struct irq_desc *desc; 5064 struct kvmppc_passthru_irqmap *pimap; 5065 int i, rc = 0; 5066 5067 if (!kvm_irq_bypass) 5068 return 0; 5069 5070 desc = irq_to_desc(host_irq); 5071 if (!desc) 5072 return -EIO; 5073 5074 mutex_lock(&kvm->lock); 5075 if (!kvm->arch.pimap) 5076 goto unlock; 5077 5078 pimap = kvm->arch.pimap; 5079 5080 for (i = 0; i < pimap->n_mapped; i++) { 5081 if (guest_gsi == pimap->mapped[i].v_hwirq) 5082 break; 5083 } 5084 5085 if (i == pimap->n_mapped) { 5086 mutex_unlock(&kvm->lock); 5087 return -ENODEV; 5088 } 5089 5090 if (xics_on_xive()) 5091 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5092 else 5093 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5094 5095 /* invalidate the entry (what do do on error from the above ?) */ 5096 pimap->mapped[i].r_hwirq = 0; 5097 5098 /* 5099 * We don't free this structure even when the count goes to 5100 * zero. The structure is freed when we destroy the VM. 5101 */ 5102 unlock: 5103 mutex_unlock(&kvm->lock); 5104 return rc; 5105 } 5106 5107 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5108 struct irq_bypass_producer *prod) 5109 { 5110 int ret = 0; 5111 struct kvm_kernel_irqfd *irqfd = 5112 container_of(cons, struct kvm_kernel_irqfd, consumer); 5113 5114 irqfd->producer = prod; 5115 5116 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5117 if (ret) 5118 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5119 prod->irq, irqfd->gsi, ret); 5120 5121 return ret; 5122 } 5123 5124 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5125 struct irq_bypass_producer *prod) 5126 { 5127 int ret; 5128 struct kvm_kernel_irqfd *irqfd = 5129 container_of(cons, struct kvm_kernel_irqfd, consumer); 5130 5131 irqfd->producer = NULL; 5132 5133 /* 5134 * When producer of consumer is unregistered, we change back to 5135 * default external interrupt handling mode - KVM real mode 5136 * will switch back to host. 5137 */ 5138 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5139 if (ret) 5140 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5141 prod->irq, irqfd->gsi, ret); 5142 } 5143 #endif 5144 5145 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5146 unsigned int ioctl, unsigned long arg) 5147 { 5148 struct kvm *kvm __maybe_unused = filp->private_data; 5149 void __user *argp = (void __user *)arg; 5150 long r; 5151 5152 switch (ioctl) { 5153 5154 case KVM_PPC_ALLOCATE_HTAB: { 5155 u32 htab_order; 5156 5157 r = -EFAULT; 5158 if (get_user(htab_order, (u32 __user *)argp)) 5159 break; 5160 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5161 if (r) 5162 break; 5163 r = 0; 5164 break; 5165 } 5166 5167 case KVM_PPC_GET_HTAB_FD: { 5168 struct kvm_get_htab_fd ghf; 5169 5170 r = -EFAULT; 5171 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5172 break; 5173 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5174 break; 5175 } 5176 5177 case KVM_PPC_RESIZE_HPT_PREPARE: { 5178 struct kvm_ppc_resize_hpt rhpt; 5179 5180 r = -EFAULT; 5181 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5182 break; 5183 5184 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5185 break; 5186 } 5187 5188 case KVM_PPC_RESIZE_HPT_COMMIT: { 5189 struct kvm_ppc_resize_hpt rhpt; 5190 5191 r = -EFAULT; 5192 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5193 break; 5194 5195 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5196 break; 5197 } 5198 5199 default: 5200 r = -ENOTTY; 5201 } 5202 5203 return r; 5204 } 5205 5206 /* 5207 * List of hcall numbers to enable by default. 5208 * For compatibility with old userspace, we enable by default 5209 * all hcalls that were implemented before the hcall-enabling 5210 * facility was added. Note this list should not include H_RTAS. 5211 */ 5212 static unsigned int default_hcall_list[] = { 5213 H_REMOVE, 5214 H_ENTER, 5215 H_READ, 5216 H_PROTECT, 5217 H_BULK_REMOVE, 5218 H_GET_TCE, 5219 H_PUT_TCE, 5220 H_SET_DABR, 5221 H_SET_XDABR, 5222 H_CEDE, 5223 H_PROD, 5224 H_CONFER, 5225 H_REGISTER_VPA, 5226 #ifdef CONFIG_KVM_XICS 5227 H_EOI, 5228 H_CPPR, 5229 H_IPI, 5230 H_IPOLL, 5231 H_XIRR, 5232 H_XIRR_X, 5233 #endif 5234 0 5235 }; 5236 5237 static void init_default_hcalls(void) 5238 { 5239 int i; 5240 unsigned int hcall; 5241 5242 for (i = 0; default_hcall_list[i]; ++i) { 5243 hcall = default_hcall_list[i]; 5244 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5245 __set_bit(hcall / 4, default_enabled_hcalls); 5246 } 5247 } 5248 5249 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5250 { 5251 unsigned long lpcr; 5252 int radix; 5253 int err; 5254 5255 /* If not on a POWER9, reject it */ 5256 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5257 return -ENODEV; 5258 5259 /* If any unknown flags set, reject it */ 5260 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5261 return -EINVAL; 5262 5263 /* GR (guest radix) bit in process_table field must match */ 5264 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5265 if (!!(cfg->process_table & PATB_GR) != radix) 5266 return -EINVAL; 5267 5268 /* Process table size field must be reasonable, i.e. <= 24 */ 5269 if ((cfg->process_table & PRTS_MASK) > 24) 5270 return -EINVAL; 5271 5272 /* We can change a guest to/from radix now, if the host is radix */ 5273 if (radix && !radix_enabled()) 5274 return -EINVAL; 5275 5276 /* If we're a nested hypervisor, we currently only support radix */ 5277 if (kvmhv_on_pseries() && !radix) 5278 return -EINVAL; 5279 5280 mutex_lock(&kvm->arch.mmu_setup_lock); 5281 if (radix != kvm_is_radix(kvm)) { 5282 if (kvm->arch.mmu_ready) { 5283 kvm->arch.mmu_ready = 0; 5284 /* order mmu_ready vs. vcpus_running */ 5285 smp_mb(); 5286 if (atomic_read(&kvm->arch.vcpus_running)) { 5287 kvm->arch.mmu_ready = 1; 5288 err = -EBUSY; 5289 goto out_unlock; 5290 } 5291 } 5292 if (radix) 5293 err = kvmppc_switch_mmu_to_radix(kvm); 5294 else 5295 err = kvmppc_switch_mmu_to_hpt(kvm); 5296 if (err) 5297 goto out_unlock; 5298 } 5299 5300 kvm->arch.process_table = cfg->process_table; 5301 kvmppc_setup_partition_table(kvm); 5302 5303 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5304 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5305 err = 0; 5306 5307 out_unlock: 5308 mutex_unlock(&kvm->arch.mmu_setup_lock); 5309 return err; 5310 } 5311 5312 static int kvmhv_enable_nested(struct kvm *kvm) 5313 { 5314 if (!nested) 5315 return -EPERM; 5316 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5317 return -ENODEV; 5318 5319 /* kvm == NULL means the caller is testing if the capability exists */ 5320 if (kvm) 5321 kvm->arch.nested_enable = true; 5322 return 0; 5323 } 5324 5325 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5326 int size) 5327 { 5328 int rc = -EINVAL; 5329 5330 if (kvmhv_vcpu_is_radix(vcpu)) { 5331 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5332 5333 if (rc > 0) 5334 rc = -EINVAL; 5335 } 5336 5337 /* For now quadrants are the only way to access nested guest memory */ 5338 if (rc && vcpu->arch.nested) 5339 rc = -EAGAIN; 5340 5341 return rc; 5342 } 5343 5344 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5345 int size) 5346 { 5347 int rc = -EINVAL; 5348 5349 if (kvmhv_vcpu_is_radix(vcpu)) { 5350 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5351 5352 if (rc > 0) 5353 rc = -EINVAL; 5354 } 5355 5356 /* For now quadrants are the only way to access nested guest memory */ 5357 if (rc && vcpu->arch.nested) 5358 rc = -EAGAIN; 5359 5360 return rc; 5361 } 5362 5363 static struct kvmppc_ops kvm_ops_hv = { 5364 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5365 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5366 .get_one_reg = kvmppc_get_one_reg_hv, 5367 .set_one_reg = kvmppc_set_one_reg_hv, 5368 .vcpu_load = kvmppc_core_vcpu_load_hv, 5369 .vcpu_put = kvmppc_core_vcpu_put_hv, 5370 .set_msr = kvmppc_set_msr_hv, 5371 .vcpu_run = kvmppc_vcpu_run_hv, 5372 .vcpu_create = kvmppc_core_vcpu_create_hv, 5373 .vcpu_free = kvmppc_core_vcpu_free_hv, 5374 .check_requests = kvmppc_core_check_requests_hv, 5375 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5376 .flush_memslot = kvmppc_core_flush_memslot_hv, 5377 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5378 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5379 .unmap_hva_range = kvm_unmap_hva_range_hv, 5380 .age_hva = kvm_age_hva_hv, 5381 .test_age_hva = kvm_test_age_hva_hv, 5382 .set_spte_hva = kvm_set_spte_hva_hv, 5383 .mmu_destroy = kvmppc_mmu_destroy_hv, 5384 .free_memslot = kvmppc_core_free_memslot_hv, 5385 .create_memslot = kvmppc_core_create_memslot_hv, 5386 .init_vm = kvmppc_core_init_vm_hv, 5387 .destroy_vm = kvmppc_core_destroy_vm_hv, 5388 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5389 .emulate_op = kvmppc_core_emulate_op_hv, 5390 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5391 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5392 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5393 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5394 .hcall_implemented = kvmppc_hcall_impl_hv, 5395 #ifdef CONFIG_KVM_XICS 5396 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5397 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5398 #endif 5399 .configure_mmu = kvmhv_configure_mmu, 5400 .get_rmmu_info = kvmhv_get_rmmu_info, 5401 .set_smt_mode = kvmhv_set_smt_mode, 5402 .enable_nested = kvmhv_enable_nested, 5403 .load_from_eaddr = kvmhv_load_from_eaddr, 5404 .store_to_eaddr = kvmhv_store_to_eaddr, 5405 }; 5406 5407 static int kvm_init_subcore_bitmap(void) 5408 { 5409 int i, j; 5410 int nr_cores = cpu_nr_cores(); 5411 struct sibling_subcore_state *sibling_subcore_state; 5412 5413 for (i = 0; i < nr_cores; i++) { 5414 int first_cpu = i * threads_per_core; 5415 int node = cpu_to_node(first_cpu); 5416 5417 /* Ignore if it is already allocated. */ 5418 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5419 continue; 5420 5421 sibling_subcore_state = 5422 kzalloc_node(sizeof(struct sibling_subcore_state), 5423 GFP_KERNEL, node); 5424 if (!sibling_subcore_state) 5425 return -ENOMEM; 5426 5427 5428 for (j = 0; j < threads_per_core; j++) { 5429 int cpu = first_cpu + j; 5430 5431 paca_ptrs[cpu]->sibling_subcore_state = 5432 sibling_subcore_state; 5433 } 5434 } 5435 return 0; 5436 } 5437 5438 static int kvmppc_radix_possible(void) 5439 { 5440 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5441 } 5442 5443 static int kvmppc_book3s_init_hv(void) 5444 { 5445 int r; 5446 /* 5447 * FIXME!! Do we need to check on all cpus ? 5448 */ 5449 r = kvmppc_core_check_processor_compat_hv(); 5450 if (r < 0) 5451 return -ENODEV; 5452 5453 r = kvmhv_nested_init(); 5454 if (r) 5455 return r; 5456 5457 r = kvm_init_subcore_bitmap(); 5458 if (r) 5459 return r; 5460 5461 /* 5462 * We need a way of accessing the XICS interrupt controller, 5463 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5464 * indirectly, via OPAL. 5465 */ 5466 #ifdef CONFIG_SMP 5467 if (!xics_on_xive() && !kvmhv_on_pseries() && 5468 !local_paca->kvm_hstate.xics_phys) { 5469 struct device_node *np; 5470 5471 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5472 if (!np) { 5473 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5474 return -ENODEV; 5475 } 5476 /* presence of intc confirmed - node can be dropped again */ 5477 of_node_put(np); 5478 } 5479 #endif 5480 5481 kvm_ops_hv.owner = THIS_MODULE; 5482 kvmppc_hv_ops = &kvm_ops_hv; 5483 5484 init_default_hcalls(); 5485 5486 init_vcore_lists(); 5487 5488 r = kvmppc_mmu_hv_init(); 5489 if (r) 5490 return r; 5491 5492 if (kvmppc_radix_possible()) 5493 r = kvmppc_radix_init(); 5494 5495 /* 5496 * POWER9 chips before version 2.02 can't have some threads in 5497 * HPT mode and some in radix mode on the same core. 5498 */ 5499 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5500 unsigned int pvr = mfspr(SPRN_PVR); 5501 if ((pvr >> 16) == PVR_POWER9 && 5502 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5503 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5504 no_mixing_hpt_and_radix = true; 5505 } 5506 5507 return r; 5508 } 5509 5510 static void kvmppc_book3s_exit_hv(void) 5511 { 5512 kvmppc_free_host_rm_ops(); 5513 if (kvmppc_radix_possible()) 5514 kvmppc_radix_exit(); 5515 kvmppc_hv_ops = NULL; 5516 kvmhv_nested_exit(); 5517 } 5518 5519 module_init(kvmppc_book3s_init_hv); 5520 module_exit(kvmppc_book3s_exit_hv); 5521 MODULE_LICENSE("GPL"); 5522 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5523 MODULE_ALIAS("devname:kvm"); 5524