1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/io.h> 57 #include <asm/kvm_ppc.h> 58 #include <asm/kvm_book3s.h> 59 #include <asm/mmu_context.h> 60 #include <asm/lppaca.h> 61 #include <asm/processor.h> 62 #include <asm/cputhreads.h> 63 #include <asm/page.h> 64 #include <asm/hvcall.h> 65 #include <asm/switch_to.h> 66 #include <asm/smp.h> 67 #include <asm/dbell.h> 68 #include <asm/hmi.h> 69 #include <asm/pnv-pci.h> 70 #include <asm/mmu.h> 71 #include <asm/opal.h> 72 #include <asm/xics.h> 73 #include <asm/xive.h> 74 #include <asm/hw_breakpoint.h> 75 #include <asm/kvm_book3s_uvmem.h> 76 #include <asm/ultravisor.h> 77 #include <asm/dtl.h> 78 79 #include "book3s.h" 80 81 #define CREATE_TRACE_POINTS 82 #include "trace_hv.h" 83 84 /* #define EXIT_DEBUG */ 85 /* #define EXIT_DEBUG_SIMPLE */ 86 /* #define EXIT_DEBUG_INT */ 87 88 /* Used to indicate that a guest page fault needs to be handled */ 89 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 90 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 91 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 92 93 /* Used as a "null" value for timebase values */ 94 #define TB_NIL (~(u64)0) 95 96 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 97 98 static int dynamic_mt_modes = 6; 99 module_param(dynamic_mt_modes, int, 0644); 100 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 101 static int target_smt_mode; 102 module_param(target_smt_mode, int, 0644); 103 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 104 105 static bool indep_threads_mode = true; 106 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 107 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static inline bool nesting_enabled(struct kvm *kvm) 132 { 133 return kvm->arch.nested_enable && kvm_is_radix(kvm); 134 } 135 136 /* If set, the threads on each CPU core have to be in the same MMU mode */ 137 static bool no_mixing_hpt_and_radix; 138 139 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 140 141 /* 142 * RWMR values for POWER8. These control the rate at which PURR 143 * and SPURR count and should be set according to the number of 144 * online threads in the vcore being run. 145 */ 146 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 147 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 148 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 149 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 150 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 151 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 153 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 154 155 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 156 RWMR_RPA_P8_1THREAD, 157 RWMR_RPA_P8_1THREAD, 158 RWMR_RPA_P8_2THREAD, 159 RWMR_RPA_P8_3THREAD, 160 RWMR_RPA_P8_4THREAD, 161 RWMR_RPA_P8_5THREAD, 162 RWMR_RPA_P8_6THREAD, 163 RWMR_RPA_P8_7THREAD, 164 RWMR_RPA_P8_8THREAD, 165 }; 166 167 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 168 int *ip) 169 { 170 int i = *ip; 171 struct kvm_vcpu *vcpu; 172 173 while (++i < MAX_SMT_THREADS) { 174 vcpu = READ_ONCE(vc->runnable_threads[i]); 175 if (vcpu) { 176 *ip = i; 177 return vcpu; 178 } 179 } 180 return NULL; 181 } 182 183 /* Used to traverse the list of runnable threads for a given vcore */ 184 #define for_each_runnable_thread(i, vcpu, vc) \ 185 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 186 187 static bool kvmppc_ipi_thread(int cpu) 188 { 189 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 190 191 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 192 if (kvmhv_on_pseries()) 193 return false; 194 195 /* On POWER9 we can use msgsnd to IPI any cpu */ 196 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 197 msg |= get_hard_smp_processor_id(cpu); 198 smp_mb(); 199 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 200 return true; 201 } 202 203 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 204 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 205 preempt_disable(); 206 if (cpu_first_thread_sibling(cpu) == 207 cpu_first_thread_sibling(smp_processor_id())) { 208 msg |= cpu_thread_in_core(cpu); 209 smp_mb(); 210 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 211 preempt_enable(); 212 return true; 213 } 214 preempt_enable(); 215 } 216 217 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 218 if (cpu >= 0 && cpu < nr_cpu_ids) { 219 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 220 xics_wake_cpu(cpu); 221 return true; 222 } 223 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 224 return true; 225 } 226 #endif 227 228 return false; 229 } 230 231 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 232 { 233 int cpu; 234 struct rcuwait *waitp; 235 236 waitp = kvm_arch_vcpu_get_wait(vcpu); 237 if (rcuwait_wake_up(waitp)) 238 ++vcpu->stat.halt_wakeup; 239 240 cpu = READ_ONCE(vcpu->arch.thread_cpu); 241 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 242 return; 243 244 /* CPU points to the first thread of the core */ 245 cpu = vcpu->cpu; 246 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 247 smp_send_reschedule(cpu); 248 } 249 250 /* 251 * We use the vcpu_load/put functions to measure stolen time. 252 * Stolen time is counted as time when either the vcpu is able to 253 * run as part of a virtual core, but the task running the vcore 254 * is preempted or sleeping, or when the vcpu needs something done 255 * in the kernel by the task running the vcpu, but that task is 256 * preempted or sleeping. Those two things have to be counted 257 * separately, since one of the vcpu tasks will take on the job 258 * of running the core, and the other vcpu tasks in the vcore will 259 * sleep waiting for it to do that, but that sleep shouldn't count 260 * as stolen time. 261 * 262 * Hence we accumulate stolen time when the vcpu can run as part of 263 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 264 * needs its task to do other things in the kernel (for example, 265 * service a page fault) in busy_stolen. We don't accumulate 266 * stolen time for a vcore when it is inactive, or for a vcpu 267 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 268 * a misnomer; it means that the vcpu task is not executing in 269 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 270 * the kernel. We don't have any way of dividing up that time 271 * between time that the vcpu is genuinely stopped, time that 272 * the task is actively working on behalf of the vcpu, and time 273 * that the task is preempted, so we don't count any of it as 274 * stolen. 275 * 276 * Updates to busy_stolen are protected by arch.tbacct_lock; 277 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 278 * lock. The stolen times are measured in units of timebase ticks. 279 * (Note that the != TB_NIL checks below are purely defensive; 280 * they should never fail.) 281 */ 282 283 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 284 { 285 unsigned long flags; 286 287 spin_lock_irqsave(&vc->stoltb_lock, flags); 288 vc->preempt_tb = mftb(); 289 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 290 } 291 292 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 293 { 294 unsigned long flags; 295 296 spin_lock_irqsave(&vc->stoltb_lock, flags); 297 if (vc->preempt_tb != TB_NIL) { 298 vc->stolen_tb += mftb() - vc->preempt_tb; 299 vc->preempt_tb = TB_NIL; 300 } 301 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 302 } 303 304 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 305 { 306 struct kvmppc_vcore *vc = vcpu->arch.vcore; 307 unsigned long flags; 308 309 /* 310 * We can test vc->runner without taking the vcore lock, 311 * because only this task ever sets vc->runner to this 312 * vcpu, and once it is set to this vcpu, only this task 313 * ever sets it to NULL. 314 */ 315 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 316 kvmppc_core_end_stolen(vc); 317 318 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 319 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 320 vcpu->arch.busy_preempt != TB_NIL) { 321 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 322 vcpu->arch.busy_preempt = TB_NIL; 323 } 324 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 325 } 326 327 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 328 { 329 struct kvmppc_vcore *vc = vcpu->arch.vcore; 330 unsigned long flags; 331 332 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 333 kvmppc_core_start_stolen(vc); 334 335 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 336 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 337 vcpu->arch.busy_preempt = mftb(); 338 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 339 } 340 341 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 342 { 343 vcpu->arch.pvr = pvr; 344 } 345 346 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 347 { 348 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 349 struct kvmppc_vcore *vc = vcpu->arch.vcore; 350 351 /* We can (emulate) our own architecture version and anything older */ 352 if (cpu_has_feature(CPU_FTR_ARCH_300)) 353 host_pcr_bit = PCR_ARCH_300; 354 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 355 host_pcr_bit = PCR_ARCH_207; 356 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 357 host_pcr_bit = PCR_ARCH_206; 358 else 359 host_pcr_bit = PCR_ARCH_205; 360 361 /* Determine lowest PCR bit needed to run guest in given PVR level */ 362 guest_pcr_bit = host_pcr_bit; 363 if (arch_compat) { 364 switch (arch_compat) { 365 case PVR_ARCH_205: 366 guest_pcr_bit = PCR_ARCH_205; 367 break; 368 case PVR_ARCH_206: 369 case PVR_ARCH_206p: 370 guest_pcr_bit = PCR_ARCH_206; 371 break; 372 case PVR_ARCH_207: 373 guest_pcr_bit = PCR_ARCH_207; 374 break; 375 case PVR_ARCH_300: 376 guest_pcr_bit = PCR_ARCH_300; 377 break; 378 default: 379 return -EINVAL; 380 } 381 } 382 383 /* Check requested PCR bits don't exceed our capabilities */ 384 if (guest_pcr_bit > host_pcr_bit) 385 return -EINVAL; 386 387 spin_lock(&vc->lock); 388 vc->arch_compat = arch_compat; 389 /* 390 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 391 * Also set all reserved PCR bits 392 */ 393 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 394 spin_unlock(&vc->lock); 395 396 return 0; 397 } 398 399 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 400 { 401 int r; 402 403 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 404 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 405 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 406 for (r = 0; r < 16; ++r) 407 pr_err("r%2d = %.16lx r%d = %.16lx\n", 408 r, kvmppc_get_gpr(vcpu, r), 409 r+16, kvmppc_get_gpr(vcpu, r+16)); 410 pr_err("ctr = %.16lx lr = %.16lx\n", 411 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 412 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 413 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 414 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 415 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 416 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 417 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 418 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 419 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 420 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 421 pr_err("fault dar = %.16lx dsisr = %.8x\n", 422 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 423 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 424 for (r = 0; r < vcpu->arch.slb_max; ++r) 425 pr_err(" ESID = %.16llx VSID = %.16llx\n", 426 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 427 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 428 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 429 vcpu->arch.last_inst); 430 } 431 432 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 433 { 434 return kvm_get_vcpu_by_id(kvm, id); 435 } 436 437 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 438 { 439 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 440 vpa->yield_count = cpu_to_be32(1); 441 } 442 443 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 444 unsigned long addr, unsigned long len) 445 { 446 /* check address is cacheline aligned */ 447 if (addr & (L1_CACHE_BYTES - 1)) 448 return -EINVAL; 449 spin_lock(&vcpu->arch.vpa_update_lock); 450 if (v->next_gpa != addr || v->len != len) { 451 v->next_gpa = addr; 452 v->len = addr ? len : 0; 453 v->update_pending = 1; 454 } 455 spin_unlock(&vcpu->arch.vpa_update_lock); 456 return 0; 457 } 458 459 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 460 struct reg_vpa { 461 u32 dummy; 462 union { 463 __be16 hword; 464 __be32 word; 465 } length; 466 }; 467 468 static int vpa_is_registered(struct kvmppc_vpa *vpap) 469 { 470 if (vpap->update_pending) 471 return vpap->next_gpa != 0; 472 return vpap->pinned_addr != NULL; 473 } 474 475 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 476 unsigned long flags, 477 unsigned long vcpuid, unsigned long vpa) 478 { 479 struct kvm *kvm = vcpu->kvm; 480 unsigned long len, nb; 481 void *va; 482 struct kvm_vcpu *tvcpu; 483 int err; 484 int subfunc; 485 struct kvmppc_vpa *vpap; 486 487 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 488 if (!tvcpu) 489 return H_PARAMETER; 490 491 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 492 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 493 subfunc == H_VPA_REG_SLB) { 494 /* Registering new area - address must be cache-line aligned */ 495 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 496 return H_PARAMETER; 497 498 /* convert logical addr to kernel addr and read length */ 499 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 500 if (va == NULL) 501 return H_PARAMETER; 502 if (subfunc == H_VPA_REG_VPA) 503 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 504 else 505 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 506 kvmppc_unpin_guest_page(kvm, va, vpa, false); 507 508 /* Check length */ 509 if (len > nb || len < sizeof(struct reg_vpa)) 510 return H_PARAMETER; 511 } else { 512 vpa = 0; 513 len = 0; 514 } 515 516 err = H_PARAMETER; 517 vpap = NULL; 518 spin_lock(&tvcpu->arch.vpa_update_lock); 519 520 switch (subfunc) { 521 case H_VPA_REG_VPA: /* register VPA */ 522 /* 523 * The size of our lppaca is 1kB because of the way we align 524 * it for the guest to avoid crossing a 4kB boundary. We only 525 * use 640 bytes of the structure though, so we should accept 526 * clients that set a size of 640. 527 */ 528 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 529 if (len < sizeof(struct lppaca)) 530 break; 531 vpap = &tvcpu->arch.vpa; 532 err = 0; 533 break; 534 535 case H_VPA_REG_DTL: /* register DTL */ 536 if (len < sizeof(struct dtl_entry)) 537 break; 538 len -= len % sizeof(struct dtl_entry); 539 540 /* Check that they have previously registered a VPA */ 541 err = H_RESOURCE; 542 if (!vpa_is_registered(&tvcpu->arch.vpa)) 543 break; 544 545 vpap = &tvcpu->arch.dtl; 546 err = 0; 547 break; 548 549 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 550 /* Check that they have previously registered a VPA */ 551 err = H_RESOURCE; 552 if (!vpa_is_registered(&tvcpu->arch.vpa)) 553 break; 554 555 vpap = &tvcpu->arch.slb_shadow; 556 err = 0; 557 break; 558 559 case H_VPA_DEREG_VPA: /* deregister VPA */ 560 /* Check they don't still have a DTL or SLB buf registered */ 561 err = H_RESOURCE; 562 if (vpa_is_registered(&tvcpu->arch.dtl) || 563 vpa_is_registered(&tvcpu->arch.slb_shadow)) 564 break; 565 566 vpap = &tvcpu->arch.vpa; 567 err = 0; 568 break; 569 570 case H_VPA_DEREG_DTL: /* deregister DTL */ 571 vpap = &tvcpu->arch.dtl; 572 err = 0; 573 break; 574 575 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 576 vpap = &tvcpu->arch.slb_shadow; 577 err = 0; 578 break; 579 } 580 581 if (vpap) { 582 vpap->next_gpa = vpa; 583 vpap->len = len; 584 vpap->update_pending = 1; 585 } 586 587 spin_unlock(&tvcpu->arch.vpa_update_lock); 588 589 return err; 590 } 591 592 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 593 { 594 struct kvm *kvm = vcpu->kvm; 595 void *va; 596 unsigned long nb; 597 unsigned long gpa; 598 599 /* 600 * We need to pin the page pointed to by vpap->next_gpa, 601 * but we can't call kvmppc_pin_guest_page under the lock 602 * as it does get_user_pages() and down_read(). So we 603 * have to drop the lock, pin the page, then get the lock 604 * again and check that a new area didn't get registered 605 * in the meantime. 606 */ 607 for (;;) { 608 gpa = vpap->next_gpa; 609 spin_unlock(&vcpu->arch.vpa_update_lock); 610 va = NULL; 611 nb = 0; 612 if (gpa) 613 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 614 spin_lock(&vcpu->arch.vpa_update_lock); 615 if (gpa == vpap->next_gpa) 616 break; 617 /* sigh... unpin that one and try again */ 618 if (va) 619 kvmppc_unpin_guest_page(kvm, va, gpa, false); 620 } 621 622 vpap->update_pending = 0; 623 if (va && nb < vpap->len) { 624 /* 625 * If it's now too short, it must be that userspace 626 * has changed the mappings underlying guest memory, 627 * so unregister the region. 628 */ 629 kvmppc_unpin_guest_page(kvm, va, gpa, false); 630 va = NULL; 631 } 632 if (vpap->pinned_addr) 633 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 634 vpap->dirty); 635 vpap->gpa = gpa; 636 vpap->pinned_addr = va; 637 vpap->dirty = false; 638 if (va) 639 vpap->pinned_end = va + vpap->len; 640 } 641 642 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 643 { 644 if (!(vcpu->arch.vpa.update_pending || 645 vcpu->arch.slb_shadow.update_pending || 646 vcpu->arch.dtl.update_pending)) 647 return; 648 649 spin_lock(&vcpu->arch.vpa_update_lock); 650 if (vcpu->arch.vpa.update_pending) { 651 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 652 if (vcpu->arch.vpa.pinned_addr) 653 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 654 } 655 if (vcpu->arch.dtl.update_pending) { 656 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 657 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 658 vcpu->arch.dtl_index = 0; 659 } 660 if (vcpu->arch.slb_shadow.update_pending) 661 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 662 spin_unlock(&vcpu->arch.vpa_update_lock); 663 } 664 665 /* 666 * Return the accumulated stolen time for the vcore up until `now'. 667 * The caller should hold the vcore lock. 668 */ 669 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 670 { 671 u64 p; 672 unsigned long flags; 673 674 spin_lock_irqsave(&vc->stoltb_lock, flags); 675 p = vc->stolen_tb; 676 if (vc->vcore_state != VCORE_INACTIVE && 677 vc->preempt_tb != TB_NIL) 678 p += now - vc->preempt_tb; 679 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 680 return p; 681 } 682 683 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 684 struct kvmppc_vcore *vc) 685 { 686 struct dtl_entry *dt; 687 struct lppaca *vpa; 688 unsigned long stolen; 689 unsigned long core_stolen; 690 u64 now; 691 unsigned long flags; 692 693 dt = vcpu->arch.dtl_ptr; 694 vpa = vcpu->arch.vpa.pinned_addr; 695 now = mftb(); 696 core_stolen = vcore_stolen_time(vc, now); 697 stolen = core_stolen - vcpu->arch.stolen_logged; 698 vcpu->arch.stolen_logged = core_stolen; 699 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 700 stolen += vcpu->arch.busy_stolen; 701 vcpu->arch.busy_stolen = 0; 702 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 703 if (!dt || !vpa) 704 return; 705 memset(dt, 0, sizeof(struct dtl_entry)); 706 dt->dispatch_reason = 7; 707 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 708 dt->timebase = cpu_to_be64(now + vc->tb_offset); 709 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 710 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 711 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 712 ++dt; 713 if (dt == vcpu->arch.dtl.pinned_end) 714 dt = vcpu->arch.dtl.pinned_addr; 715 vcpu->arch.dtl_ptr = dt; 716 /* order writing *dt vs. writing vpa->dtl_idx */ 717 smp_wmb(); 718 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 719 vcpu->arch.dtl.dirty = true; 720 } 721 722 /* See if there is a doorbell interrupt pending for a vcpu */ 723 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 724 { 725 int thr; 726 struct kvmppc_vcore *vc; 727 728 if (vcpu->arch.doorbell_request) 729 return true; 730 /* 731 * Ensure that the read of vcore->dpdes comes after the read 732 * of vcpu->doorbell_request. This barrier matches the 733 * smp_wmb() in kvmppc_guest_entry_inject(). 734 */ 735 smp_rmb(); 736 vc = vcpu->arch.vcore; 737 thr = vcpu->vcpu_id - vc->first_vcpuid; 738 return !!(vc->dpdes & (1 << thr)); 739 } 740 741 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 742 { 743 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 744 return true; 745 if ((!vcpu->arch.vcore->arch_compat) && 746 cpu_has_feature(CPU_FTR_ARCH_207S)) 747 return true; 748 return false; 749 } 750 751 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 752 unsigned long resource, unsigned long value1, 753 unsigned long value2) 754 { 755 switch (resource) { 756 case H_SET_MODE_RESOURCE_SET_CIABR: 757 if (!kvmppc_power8_compatible(vcpu)) 758 return H_P2; 759 if (value2) 760 return H_P4; 761 if (mflags) 762 return H_UNSUPPORTED_FLAG_START; 763 /* Guests can't breakpoint the hypervisor */ 764 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 765 return H_P3; 766 vcpu->arch.ciabr = value1; 767 return H_SUCCESS; 768 case H_SET_MODE_RESOURCE_SET_DAWR0: 769 if (!kvmppc_power8_compatible(vcpu)) 770 return H_P2; 771 if (!ppc_breakpoint_available()) 772 return H_P2; 773 if (mflags) 774 return H_UNSUPPORTED_FLAG_START; 775 if (value2 & DABRX_HYP) 776 return H_P4; 777 vcpu->arch.dawr = value1; 778 vcpu->arch.dawrx = value2; 779 return H_SUCCESS; 780 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 781 /* KVM does not support mflags=2 (AIL=2) */ 782 if (mflags != 0 && mflags != 3) 783 return H_UNSUPPORTED_FLAG_START; 784 return H_TOO_HARD; 785 default: 786 return H_TOO_HARD; 787 } 788 } 789 790 /* Copy guest memory in place - must reside within a single memslot */ 791 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 792 unsigned long len) 793 { 794 struct kvm_memory_slot *to_memslot = NULL; 795 struct kvm_memory_slot *from_memslot = NULL; 796 unsigned long to_addr, from_addr; 797 int r; 798 799 /* Get HPA for from address */ 800 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 801 if (!from_memslot) 802 return -EFAULT; 803 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 804 << PAGE_SHIFT)) 805 return -EINVAL; 806 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 807 if (kvm_is_error_hva(from_addr)) 808 return -EFAULT; 809 from_addr |= (from & (PAGE_SIZE - 1)); 810 811 /* Get HPA for to address */ 812 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 813 if (!to_memslot) 814 return -EFAULT; 815 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 816 << PAGE_SHIFT)) 817 return -EINVAL; 818 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 819 if (kvm_is_error_hva(to_addr)) 820 return -EFAULT; 821 to_addr |= (to & (PAGE_SIZE - 1)); 822 823 /* Perform copy */ 824 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 825 len); 826 if (r) 827 return -EFAULT; 828 mark_page_dirty(kvm, to >> PAGE_SHIFT); 829 return 0; 830 } 831 832 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 833 unsigned long dest, unsigned long src) 834 { 835 u64 pg_sz = SZ_4K; /* 4K page size */ 836 u64 pg_mask = SZ_4K - 1; 837 int ret; 838 839 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 840 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 841 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 842 return H_PARAMETER; 843 844 /* dest (and src if copy_page flag set) must be page aligned */ 845 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 846 return H_PARAMETER; 847 848 /* zero and/or copy the page as determined by the flags */ 849 if (flags & H_COPY_PAGE) { 850 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 851 if (ret < 0) 852 return H_PARAMETER; 853 } else if (flags & H_ZERO_PAGE) { 854 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 855 if (ret < 0) 856 return H_PARAMETER; 857 } 858 859 /* We can ignore the remaining flags */ 860 861 return H_SUCCESS; 862 } 863 864 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 865 { 866 struct kvmppc_vcore *vcore = target->arch.vcore; 867 868 /* 869 * We expect to have been called by the real mode handler 870 * (kvmppc_rm_h_confer()) which would have directly returned 871 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 872 * have useful work to do and should not confer) so we don't 873 * recheck that here. 874 */ 875 876 spin_lock(&vcore->lock); 877 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 878 vcore->vcore_state != VCORE_INACTIVE && 879 vcore->runner) 880 target = vcore->runner; 881 spin_unlock(&vcore->lock); 882 883 return kvm_vcpu_yield_to(target); 884 } 885 886 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 887 { 888 int yield_count = 0; 889 struct lppaca *lppaca; 890 891 spin_lock(&vcpu->arch.vpa_update_lock); 892 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 893 if (lppaca) 894 yield_count = be32_to_cpu(lppaca->yield_count); 895 spin_unlock(&vcpu->arch.vpa_update_lock); 896 return yield_count; 897 } 898 899 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 900 { 901 unsigned long req = kvmppc_get_gpr(vcpu, 3); 902 unsigned long target, ret = H_SUCCESS; 903 int yield_count; 904 struct kvm_vcpu *tvcpu; 905 int idx, rc; 906 907 if (req <= MAX_HCALL_OPCODE && 908 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 909 return RESUME_HOST; 910 911 switch (req) { 912 case H_CEDE: 913 break; 914 case H_PROD: 915 target = kvmppc_get_gpr(vcpu, 4); 916 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 917 if (!tvcpu) { 918 ret = H_PARAMETER; 919 break; 920 } 921 tvcpu->arch.prodded = 1; 922 smp_mb(); 923 if (tvcpu->arch.ceded) 924 kvmppc_fast_vcpu_kick_hv(tvcpu); 925 break; 926 case H_CONFER: 927 target = kvmppc_get_gpr(vcpu, 4); 928 if (target == -1) 929 break; 930 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 931 if (!tvcpu) { 932 ret = H_PARAMETER; 933 break; 934 } 935 yield_count = kvmppc_get_gpr(vcpu, 5); 936 if (kvmppc_get_yield_count(tvcpu) != yield_count) 937 break; 938 kvm_arch_vcpu_yield_to(tvcpu); 939 break; 940 case H_REGISTER_VPA: 941 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 942 kvmppc_get_gpr(vcpu, 5), 943 kvmppc_get_gpr(vcpu, 6)); 944 break; 945 case H_RTAS: 946 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 947 return RESUME_HOST; 948 949 idx = srcu_read_lock(&vcpu->kvm->srcu); 950 rc = kvmppc_rtas_hcall(vcpu); 951 srcu_read_unlock(&vcpu->kvm->srcu, idx); 952 953 if (rc == -ENOENT) 954 return RESUME_HOST; 955 else if (rc == 0) 956 break; 957 958 /* Send the error out to userspace via KVM_RUN */ 959 return rc; 960 case H_LOGICAL_CI_LOAD: 961 ret = kvmppc_h_logical_ci_load(vcpu); 962 if (ret == H_TOO_HARD) 963 return RESUME_HOST; 964 break; 965 case H_LOGICAL_CI_STORE: 966 ret = kvmppc_h_logical_ci_store(vcpu); 967 if (ret == H_TOO_HARD) 968 return RESUME_HOST; 969 break; 970 case H_SET_MODE: 971 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 972 kvmppc_get_gpr(vcpu, 5), 973 kvmppc_get_gpr(vcpu, 6), 974 kvmppc_get_gpr(vcpu, 7)); 975 if (ret == H_TOO_HARD) 976 return RESUME_HOST; 977 break; 978 case H_XIRR: 979 case H_CPPR: 980 case H_EOI: 981 case H_IPI: 982 case H_IPOLL: 983 case H_XIRR_X: 984 if (kvmppc_xics_enabled(vcpu)) { 985 if (xics_on_xive()) { 986 ret = H_NOT_AVAILABLE; 987 return RESUME_GUEST; 988 } 989 ret = kvmppc_xics_hcall(vcpu, req); 990 break; 991 } 992 return RESUME_HOST; 993 case H_SET_DABR: 994 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 995 break; 996 case H_SET_XDABR: 997 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 998 kvmppc_get_gpr(vcpu, 5)); 999 break; 1000 #ifdef CONFIG_SPAPR_TCE_IOMMU 1001 case H_GET_TCE: 1002 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1003 kvmppc_get_gpr(vcpu, 5)); 1004 if (ret == H_TOO_HARD) 1005 return RESUME_HOST; 1006 break; 1007 case H_PUT_TCE: 1008 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1009 kvmppc_get_gpr(vcpu, 5), 1010 kvmppc_get_gpr(vcpu, 6)); 1011 if (ret == H_TOO_HARD) 1012 return RESUME_HOST; 1013 break; 1014 case H_PUT_TCE_INDIRECT: 1015 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1016 kvmppc_get_gpr(vcpu, 5), 1017 kvmppc_get_gpr(vcpu, 6), 1018 kvmppc_get_gpr(vcpu, 7)); 1019 if (ret == H_TOO_HARD) 1020 return RESUME_HOST; 1021 break; 1022 case H_STUFF_TCE: 1023 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1024 kvmppc_get_gpr(vcpu, 5), 1025 kvmppc_get_gpr(vcpu, 6), 1026 kvmppc_get_gpr(vcpu, 7)); 1027 if (ret == H_TOO_HARD) 1028 return RESUME_HOST; 1029 break; 1030 #endif 1031 case H_RANDOM: 1032 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1033 ret = H_HARDWARE; 1034 break; 1035 1036 case H_SET_PARTITION_TABLE: 1037 ret = H_FUNCTION; 1038 if (nesting_enabled(vcpu->kvm)) 1039 ret = kvmhv_set_partition_table(vcpu); 1040 break; 1041 case H_ENTER_NESTED: 1042 ret = H_FUNCTION; 1043 if (!nesting_enabled(vcpu->kvm)) 1044 break; 1045 ret = kvmhv_enter_nested_guest(vcpu); 1046 if (ret == H_INTERRUPT) { 1047 kvmppc_set_gpr(vcpu, 3, 0); 1048 vcpu->arch.hcall_needed = 0; 1049 return -EINTR; 1050 } else if (ret == H_TOO_HARD) { 1051 kvmppc_set_gpr(vcpu, 3, 0); 1052 vcpu->arch.hcall_needed = 0; 1053 return RESUME_HOST; 1054 } 1055 break; 1056 case H_TLB_INVALIDATE: 1057 ret = H_FUNCTION; 1058 if (nesting_enabled(vcpu->kvm)) 1059 ret = kvmhv_do_nested_tlbie(vcpu); 1060 break; 1061 case H_COPY_TOFROM_GUEST: 1062 ret = H_FUNCTION; 1063 if (nesting_enabled(vcpu->kvm)) 1064 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1065 break; 1066 case H_PAGE_INIT: 1067 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1068 kvmppc_get_gpr(vcpu, 5), 1069 kvmppc_get_gpr(vcpu, 6)); 1070 break; 1071 case H_SVM_PAGE_IN: 1072 ret = H_UNSUPPORTED; 1073 if (kvmppc_get_srr1(vcpu) & MSR_S) 1074 ret = kvmppc_h_svm_page_in(vcpu->kvm, 1075 kvmppc_get_gpr(vcpu, 4), 1076 kvmppc_get_gpr(vcpu, 5), 1077 kvmppc_get_gpr(vcpu, 6)); 1078 break; 1079 case H_SVM_PAGE_OUT: 1080 ret = H_UNSUPPORTED; 1081 if (kvmppc_get_srr1(vcpu) & MSR_S) 1082 ret = kvmppc_h_svm_page_out(vcpu->kvm, 1083 kvmppc_get_gpr(vcpu, 4), 1084 kvmppc_get_gpr(vcpu, 5), 1085 kvmppc_get_gpr(vcpu, 6)); 1086 break; 1087 case H_SVM_INIT_START: 1088 ret = H_UNSUPPORTED; 1089 if (kvmppc_get_srr1(vcpu) & MSR_S) 1090 ret = kvmppc_h_svm_init_start(vcpu->kvm); 1091 break; 1092 case H_SVM_INIT_DONE: 1093 ret = H_UNSUPPORTED; 1094 if (kvmppc_get_srr1(vcpu) & MSR_S) 1095 ret = kvmppc_h_svm_init_done(vcpu->kvm); 1096 break; 1097 case H_SVM_INIT_ABORT: 1098 /* 1099 * Even if that call is made by the Ultravisor, the SSR1 value 1100 * is the guest context one, with the secure bit clear as it has 1101 * not yet been secured. So we can't check it here. 1102 * Instead the kvm->arch.secure_guest flag is checked inside 1103 * kvmppc_h_svm_init_abort(). 1104 */ 1105 ret = kvmppc_h_svm_init_abort(vcpu->kvm); 1106 break; 1107 1108 default: 1109 return RESUME_HOST; 1110 } 1111 kvmppc_set_gpr(vcpu, 3, ret); 1112 vcpu->arch.hcall_needed = 0; 1113 return RESUME_GUEST; 1114 } 1115 1116 /* 1117 * Handle H_CEDE in the nested virtualization case where we haven't 1118 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1119 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1120 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1121 */ 1122 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1123 { 1124 vcpu->arch.shregs.msr |= MSR_EE; 1125 vcpu->arch.ceded = 1; 1126 smp_mb(); 1127 if (vcpu->arch.prodded) { 1128 vcpu->arch.prodded = 0; 1129 smp_mb(); 1130 vcpu->arch.ceded = 0; 1131 } 1132 } 1133 1134 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1135 { 1136 switch (cmd) { 1137 case H_CEDE: 1138 case H_PROD: 1139 case H_CONFER: 1140 case H_REGISTER_VPA: 1141 case H_SET_MODE: 1142 case H_LOGICAL_CI_LOAD: 1143 case H_LOGICAL_CI_STORE: 1144 #ifdef CONFIG_KVM_XICS 1145 case H_XIRR: 1146 case H_CPPR: 1147 case H_EOI: 1148 case H_IPI: 1149 case H_IPOLL: 1150 case H_XIRR_X: 1151 #endif 1152 case H_PAGE_INIT: 1153 return 1; 1154 } 1155 1156 /* See if it's in the real-mode table */ 1157 return kvmppc_hcall_impl_hv_realmode(cmd); 1158 } 1159 1160 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1161 { 1162 u32 last_inst; 1163 1164 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1165 EMULATE_DONE) { 1166 /* 1167 * Fetch failed, so return to guest and 1168 * try executing it again. 1169 */ 1170 return RESUME_GUEST; 1171 } 1172 1173 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1174 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1175 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1176 return RESUME_HOST; 1177 } else { 1178 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1179 return RESUME_GUEST; 1180 } 1181 } 1182 1183 static void do_nothing(void *x) 1184 { 1185 } 1186 1187 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1188 { 1189 int thr, cpu, pcpu, nthreads; 1190 struct kvm_vcpu *v; 1191 unsigned long dpdes; 1192 1193 nthreads = vcpu->kvm->arch.emul_smt_mode; 1194 dpdes = 0; 1195 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1196 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1197 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1198 if (!v) 1199 continue; 1200 /* 1201 * If the vcpu is currently running on a physical cpu thread, 1202 * interrupt it in order to pull it out of the guest briefly, 1203 * which will update its vcore->dpdes value. 1204 */ 1205 pcpu = READ_ONCE(v->cpu); 1206 if (pcpu >= 0) 1207 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1208 if (kvmppc_doorbell_pending(v)) 1209 dpdes |= 1 << thr; 1210 } 1211 return dpdes; 1212 } 1213 1214 /* 1215 * On POWER9, emulate doorbell-related instructions in order to 1216 * give the guest the illusion of running on a multi-threaded core. 1217 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1218 * and mfspr DPDES. 1219 */ 1220 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1221 { 1222 u32 inst, rb, thr; 1223 unsigned long arg; 1224 struct kvm *kvm = vcpu->kvm; 1225 struct kvm_vcpu *tvcpu; 1226 1227 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1228 return RESUME_GUEST; 1229 if (get_op(inst) != 31) 1230 return EMULATE_FAIL; 1231 rb = get_rb(inst); 1232 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1233 switch (get_xop(inst)) { 1234 case OP_31_XOP_MSGSNDP: 1235 arg = kvmppc_get_gpr(vcpu, rb); 1236 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1237 break; 1238 arg &= 0x3f; 1239 if (arg >= kvm->arch.emul_smt_mode) 1240 break; 1241 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1242 if (!tvcpu) 1243 break; 1244 if (!tvcpu->arch.doorbell_request) { 1245 tvcpu->arch.doorbell_request = 1; 1246 kvmppc_fast_vcpu_kick_hv(tvcpu); 1247 } 1248 break; 1249 case OP_31_XOP_MSGCLRP: 1250 arg = kvmppc_get_gpr(vcpu, rb); 1251 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1252 break; 1253 vcpu->arch.vcore->dpdes = 0; 1254 vcpu->arch.doorbell_request = 0; 1255 break; 1256 case OP_31_XOP_MFSPR: 1257 switch (get_sprn(inst)) { 1258 case SPRN_TIR: 1259 arg = thr; 1260 break; 1261 case SPRN_DPDES: 1262 arg = kvmppc_read_dpdes(vcpu); 1263 break; 1264 default: 1265 return EMULATE_FAIL; 1266 } 1267 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1268 break; 1269 default: 1270 return EMULATE_FAIL; 1271 } 1272 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1273 return RESUME_GUEST; 1274 } 1275 1276 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1277 struct task_struct *tsk) 1278 { 1279 struct kvm_run *run = vcpu->run; 1280 int r = RESUME_HOST; 1281 1282 vcpu->stat.sum_exits++; 1283 1284 /* 1285 * This can happen if an interrupt occurs in the last stages 1286 * of guest entry or the first stages of guest exit (i.e. after 1287 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1288 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1289 * That can happen due to a bug, or due to a machine check 1290 * occurring at just the wrong time. 1291 */ 1292 if (vcpu->arch.shregs.msr & MSR_HV) { 1293 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1294 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1295 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1296 vcpu->arch.shregs.msr); 1297 kvmppc_dump_regs(vcpu); 1298 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1299 run->hw.hardware_exit_reason = vcpu->arch.trap; 1300 return RESUME_HOST; 1301 } 1302 run->exit_reason = KVM_EXIT_UNKNOWN; 1303 run->ready_for_interrupt_injection = 1; 1304 switch (vcpu->arch.trap) { 1305 /* We're good on these - the host merely wanted to get our attention */ 1306 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1307 vcpu->stat.dec_exits++; 1308 r = RESUME_GUEST; 1309 break; 1310 case BOOK3S_INTERRUPT_EXTERNAL: 1311 case BOOK3S_INTERRUPT_H_DOORBELL: 1312 case BOOK3S_INTERRUPT_H_VIRT: 1313 vcpu->stat.ext_intr_exits++; 1314 r = RESUME_GUEST; 1315 break; 1316 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1317 case BOOK3S_INTERRUPT_HMI: 1318 case BOOK3S_INTERRUPT_PERFMON: 1319 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1320 r = RESUME_GUEST; 1321 break; 1322 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1323 /* Print the MCE event to host console. */ 1324 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1325 1326 /* 1327 * If the guest can do FWNMI, exit to userspace so it can 1328 * deliver a FWNMI to the guest. 1329 * Otherwise we synthesize a machine check for the guest 1330 * so that it knows that the machine check occurred. 1331 */ 1332 if (!vcpu->kvm->arch.fwnmi_enabled) { 1333 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1334 kvmppc_core_queue_machine_check(vcpu, flags); 1335 r = RESUME_GUEST; 1336 break; 1337 } 1338 1339 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1340 run->exit_reason = KVM_EXIT_NMI; 1341 run->hw.hardware_exit_reason = vcpu->arch.trap; 1342 /* Clear out the old NMI status from run->flags */ 1343 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1344 /* Now set the NMI status */ 1345 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1346 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1347 else 1348 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1349 1350 r = RESUME_HOST; 1351 break; 1352 case BOOK3S_INTERRUPT_PROGRAM: 1353 { 1354 ulong flags; 1355 /* 1356 * Normally program interrupts are delivered directly 1357 * to the guest by the hardware, but we can get here 1358 * as a result of a hypervisor emulation interrupt 1359 * (e40) getting turned into a 700 by BML RTAS. 1360 */ 1361 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1362 kvmppc_core_queue_program(vcpu, flags); 1363 r = RESUME_GUEST; 1364 break; 1365 } 1366 case BOOK3S_INTERRUPT_SYSCALL: 1367 { 1368 /* hcall - punt to userspace */ 1369 int i; 1370 1371 /* hypercall with MSR_PR has already been handled in rmode, 1372 * and never reaches here. 1373 */ 1374 1375 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1376 for (i = 0; i < 9; ++i) 1377 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1378 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1379 vcpu->arch.hcall_needed = 1; 1380 r = RESUME_HOST; 1381 break; 1382 } 1383 /* 1384 * We get these next two if the guest accesses a page which it thinks 1385 * it has mapped but which is not actually present, either because 1386 * it is for an emulated I/O device or because the corresonding 1387 * host page has been paged out. Any other HDSI/HISI interrupts 1388 * have been handled already. 1389 */ 1390 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1391 r = RESUME_PAGE_FAULT; 1392 break; 1393 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1394 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1395 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1396 DSISR_SRR1_MATCH_64S; 1397 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1398 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1399 r = RESUME_PAGE_FAULT; 1400 break; 1401 /* 1402 * This occurs if the guest executes an illegal instruction. 1403 * If the guest debug is disabled, generate a program interrupt 1404 * to the guest. If guest debug is enabled, we need to check 1405 * whether the instruction is a software breakpoint instruction. 1406 * Accordingly return to Guest or Host. 1407 */ 1408 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1409 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1410 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1411 swab32(vcpu->arch.emul_inst) : 1412 vcpu->arch.emul_inst; 1413 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1414 r = kvmppc_emulate_debug_inst(vcpu); 1415 } else { 1416 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1417 r = RESUME_GUEST; 1418 } 1419 break; 1420 /* 1421 * This occurs if the guest (kernel or userspace), does something that 1422 * is prohibited by HFSCR. 1423 * On POWER9, this could be a doorbell instruction that we need 1424 * to emulate. 1425 * Otherwise, we just generate a program interrupt to the guest. 1426 */ 1427 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1428 r = EMULATE_FAIL; 1429 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1430 cpu_has_feature(CPU_FTR_ARCH_300)) 1431 r = kvmppc_emulate_doorbell_instr(vcpu); 1432 if (r == EMULATE_FAIL) { 1433 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1434 r = RESUME_GUEST; 1435 } 1436 break; 1437 1438 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1439 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1440 /* 1441 * This occurs for various TM-related instructions that 1442 * we need to emulate on POWER9 DD2.2. We have already 1443 * handled the cases where the guest was in real-suspend 1444 * mode and was transitioning to transactional state. 1445 */ 1446 r = kvmhv_p9_tm_emulation(vcpu); 1447 break; 1448 #endif 1449 1450 case BOOK3S_INTERRUPT_HV_RM_HARD: 1451 r = RESUME_PASSTHROUGH; 1452 break; 1453 default: 1454 kvmppc_dump_regs(vcpu); 1455 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1456 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1457 vcpu->arch.shregs.msr); 1458 run->hw.hardware_exit_reason = vcpu->arch.trap; 1459 r = RESUME_HOST; 1460 break; 1461 } 1462 1463 return r; 1464 } 1465 1466 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1467 { 1468 int r; 1469 int srcu_idx; 1470 1471 vcpu->stat.sum_exits++; 1472 1473 /* 1474 * This can happen if an interrupt occurs in the last stages 1475 * of guest entry or the first stages of guest exit (i.e. after 1476 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1477 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1478 * That can happen due to a bug, or due to a machine check 1479 * occurring at just the wrong time. 1480 */ 1481 if (vcpu->arch.shregs.msr & MSR_HV) { 1482 pr_emerg("KVM trap in HV mode while nested!\n"); 1483 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1484 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1485 vcpu->arch.shregs.msr); 1486 kvmppc_dump_regs(vcpu); 1487 return RESUME_HOST; 1488 } 1489 switch (vcpu->arch.trap) { 1490 /* We're good on these - the host merely wanted to get our attention */ 1491 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1492 vcpu->stat.dec_exits++; 1493 r = RESUME_GUEST; 1494 break; 1495 case BOOK3S_INTERRUPT_EXTERNAL: 1496 vcpu->stat.ext_intr_exits++; 1497 r = RESUME_HOST; 1498 break; 1499 case BOOK3S_INTERRUPT_H_DOORBELL: 1500 case BOOK3S_INTERRUPT_H_VIRT: 1501 vcpu->stat.ext_intr_exits++; 1502 r = RESUME_GUEST; 1503 break; 1504 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1505 case BOOK3S_INTERRUPT_HMI: 1506 case BOOK3S_INTERRUPT_PERFMON: 1507 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1508 r = RESUME_GUEST; 1509 break; 1510 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1511 /* Pass the machine check to the L1 guest */ 1512 r = RESUME_HOST; 1513 /* Print the MCE event to host console. */ 1514 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1515 break; 1516 /* 1517 * We get these next two if the guest accesses a page which it thinks 1518 * it has mapped but which is not actually present, either because 1519 * it is for an emulated I/O device or because the corresonding 1520 * host page has been paged out. 1521 */ 1522 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1523 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1524 r = kvmhv_nested_page_fault(vcpu); 1525 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1526 break; 1527 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1528 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1529 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1530 DSISR_SRR1_MATCH_64S; 1531 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1532 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1533 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1534 r = kvmhv_nested_page_fault(vcpu); 1535 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1536 break; 1537 1538 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1539 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1540 /* 1541 * This occurs for various TM-related instructions that 1542 * we need to emulate on POWER9 DD2.2. We have already 1543 * handled the cases where the guest was in real-suspend 1544 * mode and was transitioning to transactional state. 1545 */ 1546 r = kvmhv_p9_tm_emulation(vcpu); 1547 break; 1548 #endif 1549 1550 case BOOK3S_INTERRUPT_HV_RM_HARD: 1551 vcpu->arch.trap = 0; 1552 r = RESUME_GUEST; 1553 if (!xics_on_xive()) 1554 kvmppc_xics_rm_complete(vcpu, 0); 1555 break; 1556 default: 1557 r = RESUME_HOST; 1558 break; 1559 } 1560 1561 return r; 1562 } 1563 1564 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1565 struct kvm_sregs *sregs) 1566 { 1567 int i; 1568 1569 memset(sregs, 0, sizeof(struct kvm_sregs)); 1570 sregs->pvr = vcpu->arch.pvr; 1571 for (i = 0; i < vcpu->arch.slb_max; i++) { 1572 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1573 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1574 } 1575 1576 return 0; 1577 } 1578 1579 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1580 struct kvm_sregs *sregs) 1581 { 1582 int i, j; 1583 1584 /* Only accept the same PVR as the host's, since we can't spoof it */ 1585 if (sregs->pvr != vcpu->arch.pvr) 1586 return -EINVAL; 1587 1588 j = 0; 1589 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1590 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1591 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1592 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1593 ++j; 1594 } 1595 } 1596 vcpu->arch.slb_max = j; 1597 1598 return 0; 1599 } 1600 1601 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1602 bool preserve_top32) 1603 { 1604 struct kvm *kvm = vcpu->kvm; 1605 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1606 u64 mask; 1607 1608 spin_lock(&vc->lock); 1609 /* 1610 * If ILE (interrupt little-endian) has changed, update the 1611 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1612 */ 1613 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1614 struct kvm_vcpu *vcpu; 1615 int i; 1616 1617 kvm_for_each_vcpu(i, vcpu, kvm) { 1618 if (vcpu->arch.vcore != vc) 1619 continue; 1620 if (new_lpcr & LPCR_ILE) 1621 vcpu->arch.intr_msr |= MSR_LE; 1622 else 1623 vcpu->arch.intr_msr &= ~MSR_LE; 1624 } 1625 } 1626 1627 /* 1628 * Userspace can only modify DPFD (default prefetch depth), 1629 * ILE (interrupt little-endian) and TC (translation control). 1630 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1631 */ 1632 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1633 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1634 mask |= LPCR_AIL; 1635 /* 1636 * On POWER9, allow userspace to enable large decrementer for the 1637 * guest, whether or not the host has it enabled. 1638 */ 1639 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1640 mask |= LPCR_LD; 1641 1642 /* Broken 32-bit version of LPCR must not clear top bits */ 1643 if (preserve_top32) 1644 mask &= 0xFFFFFFFF; 1645 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1646 spin_unlock(&vc->lock); 1647 } 1648 1649 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1650 union kvmppc_one_reg *val) 1651 { 1652 int r = 0; 1653 long int i; 1654 1655 switch (id) { 1656 case KVM_REG_PPC_DEBUG_INST: 1657 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1658 break; 1659 case KVM_REG_PPC_HIOR: 1660 *val = get_reg_val(id, 0); 1661 break; 1662 case KVM_REG_PPC_DABR: 1663 *val = get_reg_val(id, vcpu->arch.dabr); 1664 break; 1665 case KVM_REG_PPC_DABRX: 1666 *val = get_reg_val(id, vcpu->arch.dabrx); 1667 break; 1668 case KVM_REG_PPC_DSCR: 1669 *val = get_reg_val(id, vcpu->arch.dscr); 1670 break; 1671 case KVM_REG_PPC_PURR: 1672 *val = get_reg_val(id, vcpu->arch.purr); 1673 break; 1674 case KVM_REG_PPC_SPURR: 1675 *val = get_reg_val(id, vcpu->arch.spurr); 1676 break; 1677 case KVM_REG_PPC_AMR: 1678 *val = get_reg_val(id, vcpu->arch.amr); 1679 break; 1680 case KVM_REG_PPC_UAMOR: 1681 *val = get_reg_val(id, vcpu->arch.uamor); 1682 break; 1683 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 1684 i = id - KVM_REG_PPC_MMCR0; 1685 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1686 break; 1687 case KVM_REG_PPC_MMCR2: 1688 *val = get_reg_val(id, vcpu->arch.mmcr[2]); 1689 break; 1690 case KVM_REG_PPC_MMCRA: 1691 *val = get_reg_val(id, vcpu->arch.mmcra); 1692 break; 1693 case KVM_REG_PPC_MMCRS: 1694 *val = get_reg_val(id, vcpu->arch.mmcrs); 1695 break; 1696 case KVM_REG_PPC_MMCR3: 1697 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 1698 break; 1699 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1700 i = id - KVM_REG_PPC_PMC1; 1701 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1702 break; 1703 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1704 i = id - KVM_REG_PPC_SPMC1; 1705 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1706 break; 1707 case KVM_REG_PPC_SIAR: 1708 *val = get_reg_val(id, vcpu->arch.siar); 1709 break; 1710 case KVM_REG_PPC_SDAR: 1711 *val = get_reg_val(id, vcpu->arch.sdar); 1712 break; 1713 case KVM_REG_PPC_SIER: 1714 *val = get_reg_val(id, vcpu->arch.sier[0]); 1715 break; 1716 case KVM_REG_PPC_SIER2: 1717 *val = get_reg_val(id, vcpu->arch.sier[1]); 1718 break; 1719 case KVM_REG_PPC_SIER3: 1720 *val = get_reg_val(id, vcpu->arch.sier[2]); 1721 break; 1722 case KVM_REG_PPC_IAMR: 1723 *val = get_reg_val(id, vcpu->arch.iamr); 1724 break; 1725 case KVM_REG_PPC_PSPB: 1726 *val = get_reg_val(id, vcpu->arch.pspb); 1727 break; 1728 case KVM_REG_PPC_DPDES: 1729 /* 1730 * On POWER9, where we are emulating msgsndp etc., 1731 * we return 1 bit for each vcpu, which can come from 1732 * either vcore->dpdes or doorbell_request. 1733 * On POWER8, doorbell_request is 0. 1734 */ 1735 *val = get_reg_val(id, vcpu->arch.vcore->dpdes | 1736 vcpu->arch.doorbell_request); 1737 break; 1738 case KVM_REG_PPC_VTB: 1739 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1740 break; 1741 case KVM_REG_PPC_DAWR: 1742 *val = get_reg_val(id, vcpu->arch.dawr); 1743 break; 1744 case KVM_REG_PPC_DAWRX: 1745 *val = get_reg_val(id, vcpu->arch.dawrx); 1746 break; 1747 case KVM_REG_PPC_CIABR: 1748 *val = get_reg_val(id, vcpu->arch.ciabr); 1749 break; 1750 case KVM_REG_PPC_CSIGR: 1751 *val = get_reg_val(id, vcpu->arch.csigr); 1752 break; 1753 case KVM_REG_PPC_TACR: 1754 *val = get_reg_val(id, vcpu->arch.tacr); 1755 break; 1756 case KVM_REG_PPC_TCSCR: 1757 *val = get_reg_val(id, vcpu->arch.tcscr); 1758 break; 1759 case KVM_REG_PPC_PID: 1760 *val = get_reg_val(id, vcpu->arch.pid); 1761 break; 1762 case KVM_REG_PPC_ACOP: 1763 *val = get_reg_val(id, vcpu->arch.acop); 1764 break; 1765 case KVM_REG_PPC_WORT: 1766 *val = get_reg_val(id, vcpu->arch.wort); 1767 break; 1768 case KVM_REG_PPC_TIDR: 1769 *val = get_reg_val(id, vcpu->arch.tid); 1770 break; 1771 case KVM_REG_PPC_PSSCR: 1772 *val = get_reg_val(id, vcpu->arch.psscr); 1773 break; 1774 case KVM_REG_PPC_VPA_ADDR: 1775 spin_lock(&vcpu->arch.vpa_update_lock); 1776 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1777 spin_unlock(&vcpu->arch.vpa_update_lock); 1778 break; 1779 case KVM_REG_PPC_VPA_SLB: 1780 spin_lock(&vcpu->arch.vpa_update_lock); 1781 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1782 val->vpaval.length = vcpu->arch.slb_shadow.len; 1783 spin_unlock(&vcpu->arch.vpa_update_lock); 1784 break; 1785 case KVM_REG_PPC_VPA_DTL: 1786 spin_lock(&vcpu->arch.vpa_update_lock); 1787 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1788 val->vpaval.length = vcpu->arch.dtl.len; 1789 spin_unlock(&vcpu->arch.vpa_update_lock); 1790 break; 1791 case KVM_REG_PPC_TB_OFFSET: 1792 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1793 break; 1794 case KVM_REG_PPC_LPCR: 1795 case KVM_REG_PPC_LPCR_64: 1796 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1797 break; 1798 case KVM_REG_PPC_PPR: 1799 *val = get_reg_val(id, vcpu->arch.ppr); 1800 break; 1801 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1802 case KVM_REG_PPC_TFHAR: 1803 *val = get_reg_val(id, vcpu->arch.tfhar); 1804 break; 1805 case KVM_REG_PPC_TFIAR: 1806 *val = get_reg_val(id, vcpu->arch.tfiar); 1807 break; 1808 case KVM_REG_PPC_TEXASR: 1809 *val = get_reg_val(id, vcpu->arch.texasr); 1810 break; 1811 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1812 i = id - KVM_REG_PPC_TM_GPR0; 1813 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1814 break; 1815 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1816 { 1817 int j; 1818 i = id - KVM_REG_PPC_TM_VSR0; 1819 if (i < 32) 1820 for (j = 0; j < TS_FPRWIDTH; j++) 1821 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1822 else { 1823 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1824 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1825 else 1826 r = -ENXIO; 1827 } 1828 break; 1829 } 1830 case KVM_REG_PPC_TM_CR: 1831 *val = get_reg_val(id, vcpu->arch.cr_tm); 1832 break; 1833 case KVM_REG_PPC_TM_XER: 1834 *val = get_reg_val(id, vcpu->arch.xer_tm); 1835 break; 1836 case KVM_REG_PPC_TM_LR: 1837 *val = get_reg_val(id, vcpu->arch.lr_tm); 1838 break; 1839 case KVM_REG_PPC_TM_CTR: 1840 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1841 break; 1842 case KVM_REG_PPC_TM_FPSCR: 1843 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1844 break; 1845 case KVM_REG_PPC_TM_AMR: 1846 *val = get_reg_val(id, vcpu->arch.amr_tm); 1847 break; 1848 case KVM_REG_PPC_TM_PPR: 1849 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1850 break; 1851 case KVM_REG_PPC_TM_VRSAVE: 1852 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1853 break; 1854 case KVM_REG_PPC_TM_VSCR: 1855 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1856 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1857 else 1858 r = -ENXIO; 1859 break; 1860 case KVM_REG_PPC_TM_DSCR: 1861 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1862 break; 1863 case KVM_REG_PPC_TM_TAR: 1864 *val = get_reg_val(id, vcpu->arch.tar_tm); 1865 break; 1866 #endif 1867 case KVM_REG_PPC_ARCH_COMPAT: 1868 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1869 break; 1870 case KVM_REG_PPC_DEC_EXPIRY: 1871 *val = get_reg_val(id, vcpu->arch.dec_expires + 1872 vcpu->arch.vcore->tb_offset); 1873 break; 1874 case KVM_REG_PPC_ONLINE: 1875 *val = get_reg_val(id, vcpu->arch.online); 1876 break; 1877 case KVM_REG_PPC_PTCR: 1878 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1879 break; 1880 default: 1881 r = -EINVAL; 1882 break; 1883 } 1884 1885 return r; 1886 } 1887 1888 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1889 union kvmppc_one_reg *val) 1890 { 1891 int r = 0; 1892 long int i; 1893 unsigned long addr, len; 1894 1895 switch (id) { 1896 case KVM_REG_PPC_HIOR: 1897 /* Only allow this to be set to zero */ 1898 if (set_reg_val(id, *val)) 1899 r = -EINVAL; 1900 break; 1901 case KVM_REG_PPC_DABR: 1902 vcpu->arch.dabr = set_reg_val(id, *val); 1903 break; 1904 case KVM_REG_PPC_DABRX: 1905 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1906 break; 1907 case KVM_REG_PPC_DSCR: 1908 vcpu->arch.dscr = set_reg_val(id, *val); 1909 break; 1910 case KVM_REG_PPC_PURR: 1911 vcpu->arch.purr = set_reg_val(id, *val); 1912 break; 1913 case KVM_REG_PPC_SPURR: 1914 vcpu->arch.spurr = set_reg_val(id, *val); 1915 break; 1916 case KVM_REG_PPC_AMR: 1917 vcpu->arch.amr = set_reg_val(id, *val); 1918 break; 1919 case KVM_REG_PPC_UAMOR: 1920 vcpu->arch.uamor = set_reg_val(id, *val); 1921 break; 1922 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 1923 i = id - KVM_REG_PPC_MMCR0; 1924 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1925 break; 1926 case KVM_REG_PPC_MMCR2: 1927 vcpu->arch.mmcr[2] = set_reg_val(id, *val); 1928 break; 1929 case KVM_REG_PPC_MMCRA: 1930 vcpu->arch.mmcra = set_reg_val(id, *val); 1931 break; 1932 case KVM_REG_PPC_MMCRS: 1933 vcpu->arch.mmcrs = set_reg_val(id, *val); 1934 break; 1935 case KVM_REG_PPC_MMCR3: 1936 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 1937 break; 1938 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1939 i = id - KVM_REG_PPC_PMC1; 1940 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1941 break; 1942 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1943 i = id - KVM_REG_PPC_SPMC1; 1944 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1945 break; 1946 case KVM_REG_PPC_SIAR: 1947 vcpu->arch.siar = set_reg_val(id, *val); 1948 break; 1949 case KVM_REG_PPC_SDAR: 1950 vcpu->arch.sdar = set_reg_val(id, *val); 1951 break; 1952 case KVM_REG_PPC_SIER: 1953 vcpu->arch.sier[0] = set_reg_val(id, *val); 1954 break; 1955 case KVM_REG_PPC_SIER2: 1956 vcpu->arch.sier[1] = set_reg_val(id, *val); 1957 break; 1958 case KVM_REG_PPC_SIER3: 1959 vcpu->arch.sier[2] = set_reg_val(id, *val); 1960 break; 1961 case KVM_REG_PPC_IAMR: 1962 vcpu->arch.iamr = set_reg_val(id, *val); 1963 break; 1964 case KVM_REG_PPC_PSPB: 1965 vcpu->arch.pspb = set_reg_val(id, *val); 1966 break; 1967 case KVM_REG_PPC_DPDES: 1968 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 1969 break; 1970 case KVM_REG_PPC_VTB: 1971 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 1972 break; 1973 case KVM_REG_PPC_DAWR: 1974 vcpu->arch.dawr = set_reg_val(id, *val); 1975 break; 1976 case KVM_REG_PPC_DAWRX: 1977 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP; 1978 break; 1979 case KVM_REG_PPC_CIABR: 1980 vcpu->arch.ciabr = set_reg_val(id, *val); 1981 /* Don't allow setting breakpoints in hypervisor code */ 1982 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 1983 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 1984 break; 1985 case KVM_REG_PPC_CSIGR: 1986 vcpu->arch.csigr = set_reg_val(id, *val); 1987 break; 1988 case KVM_REG_PPC_TACR: 1989 vcpu->arch.tacr = set_reg_val(id, *val); 1990 break; 1991 case KVM_REG_PPC_TCSCR: 1992 vcpu->arch.tcscr = set_reg_val(id, *val); 1993 break; 1994 case KVM_REG_PPC_PID: 1995 vcpu->arch.pid = set_reg_val(id, *val); 1996 break; 1997 case KVM_REG_PPC_ACOP: 1998 vcpu->arch.acop = set_reg_val(id, *val); 1999 break; 2000 case KVM_REG_PPC_WORT: 2001 vcpu->arch.wort = set_reg_val(id, *val); 2002 break; 2003 case KVM_REG_PPC_TIDR: 2004 vcpu->arch.tid = set_reg_val(id, *val); 2005 break; 2006 case KVM_REG_PPC_PSSCR: 2007 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2008 break; 2009 case KVM_REG_PPC_VPA_ADDR: 2010 addr = set_reg_val(id, *val); 2011 r = -EINVAL; 2012 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2013 vcpu->arch.dtl.next_gpa)) 2014 break; 2015 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2016 break; 2017 case KVM_REG_PPC_VPA_SLB: 2018 addr = val->vpaval.addr; 2019 len = val->vpaval.length; 2020 r = -EINVAL; 2021 if (addr && !vcpu->arch.vpa.next_gpa) 2022 break; 2023 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2024 break; 2025 case KVM_REG_PPC_VPA_DTL: 2026 addr = val->vpaval.addr; 2027 len = val->vpaval.length; 2028 r = -EINVAL; 2029 if (addr && (len < sizeof(struct dtl_entry) || 2030 !vcpu->arch.vpa.next_gpa)) 2031 break; 2032 len -= len % sizeof(struct dtl_entry); 2033 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2034 break; 2035 case KVM_REG_PPC_TB_OFFSET: 2036 /* round up to multiple of 2^24 */ 2037 vcpu->arch.vcore->tb_offset = 2038 ALIGN(set_reg_val(id, *val), 1UL << 24); 2039 break; 2040 case KVM_REG_PPC_LPCR: 2041 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2042 break; 2043 case KVM_REG_PPC_LPCR_64: 2044 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2045 break; 2046 case KVM_REG_PPC_PPR: 2047 vcpu->arch.ppr = set_reg_val(id, *val); 2048 break; 2049 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2050 case KVM_REG_PPC_TFHAR: 2051 vcpu->arch.tfhar = set_reg_val(id, *val); 2052 break; 2053 case KVM_REG_PPC_TFIAR: 2054 vcpu->arch.tfiar = set_reg_val(id, *val); 2055 break; 2056 case KVM_REG_PPC_TEXASR: 2057 vcpu->arch.texasr = set_reg_val(id, *val); 2058 break; 2059 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2060 i = id - KVM_REG_PPC_TM_GPR0; 2061 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2062 break; 2063 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2064 { 2065 int j; 2066 i = id - KVM_REG_PPC_TM_VSR0; 2067 if (i < 32) 2068 for (j = 0; j < TS_FPRWIDTH; j++) 2069 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2070 else 2071 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2072 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2073 else 2074 r = -ENXIO; 2075 break; 2076 } 2077 case KVM_REG_PPC_TM_CR: 2078 vcpu->arch.cr_tm = set_reg_val(id, *val); 2079 break; 2080 case KVM_REG_PPC_TM_XER: 2081 vcpu->arch.xer_tm = set_reg_val(id, *val); 2082 break; 2083 case KVM_REG_PPC_TM_LR: 2084 vcpu->arch.lr_tm = set_reg_val(id, *val); 2085 break; 2086 case KVM_REG_PPC_TM_CTR: 2087 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2088 break; 2089 case KVM_REG_PPC_TM_FPSCR: 2090 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2091 break; 2092 case KVM_REG_PPC_TM_AMR: 2093 vcpu->arch.amr_tm = set_reg_val(id, *val); 2094 break; 2095 case KVM_REG_PPC_TM_PPR: 2096 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2097 break; 2098 case KVM_REG_PPC_TM_VRSAVE: 2099 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2100 break; 2101 case KVM_REG_PPC_TM_VSCR: 2102 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2103 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2104 else 2105 r = - ENXIO; 2106 break; 2107 case KVM_REG_PPC_TM_DSCR: 2108 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2109 break; 2110 case KVM_REG_PPC_TM_TAR: 2111 vcpu->arch.tar_tm = set_reg_val(id, *val); 2112 break; 2113 #endif 2114 case KVM_REG_PPC_ARCH_COMPAT: 2115 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2116 break; 2117 case KVM_REG_PPC_DEC_EXPIRY: 2118 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2119 vcpu->arch.vcore->tb_offset; 2120 break; 2121 case KVM_REG_PPC_ONLINE: 2122 i = set_reg_val(id, *val); 2123 if (i && !vcpu->arch.online) 2124 atomic_inc(&vcpu->arch.vcore->online_count); 2125 else if (!i && vcpu->arch.online) 2126 atomic_dec(&vcpu->arch.vcore->online_count); 2127 vcpu->arch.online = i; 2128 break; 2129 case KVM_REG_PPC_PTCR: 2130 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2131 break; 2132 default: 2133 r = -EINVAL; 2134 break; 2135 } 2136 2137 return r; 2138 } 2139 2140 /* 2141 * On POWER9, threads are independent and can be in different partitions. 2142 * Therefore we consider each thread to be a subcore. 2143 * There is a restriction that all threads have to be in the same 2144 * MMU mode (radix or HPT), unfortunately, but since we only support 2145 * HPT guests on a HPT host so far, that isn't an impediment yet. 2146 */ 2147 static int threads_per_vcore(struct kvm *kvm) 2148 { 2149 if (kvm->arch.threads_indep) 2150 return 1; 2151 return threads_per_subcore; 2152 } 2153 2154 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2155 { 2156 struct kvmppc_vcore *vcore; 2157 2158 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2159 2160 if (vcore == NULL) 2161 return NULL; 2162 2163 spin_lock_init(&vcore->lock); 2164 spin_lock_init(&vcore->stoltb_lock); 2165 rcuwait_init(&vcore->wait); 2166 vcore->preempt_tb = TB_NIL; 2167 vcore->lpcr = kvm->arch.lpcr; 2168 vcore->first_vcpuid = id; 2169 vcore->kvm = kvm; 2170 INIT_LIST_HEAD(&vcore->preempt_list); 2171 2172 return vcore; 2173 } 2174 2175 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2176 static struct debugfs_timings_element { 2177 const char *name; 2178 size_t offset; 2179 } timings[] = { 2180 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2181 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2182 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2183 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2184 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2185 }; 2186 2187 #define N_TIMINGS (ARRAY_SIZE(timings)) 2188 2189 struct debugfs_timings_state { 2190 struct kvm_vcpu *vcpu; 2191 unsigned int buflen; 2192 char buf[N_TIMINGS * 100]; 2193 }; 2194 2195 static int debugfs_timings_open(struct inode *inode, struct file *file) 2196 { 2197 struct kvm_vcpu *vcpu = inode->i_private; 2198 struct debugfs_timings_state *p; 2199 2200 p = kzalloc(sizeof(*p), GFP_KERNEL); 2201 if (!p) 2202 return -ENOMEM; 2203 2204 kvm_get_kvm(vcpu->kvm); 2205 p->vcpu = vcpu; 2206 file->private_data = p; 2207 2208 return nonseekable_open(inode, file); 2209 } 2210 2211 static int debugfs_timings_release(struct inode *inode, struct file *file) 2212 { 2213 struct debugfs_timings_state *p = file->private_data; 2214 2215 kvm_put_kvm(p->vcpu->kvm); 2216 kfree(p); 2217 return 0; 2218 } 2219 2220 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2221 size_t len, loff_t *ppos) 2222 { 2223 struct debugfs_timings_state *p = file->private_data; 2224 struct kvm_vcpu *vcpu = p->vcpu; 2225 char *s, *buf_end; 2226 struct kvmhv_tb_accumulator tb; 2227 u64 count; 2228 loff_t pos; 2229 ssize_t n; 2230 int i, loops; 2231 bool ok; 2232 2233 if (!p->buflen) { 2234 s = p->buf; 2235 buf_end = s + sizeof(p->buf); 2236 for (i = 0; i < N_TIMINGS; ++i) { 2237 struct kvmhv_tb_accumulator *acc; 2238 2239 acc = (struct kvmhv_tb_accumulator *) 2240 ((unsigned long)vcpu + timings[i].offset); 2241 ok = false; 2242 for (loops = 0; loops < 1000; ++loops) { 2243 count = acc->seqcount; 2244 if (!(count & 1)) { 2245 smp_rmb(); 2246 tb = *acc; 2247 smp_rmb(); 2248 if (count == acc->seqcount) { 2249 ok = true; 2250 break; 2251 } 2252 } 2253 udelay(1); 2254 } 2255 if (!ok) 2256 snprintf(s, buf_end - s, "%s: stuck\n", 2257 timings[i].name); 2258 else 2259 snprintf(s, buf_end - s, 2260 "%s: %llu %llu %llu %llu\n", 2261 timings[i].name, count / 2, 2262 tb_to_ns(tb.tb_total), 2263 tb_to_ns(tb.tb_min), 2264 tb_to_ns(tb.tb_max)); 2265 s += strlen(s); 2266 } 2267 p->buflen = s - p->buf; 2268 } 2269 2270 pos = *ppos; 2271 if (pos >= p->buflen) 2272 return 0; 2273 if (len > p->buflen - pos) 2274 len = p->buflen - pos; 2275 n = copy_to_user(buf, p->buf + pos, len); 2276 if (n) { 2277 if (n == len) 2278 return -EFAULT; 2279 len -= n; 2280 } 2281 *ppos = pos + len; 2282 return len; 2283 } 2284 2285 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2286 size_t len, loff_t *ppos) 2287 { 2288 return -EACCES; 2289 } 2290 2291 static const struct file_operations debugfs_timings_ops = { 2292 .owner = THIS_MODULE, 2293 .open = debugfs_timings_open, 2294 .release = debugfs_timings_release, 2295 .read = debugfs_timings_read, 2296 .write = debugfs_timings_write, 2297 .llseek = generic_file_llseek, 2298 }; 2299 2300 /* Create a debugfs directory for the vcpu */ 2301 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2302 { 2303 char buf[16]; 2304 struct kvm *kvm = vcpu->kvm; 2305 2306 snprintf(buf, sizeof(buf), "vcpu%u", id); 2307 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2308 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2309 &debugfs_timings_ops); 2310 } 2311 2312 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2313 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2314 { 2315 } 2316 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2317 2318 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2319 { 2320 int err; 2321 int core; 2322 struct kvmppc_vcore *vcore; 2323 struct kvm *kvm; 2324 unsigned int id; 2325 2326 kvm = vcpu->kvm; 2327 id = vcpu->vcpu_id; 2328 2329 vcpu->arch.shared = &vcpu->arch.shregs; 2330 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2331 /* 2332 * The shared struct is never shared on HV, 2333 * so we can always use host endianness 2334 */ 2335 #ifdef __BIG_ENDIAN__ 2336 vcpu->arch.shared_big_endian = true; 2337 #else 2338 vcpu->arch.shared_big_endian = false; 2339 #endif 2340 #endif 2341 vcpu->arch.mmcr[0] = MMCR0_FC; 2342 vcpu->arch.ctrl = CTRL_RUNLATCH; 2343 /* default to host PVR, since we can't spoof it */ 2344 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2345 spin_lock_init(&vcpu->arch.vpa_update_lock); 2346 spin_lock_init(&vcpu->arch.tbacct_lock); 2347 vcpu->arch.busy_preempt = TB_NIL; 2348 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2349 2350 /* 2351 * Set the default HFSCR for the guest from the host value. 2352 * This value is only used on POWER9. 2353 * On POWER9, we want to virtualize the doorbell facility, so we 2354 * don't set the HFSCR_MSGP bit, and that causes those instructions 2355 * to trap and then we emulate them. 2356 */ 2357 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2358 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP; 2359 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2360 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2361 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2362 vcpu->arch.hfscr |= HFSCR_TM; 2363 } 2364 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2365 vcpu->arch.hfscr |= HFSCR_TM; 2366 2367 kvmppc_mmu_book3s_hv_init(vcpu); 2368 2369 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2370 2371 init_waitqueue_head(&vcpu->arch.cpu_run); 2372 2373 mutex_lock(&kvm->lock); 2374 vcore = NULL; 2375 err = -EINVAL; 2376 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2377 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2378 pr_devel("KVM: VCPU ID too high\n"); 2379 core = KVM_MAX_VCORES; 2380 } else { 2381 BUG_ON(kvm->arch.smt_mode != 1); 2382 core = kvmppc_pack_vcpu_id(kvm, id); 2383 } 2384 } else { 2385 core = id / kvm->arch.smt_mode; 2386 } 2387 if (core < KVM_MAX_VCORES) { 2388 vcore = kvm->arch.vcores[core]; 2389 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2390 pr_devel("KVM: collision on id %u", id); 2391 vcore = NULL; 2392 } else if (!vcore) { 2393 /* 2394 * Take mmu_setup_lock for mutual exclusion 2395 * with kvmppc_update_lpcr(). 2396 */ 2397 err = -ENOMEM; 2398 vcore = kvmppc_vcore_create(kvm, 2399 id & ~(kvm->arch.smt_mode - 1)); 2400 mutex_lock(&kvm->arch.mmu_setup_lock); 2401 kvm->arch.vcores[core] = vcore; 2402 kvm->arch.online_vcores++; 2403 mutex_unlock(&kvm->arch.mmu_setup_lock); 2404 } 2405 } 2406 mutex_unlock(&kvm->lock); 2407 2408 if (!vcore) 2409 return err; 2410 2411 spin_lock(&vcore->lock); 2412 ++vcore->num_threads; 2413 spin_unlock(&vcore->lock); 2414 vcpu->arch.vcore = vcore; 2415 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2416 vcpu->arch.thread_cpu = -1; 2417 vcpu->arch.prev_cpu = -1; 2418 2419 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2420 kvmppc_sanity_check(vcpu); 2421 2422 debugfs_vcpu_init(vcpu, id); 2423 2424 return 0; 2425 } 2426 2427 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2428 unsigned long flags) 2429 { 2430 int err; 2431 int esmt = 0; 2432 2433 if (flags) 2434 return -EINVAL; 2435 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2436 return -EINVAL; 2437 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2438 /* 2439 * On POWER8 (or POWER7), the threading mode is "strict", 2440 * so we pack smt_mode vcpus per vcore. 2441 */ 2442 if (smt_mode > threads_per_subcore) 2443 return -EINVAL; 2444 } else { 2445 /* 2446 * On POWER9, the threading mode is "loose", 2447 * so each vcpu gets its own vcore. 2448 */ 2449 esmt = smt_mode; 2450 smt_mode = 1; 2451 } 2452 mutex_lock(&kvm->lock); 2453 err = -EBUSY; 2454 if (!kvm->arch.online_vcores) { 2455 kvm->arch.smt_mode = smt_mode; 2456 kvm->arch.emul_smt_mode = esmt; 2457 err = 0; 2458 } 2459 mutex_unlock(&kvm->lock); 2460 2461 return err; 2462 } 2463 2464 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2465 { 2466 if (vpa->pinned_addr) 2467 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2468 vpa->dirty); 2469 } 2470 2471 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2472 { 2473 spin_lock(&vcpu->arch.vpa_update_lock); 2474 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2475 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2476 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2477 spin_unlock(&vcpu->arch.vpa_update_lock); 2478 } 2479 2480 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2481 { 2482 /* Indicate we want to get back into the guest */ 2483 return 1; 2484 } 2485 2486 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2487 { 2488 unsigned long dec_nsec, now; 2489 2490 now = get_tb(); 2491 if (now > vcpu->arch.dec_expires) { 2492 /* decrementer has already gone negative */ 2493 kvmppc_core_queue_dec(vcpu); 2494 kvmppc_core_prepare_to_enter(vcpu); 2495 return; 2496 } 2497 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2498 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2499 vcpu->arch.timer_running = 1; 2500 } 2501 2502 extern int __kvmppc_vcore_entry(void); 2503 2504 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2505 struct kvm_vcpu *vcpu) 2506 { 2507 u64 now; 2508 2509 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2510 return; 2511 spin_lock_irq(&vcpu->arch.tbacct_lock); 2512 now = mftb(); 2513 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2514 vcpu->arch.stolen_logged; 2515 vcpu->arch.busy_preempt = now; 2516 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2517 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2518 --vc->n_runnable; 2519 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2520 } 2521 2522 static int kvmppc_grab_hwthread(int cpu) 2523 { 2524 struct paca_struct *tpaca; 2525 long timeout = 10000; 2526 2527 tpaca = paca_ptrs[cpu]; 2528 2529 /* Ensure the thread won't go into the kernel if it wakes */ 2530 tpaca->kvm_hstate.kvm_vcpu = NULL; 2531 tpaca->kvm_hstate.kvm_vcore = NULL; 2532 tpaca->kvm_hstate.napping = 0; 2533 smp_wmb(); 2534 tpaca->kvm_hstate.hwthread_req = 1; 2535 2536 /* 2537 * If the thread is already executing in the kernel (e.g. handling 2538 * a stray interrupt), wait for it to get back to nap mode. 2539 * The smp_mb() is to ensure that our setting of hwthread_req 2540 * is visible before we look at hwthread_state, so if this 2541 * races with the code at system_reset_pSeries and the thread 2542 * misses our setting of hwthread_req, we are sure to see its 2543 * setting of hwthread_state, and vice versa. 2544 */ 2545 smp_mb(); 2546 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2547 if (--timeout <= 0) { 2548 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2549 return -EBUSY; 2550 } 2551 udelay(1); 2552 } 2553 return 0; 2554 } 2555 2556 static void kvmppc_release_hwthread(int cpu) 2557 { 2558 struct paca_struct *tpaca; 2559 2560 tpaca = paca_ptrs[cpu]; 2561 tpaca->kvm_hstate.hwthread_req = 0; 2562 tpaca->kvm_hstate.kvm_vcpu = NULL; 2563 tpaca->kvm_hstate.kvm_vcore = NULL; 2564 tpaca->kvm_hstate.kvm_split_mode = NULL; 2565 } 2566 2567 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2568 { 2569 struct kvm_nested_guest *nested = vcpu->arch.nested; 2570 cpumask_t *cpu_in_guest; 2571 int i; 2572 2573 cpu = cpu_first_thread_sibling(cpu); 2574 if (nested) { 2575 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2576 cpu_in_guest = &nested->cpu_in_guest; 2577 } else { 2578 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2579 cpu_in_guest = &kvm->arch.cpu_in_guest; 2580 } 2581 /* 2582 * Make sure setting of bit in need_tlb_flush precedes 2583 * testing of cpu_in_guest bits. The matching barrier on 2584 * the other side is the first smp_mb() in kvmppc_run_core(). 2585 */ 2586 smp_mb(); 2587 for (i = 0; i < threads_per_core; ++i) 2588 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2589 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2590 } 2591 2592 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2593 { 2594 struct kvm_nested_guest *nested = vcpu->arch.nested; 2595 struct kvm *kvm = vcpu->kvm; 2596 int prev_cpu; 2597 2598 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2599 return; 2600 2601 if (nested) 2602 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2603 else 2604 prev_cpu = vcpu->arch.prev_cpu; 2605 2606 /* 2607 * With radix, the guest can do TLB invalidations itself, 2608 * and it could choose to use the local form (tlbiel) if 2609 * it is invalidating a translation that has only ever been 2610 * used on one vcpu. However, that doesn't mean it has 2611 * only ever been used on one physical cpu, since vcpus 2612 * can move around between pcpus. To cope with this, when 2613 * a vcpu moves from one pcpu to another, we need to tell 2614 * any vcpus running on the same core as this vcpu previously 2615 * ran to flush the TLB. The TLB is shared between threads, 2616 * so we use a single bit in .need_tlb_flush for all 4 threads. 2617 */ 2618 if (prev_cpu != pcpu) { 2619 if (prev_cpu >= 0 && 2620 cpu_first_thread_sibling(prev_cpu) != 2621 cpu_first_thread_sibling(pcpu)) 2622 radix_flush_cpu(kvm, prev_cpu, vcpu); 2623 if (nested) 2624 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2625 else 2626 vcpu->arch.prev_cpu = pcpu; 2627 } 2628 } 2629 2630 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2631 { 2632 int cpu; 2633 struct paca_struct *tpaca; 2634 struct kvm *kvm = vc->kvm; 2635 2636 cpu = vc->pcpu; 2637 if (vcpu) { 2638 if (vcpu->arch.timer_running) { 2639 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2640 vcpu->arch.timer_running = 0; 2641 } 2642 cpu += vcpu->arch.ptid; 2643 vcpu->cpu = vc->pcpu; 2644 vcpu->arch.thread_cpu = cpu; 2645 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2646 } 2647 tpaca = paca_ptrs[cpu]; 2648 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2649 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2650 tpaca->kvm_hstate.fake_suspend = 0; 2651 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2652 smp_wmb(); 2653 tpaca->kvm_hstate.kvm_vcore = vc; 2654 if (cpu != smp_processor_id()) 2655 kvmppc_ipi_thread(cpu); 2656 } 2657 2658 static void kvmppc_wait_for_nap(int n_threads) 2659 { 2660 int cpu = smp_processor_id(); 2661 int i, loops; 2662 2663 if (n_threads <= 1) 2664 return; 2665 for (loops = 0; loops < 1000000; ++loops) { 2666 /* 2667 * Check if all threads are finished. 2668 * We set the vcore pointer when starting a thread 2669 * and the thread clears it when finished, so we look 2670 * for any threads that still have a non-NULL vcore ptr. 2671 */ 2672 for (i = 1; i < n_threads; ++i) 2673 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2674 break; 2675 if (i == n_threads) { 2676 HMT_medium(); 2677 return; 2678 } 2679 HMT_low(); 2680 } 2681 HMT_medium(); 2682 for (i = 1; i < n_threads; ++i) 2683 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2684 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2685 } 2686 2687 /* 2688 * Check that we are on thread 0 and that any other threads in 2689 * this core are off-line. Then grab the threads so they can't 2690 * enter the kernel. 2691 */ 2692 static int on_primary_thread(void) 2693 { 2694 int cpu = smp_processor_id(); 2695 int thr; 2696 2697 /* Are we on a primary subcore? */ 2698 if (cpu_thread_in_subcore(cpu)) 2699 return 0; 2700 2701 thr = 0; 2702 while (++thr < threads_per_subcore) 2703 if (cpu_online(cpu + thr)) 2704 return 0; 2705 2706 /* Grab all hw threads so they can't go into the kernel */ 2707 for (thr = 1; thr < threads_per_subcore; ++thr) { 2708 if (kvmppc_grab_hwthread(cpu + thr)) { 2709 /* Couldn't grab one; let the others go */ 2710 do { 2711 kvmppc_release_hwthread(cpu + thr); 2712 } while (--thr > 0); 2713 return 0; 2714 } 2715 } 2716 return 1; 2717 } 2718 2719 /* 2720 * A list of virtual cores for each physical CPU. 2721 * These are vcores that could run but their runner VCPU tasks are 2722 * (or may be) preempted. 2723 */ 2724 struct preempted_vcore_list { 2725 struct list_head list; 2726 spinlock_t lock; 2727 }; 2728 2729 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2730 2731 static void init_vcore_lists(void) 2732 { 2733 int cpu; 2734 2735 for_each_possible_cpu(cpu) { 2736 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2737 spin_lock_init(&lp->lock); 2738 INIT_LIST_HEAD(&lp->list); 2739 } 2740 } 2741 2742 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2743 { 2744 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2745 2746 vc->vcore_state = VCORE_PREEMPT; 2747 vc->pcpu = smp_processor_id(); 2748 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2749 spin_lock(&lp->lock); 2750 list_add_tail(&vc->preempt_list, &lp->list); 2751 spin_unlock(&lp->lock); 2752 } 2753 2754 /* Start accumulating stolen time */ 2755 kvmppc_core_start_stolen(vc); 2756 } 2757 2758 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2759 { 2760 struct preempted_vcore_list *lp; 2761 2762 kvmppc_core_end_stolen(vc); 2763 if (!list_empty(&vc->preempt_list)) { 2764 lp = &per_cpu(preempted_vcores, vc->pcpu); 2765 spin_lock(&lp->lock); 2766 list_del_init(&vc->preempt_list); 2767 spin_unlock(&lp->lock); 2768 } 2769 vc->vcore_state = VCORE_INACTIVE; 2770 } 2771 2772 /* 2773 * This stores information about the virtual cores currently 2774 * assigned to a physical core. 2775 */ 2776 struct core_info { 2777 int n_subcores; 2778 int max_subcore_threads; 2779 int total_threads; 2780 int subcore_threads[MAX_SUBCORES]; 2781 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2782 }; 2783 2784 /* 2785 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2786 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2787 */ 2788 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2789 2790 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2791 { 2792 memset(cip, 0, sizeof(*cip)); 2793 cip->n_subcores = 1; 2794 cip->max_subcore_threads = vc->num_threads; 2795 cip->total_threads = vc->num_threads; 2796 cip->subcore_threads[0] = vc->num_threads; 2797 cip->vc[0] = vc; 2798 } 2799 2800 static bool subcore_config_ok(int n_subcores, int n_threads) 2801 { 2802 /* 2803 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2804 * split-core mode, with one thread per subcore. 2805 */ 2806 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2807 return n_subcores <= 4 && n_threads == 1; 2808 2809 /* On POWER8, can only dynamically split if unsplit to begin with */ 2810 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2811 return false; 2812 if (n_subcores > MAX_SUBCORES) 2813 return false; 2814 if (n_subcores > 1) { 2815 if (!(dynamic_mt_modes & 2)) 2816 n_subcores = 4; 2817 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2818 return false; 2819 } 2820 2821 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2822 } 2823 2824 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2825 { 2826 vc->entry_exit_map = 0; 2827 vc->in_guest = 0; 2828 vc->napping_threads = 0; 2829 vc->conferring_threads = 0; 2830 vc->tb_offset_applied = 0; 2831 } 2832 2833 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2834 { 2835 int n_threads = vc->num_threads; 2836 int sub; 2837 2838 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2839 return false; 2840 2841 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2842 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2843 return false; 2844 2845 /* Some POWER9 chips require all threads to be in the same MMU mode */ 2846 if (no_mixing_hpt_and_radix && 2847 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm)) 2848 return false; 2849 2850 if (n_threads < cip->max_subcore_threads) 2851 n_threads = cip->max_subcore_threads; 2852 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2853 return false; 2854 cip->max_subcore_threads = n_threads; 2855 2856 sub = cip->n_subcores; 2857 ++cip->n_subcores; 2858 cip->total_threads += vc->num_threads; 2859 cip->subcore_threads[sub] = vc->num_threads; 2860 cip->vc[sub] = vc; 2861 init_vcore_to_run(vc); 2862 list_del_init(&vc->preempt_list); 2863 2864 return true; 2865 } 2866 2867 /* 2868 * Work out whether it is possible to piggyback the execution of 2869 * vcore *pvc onto the execution of the other vcores described in *cip. 2870 */ 2871 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2872 int target_threads) 2873 { 2874 if (cip->total_threads + pvc->num_threads > target_threads) 2875 return false; 2876 2877 return can_dynamic_split(pvc, cip); 2878 } 2879 2880 static void prepare_threads(struct kvmppc_vcore *vc) 2881 { 2882 int i; 2883 struct kvm_vcpu *vcpu; 2884 2885 for_each_runnable_thread(i, vcpu, vc) { 2886 if (signal_pending(vcpu->arch.run_task)) 2887 vcpu->arch.ret = -EINTR; 2888 else if (vcpu->arch.vpa.update_pending || 2889 vcpu->arch.slb_shadow.update_pending || 2890 vcpu->arch.dtl.update_pending) 2891 vcpu->arch.ret = RESUME_GUEST; 2892 else 2893 continue; 2894 kvmppc_remove_runnable(vc, vcpu); 2895 wake_up(&vcpu->arch.cpu_run); 2896 } 2897 } 2898 2899 static void collect_piggybacks(struct core_info *cip, int target_threads) 2900 { 2901 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2902 struct kvmppc_vcore *pvc, *vcnext; 2903 2904 spin_lock(&lp->lock); 2905 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2906 if (!spin_trylock(&pvc->lock)) 2907 continue; 2908 prepare_threads(pvc); 2909 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 2910 list_del_init(&pvc->preempt_list); 2911 if (pvc->runner == NULL) { 2912 pvc->vcore_state = VCORE_INACTIVE; 2913 kvmppc_core_end_stolen(pvc); 2914 } 2915 spin_unlock(&pvc->lock); 2916 continue; 2917 } 2918 if (!can_piggyback(pvc, cip, target_threads)) { 2919 spin_unlock(&pvc->lock); 2920 continue; 2921 } 2922 kvmppc_core_end_stolen(pvc); 2923 pvc->vcore_state = VCORE_PIGGYBACK; 2924 if (cip->total_threads >= target_threads) 2925 break; 2926 } 2927 spin_unlock(&lp->lock); 2928 } 2929 2930 static bool recheck_signals_and_mmu(struct core_info *cip) 2931 { 2932 int sub, i; 2933 struct kvm_vcpu *vcpu; 2934 struct kvmppc_vcore *vc; 2935 2936 for (sub = 0; sub < cip->n_subcores; ++sub) { 2937 vc = cip->vc[sub]; 2938 if (!vc->kvm->arch.mmu_ready) 2939 return true; 2940 for_each_runnable_thread(i, vcpu, vc) 2941 if (signal_pending(vcpu->arch.run_task)) 2942 return true; 2943 } 2944 return false; 2945 } 2946 2947 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2948 { 2949 int still_running = 0, i; 2950 u64 now; 2951 long ret; 2952 struct kvm_vcpu *vcpu; 2953 2954 spin_lock(&vc->lock); 2955 now = get_tb(); 2956 for_each_runnable_thread(i, vcpu, vc) { 2957 /* 2958 * It's safe to unlock the vcore in the loop here, because 2959 * for_each_runnable_thread() is safe against removal of 2960 * the vcpu, and the vcore state is VCORE_EXITING here, 2961 * so any vcpus becoming runnable will have their arch.trap 2962 * set to zero and can't actually run in the guest. 2963 */ 2964 spin_unlock(&vc->lock); 2965 /* cancel pending dec exception if dec is positive */ 2966 if (now < vcpu->arch.dec_expires && 2967 kvmppc_core_pending_dec(vcpu)) 2968 kvmppc_core_dequeue_dec(vcpu); 2969 2970 trace_kvm_guest_exit(vcpu); 2971 2972 ret = RESUME_GUEST; 2973 if (vcpu->arch.trap) 2974 ret = kvmppc_handle_exit_hv(vcpu, 2975 vcpu->arch.run_task); 2976 2977 vcpu->arch.ret = ret; 2978 vcpu->arch.trap = 0; 2979 2980 spin_lock(&vc->lock); 2981 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 2982 if (vcpu->arch.pending_exceptions) 2983 kvmppc_core_prepare_to_enter(vcpu); 2984 if (vcpu->arch.ceded) 2985 kvmppc_set_timer(vcpu); 2986 else 2987 ++still_running; 2988 } else { 2989 kvmppc_remove_runnable(vc, vcpu); 2990 wake_up(&vcpu->arch.cpu_run); 2991 } 2992 } 2993 if (!is_master) { 2994 if (still_running > 0) { 2995 kvmppc_vcore_preempt(vc); 2996 } else if (vc->runner) { 2997 vc->vcore_state = VCORE_PREEMPT; 2998 kvmppc_core_start_stolen(vc); 2999 } else { 3000 vc->vcore_state = VCORE_INACTIVE; 3001 } 3002 if (vc->n_runnable > 0 && vc->runner == NULL) { 3003 /* make sure there's a candidate runner awake */ 3004 i = -1; 3005 vcpu = next_runnable_thread(vc, &i); 3006 wake_up(&vcpu->arch.cpu_run); 3007 } 3008 } 3009 spin_unlock(&vc->lock); 3010 } 3011 3012 /* 3013 * Clear core from the list of active host cores as we are about to 3014 * enter the guest. Only do this if it is the primary thread of the 3015 * core (not if a subcore) that is entering the guest. 3016 */ 3017 static inline int kvmppc_clear_host_core(unsigned int cpu) 3018 { 3019 int core; 3020 3021 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3022 return 0; 3023 /* 3024 * Memory barrier can be omitted here as we will do a smp_wmb() 3025 * later in kvmppc_start_thread and we need ensure that state is 3026 * visible to other CPUs only after we enter guest. 3027 */ 3028 core = cpu >> threads_shift; 3029 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3030 return 0; 3031 } 3032 3033 /* 3034 * Advertise this core as an active host core since we exited the guest 3035 * Only need to do this if it is the primary thread of the core that is 3036 * exiting. 3037 */ 3038 static inline int kvmppc_set_host_core(unsigned int cpu) 3039 { 3040 int core; 3041 3042 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3043 return 0; 3044 3045 /* 3046 * Memory barrier can be omitted here because we do a spin_unlock 3047 * immediately after this which provides the memory barrier. 3048 */ 3049 core = cpu >> threads_shift; 3050 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3051 return 0; 3052 } 3053 3054 static void set_irq_happened(int trap) 3055 { 3056 switch (trap) { 3057 case BOOK3S_INTERRUPT_EXTERNAL: 3058 local_paca->irq_happened |= PACA_IRQ_EE; 3059 break; 3060 case BOOK3S_INTERRUPT_H_DOORBELL: 3061 local_paca->irq_happened |= PACA_IRQ_DBELL; 3062 break; 3063 case BOOK3S_INTERRUPT_HMI: 3064 local_paca->irq_happened |= PACA_IRQ_HMI; 3065 break; 3066 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3067 replay_system_reset(); 3068 break; 3069 } 3070 } 3071 3072 /* 3073 * Run a set of guest threads on a physical core. 3074 * Called with vc->lock held. 3075 */ 3076 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3077 { 3078 struct kvm_vcpu *vcpu; 3079 int i; 3080 int srcu_idx; 3081 struct core_info core_info; 3082 struct kvmppc_vcore *pvc; 3083 struct kvm_split_mode split_info, *sip; 3084 int split, subcore_size, active; 3085 int sub; 3086 bool thr0_done; 3087 unsigned long cmd_bit, stat_bit; 3088 int pcpu, thr; 3089 int target_threads; 3090 int controlled_threads; 3091 int trap; 3092 bool is_power8; 3093 bool hpt_on_radix; 3094 3095 /* 3096 * Remove from the list any threads that have a signal pending 3097 * or need a VPA update done 3098 */ 3099 prepare_threads(vc); 3100 3101 /* if the runner is no longer runnable, let the caller pick a new one */ 3102 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3103 return; 3104 3105 /* 3106 * Initialize *vc. 3107 */ 3108 init_vcore_to_run(vc); 3109 vc->preempt_tb = TB_NIL; 3110 3111 /* 3112 * Number of threads that we will be controlling: the same as 3113 * the number of threads per subcore, except on POWER9, 3114 * where it's 1 because the threads are (mostly) independent. 3115 */ 3116 controlled_threads = threads_per_vcore(vc->kvm); 3117 3118 /* 3119 * Make sure we are running on primary threads, and that secondary 3120 * threads are offline. Also check if the number of threads in this 3121 * guest are greater than the current system threads per guest. 3122 * On POWER9, we need to be not in independent-threads mode if 3123 * this is a HPT guest on a radix host machine where the 3124 * CPU threads may not be in different MMU modes. 3125 */ 3126 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() && 3127 !kvm_is_radix(vc->kvm); 3128 if (((controlled_threads > 1) && 3129 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) || 3130 (hpt_on_radix && vc->kvm->arch.threads_indep)) { 3131 for_each_runnable_thread(i, vcpu, vc) { 3132 vcpu->arch.ret = -EBUSY; 3133 kvmppc_remove_runnable(vc, vcpu); 3134 wake_up(&vcpu->arch.cpu_run); 3135 } 3136 goto out; 3137 } 3138 3139 /* 3140 * See if we could run any other vcores on the physical core 3141 * along with this one. 3142 */ 3143 init_core_info(&core_info, vc); 3144 pcpu = smp_processor_id(); 3145 target_threads = controlled_threads; 3146 if (target_smt_mode && target_smt_mode < target_threads) 3147 target_threads = target_smt_mode; 3148 if (vc->num_threads < target_threads) 3149 collect_piggybacks(&core_info, target_threads); 3150 3151 /* 3152 * On radix, arrange for TLB flushing if necessary. 3153 * This has to be done before disabling interrupts since 3154 * it uses smp_call_function(). 3155 */ 3156 pcpu = smp_processor_id(); 3157 if (kvm_is_radix(vc->kvm)) { 3158 for (sub = 0; sub < core_info.n_subcores; ++sub) 3159 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3160 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3161 } 3162 3163 /* 3164 * Hard-disable interrupts, and check resched flag and signals. 3165 * If we need to reschedule or deliver a signal, clean up 3166 * and return without going into the guest(s). 3167 * If the mmu_ready flag has been cleared, don't go into the 3168 * guest because that means a HPT resize operation is in progress. 3169 */ 3170 local_irq_disable(); 3171 hard_irq_disable(); 3172 if (lazy_irq_pending() || need_resched() || 3173 recheck_signals_and_mmu(&core_info)) { 3174 local_irq_enable(); 3175 vc->vcore_state = VCORE_INACTIVE; 3176 /* Unlock all except the primary vcore */ 3177 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3178 pvc = core_info.vc[sub]; 3179 /* Put back on to the preempted vcores list */ 3180 kvmppc_vcore_preempt(pvc); 3181 spin_unlock(&pvc->lock); 3182 } 3183 for (i = 0; i < controlled_threads; ++i) 3184 kvmppc_release_hwthread(pcpu + i); 3185 return; 3186 } 3187 3188 kvmppc_clear_host_core(pcpu); 3189 3190 /* Decide on micro-threading (split-core) mode */ 3191 subcore_size = threads_per_subcore; 3192 cmd_bit = stat_bit = 0; 3193 split = core_info.n_subcores; 3194 sip = NULL; 3195 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3196 && !cpu_has_feature(CPU_FTR_ARCH_300); 3197 3198 if (split > 1 || hpt_on_radix) { 3199 sip = &split_info; 3200 memset(&split_info, 0, sizeof(split_info)); 3201 for (sub = 0; sub < core_info.n_subcores; ++sub) 3202 split_info.vc[sub] = core_info.vc[sub]; 3203 3204 if (is_power8) { 3205 if (split == 2 && (dynamic_mt_modes & 2)) { 3206 cmd_bit = HID0_POWER8_1TO2LPAR; 3207 stat_bit = HID0_POWER8_2LPARMODE; 3208 } else { 3209 split = 4; 3210 cmd_bit = HID0_POWER8_1TO4LPAR; 3211 stat_bit = HID0_POWER8_4LPARMODE; 3212 } 3213 subcore_size = MAX_SMT_THREADS / split; 3214 split_info.rpr = mfspr(SPRN_RPR); 3215 split_info.pmmar = mfspr(SPRN_PMMAR); 3216 split_info.ldbar = mfspr(SPRN_LDBAR); 3217 split_info.subcore_size = subcore_size; 3218 } else { 3219 split_info.subcore_size = 1; 3220 if (hpt_on_radix) { 3221 /* Use the split_info for LPCR/LPIDR changes */ 3222 split_info.lpcr_req = vc->lpcr; 3223 split_info.lpidr_req = vc->kvm->arch.lpid; 3224 split_info.host_lpcr = vc->kvm->arch.host_lpcr; 3225 split_info.do_set = 1; 3226 } 3227 } 3228 3229 /* order writes to split_info before kvm_split_mode pointer */ 3230 smp_wmb(); 3231 } 3232 3233 for (thr = 0; thr < controlled_threads; ++thr) { 3234 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3235 3236 paca->kvm_hstate.tid = thr; 3237 paca->kvm_hstate.napping = 0; 3238 paca->kvm_hstate.kvm_split_mode = sip; 3239 } 3240 3241 /* Initiate micro-threading (split-core) on POWER8 if required */ 3242 if (cmd_bit) { 3243 unsigned long hid0 = mfspr(SPRN_HID0); 3244 3245 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3246 mb(); 3247 mtspr(SPRN_HID0, hid0); 3248 isync(); 3249 for (;;) { 3250 hid0 = mfspr(SPRN_HID0); 3251 if (hid0 & stat_bit) 3252 break; 3253 cpu_relax(); 3254 } 3255 } 3256 3257 /* 3258 * On POWER8, set RWMR register. 3259 * Since it only affects PURR and SPURR, it doesn't affect 3260 * the host, so we don't save/restore the host value. 3261 */ 3262 if (is_power8) { 3263 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3264 int n_online = atomic_read(&vc->online_count); 3265 3266 /* 3267 * Use the 8-thread value if we're doing split-core 3268 * or if the vcore's online count looks bogus. 3269 */ 3270 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3271 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3272 rwmr_val = p8_rwmr_values[n_online]; 3273 mtspr(SPRN_RWMR, rwmr_val); 3274 } 3275 3276 /* Start all the threads */ 3277 active = 0; 3278 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3279 thr = is_power8 ? subcore_thread_map[sub] : sub; 3280 thr0_done = false; 3281 active |= 1 << thr; 3282 pvc = core_info.vc[sub]; 3283 pvc->pcpu = pcpu + thr; 3284 for_each_runnable_thread(i, vcpu, pvc) { 3285 kvmppc_start_thread(vcpu, pvc); 3286 kvmppc_create_dtl_entry(vcpu, pvc); 3287 trace_kvm_guest_enter(vcpu); 3288 if (!vcpu->arch.ptid) 3289 thr0_done = true; 3290 active |= 1 << (thr + vcpu->arch.ptid); 3291 } 3292 /* 3293 * We need to start the first thread of each subcore 3294 * even if it doesn't have a vcpu. 3295 */ 3296 if (!thr0_done) 3297 kvmppc_start_thread(NULL, pvc); 3298 } 3299 3300 /* 3301 * Ensure that split_info.do_nap is set after setting 3302 * the vcore pointer in the PACA of the secondaries. 3303 */ 3304 smp_mb(); 3305 3306 /* 3307 * When doing micro-threading, poke the inactive threads as well. 3308 * This gets them to the nap instruction after kvm_do_nap, 3309 * which reduces the time taken to unsplit later. 3310 * For POWER9 HPT guest on radix host, we need all the secondary 3311 * threads woken up so they can do the LPCR/LPIDR change. 3312 */ 3313 if (cmd_bit || hpt_on_radix) { 3314 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3315 for (thr = 1; thr < threads_per_subcore; ++thr) 3316 if (!(active & (1 << thr))) 3317 kvmppc_ipi_thread(pcpu + thr); 3318 } 3319 3320 vc->vcore_state = VCORE_RUNNING; 3321 preempt_disable(); 3322 3323 trace_kvmppc_run_core(vc, 0); 3324 3325 for (sub = 0; sub < core_info.n_subcores; ++sub) 3326 spin_unlock(&core_info.vc[sub]->lock); 3327 3328 guest_enter_irqoff(); 3329 3330 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3331 3332 this_cpu_disable_ftrace(); 3333 3334 /* 3335 * Interrupts will be enabled once we get into the guest, 3336 * so tell lockdep that we're about to enable interrupts. 3337 */ 3338 trace_hardirqs_on(); 3339 3340 trap = __kvmppc_vcore_entry(); 3341 3342 trace_hardirqs_off(); 3343 3344 this_cpu_enable_ftrace(); 3345 3346 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3347 3348 set_irq_happened(trap); 3349 3350 spin_lock(&vc->lock); 3351 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3352 vc->vcore_state = VCORE_EXITING; 3353 3354 /* wait for secondary threads to finish writing their state to memory */ 3355 kvmppc_wait_for_nap(controlled_threads); 3356 3357 /* Return to whole-core mode if we split the core earlier */ 3358 if (cmd_bit) { 3359 unsigned long hid0 = mfspr(SPRN_HID0); 3360 unsigned long loops = 0; 3361 3362 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3363 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3364 mb(); 3365 mtspr(SPRN_HID0, hid0); 3366 isync(); 3367 for (;;) { 3368 hid0 = mfspr(SPRN_HID0); 3369 if (!(hid0 & stat_bit)) 3370 break; 3371 cpu_relax(); 3372 ++loops; 3373 } 3374 } else if (hpt_on_radix) { 3375 /* Wait for all threads to have seen final sync */ 3376 for (thr = 1; thr < controlled_threads; ++thr) { 3377 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3378 3379 while (paca->kvm_hstate.kvm_split_mode) { 3380 HMT_low(); 3381 barrier(); 3382 } 3383 HMT_medium(); 3384 } 3385 } 3386 split_info.do_nap = 0; 3387 3388 kvmppc_set_host_core(pcpu); 3389 3390 local_irq_enable(); 3391 guest_exit(); 3392 3393 /* Let secondaries go back to the offline loop */ 3394 for (i = 0; i < controlled_threads; ++i) { 3395 kvmppc_release_hwthread(pcpu + i); 3396 if (sip && sip->napped[i]) 3397 kvmppc_ipi_thread(pcpu + i); 3398 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3399 } 3400 3401 spin_unlock(&vc->lock); 3402 3403 /* make sure updates to secondary vcpu structs are visible now */ 3404 smp_mb(); 3405 3406 preempt_enable(); 3407 3408 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3409 pvc = core_info.vc[sub]; 3410 post_guest_process(pvc, pvc == vc); 3411 } 3412 3413 spin_lock(&vc->lock); 3414 3415 out: 3416 vc->vcore_state = VCORE_INACTIVE; 3417 trace_kvmppc_run_core(vc, 1); 3418 } 3419 3420 /* 3421 * Load up hypervisor-mode registers on P9. 3422 */ 3423 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3424 unsigned long lpcr) 3425 { 3426 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3427 s64 hdec; 3428 u64 tb, purr, spurr; 3429 int trap; 3430 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3431 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3432 unsigned long host_dawr = mfspr(SPRN_DAWR0); 3433 unsigned long host_dawrx = mfspr(SPRN_DAWRX0); 3434 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3435 unsigned long host_pidr = mfspr(SPRN_PID); 3436 3437 hdec = time_limit - mftb(); 3438 if (hdec < 0) 3439 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3440 mtspr(SPRN_HDEC, hdec); 3441 3442 if (vc->tb_offset) { 3443 u64 new_tb = mftb() + vc->tb_offset; 3444 mtspr(SPRN_TBU40, new_tb); 3445 tb = mftb(); 3446 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3447 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3448 vc->tb_offset_applied = vc->tb_offset; 3449 } 3450 3451 if (vc->pcr) 3452 mtspr(SPRN_PCR, vc->pcr | PCR_MASK); 3453 mtspr(SPRN_DPDES, vc->dpdes); 3454 mtspr(SPRN_VTB, vc->vtb); 3455 3456 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3457 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3458 mtspr(SPRN_PURR, vcpu->arch.purr); 3459 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3460 3461 if (dawr_enabled()) { 3462 mtspr(SPRN_DAWR0, vcpu->arch.dawr); 3463 mtspr(SPRN_DAWRX0, vcpu->arch.dawrx); 3464 } 3465 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3466 mtspr(SPRN_IC, vcpu->arch.ic); 3467 mtspr(SPRN_PID, vcpu->arch.pid); 3468 3469 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3470 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3471 3472 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3473 3474 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3475 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3476 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3477 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3478 3479 mtspr(SPRN_AMOR, ~0UL); 3480 3481 mtspr(SPRN_LPCR, lpcr); 3482 isync(); 3483 3484 kvmppc_xive_push_vcpu(vcpu); 3485 3486 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3487 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3488 3489 trap = __kvmhv_vcpu_entry_p9(vcpu); 3490 3491 /* Advance host PURR/SPURR by the amount used by guest */ 3492 purr = mfspr(SPRN_PURR); 3493 spurr = mfspr(SPRN_SPURR); 3494 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3495 purr - vcpu->arch.purr); 3496 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3497 spurr - vcpu->arch.spurr); 3498 vcpu->arch.purr = purr; 3499 vcpu->arch.spurr = spurr; 3500 3501 vcpu->arch.ic = mfspr(SPRN_IC); 3502 vcpu->arch.pid = mfspr(SPRN_PID); 3503 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3504 3505 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3506 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3507 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3508 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3509 3510 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */ 3511 mtspr(SPRN_PSSCR, host_psscr | 3512 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3513 mtspr(SPRN_HFSCR, host_hfscr); 3514 mtspr(SPRN_CIABR, host_ciabr); 3515 mtspr(SPRN_DAWR0, host_dawr); 3516 mtspr(SPRN_DAWRX0, host_dawrx); 3517 mtspr(SPRN_PID, host_pidr); 3518 3519 /* 3520 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3521 * case we interrupted the guest between a tlbie and a ptesync. 3522 */ 3523 asm volatile("eieio; tlbsync; ptesync"); 3524 3525 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3526 isync(); 3527 3528 vc->dpdes = mfspr(SPRN_DPDES); 3529 vc->vtb = mfspr(SPRN_VTB); 3530 mtspr(SPRN_DPDES, 0); 3531 if (vc->pcr) 3532 mtspr(SPRN_PCR, PCR_MASK); 3533 3534 if (vc->tb_offset_applied) { 3535 u64 new_tb = mftb() - vc->tb_offset_applied; 3536 mtspr(SPRN_TBU40, new_tb); 3537 tb = mftb(); 3538 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3539 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3540 vc->tb_offset_applied = 0; 3541 } 3542 3543 mtspr(SPRN_HDEC, 0x7fffffff); 3544 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3545 3546 return trap; 3547 } 3548 3549 /* 3550 * Virtual-mode guest entry for POWER9 and later when the host and 3551 * guest are both using the radix MMU. The LPIDR has already been set. 3552 */ 3553 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3554 unsigned long lpcr) 3555 { 3556 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3557 unsigned long host_dscr = mfspr(SPRN_DSCR); 3558 unsigned long host_tidr = mfspr(SPRN_TIDR); 3559 unsigned long host_iamr = mfspr(SPRN_IAMR); 3560 unsigned long host_amr = mfspr(SPRN_AMR); 3561 s64 dec; 3562 u64 tb; 3563 int trap, save_pmu; 3564 3565 dec = mfspr(SPRN_DEC); 3566 tb = mftb(); 3567 if (dec < 512) 3568 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3569 local_paca->kvm_hstate.dec_expires = dec + tb; 3570 if (local_paca->kvm_hstate.dec_expires < time_limit) 3571 time_limit = local_paca->kvm_hstate.dec_expires; 3572 3573 vcpu->arch.ceded = 0; 3574 3575 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3576 3577 kvmppc_subcore_enter_guest(); 3578 3579 vc->entry_exit_map = 1; 3580 vc->in_guest = 1; 3581 3582 if (vcpu->arch.vpa.pinned_addr) { 3583 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3584 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3585 lp->yield_count = cpu_to_be32(yield_count); 3586 vcpu->arch.vpa.dirty = 1; 3587 } 3588 3589 if (cpu_has_feature(CPU_FTR_TM) || 3590 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3591 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3592 3593 kvmhv_load_guest_pmu(vcpu); 3594 3595 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3596 load_fp_state(&vcpu->arch.fp); 3597 #ifdef CONFIG_ALTIVEC 3598 load_vr_state(&vcpu->arch.vr); 3599 #endif 3600 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3601 3602 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3603 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3604 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3605 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3606 mtspr(SPRN_TAR, vcpu->arch.tar); 3607 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3608 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3609 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3610 mtspr(SPRN_WORT, vcpu->arch.wort); 3611 mtspr(SPRN_TIDR, vcpu->arch.tid); 3612 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3613 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3614 mtspr(SPRN_AMR, vcpu->arch.amr); 3615 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3616 3617 if (!(vcpu->arch.ctrl & 1)) 3618 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3619 3620 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3621 3622 if (kvmhv_on_pseries()) { 3623 /* 3624 * We need to save and restore the guest visible part of the 3625 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3626 * doesn't do this for us. Note only required if pseries since 3627 * this is done in kvmhv_load_hv_regs_and_go() below otherwise. 3628 */ 3629 unsigned long host_psscr; 3630 /* call our hypervisor to load up HV regs and go */ 3631 struct hv_guest_state hvregs; 3632 3633 host_psscr = mfspr(SPRN_PSSCR_PR); 3634 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3635 kvmhv_save_hv_regs(vcpu, &hvregs); 3636 hvregs.lpcr = lpcr; 3637 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3638 hvregs.version = HV_GUEST_STATE_VERSION; 3639 if (vcpu->arch.nested) { 3640 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3641 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3642 } else { 3643 hvregs.lpid = vcpu->kvm->arch.lpid; 3644 hvregs.vcpu_token = vcpu->vcpu_id; 3645 } 3646 hvregs.hdec_expiry = time_limit; 3647 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3648 __pa(&vcpu->arch.regs)); 3649 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3650 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3651 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3652 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3653 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3654 mtspr(SPRN_PSSCR_PR, host_psscr); 3655 3656 /* H_CEDE has to be handled now, not later */ 3657 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3658 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3659 kvmppc_nested_cede(vcpu); 3660 kvmppc_set_gpr(vcpu, 3, 0); 3661 trap = 0; 3662 } 3663 } else { 3664 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3665 } 3666 3667 vcpu->arch.slb_max = 0; 3668 dec = mfspr(SPRN_DEC); 3669 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 3670 dec = (s32) dec; 3671 tb = mftb(); 3672 vcpu->arch.dec_expires = dec + tb; 3673 vcpu->cpu = -1; 3674 vcpu->arch.thread_cpu = -1; 3675 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3676 3677 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3678 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3679 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3680 vcpu->arch.tar = mfspr(SPRN_TAR); 3681 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3682 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3683 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3684 vcpu->arch.wort = mfspr(SPRN_WORT); 3685 vcpu->arch.tid = mfspr(SPRN_TIDR); 3686 vcpu->arch.amr = mfspr(SPRN_AMR); 3687 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3688 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3689 3690 mtspr(SPRN_PSPB, 0); 3691 mtspr(SPRN_WORT, 0); 3692 mtspr(SPRN_UAMOR, 0); 3693 mtspr(SPRN_DSCR, host_dscr); 3694 mtspr(SPRN_TIDR, host_tidr); 3695 mtspr(SPRN_IAMR, host_iamr); 3696 mtspr(SPRN_PSPB, 0); 3697 3698 if (host_amr != vcpu->arch.amr) 3699 mtspr(SPRN_AMR, host_amr); 3700 3701 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3702 store_fp_state(&vcpu->arch.fp); 3703 #ifdef CONFIG_ALTIVEC 3704 store_vr_state(&vcpu->arch.vr); 3705 #endif 3706 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3707 3708 if (cpu_has_feature(CPU_FTR_TM) || 3709 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3710 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3711 3712 save_pmu = 1; 3713 if (vcpu->arch.vpa.pinned_addr) { 3714 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3715 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3716 lp->yield_count = cpu_to_be32(yield_count); 3717 vcpu->arch.vpa.dirty = 1; 3718 save_pmu = lp->pmcregs_in_use; 3719 } 3720 /* Must save pmu if this guest is capable of running nested guests */ 3721 save_pmu |= nesting_enabled(vcpu->kvm); 3722 3723 kvmhv_save_guest_pmu(vcpu, save_pmu); 3724 3725 vc->entry_exit_map = 0x101; 3726 vc->in_guest = 0; 3727 3728 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3729 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso); 3730 3731 kvmhv_load_host_pmu(); 3732 3733 kvmppc_subcore_exit_guest(); 3734 3735 return trap; 3736 } 3737 3738 /* 3739 * Wait for some other vcpu thread to execute us, and 3740 * wake us up when we need to handle something in the host. 3741 */ 3742 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3743 struct kvm_vcpu *vcpu, int wait_state) 3744 { 3745 DEFINE_WAIT(wait); 3746 3747 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3748 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3749 spin_unlock(&vc->lock); 3750 schedule(); 3751 spin_lock(&vc->lock); 3752 } 3753 finish_wait(&vcpu->arch.cpu_run, &wait); 3754 } 3755 3756 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3757 { 3758 if (!halt_poll_ns_grow) 3759 return; 3760 3761 vc->halt_poll_ns *= halt_poll_ns_grow; 3762 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 3763 vc->halt_poll_ns = halt_poll_ns_grow_start; 3764 } 3765 3766 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3767 { 3768 if (halt_poll_ns_shrink == 0) 3769 vc->halt_poll_ns = 0; 3770 else 3771 vc->halt_poll_ns /= halt_poll_ns_shrink; 3772 } 3773 3774 #ifdef CONFIG_KVM_XICS 3775 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3776 { 3777 if (!xics_on_xive()) 3778 return false; 3779 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3780 vcpu->arch.xive_saved_state.cppr; 3781 } 3782 #else 3783 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3784 { 3785 return false; 3786 } 3787 #endif /* CONFIG_KVM_XICS */ 3788 3789 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3790 { 3791 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3792 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3793 return true; 3794 3795 return false; 3796 } 3797 3798 /* 3799 * Check to see if any of the runnable vcpus on the vcore have pending 3800 * exceptions or are no longer ceded 3801 */ 3802 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3803 { 3804 struct kvm_vcpu *vcpu; 3805 int i; 3806 3807 for_each_runnable_thread(i, vcpu, vc) { 3808 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3809 return 1; 3810 } 3811 3812 return 0; 3813 } 3814 3815 /* 3816 * All the vcpus in this vcore are idle, so wait for a decrementer 3817 * or external interrupt to one of the vcpus. vc->lock is held. 3818 */ 3819 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3820 { 3821 ktime_t cur, start_poll, start_wait; 3822 int do_sleep = 1; 3823 u64 block_ns; 3824 3825 /* Poll for pending exceptions and ceded state */ 3826 cur = start_poll = ktime_get(); 3827 if (vc->halt_poll_ns) { 3828 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3829 ++vc->runner->stat.halt_attempted_poll; 3830 3831 vc->vcore_state = VCORE_POLLING; 3832 spin_unlock(&vc->lock); 3833 3834 do { 3835 if (kvmppc_vcore_check_block(vc)) { 3836 do_sleep = 0; 3837 break; 3838 } 3839 cur = ktime_get(); 3840 } while (single_task_running() && ktime_before(cur, stop)); 3841 3842 spin_lock(&vc->lock); 3843 vc->vcore_state = VCORE_INACTIVE; 3844 3845 if (!do_sleep) { 3846 ++vc->runner->stat.halt_successful_poll; 3847 goto out; 3848 } 3849 } 3850 3851 prepare_to_rcuwait(&vc->wait); 3852 set_current_state(TASK_INTERRUPTIBLE); 3853 if (kvmppc_vcore_check_block(vc)) { 3854 finish_rcuwait(&vc->wait); 3855 do_sleep = 0; 3856 /* If we polled, count this as a successful poll */ 3857 if (vc->halt_poll_ns) 3858 ++vc->runner->stat.halt_successful_poll; 3859 goto out; 3860 } 3861 3862 start_wait = ktime_get(); 3863 3864 vc->vcore_state = VCORE_SLEEPING; 3865 trace_kvmppc_vcore_blocked(vc, 0); 3866 spin_unlock(&vc->lock); 3867 schedule(); 3868 finish_rcuwait(&vc->wait); 3869 spin_lock(&vc->lock); 3870 vc->vcore_state = VCORE_INACTIVE; 3871 trace_kvmppc_vcore_blocked(vc, 1); 3872 ++vc->runner->stat.halt_successful_wait; 3873 3874 cur = ktime_get(); 3875 3876 out: 3877 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3878 3879 /* Attribute wait time */ 3880 if (do_sleep) { 3881 vc->runner->stat.halt_wait_ns += 3882 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3883 /* Attribute failed poll time */ 3884 if (vc->halt_poll_ns) 3885 vc->runner->stat.halt_poll_fail_ns += 3886 ktime_to_ns(start_wait) - 3887 ktime_to_ns(start_poll); 3888 } else { 3889 /* Attribute successful poll time */ 3890 if (vc->halt_poll_ns) 3891 vc->runner->stat.halt_poll_success_ns += 3892 ktime_to_ns(cur) - 3893 ktime_to_ns(start_poll); 3894 } 3895 3896 /* Adjust poll time */ 3897 if (halt_poll_ns) { 3898 if (block_ns <= vc->halt_poll_ns) 3899 ; 3900 /* We slept and blocked for longer than the max halt time */ 3901 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3902 shrink_halt_poll_ns(vc); 3903 /* We slept and our poll time is too small */ 3904 else if (vc->halt_poll_ns < halt_poll_ns && 3905 block_ns < halt_poll_ns) 3906 grow_halt_poll_ns(vc); 3907 if (vc->halt_poll_ns > halt_poll_ns) 3908 vc->halt_poll_ns = halt_poll_ns; 3909 } else 3910 vc->halt_poll_ns = 0; 3911 3912 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3913 } 3914 3915 /* 3916 * This never fails for a radix guest, as none of the operations it does 3917 * for a radix guest can fail or have a way to report failure. 3918 * kvmhv_run_single_vcpu() relies on this fact. 3919 */ 3920 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3921 { 3922 int r = 0; 3923 struct kvm *kvm = vcpu->kvm; 3924 3925 mutex_lock(&kvm->arch.mmu_setup_lock); 3926 if (!kvm->arch.mmu_ready) { 3927 if (!kvm_is_radix(kvm)) 3928 r = kvmppc_hv_setup_htab_rma(vcpu); 3929 if (!r) { 3930 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3931 kvmppc_setup_partition_table(kvm); 3932 kvm->arch.mmu_ready = 1; 3933 } 3934 } 3935 mutex_unlock(&kvm->arch.mmu_setup_lock); 3936 return r; 3937 } 3938 3939 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 3940 { 3941 struct kvm_run *run = vcpu->run; 3942 int n_ceded, i, r; 3943 struct kvmppc_vcore *vc; 3944 struct kvm_vcpu *v; 3945 3946 trace_kvmppc_run_vcpu_enter(vcpu); 3947 3948 run->exit_reason = 0; 3949 vcpu->arch.ret = RESUME_GUEST; 3950 vcpu->arch.trap = 0; 3951 kvmppc_update_vpas(vcpu); 3952 3953 /* 3954 * Synchronize with other threads in this virtual core 3955 */ 3956 vc = vcpu->arch.vcore; 3957 spin_lock(&vc->lock); 3958 vcpu->arch.ceded = 0; 3959 vcpu->arch.run_task = current; 3960 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3961 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3962 vcpu->arch.busy_preempt = TB_NIL; 3963 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 3964 ++vc->n_runnable; 3965 3966 /* 3967 * This happens the first time this is called for a vcpu. 3968 * If the vcore is already running, we may be able to start 3969 * this thread straight away and have it join in. 3970 */ 3971 if (!signal_pending(current)) { 3972 if ((vc->vcore_state == VCORE_PIGGYBACK || 3973 vc->vcore_state == VCORE_RUNNING) && 3974 !VCORE_IS_EXITING(vc)) { 3975 kvmppc_create_dtl_entry(vcpu, vc); 3976 kvmppc_start_thread(vcpu, vc); 3977 trace_kvm_guest_enter(vcpu); 3978 } else if (vc->vcore_state == VCORE_SLEEPING) { 3979 rcuwait_wake_up(&vc->wait); 3980 } 3981 3982 } 3983 3984 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3985 !signal_pending(current)) { 3986 /* See if the MMU is ready to go */ 3987 if (!vcpu->kvm->arch.mmu_ready) { 3988 spin_unlock(&vc->lock); 3989 r = kvmhv_setup_mmu(vcpu); 3990 spin_lock(&vc->lock); 3991 if (r) { 3992 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 3993 run->fail_entry. 3994 hardware_entry_failure_reason = 0; 3995 vcpu->arch.ret = r; 3996 break; 3997 } 3998 } 3999 4000 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4001 kvmppc_vcore_end_preempt(vc); 4002 4003 if (vc->vcore_state != VCORE_INACTIVE) { 4004 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4005 continue; 4006 } 4007 for_each_runnable_thread(i, v, vc) { 4008 kvmppc_core_prepare_to_enter(v); 4009 if (signal_pending(v->arch.run_task)) { 4010 kvmppc_remove_runnable(vc, v); 4011 v->stat.signal_exits++; 4012 v->run->exit_reason = KVM_EXIT_INTR; 4013 v->arch.ret = -EINTR; 4014 wake_up(&v->arch.cpu_run); 4015 } 4016 } 4017 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4018 break; 4019 n_ceded = 0; 4020 for_each_runnable_thread(i, v, vc) { 4021 if (!kvmppc_vcpu_woken(v)) 4022 n_ceded += v->arch.ceded; 4023 else 4024 v->arch.ceded = 0; 4025 } 4026 vc->runner = vcpu; 4027 if (n_ceded == vc->n_runnable) { 4028 kvmppc_vcore_blocked(vc); 4029 } else if (need_resched()) { 4030 kvmppc_vcore_preempt(vc); 4031 /* Let something else run */ 4032 cond_resched_lock(&vc->lock); 4033 if (vc->vcore_state == VCORE_PREEMPT) 4034 kvmppc_vcore_end_preempt(vc); 4035 } else { 4036 kvmppc_run_core(vc); 4037 } 4038 vc->runner = NULL; 4039 } 4040 4041 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4042 (vc->vcore_state == VCORE_RUNNING || 4043 vc->vcore_state == VCORE_EXITING || 4044 vc->vcore_state == VCORE_PIGGYBACK)) 4045 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4046 4047 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4048 kvmppc_vcore_end_preempt(vc); 4049 4050 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4051 kvmppc_remove_runnable(vc, vcpu); 4052 vcpu->stat.signal_exits++; 4053 run->exit_reason = KVM_EXIT_INTR; 4054 vcpu->arch.ret = -EINTR; 4055 } 4056 4057 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4058 /* Wake up some vcpu to run the core */ 4059 i = -1; 4060 v = next_runnable_thread(vc, &i); 4061 wake_up(&v->arch.cpu_run); 4062 } 4063 4064 trace_kvmppc_run_vcpu_exit(vcpu); 4065 spin_unlock(&vc->lock); 4066 return vcpu->arch.ret; 4067 } 4068 4069 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4070 unsigned long lpcr) 4071 { 4072 struct kvm_run *run = vcpu->run; 4073 int trap, r, pcpu; 4074 int srcu_idx, lpid; 4075 struct kvmppc_vcore *vc; 4076 struct kvm *kvm = vcpu->kvm; 4077 struct kvm_nested_guest *nested = vcpu->arch.nested; 4078 4079 trace_kvmppc_run_vcpu_enter(vcpu); 4080 4081 run->exit_reason = 0; 4082 vcpu->arch.ret = RESUME_GUEST; 4083 vcpu->arch.trap = 0; 4084 4085 vc = vcpu->arch.vcore; 4086 vcpu->arch.ceded = 0; 4087 vcpu->arch.run_task = current; 4088 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4089 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4090 vcpu->arch.busy_preempt = TB_NIL; 4091 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4092 vc->runnable_threads[0] = vcpu; 4093 vc->n_runnable = 1; 4094 vc->runner = vcpu; 4095 4096 /* See if the MMU is ready to go */ 4097 if (!kvm->arch.mmu_ready) 4098 kvmhv_setup_mmu(vcpu); 4099 4100 if (need_resched()) 4101 cond_resched(); 4102 4103 kvmppc_update_vpas(vcpu); 4104 4105 init_vcore_to_run(vc); 4106 vc->preempt_tb = TB_NIL; 4107 4108 preempt_disable(); 4109 pcpu = smp_processor_id(); 4110 vc->pcpu = pcpu; 4111 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4112 4113 local_irq_disable(); 4114 hard_irq_disable(); 4115 if (signal_pending(current)) 4116 goto sigpend; 4117 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4118 goto out; 4119 4120 if (!nested) { 4121 kvmppc_core_prepare_to_enter(vcpu); 4122 if (vcpu->arch.doorbell_request) { 4123 vc->dpdes = 1; 4124 smp_wmb(); 4125 vcpu->arch.doorbell_request = 0; 4126 } 4127 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4128 &vcpu->arch.pending_exceptions)) 4129 lpcr |= LPCR_MER; 4130 } else if (vcpu->arch.pending_exceptions || 4131 vcpu->arch.doorbell_request || 4132 xive_interrupt_pending(vcpu)) { 4133 vcpu->arch.ret = RESUME_HOST; 4134 goto out; 4135 } 4136 4137 kvmppc_clear_host_core(pcpu); 4138 4139 local_paca->kvm_hstate.tid = 0; 4140 local_paca->kvm_hstate.napping = 0; 4141 local_paca->kvm_hstate.kvm_split_mode = NULL; 4142 kvmppc_start_thread(vcpu, vc); 4143 kvmppc_create_dtl_entry(vcpu, vc); 4144 trace_kvm_guest_enter(vcpu); 4145 4146 vc->vcore_state = VCORE_RUNNING; 4147 trace_kvmppc_run_core(vc, 0); 4148 4149 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4150 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid; 4151 mtspr(SPRN_LPID, lpid); 4152 isync(); 4153 kvmppc_check_need_tlb_flush(kvm, pcpu, nested); 4154 } 4155 4156 guest_enter_irqoff(); 4157 4158 srcu_idx = srcu_read_lock(&kvm->srcu); 4159 4160 this_cpu_disable_ftrace(); 4161 4162 /* Tell lockdep that we're about to enable interrupts */ 4163 trace_hardirqs_on(); 4164 4165 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4166 vcpu->arch.trap = trap; 4167 4168 trace_hardirqs_off(); 4169 4170 this_cpu_enable_ftrace(); 4171 4172 srcu_read_unlock(&kvm->srcu, srcu_idx); 4173 4174 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4175 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4176 isync(); 4177 } 4178 4179 set_irq_happened(trap); 4180 4181 kvmppc_set_host_core(pcpu); 4182 4183 local_irq_enable(); 4184 guest_exit(); 4185 4186 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4187 4188 preempt_enable(); 4189 4190 /* 4191 * cancel pending decrementer exception if DEC is now positive, or if 4192 * entering a nested guest in which case the decrementer is now owned 4193 * by L2 and the L1 decrementer is provided in hdec_expires 4194 */ 4195 if (kvmppc_core_pending_dec(vcpu) && 4196 ((get_tb() < vcpu->arch.dec_expires) || 4197 (trap == BOOK3S_INTERRUPT_SYSCALL && 4198 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4199 kvmppc_core_dequeue_dec(vcpu); 4200 4201 trace_kvm_guest_exit(vcpu); 4202 r = RESUME_GUEST; 4203 if (trap) { 4204 if (!nested) 4205 r = kvmppc_handle_exit_hv(vcpu, current); 4206 else 4207 r = kvmppc_handle_nested_exit(vcpu); 4208 } 4209 vcpu->arch.ret = r; 4210 4211 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4212 !kvmppc_vcpu_woken(vcpu)) { 4213 kvmppc_set_timer(vcpu); 4214 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4215 if (signal_pending(current)) { 4216 vcpu->stat.signal_exits++; 4217 run->exit_reason = KVM_EXIT_INTR; 4218 vcpu->arch.ret = -EINTR; 4219 break; 4220 } 4221 spin_lock(&vc->lock); 4222 kvmppc_vcore_blocked(vc); 4223 spin_unlock(&vc->lock); 4224 } 4225 } 4226 vcpu->arch.ceded = 0; 4227 4228 vc->vcore_state = VCORE_INACTIVE; 4229 trace_kvmppc_run_core(vc, 1); 4230 4231 done: 4232 kvmppc_remove_runnable(vc, vcpu); 4233 trace_kvmppc_run_vcpu_exit(vcpu); 4234 4235 return vcpu->arch.ret; 4236 4237 sigpend: 4238 vcpu->stat.signal_exits++; 4239 run->exit_reason = KVM_EXIT_INTR; 4240 vcpu->arch.ret = -EINTR; 4241 out: 4242 local_irq_enable(); 4243 preempt_enable(); 4244 goto done; 4245 } 4246 4247 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 4248 { 4249 struct kvm_run *run = vcpu->run; 4250 int r; 4251 int srcu_idx; 4252 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4253 unsigned long user_tar = 0; 4254 unsigned int user_vrsave; 4255 struct kvm *kvm; 4256 4257 if (!vcpu->arch.sane) { 4258 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4259 return -EINVAL; 4260 } 4261 4262 /* 4263 * Don't allow entry with a suspended transaction, because 4264 * the guest entry/exit code will lose it. 4265 * If the guest has TM enabled, save away their TM-related SPRs 4266 * (they will get restored by the TM unavailable interrupt). 4267 */ 4268 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4269 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4270 (current->thread.regs->msr & MSR_TM)) { 4271 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4272 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4273 run->fail_entry.hardware_entry_failure_reason = 0; 4274 return -EINVAL; 4275 } 4276 /* Enable TM so we can read the TM SPRs */ 4277 mtmsr(mfmsr() | MSR_TM); 4278 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4279 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4280 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4281 current->thread.regs->msr &= ~MSR_TM; 4282 } 4283 #endif 4284 4285 /* 4286 * Force online to 1 for the sake of old userspace which doesn't 4287 * set it. 4288 */ 4289 if (!vcpu->arch.online) { 4290 atomic_inc(&vcpu->arch.vcore->online_count); 4291 vcpu->arch.online = 1; 4292 } 4293 4294 kvmppc_core_prepare_to_enter(vcpu); 4295 4296 /* No need to go into the guest when all we'll do is come back out */ 4297 if (signal_pending(current)) { 4298 run->exit_reason = KVM_EXIT_INTR; 4299 return -EINTR; 4300 } 4301 4302 kvm = vcpu->kvm; 4303 atomic_inc(&kvm->arch.vcpus_running); 4304 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4305 smp_mb(); 4306 4307 flush_all_to_thread(current); 4308 4309 /* Save userspace EBB and other register values */ 4310 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4311 ebb_regs[0] = mfspr(SPRN_EBBHR); 4312 ebb_regs[1] = mfspr(SPRN_EBBRR); 4313 ebb_regs[2] = mfspr(SPRN_BESCR); 4314 user_tar = mfspr(SPRN_TAR); 4315 } 4316 user_vrsave = mfspr(SPRN_VRSAVE); 4317 4318 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 4319 vcpu->arch.pgdir = kvm->mm->pgd; 4320 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4321 4322 do { 4323 /* 4324 * The early POWER9 chips that can't mix radix and HPT threads 4325 * on the same core also need the workaround for the problem 4326 * where the TLB would prefetch entries in the guest exit path 4327 * for radix guests using the guest PIDR value and LPID 0. 4328 * The workaround is in the old path (kvmppc_run_vcpu()) 4329 * but not the new path (kvmhv_run_single_vcpu()). 4330 */ 4331 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4332 !no_mixing_hpt_and_radix) 4333 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 4334 vcpu->arch.vcore->lpcr); 4335 else 4336 r = kvmppc_run_vcpu(vcpu); 4337 4338 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4339 !(vcpu->arch.shregs.msr & MSR_PR)) { 4340 trace_kvm_hcall_enter(vcpu); 4341 r = kvmppc_pseries_do_hcall(vcpu); 4342 trace_kvm_hcall_exit(vcpu, r); 4343 kvmppc_core_prepare_to_enter(vcpu); 4344 } else if (r == RESUME_PAGE_FAULT) { 4345 srcu_idx = srcu_read_lock(&kvm->srcu); 4346 r = kvmppc_book3s_hv_page_fault(vcpu, 4347 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4348 srcu_read_unlock(&kvm->srcu, srcu_idx); 4349 } else if (r == RESUME_PASSTHROUGH) { 4350 if (WARN_ON(xics_on_xive())) 4351 r = H_SUCCESS; 4352 else 4353 r = kvmppc_xics_rm_complete(vcpu, 0); 4354 } 4355 } while (is_kvmppc_resume_guest(r)); 4356 4357 /* Restore userspace EBB and other register values */ 4358 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4359 mtspr(SPRN_EBBHR, ebb_regs[0]); 4360 mtspr(SPRN_EBBRR, ebb_regs[1]); 4361 mtspr(SPRN_BESCR, ebb_regs[2]); 4362 mtspr(SPRN_TAR, user_tar); 4363 mtspr(SPRN_FSCR, current->thread.fscr); 4364 } 4365 mtspr(SPRN_VRSAVE, user_vrsave); 4366 4367 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4368 atomic_dec(&kvm->arch.vcpus_running); 4369 return r; 4370 } 4371 4372 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4373 int shift, int sllp) 4374 { 4375 (*sps)->page_shift = shift; 4376 (*sps)->slb_enc = sllp; 4377 (*sps)->enc[0].page_shift = shift; 4378 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4379 /* 4380 * Add 16MB MPSS support (may get filtered out by userspace) 4381 */ 4382 if (shift != 24) { 4383 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4384 if (penc != -1) { 4385 (*sps)->enc[1].page_shift = 24; 4386 (*sps)->enc[1].pte_enc = penc; 4387 } 4388 } 4389 (*sps)++; 4390 } 4391 4392 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4393 struct kvm_ppc_smmu_info *info) 4394 { 4395 struct kvm_ppc_one_seg_page_size *sps; 4396 4397 /* 4398 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4399 * POWER7 doesn't support keys for instruction accesses, 4400 * POWER8 and POWER9 do. 4401 */ 4402 info->data_keys = 32; 4403 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4404 4405 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4406 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4407 info->slb_size = 32; 4408 4409 /* We only support these sizes for now, and no muti-size segments */ 4410 sps = &info->sps[0]; 4411 kvmppc_add_seg_page_size(&sps, 12, 0); 4412 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4413 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4414 4415 /* If running as a nested hypervisor, we don't support HPT guests */ 4416 if (kvmhv_on_pseries()) 4417 info->flags |= KVM_PPC_NO_HASH; 4418 4419 return 0; 4420 } 4421 4422 /* 4423 * Get (and clear) the dirty memory log for a memory slot. 4424 */ 4425 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4426 struct kvm_dirty_log *log) 4427 { 4428 struct kvm_memslots *slots; 4429 struct kvm_memory_slot *memslot; 4430 int i, r; 4431 unsigned long n; 4432 unsigned long *buf, *p; 4433 struct kvm_vcpu *vcpu; 4434 4435 mutex_lock(&kvm->slots_lock); 4436 4437 r = -EINVAL; 4438 if (log->slot >= KVM_USER_MEM_SLOTS) 4439 goto out; 4440 4441 slots = kvm_memslots(kvm); 4442 memslot = id_to_memslot(slots, log->slot); 4443 r = -ENOENT; 4444 if (!memslot || !memslot->dirty_bitmap) 4445 goto out; 4446 4447 /* 4448 * Use second half of bitmap area because both HPT and radix 4449 * accumulate bits in the first half. 4450 */ 4451 n = kvm_dirty_bitmap_bytes(memslot); 4452 buf = memslot->dirty_bitmap + n / sizeof(long); 4453 memset(buf, 0, n); 4454 4455 if (kvm_is_radix(kvm)) 4456 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4457 else 4458 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4459 if (r) 4460 goto out; 4461 4462 /* 4463 * We accumulate dirty bits in the first half of the 4464 * memslot's dirty_bitmap area, for when pages are paged 4465 * out or modified by the host directly. Pick up these 4466 * bits and add them to the map. 4467 */ 4468 p = memslot->dirty_bitmap; 4469 for (i = 0; i < n / sizeof(long); ++i) 4470 buf[i] |= xchg(&p[i], 0); 4471 4472 /* Harvest dirty bits from VPA and DTL updates */ 4473 /* Note: we never modify the SLB shadow buffer areas */ 4474 kvm_for_each_vcpu(i, vcpu, kvm) { 4475 spin_lock(&vcpu->arch.vpa_update_lock); 4476 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4477 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4478 spin_unlock(&vcpu->arch.vpa_update_lock); 4479 } 4480 4481 r = -EFAULT; 4482 if (copy_to_user(log->dirty_bitmap, buf, n)) 4483 goto out; 4484 4485 r = 0; 4486 out: 4487 mutex_unlock(&kvm->slots_lock); 4488 return r; 4489 } 4490 4491 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4492 { 4493 vfree(slot->arch.rmap); 4494 slot->arch.rmap = NULL; 4495 } 4496 4497 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4498 struct kvm_memory_slot *slot, 4499 const struct kvm_userspace_memory_region *mem, 4500 enum kvm_mr_change change) 4501 { 4502 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4503 4504 if (change == KVM_MR_CREATE) { 4505 slot->arch.rmap = vzalloc(array_size(npages, 4506 sizeof(*slot->arch.rmap))); 4507 if (!slot->arch.rmap) 4508 return -ENOMEM; 4509 } 4510 4511 return 0; 4512 } 4513 4514 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4515 const struct kvm_userspace_memory_region *mem, 4516 const struct kvm_memory_slot *old, 4517 const struct kvm_memory_slot *new, 4518 enum kvm_mr_change change) 4519 { 4520 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4521 4522 /* 4523 * If we are making a new memslot, it might make 4524 * some address that was previously cached as emulated 4525 * MMIO be no longer emulated MMIO, so invalidate 4526 * all the caches of emulated MMIO translations. 4527 */ 4528 if (npages) 4529 atomic64_inc(&kvm->arch.mmio_update); 4530 4531 /* 4532 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4533 * have already called kvm_arch_flush_shadow_memslot() to 4534 * flush shadow mappings. For KVM_MR_CREATE we have no 4535 * previous mappings. So the only case to handle is 4536 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4537 * has been changed. 4538 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4539 * to get rid of any THP PTEs in the partition-scoped page tables 4540 * so we can track dirtiness at the page level; we flush when 4541 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4542 * using THP PTEs. 4543 */ 4544 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4545 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4546 kvmppc_radix_flush_memslot(kvm, old); 4547 /* 4548 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4549 */ 4550 if (!kvm->arch.secure_guest) 4551 return; 4552 4553 switch (change) { 4554 case KVM_MR_CREATE: 4555 if (kvmppc_uvmem_slot_init(kvm, new)) 4556 return; 4557 uv_register_mem_slot(kvm->arch.lpid, 4558 new->base_gfn << PAGE_SHIFT, 4559 new->npages * PAGE_SIZE, 4560 0, new->id); 4561 break; 4562 case KVM_MR_DELETE: 4563 uv_unregister_mem_slot(kvm->arch.lpid, old->id); 4564 kvmppc_uvmem_slot_free(kvm, old); 4565 break; 4566 default: 4567 /* TODO: Handle KVM_MR_MOVE */ 4568 break; 4569 } 4570 } 4571 4572 /* 4573 * Update LPCR values in kvm->arch and in vcores. 4574 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4575 * of kvm->arch.lpcr update). 4576 */ 4577 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4578 { 4579 long int i; 4580 u32 cores_done = 0; 4581 4582 if ((kvm->arch.lpcr & mask) == lpcr) 4583 return; 4584 4585 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4586 4587 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4588 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4589 if (!vc) 4590 continue; 4591 spin_lock(&vc->lock); 4592 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4593 spin_unlock(&vc->lock); 4594 if (++cores_done >= kvm->arch.online_vcores) 4595 break; 4596 } 4597 } 4598 4599 void kvmppc_setup_partition_table(struct kvm *kvm) 4600 { 4601 unsigned long dw0, dw1; 4602 4603 if (!kvm_is_radix(kvm)) { 4604 /* PS field - page size for VRMA */ 4605 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4606 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4607 /* HTABSIZE and HTABORG fields */ 4608 dw0 |= kvm->arch.sdr1; 4609 4610 /* Second dword as set by userspace */ 4611 dw1 = kvm->arch.process_table; 4612 } else { 4613 dw0 = PATB_HR | radix__get_tree_size() | 4614 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4615 dw1 = PATB_GR | kvm->arch.process_table; 4616 } 4617 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4618 } 4619 4620 /* 4621 * Set up HPT (hashed page table) and RMA (real-mode area). 4622 * Must be called with kvm->arch.mmu_setup_lock held. 4623 */ 4624 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4625 { 4626 int err = 0; 4627 struct kvm *kvm = vcpu->kvm; 4628 unsigned long hva; 4629 struct kvm_memory_slot *memslot; 4630 struct vm_area_struct *vma; 4631 unsigned long lpcr = 0, senc; 4632 unsigned long psize, porder; 4633 int srcu_idx; 4634 4635 /* Allocate hashed page table (if not done already) and reset it */ 4636 if (!kvm->arch.hpt.virt) { 4637 int order = KVM_DEFAULT_HPT_ORDER; 4638 struct kvm_hpt_info info; 4639 4640 err = kvmppc_allocate_hpt(&info, order); 4641 /* If we get here, it means userspace didn't specify a 4642 * size explicitly. So, try successively smaller 4643 * sizes if the default failed. */ 4644 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4645 err = kvmppc_allocate_hpt(&info, order); 4646 4647 if (err < 0) { 4648 pr_err("KVM: Couldn't alloc HPT\n"); 4649 goto out; 4650 } 4651 4652 kvmppc_set_hpt(kvm, &info); 4653 } 4654 4655 /* Look up the memslot for guest physical address 0 */ 4656 srcu_idx = srcu_read_lock(&kvm->srcu); 4657 memslot = gfn_to_memslot(kvm, 0); 4658 4659 /* We must have some memory at 0 by now */ 4660 err = -EINVAL; 4661 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4662 goto out_srcu; 4663 4664 /* Look up the VMA for the start of this memory slot */ 4665 hva = memslot->userspace_addr; 4666 mmap_read_lock(kvm->mm); 4667 vma = find_vma(kvm->mm, hva); 4668 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4669 goto up_out; 4670 4671 psize = vma_kernel_pagesize(vma); 4672 4673 mmap_read_unlock(kvm->mm); 4674 4675 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4676 if (psize >= 0x1000000) 4677 psize = 0x1000000; 4678 else if (psize >= 0x10000) 4679 psize = 0x10000; 4680 else 4681 psize = 0x1000; 4682 porder = __ilog2(psize); 4683 4684 senc = slb_pgsize_encoding(psize); 4685 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4686 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4687 /* Create HPTEs in the hash page table for the VRMA */ 4688 kvmppc_map_vrma(vcpu, memslot, porder); 4689 4690 /* Update VRMASD field in the LPCR */ 4691 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4692 /* the -4 is to account for senc values starting at 0x10 */ 4693 lpcr = senc << (LPCR_VRMASD_SH - 4); 4694 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4695 } 4696 4697 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4698 smp_wmb(); 4699 err = 0; 4700 out_srcu: 4701 srcu_read_unlock(&kvm->srcu, srcu_idx); 4702 out: 4703 return err; 4704 4705 up_out: 4706 mmap_read_unlock(kvm->mm); 4707 goto out_srcu; 4708 } 4709 4710 /* 4711 * Must be called with kvm->arch.mmu_setup_lock held and 4712 * mmu_ready = 0 and no vcpus running. 4713 */ 4714 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4715 { 4716 if (nesting_enabled(kvm)) 4717 kvmhv_release_all_nested(kvm); 4718 kvmppc_rmap_reset(kvm); 4719 kvm->arch.process_table = 0; 4720 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4721 spin_lock(&kvm->mmu_lock); 4722 kvm->arch.radix = 0; 4723 spin_unlock(&kvm->mmu_lock); 4724 kvmppc_free_radix(kvm); 4725 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4726 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4727 return 0; 4728 } 4729 4730 /* 4731 * Must be called with kvm->arch.mmu_setup_lock held and 4732 * mmu_ready = 0 and no vcpus running. 4733 */ 4734 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4735 { 4736 int err; 4737 4738 err = kvmppc_init_vm_radix(kvm); 4739 if (err) 4740 return err; 4741 kvmppc_rmap_reset(kvm); 4742 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4743 spin_lock(&kvm->mmu_lock); 4744 kvm->arch.radix = 1; 4745 spin_unlock(&kvm->mmu_lock); 4746 kvmppc_free_hpt(&kvm->arch.hpt); 4747 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4748 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4749 return 0; 4750 } 4751 4752 #ifdef CONFIG_KVM_XICS 4753 /* 4754 * Allocate a per-core structure for managing state about which cores are 4755 * running in the host versus the guest and for exchanging data between 4756 * real mode KVM and CPU running in the host. 4757 * This is only done for the first VM. 4758 * The allocated structure stays even if all VMs have stopped. 4759 * It is only freed when the kvm-hv module is unloaded. 4760 * It's OK for this routine to fail, we just don't support host 4761 * core operations like redirecting H_IPI wakeups. 4762 */ 4763 void kvmppc_alloc_host_rm_ops(void) 4764 { 4765 struct kvmppc_host_rm_ops *ops; 4766 unsigned long l_ops; 4767 int cpu, core; 4768 int size; 4769 4770 /* Not the first time here ? */ 4771 if (kvmppc_host_rm_ops_hv != NULL) 4772 return; 4773 4774 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4775 if (!ops) 4776 return; 4777 4778 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4779 ops->rm_core = kzalloc(size, GFP_KERNEL); 4780 4781 if (!ops->rm_core) { 4782 kfree(ops); 4783 return; 4784 } 4785 4786 cpus_read_lock(); 4787 4788 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4789 if (!cpu_online(cpu)) 4790 continue; 4791 4792 core = cpu >> threads_shift; 4793 ops->rm_core[core].rm_state.in_host = 1; 4794 } 4795 4796 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4797 4798 /* 4799 * Make the contents of the kvmppc_host_rm_ops structure visible 4800 * to other CPUs before we assign it to the global variable. 4801 * Do an atomic assignment (no locks used here), but if someone 4802 * beats us to it, just free our copy and return. 4803 */ 4804 smp_wmb(); 4805 l_ops = (unsigned long) ops; 4806 4807 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4808 cpus_read_unlock(); 4809 kfree(ops->rm_core); 4810 kfree(ops); 4811 return; 4812 } 4813 4814 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4815 "ppc/kvm_book3s:prepare", 4816 kvmppc_set_host_core, 4817 kvmppc_clear_host_core); 4818 cpus_read_unlock(); 4819 } 4820 4821 void kvmppc_free_host_rm_ops(void) 4822 { 4823 if (kvmppc_host_rm_ops_hv) { 4824 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4825 kfree(kvmppc_host_rm_ops_hv->rm_core); 4826 kfree(kvmppc_host_rm_ops_hv); 4827 kvmppc_host_rm_ops_hv = NULL; 4828 } 4829 } 4830 #endif 4831 4832 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4833 { 4834 unsigned long lpcr, lpid; 4835 char buf[32]; 4836 int ret; 4837 4838 mutex_init(&kvm->arch.uvmem_lock); 4839 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 4840 mutex_init(&kvm->arch.mmu_setup_lock); 4841 4842 /* Allocate the guest's logical partition ID */ 4843 4844 lpid = kvmppc_alloc_lpid(); 4845 if ((long)lpid < 0) 4846 return -ENOMEM; 4847 kvm->arch.lpid = lpid; 4848 4849 kvmppc_alloc_host_rm_ops(); 4850 4851 kvmhv_vm_nested_init(kvm); 4852 4853 /* 4854 * Since we don't flush the TLB when tearing down a VM, 4855 * and this lpid might have previously been used, 4856 * make sure we flush on each core before running the new VM. 4857 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4858 * does this flush for us. 4859 */ 4860 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4861 cpumask_setall(&kvm->arch.need_tlb_flush); 4862 4863 /* Start out with the default set of hcalls enabled */ 4864 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4865 sizeof(kvm->arch.enabled_hcalls)); 4866 4867 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4868 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4869 4870 /* Init LPCR for virtual RMA mode */ 4871 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4872 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4873 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4874 lpcr &= LPCR_PECE | LPCR_LPES; 4875 } else { 4876 lpcr = 0; 4877 } 4878 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4879 LPCR_VPM0 | LPCR_VPM1; 4880 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4881 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4882 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4883 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4884 lpcr |= LPCR_ONL; 4885 /* 4886 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4887 * Set HVICE bit to enable hypervisor virtualization interrupts. 4888 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4889 * be unnecessary but better safe than sorry in case we re-enable 4890 * EE in HV mode with this LPCR still set) 4891 */ 4892 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4893 lpcr &= ~LPCR_VPM0; 4894 lpcr |= LPCR_HVICE | LPCR_HEIC; 4895 4896 /* 4897 * If xive is enabled, we route 0x500 interrupts directly 4898 * to the guest. 4899 */ 4900 if (xics_on_xive()) 4901 lpcr |= LPCR_LPES; 4902 } 4903 4904 /* 4905 * If the host uses radix, the guest starts out as radix. 4906 */ 4907 if (radix_enabled()) { 4908 kvm->arch.radix = 1; 4909 kvm->arch.mmu_ready = 1; 4910 lpcr &= ~LPCR_VPM1; 4911 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4912 ret = kvmppc_init_vm_radix(kvm); 4913 if (ret) { 4914 kvmppc_free_lpid(kvm->arch.lpid); 4915 return ret; 4916 } 4917 kvmppc_setup_partition_table(kvm); 4918 } 4919 4920 kvm->arch.lpcr = lpcr; 4921 4922 /* Initialization for future HPT resizes */ 4923 kvm->arch.resize_hpt = NULL; 4924 4925 /* 4926 * Work out how many sets the TLB has, for the use of 4927 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4928 */ 4929 if (radix_enabled()) 4930 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4931 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4932 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4933 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4934 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4935 else 4936 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4937 4938 /* 4939 * Track that we now have a HV mode VM active. This blocks secondary 4940 * CPU threads from coming online. 4941 * On POWER9, we only need to do this if the "indep_threads_mode" 4942 * module parameter has been set to N. 4943 */ 4944 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4945 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 4946 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 4947 kvm->arch.threads_indep = true; 4948 } else { 4949 kvm->arch.threads_indep = indep_threads_mode; 4950 } 4951 } 4952 if (!kvm->arch.threads_indep) 4953 kvm_hv_vm_activated(); 4954 4955 /* 4956 * Initialize smt_mode depending on processor. 4957 * POWER8 and earlier have to use "strict" threading, where 4958 * all vCPUs in a vcore have to run on the same (sub)core, 4959 * whereas on POWER9 the threads can each run a different 4960 * guest. 4961 */ 4962 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4963 kvm->arch.smt_mode = threads_per_subcore; 4964 else 4965 kvm->arch.smt_mode = 1; 4966 kvm->arch.emul_smt_mode = 1; 4967 4968 /* 4969 * Create a debugfs directory for the VM 4970 */ 4971 snprintf(buf, sizeof(buf), "vm%d", current->pid); 4972 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 4973 kvmppc_mmu_debugfs_init(kvm); 4974 if (radix_enabled()) 4975 kvmhv_radix_debugfs_init(kvm); 4976 4977 return 0; 4978 } 4979 4980 static void kvmppc_free_vcores(struct kvm *kvm) 4981 { 4982 long int i; 4983 4984 for (i = 0; i < KVM_MAX_VCORES; ++i) 4985 kfree(kvm->arch.vcores[i]); 4986 kvm->arch.online_vcores = 0; 4987 } 4988 4989 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 4990 { 4991 debugfs_remove_recursive(kvm->arch.debugfs_dir); 4992 4993 if (!kvm->arch.threads_indep) 4994 kvm_hv_vm_deactivated(); 4995 4996 kvmppc_free_vcores(kvm); 4997 4998 4999 if (kvm_is_radix(kvm)) 5000 kvmppc_free_radix(kvm); 5001 else 5002 kvmppc_free_hpt(&kvm->arch.hpt); 5003 5004 /* Perform global invalidation and return lpid to the pool */ 5005 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5006 if (nesting_enabled(kvm)) 5007 kvmhv_release_all_nested(kvm); 5008 kvm->arch.process_table = 0; 5009 if (kvm->arch.secure_guest) 5010 uv_svm_terminate(kvm->arch.lpid); 5011 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5012 } 5013 5014 kvmppc_free_lpid(kvm->arch.lpid); 5015 5016 kvmppc_free_pimap(kvm); 5017 } 5018 5019 /* We don't need to emulate any privileged instructions or dcbz */ 5020 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5021 unsigned int inst, int *advance) 5022 { 5023 return EMULATE_FAIL; 5024 } 5025 5026 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5027 ulong spr_val) 5028 { 5029 return EMULATE_FAIL; 5030 } 5031 5032 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5033 ulong *spr_val) 5034 { 5035 return EMULATE_FAIL; 5036 } 5037 5038 static int kvmppc_core_check_processor_compat_hv(void) 5039 { 5040 if (cpu_has_feature(CPU_FTR_HVMODE) && 5041 cpu_has_feature(CPU_FTR_ARCH_206)) 5042 return 0; 5043 5044 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5045 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5046 return 0; 5047 5048 return -EIO; 5049 } 5050 5051 #ifdef CONFIG_KVM_XICS 5052 5053 void kvmppc_free_pimap(struct kvm *kvm) 5054 { 5055 kfree(kvm->arch.pimap); 5056 } 5057 5058 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5059 { 5060 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5061 } 5062 5063 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5064 { 5065 struct irq_desc *desc; 5066 struct kvmppc_irq_map *irq_map; 5067 struct kvmppc_passthru_irqmap *pimap; 5068 struct irq_chip *chip; 5069 int i, rc = 0; 5070 5071 if (!kvm_irq_bypass) 5072 return 1; 5073 5074 desc = irq_to_desc(host_irq); 5075 if (!desc) 5076 return -EIO; 5077 5078 mutex_lock(&kvm->lock); 5079 5080 pimap = kvm->arch.pimap; 5081 if (pimap == NULL) { 5082 /* First call, allocate structure to hold IRQ map */ 5083 pimap = kvmppc_alloc_pimap(); 5084 if (pimap == NULL) { 5085 mutex_unlock(&kvm->lock); 5086 return -ENOMEM; 5087 } 5088 kvm->arch.pimap = pimap; 5089 } 5090 5091 /* 5092 * For now, we only support interrupts for which the EOI operation 5093 * is an OPAL call followed by a write to XIRR, since that's 5094 * what our real-mode EOI code does, or a XIVE interrupt 5095 */ 5096 chip = irq_data_get_irq_chip(&desc->irq_data); 5097 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 5098 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5099 host_irq, guest_gsi); 5100 mutex_unlock(&kvm->lock); 5101 return -ENOENT; 5102 } 5103 5104 /* 5105 * See if we already have an entry for this guest IRQ number. 5106 * If it's mapped to a hardware IRQ number, that's an error, 5107 * otherwise re-use this entry. 5108 */ 5109 for (i = 0; i < pimap->n_mapped; i++) { 5110 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5111 if (pimap->mapped[i].r_hwirq) { 5112 mutex_unlock(&kvm->lock); 5113 return -EINVAL; 5114 } 5115 break; 5116 } 5117 } 5118 5119 if (i == KVMPPC_PIRQ_MAPPED) { 5120 mutex_unlock(&kvm->lock); 5121 return -EAGAIN; /* table is full */ 5122 } 5123 5124 irq_map = &pimap->mapped[i]; 5125 5126 irq_map->v_hwirq = guest_gsi; 5127 irq_map->desc = desc; 5128 5129 /* 5130 * Order the above two stores before the next to serialize with 5131 * the KVM real mode handler. 5132 */ 5133 smp_wmb(); 5134 irq_map->r_hwirq = desc->irq_data.hwirq; 5135 5136 if (i == pimap->n_mapped) 5137 pimap->n_mapped++; 5138 5139 if (xics_on_xive()) 5140 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5141 else 5142 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5143 if (rc) 5144 irq_map->r_hwirq = 0; 5145 5146 mutex_unlock(&kvm->lock); 5147 5148 return 0; 5149 } 5150 5151 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5152 { 5153 struct irq_desc *desc; 5154 struct kvmppc_passthru_irqmap *pimap; 5155 int i, rc = 0; 5156 5157 if (!kvm_irq_bypass) 5158 return 0; 5159 5160 desc = irq_to_desc(host_irq); 5161 if (!desc) 5162 return -EIO; 5163 5164 mutex_lock(&kvm->lock); 5165 if (!kvm->arch.pimap) 5166 goto unlock; 5167 5168 pimap = kvm->arch.pimap; 5169 5170 for (i = 0; i < pimap->n_mapped; i++) { 5171 if (guest_gsi == pimap->mapped[i].v_hwirq) 5172 break; 5173 } 5174 5175 if (i == pimap->n_mapped) { 5176 mutex_unlock(&kvm->lock); 5177 return -ENODEV; 5178 } 5179 5180 if (xics_on_xive()) 5181 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5182 else 5183 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5184 5185 /* invalidate the entry (what do do on error from the above ?) */ 5186 pimap->mapped[i].r_hwirq = 0; 5187 5188 /* 5189 * We don't free this structure even when the count goes to 5190 * zero. The structure is freed when we destroy the VM. 5191 */ 5192 unlock: 5193 mutex_unlock(&kvm->lock); 5194 return rc; 5195 } 5196 5197 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5198 struct irq_bypass_producer *prod) 5199 { 5200 int ret = 0; 5201 struct kvm_kernel_irqfd *irqfd = 5202 container_of(cons, struct kvm_kernel_irqfd, consumer); 5203 5204 irqfd->producer = prod; 5205 5206 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5207 if (ret) 5208 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5209 prod->irq, irqfd->gsi, ret); 5210 5211 return ret; 5212 } 5213 5214 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5215 struct irq_bypass_producer *prod) 5216 { 5217 int ret; 5218 struct kvm_kernel_irqfd *irqfd = 5219 container_of(cons, struct kvm_kernel_irqfd, consumer); 5220 5221 irqfd->producer = NULL; 5222 5223 /* 5224 * When producer of consumer is unregistered, we change back to 5225 * default external interrupt handling mode - KVM real mode 5226 * will switch back to host. 5227 */ 5228 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5229 if (ret) 5230 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5231 prod->irq, irqfd->gsi, ret); 5232 } 5233 #endif 5234 5235 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5236 unsigned int ioctl, unsigned long arg) 5237 { 5238 struct kvm *kvm __maybe_unused = filp->private_data; 5239 void __user *argp = (void __user *)arg; 5240 long r; 5241 5242 switch (ioctl) { 5243 5244 case KVM_PPC_ALLOCATE_HTAB: { 5245 u32 htab_order; 5246 5247 r = -EFAULT; 5248 if (get_user(htab_order, (u32 __user *)argp)) 5249 break; 5250 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5251 if (r) 5252 break; 5253 r = 0; 5254 break; 5255 } 5256 5257 case KVM_PPC_GET_HTAB_FD: { 5258 struct kvm_get_htab_fd ghf; 5259 5260 r = -EFAULT; 5261 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5262 break; 5263 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5264 break; 5265 } 5266 5267 case KVM_PPC_RESIZE_HPT_PREPARE: { 5268 struct kvm_ppc_resize_hpt rhpt; 5269 5270 r = -EFAULT; 5271 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5272 break; 5273 5274 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5275 break; 5276 } 5277 5278 case KVM_PPC_RESIZE_HPT_COMMIT: { 5279 struct kvm_ppc_resize_hpt rhpt; 5280 5281 r = -EFAULT; 5282 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5283 break; 5284 5285 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5286 break; 5287 } 5288 5289 default: 5290 r = -ENOTTY; 5291 } 5292 5293 return r; 5294 } 5295 5296 /* 5297 * List of hcall numbers to enable by default. 5298 * For compatibility with old userspace, we enable by default 5299 * all hcalls that were implemented before the hcall-enabling 5300 * facility was added. Note this list should not include H_RTAS. 5301 */ 5302 static unsigned int default_hcall_list[] = { 5303 H_REMOVE, 5304 H_ENTER, 5305 H_READ, 5306 H_PROTECT, 5307 H_BULK_REMOVE, 5308 H_GET_TCE, 5309 H_PUT_TCE, 5310 H_SET_DABR, 5311 H_SET_XDABR, 5312 H_CEDE, 5313 H_PROD, 5314 H_CONFER, 5315 H_REGISTER_VPA, 5316 #ifdef CONFIG_KVM_XICS 5317 H_EOI, 5318 H_CPPR, 5319 H_IPI, 5320 H_IPOLL, 5321 H_XIRR, 5322 H_XIRR_X, 5323 #endif 5324 0 5325 }; 5326 5327 static void init_default_hcalls(void) 5328 { 5329 int i; 5330 unsigned int hcall; 5331 5332 for (i = 0; default_hcall_list[i]; ++i) { 5333 hcall = default_hcall_list[i]; 5334 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5335 __set_bit(hcall / 4, default_enabled_hcalls); 5336 } 5337 } 5338 5339 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5340 { 5341 unsigned long lpcr; 5342 int radix; 5343 int err; 5344 5345 /* If not on a POWER9, reject it */ 5346 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5347 return -ENODEV; 5348 5349 /* If any unknown flags set, reject it */ 5350 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5351 return -EINVAL; 5352 5353 /* GR (guest radix) bit in process_table field must match */ 5354 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5355 if (!!(cfg->process_table & PATB_GR) != radix) 5356 return -EINVAL; 5357 5358 /* Process table size field must be reasonable, i.e. <= 24 */ 5359 if ((cfg->process_table & PRTS_MASK) > 24) 5360 return -EINVAL; 5361 5362 /* We can change a guest to/from radix now, if the host is radix */ 5363 if (radix && !radix_enabled()) 5364 return -EINVAL; 5365 5366 /* If we're a nested hypervisor, we currently only support radix */ 5367 if (kvmhv_on_pseries() && !radix) 5368 return -EINVAL; 5369 5370 mutex_lock(&kvm->arch.mmu_setup_lock); 5371 if (radix != kvm_is_radix(kvm)) { 5372 if (kvm->arch.mmu_ready) { 5373 kvm->arch.mmu_ready = 0; 5374 /* order mmu_ready vs. vcpus_running */ 5375 smp_mb(); 5376 if (atomic_read(&kvm->arch.vcpus_running)) { 5377 kvm->arch.mmu_ready = 1; 5378 err = -EBUSY; 5379 goto out_unlock; 5380 } 5381 } 5382 if (radix) 5383 err = kvmppc_switch_mmu_to_radix(kvm); 5384 else 5385 err = kvmppc_switch_mmu_to_hpt(kvm); 5386 if (err) 5387 goto out_unlock; 5388 } 5389 5390 kvm->arch.process_table = cfg->process_table; 5391 kvmppc_setup_partition_table(kvm); 5392 5393 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5394 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5395 err = 0; 5396 5397 out_unlock: 5398 mutex_unlock(&kvm->arch.mmu_setup_lock); 5399 return err; 5400 } 5401 5402 static int kvmhv_enable_nested(struct kvm *kvm) 5403 { 5404 if (!nested) 5405 return -EPERM; 5406 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5407 return -ENODEV; 5408 5409 /* kvm == NULL means the caller is testing if the capability exists */ 5410 if (kvm) 5411 kvm->arch.nested_enable = true; 5412 return 0; 5413 } 5414 5415 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5416 int size) 5417 { 5418 int rc = -EINVAL; 5419 5420 if (kvmhv_vcpu_is_radix(vcpu)) { 5421 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5422 5423 if (rc > 0) 5424 rc = -EINVAL; 5425 } 5426 5427 /* For now quadrants are the only way to access nested guest memory */ 5428 if (rc && vcpu->arch.nested) 5429 rc = -EAGAIN; 5430 5431 return rc; 5432 } 5433 5434 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5435 int size) 5436 { 5437 int rc = -EINVAL; 5438 5439 if (kvmhv_vcpu_is_radix(vcpu)) { 5440 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5441 5442 if (rc > 0) 5443 rc = -EINVAL; 5444 } 5445 5446 /* For now quadrants are the only way to access nested guest memory */ 5447 if (rc && vcpu->arch.nested) 5448 rc = -EAGAIN; 5449 5450 return rc; 5451 } 5452 5453 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5454 { 5455 unpin_vpa(kvm, vpa); 5456 vpa->gpa = 0; 5457 vpa->pinned_addr = NULL; 5458 vpa->dirty = false; 5459 vpa->update_pending = 0; 5460 } 5461 5462 /* 5463 * Enable a guest to become a secure VM, or test whether 5464 * that could be enabled. 5465 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5466 * tested (kvm == NULL) or enabled (kvm != NULL). 5467 */ 5468 static int kvmhv_enable_svm(struct kvm *kvm) 5469 { 5470 if (!kvmppc_uvmem_available()) 5471 return -EINVAL; 5472 if (kvm) 5473 kvm->arch.svm_enabled = 1; 5474 return 0; 5475 } 5476 5477 /* 5478 * IOCTL handler to turn off secure mode of guest 5479 * 5480 * - Release all device pages 5481 * - Issue ucall to terminate the guest on the UV side 5482 * - Unpin the VPA pages. 5483 * - Reinit the partition scoped page tables 5484 */ 5485 static int kvmhv_svm_off(struct kvm *kvm) 5486 { 5487 struct kvm_vcpu *vcpu; 5488 int mmu_was_ready; 5489 int srcu_idx; 5490 int ret = 0; 5491 int i; 5492 5493 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5494 return ret; 5495 5496 mutex_lock(&kvm->arch.mmu_setup_lock); 5497 mmu_was_ready = kvm->arch.mmu_ready; 5498 if (kvm->arch.mmu_ready) { 5499 kvm->arch.mmu_ready = 0; 5500 /* order mmu_ready vs. vcpus_running */ 5501 smp_mb(); 5502 if (atomic_read(&kvm->arch.vcpus_running)) { 5503 kvm->arch.mmu_ready = 1; 5504 ret = -EBUSY; 5505 goto out; 5506 } 5507 } 5508 5509 srcu_idx = srcu_read_lock(&kvm->srcu); 5510 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5511 struct kvm_memory_slot *memslot; 5512 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5513 5514 if (!slots) 5515 continue; 5516 5517 kvm_for_each_memslot(memslot, slots) { 5518 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5519 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5520 } 5521 } 5522 srcu_read_unlock(&kvm->srcu, srcu_idx); 5523 5524 ret = uv_svm_terminate(kvm->arch.lpid); 5525 if (ret != U_SUCCESS) { 5526 ret = -EINVAL; 5527 goto out; 5528 } 5529 5530 /* 5531 * When secure guest is reset, all the guest pages are sent 5532 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5533 * chance to run and unpin their VPA pages. Unpinning of all 5534 * VPA pages is done here explicitly so that VPA pages 5535 * can be migrated to the secure side. 5536 * 5537 * This is required to for the secure SMP guest to reboot 5538 * correctly. 5539 */ 5540 kvm_for_each_vcpu(i, vcpu, kvm) { 5541 spin_lock(&vcpu->arch.vpa_update_lock); 5542 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5543 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5544 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5545 spin_unlock(&vcpu->arch.vpa_update_lock); 5546 } 5547 5548 kvmppc_setup_partition_table(kvm); 5549 kvm->arch.secure_guest = 0; 5550 kvm->arch.mmu_ready = mmu_was_ready; 5551 out: 5552 mutex_unlock(&kvm->arch.mmu_setup_lock); 5553 return ret; 5554 } 5555 5556 static struct kvmppc_ops kvm_ops_hv = { 5557 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5558 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5559 .get_one_reg = kvmppc_get_one_reg_hv, 5560 .set_one_reg = kvmppc_set_one_reg_hv, 5561 .vcpu_load = kvmppc_core_vcpu_load_hv, 5562 .vcpu_put = kvmppc_core_vcpu_put_hv, 5563 .inject_interrupt = kvmppc_inject_interrupt_hv, 5564 .set_msr = kvmppc_set_msr_hv, 5565 .vcpu_run = kvmppc_vcpu_run_hv, 5566 .vcpu_create = kvmppc_core_vcpu_create_hv, 5567 .vcpu_free = kvmppc_core_vcpu_free_hv, 5568 .check_requests = kvmppc_core_check_requests_hv, 5569 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5570 .flush_memslot = kvmppc_core_flush_memslot_hv, 5571 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5572 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5573 .unmap_hva_range = kvm_unmap_hva_range_hv, 5574 .age_hva = kvm_age_hva_hv, 5575 .test_age_hva = kvm_test_age_hva_hv, 5576 .set_spte_hva = kvm_set_spte_hva_hv, 5577 .free_memslot = kvmppc_core_free_memslot_hv, 5578 .init_vm = kvmppc_core_init_vm_hv, 5579 .destroy_vm = kvmppc_core_destroy_vm_hv, 5580 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5581 .emulate_op = kvmppc_core_emulate_op_hv, 5582 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5583 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5584 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5585 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5586 .hcall_implemented = kvmppc_hcall_impl_hv, 5587 #ifdef CONFIG_KVM_XICS 5588 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5589 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5590 #endif 5591 .configure_mmu = kvmhv_configure_mmu, 5592 .get_rmmu_info = kvmhv_get_rmmu_info, 5593 .set_smt_mode = kvmhv_set_smt_mode, 5594 .enable_nested = kvmhv_enable_nested, 5595 .load_from_eaddr = kvmhv_load_from_eaddr, 5596 .store_to_eaddr = kvmhv_store_to_eaddr, 5597 .enable_svm = kvmhv_enable_svm, 5598 .svm_off = kvmhv_svm_off, 5599 }; 5600 5601 static int kvm_init_subcore_bitmap(void) 5602 { 5603 int i, j; 5604 int nr_cores = cpu_nr_cores(); 5605 struct sibling_subcore_state *sibling_subcore_state; 5606 5607 for (i = 0; i < nr_cores; i++) { 5608 int first_cpu = i * threads_per_core; 5609 int node = cpu_to_node(first_cpu); 5610 5611 /* Ignore if it is already allocated. */ 5612 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5613 continue; 5614 5615 sibling_subcore_state = 5616 kzalloc_node(sizeof(struct sibling_subcore_state), 5617 GFP_KERNEL, node); 5618 if (!sibling_subcore_state) 5619 return -ENOMEM; 5620 5621 5622 for (j = 0; j < threads_per_core; j++) { 5623 int cpu = first_cpu + j; 5624 5625 paca_ptrs[cpu]->sibling_subcore_state = 5626 sibling_subcore_state; 5627 } 5628 } 5629 return 0; 5630 } 5631 5632 static int kvmppc_radix_possible(void) 5633 { 5634 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5635 } 5636 5637 static int kvmppc_book3s_init_hv(void) 5638 { 5639 int r; 5640 5641 if (!tlbie_capable) { 5642 pr_err("KVM-HV: Host does not support TLBIE\n"); 5643 return -ENODEV; 5644 } 5645 5646 /* 5647 * FIXME!! Do we need to check on all cpus ? 5648 */ 5649 r = kvmppc_core_check_processor_compat_hv(); 5650 if (r < 0) 5651 return -ENODEV; 5652 5653 r = kvmhv_nested_init(); 5654 if (r) 5655 return r; 5656 5657 r = kvm_init_subcore_bitmap(); 5658 if (r) 5659 return r; 5660 5661 /* 5662 * We need a way of accessing the XICS interrupt controller, 5663 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5664 * indirectly, via OPAL. 5665 */ 5666 #ifdef CONFIG_SMP 5667 if (!xics_on_xive() && !kvmhv_on_pseries() && 5668 !local_paca->kvm_hstate.xics_phys) { 5669 struct device_node *np; 5670 5671 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5672 if (!np) { 5673 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5674 return -ENODEV; 5675 } 5676 /* presence of intc confirmed - node can be dropped again */ 5677 of_node_put(np); 5678 } 5679 #endif 5680 5681 kvm_ops_hv.owner = THIS_MODULE; 5682 kvmppc_hv_ops = &kvm_ops_hv; 5683 5684 init_default_hcalls(); 5685 5686 init_vcore_lists(); 5687 5688 r = kvmppc_mmu_hv_init(); 5689 if (r) 5690 return r; 5691 5692 if (kvmppc_radix_possible()) 5693 r = kvmppc_radix_init(); 5694 5695 /* 5696 * POWER9 chips before version 2.02 can't have some threads in 5697 * HPT mode and some in radix mode on the same core. 5698 */ 5699 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5700 unsigned int pvr = mfspr(SPRN_PVR); 5701 if ((pvr >> 16) == PVR_POWER9 && 5702 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5703 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5704 no_mixing_hpt_and_radix = true; 5705 } 5706 5707 r = kvmppc_uvmem_init(); 5708 if (r < 0) 5709 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 5710 5711 return r; 5712 } 5713 5714 static void kvmppc_book3s_exit_hv(void) 5715 { 5716 kvmppc_uvmem_free(); 5717 kvmppc_free_host_rm_ops(); 5718 if (kvmppc_radix_possible()) 5719 kvmppc_radix_exit(); 5720 kvmppc_hv_ops = NULL; 5721 kvmhv_nested_exit(); 5722 } 5723 5724 module_init(kvmppc_book3s_init_hv); 5725 module_exit(kvmppc_book3s_exit_hv); 5726 MODULE_LICENSE("GPL"); 5727 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5728 MODULE_ALIAS("devname:kvm"); 5729