1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/io.h> 57 #include <asm/kvm_ppc.h> 58 #include <asm/kvm_book3s.h> 59 #include <asm/mmu_context.h> 60 #include <asm/lppaca.h> 61 #include <asm/processor.h> 62 #include <asm/cputhreads.h> 63 #include <asm/page.h> 64 #include <asm/hvcall.h> 65 #include <asm/switch_to.h> 66 #include <asm/smp.h> 67 #include <asm/dbell.h> 68 #include <asm/hmi.h> 69 #include <asm/pnv-pci.h> 70 #include <asm/mmu.h> 71 #include <asm/opal.h> 72 #include <asm/xics.h> 73 #include <asm/xive.h> 74 #include <asm/hw_breakpoint.h> 75 #include <asm/kvm_book3s_uvmem.h> 76 #include <asm/ultravisor.h> 77 78 #include "book3s.h" 79 80 #define CREATE_TRACE_POINTS 81 #include "trace_hv.h" 82 83 /* #define EXIT_DEBUG */ 84 /* #define EXIT_DEBUG_SIMPLE */ 85 /* #define EXIT_DEBUG_INT */ 86 87 /* Used to indicate that a guest page fault needs to be handled */ 88 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 89 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 90 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 91 92 /* Used as a "null" value for timebase values */ 93 #define TB_NIL (~(u64)0) 94 95 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 96 97 static int dynamic_mt_modes = 6; 98 module_param(dynamic_mt_modes, int, 0644); 99 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 100 static int target_smt_mode; 101 module_param(target_smt_mode, int, 0644); 102 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 103 104 static bool indep_threads_mode = true; 105 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 106 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 107 108 static bool one_vm_per_core; 109 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 110 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 111 112 #ifdef CONFIG_KVM_XICS 113 static struct kernel_param_ops module_param_ops = { 114 .set = param_set_int, 115 .get = param_get_int, 116 }; 117 118 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 119 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 120 121 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 122 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 123 #endif 124 125 /* If set, guests are allowed to create and control nested guests */ 126 static bool nested = true; 127 module_param(nested, bool, S_IRUGO | S_IWUSR); 128 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 129 130 static inline bool nesting_enabled(struct kvm *kvm) 131 { 132 return kvm->arch.nested_enable && kvm_is_radix(kvm); 133 } 134 135 /* If set, the threads on each CPU core have to be in the same MMU mode */ 136 static bool no_mixing_hpt_and_radix; 137 138 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 139 140 /* 141 * RWMR values for POWER8. These control the rate at which PURR 142 * and SPURR count and should be set according to the number of 143 * online threads in the vcore being run. 144 */ 145 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 146 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 147 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 148 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 149 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 150 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 151 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 153 154 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 155 RWMR_RPA_P8_1THREAD, 156 RWMR_RPA_P8_1THREAD, 157 RWMR_RPA_P8_2THREAD, 158 RWMR_RPA_P8_3THREAD, 159 RWMR_RPA_P8_4THREAD, 160 RWMR_RPA_P8_5THREAD, 161 RWMR_RPA_P8_6THREAD, 162 RWMR_RPA_P8_7THREAD, 163 RWMR_RPA_P8_8THREAD, 164 }; 165 166 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 167 int *ip) 168 { 169 int i = *ip; 170 struct kvm_vcpu *vcpu; 171 172 while (++i < MAX_SMT_THREADS) { 173 vcpu = READ_ONCE(vc->runnable_threads[i]); 174 if (vcpu) { 175 *ip = i; 176 return vcpu; 177 } 178 } 179 return NULL; 180 } 181 182 /* Used to traverse the list of runnable threads for a given vcore */ 183 #define for_each_runnable_thread(i, vcpu, vc) \ 184 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 185 186 static bool kvmppc_ipi_thread(int cpu) 187 { 188 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 189 190 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 191 if (kvmhv_on_pseries()) 192 return false; 193 194 /* On POWER9 we can use msgsnd to IPI any cpu */ 195 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 196 msg |= get_hard_smp_processor_id(cpu); 197 smp_mb(); 198 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 199 return true; 200 } 201 202 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 203 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 204 preempt_disable(); 205 if (cpu_first_thread_sibling(cpu) == 206 cpu_first_thread_sibling(smp_processor_id())) { 207 msg |= cpu_thread_in_core(cpu); 208 smp_mb(); 209 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 210 preempt_enable(); 211 return true; 212 } 213 preempt_enable(); 214 } 215 216 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 217 if (cpu >= 0 && cpu < nr_cpu_ids) { 218 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 219 xics_wake_cpu(cpu); 220 return true; 221 } 222 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 223 return true; 224 } 225 #endif 226 227 return false; 228 } 229 230 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 231 { 232 int cpu; 233 struct swait_queue_head *wqp; 234 235 wqp = kvm_arch_vcpu_wq(vcpu); 236 if (swq_has_sleeper(wqp)) { 237 swake_up_one(wqp); 238 ++vcpu->stat.halt_wakeup; 239 } 240 241 cpu = READ_ONCE(vcpu->arch.thread_cpu); 242 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 243 return; 244 245 /* CPU points to the first thread of the core */ 246 cpu = vcpu->cpu; 247 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 248 smp_send_reschedule(cpu); 249 } 250 251 /* 252 * We use the vcpu_load/put functions to measure stolen time. 253 * Stolen time is counted as time when either the vcpu is able to 254 * run as part of a virtual core, but the task running the vcore 255 * is preempted or sleeping, or when the vcpu needs something done 256 * in the kernel by the task running the vcpu, but that task is 257 * preempted or sleeping. Those two things have to be counted 258 * separately, since one of the vcpu tasks will take on the job 259 * of running the core, and the other vcpu tasks in the vcore will 260 * sleep waiting for it to do that, but that sleep shouldn't count 261 * as stolen time. 262 * 263 * Hence we accumulate stolen time when the vcpu can run as part of 264 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 265 * needs its task to do other things in the kernel (for example, 266 * service a page fault) in busy_stolen. We don't accumulate 267 * stolen time for a vcore when it is inactive, or for a vcpu 268 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 269 * a misnomer; it means that the vcpu task is not executing in 270 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 271 * the kernel. We don't have any way of dividing up that time 272 * between time that the vcpu is genuinely stopped, time that 273 * the task is actively working on behalf of the vcpu, and time 274 * that the task is preempted, so we don't count any of it as 275 * stolen. 276 * 277 * Updates to busy_stolen are protected by arch.tbacct_lock; 278 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 279 * lock. The stolen times are measured in units of timebase ticks. 280 * (Note that the != TB_NIL checks below are purely defensive; 281 * they should never fail.) 282 */ 283 284 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 285 { 286 unsigned long flags; 287 288 spin_lock_irqsave(&vc->stoltb_lock, flags); 289 vc->preempt_tb = mftb(); 290 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 291 } 292 293 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 294 { 295 unsigned long flags; 296 297 spin_lock_irqsave(&vc->stoltb_lock, flags); 298 if (vc->preempt_tb != TB_NIL) { 299 vc->stolen_tb += mftb() - vc->preempt_tb; 300 vc->preempt_tb = TB_NIL; 301 } 302 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 303 } 304 305 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 306 { 307 struct kvmppc_vcore *vc = vcpu->arch.vcore; 308 unsigned long flags; 309 310 /* 311 * We can test vc->runner without taking the vcore lock, 312 * because only this task ever sets vc->runner to this 313 * vcpu, and once it is set to this vcpu, only this task 314 * ever sets it to NULL. 315 */ 316 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 317 kvmppc_core_end_stolen(vc); 318 319 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 320 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 321 vcpu->arch.busy_preempt != TB_NIL) { 322 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 323 vcpu->arch.busy_preempt = TB_NIL; 324 } 325 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 326 } 327 328 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 329 { 330 struct kvmppc_vcore *vc = vcpu->arch.vcore; 331 unsigned long flags; 332 333 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 334 kvmppc_core_start_stolen(vc); 335 336 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 337 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 338 vcpu->arch.busy_preempt = mftb(); 339 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 340 } 341 342 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 343 { 344 vcpu->arch.pvr = pvr; 345 } 346 347 /* Dummy value used in computing PCR value below */ 348 #define PCR_ARCH_300 (PCR_ARCH_207 << 1) 349 350 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 351 { 352 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 353 struct kvmppc_vcore *vc = vcpu->arch.vcore; 354 355 /* We can (emulate) our own architecture version and anything older */ 356 if (cpu_has_feature(CPU_FTR_ARCH_300)) 357 host_pcr_bit = PCR_ARCH_300; 358 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 359 host_pcr_bit = PCR_ARCH_207; 360 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 361 host_pcr_bit = PCR_ARCH_206; 362 else 363 host_pcr_bit = PCR_ARCH_205; 364 365 /* Determine lowest PCR bit needed to run guest in given PVR level */ 366 guest_pcr_bit = host_pcr_bit; 367 if (arch_compat) { 368 switch (arch_compat) { 369 case PVR_ARCH_205: 370 guest_pcr_bit = PCR_ARCH_205; 371 break; 372 case PVR_ARCH_206: 373 case PVR_ARCH_206p: 374 guest_pcr_bit = PCR_ARCH_206; 375 break; 376 case PVR_ARCH_207: 377 guest_pcr_bit = PCR_ARCH_207; 378 break; 379 case PVR_ARCH_300: 380 guest_pcr_bit = PCR_ARCH_300; 381 break; 382 default: 383 return -EINVAL; 384 } 385 } 386 387 /* Check requested PCR bits don't exceed our capabilities */ 388 if (guest_pcr_bit > host_pcr_bit) 389 return -EINVAL; 390 391 spin_lock(&vc->lock); 392 vc->arch_compat = arch_compat; 393 /* 394 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 395 * Also set all reserved PCR bits 396 */ 397 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 398 spin_unlock(&vc->lock); 399 400 return 0; 401 } 402 403 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 404 { 405 int r; 406 407 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 408 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 409 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 410 for (r = 0; r < 16; ++r) 411 pr_err("r%2d = %.16lx r%d = %.16lx\n", 412 r, kvmppc_get_gpr(vcpu, r), 413 r+16, kvmppc_get_gpr(vcpu, r+16)); 414 pr_err("ctr = %.16lx lr = %.16lx\n", 415 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 416 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 417 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 418 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 419 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 420 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 421 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 422 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 423 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 424 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 425 pr_err("fault dar = %.16lx dsisr = %.8x\n", 426 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 427 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 428 for (r = 0; r < vcpu->arch.slb_max; ++r) 429 pr_err(" ESID = %.16llx VSID = %.16llx\n", 430 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 431 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 432 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 433 vcpu->arch.last_inst); 434 } 435 436 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 437 { 438 return kvm_get_vcpu_by_id(kvm, id); 439 } 440 441 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 442 { 443 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 444 vpa->yield_count = cpu_to_be32(1); 445 } 446 447 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 448 unsigned long addr, unsigned long len) 449 { 450 /* check address is cacheline aligned */ 451 if (addr & (L1_CACHE_BYTES - 1)) 452 return -EINVAL; 453 spin_lock(&vcpu->arch.vpa_update_lock); 454 if (v->next_gpa != addr || v->len != len) { 455 v->next_gpa = addr; 456 v->len = addr ? len : 0; 457 v->update_pending = 1; 458 } 459 spin_unlock(&vcpu->arch.vpa_update_lock); 460 return 0; 461 } 462 463 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 464 struct reg_vpa { 465 u32 dummy; 466 union { 467 __be16 hword; 468 __be32 word; 469 } length; 470 }; 471 472 static int vpa_is_registered(struct kvmppc_vpa *vpap) 473 { 474 if (vpap->update_pending) 475 return vpap->next_gpa != 0; 476 return vpap->pinned_addr != NULL; 477 } 478 479 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 480 unsigned long flags, 481 unsigned long vcpuid, unsigned long vpa) 482 { 483 struct kvm *kvm = vcpu->kvm; 484 unsigned long len, nb; 485 void *va; 486 struct kvm_vcpu *tvcpu; 487 int err; 488 int subfunc; 489 struct kvmppc_vpa *vpap; 490 491 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 492 if (!tvcpu) 493 return H_PARAMETER; 494 495 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 496 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 497 subfunc == H_VPA_REG_SLB) { 498 /* Registering new area - address must be cache-line aligned */ 499 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 500 return H_PARAMETER; 501 502 /* convert logical addr to kernel addr and read length */ 503 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 504 if (va == NULL) 505 return H_PARAMETER; 506 if (subfunc == H_VPA_REG_VPA) 507 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 508 else 509 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 510 kvmppc_unpin_guest_page(kvm, va, vpa, false); 511 512 /* Check length */ 513 if (len > nb || len < sizeof(struct reg_vpa)) 514 return H_PARAMETER; 515 } else { 516 vpa = 0; 517 len = 0; 518 } 519 520 err = H_PARAMETER; 521 vpap = NULL; 522 spin_lock(&tvcpu->arch.vpa_update_lock); 523 524 switch (subfunc) { 525 case H_VPA_REG_VPA: /* register VPA */ 526 /* 527 * The size of our lppaca is 1kB because of the way we align 528 * it for the guest to avoid crossing a 4kB boundary. We only 529 * use 640 bytes of the structure though, so we should accept 530 * clients that set a size of 640. 531 */ 532 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 533 if (len < sizeof(struct lppaca)) 534 break; 535 vpap = &tvcpu->arch.vpa; 536 err = 0; 537 break; 538 539 case H_VPA_REG_DTL: /* register DTL */ 540 if (len < sizeof(struct dtl_entry)) 541 break; 542 len -= len % sizeof(struct dtl_entry); 543 544 /* Check that they have previously registered a VPA */ 545 err = H_RESOURCE; 546 if (!vpa_is_registered(&tvcpu->arch.vpa)) 547 break; 548 549 vpap = &tvcpu->arch.dtl; 550 err = 0; 551 break; 552 553 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 554 /* Check that they have previously registered a VPA */ 555 err = H_RESOURCE; 556 if (!vpa_is_registered(&tvcpu->arch.vpa)) 557 break; 558 559 vpap = &tvcpu->arch.slb_shadow; 560 err = 0; 561 break; 562 563 case H_VPA_DEREG_VPA: /* deregister VPA */ 564 /* Check they don't still have a DTL or SLB buf registered */ 565 err = H_RESOURCE; 566 if (vpa_is_registered(&tvcpu->arch.dtl) || 567 vpa_is_registered(&tvcpu->arch.slb_shadow)) 568 break; 569 570 vpap = &tvcpu->arch.vpa; 571 err = 0; 572 break; 573 574 case H_VPA_DEREG_DTL: /* deregister DTL */ 575 vpap = &tvcpu->arch.dtl; 576 err = 0; 577 break; 578 579 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 580 vpap = &tvcpu->arch.slb_shadow; 581 err = 0; 582 break; 583 } 584 585 if (vpap) { 586 vpap->next_gpa = vpa; 587 vpap->len = len; 588 vpap->update_pending = 1; 589 } 590 591 spin_unlock(&tvcpu->arch.vpa_update_lock); 592 593 return err; 594 } 595 596 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 597 { 598 struct kvm *kvm = vcpu->kvm; 599 void *va; 600 unsigned long nb; 601 unsigned long gpa; 602 603 /* 604 * We need to pin the page pointed to by vpap->next_gpa, 605 * but we can't call kvmppc_pin_guest_page under the lock 606 * as it does get_user_pages() and down_read(). So we 607 * have to drop the lock, pin the page, then get the lock 608 * again and check that a new area didn't get registered 609 * in the meantime. 610 */ 611 for (;;) { 612 gpa = vpap->next_gpa; 613 spin_unlock(&vcpu->arch.vpa_update_lock); 614 va = NULL; 615 nb = 0; 616 if (gpa) 617 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 618 spin_lock(&vcpu->arch.vpa_update_lock); 619 if (gpa == vpap->next_gpa) 620 break; 621 /* sigh... unpin that one and try again */ 622 if (va) 623 kvmppc_unpin_guest_page(kvm, va, gpa, false); 624 } 625 626 vpap->update_pending = 0; 627 if (va && nb < vpap->len) { 628 /* 629 * If it's now too short, it must be that userspace 630 * has changed the mappings underlying guest memory, 631 * so unregister the region. 632 */ 633 kvmppc_unpin_guest_page(kvm, va, gpa, false); 634 va = NULL; 635 } 636 if (vpap->pinned_addr) 637 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 638 vpap->dirty); 639 vpap->gpa = gpa; 640 vpap->pinned_addr = va; 641 vpap->dirty = false; 642 if (va) 643 vpap->pinned_end = va + vpap->len; 644 } 645 646 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 647 { 648 if (!(vcpu->arch.vpa.update_pending || 649 vcpu->arch.slb_shadow.update_pending || 650 vcpu->arch.dtl.update_pending)) 651 return; 652 653 spin_lock(&vcpu->arch.vpa_update_lock); 654 if (vcpu->arch.vpa.update_pending) { 655 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 656 if (vcpu->arch.vpa.pinned_addr) 657 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 658 } 659 if (vcpu->arch.dtl.update_pending) { 660 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 661 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 662 vcpu->arch.dtl_index = 0; 663 } 664 if (vcpu->arch.slb_shadow.update_pending) 665 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 666 spin_unlock(&vcpu->arch.vpa_update_lock); 667 } 668 669 /* 670 * Return the accumulated stolen time for the vcore up until `now'. 671 * The caller should hold the vcore lock. 672 */ 673 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 674 { 675 u64 p; 676 unsigned long flags; 677 678 spin_lock_irqsave(&vc->stoltb_lock, flags); 679 p = vc->stolen_tb; 680 if (vc->vcore_state != VCORE_INACTIVE && 681 vc->preempt_tb != TB_NIL) 682 p += now - vc->preempt_tb; 683 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 684 return p; 685 } 686 687 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 688 struct kvmppc_vcore *vc) 689 { 690 struct dtl_entry *dt; 691 struct lppaca *vpa; 692 unsigned long stolen; 693 unsigned long core_stolen; 694 u64 now; 695 unsigned long flags; 696 697 dt = vcpu->arch.dtl_ptr; 698 vpa = vcpu->arch.vpa.pinned_addr; 699 now = mftb(); 700 core_stolen = vcore_stolen_time(vc, now); 701 stolen = core_stolen - vcpu->arch.stolen_logged; 702 vcpu->arch.stolen_logged = core_stolen; 703 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 704 stolen += vcpu->arch.busy_stolen; 705 vcpu->arch.busy_stolen = 0; 706 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 707 if (!dt || !vpa) 708 return; 709 memset(dt, 0, sizeof(struct dtl_entry)); 710 dt->dispatch_reason = 7; 711 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 712 dt->timebase = cpu_to_be64(now + vc->tb_offset); 713 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 714 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 715 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 716 ++dt; 717 if (dt == vcpu->arch.dtl.pinned_end) 718 dt = vcpu->arch.dtl.pinned_addr; 719 vcpu->arch.dtl_ptr = dt; 720 /* order writing *dt vs. writing vpa->dtl_idx */ 721 smp_wmb(); 722 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 723 vcpu->arch.dtl.dirty = true; 724 } 725 726 /* See if there is a doorbell interrupt pending for a vcpu */ 727 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 728 { 729 int thr; 730 struct kvmppc_vcore *vc; 731 732 if (vcpu->arch.doorbell_request) 733 return true; 734 /* 735 * Ensure that the read of vcore->dpdes comes after the read 736 * of vcpu->doorbell_request. This barrier matches the 737 * smp_wmb() in kvmppc_guest_entry_inject(). 738 */ 739 smp_rmb(); 740 vc = vcpu->arch.vcore; 741 thr = vcpu->vcpu_id - vc->first_vcpuid; 742 return !!(vc->dpdes & (1 << thr)); 743 } 744 745 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 746 { 747 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 748 return true; 749 if ((!vcpu->arch.vcore->arch_compat) && 750 cpu_has_feature(CPU_FTR_ARCH_207S)) 751 return true; 752 return false; 753 } 754 755 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 756 unsigned long resource, unsigned long value1, 757 unsigned long value2) 758 { 759 switch (resource) { 760 case H_SET_MODE_RESOURCE_SET_CIABR: 761 if (!kvmppc_power8_compatible(vcpu)) 762 return H_P2; 763 if (value2) 764 return H_P4; 765 if (mflags) 766 return H_UNSUPPORTED_FLAG_START; 767 /* Guests can't breakpoint the hypervisor */ 768 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 769 return H_P3; 770 vcpu->arch.ciabr = value1; 771 return H_SUCCESS; 772 case H_SET_MODE_RESOURCE_SET_DAWR: 773 if (!kvmppc_power8_compatible(vcpu)) 774 return H_P2; 775 if (!ppc_breakpoint_available()) 776 return H_P2; 777 if (mflags) 778 return H_UNSUPPORTED_FLAG_START; 779 if (value2 & DABRX_HYP) 780 return H_P4; 781 vcpu->arch.dawr = value1; 782 vcpu->arch.dawrx = value2; 783 return H_SUCCESS; 784 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 785 /* KVM does not support mflags=2 (AIL=2) */ 786 if (mflags != 0 && mflags != 3) 787 return H_UNSUPPORTED_FLAG_START; 788 return H_TOO_HARD; 789 default: 790 return H_TOO_HARD; 791 } 792 } 793 794 /* Copy guest memory in place - must reside within a single memslot */ 795 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 796 unsigned long len) 797 { 798 struct kvm_memory_slot *to_memslot = NULL; 799 struct kvm_memory_slot *from_memslot = NULL; 800 unsigned long to_addr, from_addr; 801 int r; 802 803 /* Get HPA for from address */ 804 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 805 if (!from_memslot) 806 return -EFAULT; 807 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 808 << PAGE_SHIFT)) 809 return -EINVAL; 810 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 811 if (kvm_is_error_hva(from_addr)) 812 return -EFAULT; 813 from_addr |= (from & (PAGE_SIZE - 1)); 814 815 /* Get HPA for to address */ 816 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 817 if (!to_memslot) 818 return -EFAULT; 819 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 820 << PAGE_SHIFT)) 821 return -EINVAL; 822 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 823 if (kvm_is_error_hva(to_addr)) 824 return -EFAULT; 825 to_addr |= (to & (PAGE_SIZE - 1)); 826 827 /* Perform copy */ 828 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 829 len); 830 if (r) 831 return -EFAULT; 832 mark_page_dirty(kvm, to >> PAGE_SHIFT); 833 return 0; 834 } 835 836 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 837 unsigned long dest, unsigned long src) 838 { 839 u64 pg_sz = SZ_4K; /* 4K page size */ 840 u64 pg_mask = SZ_4K - 1; 841 int ret; 842 843 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 844 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 845 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 846 return H_PARAMETER; 847 848 /* dest (and src if copy_page flag set) must be page aligned */ 849 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 850 return H_PARAMETER; 851 852 /* zero and/or copy the page as determined by the flags */ 853 if (flags & H_COPY_PAGE) { 854 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 855 if (ret < 0) 856 return H_PARAMETER; 857 } else if (flags & H_ZERO_PAGE) { 858 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 859 if (ret < 0) 860 return H_PARAMETER; 861 } 862 863 /* We can ignore the remaining flags */ 864 865 return H_SUCCESS; 866 } 867 868 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 869 { 870 struct kvmppc_vcore *vcore = target->arch.vcore; 871 872 /* 873 * We expect to have been called by the real mode handler 874 * (kvmppc_rm_h_confer()) which would have directly returned 875 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 876 * have useful work to do and should not confer) so we don't 877 * recheck that here. 878 */ 879 880 spin_lock(&vcore->lock); 881 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 882 vcore->vcore_state != VCORE_INACTIVE && 883 vcore->runner) 884 target = vcore->runner; 885 spin_unlock(&vcore->lock); 886 887 return kvm_vcpu_yield_to(target); 888 } 889 890 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 891 { 892 int yield_count = 0; 893 struct lppaca *lppaca; 894 895 spin_lock(&vcpu->arch.vpa_update_lock); 896 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 897 if (lppaca) 898 yield_count = be32_to_cpu(lppaca->yield_count); 899 spin_unlock(&vcpu->arch.vpa_update_lock); 900 return yield_count; 901 } 902 903 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 904 { 905 unsigned long req = kvmppc_get_gpr(vcpu, 3); 906 unsigned long target, ret = H_SUCCESS; 907 int yield_count; 908 struct kvm_vcpu *tvcpu; 909 int idx, rc; 910 911 if (req <= MAX_HCALL_OPCODE && 912 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 913 return RESUME_HOST; 914 915 switch (req) { 916 case H_CEDE: 917 break; 918 case H_PROD: 919 target = kvmppc_get_gpr(vcpu, 4); 920 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 921 if (!tvcpu) { 922 ret = H_PARAMETER; 923 break; 924 } 925 tvcpu->arch.prodded = 1; 926 smp_mb(); 927 if (tvcpu->arch.ceded) 928 kvmppc_fast_vcpu_kick_hv(tvcpu); 929 break; 930 case H_CONFER: 931 target = kvmppc_get_gpr(vcpu, 4); 932 if (target == -1) 933 break; 934 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 935 if (!tvcpu) { 936 ret = H_PARAMETER; 937 break; 938 } 939 yield_count = kvmppc_get_gpr(vcpu, 5); 940 if (kvmppc_get_yield_count(tvcpu) != yield_count) 941 break; 942 kvm_arch_vcpu_yield_to(tvcpu); 943 break; 944 case H_REGISTER_VPA: 945 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 946 kvmppc_get_gpr(vcpu, 5), 947 kvmppc_get_gpr(vcpu, 6)); 948 break; 949 case H_RTAS: 950 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 951 return RESUME_HOST; 952 953 idx = srcu_read_lock(&vcpu->kvm->srcu); 954 rc = kvmppc_rtas_hcall(vcpu); 955 srcu_read_unlock(&vcpu->kvm->srcu, idx); 956 957 if (rc == -ENOENT) 958 return RESUME_HOST; 959 else if (rc == 0) 960 break; 961 962 /* Send the error out to userspace via KVM_RUN */ 963 return rc; 964 case H_LOGICAL_CI_LOAD: 965 ret = kvmppc_h_logical_ci_load(vcpu); 966 if (ret == H_TOO_HARD) 967 return RESUME_HOST; 968 break; 969 case H_LOGICAL_CI_STORE: 970 ret = kvmppc_h_logical_ci_store(vcpu); 971 if (ret == H_TOO_HARD) 972 return RESUME_HOST; 973 break; 974 case H_SET_MODE: 975 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 976 kvmppc_get_gpr(vcpu, 5), 977 kvmppc_get_gpr(vcpu, 6), 978 kvmppc_get_gpr(vcpu, 7)); 979 if (ret == H_TOO_HARD) 980 return RESUME_HOST; 981 break; 982 case H_XIRR: 983 case H_CPPR: 984 case H_EOI: 985 case H_IPI: 986 case H_IPOLL: 987 case H_XIRR_X: 988 if (kvmppc_xics_enabled(vcpu)) { 989 if (xics_on_xive()) { 990 ret = H_NOT_AVAILABLE; 991 return RESUME_GUEST; 992 } 993 ret = kvmppc_xics_hcall(vcpu, req); 994 break; 995 } 996 return RESUME_HOST; 997 case H_SET_DABR: 998 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 999 break; 1000 case H_SET_XDABR: 1001 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1002 kvmppc_get_gpr(vcpu, 5)); 1003 break; 1004 #ifdef CONFIG_SPAPR_TCE_IOMMU 1005 case H_GET_TCE: 1006 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1007 kvmppc_get_gpr(vcpu, 5)); 1008 if (ret == H_TOO_HARD) 1009 return RESUME_HOST; 1010 break; 1011 case H_PUT_TCE: 1012 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1013 kvmppc_get_gpr(vcpu, 5), 1014 kvmppc_get_gpr(vcpu, 6)); 1015 if (ret == H_TOO_HARD) 1016 return RESUME_HOST; 1017 break; 1018 case H_PUT_TCE_INDIRECT: 1019 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1020 kvmppc_get_gpr(vcpu, 5), 1021 kvmppc_get_gpr(vcpu, 6), 1022 kvmppc_get_gpr(vcpu, 7)); 1023 if (ret == H_TOO_HARD) 1024 return RESUME_HOST; 1025 break; 1026 case H_STUFF_TCE: 1027 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1028 kvmppc_get_gpr(vcpu, 5), 1029 kvmppc_get_gpr(vcpu, 6), 1030 kvmppc_get_gpr(vcpu, 7)); 1031 if (ret == H_TOO_HARD) 1032 return RESUME_HOST; 1033 break; 1034 #endif 1035 case H_RANDOM: 1036 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1037 ret = H_HARDWARE; 1038 break; 1039 1040 case H_SET_PARTITION_TABLE: 1041 ret = H_FUNCTION; 1042 if (nesting_enabled(vcpu->kvm)) 1043 ret = kvmhv_set_partition_table(vcpu); 1044 break; 1045 case H_ENTER_NESTED: 1046 ret = H_FUNCTION; 1047 if (!nesting_enabled(vcpu->kvm)) 1048 break; 1049 ret = kvmhv_enter_nested_guest(vcpu); 1050 if (ret == H_INTERRUPT) { 1051 kvmppc_set_gpr(vcpu, 3, 0); 1052 vcpu->arch.hcall_needed = 0; 1053 return -EINTR; 1054 } else if (ret == H_TOO_HARD) { 1055 kvmppc_set_gpr(vcpu, 3, 0); 1056 vcpu->arch.hcall_needed = 0; 1057 return RESUME_HOST; 1058 } 1059 break; 1060 case H_TLB_INVALIDATE: 1061 ret = H_FUNCTION; 1062 if (nesting_enabled(vcpu->kvm)) 1063 ret = kvmhv_do_nested_tlbie(vcpu); 1064 break; 1065 case H_COPY_TOFROM_GUEST: 1066 ret = H_FUNCTION; 1067 if (nesting_enabled(vcpu->kvm)) 1068 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1069 break; 1070 case H_PAGE_INIT: 1071 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1072 kvmppc_get_gpr(vcpu, 5), 1073 kvmppc_get_gpr(vcpu, 6)); 1074 break; 1075 case H_SVM_PAGE_IN: 1076 ret = H_UNSUPPORTED; 1077 if (kvmppc_get_srr1(vcpu) & MSR_S) 1078 ret = kvmppc_h_svm_page_in(vcpu->kvm, 1079 kvmppc_get_gpr(vcpu, 4), 1080 kvmppc_get_gpr(vcpu, 5), 1081 kvmppc_get_gpr(vcpu, 6)); 1082 break; 1083 case H_SVM_PAGE_OUT: 1084 ret = H_UNSUPPORTED; 1085 if (kvmppc_get_srr1(vcpu) & MSR_S) 1086 ret = kvmppc_h_svm_page_out(vcpu->kvm, 1087 kvmppc_get_gpr(vcpu, 4), 1088 kvmppc_get_gpr(vcpu, 5), 1089 kvmppc_get_gpr(vcpu, 6)); 1090 break; 1091 case H_SVM_INIT_START: 1092 ret = H_UNSUPPORTED; 1093 if (kvmppc_get_srr1(vcpu) & MSR_S) 1094 ret = kvmppc_h_svm_init_start(vcpu->kvm); 1095 break; 1096 case H_SVM_INIT_DONE: 1097 ret = H_UNSUPPORTED; 1098 if (kvmppc_get_srr1(vcpu) & MSR_S) 1099 ret = kvmppc_h_svm_init_done(vcpu->kvm); 1100 break; 1101 case H_SVM_INIT_ABORT: 1102 ret = H_UNSUPPORTED; 1103 if (kvmppc_get_srr1(vcpu) & MSR_S) 1104 ret = kvmppc_h_svm_init_abort(vcpu->kvm); 1105 break; 1106 1107 default: 1108 return RESUME_HOST; 1109 } 1110 kvmppc_set_gpr(vcpu, 3, ret); 1111 vcpu->arch.hcall_needed = 0; 1112 return RESUME_GUEST; 1113 } 1114 1115 /* 1116 * Handle H_CEDE in the nested virtualization case where we haven't 1117 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1118 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1119 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1120 */ 1121 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1122 { 1123 vcpu->arch.shregs.msr |= MSR_EE; 1124 vcpu->arch.ceded = 1; 1125 smp_mb(); 1126 if (vcpu->arch.prodded) { 1127 vcpu->arch.prodded = 0; 1128 smp_mb(); 1129 vcpu->arch.ceded = 0; 1130 } 1131 } 1132 1133 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1134 { 1135 switch (cmd) { 1136 case H_CEDE: 1137 case H_PROD: 1138 case H_CONFER: 1139 case H_REGISTER_VPA: 1140 case H_SET_MODE: 1141 case H_LOGICAL_CI_LOAD: 1142 case H_LOGICAL_CI_STORE: 1143 #ifdef CONFIG_KVM_XICS 1144 case H_XIRR: 1145 case H_CPPR: 1146 case H_EOI: 1147 case H_IPI: 1148 case H_IPOLL: 1149 case H_XIRR_X: 1150 #endif 1151 case H_PAGE_INIT: 1152 return 1; 1153 } 1154 1155 /* See if it's in the real-mode table */ 1156 return kvmppc_hcall_impl_hv_realmode(cmd); 1157 } 1158 1159 static int kvmppc_emulate_debug_inst(struct kvm_run *run, 1160 struct kvm_vcpu *vcpu) 1161 { 1162 u32 last_inst; 1163 1164 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1165 EMULATE_DONE) { 1166 /* 1167 * Fetch failed, so return to guest and 1168 * try executing it again. 1169 */ 1170 return RESUME_GUEST; 1171 } 1172 1173 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1174 run->exit_reason = KVM_EXIT_DEBUG; 1175 run->debug.arch.address = kvmppc_get_pc(vcpu); 1176 return RESUME_HOST; 1177 } else { 1178 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1179 return RESUME_GUEST; 1180 } 1181 } 1182 1183 static void do_nothing(void *x) 1184 { 1185 } 1186 1187 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1188 { 1189 int thr, cpu, pcpu, nthreads; 1190 struct kvm_vcpu *v; 1191 unsigned long dpdes; 1192 1193 nthreads = vcpu->kvm->arch.emul_smt_mode; 1194 dpdes = 0; 1195 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1196 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1197 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1198 if (!v) 1199 continue; 1200 /* 1201 * If the vcpu is currently running on a physical cpu thread, 1202 * interrupt it in order to pull it out of the guest briefly, 1203 * which will update its vcore->dpdes value. 1204 */ 1205 pcpu = READ_ONCE(v->cpu); 1206 if (pcpu >= 0) 1207 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1208 if (kvmppc_doorbell_pending(v)) 1209 dpdes |= 1 << thr; 1210 } 1211 return dpdes; 1212 } 1213 1214 /* 1215 * On POWER9, emulate doorbell-related instructions in order to 1216 * give the guest the illusion of running on a multi-threaded core. 1217 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1218 * and mfspr DPDES. 1219 */ 1220 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1221 { 1222 u32 inst, rb, thr; 1223 unsigned long arg; 1224 struct kvm *kvm = vcpu->kvm; 1225 struct kvm_vcpu *tvcpu; 1226 1227 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1228 return RESUME_GUEST; 1229 if (get_op(inst) != 31) 1230 return EMULATE_FAIL; 1231 rb = get_rb(inst); 1232 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1233 switch (get_xop(inst)) { 1234 case OP_31_XOP_MSGSNDP: 1235 arg = kvmppc_get_gpr(vcpu, rb); 1236 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1237 break; 1238 arg &= 0x3f; 1239 if (arg >= kvm->arch.emul_smt_mode) 1240 break; 1241 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1242 if (!tvcpu) 1243 break; 1244 if (!tvcpu->arch.doorbell_request) { 1245 tvcpu->arch.doorbell_request = 1; 1246 kvmppc_fast_vcpu_kick_hv(tvcpu); 1247 } 1248 break; 1249 case OP_31_XOP_MSGCLRP: 1250 arg = kvmppc_get_gpr(vcpu, rb); 1251 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1252 break; 1253 vcpu->arch.vcore->dpdes = 0; 1254 vcpu->arch.doorbell_request = 0; 1255 break; 1256 case OP_31_XOP_MFSPR: 1257 switch (get_sprn(inst)) { 1258 case SPRN_TIR: 1259 arg = thr; 1260 break; 1261 case SPRN_DPDES: 1262 arg = kvmppc_read_dpdes(vcpu); 1263 break; 1264 default: 1265 return EMULATE_FAIL; 1266 } 1267 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1268 break; 1269 default: 1270 return EMULATE_FAIL; 1271 } 1272 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1273 return RESUME_GUEST; 1274 } 1275 1276 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 1277 struct task_struct *tsk) 1278 { 1279 int r = RESUME_HOST; 1280 1281 vcpu->stat.sum_exits++; 1282 1283 /* 1284 * This can happen if an interrupt occurs in the last stages 1285 * of guest entry or the first stages of guest exit (i.e. after 1286 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1287 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1288 * That can happen due to a bug, or due to a machine check 1289 * occurring at just the wrong time. 1290 */ 1291 if (vcpu->arch.shregs.msr & MSR_HV) { 1292 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1293 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1294 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1295 vcpu->arch.shregs.msr); 1296 kvmppc_dump_regs(vcpu); 1297 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1298 run->hw.hardware_exit_reason = vcpu->arch.trap; 1299 return RESUME_HOST; 1300 } 1301 run->exit_reason = KVM_EXIT_UNKNOWN; 1302 run->ready_for_interrupt_injection = 1; 1303 switch (vcpu->arch.trap) { 1304 /* We're good on these - the host merely wanted to get our attention */ 1305 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1306 vcpu->stat.dec_exits++; 1307 r = RESUME_GUEST; 1308 break; 1309 case BOOK3S_INTERRUPT_EXTERNAL: 1310 case BOOK3S_INTERRUPT_H_DOORBELL: 1311 case BOOK3S_INTERRUPT_H_VIRT: 1312 vcpu->stat.ext_intr_exits++; 1313 r = RESUME_GUEST; 1314 break; 1315 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1316 case BOOK3S_INTERRUPT_HMI: 1317 case BOOK3S_INTERRUPT_PERFMON: 1318 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1319 r = RESUME_GUEST; 1320 break; 1321 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1322 /* Print the MCE event to host console. */ 1323 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1324 1325 /* 1326 * If the guest can do FWNMI, exit to userspace so it can 1327 * deliver a FWNMI to the guest. 1328 * Otherwise we synthesize a machine check for the guest 1329 * so that it knows that the machine check occurred. 1330 */ 1331 if (!vcpu->kvm->arch.fwnmi_enabled) { 1332 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1333 kvmppc_core_queue_machine_check(vcpu, flags); 1334 r = RESUME_GUEST; 1335 break; 1336 } 1337 1338 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1339 run->exit_reason = KVM_EXIT_NMI; 1340 run->hw.hardware_exit_reason = vcpu->arch.trap; 1341 /* Clear out the old NMI status from run->flags */ 1342 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1343 /* Now set the NMI status */ 1344 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1345 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1346 else 1347 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1348 1349 r = RESUME_HOST; 1350 break; 1351 case BOOK3S_INTERRUPT_PROGRAM: 1352 { 1353 ulong flags; 1354 /* 1355 * Normally program interrupts are delivered directly 1356 * to the guest by the hardware, but we can get here 1357 * as a result of a hypervisor emulation interrupt 1358 * (e40) getting turned into a 700 by BML RTAS. 1359 */ 1360 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1361 kvmppc_core_queue_program(vcpu, flags); 1362 r = RESUME_GUEST; 1363 break; 1364 } 1365 case BOOK3S_INTERRUPT_SYSCALL: 1366 { 1367 /* hcall - punt to userspace */ 1368 int i; 1369 1370 /* hypercall with MSR_PR has already been handled in rmode, 1371 * and never reaches here. 1372 */ 1373 1374 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1375 for (i = 0; i < 9; ++i) 1376 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1377 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1378 vcpu->arch.hcall_needed = 1; 1379 r = RESUME_HOST; 1380 break; 1381 } 1382 /* 1383 * We get these next two if the guest accesses a page which it thinks 1384 * it has mapped but which is not actually present, either because 1385 * it is for an emulated I/O device or because the corresonding 1386 * host page has been paged out. Any other HDSI/HISI interrupts 1387 * have been handled already. 1388 */ 1389 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1390 r = RESUME_PAGE_FAULT; 1391 break; 1392 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1393 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1394 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1395 DSISR_SRR1_MATCH_64S; 1396 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1397 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1398 r = RESUME_PAGE_FAULT; 1399 break; 1400 /* 1401 * This occurs if the guest executes an illegal instruction. 1402 * If the guest debug is disabled, generate a program interrupt 1403 * to the guest. If guest debug is enabled, we need to check 1404 * whether the instruction is a software breakpoint instruction. 1405 * Accordingly return to Guest or Host. 1406 */ 1407 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1408 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1409 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1410 swab32(vcpu->arch.emul_inst) : 1411 vcpu->arch.emul_inst; 1412 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1413 r = kvmppc_emulate_debug_inst(run, vcpu); 1414 } else { 1415 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1416 r = RESUME_GUEST; 1417 } 1418 break; 1419 /* 1420 * This occurs if the guest (kernel or userspace), does something that 1421 * is prohibited by HFSCR. 1422 * On POWER9, this could be a doorbell instruction that we need 1423 * to emulate. 1424 * Otherwise, we just generate a program interrupt to the guest. 1425 */ 1426 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1427 r = EMULATE_FAIL; 1428 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1429 cpu_has_feature(CPU_FTR_ARCH_300)) 1430 r = kvmppc_emulate_doorbell_instr(vcpu); 1431 if (r == EMULATE_FAIL) { 1432 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1433 r = RESUME_GUEST; 1434 } 1435 break; 1436 1437 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1438 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1439 /* 1440 * This occurs for various TM-related instructions that 1441 * we need to emulate on POWER9 DD2.2. We have already 1442 * handled the cases where the guest was in real-suspend 1443 * mode and was transitioning to transactional state. 1444 */ 1445 r = kvmhv_p9_tm_emulation(vcpu); 1446 break; 1447 #endif 1448 1449 case BOOK3S_INTERRUPT_HV_RM_HARD: 1450 r = RESUME_PASSTHROUGH; 1451 break; 1452 default: 1453 kvmppc_dump_regs(vcpu); 1454 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1455 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1456 vcpu->arch.shregs.msr); 1457 run->hw.hardware_exit_reason = vcpu->arch.trap; 1458 r = RESUME_HOST; 1459 break; 1460 } 1461 1462 return r; 1463 } 1464 1465 static int kvmppc_handle_nested_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 1466 { 1467 int r; 1468 int srcu_idx; 1469 1470 vcpu->stat.sum_exits++; 1471 1472 /* 1473 * This can happen if an interrupt occurs in the last stages 1474 * of guest entry or the first stages of guest exit (i.e. after 1475 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1476 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1477 * That can happen due to a bug, or due to a machine check 1478 * occurring at just the wrong time. 1479 */ 1480 if (vcpu->arch.shregs.msr & MSR_HV) { 1481 pr_emerg("KVM trap in HV mode while nested!\n"); 1482 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1483 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1484 vcpu->arch.shregs.msr); 1485 kvmppc_dump_regs(vcpu); 1486 return RESUME_HOST; 1487 } 1488 switch (vcpu->arch.trap) { 1489 /* We're good on these - the host merely wanted to get our attention */ 1490 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1491 vcpu->stat.dec_exits++; 1492 r = RESUME_GUEST; 1493 break; 1494 case BOOK3S_INTERRUPT_EXTERNAL: 1495 vcpu->stat.ext_intr_exits++; 1496 r = RESUME_HOST; 1497 break; 1498 case BOOK3S_INTERRUPT_H_DOORBELL: 1499 case BOOK3S_INTERRUPT_H_VIRT: 1500 vcpu->stat.ext_intr_exits++; 1501 r = RESUME_GUEST; 1502 break; 1503 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1504 case BOOK3S_INTERRUPT_HMI: 1505 case BOOK3S_INTERRUPT_PERFMON: 1506 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1507 r = RESUME_GUEST; 1508 break; 1509 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1510 /* Pass the machine check to the L1 guest */ 1511 r = RESUME_HOST; 1512 /* Print the MCE event to host console. */ 1513 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1514 break; 1515 /* 1516 * We get these next two if the guest accesses a page which it thinks 1517 * it has mapped but which is not actually present, either because 1518 * it is for an emulated I/O device or because the corresonding 1519 * host page has been paged out. 1520 */ 1521 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1522 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1523 r = kvmhv_nested_page_fault(run, vcpu); 1524 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1525 break; 1526 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1527 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1528 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1529 DSISR_SRR1_MATCH_64S; 1530 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1531 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1532 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1533 r = kvmhv_nested_page_fault(run, vcpu); 1534 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1535 break; 1536 1537 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1538 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1539 /* 1540 * This occurs for various TM-related instructions that 1541 * we need to emulate on POWER9 DD2.2. We have already 1542 * handled the cases where the guest was in real-suspend 1543 * mode and was transitioning to transactional state. 1544 */ 1545 r = kvmhv_p9_tm_emulation(vcpu); 1546 break; 1547 #endif 1548 1549 case BOOK3S_INTERRUPT_HV_RM_HARD: 1550 vcpu->arch.trap = 0; 1551 r = RESUME_GUEST; 1552 if (!xics_on_xive()) 1553 kvmppc_xics_rm_complete(vcpu, 0); 1554 break; 1555 default: 1556 r = RESUME_HOST; 1557 break; 1558 } 1559 1560 return r; 1561 } 1562 1563 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1564 struct kvm_sregs *sregs) 1565 { 1566 int i; 1567 1568 memset(sregs, 0, sizeof(struct kvm_sregs)); 1569 sregs->pvr = vcpu->arch.pvr; 1570 for (i = 0; i < vcpu->arch.slb_max; i++) { 1571 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1572 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1573 } 1574 1575 return 0; 1576 } 1577 1578 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1579 struct kvm_sregs *sregs) 1580 { 1581 int i, j; 1582 1583 /* Only accept the same PVR as the host's, since we can't spoof it */ 1584 if (sregs->pvr != vcpu->arch.pvr) 1585 return -EINVAL; 1586 1587 j = 0; 1588 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1589 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1590 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1591 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1592 ++j; 1593 } 1594 } 1595 vcpu->arch.slb_max = j; 1596 1597 return 0; 1598 } 1599 1600 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1601 bool preserve_top32) 1602 { 1603 struct kvm *kvm = vcpu->kvm; 1604 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1605 u64 mask; 1606 1607 spin_lock(&vc->lock); 1608 /* 1609 * If ILE (interrupt little-endian) has changed, update the 1610 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1611 */ 1612 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1613 struct kvm_vcpu *vcpu; 1614 int i; 1615 1616 kvm_for_each_vcpu(i, vcpu, kvm) { 1617 if (vcpu->arch.vcore != vc) 1618 continue; 1619 if (new_lpcr & LPCR_ILE) 1620 vcpu->arch.intr_msr |= MSR_LE; 1621 else 1622 vcpu->arch.intr_msr &= ~MSR_LE; 1623 } 1624 } 1625 1626 /* 1627 * Userspace can only modify DPFD (default prefetch depth), 1628 * ILE (interrupt little-endian) and TC (translation control). 1629 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1630 */ 1631 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1632 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1633 mask |= LPCR_AIL; 1634 /* 1635 * On POWER9, allow userspace to enable large decrementer for the 1636 * guest, whether or not the host has it enabled. 1637 */ 1638 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1639 mask |= LPCR_LD; 1640 1641 /* Broken 32-bit version of LPCR must not clear top bits */ 1642 if (preserve_top32) 1643 mask &= 0xFFFFFFFF; 1644 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1645 spin_unlock(&vc->lock); 1646 } 1647 1648 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1649 union kvmppc_one_reg *val) 1650 { 1651 int r = 0; 1652 long int i; 1653 1654 switch (id) { 1655 case KVM_REG_PPC_DEBUG_INST: 1656 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1657 break; 1658 case KVM_REG_PPC_HIOR: 1659 *val = get_reg_val(id, 0); 1660 break; 1661 case KVM_REG_PPC_DABR: 1662 *val = get_reg_val(id, vcpu->arch.dabr); 1663 break; 1664 case KVM_REG_PPC_DABRX: 1665 *val = get_reg_val(id, vcpu->arch.dabrx); 1666 break; 1667 case KVM_REG_PPC_DSCR: 1668 *val = get_reg_val(id, vcpu->arch.dscr); 1669 break; 1670 case KVM_REG_PPC_PURR: 1671 *val = get_reg_val(id, vcpu->arch.purr); 1672 break; 1673 case KVM_REG_PPC_SPURR: 1674 *val = get_reg_val(id, vcpu->arch.spurr); 1675 break; 1676 case KVM_REG_PPC_AMR: 1677 *val = get_reg_val(id, vcpu->arch.amr); 1678 break; 1679 case KVM_REG_PPC_UAMOR: 1680 *val = get_reg_val(id, vcpu->arch.uamor); 1681 break; 1682 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1683 i = id - KVM_REG_PPC_MMCR0; 1684 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1685 break; 1686 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1687 i = id - KVM_REG_PPC_PMC1; 1688 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1689 break; 1690 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1691 i = id - KVM_REG_PPC_SPMC1; 1692 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1693 break; 1694 case KVM_REG_PPC_SIAR: 1695 *val = get_reg_val(id, vcpu->arch.siar); 1696 break; 1697 case KVM_REG_PPC_SDAR: 1698 *val = get_reg_val(id, vcpu->arch.sdar); 1699 break; 1700 case KVM_REG_PPC_SIER: 1701 *val = get_reg_val(id, vcpu->arch.sier); 1702 break; 1703 case KVM_REG_PPC_IAMR: 1704 *val = get_reg_val(id, vcpu->arch.iamr); 1705 break; 1706 case KVM_REG_PPC_PSPB: 1707 *val = get_reg_val(id, vcpu->arch.pspb); 1708 break; 1709 case KVM_REG_PPC_DPDES: 1710 /* 1711 * On POWER9, where we are emulating msgsndp etc., 1712 * we return 1 bit for each vcpu, which can come from 1713 * either vcore->dpdes or doorbell_request. 1714 * On POWER8, doorbell_request is 0. 1715 */ 1716 *val = get_reg_val(id, vcpu->arch.vcore->dpdes | 1717 vcpu->arch.doorbell_request); 1718 break; 1719 case KVM_REG_PPC_VTB: 1720 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1721 break; 1722 case KVM_REG_PPC_DAWR: 1723 *val = get_reg_val(id, vcpu->arch.dawr); 1724 break; 1725 case KVM_REG_PPC_DAWRX: 1726 *val = get_reg_val(id, vcpu->arch.dawrx); 1727 break; 1728 case KVM_REG_PPC_CIABR: 1729 *val = get_reg_val(id, vcpu->arch.ciabr); 1730 break; 1731 case KVM_REG_PPC_CSIGR: 1732 *val = get_reg_val(id, vcpu->arch.csigr); 1733 break; 1734 case KVM_REG_PPC_TACR: 1735 *val = get_reg_val(id, vcpu->arch.tacr); 1736 break; 1737 case KVM_REG_PPC_TCSCR: 1738 *val = get_reg_val(id, vcpu->arch.tcscr); 1739 break; 1740 case KVM_REG_PPC_PID: 1741 *val = get_reg_val(id, vcpu->arch.pid); 1742 break; 1743 case KVM_REG_PPC_ACOP: 1744 *val = get_reg_val(id, vcpu->arch.acop); 1745 break; 1746 case KVM_REG_PPC_WORT: 1747 *val = get_reg_val(id, vcpu->arch.wort); 1748 break; 1749 case KVM_REG_PPC_TIDR: 1750 *val = get_reg_val(id, vcpu->arch.tid); 1751 break; 1752 case KVM_REG_PPC_PSSCR: 1753 *val = get_reg_val(id, vcpu->arch.psscr); 1754 break; 1755 case KVM_REG_PPC_VPA_ADDR: 1756 spin_lock(&vcpu->arch.vpa_update_lock); 1757 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1758 spin_unlock(&vcpu->arch.vpa_update_lock); 1759 break; 1760 case KVM_REG_PPC_VPA_SLB: 1761 spin_lock(&vcpu->arch.vpa_update_lock); 1762 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1763 val->vpaval.length = vcpu->arch.slb_shadow.len; 1764 spin_unlock(&vcpu->arch.vpa_update_lock); 1765 break; 1766 case KVM_REG_PPC_VPA_DTL: 1767 spin_lock(&vcpu->arch.vpa_update_lock); 1768 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1769 val->vpaval.length = vcpu->arch.dtl.len; 1770 spin_unlock(&vcpu->arch.vpa_update_lock); 1771 break; 1772 case KVM_REG_PPC_TB_OFFSET: 1773 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1774 break; 1775 case KVM_REG_PPC_LPCR: 1776 case KVM_REG_PPC_LPCR_64: 1777 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1778 break; 1779 case KVM_REG_PPC_PPR: 1780 *val = get_reg_val(id, vcpu->arch.ppr); 1781 break; 1782 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1783 case KVM_REG_PPC_TFHAR: 1784 *val = get_reg_val(id, vcpu->arch.tfhar); 1785 break; 1786 case KVM_REG_PPC_TFIAR: 1787 *val = get_reg_val(id, vcpu->arch.tfiar); 1788 break; 1789 case KVM_REG_PPC_TEXASR: 1790 *val = get_reg_val(id, vcpu->arch.texasr); 1791 break; 1792 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1793 i = id - KVM_REG_PPC_TM_GPR0; 1794 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1795 break; 1796 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1797 { 1798 int j; 1799 i = id - KVM_REG_PPC_TM_VSR0; 1800 if (i < 32) 1801 for (j = 0; j < TS_FPRWIDTH; j++) 1802 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1803 else { 1804 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1805 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1806 else 1807 r = -ENXIO; 1808 } 1809 break; 1810 } 1811 case KVM_REG_PPC_TM_CR: 1812 *val = get_reg_val(id, vcpu->arch.cr_tm); 1813 break; 1814 case KVM_REG_PPC_TM_XER: 1815 *val = get_reg_val(id, vcpu->arch.xer_tm); 1816 break; 1817 case KVM_REG_PPC_TM_LR: 1818 *val = get_reg_val(id, vcpu->arch.lr_tm); 1819 break; 1820 case KVM_REG_PPC_TM_CTR: 1821 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1822 break; 1823 case KVM_REG_PPC_TM_FPSCR: 1824 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1825 break; 1826 case KVM_REG_PPC_TM_AMR: 1827 *val = get_reg_val(id, vcpu->arch.amr_tm); 1828 break; 1829 case KVM_REG_PPC_TM_PPR: 1830 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1831 break; 1832 case KVM_REG_PPC_TM_VRSAVE: 1833 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1834 break; 1835 case KVM_REG_PPC_TM_VSCR: 1836 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1837 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1838 else 1839 r = -ENXIO; 1840 break; 1841 case KVM_REG_PPC_TM_DSCR: 1842 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1843 break; 1844 case KVM_REG_PPC_TM_TAR: 1845 *val = get_reg_val(id, vcpu->arch.tar_tm); 1846 break; 1847 #endif 1848 case KVM_REG_PPC_ARCH_COMPAT: 1849 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1850 break; 1851 case KVM_REG_PPC_DEC_EXPIRY: 1852 *val = get_reg_val(id, vcpu->arch.dec_expires + 1853 vcpu->arch.vcore->tb_offset); 1854 break; 1855 case KVM_REG_PPC_ONLINE: 1856 *val = get_reg_val(id, vcpu->arch.online); 1857 break; 1858 case KVM_REG_PPC_PTCR: 1859 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1860 break; 1861 default: 1862 r = -EINVAL; 1863 break; 1864 } 1865 1866 return r; 1867 } 1868 1869 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1870 union kvmppc_one_reg *val) 1871 { 1872 int r = 0; 1873 long int i; 1874 unsigned long addr, len; 1875 1876 switch (id) { 1877 case KVM_REG_PPC_HIOR: 1878 /* Only allow this to be set to zero */ 1879 if (set_reg_val(id, *val)) 1880 r = -EINVAL; 1881 break; 1882 case KVM_REG_PPC_DABR: 1883 vcpu->arch.dabr = set_reg_val(id, *val); 1884 break; 1885 case KVM_REG_PPC_DABRX: 1886 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1887 break; 1888 case KVM_REG_PPC_DSCR: 1889 vcpu->arch.dscr = set_reg_val(id, *val); 1890 break; 1891 case KVM_REG_PPC_PURR: 1892 vcpu->arch.purr = set_reg_val(id, *val); 1893 break; 1894 case KVM_REG_PPC_SPURR: 1895 vcpu->arch.spurr = set_reg_val(id, *val); 1896 break; 1897 case KVM_REG_PPC_AMR: 1898 vcpu->arch.amr = set_reg_val(id, *val); 1899 break; 1900 case KVM_REG_PPC_UAMOR: 1901 vcpu->arch.uamor = set_reg_val(id, *val); 1902 break; 1903 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1904 i = id - KVM_REG_PPC_MMCR0; 1905 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1906 break; 1907 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1908 i = id - KVM_REG_PPC_PMC1; 1909 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1910 break; 1911 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1912 i = id - KVM_REG_PPC_SPMC1; 1913 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1914 break; 1915 case KVM_REG_PPC_SIAR: 1916 vcpu->arch.siar = set_reg_val(id, *val); 1917 break; 1918 case KVM_REG_PPC_SDAR: 1919 vcpu->arch.sdar = set_reg_val(id, *val); 1920 break; 1921 case KVM_REG_PPC_SIER: 1922 vcpu->arch.sier = set_reg_val(id, *val); 1923 break; 1924 case KVM_REG_PPC_IAMR: 1925 vcpu->arch.iamr = set_reg_val(id, *val); 1926 break; 1927 case KVM_REG_PPC_PSPB: 1928 vcpu->arch.pspb = set_reg_val(id, *val); 1929 break; 1930 case KVM_REG_PPC_DPDES: 1931 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 1932 break; 1933 case KVM_REG_PPC_VTB: 1934 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 1935 break; 1936 case KVM_REG_PPC_DAWR: 1937 vcpu->arch.dawr = set_reg_val(id, *val); 1938 break; 1939 case KVM_REG_PPC_DAWRX: 1940 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP; 1941 break; 1942 case KVM_REG_PPC_CIABR: 1943 vcpu->arch.ciabr = set_reg_val(id, *val); 1944 /* Don't allow setting breakpoints in hypervisor code */ 1945 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 1946 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 1947 break; 1948 case KVM_REG_PPC_CSIGR: 1949 vcpu->arch.csigr = set_reg_val(id, *val); 1950 break; 1951 case KVM_REG_PPC_TACR: 1952 vcpu->arch.tacr = set_reg_val(id, *val); 1953 break; 1954 case KVM_REG_PPC_TCSCR: 1955 vcpu->arch.tcscr = set_reg_val(id, *val); 1956 break; 1957 case KVM_REG_PPC_PID: 1958 vcpu->arch.pid = set_reg_val(id, *val); 1959 break; 1960 case KVM_REG_PPC_ACOP: 1961 vcpu->arch.acop = set_reg_val(id, *val); 1962 break; 1963 case KVM_REG_PPC_WORT: 1964 vcpu->arch.wort = set_reg_val(id, *val); 1965 break; 1966 case KVM_REG_PPC_TIDR: 1967 vcpu->arch.tid = set_reg_val(id, *val); 1968 break; 1969 case KVM_REG_PPC_PSSCR: 1970 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 1971 break; 1972 case KVM_REG_PPC_VPA_ADDR: 1973 addr = set_reg_val(id, *val); 1974 r = -EINVAL; 1975 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 1976 vcpu->arch.dtl.next_gpa)) 1977 break; 1978 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 1979 break; 1980 case KVM_REG_PPC_VPA_SLB: 1981 addr = val->vpaval.addr; 1982 len = val->vpaval.length; 1983 r = -EINVAL; 1984 if (addr && !vcpu->arch.vpa.next_gpa) 1985 break; 1986 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 1987 break; 1988 case KVM_REG_PPC_VPA_DTL: 1989 addr = val->vpaval.addr; 1990 len = val->vpaval.length; 1991 r = -EINVAL; 1992 if (addr && (len < sizeof(struct dtl_entry) || 1993 !vcpu->arch.vpa.next_gpa)) 1994 break; 1995 len -= len % sizeof(struct dtl_entry); 1996 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 1997 break; 1998 case KVM_REG_PPC_TB_OFFSET: 1999 /* round up to multiple of 2^24 */ 2000 vcpu->arch.vcore->tb_offset = 2001 ALIGN(set_reg_val(id, *val), 1UL << 24); 2002 break; 2003 case KVM_REG_PPC_LPCR: 2004 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2005 break; 2006 case KVM_REG_PPC_LPCR_64: 2007 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2008 break; 2009 case KVM_REG_PPC_PPR: 2010 vcpu->arch.ppr = set_reg_val(id, *val); 2011 break; 2012 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2013 case KVM_REG_PPC_TFHAR: 2014 vcpu->arch.tfhar = set_reg_val(id, *val); 2015 break; 2016 case KVM_REG_PPC_TFIAR: 2017 vcpu->arch.tfiar = set_reg_val(id, *val); 2018 break; 2019 case KVM_REG_PPC_TEXASR: 2020 vcpu->arch.texasr = set_reg_val(id, *val); 2021 break; 2022 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2023 i = id - KVM_REG_PPC_TM_GPR0; 2024 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2025 break; 2026 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2027 { 2028 int j; 2029 i = id - KVM_REG_PPC_TM_VSR0; 2030 if (i < 32) 2031 for (j = 0; j < TS_FPRWIDTH; j++) 2032 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2033 else 2034 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2035 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2036 else 2037 r = -ENXIO; 2038 break; 2039 } 2040 case KVM_REG_PPC_TM_CR: 2041 vcpu->arch.cr_tm = set_reg_val(id, *val); 2042 break; 2043 case KVM_REG_PPC_TM_XER: 2044 vcpu->arch.xer_tm = set_reg_val(id, *val); 2045 break; 2046 case KVM_REG_PPC_TM_LR: 2047 vcpu->arch.lr_tm = set_reg_val(id, *val); 2048 break; 2049 case KVM_REG_PPC_TM_CTR: 2050 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2051 break; 2052 case KVM_REG_PPC_TM_FPSCR: 2053 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2054 break; 2055 case KVM_REG_PPC_TM_AMR: 2056 vcpu->arch.amr_tm = set_reg_val(id, *val); 2057 break; 2058 case KVM_REG_PPC_TM_PPR: 2059 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2060 break; 2061 case KVM_REG_PPC_TM_VRSAVE: 2062 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2063 break; 2064 case KVM_REG_PPC_TM_VSCR: 2065 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2066 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2067 else 2068 r = - ENXIO; 2069 break; 2070 case KVM_REG_PPC_TM_DSCR: 2071 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2072 break; 2073 case KVM_REG_PPC_TM_TAR: 2074 vcpu->arch.tar_tm = set_reg_val(id, *val); 2075 break; 2076 #endif 2077 case KVM_REG_PPC_ARCH_COMPAT: 2078 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2079 break; 2080 case KVM_REG_PPC_DEC_EXPIRY: 2081 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2082 vcpu->arch.vcore->tb_offset; 2083 break; 2084 case KVM_REG_PPC_ONLINE: 2085 i = set_reg_val(id, *val); 2086 if (i && !vcpu->arch.online) 2087 atomic_inc(&vcpu->arch.vcore->online_count); 2088 else if (!i && vcpu->arch.online) 2089 atomic_dec(&vcpu->arch.vcore->online_count); 2090 vcpu->arch.online = i; 2091 break; 2092 case KVM_REG_PPC_PTCR: 2093 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2094 break; 2095 default: 2096 r = -EINVAL; 2097 break; 2098 } 2099 2100 return r; 2101 } 2102 2103 /* 2104 * On POWER9, threads are independent and can be in different partitions. 2105 * Therefore we consider each thread to be a subcore. 2106 * There is a restriction that all threads have to be in the same 2107 * MMU mode (radix or HPT), unfortunately, but since we only support 2108 * HPT guests on a HPT host so far, that isn't an impediment yet. 2109 */ 2110 static int threads_per_vcore(struct kvm *kvm) 2111 { 2112 if (kvm->arch.threads_indep) 2113 return 1; 2114 return threads_per_subcore; 2115 } 2116 2117 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2118 { 2119 struct kvmppc_vcore *vcore; 2120 2121 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2122 2123 if (vcore == NULL) 2124 return NULL; 2125 2126 spin_lock_init(&vcore->lock); 2127 spin_lock_init(&vcore->stoltb_lock); 2128 init_swait_queue_head(&vcore->wq); 2129 vcore->preempt_tb = TB_NIL; 2130 vcore->lpcr = kvm->arch.lpcr; 2131 vcore->first_vcpuid = id; 2132 vcore->kvm = kvm; 2133 INIT_LIST_HEAD(&vcore->preempt_list); 2134 2135 return vcore; 2136 } 2137 2138 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2139 static struct debugfs_timings_element { 2140 const char *name; 2141 size_t offset; 2142 } timings[] = { 2143 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2144 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2145 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2146 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2147 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2148 }; 2149 2150 #define N_TIMINGS (ARRAY_SIZE(timings)) 2151 2152 struct debugfs_timings_state { 2153 struct kvm_vcpu *vcpu; 2154 unsigned int buflen; 2155 char buf[N_TIMINGS * 100]; 2156 }; 2157 2158 static int debugfs_timings_open(struct inode *inode, struct file *file) 2159 { 2160 struct kvm_vcpu *vcpu = inode->i_private; 2161 struct debugfs_timings_state *p; 2162 2163 p = kzalloc(sizeof(*p), GFP_KERNEL); 2164 if (!p) 2165 return -ENOMEM; 2166 2167 kvm_get_kvm(vcpu->kvm); 2168 p->vcpu = vcpu; 2169 file->private_data = p; 2170 2171 return nonseekable_open(inode, file); 2172 } 2173 2174 static int debugfs_timings_release(struct inode *inode, struct file *file) 2175 { 2176 struct debugfs_timings_state *p = file->private_data; 2177 2178 kvm_put_kvm(p->vcpu->kvm); 2179 kfree(p); 2180 return 0; 2181 } 2182 2183 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2184 size_t len, loff_t *ppos) 2185 { 2186 struct debugfs_timings_state *p = file->private_data; 2187 struct kvm_vcpu *vcpu = p->vcpu; 2188 char *s, *buf_end; 2189 struct kvmhv_tb_accumulator tb; 2190 u64 count; 2191 loff_t pos; 2192 ssize_t n; 2193 int i, loops; 2194 bool ok; 2195 2196 if (!p->buflen) { 2197 s = p->buf; 2198 buf_end = s + sizeof(p->buf); 2199 for (i = 0; i < N_TIMINGS; ++i) { 2200 struct kvmhv_tb_accumulator *acc; 2201 2202 acc = (struct kvmhv_tb_accumulator *) 2203 ((unsigned long)vcpu + timings[i].offset); 2204 ok = false; 2205 for (loops = 0; loops < 1000; ++loops) { 2206 count = acc->seqcount; 2207 if (!(count & 1)) { 2208 smp_rmb(); 2209 tb = *acc; 2210 smp_rmb(); 2211 if (count == acc->seqcount) { 2212 ok = true; 2213 break; 2214 } 2215 } 2216 udelay(1); 2217 } 2218 if (!ok) 2219 snprintf(s, buf_end - s, "%s: stuck\n", 2220 timings[i].name); 2221 else 2222 snprintf(s, buf_end - s, 2223 "%s: %llu %llu %llu %llu\n", 2224 timings[i].name, count / 2, 2225 tb_to_ns(tb.tb_total), 2226 tb_to_ns(tb.tb_min), 2227 tb_to_ns(tb.tb_max)); 2228 s += strlen(s); 2229 } 2230 p->buflen = s - p->buf; 2231 } 2232 2233 pos = *ppos; 2234 if (pos >= p->buflen) 2235 return 0; 2236 if (len > p->buflen - pos) 2237 len = p->buflen - pos; 2238 n = copy_to_user(buf, p->buf + pos, len); 2239 if (n) { 2240 if (n == len) 2241 return -EFAULT; 2242 len -= n; 2243 } 2244 *ppos = pos + len; 2245 return len; 2246 } 2247 2248 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2249 size_t len, loff_t *ppos) 2250 { 2251 return -EACCES; 2252 } 2253 2254 static const struct file_operations debugfs_timings_ops = { 2255 .owner = THIS_MODULE, 2256 .open = debugfs_timings_open, 2257 .release = debugfs_timings_release, 2258 .read = debugfs_timings_read, 2259 .write = debugfs_timings_write, 2260 .llseek = generic_file_llseek, 2261 }; 2262 2263 /* Create a debugfs directory for the vcpu */ 2264 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2265 { 2266 char buf[16]; 2267 struct kvm *kvm = vcpu->kvm; 2268 2269 snprintf(buf, sizeof(buf), "vcpu%u", id); 2270 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2271 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2272 &debugfs_timings_ops); 2273 } 2274 2275 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2276 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2277 { 2278 } 2279 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2280 2281 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2282 { 2283 int err; 2284 int core; 2285 struct kvmppc_vcore *vcore; 2286 struct kvm *kvm; 2287 unsigned int id; 2288 2289 kvm = vcpu->kvm; 2290 id = vcpu->vcpu_id; 2291 2292 vcpu->arch.shared = &vcpu->arch.shregs; 2293 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2294 /* 2295 * The shared struct is never shared on HV, 2296 * so we can always use host endianness 2297 */ 2298 #ifdef __BIG_ENDIAN__ 2299 vcpu->arch.shared_big_endian = true; 2300 #else 2301 vcpu->arch.shared_big_endian = false; 2302 #endif 2303 #endif 2304 vcpu->arch.mmcr[0] = MMCR0_FC; 2305 vcpu->arch.ctrl = CTRL_RUNLATCH; 2306 /* default to host PVR, since we can't spoof it */ 2307 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2308 spin_lock_init(&vcpu->arch.vpa_update_lock); 2309 spin_lock_init(&vcpu->arch.tbacct_lock); 2310 vcpu->arch.busy_preempt = TB_NIL; 2311 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2312 2313 /* 2314 * Set the default HFSCR for the guest from the host value. 2315 * This value is only used on POWER9. 2316 * On POWER9, we want to virtualize the doorbell facility, so we 2317 * don't set the HFSCR_MSGP bit, and that causes those instructions 2318 * to trap and then we emulate them. 2319 */ 2320 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2321 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP; 2322 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2323 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2324 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2325 vcpu->arch.hfscr |= HFSCR_TM; 2326 } 2327 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2328 vcpu->arch.hfscr |= HFSCR_TM; 2329 2330 kvmppc_mmu_book3s_hv_init(vcpu); 2331 2332 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2333 2334 init_waitqueue_head(&vcpu->arch.cpu_run); 2335 2336 mutex_lock(&kvm->lock); 2337 vcore = NULL; 2338 err = -EINVAL; 2339 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2340 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2341 pr_devel("KVM: VCPU ID too high\n"); 2342 core = KVM_MAX_VCORES; 2343 } else { 2344 BUG_ON(kvm->arch.smt_mode != 1); 2345 core = kvmppc_pack_vcpu_id(kvm, id); 2346 } 2347 } else { 2348 core = id / kvm->arch.smt_mode; 2349 } 2350 if (core < KVM_MAX_VCORES) { 2351 vcore = kvm->arch.vcores[core]; 2352 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2353 pr_devel("KVM: collision on id %u", id); 2354 vcore = NULL; 2355 } else if (!vcore) { 2356 /* 2357 * Take mmu_setup_lock for mutual exclusion 2358 * with kvmppc_update_lpcr(). 2359 */ 2360 err = -ENOMEM; 2361 vcore = kvmppc_vcore_create(kvm, 2362 id & ~(kvm->arch.smt_mode - 1)); 2363 mutex_lock(&kvm->arch.mmu_setup_lock); 2364 kvm->arch.vcores[core] = vcore; 2365 kvm->arch.online_vcores++; 2366 mutex_unlock(&kvm->arch.mmu_setup_lock); 2367 } 2368 } 2369 mutex_unlock(&kvm->lock); 2370 2371 if (!vcore) 2372 return err; 2373 2374 spin_lock(&vcore->lock); 2375 ++vcore->num_threads; 2376 spin_unlock(&vcore->lock); 2377 vcpu->arch.vcore = vcore; 2378 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2379 vcpu->arch.thread_cpu = -1; 2380 vcpu->arch.prev_cpu = -1; 2381 2382 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2383 kvmppc_sanity_check(vcpu); 2384 2385 debugfs_vcpu_init(vcpu, id); 2386 2387 return 0; 2388 } 2389 2390 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2391 unsigned long flags) 2392 { 2393 int err; 2394 int esmt = 0; 2395 2396 if (flags) 2397 return -EINVAL; 2398 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2399 return -EINVAL; 2400 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2401 /* 2402 * On POWER8 (or POWER7), the threading mode is "strict", 2403 * so we pack smt_mode vcpus per vcore. 2404 */ 2405 if (smt_mode > threads_per_subcore) 2406 return -EINVAL; 2407 } else { 2408 /* 2409 * On POWER9, the threading mode is "loose", 2410 * so each vcpu gets its own vcore. 2411 */ 2412 esmt = smt_mode; 2413 smt_mode = 1; 2414 } 2415 mutex_lock(&kvm->lock); 2416 err = -EBUSY; 2417 if (!kvm->arch.online_vcores) { 2418 kvm->arch.smt_mode = smt_mode; 2419 kvm->arch.emul_smt_mode = esmt; 2420 err = 0; 2421 } 2422 mutex_unlock(&kvm->lock); 2423 2424 return err; 2425 } 2426 2427 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2428 { 2429 if (vpa->pinned_addr) 2430 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2431 vpa->dirty); 2432 } 2433 2434 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2435 { 2436 spin_lock(&vcpu->arch.vpa_update_lock); 2437 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2438 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2439 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2440 spin_unlock(&vcpu->arch.vpa_update_lock); 2441 } 2442 2443 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2444 { 2445 /* Indicate we want to get back into the guest */ 2446 return 1; 2447 } 2448 2449 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2450 { 2451 unsigned long dec_nsec, now; 2452 2453 now = get_tb(); 2454 if (now > vcpu->arch.dec_expires) { 2455 /* decrementer has already gone negative */ 2456 kvmppc_core_queue_dec(vcpu); 2457 kvmppc_core_prepare_to_enter(vcpu); 2458 return; 2459 } 2460 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2461 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2462 vcpu->arch.timer_running = 1; 2463 } 2464 2465 extern int __kvmppc_vcore_entry(void); 2466 2467 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2468 struct kvm_vcpu *vcpu) 2469 { 2470 u64 now; 2471 2472 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2473 return; 2474 spin_lock_irq(&vcpu->arch.tbacct_lock); 2475 now = mftb(); 2476 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2477 vcpu->arch.stolen_logged; 2478 vcpu->arch.busy_preempt = now; 2479 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2480 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2481 --vc->n_runnable; 2482 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2483 } 2484 2485 static int kvmppc_grab_hwthread(int cpu) 2486 { 2487 struct paca_struct *tpaca; 2488 long timeout = 10000; 2489 2490 tpaca = paca_ptrs[cpu]; 2491 2492 /* Ensure the thread won't go into the kernel if it wakes */ 2493 tpaca->kvm_hstate.kvm_vcpu = NULL; 2494 tpaca->kvm_hstate.kvm_vcore = NULL; 2495 tpaca->kvm_hstate.napping = 0; 2496 smp_wmb(); 2497 tpaca->kvm_hstate.hwthread_req = 1; 2498 2499 /* 2500 * If the thread is already executing in the kernel (e.g. handling 2501 * a stray interrupt), wait for it to get back to nap mode. 2502 * The smp_mb() is to ensure that our setting of hwthread_req 2503 * is visible before we look at hwthread_state, so if this 2504 * races with the code at system_reset_pSeries and the thread 2505 * misses our setting of hwthread_req, we are sure to see its 2506 * setting of hwthread_state, and vice versa. 2507 */ 2508 smp_mb(); 2509 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2510 if (--timeout <= 0) { 2511 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2512 return -EBUSY; 2513 } 2514 udelay(1); 2515 } 2516 return 0; 2517 } 2518 2519 static void kvmppc_release_hwthread(int cpu) 2520 { 2521 struct paca_struct *tpaca; 2522 2523 tpaca = paca_ptrs[cpu]; 2524 tpaca->kvm_hstate.hwthread_req = 0; 2525 tpaca->kvm_hstate.kvm_vcpu = NULL; 2526 tpaca->kvm_hstate.kvm_vcore = NULL; 2527 tpaca->kvm_hstate.kvm_split_mode = NULL; 2528 } 2529 2530 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2531 { 2532 struct kvm_nested_guest *nested = vcpu->arch.nested; 2533 cpumask_t *cpu_in_guest; 2534 int i; 2535 2536 cpu = cpu_first_thread_sibling(cpu); 2537 if (nested) { 2538 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2539 cpu_in_guest = &nested->cpu_in_guest; 2540 } else { 2541 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2542 cpu_in_guest = &kvm->arch.cpu_in_guest; 2543 } 2544 /* 2545 * Make sure setting of bit in need_tlb_flush precedes 2546 * testing of cpu_in_guest bits. The matching barrier on 2547 * the other side is the first smp_mb() in kvmppc_run_core(). 2548 */ 2549 smp_mb(); 2550 for (i = 0; i < threads_per_core; ++i) 2551 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2552 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2553 } 2554 2555 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2556 { 2557 struct kvm_nested_guest *nested = vcpu->arch.nested; 2558 struct kvm *kvm = vcpu->kvm; 2559 int prev_cpu; 2560 2561 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2562 return; 2563 2564 if (nested) 2565 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2566 else 2567 prev_cpu = vcpu->arch.prev_cpu; 2568 2569 /* 2570 * With radix, the guest can do TLB invalidations itself, 2571 * and it could choose to use the local form (tlbiel) if 2572 * it is invalidating a translation that has only ever been 2573 * used on one vcpu. However, that doesn't mean it has 2574 * only ever been used on one physical cpu, since vcpus 2575 * can move around between pcpus. To cope with this, when 2576 * a vcpu moves from one pcpu to another, we need to tell 2577 * any vcpus running on the same core as this vcpu previously 2578 * ran to flush the TLB. The TLB is shared between threads, 2579 * so we use a single bit in .need_tlb_flush for all 4 threads. 2580 */ 2581 if (prev_cpu != pcpu) { 2582 if (prev_cpu >= 0 && 2583 cpu_first_thread_sibling(prev_cpu) != 2584 cpu_first_thread_sibling(pcpu)) 2585 radix_flush_cpu(kvm, prev_cpu, vcpu); 2586 if (nested) 2587 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2588 else 2589 vcpu->arch.prev_cpu = pcpu; 2590 } 2591 } 2592 2593 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2594 { 2595 int cpu; 2596 struct paca_struct *tpaca; 2597 struct kvm *kvm = vc->kvm; 2598 2599 cpu = vc->pcpu; 2600 if (vcpu) { 2601 if (vcpu->arch.timer_running) { 2602 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2603 vcpu->arch.timer_running = 0; 2604 } 2605 cpu += vcpu->arch.ptid; 2606 vcpu->cpu = vc->pcpu; 2607 vcpu->arch.thread_cpu = cpu; 2608 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2609 } 2610 tpaca = paca_ptrs[cpu]; 2611 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2612 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2613 tpaca->kvm_hstate.fake_suspend = 0; 2614 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2615 smp_wmb(); 2616 tpaca->kvm_hstate.kvm_vcore = vc; 2617 if (cpu != smp_processor_id()) 2618 kvmppc_ipi_thread(cpu); 2619 } 2620 2621 static void kvmppc_wait_for_nap(int n_threads) 2622 { 2623 int cpu = smp_processor_id(); 2624 int i, loops; 2625 2626 if (n_threads <= 1) 2627 return; 2628 for (loops = 0; loops < 1000000; ++loops) { 2629 /* 2630 * Check if all threads are finished. 2631 * We set the vcore pointer when starting a thread 2632 * and the thread clears it when finished, so we look 2633 * for any threads that still have a non-NULL vcore ptr. 2634 */ 2635 for (i = 1; i < n_threads; ++i) 2636 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2637 break; 2638 if (i == n_threads) { 2639 HMT_medium(); 2640 return; 2641 } 2642 HMT_low(); 2643 } 2644 HMT_medium(); 2645 for (i = 1; i < n_threads; ++i) 2646 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2647 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2648 } 2649 2650 /* 2651 * Check that we are on thread 0 and that any other threads in 2652 * this core are off-line. Then grab the threads so they can't 2653 * enter the kernel. 2654 */ 2655 static int on_primary_thread(void) 2656 { 2657 int cpu = smp_processor_id(); 2658 int thr; 2659 2660 /* Are we on a primary subcore? */ 2661 if (cpu_thread_in_subcore(cpu)) 2662 return 0; 2663 2664 thr = 0; 2665 while (++thr < threads_per_subcore) 2666 if (cpu_online(cpu + thr)) 2667 return 0; 2668 2669 /* Grab all hw threads so they can't go into the kernel */ 2670 for (thr = 1; thr < threads_per_subcore; ++thr) { 2671 if (kvmppc_grab_hwthread(cpu + thr)) { 2672 /* Couldn't grab one; let the others go */ 2673 do { 2674 kvmppc_release_hwthread(cpu + thr); 2675 } while (--thr > 0); 2676 return 0; 2677 } 2678 } 2679 return 1; 2680 } 2681 2682 /* 2683 * A list of virtual cores for each physical CPU. 2684 * These are vcores that could run but their runner VCPU tasks are 2685 * (or may be) preempted. 2686 */ 2687 struct preempted_vcore_list { 2688 struct list_head list; 2689 spinlock_t lock; 2690 }; 2691 2692 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2693 2694 static void init_vcore_lists(void) 2695 { 2696 int cpu; 2697 2698 for_each_possible_cpu(cpu) { 2699 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2700 spin_lock_init(&lp->lock); 2701 INIT_LIST_HEAD(&lp->list); 2702 } 2703 } 2704 2705 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2706 { 2707 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2708 2709 vc->vcore_state = VCORE_PREEMPT; 2710 vc->pcpu = smp_processor_id(); 2711 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2712 spin_lock(&lp->lock); 2713 list_add_tail(&vc->preempt_list, &lp->list); 2714 spin_unlock(&lp->lock); 2715 } 2716 2717 /* Start accumulating stolen time */ 2718 kvmppc_core_start_stolen(vc); 2719 } 2720 2721 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2722 { 2723 struct preempted_vcore_list *lp; 2724 2725 kvmppc_core_end_stolen(vc); 2726 if (!list_empty(&vc->preempt_list)) { 2727 lp = &per_cpu(preempted_vcores, vc->pcpu); 2728 spin_lock(&lp->lock); 2729 list_del_init(&vc->preempt_list); 2730 spin_unlock(&lp->lock); 2731 } 2732 vc->vcore_state = VCORE_INACTIVE; 2733 } 2734 2735 /* 2736 * This stores information about the virtual cores currently 2737 * assigned to a physical core. 2738 */ 2739 struct core_info { 2740 int n_subcores; 2741 int max_subcore_threads; 2742 int total_threads; 2743 int subcore_threads[MAX_SUBCORES]; 2744 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2745 }; 2746 2747 /* 2748 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2749 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2750 */ 2751 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2752 2753 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2754 { 2755 memset(cip, 0, sizeof(*cip)); 2756 cip->n_subcores = 1; 2757 cip->max_subcore_threads = vc->num_threads; 2758 cip->total_threads = vc->num_threads; 2759 cip->subcore_threads[0] = vc->num_threads; 2760 cip->vc[0] = vc; 2761 } 2762 2763 static bool subcore_config_ok(int n_subcores, int n_threads) 2764 { 2765 /* 2766 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2767 * split-core mode, with one thread per subcore. 2768 */ 2769 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2770 return n_subcores <= 4 && n_threads == 1; 2771 2772 /* On POWER8, can only dynamically split if unsplit to begin with */ 2773 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2774 return false; 2775 if (n_subcores > MAX_SUBCORES) 2776 return false; 2777 if (n_subcores > 1) { 2778 if (!(dynamic_mt_modes & 2)) 2779 n_subcores = 4; 2780 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2781 return false; 2782 } 2783 2784 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2785 } 2786 2787 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2788 { 2789 vc->entry_exit_map = 0; 2790 vc->in_guest = 0; 2791 vc->napping_threads = 0; 2792 vc->conferring_threads = 0; 2793 vc->tb_offset_applied = 0; 2794 } 2795 2796 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2797 { 2798 int n_threads = vc->num_threads; 2799 int sub; 2800 2801 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2802 return false; 2803 2804 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2805 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2806 return false; 2807 2808 /* Some POWER9 chips require all threads to be in the same MMU mode */ 2809 if (no_mixing_hpt_and_radix && 2810 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm)) 2811 return false; 2812 2813 if (n_threads < cip->max_subcore_threads) 2814 n_threads = cip->max_subcore_threads; 2815 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2816 return false; 2817 cip->max_subcore_threads = n_threads; 2818 2819 sub = cip->n_subcores; 2820 ++cip->n_subcores; 2821 cip->total_threads += vc->num_threads; 2822 cip->subcore_threads[sub] = vc->num_threads; 2823 cip->vc[sub] = vc; 2824 init_vcore_to_run(vc); 2825 list_del_init(&vc->preempt_list); 2826 2827 return true; 2828 } 2829 2830 /* 2831 * Work out whether it is possible to piggyback the execution of 2832 * vcore *pvc onto the execution of the other vcores described in *cip. 2833 */ 2834 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2835 int target_threads) 2836 { 2837 if (cip->total_threads + pvc->num_threads > target_threads) 2838 return false; 2839 2840 return can_dynamic_split(pvc, cip); 2841 } 2842 2843 static void prepare_threads(struct kvmppc_vcore *vc) 2844 { 2845 int i; 2846 struct kvm_vcpu *vcpu; 2847 2848 for_each_runnable_thread(i, vcpu, vc) { 2849 if (signal_pending(vcpu->arch.run_task)) 2850 vcpu->arch.ret = -EINTR; 2851 else if (vcpu->arch.vpa.update_pending || 2852 vcpu->arch.slb_shadow.update_pending || 2853 vcpu->arch.dtl.update_pending) 2854 vcpu->arch.ret = RESUME_GUEST; 2855 else 2856 continue; 2857 kvmppc_remove_runnable(vc, vcpu); 2858 wake_up(&vcpu->arch.cpu_run); 2859 } 2860 } 2861 2862 static void collect_piggybacks(struct core_info *cip, int target_threads) 2863 { 2864 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2865 struct kvmppc_vcore *pvc, *vcnext; 2866 2867 spin_lock(&lp->lock); 2868 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2869 if (!spin_trylock(&pvc->lock)) 2870 continue; 2871 prepare_threads(pvc); 2872 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 2873 list_del_init(&pvc->preempt_list); 2874 if (pvc->runner == NULL) { 2875 pvc->vcore_state = VCORE_INACTIVE; 2876 kvmppc_core_end_stolen(pvc); 2877 } 2878 spin_unlock(&pvc->lock); 2879 continue; 2880 } 2881 if (!can_piggyback(pvc, cip, target_threads)) { 2882 spin_unlock(&pvc->lock); 2883 continue; 2884 } 2885 kvmppc_core_end_stolen(pvc); 2886 pvc->vcore_state = VCORE_PIGGYBACK; 2887 if (cip->total_threads >= target_threads) 2888 break; 2889 } 2890 spin_unlock(&lp->lock); 2891 } 2892 2893 static bool recheck_signals_and_mmu(struct core_info *cip) 2894 { 2895 int sub, i; 2896 struct kvm_vcpu *vcpu; 2897 struct kvmppc_vcore *vc; 2898 2899 for (sub = 0; sub < cip->n_subcores; ++sub) { 2900 vc = cip->vc[sub]; 2901 if (!vc->kvm->arch.mmu_ready) 2902 return true; 2903 for_each_runnable_thread(i, vcpu, vc) 2904 if (signal_pending(vcpu->arch.run_task)) 2905 return true; 2906 } 2907 return false; 2908 } 2909 2910 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2911 { 2912 int still_running = 0, i; 2913 u64 now; 2914 long ret; 2915 struct kvm_vcpu *vcpu; 2916 2917 spin_lock(&vc->lock); 2918 now = get_tb(); 2919 for_each_runnable_thread(i, vcpu, vc) { 2920 /* 2921 * It's safe to unlock the vcore in the loop here, because 2922 * for_each_runnable_thread() is safe against removal of 2923 * the vcpu, and the vcore state is VCORE_EXITING here, 2924 * so any vcpus becoming runnable will have their arch.trap 2925 * set to zero and can't actually run in the guest. 2926 */ 2927 spin_unlock(&vc->lock); 2928 /* cancel pending dec exception if dec is positive */ 2929 if (now < vcpu->arch.dec_expires && 2930 kvmppc_core_pending_dec(vcpu)) 2931 kvmppc_core_dequeue_dec(vcpu); 2932 2933 trace_kvm_guest_exit(vcpu); 2934 2935 ret = RESUME_GUEST; 2936 if (vcpu->arch.trap) 2937 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu, 2938 vcpu->arch.run_task); 2939 2940 vcpu->arch.ret = ret; 2941 vcpu->arch.trap = 0; 2942 2943 spin_lock(&vc->lock); 2944 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 2945 if (vcpu->arch.pending_exceptions) 2946 kvmppc_core_prepare_to_enter(vcpu); 2947 if (vcpu->arch.ceded) 2948 kvmppc_set_timer(vcpu); 2949 else 2950 ++still_running; 2951 } else { 2952 kvmppc_remove_runnable(vc, vcpu); 2953 wake_up(&vcpu->arch.cpu_run); 2954 } 2955 } 2956 if (!is_master) { 2957 if (still_running > 0) { 2958 kvmppc_vcore_preempt(vc); 2959 } else if (vc->runner) { 2960 vc->vcore_state = VCORE_PREEMPT; 2961 kvmppc_core_start_stolen(vc); 2962 } else { 2963 vc->vcore_state = VCORE_INACTIVE; 2964 } 2965 if (vc->n_runnable > 0 && vc->runner == NULL) { 2966 /* make sure there's a candidate runner awake */ 2967 i = -1; 2968 vcpu = next_runnable_thread(vc, &i); 2969 wake_up(&vcpu->arch.cpu_run); 2970 } 2971 } 2972 spin_unlock(&vc->lock); 2973 } 2974 2975 /* 2976 * Clear core from the list of active host cores as we are about to 2977 * enter the guest. Only do this if it is the primary thread of the 2978 * core (not if a subcore) that is entering the guest. 2979 */ 2980 static inline int kvmppc_clear_host_core(unsigned int cpu) 2981 { 2982 int core; 2983 2984 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2985 return 0; 2986 /* 2987 * Memory barrier can be omitted here as we will do a smp_wmb() 2988 * later in kvmppc_start_thread and we need ensure that state is 2989 * visible to other CPUs only after we enter guest. 2990 */ 2991 core = cpu >> threads_shift; 2992 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 2993 return 0; 2994 } 2995 2996 /* 2997 * Advertise this core as an active host core since we exited the guest 2998 * Only need to do this if it is the primary thread of the core that is 2999 * exiting. 3000 */ 3001 static inline int kvmppc_set_host_core(unsigned int cpu) 3002 { 3003 int core; 3004 3005 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3006 return 0; 3007 3008 /* 3009 * Memory barrier can be omitted here because we do a spin_unlock 3010 * immediately after this which provides the memory barrier. 3011 */ 3012 core = cpu >> threads_shift; 3013 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3014 return 0; 3015 } 3016 3017 static void set_irq_happened(int trap) 3018 { 3019 switch (trap) { 3020 case BOOK3S_INTERRUPT_EXTERNAL: 3021 local_paca->irq_happened |= PACA_IRQ_EE; 3022 break; 3023 case BOOK3S_INTERRUPT_H_DOORBELL: 3024 local_paca->irq_happened |= PACA_IRQ_DBELL; 3025 break; 3026 case BOOK3S_INTERRUPT_HMI: 3027 local_paca->irq_happened |= PACA_IRQ_HMI; 3028 break; 3029 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3030 replay_system_reset(); 3031 break; 3032 } 3033 } 3034 3035 /* 3036 * Run a set of guest threads on a physical core. 3037 * Called with vc->lock held. 3038 */ 3039 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3040 { 3041 struct kvm_vcpu *vcpu; 3042 int i; 3043 int srcu_idx; 3044 struct core_info core_info; 3045 struct kvmppc_vcore *pvc; 3046 struct kvm_split_mode split_info, *sip; 3047 int split, subcore_size, active; 3048 int sub; 3049 bool thr0_done; 3050 unsigned long cmd_bit, stat_bit; 3051 int pcpu, thr; 3052 int target_threads; 3053 int controlled_threads; 3054 int trap; 3055 bool is_power8; 3056 bool hpt_on_radix; 3057 3058 /* 3059 * Remove from the list any threads that have a signal pending 3060 * or need a VPA update done 3061 */ 3062 prepare_threads(vc); 3063 3064 /* if the runner is no longer runnable, let the caller pick a new one */ 3065 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3066 return; 3067 3068 /* 3069 * Initialize *vc. 3070 */ 3071 init_vcore_to_run(vc); 3072 vc->preempt_tb = TB_NIL; 3073 3074 /* 3075 * Number of threads that we will be controlling: the same as 3076 * the number of threads per subcore, except on POWER9, 3077 * where it's 1 because the threads are (mostly) independent. 3078 */ 3079 controlled_threads = threads_per_vcore(vc->kvm); 3080 3081 /* 3082 * Make sure we are running on primary threads, and that secondary 3083 * threads are offline. Also check if the number of threads in this 3084 * guest are greater than the current system threads per guest. 3085 * On POWER9, we need to be not in independent-threads mode if 3086 * this is a HPT guest on a radix host machine where the 3087 * CPU threads may not be in different MMU modes. 3088 */ 3089 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() && 3090 !kvm_is_radix(vc->kvm); 3091 if (((controlled_threads > 1) && 3092 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) || 3093 (hpt_on_radix && vc->kvm->arch.threads_indep)) { 3094 for_each_runnable_thread(i, vcpu, vc) { 3095 vcpu->arch.ret = -EBUSY; 3096 kvmppc_remove_runnable(vc, vcpu); 3097 wake_up(&vcpu->arch.cpu_run); 3098 } 3099 goto out; 3100 } 3101 3102 /* 3103 * See if we could run any other vcores on the physical core 3104 * along with this one. 3105 */ 3106 init_core_info(&core_info, vc); 3107 pcpu = smp_processor_id(); 3108 target_threads = controlled_threads; 3109 if (target_smt_mode && target_smt_mode < target_threads) 3110 target_threads = target_smt_mode; 3111 if (vc->num_threads < target_threads) 3112 collect_piggybacks(&core_info, target_threads); 3113 3114 /* 3115 * On radix, arrange for TLB flushing if necessary. 3116 * This has to be done before disabling interrupts since 3117 * it uses smp_call_function(). 3118 */ 3119 pcpu = smp_processor_id(); 3120 if (kvm_is_radix(vc->kvm)) { 3121 for (sub = 0; sub < core_info.n_subcores; ++sub) 3122 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3123 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3124 } 3125 3126 /* 3127 * Hard-disable interrupts, and check resched flag and signals. 3128 * If we need to reschedule or deliver a signal, clean up 3129 * and return without going into the guest(s). 3130 * If the mmu_ready flag has been cleared, don't go into the 3131 * guest because that means a HPT resize operation is in progress. 3132 */ 3133 local_irq_disable(); 3134 hard_irq_disable(); 3135 if (lazy_irq_pending() || need_resched() || 3136 recheck_signals_and_mmu(&core_info)) { 3137 local_irq_enable(); 3138 vc->vcore_state = VCORE_INACTIVE; 3139 /* Unlock all except the primary vcore */ 3140 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3141 pvc = core_info.vc[sub]; 3142 /* Put back on to the preempted vcores list */ 3143 kvmppc_vcore_preempt(pvc); 3144 spin_unlock(&pvc->lock); 3145 } 3146 for (i = 0; i < controlled_threads; ++i) 3147 kvmppc_release_hwthread(pcpu + i); 3148 return; 3149 } 3150 3151 kvmppc_clear_host_core(pcpu); 3152 3153 /* Decide on micro-threading (split-core) mode */ 3154 subcore_size = threads_per_subcore; 3155 cmd_bit = stat_bit = 0; 3156 split = core_info.n_subcores; 3157 sip = NULL; 3158 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3159 && !cpu_has_feature(CPU_FTR_ARCH_300); 3160 3161 if (split > 1 || hpt_on_radix) { 3162 sip = &split_info; 3163 memset(&split_info, 0, sizeof(split_info)); 3164 for (sub = 0; sub < core_info.n_subcores; ++sub) 3165 split_info.vc[sub] = core_info.vc[sub]; 3166 3167 if (is_power8) { 3168 if (split == 2 && (dynamic_mt_modes & 2)) { 3169 cmd_bit = HID0_POWER8_1TO2LPAR; 3170 stat_bit = HID0_POWER8_2LPARMODE; 3171 } else { 3172 split = 4; 3173 cmd_bit = HID0_POWER8_1TO4LPAR; 3174 stat_bit = HID0_POWER8_4LPARMODE; 3175 } 3176 subcore_size = MAX_SMT_THREADS / split; 3177 split_info.rpr = mfspr(SPRN_RPR); 3178 split_info.pmmar = mfspr(SPRN_PMMAR); 3179 split_info.ldbar = mfspr(SPRN_LDBAR); 3180 split_info.subcore_size = subcore_size; 3181 } else { 3182 split_info.subcore_size = 1; 3183 if (hpt_on_radix) { 3184 /* Use the split_info for LPCR/LPIDR changes */ 3185 split_info.lpcr_req = vc->lpcr; 3186 split_info.lpidr_req = vc->kvm->arch.lpid; 3187 split_info.host_lpcr = vc->kvm->arch.host_lpcr; 3188 split_info.do_set = 1; 3189 } 3190 } 3191 3192 /* order writes to split_info before kvm_split_mode pointer */ 3193 smp_wmb(); 3194 } 3195 3196 for (thr = 0; thr < controlled_threads; ++thr) { 3197 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3198 3199 paca->kvm_hstate.tid = thr; 3200 paca->kvm_hstate.napping = 0; 3201 paca->kvm_hstate.kvm_split_mode = sip; 3202 } 3203 3204 /* Initiate micro-threading (split-core) on POWER8 if required */ 3205 if (cmd_bit) { 3206 unsigned long hid0 = mfspr(SPRN_HID0); 3207 3208 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3209 mb(); 3210 mtspr(SPRN_HID0, hid0); 3211 isync(); 3212 for (;;) { 3213 hid0 = mfspr(SPRN_HID0); 3214 if (hid0 & stat_bit) 3215 break; 3216 cpu_relax(); 3217 } 3218 } 3219 3220 /* 3221 * On POWER8, set RWMR register. 3222 * Since it only affects PURR and SPURR, it doesn't affect 3223 * the host, so we don't save/restore the host value. 3224 */ 3225 if (is_power8) { 3226 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3227 int n_online = atomic_read(&vc->online_count); 3228 3229 /* 3230 * Use the 8-thread value if we're doing split-core 3231 * or if the vcore's online count looks bogus. 3232 */ 3233 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3234 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3235 rwmr_val = p8_rwmr_values[n_online]; 3236 mtspr(SPRN_RWMR, rwmr_val); 3237 } 3238 3239 /* Start all the threads */ 3240 active = 0; 3241 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3242 thr = is_power8 ? subcore_thread_map[sub] : sub; 3243 thr0_done = false; 3244 active |= 1 << thr; 3245 pvc = core_info.vc[sub]; 3246 pvc->pcpu = pcpu + thr; 3247 for_each_runnable_thread(i, vcpu, pvc) { 3248 kvmppc_start_thread(vcpu, pvc); 3249 kvmppc_create_dtl_entry(vcpu, pvc); 3250 trace_kvm_guest_enter(vcpu); 3251 if (!vcpu->arch.ptid) 3252 thr0_done = true; 3253 active |= 1 << (thr + vcpu->arch.ptid); 3254 } 3255 /* 3256 * We need to start the first thread of each subcore 3257 * even if it doesn't have a vcpu. 3258 */ 3259 if (!thr0_done) 3260 kvmppc_start_thread(NULL, pvc); 3261 } 3262 3263 /* 3264 * Ensure that split_info.do_nap is set after setting 3265 * the vcore pointer in the PACA of the secondaries. 3266 */ 3267 smp_mb(); 3268 3269 /* 3270 * When doing micro-threading, poke the inactive threads as well. 3271 * This gets them to the nap instruction after kvm_do_nap, 3272 * which reduces the time taken to unsplit later. 3273 * For POWER9 HPT guest on radix host, we need all the secondary 3274 * threads woken up so they can do the LPCR/LPIDR change. 3275 */ 3276 if (cmd_bit || hpt_on_radix) { 3277 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3278 for (thr = 1; thr < threads_per_subcore; ++thr) 3279 if (!(active & (1 << thr))) 3280 kvmppc_ipi_thread(pcpu + thr); 3281 } 3282 3283 vc->vcore_state = VCORE_RUNNING; 3284 preempt_disable(); 3285 3286 trace_kvmppc_run_core(vc, 0); 3287 3288 for (sub = 0; sub < core_info.n_subcores; ++sub) 3289 spin_unlock(&core_info.vc[sub]->lock); 3290 3291 guest_enter_irqoff(); 3292 3293 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3294 3295 this_cpu_disable_ftrace(); 3296 3297 /* 3298 * Interrupts will be enabled once we get into the guest, 3299 * so tell lockdep that we're about to enable interrupts. 3300 */ 3301 trace_hardirqs_on(); 3302 3303 trap = __kvmppc_vcore_entry(); 3304 3305 trace_hardirqs_off(); 3306 3307 this_cpu_enable_ftrace(); 3308 3309 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3310 3311 set_irq_happened(trap); 3312 3313 spin_lock(&vc->lock); 3314 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3315 vc->vcore_state = VCORE_EXITING; 3316 3317 /* wait for secondary threads to finish writing their state to memory */ 3318 kvmppc_wait_for_nap(controlled_threads); 3319 3320 /* Return to whole-core mode if we split the core earlier */ 3321 if (cmd_bit) { 3322 unsigned long hid0 = mfspr(SPRN_HID0); 3323 unsigned long loops = 0; 3324 3325 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3326 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3327 mb(); 3328 mtspr(SPRN_HID0, hid0); 3329 isync(); 3330 for (;;) { 3331 hid0 = mfspr(SPRN_HID0); 3332 if (!(hid0 & stat_bit)) 3333 break; 3334 cpu_relax(); 3335 ++loops; 3336 } 3337 } else if (hpt_on_radix) { 3338 /* Wait for all threads to have seen final sync */ 3339 for (thr = 1; thr < controlled_threads; ++thr) { 3340 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3341 3342 while (paca->kvm_hstate.kvm_split_mode) { 3343 HMT_low(); 3344 barrier(); 3345 } 3346 HMT_medium(); 3347 } 3348 } 3349 split_info.do_nap = 0; 3350 3351 kvmppc_set_host_core(pcpu); 3352 3353 local_irq_enable(); 3354 guest_exit(); 3355 3356 /* Let secondaries go back to the offline loop */ 3357 for (i = 0; i < controlled_threads; ++i) { 3358 kvmppc_release_hwthread(pcpu + i); 3359 if (sip && sip->napped[i]) 3360 kvmppc_ipi_thread(pcpu + i); 3361 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3362 } 3363 3364 spin_unlock(&vc->lock); 3365 3366 /* make sure updates to secondary vcpu structs are visible now */ 3367 smp_mb(); 3368 3369 preempt_enable(); 3370 3371 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3372 pvc = core_info.vc[sub]; 3373 post_guest_process(pvc, pvc == vc); 3374 } 3375 3376 spin_lock(&vc->lock); 3377 3378 out: 3379 vc->vcore_state = VCORE_INACTIVE; 3380 trace_kvmppc_run_core(vc, 1); 3381 } 3382 3383 /* 3384 * Load up hypervisor-mode registers on P9. 3385 */ 3386 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3387 unsigned long lpcr) 3388 { 3389 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3390 s64 hdec; 3391 u64 tb, purr, spurr; 3392 int trap; 3393 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3394 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3395 unsigned long host_dawr = mfspr(SPRN_DAWR); 3396 unsigned long host_dawrx = mfspr(SPRN_DAWRX); 3397 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3398 unsigned long host_pidr = mfspr(SPRN_PID); 3399 3400 hdec = time_limit - mftb(); 3401 if (hdec < 0) 3402 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3403 mtspr(SPRN_HDEC, hdec); 3404 3405 if (vc->tb_offset) { 3406 u64 new_tb = mftb() + vc->tb_offset; 3407 mtspr(SPRN_TBU40, new_tb); 3408 tb = mftb(); 3409 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3410 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3411 vc->tb_offset_applied = vc->tb_offset; 3412 } 3413 3414 if (vc->pcr) 3415 mtspr(SPRN_PCR, vc->pcr | PCR_MASK); 3416 mtspr(SPRN_DPDES, vc->dpdes); 3417 mtspr(SPRN_VTB, vc->vtb); 3418 3419 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3420 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3421 mtspr(SPRN_PURR, vcpu->arch.purr); 3422 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3423 3424 if (dawr_enabled()) { 3425 mtspr(SPRN_DAWR, vcpu->arch.dawr); 3426 mtspr(SPRN_DAWRX, vcpu->arch.dawrx); 3427 } 3428 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3429 mtspr(SPRN_IC, vcpu->arch.ic); 3430 mtspr(SPRN_PID, vcpu->arch.pid); 3431 3432 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3433 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3434 3435 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3436 3437 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3438 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3439 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3440 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3441 3442 mtspr(SPRN_AMOR, ~0UL); 3443 3444 mtspr(SPRN_LPCR, lpcr); 3445 isync(); 3446 3447 kvmppc_xive_push_vcpu(vcpu); 3448 3449 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3450 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3451 3452 trap = __kvmhv_vcpu_entry_p9(vcpu); 3453 3454 /* Advance host PURR/SPURR by the amount used by guest */ 3455 purr = mfspr(SPRN_PURR); 3456 spurr = mfspr(SPRN_SPURR); 3457 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3458 purr - vcpu->arch.purr); 3459 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3460 spurr - vcpu->arch.spurr); 3461 vcpu->arch.purr = purr; 3462 vcpu->arch.spurr = spurr; 3463 3464 vcpu->arch.ic = mfspr(SPRN_IC); 3465 vcpu->arch.pid = mfspr(SPRN_PID); 3466 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3467 3468 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3469 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3470 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3471 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3472 3473 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */ 3474 mtspr(SPRN_PSSCR, host_psscr | 3475 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3476 mtspr(SPRN_HFSCR, host_hfscr); 3477 mtspr(SPRN_CIABR, host_ciabr); 3478 mtspr(SPRN_DAWR, host_dawr); 3479 mtspr(SPRN_DAWRX, host_dawrx); 3480 mtspr(SPRN_PID, host_pidr); 3481 3482 /* 3483 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3484 * case we interrupted the guest between a tlbie and a ptesync. 3485 */ 3486 asm volatile("eieio; tlbsync; ptesync"); 3487 3488 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3489 isync(); 3490 3491 vc->dpdes = mfspr(SPRN_DPDES); 3492 vc->vtb = mfspr(SPRN_VTB); 3493 mtspr(SPRN_DPDES, 0); 3494 if (vc->pcr) 3495 mtspr(SPRN_PCR, PCR_MASK); 3496 3497 if (vc->tb_offset_applied) { 3498 u64 new_tb = mftb() - vc->tb_offset_applied; 3499 mtspr(SPRN_TBU40, new_tb); 3500 tb = mftb(); 3501 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3502 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3503 vc->tb_offset_applied = 0; 3504 } 3505 3506 mtspr(SPRN_HDEC, 0x7fffffff); 3507 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3508 3509 return trap; 3510 } 3511 3512 /* 3513 * Virtual-mode guest entry for POWER9 and later when the host and 3514 * guest are both using the radix MMU. The LPIDR has already been set. 3515 */ 3516 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3517 unsigned long lpcr) 3518 { 3519 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3520 unsigned long host_dscr = mfspr(SPRN_DSCR); 3521 unsigned long host_tidr = mfspr(SPRN_TIDR); 3522 unsigned long host_iamr = mfspr(SPRN_IAMR); 3523 unsigned long host_amr = mfspr(SPRN_AMR); 3524 s64 dec; 3525 u64 tb; 3526 int trap, save_pmu; 3527 3528 dec = mfspr(SPRN_DEC); 3529 tb = mftb(); 3530 if (dec < 512) 3531 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3532 local_paca->kvm_hstate.dec_expires = dec + tb; 3533 if (local_paca->kvm_hstate.dec_expires < time_limit) 3534 time_limit = local_paca->kvm_hstate.dec_expires; 3535 3536 vcpu->arch.ceded = 0; 3537 3538 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3539 3540 kvmppc_subcore_enter_guest(); 3541 3542 vc->entry_exit_map = 1; 3543 vc->in_guest = 1; 3544 3545 if (vcpu->arch.vpa.pinned_addr) { 3546 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3547 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3548 lp->yield_count = cpu_to_be32(yield_count); 3549 vcpu->arch.vpa.dirty = 1; 3550 } 3551 3552 if (cpu_has_feature(CPU_FTR_TM) || 3553 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3554 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3555 3556 kvmhv_load_guest_pmu(vcpu); 3557 3558 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3559 load_fp_state(&vcpu->arch.fp); 3560 #ifdef CONFIG_ALTIVEC 3561 load_vr_state(&vcpu->arch.vr); 3562 #endif 3563 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3564 3565 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3566 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3567 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3568 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3569 mtspr(SPRN_TAR, vcpu->arch.tar); 3570 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3571 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3572 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3573 mtspr(SPRN_WORT, vcpu->arch.wort); 3574 mtspr(SPRN_TIDR, vcpu->arch.tid); 3575 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3576 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3577 mtspr(SPRN_AMR, vcpu->arch.amr); 3578 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3579 3580 if (!(vcpu->arch.ctrl & 1)) 3581 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3582 3583 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3584 3585 if (kvmhv_on_pseries()) { 3586 /* 3587 * We need to save and restore the guest visible part of the 3588 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3589 * doesn't do this for us. Note only required if pseries since 3590 * this is done in kvmhv_load_hv_regs_and_go() below otherwise. 3591 */ 3592 unsigned long host_psscr; 3593 /* call our hypervisor to load up HV regs and go */ 3594 struct hv_guest_state hvregs; 3595 3596 host_psscr = mfspr(SPRN_PSSCR_PR); 3597 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3598 kvmhv_save_hv_regs(vcpu, &hvregs); 3599 hvregs.lpcr = lpcr; 3600 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3601 hvregs.version = HV_GUEST_STATE_VERSION; 3602 if (vcpu->arch.nested) { 3603 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3604 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3605 } else { 3606 hvregs.lpid = vcpu->kvm->arch.lpid; 3607 hvregs.vcpu_token = vcpu->vcpu_id; 3608 } 3609 hvregs.hdec_expiry = time_limit; 3610 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3611 __pa(&vcpu->arch.regs)); 3612 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3613 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3614 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3615 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3616 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3617 mtspr(SPRN_PSSCR_PR, host_psscr); 3618 3619 /* H_CEDE has to be handled now, not later */ 3620 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3621 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3622 kvmppc_nested_cede(vcpu); 3623 kvmppc_set_gpr(vcpu, 3, 0); 3624 trap = 0; 3625 } 3626 } else { 3627 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3628 } 3629 3630 vcpu->arch.slb_max = 0; 3631 dec = mfspr(SPRN_DEC); 3632 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 3633 dec = (s32) dec; 3634 tb = mftb(); 3635 vcpu->arch.dec_expires = dec + tb; 3636 vcpu->cpu = -1; 3637 vcpu->arch.thread_cpu = -1; 3638 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3639 3640 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3641 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3642 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3643 vcpu->arch.tar = mfspr(SPRN_TAR); 3644 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3645 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3646 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3647 vcpu->arch.wort = mfspr(SPRN_WORT); 3648 vcpu->arch.tid = mfspr(SPRN_TIDR); 3649 vcpu->arch.amr = mfspr(SPRN_AMR); 3650 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3651 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3652 3653 mtspr(SPRN_PSPB, 0); 3654 mtspr(SPRN_WORT, 0); 3655 mtspr(SPRN_UAMOR, 0); 3656 mtspr(SPRN_DSCR, host_dscr); 3657 mtspr(SPRN_TIDR, host_tidr); 3658 mtspr(SPRN_IAMR, host_iamr); 3659 mtspr(SPRN_PSPB, 0); 3660 3661 if (host_amr != vcpu->arch.amr) 3662 mtspr(SPRN_AMR, host_amr); 3663 3664 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3665 store_fp_state(&vcpu->arch.fp); 3666 #ifdef CONFIG_ALTIVEC 3667 store_vr_state(&vcpu->arch.vr); 3668 #endif 3669 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3670 3671 if (cpu_has_feature(CPU_FTR_TM) || 3672 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3673 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3674 3675 save_pmu = 1; 3676 if (vcpu->arch.vpa.pinned_addr) { 3677 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3678 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3679 lp->yield_count = cpu_to_be32(yield_count); 3680 vcpu->arch.vpa.dirty = 1; 3681 save_pmu = lp->pmcregs_in_use; 3682 } 3683 /* Must save pmu if this guest is capable of running nested guests */ 3684 save_pmu |= nesting_enabled(vcpu->kvm); 3685 3686 kvmhv_save_guest_pmu(vcpu, save_pmu); 3687 3688 vc->entry_exit_map = 0x101; 3689 vc->in_guest = 0; 3690 3691 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3692 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso); 3693 3694 kvmhv_load_host_pmu(); 3695 3696 kvmppc_subcore_exit_guest(); 3697 3698 return trap; 3699 } 3700 3701 /* 3702 * Wait for some other vcpu thread to execute us, and 3703 * wake us up when we need to handle something in the host. 3704 */ 3705 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3706 struct kvm_vcpu *vcpu, int wait_state) 3707 { 3708 DEFINE_WAIT(wait); 3709 3710 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3711 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3712 spin_unlock(&vc->lock); 3713 schedule(); 3714 spin_lock(&vc->lock); 3715 } 3716 finish_wait(&vcpu->arch.cpu_run, &wait); 3717 } 3718 3719 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3720 { 3721 if (!halt_poll_ns_grow) 3722 return; 3723 3724 vc->halt_poll_ns *= halt_poll_ns_grow; 3725 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 3726 vc->halt_poll_ns = halt_poll_ns_grow_start; 3727 } 3728 3729 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3730 { 3731 if (halt_poll_ns_shrink == 0) 3732 vc->halt_poll_ns = 0; 3733 else 3734 vc->halt_poll_ns /= halt_poll_ns_shrink; 3735 } 3736 3737 #ifdef CONFIG_KVM_XICS 3738 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3739 { 3740 if (!xics_on_xive()) 3741 return false; 3742 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3743 vcpu->arch.xive_saved_state.cppr; 3744 } 3745 #else 3746 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3747 { 3748 return false; 3749 } 3750 #endif /* CONFIG_KVM_XICS */ 3751 3752 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3753 { 3754 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3755 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3756 return true; 3757 3758 return false; 3759 } 3760 3761 /* 3762 * Check to see if any of the runnable vcpus on the vcore have pending 3763 * exceptions or are no longer ceded 3764 */ 3765 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3766 { 3767 struct kvm_vcpu *vcpu; 3768 int i; 3769 3770 for_each_runnable_thread(i, vcpu, vc) { 3771 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3772 return 1; 3773 } 3774 3775 return 0; 3776 } 3777 3778 /* 3779 * All the vcpus in this vcore are idle, so wait for a decrementer 3780 * or external interrupt to one of the vcpus. vc->lock is held. 3781 */ 3782 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3783 { 3784 ktime_t cur, start_poll, start_wait; 3785 int do_sleep = 1; 3786 u64 block_ns; 3787 DECLARE_SWAITQUEUE(wait); 3788 3789 /* Poll for pending exceptions and ceded state */ 3790 cur = start_poll = ktime_get(); 3791 if (vc->halt_poll_ns) { 3792 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3793 ++vc->runner->stat.halt_attempted_poll; 3794 3795 vc->vcore_state = VCORE_POLLING; 3796 spin_unlock(&vc->lock); 3797 3798 do { 3799 if (kvmppc_vcore_check_block(vc)) { 3800 do_sleep = 0; 3801 break; 3802 } 3803 cur = ktime_get(); 3804 } while (single_task_running() && ktime_before(cur, stop)); 3805 3806 spin_lock(&vc->lock); 3807 vc->vcore_state = VCORE_INACTIVE; 3808 3809 if (!do_sleep) { 3810 ++vc->runner->stat.halt_successful_poll; 3811 goto out; 3812 } 3813 } 3814 3815 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE); 3816 3817 if (kvmppc_vcore_check_block(vc)) { 3818 finish_swait(&vc->wq, &wait); 3819 do_sleep = 0; 3820 /* If we polled, count this as a successful poll */ 3821 if (vc->halt_poll_ns) 3822 ++vc->runner->stat.halt_successful_poll; 3823 goto out; 3824 } 3825 3826 start_wait = ktime_get(); 3827 3828 vc->vcore_state = VCORE_SLEEPING; 3829 trace_kvmppc_vcore_blocked(vc, 0); 3830 spin_unlock(&vc->lock); 3831 schedule(); 3832 finish_swait(&vc->wq, &wait); 3833 spin_lock(&vc->lock); 3834 vc->vcore_state = VCORE_INACTIVE; 3835 trace_kvmppc_vcore_blocked(vc, 1); 3836 ++vc->runner->stat.halt_successful_wait; 3837 3838 cur = ktime_get(); 3839 3840 out: 3841 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3842 3843 /* Attribute wait time */ 3844 if (do_sleep) { 3845 vc->runner->stat.halt_wait_ns += 3846 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3847 /* Attribute failed poll time */ 3848 if (vc->halt_poll_ns) 3849 vc->runner->stat.halt_poll_fail_ns += 3850 ktime_to_ns(start_wait) - 3851 ktime_to_ns(start_poll); 3852 } else { 3853 /* Attribute successful poll time */ 3854 if (vc->halt_poll_ns) 3855 vc->runner->stat.halt_poll_success_ns += 3856 ktime_to_ns(cur) - 3857 ktime_to_ns(start_poll); 3858 } 3859 3860 /* Adjust poll time */ 3861 if (halt_poll_ns) { 3862 if (block_ns <= vc->halt_poll_ns) 3863 ; 3864 /* We slept and blocked for longer than the max halt time */ 3865 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3866 shrink_halt_poll_ns(vc); 3867 /* We slept and our poll time is too small */ 3868 else if (vc->halt_poll_ns < halt_poll_ns && 3869 block_ns < halt_poll_ns) 3870 grow_halt_poll_ns(vc); 3871 if (vc->halt_poll_ns > halt_poll_ns) 3872 vc->halt_poll_ns = halt_poll_ns; 3873 } else 3874 vc->halt_poll_ns = 0; 3875 3876 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3877 } 3878 3879 /* 3880 * This never fails for a radix guest, as none of the operations it does 3881 * for a radix guest can fail or have a way to report failure. 3882 * kvmhv_run_single_vcpu() relies on this fact. 3883 */ 3884 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3885 { 3886 int r = 0; 3887 struct kvm *kvm = vcpu->kvm; 3888 3889 mutex_lock(&kvm->arch.mmu_setup_lock); 3890 if (!kvm->arch.mmu_ready) { 3891 if (!kvm_is_radix(kvm)) 3892 r = kvmppc_hv_setup_htab_rma(vcpu); 3893 if (!r) { 3894 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3895 kvmppc_setup_partition_table(kvm); 3896 kvm->arch.mmu_ready = 1; 3897 } 3898 } 3899 mutex_unlock(&kvm->arch.mmu_setup_lock); 3900 return r; 3901 } 3902 3903 static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 3904 { 3905 int n_ceded, i, r; 3906 struct kvmppc_vcore *vc; 3907 struct kvm_vcpu *v; 3908 3909 trace_kvmppc_run_vcpu_enter(vcpu); 3910 3911 kvm_run->exit_reason = 0; 3912 vcpu->arch.ret = RESUME_GUEST; 3913 vcpu->arch.trap = 0; 3914 kvmppc_update_vpas(vcpu); 3915 3916 /* 3917 * Synchronize with other threads in this virtual core 3918 */ 3919 vc = vcpu->arch.vcore; 3920 spin_lock(&vc->lock); 3921 vcpu->arch.ceded = 0; 3922 vcpu->arch.run_task = current; 3923 vcpu->arch.kvm_run = kvm_run; 3924 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3925 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3926 vcpu->arch.busy_preempt = TB_NIL; 3927 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 3928 ++vc->n_runnable; 3929 3930 /* 3931 * This happens the first time this is called for a vcpu. 3932 * If the vcore is already running, we may be able to start 3933 * this thread straight away and have it join in. 3934 */ 3935 if (!signal_pending(current)) { 3936 if ((vc->vcore_state == VCORE_PIGGYBACK || 3937 vc->vcore_state == VCORE_RUNNING) && 3938 !VCORE_IS_EXITING(vc)) { 3939 kvmppc_create_dtl_entry(vcpu, vc); 3940 kvmppc_start_thread(vcpu, vc); 3941 trace_kvm_guest_enter(vcpu); 3942 } else if (vc->vcore_state == VCORE_SLEEPING) { 3943 swake_up_one(&vc->wq); 3944 } 3945 3946 } 3947 3948 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3949 !signal_pending(current)) { 3950 /* See if the MMU is ready to go */ 3951 if (!vcpu->kvm->arch.mmu_ready) { 3952 spin_unlock(&vc->lock); 3953 r = kvmhv_setup_mmu(vcpu); 3954 spin_lock(&vc->lock); 3955 if (r) { 3956 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; 3957 kvm_run->fail_entry. 3958 hardware_entry_failure_reason = 0; 3959 vcpu->arch.ret = r; 3960 break; 3961 } 3962 } 3963 3964 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3965 kvmppc_vcore_end_preempt(vc); 3966 3967 if (vc->vcore_state != VCORE_INACTIVE) { 3968 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 3969 continue; 3970 } 3971 for_each_runnable_thread(i, v, vc) { 3972 kvmppc_core_prepare_to_enter(v); 3973 if (signal_pending(v->arch.run_task)) { 3974 kvmppc_remove_runnable(vc, v); 3975 v->stat.signal_exits++; 3976 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR; 3977 v->arch.ret = -EINTR; 3978 wake_up(&v->arch.cpu_run); 3979 } 3980 } 3981 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 3982 break; 3983 n_ceded = 0; 3984 for_each_runnable_thread(i, v, vc) { 3985 if (!kvmppc_vcpu_woken(v)) 3986 n_ceded += v->arch.ceded; 3987 else 3988 v->arch.ceded = 0; 3989 } 3990 vc->runner = vcpu; 3991 if (n_ceded == vc->n_runnable) { 3992 kvmppc_vcore_blocked(vc); 3993 } else if (need_resched()) { 3994 kvmppc_vcore_preempt(vc); 3995 /* Let something else run */ 3996 cond_resched_lock(&vc->lock); 3997 if (vc->vcore_state == VCORE_PREEMPT) 3998 kvmppc_vcore_end_preempt(vc); 3999 } else { 4000 kvmppc_run_core(vc); 4001 } 4002 vc->runner = NULL; 4003 } 4004 4005 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4006 (vc->vcore_state == VCORE_RUNNING || 4007 vc->vcore_state == VCORE_EXITING || 4008 vc->vcore_state == VCORE_PIGGYBACK)) 4009 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4010 4011 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4012 kvmppc_vcore_end_preempt(vc); 4013 4014 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4015 kvmppc_remove_runnable(vc, vcpu); 4016 vcpu->stat.signal_exits++; 4017 kvm_run->exit_reason = KVM_EXIT_INTR; 4018 vcpu->arch.ret = -EINTR; 4019 } 4020 4021 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4022 /* Wake up some vcpu to run the core */ 4023 i = -1; 4024 v = next_runnable_thread(vc, &i); 4025 wake_up(&v->arch.cpu_run); 4026 } 4027 4028 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4029 spin_unlock(&vc->lock); 4030 return vcpu->arch.ret; 4031 } 4032 4033 int kvmhv_run_single_vcpu(struct kvm_run *kvm_run, 4034 struct kvm_vcpu *vcpu, u64 time_limit, 4035 unsigned long lpcr) 4036 { 4037 int trap, r, pcpu; 4038 int srcu_idx, lpid; 4039 struct kvmppc_vcore *vc; 4040 struct kvm *kvm = vcpu->kvm; 4041 struct kvm_nested_guest *nested = vcpu->arch.nested; 4042 4043 trace_kvmppc_run_vcpu_enter(vcpu); 4044 4045 kvm_run->exit_reason = 0; 4046 vcpu->arch.ret = RESUME_GUEST; 4047 vcpu->arch.trap = 0; 4048 4049 vc = vcpu->arch.vcore; 4050 vcpu->arch.ceded = 0; 4051 vcpu->arch.run_task = current; 4052 vcpu->arch.kvm_run = kvm_run; 4053 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4054 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4055 vcpu->arch.busy_preempt = TB_NIL; 4056 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4057 vc->runnable_threads[0] = vcpu; 4058 vc->n_runnable = 1; 4059 vc->runner = vcpu; 4060 4061 /* See if the MMU is ready to go */ 4062 if (!kvm->arch.mmu_ready) 4063 kvmhv_setup_mmu(vcpu); 4064 4065 if (need_resched()) 4066 cond_resched(); 4067 4068 kvmppc_update_vpas(vcpu); 4069 4070 init_vcore_to_run(vc); 4071 vc->preempt_tb = TB_NIL; 4072 4073 preempt_disable(); 4074 pcpu = smp_processor_id(); 4075 vc->pcpu = pcpu; 4076 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4077 4078 local_irq_disable(); 4079 hard_irq_disable(); 4080 if (signal_pending(current)) 4081 goto sigpend; 4082 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4083 goto out; 4084 4085 if (!nested) { 4086 kvmppc_core_prepare_to_enter(vcpu); 4087 if (vcpu->arch.doorbell_request) { 4088 vc->dpdes = 1; 4089 smp_wmb(); 4090 vcpu->arch.doorbell_request = 0; 4091 } 4092 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4093 &vcpu->arch.pending_exceptions)) 4094 lpcr |= LPCR_MER; 4095 } else if (vcpu->arch.pending_exceptions || 4096 vcpu->arch.doorbell_request || 4097 xive_interrupt_pending(vcpu)) { 4098 vcpu->arch.ret = RESUME_HOST; 4099 goto out; 4100 } 4101 4102 kvmppc_clear_host_core(pcpu); 4103 4104 local_paca->kvm_hstate.tid = 0; 4105 local_paca->kvm_hstate.napping = 0; 4106 local_paca->kvm_hstate.kvm_split_mode = NULL; 4107 kvmppc_start_thread(vcpu, vc); 4108 kvmppc_create_dtl_entry(vcpu, vc); 4109 trace_kvm_guest_enter(vcpu); 4110 4111 vc->vcore_state = VCORE_RUNNING; 4112 trace_kvmppc_run_core(vc, 0); 4113 4114 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4115 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid; 4116 mtspr(SPRN_LPID, lpid); 4117 isync(); 4118 kvmppc_check_need_tlb_flush(kvm, pcpu, nested); 4119 } 4120 4121 guest_enter_irqoff(); 4122 4123 srcu_idx = srcu_read_lock(&kvm->srcu); 4124 4125 this_cpu_disable_ftrace(); 4126 4127 /* Tell lockdep that we're about to enable interrupts */ 4128 trace_hardirqs_on(); 4129 4130 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4131 vcpu->arch.trap = trap; 4132 4133 trace_hardirqs_off(); 4134 4135 this_cpu_enable_ftrace(); 4136 4137 srcu_read_unlock(&kvm->srcu, srcu_idx); 4138 4139 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4140 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4141 isync(); 4142 } 4143 4144 set_irq_happened(trap); 4145 4146 kvmppc_set_host_core(pcpu); 4147 4148 local_irq_enable(); 4149 guest_exit(); 4150 4151 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4152 4153 preempt_enable(); 4154 4155 /* 4156 * cancel pending decrementer exception if DEC is now positive, or if 4157 * entering a nested guest in which case the decrementer is now owned 4158 * by L2 and the L1 decrementer is provided in hdec_expires 4159 */ 4160 if (kvmppc_core_pending_dec(vcpu) && 4161 ((get_tb() < vcpu->arch.dec_expires) || 4162 (trap == BOOK3S_INTERRUPT_SYSCALL && 4163 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4164 kvmppc_core_dequeue_dec(vcpu); 4165 4166 trace_kvm_guest_exit(vcpu); 4167 r = RESUME_GUEST; 4168 if (trap) { 4169 if (!nested) 4170 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current); 4171 else 4172 r = kvmppc_handle_nested_exit(kvm_run, vcpu); 4173 } 4174 vcpu->arch.ret = r; 4175 4176 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4177 !kvmppc_vcpu_woken(vcpu)) { 4178 kvmppc_set_timer(vcpu); 4179 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4180 if (signal_pending(current)) { 4181 vcpu->stat.signal_exits++; 4182 kvm_run->exit_reason = KVM_EXIT_INTR; 4183 vcpu->arch.ret = -EINTR; 4184 break; 4185 } 4186 spin_lock(&vc->lock); 4187 kvmppc_vcore_blocked(vc); 4188 spin_unlock(&vc->lock); 4189 } 4190 } 4191 vcpu->arch.ceded = 0; 4192 4193 vc->vcore_state = VCORE_INACTIVE; 4194 trace_kvmppc_run_core(vc, 1); 4195 4196 done: 4197 kvmppc_remove_runnable(vc, vcpu); 4198 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4199 4200 return vcpu->arch.ret; 4201 4202 sigpend: 4203 vcpu->stat.signal_exits++; 4204 kvm_run->exit_reason = KVM_EXIT_INTR; 4205 vcpu->arch.ret = -EINTR; 4206 out: 4207 local_irq_enable(); 4208 preempt_enable(); 4209 goto done; 4210 } 4211 4212 static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu) 4213 { 4214 int r; 4215 int srcu_idx; 4216 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4217 unsigned long user_tar = 0; 4218 unsigned int user_vrsave; 4219 struct kvm *kvm; 4220 4221 if (!vcpu->arch.sane) { 4222 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4223 return -EINVAL; 4224 } 4225 4226 /* 4227 * Don't allow entry with a suspended transaction, because 4228 * the guest entry/exit code will lose it. 4229 * If the guest has TM enabled, save away their TM-related SPRs 4230 * (they will get restored by the TM unavailable interrupt). 4231 */ 4232 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4233 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4234 (current->thread.regs->msr & MSR_TM)) { 4235 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4236 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4237 run->fail_entry.hardware_entry_failure_reason = 0; 4238 return -EINVAL; 4239 } 4240 /* Enable TM so we can read the TM SPRs */ 4241 mtmsr(mfmsr() | MSR_TM); 4242 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4243 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4244 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4245 current->thread.regs->msr &= ~MSR_TM; 4246 } 4247 #endif 4248 4249 /* 4250 * Force online to 1 for the sake of old userspace which doesn't 4251 * set it. 4252 */ 4253 if (!vcpu->arch.online) { 4254 atomic_inc(&vcpu->arch.vcore->online_count); 4255 vcpu->arch.online = 1; 4256 } 4257 4258 kvmppc_core_prepare_to_enter(vcpu); 4259 4260 /* No need to go into the guest when all we'll do is come back out */ 4261 if (signal_pending(current)) { 4262 run->exit_reason = KVM_EXIT_INTR; 4263 return -EINTR; 4264 } 4265 4266 kvm = vcpu->kvm; 4267 atomic_inc(&kvm->arch.vcpus_running); 4268 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4269 smp_mb(); 4270 4271 flush_all_to_thread(current); 4272 4273 /* Save userspace EBB and other register values */ 4274 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4275 ebb_regs[0] = mfspr(SPRN_EBBHR); 4276 ebb_regs[1] = mfspr(SPRN_EBBRR); 4277 ebb_regs[2] = mfspr(SPRN_BESCR); 4278 user_tar = mfspr(SPRN_TAR); 4279 } 4280 user_vrsave = mfspr(SPRN_VRSAVE); 4281 4282 vcpu->arch.wqp = &vcpu->arch.vcore->wq; 4283 vcpu->arch.pgdir = kvm->mm->pgd; 4284 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4285 4286 do { 4287 /* 4288 * The early POWER9 chips that can't mix radix and HPT threads 4289 * on the same core also need the workaround for the problem 4290 * where the TLB would prefetch entries in the guest exit path 4291 * for radix guests using the guest PIDR value and LPID 0. 4292 * The workaround is in the old path (kvmppc_run_vcpu()) 4293 * but not the new path (kvmhv_run_single_vcpu()). 4294 */ 4295 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4296 !no_mixing_hpt_and_radix) 4297 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0, 4298 vcpu->arch.vcore->lpcr); 4299 else 4300 r = kvmppc_run_vcpu(run, vcpu); 4301 4302 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4303 !(vcpu->arch.shregs.msr & MSR_PR)) { 4304 trace_kvm_hcall_enter(vcpu); 4305 r = kvmppc_pseries_do_hcall(vcpu); 4306 trace_kvm_hcall_exit(vcpu, r); 4307 kvmppc_core_prepare_to_enter(vcpu); 4308 } else if (r == RESUME_PAGE_FAULT) { 4309 srcu_idx = srcu_read_lock(&kvm->srcu); 4310 r = kvmppc_book3s_hv_page_fault(run, vcpu, 4311 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4312 srcu_read_unlock(&kvm->srcu, srcu_idx); 4313 } else if (r == RESUME_PASSTHROUGH) { 4314 if (WARN_ON(xics_on_xive())) 4315 r = H_SUCCESS; 4316 else 4317 r = kvmppc_xics_rm_complete(vcpu, 0); 4318 } 4319 } while (is_kvmppc_resume_guest(r)); 4320 4321 /* Restore userspace EBB and other register values */ 4322 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4323 mtspr(SPRN_EBBHR, ebb_regs[0]); 4324 mtspr(SPRN_EBBRR, ebb_regs[1]); 4325 mtspr(SPRN_BESCR, ebb_regs[2]); 4326 mtspr(SPRN_TAR, user_tar); 4327 mtspr(SPRN_FSCR, current->thread.fscr); 4328 } 4329 mtspr(SPRN_VRSAVE, user_vrsave); 4330 4331 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4332 atomic_dec(&kvm->arch.vcpus_running); 4333 return r; 4334 } 4335 4336 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4337 int shift, int sllp) 4338 { 4339 (*sps)->page_shift = shift; 4340 (*sps)->slb_enc = sllp; 4341 (*sps)->enc[0].page_shift = shift; 4342 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4343 /* 4344 * Add 16MB MPSS support (may get filtered out by userspace) 4345 */ 4346 if (shift != 24) { 4347 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4348 if (penc != -1) { 4349 (*sps)->enc[1].page_shift = 24; 4350 (*sps)->enc[1].pte_enc = penc; 4351 } 4352 } 4353 (*sps)++; 4354 } 4355 4356 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4357 struct kvm_ppc_smmu_info *info) 4358 { 4359 struct kvm_ppc_one_seg_page_size *sps; 4360 4361 /* 4362 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4363 * POWER7 doesn't support keys for instruction accesses, 4364 * POWER8 and POWER9 do. 4365 */ 4366 info->data_keys = 32; 4367 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4368 4369 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4370 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4371 info->slb_size = 32; 4372 4373 /* We only support these sizes for now, and no muti-size segments */ 4374 sps = &info->sps[0]; 4375 kvmppc_add_seg_page_size(&sps, 12, 0); 4376 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4377 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4378 4379 /* If running as a nested hypervisor, we don't support HPT guests */ 4380 if (kvmhv_on_pseries()) 4381 info->flags |= KVM_PPC_NO_HASH; 4382 4383 return 0; 4384 } 4385 4386 /* 4387 * Get (and clear) the dirty memory log for a memory slot. 4388 */ 4389 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4390 struct kvm_dirty_log *log) 4391 { 4392 struct kvm_memslots *slots; 4393 struct kvm_memory_slot *memslot; 4394 int i, r; 4395 unsigned long n; 4396 unsigned long *buf, *p; 4397 struct kvm_vcpu *vcpu; 4398 4399 mutex_lock(&kvm->slots_lock); 4400 4401 r = -EINVAL; 4402 if (log->slot >= KVM_USER_MEM_SLOTS) 4403 goto out; 4404 4405 slots = kvm_memslots(kvm); 4406 memslot = id_to_memslot(slots, log->slot); 4407 r = -ENOENT; 4408 if (!memslot || !memslot->dirty_bitmap) 4409 goto out; 4410 4411 /* 4412 * Use second half of bitmap area because both HPT and radix 4413 * accumulate bits in the first half. 4414 */ 4415 n = kvm_dirty_bitmap_bytes(memslot); 4416 buf = memslot->dirty_bitmap + n / sizeof(long); 4417 memset(buf, 0, n); 4418 4419 if (kvm_is_radix(kvm)) 4420 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4421 else 4422 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4423 if (r) 4424 goto out; 4425 4426 /* 4427 * We accumulate dirty bits in the first half of the 4428 * memslot's dirty_bitmap area, for when pages are paged 4429 * out or modified by the host directly. Pick up these 4430 * bits and add them to the map. 4431 */ 4432 p = memslot->dirty_bitmap; 4433 for (i = 0; i < n / sizeof(long); ++i) 4434 buf[i] |= xchg(&p[i], 0); 4435 4436 /* Harvest dirty bits from VPA and DTL updates */ 4437 /* Note: we never modify the SLB shadow buffer areas */ 4438 kvm_for_each_vcpu(i, vcpu, kvm) { 4439 spin_lock(&vcpu->arch.vpa_update_lock); 4440 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4441 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4442 spin_unlock(&vcpu->arch.vpa_update_lock); 4443 } 4444 4445 r = -EFAULT; 4446 if (copy_to_user(log->dirty_bitmap, buf, n)) 4447 goto out; 4448 4449 r = 0; 4450 out: 4451 mutex_unlock(&kvm->slots_lock); 4452 return r; 4453 } 4454 4455 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4456 { 4457 vfree(slot->arch.rmap); 4458 slot->arch.rmap = NULL; 4459 } 4460 4461 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4462 struct kvm_memory_slot *slot, 4463 const struct kvm_userspace_memory_region *mem, 4464 enum kvm_mr_change change) 4465 { 4466 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4467 4468 if (change == KVM_MR_CREATE) { 4469 slot->arch.rmap = vzalloc(array_size(npages, 4470 sizeof(*slot->arch.rmap))); 4471 if (!slot->arch.rmap) 4472 return -ENOMEM; 4473 } 4474 4475 return 0; 4476 } 4477 4478 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4479 const struct kvm_userspace_memory_region *mem, 4480 const struct kvm_memory_slot *old, 4481 const struct kvm_memory_slot *new, 4482 enum kvm_mr_change change) 4483 { 4484 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4485 4486 /* 4487 * If we are making a new memslot, it might make 4488 * some address that was previously cached as emulated 4489 * MMIO be no longer emulated MMIO, so invalidate 4490 * all the caches of emulated MMIO translations. 4491 */ 4492 if (npages) 4493 atomic64_inc(&kvm->arch.mmio_update); 4494 4495 /* 4496 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4497 * have already called kvm_arch_flush_shadow_memslot() to 4498 * flush shadow mappings. For KVM_MR_CREATE we have no 4499 * previous mappings. So the only case to handle is 4500 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4501 * has been changed. 4502 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4503 * to get rid of any THP PTEs in the partition-scoped page tables 4504 * so we can track dirtiness at the page level; we flush when 4505 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4506 * using THP PTEs. 4507 */ 4508 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4509 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4510 kvmppc_radix_flush_memslot(kvm, old); 4511 /* 4512 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4513 */ 4514 if (!kvm->arch.secure_guest) 4515 return; 4516 4517 switch (change) { 4518 case KVM_MR_CREATE: 4519 if (kvmppc_uvmem_slot_init(kvm, new)) 4520 return; 4521 uv_register_mem_slot(kvm->arch.lpid, 4522 new->base_gfn << PAGE_SHIFT, 4523 new->npages * PAGE_SIZE, 4524 0, new->id); 4525 break; 4526 case KVM_MR_DELETE: 4527 uv_unregister_mem_slot(kvm->arch.lpid, old->id); 4528 kvmppc_uvmem_slot_free(kvm, old); 4529 break; 4530 default: 4531 /* TODO: Handle KVM_MR_MOVE */ 4532 break; 4533 } 4534 } 4535 4536 /* 4537 * Update LPCR values in kvm->arch and in vcores. 4538 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4539 * of kvm->arch.lpcr update). 4540 */ 4541 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4542 { 4543 long int i; 4544 u32 cores_done = 0; 4545 4546 if ((kvm->arch.lpcr & mask) == lpcr) 4547 return; 4548 4549 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4550 4551 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4552 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4553 if (!vc) 4554 continue; 4555 spin_lock(&vc->lock); 4556 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4557 spin_unlock(&vc->lock); 4558 if (++cores_done >= kvm->arch.online_vcores) 4559 break; 4560 } 4561 } 4562 4563 void kvmppc_setup_partition_table(struct kvm *kvm) 4564 { 4565 unsigned long dw0, dw1; 4566 4567 if (!kvm_is_radix(kvm)) { 4568 /* PS field - page size for VRMA */ 4569 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4570 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4571 /* HTABSIZE and HTABORG fields */ 4572 dw0 |= kvm->arch.sdr1; 4573 4574 /* Second dword as set by userspace */ 4575 dw1 = kvm->arch.process_table; 4576 } else { 4577 dw0 = PATB_HR | radix__get_tree_size() | 4578 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4579 dw1 = PATB_GR | kvm->arch.process_table; 4580 } 4581 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4582 } 4583 4584 /* 4585 * Set up HPT (hashed page table) and RMA (real-mode area). 4586 * Must be called with kvm->arch.mmu_setup_lock held. 4587 */ 4588 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4589 { 4590 int err = 0; 4591 struct kvm *kvm = vcpu->kvm; 4592 unsigned long hva; 4593 struct kvm_memory_slot *memslot; 4594 struct vm_area_struct *vma; 4595 unsigned long lpcr = 0, senc; 4596 unsigned long psize, porder; 4597 int srcu_idx; 4598 4599 /* Allocate hashed page table (if not done already) and reset it */ 4600 if (!kvm->arch.hpt.virt) { 4601 int order = KVM_DEFAULT_HPT_ORDER; 4602 struct kvm_hpt_info info; 4603 4604 err = kvmppc_allocate_hpt(&info, order); 4605 /* If we get here, it means userspace didn't specify a 4606 * size explicitly. So, try successively smaller 4607 * sizes if the default failed. */ 4608 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4609 err = kvmppc_allocate_hpt(&info, order); 4610 4611 if (err < 0) { 4612 pr_err("KVM: Couldn't alloc HPT\n"); 4613 goto out; 4614 } 4615 4616 kvmppc_set_hpt(kvm, &info); 4617 } 4618 4619 /* Look up the memslot for guest physical address 0 */ 4620 srcu_idx = srcu_read_lock(&kvm->srcu); 4621 memslot = gfn_to_memslot(kvm, 0); 4622 4623 /* We must have some memory at 0 by now */ 4624 err = -EINVAL; 4625 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4626 goto out_srcu; 4627 4628 /* Look up the VMA for the start of this memory slot */ 4629 hva = memslot->userspace_addr; 4630 down_read(&kvm->mm->mmap_sem); 4631 vma = find_vma(kvm->mm, hva); 4632 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4633 goto up_out; 4634 4635 psize = vma_kernel_pagesize(vma); 4636 4637 up_read(&kvm->mm->mmap_sem); 4638 4639 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4640 if (psize >= 0x1000000) 4641 psize = 0x1000000; 4642 else if (psize >= 0x10000) 4643 psize = 0x10000; 4644 else 4645 psize = 0x1000; 4646 porder = __ilog2(psize); 4647 4648 senc = slb_pgsize_encoding(psize); 4649 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4650 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4651 /* Create HPTEs in the hash page table for the VRMA */ 4652 kvmppc_map_vrma(vcpu, memslot, porder); 4653 4654 /* Update VRMASD field in the LPCR */ 4655 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4656 /* the -4 is to account for senc values starting at 0x10 */ 4657 lpcr = senc << (LPCR_VRMASD_SH - 4); 4658 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4659 } 4660 4661 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4662 smp_wmb(); 4663 err = 0; 4664 out_srcu: 4665 srcu_read_unlock(&kvm->srcu, srcu_idx); 4666 out: 4667 return err; 4668 4669 up_out: 4670 up_read(&kvm->mm->mmap_sem); 4671 goto out_srcu; 4672 } 4673 4674 /* 4675 * Must be called with kvm->arch.mmu_setup_lock held and 4676 * mmu_ready = 0 and no vcpus running. 4677 */ 4678 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4679 { 4680 if (nesting_enabled(kvm)) 4681 kvmhv_release_all_nested(kvm); 4682 kvmppc_rmap_reset(kvm); 4683 kvm->arch.process_table = 0; 4684 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4685 spin_lock(&kvm->mmu_lock); 4686 kvm->arch.radix = 0; 4687 spin_unlock(&kvm->mmu_lock); 4688 kvmppc_free_radix(kvm); 4689 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4690 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4691 return 0; 4692 } 4693 4694 /* 4695 * Must be called with kvm->arch.mmu_setup_lock held and 4696 * mmu_ready = 0 and no vcpus running. 4697 */ 4698 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4699 { 4700 int err; 4701 4702 err = kvmppc_init_vm_radix(kvm); 4703 if (err) 4704 return err; 4705 kvmppc_rmap_reset(kvm); 4706 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4707 spin_lock(&kvm->mmu_lock); 4708 kvm->arch.radix = 1; 4709 spin_unlock(&kvm->mmu_lock); 4710 kvmppc_free_hpt(&kvm->arch.hpt); 4711 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4712 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4713 return 0; 4714 } 4715 4716 #ifdef CONFIG_KVM_XICS 4717 /* 4718 * Allocate a per-core structure for managing state about which cores are 4719 * running in the host versus the guest and for exchanging data between 4720 * real mode KVM and CPU running in the host. 4721 * This is only done for the first VM. 4722 * The allocated structure stays even if all VMs have stopped. 4723 * It is only freed when the kvm-hv module is unloaded. 4724 * It's OK for this routine to fail, we just don't support host 4725 * core operations like redirecting H_IPI wakeups. 4726 */ 4727 void kvmppc_alloc_host_rm_ops(void) 4728 { 4729 struct kvmppc_host_rm_ops *ops; 4730 unsigned long l_ops; 4731 int cpu, core; 4732 int size; 4733 4734 /* Not the first time here ? */ 4735 if (kvmppc_host_rm_ops_hv != NULL) 4736 return; 4737 4738 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4739 if (!ops) 4740 return; 4741 4742 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4743 ops->rm_core = kzalloc(size, GFP_KERNEL); 4744 4745 if (!ops->rm_core) { 4746 kfree(ops); 4747 return; 4748 } 4749 4750 cpus_read_lock(); 4751 4752 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4753 if (!cpu_online(cpu)) 4754 continue; 4755 4756 core = cpu >> threads_shift; 4757 ops->rm_core[core].rm_state.in_host = 1; 4758 } 4759 4760 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4761 4762 /* 4763 * Make the contents of the kvmppc_host_rm_ops structure visible 4764 * to other CPUs before we assign it to the global variable. 4765 * Do an atomic assignment (no locks used here), but if someone 4766 * beats us to it, just free our copy and return. 4767 */ 4768 smp_wmb(); 4769 l_ops = (unsigned long) ops; 4770 4771 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4772 cpus_read_unlock(); 4773 kfree(ops->rm_core); 4774 kfree(ops); 4775 return; 4776 } 4777 4778 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4779 "ppc/kvm_book3s:prepare", 4780 kvmppc_set_host_core, 4781 kvmppc_clear_host_core); 4782 cpus_read_unlock(); 4783 } 4784 4785 void kvmppc_free_host_rm_ops(void) 4786 { 4787 if (kvmppc_host_rm_ops_hv) { 4788 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4789 kfree(kvmppc_host_rm_ops_hv->rm_core); 4790 kfree(kvmppc_host_rm_ops_hv); 4791 kvmppc_host_rm_ops_hv = NULL; 4792 } 4793 } 4794 #endif 4795 4796 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4797 { 4798 unsigned long lpcr, lpid; 4799 char buf[32]; 4800 int ret; 4801 4802 mutex_init(&kvm->arch.uvmem_lock); 4803 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 4804 mutex_init(&kvm->arch.mmu_setup_lock); 4805 4806 /* Allocate the guest's logical partition ID */ 4807 4808 lpid = kvmppc_alloc_lpid(); 4809 if ((long)lpid < 0) 4810 return -ENOMEM; 4811 kvm->arch.lpid = lpid; 4812 4813 kvmppc_alloc_host_rm_ops(); 4814 4815 kvmhv_vm_nested_init(kvm); 4816 4817 /* 4818 * Since we don't flush the TLB when tearing down a VM, 4819 * and this lpid might have previously been used, 4820 * make sure we flush on each core before running the new VM. 4821 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4822 * does this flush for us. 4823 */ 4824 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4825 cpumask_setall(&kvm->arch.need_tlb_flush); 4826 4827 /* Start out with the default set of hcalls enabled */ 4828 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4829 sizeof(kvm->arch.enabled_hcalls)); 4830 4831 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4832 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4833 4834 /* Init LPCR for virtual RMA mode */ 4835 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4836 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4837 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4838 lpcr &= LPCR_PECE | LPCR_LPES; 4839 } else { 4840 lpcr = 0; 4841 } 4842 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4843 LPCR_VPM0 | LPCR_VPM1; 4844 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4845 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4846 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4847 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4848 lpcr |= LPCR_ONL; 4849 /* 4850 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4851 * Set HVICE bit to enable hypervisor virtualization interrupts. 4852 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4853 * be unnecessary but better safe than sorry in case we re-enable 4854 * EE in HV mode with this LPCR still set) 4855 */ 4856 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4857 lpcr &= ~LPCR_VPM0; 4858 lpcr |= LPCR_HVICE | LPCR_HEIC; 4859 4860 /* 4861 * If xive is enabled, we route 0x500 interrupts directly 4862 * to the guest. 4863 */ 4864 if (xics_on_xive()) 4865 lpcr |= LPCR_LPES; 4866 } 4867 4868 /* 4869 * If the host uses radix, the guest starts out as radix. 4870 */ 4871 if (radix_enabled()) { 4872 kvm->arch.radix = 1; 4873 kvm->arch.mmu_ready = 1; 4874 lpcr &= ~LPCR_VPM1; 4875 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4876 ret = kvmppc_init_vm_radix(kvm); 4877 if (ret) { 4878 kvmppc_free_lpid(kvm->arch.lpid); 4879 return ret; 4880 } 4881 kvmppc_setup_partition_table(kvm); 4882 } 4883 4884 kvm->arch.lpcr = lpcr; 4885 4886 /* Initialization for future HPT resizes */ 4887 kvm->arch.resize_hpt = NULL; 4888 4889 /* 4890 * Work out how many sets the TLB has, for the use of 4891 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4892 */ 4893 if (radix_enabled()) 4894 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4895 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4896 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4897 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4898 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4899 else 4900 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4901 4902 /* 4903 * Track that we now have a HV mode VM active. This blocks secondary 4904 * CPU threads from coming online. 4905 * On POWER9, we only need to do this if the "indep_threads_mode" 4906 * module parameter has been set to N. 4907 */ 4908 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4909 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 4910 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 4911 kvm->arch.threads_indep = true; 4912 } else { 4913 kvm->arch.threads_indep = indep_threads_mode; 4914 } 4915 } 4916 if (!kvm->arch.threads_indep) 4917 kvm_hv_vm_activated(); 4918 4919 /* 4920 * Initialize smt_mode depending on processor. 4921 * POWER8 and earlier have to use "strict" threading, where 4922 * all vCPUs in a vcore have to run on the same (sub)core, 4923 * whereas on POWER9 the threads can each run a different 4924 * guest. 4925 */ 4926 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4927 kvm->arch.smt_mode = threads_per_subcore; 4928 else 4929 kvm->arch.smt_mode = 1; 4930 kvm->arch.emul_smt_mode = 1; 4931 4932 /* 4933 * Create a debugfs directory for the VM 4934 */ 4935 snprintf(buf, sizeof(buf), "vm%d", current->pid); 4936 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 4937 kvmppc_mmu_debugfs_init(kvm); 4938 if (radix_enabled()) 4939 kvmhv_radix_debugfs_init(kvm); 4940 4941 return 0; 4942 } 4943 4944 static void kvmppc_free_vcores(struct kvm *kvm) 4945 { 4946 long int i; 4947 4948 for (i = 0; i < KVM_MAX_VCORES; ++i) 4949 kfree(kvm->arch.vcores[i]); 4950 kvm->arch.online_vcores = 0; 4951 } 4952 4953 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 4954 { 4955 debugfs_remove_recursive(kvm->arch.debugfs_dir); 4956 4957 if (!kvm->arch.threads_indep) 4958 kvm_hv_vm_deactivated(); 4959 4960 kvmppc_free_vcores(kvm); 4961 4962 4963 if (kvm_is_radix(kvm)) 4964 kvmppc_free_radix(kvm); 4965 else 4966 kvmppc_free_hpt(&kvm->arch.hpt); 4967 4968 /* Perform global invalidation and return lpid to the pool */ 4969 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4970 if (nesting_enabled(kvm)) 4971 kvmhv_release_all_nested(kvm); 4972 kvm->arch.process_table = 0; 4973 if (kvm->arch.secure_guest) 4974 uv_svm_terminate(kvm->arch.lpid); 4975 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 4976 } 4977 4978 kvmppc_free_lpid(kvm->arch.lpid); 4979 4980 kvmppc_free_pimap(kvm); 4981 } 4982 4983 /* We don't need to emulate any privileged instructions or dcbz */ 4984 static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 4985 unsigned int inst, int *advance) 4986 { 4987 return EMULATE_FAIL; 4988 } 4989 4990 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 4991 ulong spr_val) 4992 { 4993 return EMULATE_FAIL; 4994 } 4995 4996 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 4997 ulong *spr_val) 4998 { 4999 return EMULATE_FAIL; 5000 } 5001 5002 static int kvmppc_core_check_processor_compat_hv(void) 5003 { 5004 if (cpu_has_feature(CPU_FTR_HVMODE) && 5005 cpu_has_feature(CPU_FTR_ARCH_206)) 5006 return 0; 5007 5008 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5009 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5010 return 0; 5011 5012 return -EIO; 5013 } 5014 5015 #ifdef CONFIG_KVM_XICS 5016 5017 void kvmppc_free_pimap(struct kvm *kvm) 5018 { 5019 kfree(kvm->arch.pimap); 5020 } 5021 5022 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5023 { 5024 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5025 } 5026 5027 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5028 { 5029 struct irq_desc *desc; 5030 struct kvmppc_irq_map *irq_map; 5031 struct kvmppc_passthru_irqmap *pimap; 5032 struct irq_chip *chip; 5033 int i, rc = 0; 5034 5035 if (!kvm_irq_bypass) 5036 return 1; 5037 5038 desc = irq_to_desc(host_irq); 5039 if (!desc) 5040 return -EIO; 5041 5042 mutex_lock(&kvm->lock); 5043 5044 pimap = kvm->arch.pimap; 5045 if (pimap == NULL) { 5046 /* First call, allocate structure to hold IRQ map */ 5047 pimap = kvmppc_alloc_pimap(); 5048 if (pimap == NULL) { 5049 mutex_unlock(&kvm->lock); 5050 return -ENOMEM; 5051 } 5052 kvm->arch.pimap = pimap; 5053 } 5054 5055 /* 5056 * For now, we only support interrupts for which the EOI operation 5057 * is an OPAL call followed by a write to XIRR, since that's 5058 * what our real-mode EOI code does, or a XIVE interrupt 5059 */ 5060 chip = irq_data_get_irq_chip(&desc->irq_data); 5061 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 5062 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5063 host_irq, guest_gsi); 5064 mutex_unlock(&kvm->lock); 5065 return -ENOENT; 5066 } 5067 5068 /* 5069 * See if we already have an entry for this guest IRQ number. 5070 * If it's mapped to a hardware IRQ number, that's an error, 5071 * otherwise re-use this entry. 5072 */ 5073 for (i = 0; i < pimap->n_mapped; i++) { 5074 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5075 if (pimap->mapped[i].r_hwirq) { 5076 mutex_unlock(&kvm->lock); 5077 return -EINVAL; 5078 } 5079 break; 5080 } 5081 } 5082 5083 if (i == KVMPPC_PIRQ_MAPPED) { 5084 mutex_unlock(&kvm->lock); 5085 return -EAGAIN; /* table is full */ 5086 } 5087 5088 irq_map = &pimap->mapped[i]; 5089 5090 irq_map->v_hwirq = guest_gsi; 5091 irq_map->desc = desc; 5092 5093 /* 5094 * Order the above two stores before the next to serialize with 5095 * the KVM real mode handler. 5096 */ 5097 smp_wmb(); 5098 irq_map->r_hwirq = desc->irq_data.hwirq; 5099 5100 if (i == pimap->n_mapped) 5101 pimap->n_mapped++; 5102 5103 if (xics_on_xive()) 5104 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5105 else 5106 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5107 if (rc) 5108 irq_map->r_hwirq = 0; 5109 5110 mutex_unlock(&kvm->lock); 5111 5112 return 0; 5113 } 5114 5115 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5116 { 5117 struct irq_desc *desc; 5118 struct kvmppc_passthru_irqmap *pimap; 5119 int i, rc = 0; 5120 5121 if (!kvm_irq_bypass) 5122 return 0; 5123 5124 desc = irq_to_desc(host_irq); 5125 if (!desc) 5126 return -EIO; 5127 5128 mutex_lock(&kvm->lock); 5129 if (!kvm->arch.pimap) 5130 goto unlock; 5131 5132 pimap = kvm->arch.pimap; 5133 5134 for (i = 0; i < pimap->n_mapped; i++) { 5135 if (guest_gsi == pimap->mapped[i].v_hwirq) 5136 break; 5137 } 5138 5139 if (i == pimap->n_mapped) { 5140 mutex_unlock(&kvm->lock); 5141 return -ENODEV; 5142 } 5143 5144 if (xics_on_xive()) 5145 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5146 else 5147 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5148 5149 /* invalidate the entry (what do do on error from the above ?) */ 5150 pimap->mapped[i].r_hwirq = 0; 5151 5152 /* 5153 * We don't free this structure even when the count goes to 5154 * zero. The structure is freed when we destroy the VM. 5155 */ 5156 unlock: 5157 mutex_unlock(&kvm->lock); 5158 return rc; 5159 } 5160 5161 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5162 struct irq_bypass_producer *prod) 5163 { 5164 int ret = 0; 5165 struct kvm_kernel_irqfd *irqfd = 5166 container_of(cons, struct kvm_kernel_irqfd, consumer); 5167 5168 irqfd->producer = prod; 5169 5170 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5171 if (ret) 5172 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5173 prod->irq, irqfd->gsi, ret); 5174 5175 return ret; 5176 } 5177 5178 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5179 struct irq_bypass_producer *prod) 5180 { 5181 int ret; 5182 struct kvm_kernel_irqfd *irqfd = 5183 container_of(cons, struct kvm_kernel_irqfd, consumer); 5184 5185 irqfd->producer = NULL; 5186 5187 /* 5188 * When producer of consumer is unregistered, we change back to 5189 * default external interrupt handling mode - KVM real mode 5190 * will switch back to host. 5191 */ 5192 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5193 if (ret) 5194 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5195 prod->irq, irqfd->gsi, ret); 5196 } 5197 #endif 5198 5199 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5200 unsigned int ioctl, unsigned long arg) 5201 { 5202 struct kvm *kvm __maybe_unused = filp->private_data; 5203 void __user *argp = (void __user *)arg; 5204 long r; 5205 5206 switch (ioctl) { 5207 5208 case KVM_PPC_ALLOCATE_HTAB: { 5209 u32 htab_order; 5210 5211 r = -EFAULT; 5212 if (get_user(htab_order, (u32 __user *)argp)) 5213 break; 5214 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5215 if (r) 5216 break; 5217 r = 0; 5218 break; 5219 } 5220 5221 case KVM_PPC_GET_HTAB_FD: { 5222 struct kvm_get_htab_fd ghf; 5223 5224 r = -EFAULT; 5225 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5226 break; 5227 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5228 break; 5229 } 5230 5231 case KVM_PPC_RESIZE_HPT_PREPARE: { 5232 struct kvm_ppc_resize_hpt rhpt; 5233 5234 r = -EFAULT; 5235 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5236 break; 5237 5238 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5239 break; 5240 } 5241 5242 case KVM_PPC_RESIZE_HPT_COMMIT: { 5243 struct kvm_ppc_resize_hpt rhpt; 5244 5245 r = -EFAULT; 5246 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5247 break; 5248 5249 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5250 break; 5251 } 5252 5253 default: 5254 r = -ENOTTY; 5255 } 5256 5257 return r; 5258 } 5259 5260 /* 5261 * List of hcall numbers to enable by default. 5262 * For compatibility with old userspace, we enable by default 5263 * all hcalls that were implemented before the hcall-enabling 5264 * facility was added. Note this list should not include H_RTAS. 5265 */ 5266 static unsigned int default_hcall_list[] = { 5267 H_REMOVE, 5268 H_ENTER, 5269 H_READ, 5270 H_PROTECT, 5271 H_BULK_REMOVE, 5272 H_GET_TCE, 5273 H_PUT_TCE, 5274 H_SET_DABR, 5275 H_SET_XDABR, 5276 H_CEDE, 5277 H_PROD, 5278 H_CONFER, 5279 H_REGISTER_VPA, 5280 #ifdef CONFIG_KVM_XICS 5281 H_EOI, 5282 H_CPPR, 5283 H_IPI, 5284 H_IPOLL, 5285 H_XIRR, 5286 H_XIRR_X, 5287 #endif 5288 0 5289 }; 5290 5291 static void init_default_hcalls(void) 5292 { 5293 int i; 5294 unsigned int hcall; 5295 5296 for (i = 0; default_hcall_list[i]; ++i) { 5297 hcall = default_hcall_list[i]; 5298 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5299 __set_bit(hcall / 4, default_enabled_hcalls); 5300 } 5301 } 5302 5303 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5304 { 5305 unsigned long lpcr; 5306 int radix; 5307 int err; 5308 5309 /* If not on a POWER9, reject it */ 5310 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5311 return -ENODEV; 5312 5313 /* If any unknown flags set, reject it */ 5314 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5315 return -EINVAL; 5316 5317 /* GR (guest radix) bit in process_table field must match */ 5318 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5319 if (!!(cfg->process_table & PATB_GR) != radix) 5320 return -EINVAL; 5321 5322 /* Process table size field must be reasonable, i.e. <= 24 */ 5323 if ((cfg->process_table & PRTS_MASK) > 24) 5324 return -EINVAL; 5325 5326 /* We can change a guest to/from radix now, if the host is radix */ 5327 if (radix && !radix_enabled()) 5328 return -EINVAL; 5329 5330 /* If we're a nested hypervisor, we currently only support radix */ 5331 if (kvmhv_on_pseries() && !radix) 5332 return -EINVAL; 5333 5334 mutex_lock(&kvm->arch.mmu_setup_lock); 5335 if (radix != kvm_is_radix(kvm)) { 5336 if (kvm->arch.mmu_ready) { 5337 kvm->arch.mmu_ready = 0; 5338 /* order mmu_ready vs. vcpus_running */ 5339 smp_mb(); 5340 if (atomic_read(&kvm->arch.vcpus_running)) { 5341 kvm->arch.mmu_ready = 1; 5342 err = -EBUSY; 5343 goto out_unlock; 5344 } 5345 } 5346 if (radix) 5347 err = kvmppc_switch_mmu_to_radix(kvm); 5348 else 5349 err = kvmppc_switch_mmu_to_hpt(kvm); 5350 if (err) 5351 goto out_unlock; 5352 } 5353 5354 kvm->arch.process_table = cfg->process_table; 5355 kvmppc_setup_partition_table(kvm); 5356 5357 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5358 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5359 err = 0; 5360 5361 out_unlock: 5362 mutex_unlock(&kvm->arch.mmu_setup_lock); 5363 return err; 5364 } 5365 5366 static int kvmhv_enable_nested(struct kvm *kvm) 5367 { 5368 if (!nested) 5369 return -EPERM; 5370 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5371 return -ENODEV; 5372 5373 /* kvm == NULL means the caller is testing if the capability exists */ 5374 if (kvm) 5375 kvm->arch.nested_enable = true; 5376 return 0; 5377 } 5378 5379 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5380 int size) 5381 { 5382 int rc = -EINVAL; 5383 5384 if (kvmhv_vcpu_is_radix(vcpu)) { 5385 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5386 5387 if (rc > 0) 5388 rc = -EINVAL; 5389 } 5390 5391 /* For now quadrants are the only way to access nested guest memory */ 5392 if (rc && vcpu->arch.nested) 5393 rc = -EAGAIN; 5394 5395 return rc; 5396 } 5397 5398 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5399 int size) 5400 { 5401 int rc = -EINVAL; 5402 5403 if (kvmhv_vcpu_is_radix(vcpu)) { 5404 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5405 5406 if (rc > 0) 5407 rc = -EINVAL; 5408 } 5409 5410 /* For now quadrants are the only way to access nested guest memory */ 5411 if (rc && vcpu->arch.nested) 5412 rc = -EAGAIN; 5413 5414 return rc; 5415 } 5416 5417 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5418 { 5419 unpin_vpa(kvm, vpa); 5420 vpa->gpa = 0; 5421 vpa->pinned_addr = NULL; 5422 vpa->dirty = false; 5423 vpa->update_pending = 0; 5424 } 5425 5426 /* 5427 * Enable a guest to become a secure VM, or test whether 5428 * that could be enabled. 5429 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5430 * tested (kvm == NULL) or enabled (kvm != NULL). 5431 */ 5432 static int kvmhv_enable_svm(struct kvm *kvm) 5433 { 5434 if (!kvmppc_uvmem_available()) 5435 return -EINVAL; 5436 if (kvm) 5437 kvm->arch.svm_enabled = 1; 5438 return 0; 5439 } 5440 5441 /* 5442 * IOCTL handler to turn off secure mode of guest 5443 * 5444 * - Release all device pages 5445 * - Issue ucall to terminate the guest on the UV side 5446 * - Unpin the VPA pages. 5447 * - Reinit the partition scoped page tables 5448 */ 5449 static int kvmhv_svm_off(struct kvm *kvm) 5450 { 5451 struct kvm_vcpu *vcpu; 5452 int mmu_was_ready; 5453 int srcu_idx; 5454 int ret = 0; 5455 int i; 5456 5457 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5458 return ret; 5459 5460 mutex_lock(&kvm->arch.mmu_setup_lock); 5461 mmu_was_ready = kvm->arch.mmu_ready; 5462 if (kvm->arch.mmu_ready) { 5463 kvm->arch.mmu_ready = 0; 5464 /* order mmu_ready vs. vcpus_running */ 5465 smp_mb(); 5466 if (atomic_read(&kvm->arch.vcpus_running)) { 5467 kvm->arch.mmu_ready = 1; 5468 ret = -EBUSY; 5469 goto out; 5470 } 5471 } 5472 5473 srcu_idx = srcu_read_lock(&kvm->srcu); 5474 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5475 struct kvm_memory_slot *memslot; 5476 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5477 5478 if (!slots) 5479 continue; 5480 5481 kvm_for_each_memslot(memslot, slots) { 5482 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5483 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5484 } 5485 } 5486 srcu_read_unlock(&kvm->srcu, srcu_idx); 5487 5488 ret = uv_svm_terminate(kvm->arch.lpid); 5489 if (ret != U_SUCCESS) { 5490 ret = -EINVAL; 5491 goto out; 5492 } 5493 5494 /* 5495 * When secure guest is reset, all the guest pages are sent 5496 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5497 * chance to run and unpin their VPA pages. Unpinning of all 5498 * VPA pages is done here explicitly so that VPA pages 5499 * can be migrated to the secure side. 5500 * 5501 * This is required to for the secure SMP guest to reboot 5502 * correctly. 5503 */ 5504 kvm_for_each_vcpu(i, vcpu, kvm) { 5505 spin_lock(&vcpu->arch.vpa_update_lock); 5506 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5507 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5508 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5509 spin_unlock(&vcpu->arch.vpa_update_lock); 5510 } 5511 5512 kvmppc_setup_partition_table(kvm); 5513 kvm->arch.secure_guest = 0; 5514 kvm->arch.mmu_ready = mmu_was_ready; 5515 out: 5516 mutex_unlock(&kvm->arch.mmu_setup_lock); 5517 return ret; 5518 } 5519 5520 static struct kvmppc_ops kvm_ops_hv = { 5521 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5522 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5523 .get_one_reg = kvmppc_get_one_reg_hv, 5524 .set_one_reg = kvmppc_set_one_reg_hv, 5525 .vcpu_load = kvmppc_core_vcpu_load_hv, 5526 .vcpu_put = kvmppc_core_vcpu_put_hv, 5527 .inject_interrupt = kvmppc_inject_interrupt_hv, 5528 .set_msr = kvmppc_set_msr_hv, 5529 .vcpu_run = kvmppc_vcpu_run_hv, 5530 .vcpu_create = kvmppc_core_vcpu_create_hv, 5531 .vcpu_free = kvmppc_core_vcpu_free_hv, 5532 .check_requests = kvmppc_core_check_requests_hv, 5533 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5534 .flush_memslot = kvmppc_core_flush_memslot_hv, 5535 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5536 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5537 .unmap_hva_range = kvm_unmap_hva_range_hv, 5538 .age_hva = kvm_age_hva_hv, 5539 .test_age_hva = kvm_test_age_hva_hv, 5540 .set_spte_hva = kvm_set_spte_hva_hv, 5541 .free_memslot = kvmppc_core_free_memslot_hv, 5542 .init_vm = kvmppc_core_init_vm_hv, 5543 .destroy_vm = kvmppc_core_destroy_vm_hv, 5544 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5545 .emulate_op = kvmppc_core_emulate_op_hv, 5546 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5547 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5548 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5549 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5550 .hcall_implemented = kvmppc_hcall_impl_hv, 5551 #ifdef CONFIG_KVM_XICS 5552 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5553 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5554 #endif 5555 .configure_mmu = kvmhv_configure_mmu, 5556 .get_rmmu_info = kvmhv_get_rmmu_info, 5557 .set_smt_mode = kvmhv_set_smt_mode, 5558 .enable_nested = kvmhv_enable_nested, 5559 .load_from_eaddr = kvmhv_load_from_eaddr, 5560 .store_to_eaddr = kvmhv_store_to_eaddr, 5561 .enable_svm = kvmhv_enable_svm, 5562 .svm_off = kvmhv_svm_off, 5563 }; 5564 5565 static int kvm_init_subcore_bitmap(void) 5566 { 5567 int i, j; 5568 int nr_cores = cpu_nr_cores(); 5569 struct sibling_subcore_state *sibling_subcore_state; 5570 5571 for (i = 0; i < nr_cores; i++) { 5572 int first_cpu = i * threads_per_core; 5573 int node = cpu_to_node(first_cpu); 5574 5575 /* Ignore if it is already allocated. */ 5576 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5577 continue; 5578 5579 sibling_subcore_state = 5580 kzalloc_node(sizeof(struct sibling_subcore_state), 5581 GFP_KERNEL, node); 5582 if (!sibling_subcore_state) 5583 return -ENOMEM; 5584 5585 5586 for (j = 0; j < threads_per_core; j++) { 5587 int cpu = first_cpu + j; 5588 5589 paca_ptrs[cpu]->sibling_subcore_state = 5590 sibling_subcore_state; 5591 } 5592 } 5593 return 0; 5594 } 5595 5596 static int kvmppc_radix_possible(void) 5597 { 5598 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5599 } 5600 5601 static int kvmppc_book3s_init_hv(void) 5602 { 5603 int r; 5604 5605 if (!tlbie_capable) { 5606 pr_err("KVM-HV: Host does not support TLBIE\n"); 5607 return -ENODEV; 5608 } 5609 5610 /* 5611 * FIXME!! Do we need to check on all cpus ? 5612 */ 5613 r = kvmppc_core_check_processor_compat_hv(); 5614 if (r < 0) 5615 return -ENODEV; 5616 5617 r = kvmhv_nested_init(); 5618 if (r) 5619 return r; 5620 5621 r = kvm_init_subcore_bitmap(); 5622 if (r) 5623 return r; 5624 5625 /* 5626 * We need a way of accessing the XICS interrupt controller, 5627 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5628 * indirectly, via OPAL. 5629 */ 5630 #ifdef CONFIG_SMP 5631 if (!xics_on_xive() && !kvmhv_on_pseries() && 5632 !local_paca->kvm_hstate.xics_phys) { 5633 struct device_node *np; 5634 5635 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5636 if (!np) { 5637 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5638 return -ENODEV; 5639 } 5640 /* presence of intc confirmed - node can be dropped again */ 5641 of_node_put(np); 5642 } 5643 #endif 5644 5645 kvm_ops_hv.owner = THIS_MODULE; 5646 kvmppc_hv_ops = &kvm_ops_hv; 5647 5648 init_default_hcalls(); 5649 5650 init_vcore_lists(); 5651 5652 r = kvmppc_mmu_hv_init(); 5653 if (r) 5654 return r; 5655 5656 if (kvmppc_radix_possible()) 5657 r = kvmppc_radix_init(); 5658 5659 /* 5660 * POWER9 chips before version 2.02 can't have some threads in 5661 * HPT mode and some in radix mode on the same core. 5662 */ 5663 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5664 unsigned int pvr = mfspr(SPRN_PVR); 5665 if ((pvr >> 16) == PVR_POWER9 && 5666 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5667 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5668 no_mixing_hpt_and_radix = true; 5669 } 5670 5671 r = kvmppc_uvmem_init(); 5672 if (r < 0) 5673 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 5674 5675 return r; 5676 } 5677 5678 static void kvmppc_book3s_exit_hv(void) 5679 { 5680 kvmppc_uvmem_free(); 5681 kvmppc_free_host_rm_ops(); 5682 if (kvmppc_radix_possible()) 5683 kvmppc_radix_exit(); 5684 kvmppc_hv_ops = NULL; 5685 kvmhv_nested_exit(); 5686 } 5687 5688 module_init(kvmppc_book3s_init_hv); 5689 module_exit(kvmppc_book3s_exit_hv); 5690 MODULE_LICENSE("GPL"); 5691 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5692 MODULE_ALIAS("devname:kvm"); 5693