xref: /linux/arch/powerpc/kvm/book3s_32_mmu.c (revision 2a2c74b2efcb1a0ca3fdcb5fbb96ad8de6a29177)
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright SUSE Linux Products GmbH 2009
16  *
17  * Authors: Alexander Graf <agraf@suse.de>
18  */
19 
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_host.h>
24 #include <linux/highmem.h>
25 
26 #include <asm/tlbflush.h>
27 #include <asm/kvm_ppc.h>
28 #include <asm/kvm_book3s.h>
29 
30 /* #define DEBUG_MMU */
31 /* #define DEBUG_MMU_PTE */
32 /* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
33 
34 #ifdef DEBUG_MMU
35 #define dprintk(X...) printk(KERN_INFO X)
36 #else
37 #define dprintk(X...) do { } while(0)
38 #endif
39 
40 #ifdef DEBUG_MMU_PTE
41 #define dprintk_pte(X...) printk(KERN_INFO X)
42 #else
43 #define dprintk_pte(X...) do { } while(0)
44 #endif
45 
46 #define PTEG_FLAG_ACCESSED	0x00000100
47 #define PTEG_FLAG_DIRTY		0x00000080
48 #ifndef SID_SHIFT
49 #define SID_SHIFT		28
50 #endif
51 
52 static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
53 {
54 #ifdef DEBUG_MMU_PTE_IP
55 	return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
56 #else
57 	return true;
58 #endif
59 }
60 
61 static inline u32 sr_vsid(u32 sr_raw)
62 {
63 	return sr_raw & 0x0fffffff;
64 }
65 
66 static inline bool sr_valid(u32 sr_raw)
67 {
68 	return (sr_raw & 0x80000000) ? false : true;
69 }
70 
71 static inline bool sr_ks(u32 sr_raw)
72 {
73 	return (sr_raw & 0x40000000) ? true: false;
74 }
75 
76 static inline bool sr_kp(u32 sr_raw)
77 {
78 	return (sr_raw & 0x20000000) ? true: false;
79 }
80 
81 static inline bool sr_nx(u32 sr_raw)
82 {
83 	return (sr_raw & 0x10000000) ? true: false;
84 }
85 
86 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
87 					  struct kvmppc_pte *pte, bool data,
88 					  bool iswrite);
89 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
90 					     u64 *vsid);
91 
92 static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
93 {
94 	return vcpu->arch.shared->sr[(eaddr >> 28) & 0xf];
95 }
96 
97 static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
98 					 bool data)
99 {
100 	u64 vsid;
101 	struct kvmppc_pte pte;
102 
103 	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
104 		return pte.vpage;
105 
106 	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
107 	return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
108 }
109 
110 static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
111 {
112 	kvmppc_set_msr(vcpu, 0);
113 }
114 
115 static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
116 				      u32 sre, gva_t eaddr,
117 				      bool primary)
118 {
119 	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
120 	u32 page, hash, pteg, htabmask;
121 	hva_t r;
122 
123 	page = (eaddr & 0x0FFFFFFF) >> 12;
124 	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
125 
126 	hash = ((sr_vsid(sre) ^ page) << 6);
127 	if (!primary)
128 		hash = ~hash;
129 	hash &= htabmask;
130 
131 	pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
132 
133 	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
134 		kvmppc_get_pc(&vcpu_book3s->vcpu), eaddr, vcpu_book3s->sdr1, pteg,
135 		sr_vsid(sre));
136 
137 	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
138 	if (kvm_is_error_hva(r))
139 		return r;
140 	return r | (pteg & ~PAGE_MASK);
141 }
142 
143 static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
144 {
145 	return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
146 	       (primary ? 0 : 0x40) | 0x80000000;
147 }
148 
149 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
150 					  struct kvmppc_pte *pte, bool data,
151 					  bool iswrite)
152 {
153 	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
154 	struct kvmppc_bat *bat;
155 	int i;
156 
157 	for (i = 0; i < 8; i++) {
158 		if (data)
159 			bat = &vcpu_book3s->dbat[i];
160 		else
161 			bat = &vcpu_book3s->ibat[i];
162 
163 		if (vcpu->arch.shared->msr & MSR_PR) {
164 			if (!bat->vp)
165 				continue;
166 		} else {
167 			if (!bat->vs)
168 				continue;
169 		}
170 
171 		if (check_debug_ip(vcpu))
172 		{
173 			dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
174 				    data ? 'd' : 'i', i, eaddr, bat->bepi,
175 				    bat->bepi_mask);
176 		}
177 		if ((eaddr & bat->bepi_mask) == bat->bepi) {
178 			u64 vsid;
179 			kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
180 				eaddr >> SID_SHIFT, &vsid);
181 			vsid <<= 16;
182 			pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;
183 
184 			pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
185 			pte->may_read = bat->pp;
186 			pte->may_write = bat->pp > 1;
187 			pte->may_execute = true;
188 			if (!pte->may_read) {
189 				printk(KERN_INFO "BAT is not readable!\n");
190 				continue;
191 			}
192 			if (iswrite && !pte->may_write) {
193 				dprintk_pte("BAT is read-only!\n");
194 				continue;
195 			}
196 
197 			return 0;
198 		}
199 	}
200 
201 	return -ENOENT;
202 }
203 
204 static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
205 				     struct kvmppc_pte *pte, bool data,
206 				     bool iswrite, bool primary)
207 {
208 	u32 sre;
209 	hva_t ptegp;
210 	u32 pteg[16];
211 	u32 ptem = 0;
212 	int i;
213 	int found = 0;
214 
215 	sre = find_sr(vcpu, eaddr);
216 
217 	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
218 		    sr_vsid(sre), sre);
219 
220 	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
221 
222 	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
223 	if (kvm_is_error_hva(ptegp)) {
224 		printk(KERN_INFO "KVM: Invalid PTEG!\n");
225 		goto no_page_found;
226 	}
227 
228 	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
229 
230 	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
231 		printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
232 		goto no_page_found;
233 	}
234 
235 	for (i=0; i<16; i+=2) {
236 		if (ptem == pteg[i]) {
237 			u8 pp;
238 
239 			pte->raddr = (pteg[i+1] & ~(0xFFFULL)) | (eaddr & 0xFFF);
240 			pp = pteg[i+1] & 3;
241 
242 			if ((sr_kp(sre) &&  (vcpu->arch.shared->msr & MSR_PR)) ||
243 			    (sr_ks(sre) && !(vcpu->arch.shared->msr & MSR_PR)))
244 				pp |= 4;
245 
246 			pte->may_write = false;
247 			pte->may_read = false;
248 			pte->may_execute = true;
249 			switch (pp) {
250 				case 0:
251 				case 1:
252 				case 2:
253 				case 6:
254 					pte->may_write = true;
255 				case 3:
256 				case 5:
257 				case 7:
258 					pte->may_read = true;
259 					break;
260 			}
261 
262 			dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
263 				    pteg[i], pteg[i+1], pp);
264 			found = 1;
265 			break;
266 		}
267 	}
268 
269 	/* Update PTE C and A bits, so the guest's swapper knows we used the
270 	   page */
271 	if (found) {
272 		u32 pte_r = pteg[i+1];
273 		char __user *addr = (char __user *) &pteg[i+1];
274 
275 		/*
276 		 * Use single-byte writes to update the HPTE, to
277 		 * conform to what real hardware does.
278 		 */
279 		if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
280 			pte_r |= PTEG_FLAG_ACCESSED;
281 			put_user(pte_r >> 8, addr + 2);
282 		}
283 		if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
284 			pte_r |= PTEG_FLAG_DIRTY;
285 			put_user(pte_r, addr + 3);
286 		}
287 		if (!pte->may_read || (iswrite && !pte->may_write))
288 			return -EPERM;
289 		return 0;
290 	}
291 
292 no_page_found:
293 
294 	if (check_debug_ip(vcpu)) {
295 		dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
296 			    to_book3s(vcpu)->sdr1, ptegp);
297 		for (i=0; i<16; i+=2) {
298 			dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
299 				    i, pteg[i], pteg[i+1], ptem);
300 		}
301 	}
302 
303 	return -ENOENT;
304 }
305 
306 static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
307 				      struct kvmppc_pte *pte, bool data,
308 				      bool iswrite)
309 {
310 	int r;
311 	ulong mp_ea = vcpu->arch.magic_page_ea;
312 
313 	pte->eaddr = eaddr;
314 	pte->page_size = MMU_PAGE_4K;
315 
316 	/* Magic page override */
317 	if (unlikely(mp_ea) &&
318 	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
319 	    !(vcpu->arch.shared->msr & MSR_PR)) {
320 		pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
321 		pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
322 		pte->raddr &= KVM_PAM;
323 		pte->may_execute = true;
324 		pte->may_read = true;
325 		pte->may_write = true;
326 
327 		return 0;
328 	}
329 
330 	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
331 	if (r < 0)
332 		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
333 						   data, iswrite, true);
334 	if (r < 0)
335 		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
336 						   data, iswrite, false);
337 
338 	return r;
339 }
340 
341 
342 static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
343 {
344 	return vcpu->arch.shared->sr[srnum];
345 }
346 
347 static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
348 					ulong value)
349 {
350 	vcpu->arch.shared->sr[srnum] = value;
351 	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
352 }
353 
354 static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
355 {
356 	int i;
357 	struct kvm_vcpu *v;
358 
359 	/* flush this VA on all cpus */
360 	kvm_for_each_vcpu(i, v, vcpu->kvm)
361 		kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
362 }
363 
364 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
365 					     u64 *vsid)
366 {
367 	ulong ea = esid << SID_SHIFT;
368 	u32 sr;
369 	u64 gvsid = esid;
370 
371 	if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
372 		sr = find_sr(vcpu, ea);
373 		if (sr_valid(sr))
374 			gvsid = sr_vsid(sr);
375 	}
376 
377 	/* In case we only have one of MSR_IR or MSR_DR set, let's put
378 	   that in the real-mode context (and hope RM doesn't access
379 	   high memory) */
380 	switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
381 	case 0:
382 		*vsid = VSID_REAL | esid;
383 		break;
384 	case MSR_IR:
385 		*vsid = VSID_REAL_IR | gvsid;
386 		break;
387 	case MSR_DR:
388 		*vsid = VSID_REAL_DR | gvsid;
389 		break;
390 	case MSR_DR|MSR_IR:
391 		if (sr_valid(sr))
392 			*vsid = sr_vsid(sr);
393 		else
394 			*vsid = VSID_BAT | gvsid;
395 		break;
396 	default:
397 		BUG();
398 	}
399 
400 	if (vcpu->arch.shared->msr & MSR_PR)
401 		*vsid |= VSID_PR;
402 
403 	return 0;
404 }
405 
406 static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
407 {
408 	return true;
409 }
410 
411 
412 void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
413 {
414 	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
415 
416 	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
417 	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
418 	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
419 	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
420 	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
421 	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
422 	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
423 	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
424 
425 	mmu->slbmte = NULL;
426 	mmu->slbmfee = NULL;
427 	mmu->slbmfev = NULL;
428 	mmu->slbie = NULL;
429 	mmu->slbia = NULL;
430 }
431