xref: /linux/arch/powerpc/kvm/book3s.c (revision beb4f4722cf60d9f0803054dec4eb5025f2cf594)
1 /*
2  * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3  *
4  * Authors:
5  *    Alexander Graf <agraf@suse.de>
6  *    Kevin Wolf <mail@kevin-wolf.de>
7  *
8  * Description:
9  * This file is derived from arch/powerpc/kvm/44x.c,
10  * by Hollis Blanchard <hollisb@us.ibm.com>.
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License, version 2, as
14  * published by the Free Software Foundation.
15  */
16 
17 #include <linux/kvm_host.h>
18 #include <linux/err.h>
19 #include <linux/export.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <linux/miscdevice.h>
23 #include <linux/gfp.h>
24 #include <linux/sched.h>
25 #include <linux/vmalloc.h>
26 #include <linux/highmem.h>
27 
28 #include <asm/reg.h>
29 #include <asm/cputable.h>
30 #include <asm/cacheflush.h>
31 #include <linux/uaccess.h>
32 #include <asm/io.h>
33 #include <asm/kvm_ppc.h>
34 #include <asm/kvm_book3s.h>
35 #include <asm/mmu_context.h>
36 #include <asm/page.h>
37 #include <asm/xive.h>
38 
39 #include "book3s.h"
40 #include "trace.h"
41 
42 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
43 
44 /* #define EXIT_DEBUG */
45 
46 struct kvm_stats_debugfs_item debugfs_entries[] = {
47 	{ "exits",       VCPU_STAT(sum_exits) },
48 	{ "mmio",        VCPU_STAT(mmio_exits) },
49 	{ "sig",         VCPU_STAT(signal_exits) },
50 	{ "sysc",        VCPU_STAT(syscall_exits) },
51 	{ "inst_emu",    VCPU_STAT(emulated_inst_exits) },
52 	{ "dec",         VCPU_STAT(dec_exits) },
53 	{ "ext_intr",    VCPU_STAT(ext_intr_exits) },
54 	{ "queue_intr",  VCPU_STAT(queue_intr) },
55 	{ "halt_poll_success_ns",	VCPU_STAT(halt_poll_success_ns) },
56 	{ "halt_poll_fail_ns",		VCPU_STAT(halt_poll_fail_ns) },
57 	{ "halt_wait_ns",		VCPU_STAT(halt_wait_ns) },
58 	{ "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
59 	{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
60 	{ "halt_successful_wait",	VCPU_STAT(halt_successful_wait) },
61 	{ "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
62 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
63 	{ "pf_storage",  VCPU_STAT(pf_storage) },
64 	{ "sp_storage",  VCPU_STAT(sp_storage) },
65 	{ "pf_instruc",  VCPU_STAT(pf_instruc) },
66 	{ "sp_instruc",  VCPU_STAT(sp_instruc) },
67 	{ "ld",          VCPU_STAT(ld) },
68 	{ "ld_slow",     VCPU_STAT(ld_slow) },
69 	{ "st",          VCPU_STAT(st) },
70 	{ "st_slow",     VCPU_STAT(st_slow) },
71 	{ "pthru_all",       VCPU_STAT(pthru_all) },
72 	{ "pthru_host",      VCPU_STAT(pthru_host) },
73 	{ "pthru_bad_aff",   VCPU_STAT(pthru_bad_aff) },
74 	{ NULL }
75 };
76 
77 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
78 {
79 	if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
80 		ulong pc = kvmppc_get_pc(vcpu);
81 		ulong lr = kvmppc_get_lr(vcpu);
82 		if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
83 			kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
84 		if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
85 			kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
86 		vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
87 	}
88 }
89 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
90 
91 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
92 {
93 	if (!is_kvmppc_hv_enabled(vcpu->kvm))
94 		return to_book3s(vcpu)->hior;
95 	return 0;
96 }
97 
98 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
99 			unsigned long pending_now, unsigned long old_pending)
100 {
101 	if (is_kvmppc_hv_enabled(vcpu->kvm))
102 		return;
103 	if (pending_now)
104 		kvmppc_set_int_pending(vcpu, 1);
105 	else if (old_pending)
106 		kvmppc_set_int_pending(vcpu, 0);
107 }
108 
109 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
110 {
111 	ulong crit_raw;
112 	ulong crit_r1;
113 	bool crit;
114 
115 	if (is_kvmppc_hv_enabled(vcpu->kvm))
116 		return false;
117 
118 	crit_raw = kvmppc_get_critical(vcpu);
119 	crit_r1 = kvmppc_get_gpr(vcpu, 1);
120 
121 	/* Truncate crit indicators in 32 bit mode */
122 	if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
123 		crit_raw &= 0xffffffff;
124 		crit_r1 &= 0xffffffff;
125 	}
126 
127 	/* Critical section when crit == r1 */
128 	crit = (crit_raw == crit_r1);
129 	/* ... and we're in supervisor mode */
130 	crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
131 
132 	return crit;
133 }
134 
135 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
136 {
137 	kvmppc_unfixup_split_real(vcpu);
138 	kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
139 	kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
140 	kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
141 	vcpu->arch.mmu.reset_msr(vcpu);
142 }
143 
144 static int kvmppc_book3s_vec2irqprio(unsigned int vec)
145 {
146 	unsigned int prio;
147 
148 	switch (vec) {
149 	case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET;		break;
150 	case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK;	break;
151 	case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE;		break;
152 	case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT;		break;
153 	case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE;		break;
154 	case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT;		break;
155 	case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL;		break;
156 	case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT;		break;
157 	case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM;		break;
158 	case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL;		break;
159 	case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER;		break;
160 	case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL;		break;
161 	case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG;		break;
162 	case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC;		break;
163 	case 0xf40: prio = BOOK3S_IRQPRIO_VSX;			break;
164 	case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL;		break;
165 	default:    prio = BOOK3S_IRQPRIO_MAX;			break;
166 	}
167 
168 	return prio;
169 }
170 
171 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
172 					  unsigned int vec)
173 {
174 	unsigned long old_pending = vcpu->arch.pending_exceptions;
175 
176 	clear_bit(kvmppc_book3s_vec2irqprio(vec),
177 		  &vcpu->arch.pending_exceptions);
178 
179 	kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
180 				  old_pending);
181 }
182 
183 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
184 {
185 	vcpu->stat.queue_intr++;
186 
187 	set_bit(kvmppc_book3s_vec2irqprio(vec),
188 		&vcpu->arch.pending_exceptions);
189 #ifdef EXIT_DEBUG
190 	printk(KERN_INFO "Queueing interrupt %x\n", vec);
191 #endif
192 }
193 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
194 
195 void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
196 {
197 	/* might as well deliver this straight away */
198 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
199 }
200 EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
201 
202 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
203 {
204 	/* might as well deliver this straight away */
205 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
206 }
207 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
208 
209 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
210 {
211 	/* might as well deliver this straight away */
212 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
213 }
214 
215 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
216 {
217 	/* might as well deliver this straight away */
218 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
219 }
220 
221 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
222 {
223 	/* might as well deliver this straight away */
224 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
225 }
226 
227 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
228 {
229 	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
230 }
231 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
232 
233 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
234 {
235 	return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
236 }
237 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
238 
239 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
240 {
241 	kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
242 }
243 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
244 
245 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
246                                 struct kvm_interrupt *irq)
247 {
248 	/*
249 	 * This case (KVM_INTERRUPT_SET) should never actually arise for
250 	 * a pseries guest (because pseries guests expect their interrupt
251 	 * controllers to continue asserting an external interrupt request
252 	 * until it is acknowledged at the interrupt controller), but is
253 	 * included to avoid ABI breakage and potentially for other
254 	 * sorts of guest.
255 	 *
256 	 * There is a subtlety here: HV KVM does not test the
257 	 * external_oneshot flag in the code that synthesizes
258 	 * external interrupts for the guest just before entering
259 	 * the guest.  That is OK even if userspace did do a
260 	 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
261 	 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
262 	 * which ends up doing a smp_send_reschedule(), which will
263 	 * pull the guest all the way out to the host, meaning that
264 	 * we will call kvmppc_core_prepare_to_enter() before entering
265 	 * the guest again, and that will handle the external_oneshot
266 	 * flag correctly.
267 	 */
268 	if (irq->irq == KVM_INTERRUPT_SET)
269 		vcpu->arch.external_oneshot = 1;
270 
271 	kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
272 }
273 
274 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
275 {
276 	kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
277 }
278 
279 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
280 				    ulong flags)
281 {
282 	kvmppc_set_dar(vcpu, dar);
283 	kvmppc_set_dsisr(vcpu, flags);
284 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
285 }
286 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
287 
288 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
289 {
290 	kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
291 }
292 EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
293 
294 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
295 					 unsigned int priority)
296 {
297 	int deliver = 1;
298 	int vec = 0;
299 	bool crit = kvmppc_critical_section(vcpu);
300 
301 	switch (priority) {
302 	case BOOK3S_IRQPRIO_DECREMENTER:
303 		deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
304 		vec = BOOK3S_INTERRUPT_DECREMENTER;
305 		break;
306 	case BOOK3S_IRQPRIO_EXTERNAL:
307 		deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
308 		vec = BOOK3S_INTERRUPT_EXTERNAL;
309 		break;
310 	case BOOK3S_IRQPRIO_SYSTEM_RESET:
311 		vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
312 		break;
313 	case BOOK3S_IRQPRIO_MACHINE_CHECK:
314 		vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
315 		break;
316 	case BOOK3S_IRQPRIO_DATA_STORAGE:
317 		vec = BOOK3S_INTERRUPT_DATA_STORAGE;
318 		break;
319 	case BOOK3S_IRQPRIO_INST_STORAGE:
320 		vec = BOOK3S_INTERRUPT_INST_STORAGE;
321 		break;
322 	case BOOK3S_IRQPRIO_DATA_SEGMENT:
323 		vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
324 		break;
325 	case BOOK3S_IRQPRIO_INST_SEGMENT:
326 		vec = BOOK3S_INTERRUPT_INST_SEGMENT;
327 		break;
328 	case BOOK3S_IRQPRIO_ALIGNMENT:
329 		vec = BOOK3S_INTERRUPT_ALIGNMENT;
330 		break;
331 	case BOOK3S_IRQPRIO_PROGRAM:
332 		vec = BOOK3S_INTERRUPT_PROGRAM;
333 		break;
334 	case BOOK3S_IRQPRIO_VSX:
335 		vec = BOOK3S_INTERRUPT_VSX;
336 		break;
337 	case BOOK3S_IRQPRIO_ALTIVEC:
338 		vec = BOOK3S_INTERRUPT_ALTIVEC;
339 		break;
340 	case BOOK3S_IRQPRIO_FP_UNAVAIL:
341 		vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
342 		break;
343 	case BOOK3S_IRQPRIO_SYSCALL:
344 		vec = BOOK3S_INTERRUPT_SYSCALL;
345 		break;
346 	case BOOK3S_IRQPRIO_DEBUG:
347 		vec = BOOK3S_INTERRUPT_TRACE;
348 		break;
349 	case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
350 		vec = BOOK3S_INTERRUPT_PERFMON;
351 		break;
352 	case BOOK3S_IRQPRIO_FAC_UNAVAIL:
353 		vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
354 		break;
355 	default:
356 		deliver = 0;
357 		printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
358 		break;
359 	}
360 
361 #if 0
362 	printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
363 #endif
364 
365 	if (deliver)
366 		kvmppc_inject_interrupt(vcpu, vec, 0);
367 
368 	return deliver;
369 }
370 
371 /*
372  * This function determines if an irqprio should be cleared once issued.
373  */
374 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
375 {
376 	switch (priority) {
377 		case BOOK3S_IRQPRIO_DECREMENTER:
378 			/* DEC interrupts get cleared by mtdec */
379 			return false;
380 		case BOOK3S_IRQPRIO_EXTERNAL:
381 			/*
382 			 * External interrupts get cleared by userspace
383 			 * except when set by the KVM_INTERRUPT ioctl with
384 			 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
385 			 */
386 			if (vcpu->arch.external_oneshot) {
387 				vcpu->arch.external_oneshot = 0;
388 				return true;
389 			}
390 			return false;
391 	}
392 
393 	return true;
394 }
395 
396 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
397 {
398 	unsigned long *pending = &vcpu->arch.pending_exceptions;
399 	unsigned long old_pending = vcpu->arch.pending_exceptions;
400 	unsigned int priority;
401 
402 #ifdef EXIT_DEBUG
403 	if (vcpu->arch.pending_exceptions)
404 		printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
405 #endif
406 	priority = __ffs(*pending);
407 	while (priority < BOOK3S_IRQPRIO_MAX) {
408 		if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
409 		    clear_irqprio(vcpu, priority)) {
410 			clear_bit(priority, &vcpu->arch.pending_exceptions);
411 			break;
412 		}
413 
414 		priority = find_next_bit(pending,
415 					 BITS_PER_BYTE * sizeof(*pending),
416 					 priority + 1);
417 	}
418 
419 	/* Tell the guest about our interrupt status */
420 	kvmppc_update_int_pending(vcpu, *pending, old_pending);
421 
422 	return 0;
423 }
424 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
425 
426 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
427 			bool *writable)
428 {
429 	ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
430 	gfn_t gfn = gpa >> PAGE_SHIFT;
431 
432 	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
433 		mp_pa = (uint32_t)mp_pa;
434 
435 	/* Magic page override */
436 	gpa &= ~0xFFFULL;
437 	if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
438 		ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
439 		kvm_pfn_t pfn;
440 
441 		pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
442 		get_page(pfn_to_page(pfn));
443 		if (writable)
444 			*writable = true;
445 		return pfn;
446 	}
447 
448 	return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
449 }
450 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
451 
452 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
453 		 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
454 {
455 	bool data = (xlid == XLATE_DATA);
456 	bool iswrite = (xlrw == XLATE_WRITE);
457 	int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
458 	int r;
459 
460 	if (relocated) {
461 		r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
462 	} else {
463 		pte->eaddr = eaddr;
464 		pte->raddr = eaddr & KVM_PAM;
465 		pte->vpage = VSID_REAL | eaddr >> 12;
466 		pte->may_read = true;
467 		pte->may_write = true;
468 		pte->may_execute = true;
469 		r = 0;
470 
471 		if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
472 		    !data) {
473 			if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
474 			    ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
475 			pte->raddr &= ~SPLIT_HACK_MASK;
476 		}
477 	}
478 
479 	return r;
480 }
481 
482 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
483 		enum instruction_fetch_type type, u32 *inst)
484 {
485 	ulong pc = kvmppc_get_pc(vcpu);
486 	int r;
487 
488 	if (type == INST_SC)
489 		pc -= 4;
490 
491 	r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
492 	if (r == EMULATE_DONE)
493 		return r;
494 	else
495 		return EMULATE_AGAIN;
496 }
497 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
498 
499 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
500 {
501 	return 0;
502 }
503 
504 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
505 {
506 	return 0;
507 }
508 
509 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
510 {
511 }
512 
513 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
514 				  struct kvm_sregs *sregs)
515 {
516 	int ret;
517 
518 	vcpu_load(vcpu);
519 	ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
520 	vcpu_put(vcpu);
521 
522 	return ret;
523 }
524 
525 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
526 				  struct kvm_sregs *sregs)
527 {
528 	int ret;
529 
530 	vcpu_load(vcpu);
531 	ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
532 	vcpu_put(vcpu);
533 
534 	return ret;
535 }
536 
537 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
538 {
539 	int i;
540 
541 	regs->pc = kvmppc_get_pc(vcpu);
542 	regs->cr = kvmppc_get_cr(vcpu);
543 	regs->ctr = kvmppc_get_ctr(vcpu);
544 	regs->lr = kvmppc_get_lr(vcpu);
545 	regs->xer = kvmppc_get_xer(vcpu);
546 	regs->msr = kvmppc_get_msr(vcpu);
547 	regs->srr0 = kvmppc_get_srr0(vcpu);
548 	regs->srr1 = kvmppc_get_srr1(vcpu);
549 	regs->pid = vcpu->arch.pid;
550 	regs->sprg0 = kvmppc_get_sprg0(vcpu);
551 	regs->sprg1 = kvmppc_get_sprg1(vcpu);
552 	regs->sprg2 = kvmppc_get_sprg2(vcpu);
553 	regs->sprg3 = kvmppc_get_sprg3(vcpu);
554 	regs->sprg4 = kvmppc_get_sprg4(vcpu);
555 	regs->sprg5 = kvmppc_get_sprg5(vcpu);
556 	regs->sprg6 = kvmppc_get_sprg6(vcpu);
557 	regs->sprg7 = kvmppc_get_sprg7(vcpu);
558 
559 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
560 		regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
561 
562 	return 0;
563 }
564 
565 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
566 {
567 	int i;
568 
569 	kvmppc_set_pc(vcpu, regs->pc);
570 	kvmppc_set_cr(vcpu, regs->cr);
571 	kvmppc_set_ctr(vcpu, regs->ctr);
572 	kvmppc_set_lr(vcpu, regs->lr);
573 	kvmppc_set_xer(vcpu, regs->xer);
574 	kvmppc_set_msr(vcpu, regs->msr);
575 	kvmppc_set_srr0(vcpu, regs->srr0);
576 	kvmppc_set_srr1(vcpu, regs->srr1);
577 	kvmppc_set_sprg0(vcpu, regs->sprg0);
578 	kvmppc_set_sprg1(vcpu, regs->sprg1);
579 	kvmppc_set_sprg2(vcpu, regs->sprg2);
580 	kvmppc_set_sprg3(vcpu, regs->sprg3);
581 	kvmppc_set_sprg4(vcpu, regs->sprg4);
582 	kvmppc_set_sprg5(vcpu, regs->sprg5);
583 	kvmppc_set_sprg6(vcpu, regs->sprg6);
584 	kvmppc_set_sprg7(vcpu, regs->sprg7);
585 
586 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
587 		kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
588 
589 	return 0;
590 }
591 
592 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
593 {
594 	return -ENOTSUPP;
595 }
596 
597 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
598 {
599 	return -ENOTSUPP;
600 }
601 
602 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
603 			union kvmppc_one_reg *val)
604 {
605 	int r = 0;
606 	long int i;
607 
608 	r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
609 	if (r == -EINVAL) {
610 		r = 0;
611 		switch (id) {
612 		case KVM_REG_PPC_DAR:
613 			*val = get_reg_val(id, kvmppc_get_dar(vcpu));
614 			break;
615 		case KVM_REG_PPC_DSISR:
616 			*val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
617 			break;
618 		case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
619 			i = id - KVM_REG_PPC_FPR0;
620 			*val = get_reg_val(id, VCPU_FPR(vcpu, i));
621 			break;
622 		case KVM_REG_PPC_FPSCR:
623 			*val = get_reg_val(id, vcpu->arch.fp.fpscr);
624 			break;
625 #ifdef CONFIG_VSX
626 		case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
627 			if (cpu_has_feature(CPU_FTR_VSX)) {
628 				i = id - KVM_REG_PPC_VSR0;
629 				val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
630 				val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
631 			} else {
632 				r = -ENXIO;
633 			}
634 			break;
635 #endif /* CONFIG_VSX */
636 		case KVM_REG_PPC_DEBUG_INST:
637 			*val = get_reg_val(id, INS_TW);
638 			break;
639 #ifdef CONFIG_KVM_XICS
640 		case KVM_REG_PPC_ICP_STATE:
641 			if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
642 				r = -ENXIO;
643 				break;
644 			}
645 			if (xive_enabled())
646 				*val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
647 			else
648 				*val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
649 			break;
650 #endif /* CONFIG_KVM_XICS */
651 		case KVM_REG_PPC_FSCR:
652 			*val = get_reg_val(id, vcpu->arch.fscr);
653 			break;
654 		case KVM_REG_PPC_TAR:
655 			*val = get_reg_val(id, vcpu->arch.tar);
656 			break;
657 		case KVM_REG_PPC_EBBHR:
658 			*val = get_reg_val(id, vcpu->arch.ebbhr);
659 			break;
660 		case KVM_REG_PPC_EBBRR:
661 			*val = get_reg_val(id, vcpu->arch.ebbrr);
662 			break;
663 		case KVM_REG_PPC_BESCR:
664 			*val = get_reg_val(id, vcpu->arch.bescr);
665 			break;
666 		case KVM_REG_PPC_IC:
667 			*val = get_reg_val(id, vcpu->arch.ic);
668 			break;
669 		default:
670 			r = -EINVAL;
671 			break;
672 		}
673 	}
674 
675 	return r;
676 }
677 
678 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
679 			union kvmppc_one_reg *val)
680 {
681 	int r = 0;
682 	long int i;
683 
684 	r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
685 	if (r == -EINVAL) {
686 		r = 0;
687 		switch (id) {
688 		case KVM_REG_PPC_DAR:
689 			kvmppc_set_dar(vcpu, set_reg_val(id, *val));
690 			break;
691 		case KVM_REG_PPC_DSISR:
692 			kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
693 			break;
694 		case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
695 			i = id - KVM_REG_PPC_FPR0;
696 			VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
697 			break;
698 		case KVM_REG_PPC_FPSCR:
699 			vcpu->arch.fp.fpscr = set_reg_val(id, *val);
700 			break;
701 #ifdef CONFIG_VSX
702 		case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
703 			if (cpu_has_feature(CPU_FTR_VSX)) {
704 				i = id - KVM_REG_PPC_VSR0;
705 				vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
706 				vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
707 			} else {
708 				r = -ENXIO;
709 			}
710 			break;
711 #endif /* CONFIG_VSX */
712 #ifdef CONFIG_KVM_XICS
713 		case KVM_REG_PPC_ICP_STATE:
714 			if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
715 				r = -ENXIO;
716 				break;
717 			}
718 			if (xive_enabled())
719 				r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
720 			else
721 				r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
722 			break;
723 #endif /* CONFIG_KVM_XICS */
724 		case KVM_REG_PPC_FSCR:
725 			vcpu->arch.fscr = set_reg_val(id, *val);
726 			break;
727 		case KVM_REG_PPC_TAR:
728 			vcpu->arch.tar = set_reg_val(id, *val);
729 			break;
730 		case KVM_REG_PPC_EBBHR:
731 			vcpu->arch.ebbhr = set_reg_val(id, *val);
732 			break;
733 		case KVM_REG_PPC_EBBRR:
734 			vcpu->arch.ebbrr = set_reg_val(id, *val);
735 			break;
736 		case KVM_REG_PPC_BESCR:
737 			vcpu->arch.bescr = set_reg_val(id, *val);
738 			break;
739 		case KVM_REG_PPC_IC:
740 			vcpu->arch.ic = set_reg_val(id, *val);
741 			break;
742 		default:
743 			r = -EINVAL;
744 			break;
745 		}
746 	}
747 
748 	return r;
749 }
750 
751 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
752 {
753 	vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
754 }
755 
756 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
757 {
758 	vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
759 }
760 
761 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
762 {
763 	vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
764 }
765 EXPORT_SYMBOL_GPL(kvmppc_set_msr);
766 
767 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
768 {
769 	return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
770 }
771 
772 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
773                                   struct kvm_translation *tr)
774 {
775 	return 0;
776 }
777 
778 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
779 					struct kvm_guest_debug *dbg)
780 {
781 	vcpu_load(vcpu);
782 	vcpu->guest_debug = dbg->control;
783 	vcpu_put(vcpu);
784 	return 0;
785 }
786 
787 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
788 {
789 	kvmppc_core_queue_dec(vcpu);
790 	kvm_vcpu_kick(vcpu);
791 }
792 
793 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
794 {
795 	return kvm->arch.kvm_ops->vcpu_create(kvm, id);
796 }
797 
798 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
799 {
800 	vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
801 }
802 
803 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
804 {
805 	return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
806 }
807 
808 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
809 {
810 	return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
811 }
812 
813 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
814 			      struct kvm_memory_slot *dont)
815 {
816 	kvm->arch.kvm_ops->free_memslot(free, dont);
817 }
818 
819 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
820 			       unsigned long npages)
821 {
822 	return kvm->arch.kvm_ops->create_memslot(slot, npages);
823 }
824 
825 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
826 {
827 	kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
828 }
829 
830 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
831 				struct kvm_memory_slot *memslot,
832 				const struct kvm_userspace_memory_region *mem)
833 {
834 	return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
835 }
836 
837 void kvmppc_core_commit_memory_region(struct kvm *kvm,
838 				const struct kvm_userspace_memory_region *mem,
839 				const struct kvm_memory_slot *old,
840 				const struct kvm_memory_slot *new,
841 				enum kvm_mr_change change)
842 {
843 	kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
844 }
845 
846 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
847 {
848 	return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
849 }
850 
851 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
852 {
853 	return kvm->arch.kvm_ops->age_hva(kvm, start, end);
854 }
855 
856 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
857 {
858 	return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
859 }
860 
861 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
862 {
863 	kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
864 	return 0;
865 }
866 
867 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
868 {
869 	vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
870 }
871 
872 int kvmppc_core_init_vm(struct kvm *kvm)
873 {
874 
875 #ifdef CONFIG_PPC64
876 	INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
877 	INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
878 #endif
879 
880 	return kvm->arch.kvm_ops->init_vm(kvm);
881 }
882 
883 void kvmppc_core_destroy_vm(struct kvm *kvm)
884 {
885 	kvm->arch.kvm_ops->destroy_vm(kvm);
886 
887 #ifdef CONFIG_PPC64
888 	kvmppc_rtas_tokens_free(kvm);
889 	WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
890 #endif
891 }
892 
893 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
894 {
895 	unsigned long size = kvmppc_get_gpr(vcpu, 4);
896 	unsigned long addr = kvmppc_get_gpr(vcpu, 5);
897 	u64 buf;
898 	int srcu_idx;
899 	int ret;
900 
901 	if (!is_power_of_2(size) || (size > sizeof(buf)))
902 		return H_TOO_HARD;
903 
904 	srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
905 	ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
906 	srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
907 	if (ret != 0)
908 		return H_TOO_HARD;
909 
910 	switch (size) {
911 	case 1:
912 		kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
913 		break;
914 
915 	case 2:
916 		kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
917 		break;
918 
919 	case 4:
920 		kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
921 		break;
922 
923 	case 8:
924 		kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
925 		break;
926 
927 	default:
928 		BUG();
929 	}
930 
931 	return H_SUCCESS;
932 }
933 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
934 
935 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
936 {
937 	unsigned long size = kvmppc_get_gpr(vcpu, 4);
938 	unsigned long addr = kvmppc_get_gpr(vcpu, 5);
939 	unsigned long val = kvmppc_get_gpr(vcpu, 6);
940 	u64 buf;
941 	int srcu_idx;
942 	int ret;
943 
944 	switch (size) {
945 	case 1:
946 		*(u8 *)&buf = val;
947 		break;
948 
949 	case 2:
950 		*(__be16 *)&buf = cpu_to_be16(val);
951 		break;
952 
953 	case 4:
954 		*(__be32 *)&buf = cpu_to_be32(val);
955 		break;
956 
957 	case 8:
958 		*(__be64 *)&buf = cpu_to_be64(val);
959 		break;
960 
961 	default:
962 		return H_TOO_HARD;
963 	}
964 
965 	srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
966 	ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
967 	srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
968 	if (ret != 0)
969 		return H_TOO_HARD;
970 
971 	return H_SUCCESS;
972 }
973 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
974 
975 int kvmppc_core_check_processor_compat(void)
976 {
977 	/*
978 	 * We always return 0 for book3s. We check
979 	 * for compatibility while loading the HV
980 	 * or PR module
981 	 */
982 	return 0;
983 }
984 
985 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
986 {
987 	return kvm->arch.kvm_ops->hcall_implemented(hcall);
988 }
989 
990 #ifdef CONFIG_KVM_XICS
991 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
992 		bool line_status)
993 {
994 	if (xive_enabled())
995 		return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
996 					   line_status);
997 	else
998 		return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
999 					   line_status);
1000 }
1001 
1002 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1003 			      struct kvm *kvm, int irq_source_id,
1004 			      int level, bool line_status)
1005 {
1006 	return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1007 			   level, line_status);
1008 }
1009 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1010 				 struct kvm *kvm, int irq_source_id, int level,
1011 				 bool line_status)
1012 {
1013 	return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1014 }
1015 
1016 int kvm_irq_map_gsi(struct kvm *kvm,
1017 		    struct kvm_kernel_irq_routing_entry *entries, int gsi)
1018 {
1019 	entries->gsi = gsi;
1020 	entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1021 	entries->set = kvmppc_book3s_set_irq;
1022 	entries->irqchip.irqchip = 0;
1023 	entries->irqchip.pin = gsi;
1024 	return 1;
1025 }
1026 
1027 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1028 {
1029 	return pin;
1030 }
1031 
1032 #endif /* CONFIG_KVM_XICS */
1033 
1034 static int kvmppc_book3s_init(void)
1035 {
1036 	int r;
1037 
1038 	r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1039 	if (r)
1040 		return r;
1041 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1042 	r = kvmppc_book3s_init_pr();
1043 #endif
1044 
1045 #ifdef CONFIG_KVM_XICS
1046 #ifdef CONFIG_KVM_XIVE
1047 	if (xive_enabled()) {
1048 		kvmppc_xive_init_module();
1049 		kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1050 	} else
1051 #endif
1052 		kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1053 #endif
1054 	return r;
1055 }
1056 
1057 static void kvmppc_book3s_exit(void)
1058 {
1059 #ifdef CONFIG_KVM_XICS
1060 	if (xive_enabled())
1061 		kvmppc_xive_exit_module();
1062 #endif
1063 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1064 	kvmppc_book3s_exit_pr();
1065 #endif
1066 	kvm_exit();
1067 }
1068 
1069 module_init(kvmppc_book3s_init);
1070 module_exit(kvmppc_book3s_exit);
1071 
1072 /* On 32bit this is our one and only kernel module */
1073 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1074 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1075 MODULE_ALIAS("devname:kvm");
1076 #endif
1077