xref: /linux/arch/powerpc/kernel/uprobes.c (revision 8b7b80b9ebb46dd88fbb94e918297295cf312b59)
1*8b7b80b9SAnanth N Mavinakayanahalli /*
2*8b7b80b9SAnanth N Mavinakayanahalli  * User-space Probes (UProbes) for powerpc
3*8b7b80b9SAnanth N Mavinakayanahalli  *
4*8b7b80b9SAnanth N Mavinakayanahalli  * This program is free software; you can redistribute it and/or modify
5*8b7b80b9SAnanth N Mavinakayanahalli  * it under the terms of the GNU General Public License as published by
6*8b7b80b9SAnanth N Mavinakayanahalli  * the Free Software Foundation; either version 2 of the License, or
7*8b7b80b9SAnanth N Mavinakayanahalli  * (at your option) any later version.
8*8b7b80b9SAnanth N Mavinakayanahalli  *
9*8b7b80b9SAnanth N Mavinakayanahalli  * This program is distributed in the hope that it will be useful,
10*8b7b80b9SAnanth N Mavinakayanahalli  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11*8b7b80b9SAnanth N Mavinakayanahalli  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12*8b7b80b9SAnanth N Mavinakayanahalli  * GNU General Public License for more details.
13*8b7b80b9SAnanth N Mavinakayanahalli  *
14*8b7b80b9SAnanth N Mavinakayanahalli  * You should have received a copy of the GNU General Public License
15*8b7b80b9SAnanth N Mavinakayanahalli  * along with this program; if not, write to the Free Software
16*8b7b80b9SAnanth N Mavinakayanahalli  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17*8b7b80b9SAnanth N Mavinakayanahalli  *
18*8b7b80b9SAnanth N Mavinakayanahalli  * Copyright IBM Corporation, 2007-2012
19*8b7b80b9SAnanth N Mavinakayanahalli  *
20*8b7b80b9SAnanth N Mavinakayanahalli  * Adapted from the x86 port by Ananth N Mavinakayanahalli <ananth@in.ibm.com>
21*8b7b80b9SAnanth N Mavinakayanahalli  */
22*8b7b80b9SAnanth N Mavinakayanahalli #include <linux/kernel.h>
23*8b7b80b9SAnanth N Mavinakayanahalli #include <linux/sched.h>
24*8b7b80b9SAnanth N Mavinakayanahalli #include <linux/ptrace.h>
25*8b7b80b9SAnanth N Mavinakayanahalli #include <linux/uprobes.h>
26*8b7b80b9SAnanth N Mavinakayanahalli #include <linux/uaccess.h>
27*8b7b80b9SAnanth N Mavinakayanahalli #include <linux/kdebug.h>
28*8b7b80b9SAnanth N Mavinakayanahalli 
29*8b7b80b9SAnanth N Mavinakayanahalli #include <asm/sstep.h>
30*8b7b80b9SAnanth N Mavinakayanahalli 
31*8b7b80b9SAnanth N Mavinakayanahalli #define UPROBE_TRAP_NR	UINT_MAX
32*8b7b80b9SAnanth N Mavinakayanahalli 
33*8b7b80b9SAnanth N Mavinakayanahalli /**
34*8b7b80b9SAnanth N Mavinakayanahalli  * arch_uprobe_analyze_insn
35*8b7b80b9SAnanth N Mavinakayanahalli  * @mm: the probed address space.
36*8b7b80b9SAnanth N Mavinakayanahalli  * @arch_uprobe: the probepoint information.
37*8b7b80b9SAnanth N Mavinakayanahalli  * @addr: vaddr to probe.
38*8b7b80b9SAnanth N Mavinakayanahalli  * Return 0 on success or a -ve number on error.
39*8b7b80b9SAnanth N Mavinakayanahalli  */
40*8b7b80b9SAnanth N Mavinakayanahalli int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
41*8b7b80b9SAnanth N Mavinakayanahalli 		struct mm_struct *mm, unsigned long addr)
42*8b7b80b9SAnanth N Mavinakayanahalli {
43*8b7b80b9SAnanth N Mavinakayanahalli 	if (addr & 0x03)
44*8b7b80b9SAnanth N Mavinakayanahalli 		return -EINVAL;
45*8b7b80b9SAnanth N Mavinakayanahalli 
46*8b7b80b9SAnanth N Mavinakayanahalli 	/*
47*8b7b80b9SAnanth N Mavinakayanahalli 	 * We currently don't support a uprobe on an already
48*8b7b80b9SAnanth N Mavinakayanahalli 	 * existing breakpoint instruction underneath
49*8b7b80b9SAnanth N Mavinakayanahalli 	 */
50*8b7b80b9SAnanth N Mavinakayanahalli 	if (is_trap(auprobe->ainsn))
51*8b7b80b9SAnanth N Mavinakayanahalli 		return -ENOTSUPP;
52*8b7b80b9SAnanth N Mavinakayanahalli 	return 0;
53*8b7b80b9SAnanth N Mavinakayanahalli }
54*8b7b80b9SAnanth N Mavinakayanahalli 
55*8b7b80b9SAnanth N Mavinakayanahalli /*
56*8b7b80b9SAnanth N Mavinakayanahalli  * arch_uprobe_pre_xol - prepare to execute out of line.
57*8b7b80b9SAnanth N Mavinakayanahalli  * @auprobe: the probepoint information.
58*8b7b80b9SAnanth N Mavinakayanahalli  * @regs: reflects the saved user state of current task.
59*8b7b80b9SAnanth N Mavinakayanahalli  */
60*8b7b80b9SAnanth N Mavinakayanahalli int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
61*8b7b80b9SAnanth N Mavinakayanahalli {
62*8b7b80b9SAnanth N Mavinakayanahalli 	struct arch_uprobe_task *autask = &current->utask->autask;
63*8b7b80b9SAnanth N Mavinakayanahalli 
64*8b7b80b9SAnanth N Mavinakayanahalli 	autask->saved_trap_nr = current->thread.trap_nr;
65*8b7b80b9SAnanth N Mavinakayanahalli 	current->thread.trap_nr = UPROBE_TRAP_NR;
66*8b7b80b9SAnanth N Mavinakayanahalli 	regs->nip = current->utask->xol_vaddr;
67*8b7b80b9SAnanth N Mavinakayanahalli 	return 0;
68*8b7b80b9SAnanth N Mavinakayanahalli }
69*8b7b80b9SAnanth N Mavinakayanahalli 
70*8b7b80b9SAnanth N Mavinakayanahalli /**
71*8b7b80b9SAnanth N Mavinakayanahalli  * uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
72*8b7b80b9SAnanth N Mavinakayanahalli  * @regs: Reflects the saved state of the task after it has hit a breakpoint
73*8b7b80b9SAnanth N Mavinakayanahalli  * instruction.
74*8b7b80b9SAnanth N Mavinakayanahalli  * Return the address of the breakpoint instruction.
75*8b7b80b9SAnanth N Mavinakayanahalli  */
76*8b7b80b9SAnanth N Mavinakayanahalli unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
77*8b7b80b9SAnanth N Mavinakayanahalli {
78*8b7b80b9SAnanth N Mavinakayanahalli 	return instruction_pointer(regs);
79*8b7b80b9SAnanth N Mavinakayanahalli }
80*8b7b80b9SAnanth N Mavinakayanahalli 
81*8b7b80b9SAnanth N Mavinakayanahalli /*
82*8b7b80b9SAnanth N Mavinakayanahalli  * If xol insn itself traps and generates a signal (SIGILL/SIGSEGV/etc),
83*8b7b80b9SAnanth N Mavinakayanahalli  * then detect the case where a singlestepped instruction jumps back to its
84*8b7b80b9SAnanth N Mavinakayanahalli  * own address. It is assumed that anything like do_page_fault/do_trap/etc
85*8b7b80b9SAnanth N Mavinakayanahalli  * sets thread.trap_nr != UINT_MAX.
86*8b7b80b9SAnanth N Mavinakayanahalli  *
87*8b7b80b9SAnanth N Mavinakayanahalli  * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
88*8b7b80b9SAnanth N Mavinakayanahalli  * arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
89*8b7b80b9SAnanth N Mavinakayanahalli  * UPROBE_TRAP_NR == UINT_MAX set by arch_uprobe_pre_xol().
90*8b7b80b9SAnanth N Mavinakayanahalli  */
91*8b7b80b9SAnanth N Mavinakayanahalli bool arch_uprobe_xol_was_trapped(struct task_struct *t)
92*8b7b80b9SAnanth N Mavinakayanahalli {
93*8b7b80b9SAnanth N Mavinakayanahalli 	if (t->thread.trap_nr != UPROBE_TRAP_NR)
94*8b7b80b9SAnanth N Mavinakayanahalli 		return true;
95*8b7b80b9SAnanth N Mavinakayanahalli 
96*8b7b80b9SAnanth N Mavinakayanahalli 	return false;
97*8b7b80b9SAnanth N Mavinakayanahalli }
98*8b7b80b9SAnanth N Mavinakayanahalli 
99*8b7b80b9SAnanth N Mavinakayanahalli /*
100*8b7b80b9SAnanth N Mavinakayanahalli  * Called after single-stepping. To avoid the SMP problems that can
101*8b7b80b9SAnanth N Mavinakayanahalli  * occur when we temporarily put back the original opcode to
102*8b7b80b9SAnanth N Mavinakayanahalli  * single-step, we single-stepped a copy of the instruction.
103*8b7b80b9SAnanth N Mavinakayanahalli  *
104*8b7b80b9SAnanth N Mavinakayanahalli  * This function prepares to resume execution after the single-step.
105*8b7b80b9SAnanth N Mavinakayanahalli  */
106*8b7b80b9SAnanth N Mavinakayanahalli int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
107*8b7b80b9SAnanth N Mavinakayanahalli {
108*8b7b80b9SAnanth N Mavinakayanahalli 	struct uprobe_task *utask = current->utask;
109*8b7b80b9SAnanth N Mavinakayanahalli 
110*8b7b80b9SAnanth N Mavinakayanahalli 	WARN_ON_ONCE(current->thread.trap_nr != UPROBE_TRAP_NR);
111*8b7b80b9SAnanth N Mavinakayanahalli 
112*8b7b80b9SAnanth N Mavinakayanahalli 	current->thread.trap_nr = utask->autask.saved_trap_nr;
113*8b7b80b9SAnanth N Mavinakayanahalli 
114*8b7b80b9SAnanth N Mavinakayanahalli 	/*
115*8b7b80b9SAnanth N Mavinakayanahalli 	 * On powerpc, except for loads and stores, most instructions
116*8b7b80b9SAnanth N Mavinakayanahalli 	 * including ones that alter code flow (branches, calls, returns)
117*8b7b80b9SAnanth N Mavinakayanahalli 	 * are emulated in the kernel. We get here only if the emulation
118*8b7b80b9SAnanth N Mavinakayanahalli 	 * support doesn't exist and have to fix-up the next instruction
119*8b7b80b9SAnanth N Mavinakayanahalli 	 * to be executed.
120*8b7b80b9SAnanth N Mavinakayanahalli 	 */
121*8b7b80b9SAnanth N Mavinakayanahalli 	regs->nip = utask->vaddr + MAX_UINSN_BYTES;
122*8b7b80b9SAnanth N Mavinakayanahalli 	return 0;
123*8b7b80b9SAnanth N Mavinakayanahalli }
124*8b7b80b9SAnanth N Mavinakayanahalli 
125*8b7b80b9SAnanth N Mavinakayanahalli /* callback routine for handling exceptions. */
126*8b7b80b9SAnanth N Mavinakayanahalli int arch_uprobe_exception_notify(struct notifier_block *self,
127*8b7b80b9SAnanth N Mavinakayanahalli 				unsigned long val, void *data)
128*8b7b80b9SAnanth N Mavinakayanahalli {
129*8b7b80b9SAnanth N Mavinakayanahalli 	struct die_args *args = data;
130*8b7b80b9SAnanth N Mavinakayanahalli 	struct pt_regs *regs = args->regs;
131*8b7b80b9SAnanth N Mavinakayanahalli 
132*8b7b80b9SAnanth N Mavinakayanahalli 	/* regs == NULL is a kernel bug */
133*8b7b80b9SAnanth N Mavinakayanahalli 	if (WARN_ON(!regs))
134*8b7b80b9SAnanth N Mavinakayanahalli 		return NOTIFY_DONE;
135*8b7b80b9SAnanth N Mavinakayanahalli 
136*8b7b80b9SAnanth N Mavinakayanahalli 	/* We are only interested in userspace traps */
137*8b7b80b9SAnanth N Mavinakayanahalli 	if (!user_mode(regs))
138*8b7b80b9SAnanth N Mavinakayanahalli 		return NOTIFY_DONE;
139*8b7b80b9SAnanth N Mavinakayanahalli 
140*8b7b80b9SAnanth N Mavinakayanahalli 	switch (val) {
141*8b7b80b9SAnanth N Mavinakayanahalli 	case DIE_BPT:
142*8b7b80b9SAnanth N Mavinakayanahalli 		if (uprobe_pre_sstep_notifier(regs))
143*8b7b80b9SAnanth N Mavinakayanahalli 			return NOTIFY_STOP;
144*8b7b80b9SAnanth N Mavinakayanahalli 		break;
145*8b7b80b9SAnanth N Mavinakayanahalli 	case DIE_SSTEP:
146*8b7b80b9SAnanth N Mavinakayanahalli 		if (uprobe_post_sstep_notifier(regs))
147*8b7b80b9SAnanth N Mavinakayanahalli 			return NOTIFY_STOP;
148*8b7b80b9SAnanth N Mavinakayanahalli 	default:
149*8b7b80b9SAnanth N Mavinakayanahalli 		break;
150*8b7b80b9SAnanth N Mavinakayanahalli 	}
151*8b7b80b9SAnanth N Mavinakayanahalli 	return NOTIFY_DONE;
152*8b7b80b9SAnanth N Mavinakayanahalli }
153*8b7b80b9SAnanth N Mavinakayanahalli 
154*8b7b80b9SAnanth N Mavinakayanahalli /*
155*8b7b80b9SAnanth N Mavinakayanahalli  * This function gets called when XOL instruction either gets trapped or
156*8b7b80b9SAnanth N Mavinakayanahalli  * the thread has a fatal signal, so reset the instruction pointer to its
157*8b7b80b9SAnanth N Mavinakayanahalli  * probed address.
158*8b7b80b9SAnanth N Mavinakayanahalli  */
159*8b7b80b9SAnanth N Mavinakayanahalli void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
160*8b7b80b9SAnanth N Mavinakayanahalli {
161*8b7b80b9SAnanth N Mavinakayanahalli 	struct uprobe_task *utask = current->utask;
162*8b7b80b9SAnanth N Mavinakayanahalli 
163*8b7b80b9SAnanth N Mavinakayanahalli 	current->thread.trap_nr = utask->autask.saved_trap_nr;
164*8b7b80b9SAnanth N Mavinakayanahalli 	instruction_pointer_set(regs, utask->vaddr);
165*8b7b80b9SAnanth N Mavinakayanahalli }
166*8b7b80b9SAnanth N Mavinakayanahalli 
167*8b7b80b9SAnanth N Mavinakayanahalli /*
168*8b7b80b9SAnanth N Mavinakayanahalli  * See if the instruction can be emulated.
169*8b7b80b9SAnanth N Mavinakayanahalli  * Returns true if instruction was emulated, false otherwise.
170*8b7b80b9SAnanth N Mavinakayanahalli  */
171*8b7b80b9SAnanth N Mavinakayanahalli bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
172*8b7b80b9SAnanth N Mavinakayanahalli {
173*8b7b80b9SAnanth N Mavinakayanahalli 	int ret;
174*8b7b80b9SAnanth N Mavinakayanahalli 
175*8b7b80b9SAnanth N Mavinakayanahalli 	/*
176*8b7b80b9SAnanth N Mavinakayanahalli 	 * emulate_step() returns 1 if the insn was successfully emulated.
177*8b7b80b9SAnanth N Mavinakayanahalli 	 * For all other cases, we need to single-step in hardware.
178*8b7b80b9SAnanth N Mavinakayanahalli 	 */
179*8b7b80b9SAnanth N Mavinakayanahalli 	ret = emulate_step(regs, auprobe->ainsn);
180*8b7b80b9SAnanth N Mavinakayanahalli 	if (ret > 0)
181*8b7b80b9SAnanth N Mavinakayanahalli 		return true;
182*8b7b80b9SAnanth N Mavinakayanahalli 
183*8b7b80b9SAnanth N Mavinakayanahalli 	return false;
184*8b7b80b9SAnanth N Mavinakayanahalli }
185