1 /* 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * and Paul Mackerras (paulus@samba.org) 11 */ 12 13 /* 14 * This file handles the architecture-dependent parts of hardware exceptions 15 */ 16 17 #include <linux/config.h> 18 #include <linux/errno.h> 19 #include <linux/sched.h> 20 #include <linux/kernel.h> 21 #include <linux/mm.h> 22 #include <linux/stddef.h> 23 #include <linux/unistd.h> 24 #include <linux/ptrace.h> 25 #include <linux/slab.h> 26 #include <linux/user.h> 27 #include <linux/a.out.h> 28 #include <linux/interrupt.h> 29 #include <linux/init.h> 30 #include <linux/module.h> 31 #include <linux/prctl.h> 32 #include <linux/delay.h> 33 #include <linux/kprobes.h> 34 #include <linux/kexec.h> 35 36 #include <asm/kdebug.h> 37 #include <asm/pgtable.h> 38 #include <asm/uaccess.h> 39 #include <asm/system.h> 40 #include <asm/io.h> 41 #include <asm/machdep.h> 42 #include <asm/rtas.h> 43 #include <asm/pmc.h> 44 #ifdef CONFIG_PPC32 45 #include <asm/reg.h> 46 #endif 47 #ifdef CONFIG_PMAC_BACKLIGHT 48 #include <asm/backlight.h> 49 #endif 50 #ifdef CONFIG_PPC64 51 #include <asm/firmware.h> 52 #include <asm/processor.h> 53 #endif 54 55 #ifdef CONFIG_PPC64 /* XXX */ 56 #define _IO_BASE pci_io_base 57 #endif 58 59 #ifdef CONFIG_DEBUGGER 60 int (*__debugger)(struct pt_regs *regs); 61 int (*__debugger_ipi)(struct pt_regs *regs); 62 int (*__debugger_bpt)(struct pt_regs *regs); 63 int (*__debugger_sstep)(struct pt_regs *regs); 64 int (*__debugger_iabr_match)(struct pt_regs *regs); 65 int (*__debugger_dabr_match)(struct pt_regs *regs); 66 int (*__debugger_fault_handler)(struct pt_regs *regs); 67 68 EXPORT_SYMBOL(__debugger); 69 EXPORT_SYMBOL(__debugger_ipi); 70 EXPORT_SYMBOL(__debugger_bpt); 71 EXPORT_SYMBOL(__debugger_sstep); 72 EXPORT_SYMBOL(__debugger_iabr_match); 73 EXPORT_SYMBOL(__debugger_dabr_match); 74 EXPORT_SYMBOL(__debugger_fault_handler); 75 #endif 76 77 struct notifier_block *powerpc_die_chain; 78 static DEFINE_SPINLOCK(die_notifier_lock); 79 80 int register_die_notifier(struct notifier_block *nb) 81 { 82 int err = 0; 83 unsigned long flags; 84 85 spin_lock_irqsave(&die_notifier_lock, flags); 86 err = notifier_chain_register(&powerpc_die_chain, nb); 87 spin_unlock_irqrestore(&die_notifier_lock, flags); 88 return err; 89 } 90 91 /* 92 * Trap & Exception support 93 */ 94 95 static DEFINE_SPINLOCK(die_lock); 96 97 int die(const char *str, struct pt_regs *regs, long err) 98 { 99 static int die_counter, crash_dump_start = 0; 100 int nl = 0; 101 102 if (debugger(regs)) 103 return 1; 104 105 console_verbose(); 106 spin_lock_irq(&die_lock); 107 bust_spinlocks(1); 108 #ifdef CONFIG_PMAC_BACKLIGHT 109 if (_machine == _MACH_Pmac) { 110 set_backlight_enable(1); 111 set_backlight_level(BACKLIGHT_MAX); 112 } 113 #endif 114 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 115 #ifdef CONFIG_PREEMPT 116 printk("PREEMPT "); 117 nl = 1; 118 #endif 119 #ifdef CONFIG_SMP 120 printk("SMP NR_CPUS=%d ", NR_CPUS); 121 nl = 1; 122 #endif 123 #ifdef CONFIG_DEBUG_PAGEALLOC 124 printk("DEBUG_PAGEALLOC "); 125 nl = 1; 126 #endif 127 #ifdef CONFIG_NUMA 128 printk("NUMA "); 129 nl = 1; 130 #endif 131 #ifdef CONFIG_PPC64 132 switch (_machine) { 133 case PLATFORM_PSERIES: 134 printk("PSERIES "); 135 nl = 1; 136 break; 137 case PLATFORM_PSERIES_LPAR: 138 printk("PSERIES LPAR "); 139 nl = 1; 140 break; 141 case PLATFORM_ISERIES_LPAR: 142 printk("ISERIES LPAR "); 143 nl = 1; 144 break; 145 case PLATFORM_POWERMAC: 146 printk("POWERMAC "); 147 nl = 1; 148 break; 149 case PLATFORM_CELL: 150 printk("CELL "); 151 nl = 1; 152 break; 153 } 154 #endif 155 if (nl) 156 printk("\n"); 157 print_modules(); 158 show_regs(regs); 159 bust_spinlocks(0); 160 161 if (!crash_dump_start && kexec_should_crash(current)) { 162 crash_dump_start = 1; 163 spin_unlock_irq(&die_lock); 164 crash_kexec(regs); 165 /* NOTREACHED */ 166 } 167 spin_unlock_irq(&die_lock); 168 if (crash_dump_start) 169 /* 170 * Only for soft-reset: Other CPUs will be responded to an IPI 171 * sent by first kexec CPU. 172 */ 173 for(;;) 174 ; 175 176 if (in_interrupt()) 177 panic("Fatal exception in interrupt"); 178 179 if (panic_on_oops) { 180 #ifdef CONFIG_PPC64 181 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); 182 ssleep(5); 183 #endif 184 panic("Fatal exception"); 185 } 186 do_exit(err); 187 188 return 0; 189 } 190 191 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 192 { 193 siginfo_t info; 194 195 if (!user_mode(regs)) { 196 if (die("Exception in kernel mode", regs, signr)) 197 return; 198 } 199 200 memset(&info, 0, sizeof(info)); 201 info.si_signo = signr; 202 info.si_code = code; 203 info.si_addr = (void __user *) addr; 204 force_sig_info(signr, &info, current); 205 206 /* 207 * Init gets no signals that it doesn't have a handler for. 208 * That's all very well, but if it has caused a synchronous 209 * exception and we ignore the resulting signal, it will just 210 * generate the same exception over and over again and we get 211 * nowhere. Better to kill it and let the kernel panic. 212 */ 213 if (current->pid == 1) { 214 __sighandler_t handler; 215 216 spin_lock_irq(¤t->sighand->siglock); 217 handler = current->sighand->action[signr-1].sa.sa_handler; 218 spin_unlock_irq(¤t->sighand->siglock); 219 if (handler == SIG_DFL) { 220 /* init has generated a synchronous exception 221 and it doesn't have a handler for the signal */ 222 printk(KERN_CRIT "init has generated signal %d " 223 "but has no handler for it\n", signr); 224 do_exit(signr); 225 } 226 } 227 } 228 229 #ifdef CONFIG_PPC64 230 void system_reset_exception(struct pt_regs *regs) 231 { 232 /* See if any machine dependent calls */ 233 if (ppc_md.system_reset_exception) 234 ppc_md.system_reset_exception(regs); 235 236 die("System Reset", regs, SIGABRT); 237 238 /* Must die if the interrupt is not recoverable */ 239 if (!(regs->msr & MSR_RI)) 240 panic("Unrecoverable System Reset"); 241 242 /* What should we do here? We could issue a shutdown or hard reset. */ 243 } 244 #endif 245 246 /* 247 * I/O accesses can cause machine checks on powermacs. 248 * Check if the NIP corresponds to the address of a sync 249 * instruction for which there is an entry in the exception 250 * table. 251 * Note that the 601 only takes a machine check on TEA 252 * (transfer error ack) signal assertion, and does not 253 * set any of the top 16 bits of SRR1. 254 * -- paulus. 255 */ 256 static inline int check_io_access(struct pt_regs *regs) 257 { 258 #ifdef CONFIG_PPC_PMAC 259 unsigned long msr = regs->msr; 260 const struct exception_table_entry *entry; 261 unsigned int *nip = (unsigned int *)regs->nip; 262 263 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 264 && (entry = search_exception_tables(regs->nip)) != NULL) { 265 /* 266 * Check that it's a sync instruction, or somewhere 267 * in the twi; isync; nop sequence that inb/inw/inl uses. 268 * As the address is in the exception table 269 * we should be able to read the instr there. 270 * For the debug message, we look at the preceding 271 * load or store. 272 */ 273 if (*nip == 0x60000000) /* nop */ 274 nip -= 2; 275 else if (*nip == 0x4c00012c) /* isync */ 276 --nip; 277 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 278 /* sync or twi */ 279 unsigned int rb; 280 281 --nip; 282 rb = (*nip >> 11) & 0x1f; 283 printk(KERN_DEBUG "%s bad port %lx at %p\n", 284 (*nip & 0x100)? "OUT to": "IN from", 285 regs->gpr[rb] - _IO_BASE, nip); 286 regs->msr |= MSR_RI; 287 regs->nip = entry->fixup; 288 return 1; 289 } 290 } 291 #endif /* CONFIG_PPC_PMAC */ 292 return 0; 293 } 294 295 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 296 /* On 4xx, the reason for the machine check or program exception 297 is in the ESR. */ 298 #define get_reason(regs) ((regs)->dsisr) 299 #ifndef CONFIG_FSL_BOOKE 300 #define get_mc_reason(regs) ((regs)->dsisr) 301 #else 302 #define get_mc_reason(regs) (mfspr(SPRN_MCSR)) 303 #endif 304 #define REASON_FP ESR_FP 305 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 306 #define REASON_PRIVILEGED ESR_PPR 307 #define REASON_TRAP ESR_PTR 308 309 /* single-step stuff */ 310 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 311 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 312 313 #else 314 /* On non-4xx, the reason for the machine check or program 315 exception is in the MSR. */ 316 #define get_reason(regs) ((regs)->msr) 317 #define get_mc_reason(regs) ((regs)->msr) 318 #define REASON_FP 0x100000 319 #define REASON_ILLEGAL 0x80000 320 #define REASON_PRIVILEGED 0x40000 321 #define REASON_TRAP 0x20000 322 323 #define single_stepping(regs) ((regs)->msr & MSR_SE) 324 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 325 #endif 326 327 /* 328 * This is "fall-back" implementation for configurations 329 * which don't provide platform-specific machine check info 330 */ 331 void __attribute__ ((weak)) 332 platform_machine_check(struct pt_regs *regs) 333 { 334 } 335 336 void machine_check_exception(struct pt_regs *regs) 337 { 338 #ifdef CONFIG_PPC64 339 int recover = 0; 340 341 /* See if any machine dependent calls */ 342 if (ppc_md.machine_check_exception) 343 recover = ppc_md.machine_check_exception(regs); 344 345 if (recover) 346 return; 347 #else 348 unsigned long reason = get_mc_reason(regs); 349 350 if (user_mode(regs)) { 351 regs->msr |= MSR_RI; 352 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 353 return; 354 } 355 356 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 357 /* the qspan pci read routines can cause machine checks -- Cort */ 358 bad_page_fault(regs, regs->dar, SIGBUS); 359 return; 360 #endif 361 362 if (debugger_fault_handler(regs)) { 363 regs->msr |= MSR_RI; 364 return; 365 } 366 367 if (check_io_access(regs)) 368 return; 369 370 #if defined(CONFIG_4xx) && !defined(CONFIG_440A) 371 if (reason & ESR_IMCP) { 372 printk("Instruction"); 373 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 374 } else 375 printk("Data"); 376 printk(" machine check in kernel mode.\n"); 377 #elif defined(CONFIG_440A) 378 printk("Machine check in kernel mode.\n"); 379 if (reason & ESR_IMCP){ 380 printk("Instruction Synchronous Machine Check exception\n"); 381 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 382 } 383 else { 384 u32 mcsr = mfspr(SPRN_MCSR); 385 if (mcsr & MCSR_IB) 386 printk("Instruction Read PLB Error\n"); 387 if (mcsr & MCSR_DRB) 388 printk("Data Read PLB Error\n"); 389 if (mcsr & MCSR_DWB) 390 printk("Data Write PLB Error\n"); 391 if (mcsr & MCSR_TLBP) 392 printk("TLB Parity Error\n"); 393 if (mcsr & MCSR_ICP){ 394 flush_instruction_cache(); 395 printk("I-Cache Parity Error\n"); 396 } 397 if (mcsr & MCSR_DCSP) 398 printk("D-Cache Search Parity Error\n"); 399 if (mcsr & MCSR_DCFP) 400 printk("D-Cache Flush Parity Error\n"); 401 if (mcsr & MCSR_IMPE) 402 printk("Machine Check exception is imprecise\n"); 403 404 /* Clear MCSR */ 405 mtspr(SPRN_MCSR, mcsr); 406 } 407 #elif defined (CONFIG_E500) 408 printk("Machine check in kernel mode.\n"); 409 printk("Caused by (from MCSR=%lx): ", reason); 410 411 if (reason & MCSR_MCP) 412 printk("Machine Check Signal\n"); 413 if (reason & MCSR_ICPERR) 414 printk("Instruction Cache Parity Error\n"); 415 if (reason & MCSR_DCP_PERR) 416 printk("Data Cache Push Parity Error\n"); 417 if (reason & MCSR_DCPERR) 418 printk("Data Cache Parity Error\n"); 419 if (reason & MCSR_GL_CI) 420 printk("Guarded Load or Cache-Inhibited stwcx.\n"); 421 if (reason & MCSR_BUS_IAERR) 422 printk("Bus - Instruction Address Error\n"); 423 if (reason & MCSR_BUS_RAERR) 424 printk("Bus - Read Address Error\n"); 425 if (reason & MCSR_BUS_WAERR) 426 printk("Bus - Write Address Error\n"); 427 if (reason & MCSR_BUS_IBERR) 428 printk("Bus - Instruction Data Error\n"); 429 if (reason & MCSR_BUS_RBERR) 430 printk("Bus - Read Data Bus Error\n"); 431 if (reason & MCSR_BUS_WBERR) 432 printk("Bus - Read Data Bus Error\n"); 433 if (reason & MCSR_BUS_IPERR) 434 printk("Bus - Instruction Parity Error\n"); 435 if (reason & MCSR_BUS_RPERR) 436 printk("Bus - Read Parity Error\n"); 437 #elif defined (CONFIG_E200) 438 printk("Machine check in kernel mode.\n"); 439 printk("Caused by (from MCSR=%lx): ", reason); 440 441 if (reason & MCSR_MCP) 442 printk("Machine Check Signal\n"); 443 if (reason & MCSR_CP_PERR) 444 printk("Cache Push Parity Error\n"); 445 if (reason & MCSR_CPERR) 446 printk("Cache Parity Error\n"); 447 if (reason & MCSR_EXCP_ERR) 448 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 449 if (reason & MCSR_BUS_IRERR) 450 printk("Bus - Read Bus Error on instruction fetch\n"); 451 if (reason & MCSR_BUS_DRERR) 452 printk("Bus - Read Bus Error on data load\n"); 453 if (reason & MCSR_BUS_WRERR) 454 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 455 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 456 printk("Machine check in kernel mode.\n"); 457 printk("Caused by (from SRR1=%lx): ", reason); 458 switch (reason & 0x601F0000) { 459 case 0x80000: 460 printk("Machine check signal\n"); 461 break; 462 case 0: /* for 601 */ 463 case 0x40000: 464 case 0x140000: /* 7450 MSS error and TEA */ 465 printk("Transfer error ack signal\n"); 466 break; 467 case 0x20000: 468 printk("Data parity error signal\n"); 469 break; 470 case 0x10000: 471 printk("Address parity error signal\n"); 472 break; 473 case 0x20000000: 474 printk("L1 Data Cache error\n"); 475 break; 476 case 0x40000000: 477 printk("L1 Instruction Cache error\n"); 478 break; 479 case 0x00100000: 480 printk("L2 data cache parity error\n"); 481 break; 482 default: 483 printk("Unknown values in msr\n"); 484 } 485 #endif /* CONFIG_4xx */ 486 487 /* 488 * Optional platform-provided routine to print out 489 * additional info, e.g. bus error registers. 490 */ 491 platform_machine_check(regs); 492 #endif /* CONFIG_PPC64 */ 493 494 if (debugger_fault_handler(regs)) 495 return; 496 die("Machine check", regs, SIGBUS); 497 498 /* Must die if the interrupt is not recoverable */ 499 if (!(regs->msr & MSR_RI)) 500 panic("Unrecoverable Machine check"); 501 } 502 503 void SMIException(struct pt_regs *regs) 504 { 505 die("System Management Interrupt", regs, SIGABRT); 506 } 507 508 void unknown_exception(struct pt_regs *regs) 509 { 510 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 511 regs->nip, regs->msr, regs->trap); 512 513 _exception(SIGTRAP, regs, 0, 0); 514 } 515 516 void instruction_breakpoint_exception(struct pt_regs *regs) 517 { 518 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 519 5, SIGTRAP) == NOTIFY_STOP) 520 return; 521 if (debugger_iabr_match(regs)) 522 return; 523 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 524 } 525 526 void RunModeException(struct pt_regs *regs) 527 { 528 _exception(SIGTRAP, regs, 0, 0); 529 } 530 531 void __kprobes single_step_exception(struct pt_regs *regs) 532 { 533 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 534 535 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 536 5, SIGTRAP) == NOTIFY_STOP) 537 return; 538 if (debugger_sstep(regs)) 539 return; 540 541 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 542 } 543 544 /* 545 * After we have successfully emulated an instruction, we have to 546 * check if the instruction was being single-stepped, and if so, 547 * pretend we got a single-step exception. This was pointed out 548 * by Kumar Gala. -- paulus 549 */ 550 static void emulate_single_step(struct pt_regs *regs) 551 { 552 if (single_stepping(regs)) { 553 clear_single_step(regs); 554 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 555 } 556 } 557 558 static void parse_fpe(struct pt_regs *regs) 559 { 560 int code = 0; 561 unsigned long fpscr; 562 563 flush_fp_to_thread(current); 564 565 fpscr = current->thread.fpscr.val; 566 567 /* Invalid operation */ 568 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 569 code = FPE_FLTINV; 570 571 /* Overflow */ 572 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 573 code = FPE_FLTOVF; 574 575 /* Underflow */ 576 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 577 code = FPE_FLTUND; 578 579 /* Divide by zero */ 580 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 581 code = FPE_FLTDIV; 582 583 /* Inexact result */ 584 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 585 code = FPE_FLTRES; 586 587 _exception(SIGFPE, regs, code, regs->nip); 588 } 589 590 /* 591 * Illegal instruction emulation support. Originally written to 592 * provide the PVR to user applications using the mfspr rd, PVR. 593 * Return non-zero if we can't emulate, or -EFAULT if the associated 594 * memory access caused an access fault. Return zero on success. 595 * 596 * There are a couple of ways to do this, either "decode" the instruction 597 * or directly match lots of bits. In this case, matching lots of 598 * bits is faster and easier. 599 * 600 */ 601 #define INST_MFSPR_PVR 0x7c1f42a6 602 #define INST_MFSPR_PVR_MASK 0xfc1fffff 603 604 #define INST_DCBA 0x7c0005ec 605 #define INST_DCBA_MASK 0x7c0007fe 606 607 #define INST_MCRXR 0x7c000400 608 #define INST_MCRXR_MASK 0x7c0007fe 609 610 #define INST_STRING 0x7c00042a 611 #define INST_STRING_MASK 0x7c0007fe 612 #define INST_STRING_GEN_MASK 0x7c00067e 613 #define INST_LSWI 0x7c0004aa 614 #define INST_LSWX 0x7c00042a 615 #define INST_STSWI 0x7c0005aa 616 #define INST_STSWX 0x7c00052a 617 618 static int emulate_string_inst(struct pt_regs *regs, u32 instword) 619 { 620 u8 rT = (instword >> 21) & 0x1f; 621 u8 rA = (instword >> 16) & 0x1f; 622 u8 NB_RB = (instword >> 11) & 0x1f; 623 u32 num_bytes; 624 unsigned long EA; 625 int pos = 0; 626 627 /* Early out if we are an invalid form of lswx */ 628 if ((instword & INST_STRING_MASK) == INST_LSWX) 629 if ((rT == rA) || (rT == NB_RB)) 630 return -EINVAL; 631 632 EA = (rA == 0) ? 0 : regs->gpr[rA]; 633 634 switch (instword & INST_STRING_MASK) { 635 case INST_LSWX: 636 case INST_STSWX: 637 EA += NB_RB; 638 num_bytes = regs->xer & 0x7f; 639 break; 640 case INST_LSWI: 641 case INST_STSWI: 642 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 643 break; 644 default: 645 return -EINVAL; 646 } 647 648 while (num_bytes != 0) 649 { 650 u8 val; 651 u32 shift = 8 * (3 - (pos & 0x3)); 652 653 switch ((instword & INST_STRING_MASK)) { 654 case INST_LSWX: 655 case INST_LSWI: 656 if (get_user(val, (u8 __user *)EA)) 657 return -EFAULT; 658 /* first time updating this reg, 659 * zero it out */ 660 if (pos == 0) 661 regs->gpr[rT] = 0; 662 regs->gpr[rT] |= val << shift; 663 break; 664 case INST_STSWI: 665 case INST_STSWX: 666 val = regs->gpr[rT] >> shift; 667 if (put_user(val, (u8 __user *)EA)) 668 return -EFAULT; 669 break; 670 } 671 /* move EA to next address */ 672 EA += 1; 673 num_bytes--; 674 675 /* manage our position within the register */ 676 if (++pos == 4) { 677 pos = 0; 678 if (++rT == 32) 679 rT = 0; 680 } 681 } 682 683 return 0; 684 } 685 686 static int emulate_instruction(struct pt_regs *regs) 687 { 688 u32 instword; 689 u32 rd; 690 691 if (!user_mode(regs)) 692 return -EINVAL; 693 CHECK_FULL_REGS(regs); 694 695 if (get_user(instword, (u32 __user *)(regs->nip))) 696 return -EFAULT; 697 698 /* Emulate the mfspr rD, PVR. */ 699 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { 700 rd = (instword >> 21) & 0x1f; 701 regs->gpr[rd] = mfspr(SPRN_PVR); 702 return 0; 703 } 704 705 /* Emulating the dcba insn is just a no-op. */ 706 if ((instword & INST_DCBA_MASK) == INST_DCBA) 707 return 0; 708 709 /* Emulate the mcrxr insn. */ 710 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { 711 int shift = (instword >> 21) & 0x1c; 712 unsigned long msk = 0xf0000000UL >> shift; 713 714 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 715 regs->xer &= ~0xf0000000UL; 716 return 0; 717 } 718 719 /* Emulate load/store string insn. */ 720 if ((instword & INST_STRING_GEN_MASK) == INST_STRING) 721 return emulate_string_inst(regs, instword); 722 723 return -EINVAL; 724 } 725 726 /* 727 * Look through the list of trap instructions that are used for BUG(), 728 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know 729 * that the exception was caused by a trap instruction of some kind. 730 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0 731 * otherwise. 732 */ 733 extern struct bug_entry __start___bug_table[], __stop___bug_table[]; 734 735 #ifndef CONFIG_MODULES 736 #define module_find_bug(x) NULL 737 #endif 738 739 struct bug_entry *find_bug(unsigned long bugaddr) 740 { 741 struct bug_entry *bug; 742 743 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug) 744 if (bugaddr == bug->bug_addr) 745 return bug; 746 return module_find_bug(bugaddr); 747 } 748 749 static int check_bug_trap(struct pt_regs *regs) 750 { 751 struct bug_entry *bug; 752 unsigned long addr; 753 754 if (regs->msr & MSR_PR) 755 return 0; /* not in kernel */ 756 addr = regs->nip; /* address of trap instruction */ 757 if (addr < PAGE_OFFSET) 758 return 0; 759 bug = find_bug(regs->nip); 760 if (bug == NULL) 761 return 0; 762 if (bug->line & BUG_WARNING_TRAP) { 763 /* this is a WARN_ON rather than BUG/BUG_ON */ 764 printk(KERN_ERR "Badness in %s at %s:%ld\n", 765 bug->function, bug->file, 766 bug->line & ~BUG_WARNING_TRAP); 767 dump_stack(); 768 return 1; 769 } 770 printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n", 771 bug->function, bug->file, bug->line); 772 773 return 0; 774 } 775 776 void __kprobes program_check_exception(struct pt_regs *regs) 777 { 778 unsigned int reason = get_reason(regs); 779 extern int do_mathemu(struct pt_regs *regs); 780 781 #ifdef CONFIG_MATH_EMULATION 782 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 783 * but there seems to be a hardware bug on the 405GP (RevD) 784 * that means ESR is sometimes set incorrectly - either to 785 * ESR_DST (!?) or 0. In the process of chasing this with the 786 * hardware people - not sure if it can happen on any illegal 787 * instruction or only on FP instructions, whether there is a 788 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 789 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) { 790 emulate_single_step(regs); 791 return; 792 } 793 #endif /* CONFIG_MATH_EMULATION */ 794 795 if (reason & REASON_FP) { 796 /* IEEE FP exception */ 797 parse_fpe(regs); 798 return; 799 } 800 if (reason & REASON_TRAP) { 801 /* trap exception */ 802 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 803 == NOTIFY_STOP) 804 return; 805 if (debugger_bpt(regs)) 806 return; 807 if (check_bug_trap(regs)) { 808 regs->nip += 4; 809 return; 810 } 811 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 812 return; 813 } 814 815 /* Try to emulate it if we should. */ 816 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 817 switch (emulate_instruction(regs)) { 818 case 0: 819 regs->nip += 4; 820 emulate_single_step(regs); 821 return; 822 case -EFAULT: 823 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 824 return; 825 } 826 } 827 828 if (reason & REASON_PRIVILEGED) 829 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 830 else 831 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 832 } 833 834 void alignment_exception(struct pt_regs *regs) 835 { 836 int fixed; 837 838 fixed = fix_alignment(regs); 839 840 if (fixed == 1) { 841 regs->nip += 4; /* skip over emulated instruction */ 842 emulate_single_step(regs); 843 return; 844 } 845 846 /* Operand address was bad */ 847 if (fixed == -EFAULT) { 848 if (user_mode(regs)) 849 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar); 850 else 851 /* Search exception table */ 852 bad_page_fault(regs, regs->dar, SIGSEGV); 853 return; 854 } 855 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar); 856 } 857 858 void StackOverflow(struct pt_regs *regs) 859 { 860 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 861 current, regs->gpr[1]); 862 debugger(regs); 863 show_regs(regs); 864 panic("kernel stack overflow"); 865 } 866 867 void nonrecoverable_exception(struct pt_regs *regs) 868 { 869 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 870 regs->nip, regs->msr); 871 debugger(regs); 872 die("nonrecoverable exception", regs, SIGKILL); 873 } 874 875 void trace_syscall(struct pt_regs *regs) 876 { 877 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 878 current, current->pid, regs->nip, regs->link, regs->gpr[0], 879 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 880 } 881 882 void kernel_fp_unavailable_exception(struct pt_regs *regs) 883 { 884 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 885 "%lx at %lx\n", regs->trap, regs->nip); 886 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 887 } 888 889 void altivec_unavailable_exception(struct pt_regs *regs) 890 { 891 #if !defined(CONFIG_ALTIVEC) 892 if (user_mode(regs)) { 893 /* A user program has executed an altivec instruction, 894 but this kernel doesn't support altivec. */ 895 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 896 return; 897 } 898 #endif 899 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 900 "%lx at %lx\n", regs->trap, regs->nip); 901 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 902 } 903 904 #if defined(CONFIG_PPC64) || defined(CONFIG_E500) 905 void performance_monitor_exception(struct pt_regs *regs) 906 { 907 perf_irq(regs); 908 } 909 #endif 910 911 #ifdef CONFIG_8xx 912 void SoftwareEmulation(struct pt_regs *regs) 913 { 914 extern int do_mathemu(struct pt_regs *); 915 extern int Soft_emulate_8xx(struct pt_regs *); 916 int errcode; 917 918 CHECK_FULL_REGS(regs); 919 920 if (!user_mode(regs)) { 921 debugger(regs); 922 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 923 } 924 925 #ifdef CONFIG_MATH_EMULATION 926 errcode = do_mathemu(regs); 927 #else 928 errcode = Soft_emulate_8xx(regs); 929 #endif 930 if (errcode) { 931 if (errcode > 0) 932 _exception(SIGFPE, regs, 0, 0); 933 else if (errcode == -EFAULT) 934 _exception(SIGSEGV, regs, 0, 0); 935 else 936 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 937 } else 938 emulate_single_step(regs); 939 } 940 #endif /* CONFIG_8xx */ 941 942 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 943 944 void DebugException(struct pt_regs *regs, unsigned long debug_status) 945 { 946 if (debug_status & DBSR_IC) { /* instruction completion */ 947 regs->msr &= ~MSR_DE; 948 if (user_mode(regs)) { 949 current->thread.dbcr0 &= ~DBCR0_IC; 950 } else { 951 /* Disable instruction completion */ 952 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 953 /* Clear the instruction completion event */ 954 mtspr(SPRN_DBSR, DBSR_IC); 955 if (debugger_sstep(regs)) 956 return; 957 } 958 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 959 } 960 } 961 #endif /* CONFIG_4xx || CONFIG_BOOKE */ 962 963 #if !defined(CONFIG_TAU_INT) 964 void TAUException(struct pt_regs *regs) 965 { 966 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 967 regs->nip, regs->msr, regs->trap, print_tainted()); 968 } 969 #endif /* CONFIG_INT_TAU */ 970 971 #ifdef CONFIG_ALTIVEC 972 void altivec_assist_exception(struct pt_regs *regs) 973 { 974 int err; 975 976 if (!user_mode(regs)) { 977 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 978 " at %lx\n", regs->nip); 979 die("Kernel VMX/Altivec assist exception", regs, SIGILL); 980 } 981 982 flush_altivec_to_thread(current); 983 984 err = emulate_altivec(regs); 985 if (err == 0) { 986 regs->nip += 4; /* skip emulated instruction */ 987 emulate_single_step(regs); 988 return; 989 } 990 991 if (err == -EFAULT) { 992 /* got an error reading the instruction */ 993 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 994 } else { 995 /* didn't recognize the instruction */ 996 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 997 if (printk_ratelimit()) 998 printk(KERN_ERR "Unrecognized altivec instruction " 999 "in %s at %lx\n", current->comm, regs->nip); 1000 current->thread.vscr.u[3] |= 0x10000; 1001 } 1002 } 1003 #endif /* CONFIG_ALTIVEC */ 1004 1005 #ifdef CONFIG_FSL_BOOKE 1006 void CacheLockingException(struct pt_regs *regs, unsigned long address, 1007 unsigned long error_code) 1008 { 1009 /* We treat cache locking instructions from the user 1010 * as priv ops, in the future we could try to do 1011 * something smarter 1012 */ 1013 if (error_code & (ESR_DLK|ESR_ILK)) 1014 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 1015 return; 1016 } 1017 #endif /* CONFIG_FSL_BOOKE */ 1018 1019 #ifdef CONFIG_SPE 1020 void SPEFloatingPointException(struct pt_regs *regs) 1021 { 1022 unsigned long spefscr; 1023 int fpexc_mode; 1024 int code = 0; 1025 1026 spefscr = current->thread.spefscr; 1027 fpexc_mode = current->thread.fpexc_mode; 1028 1029 /* Hardware does not neccessarily set sticky 1030 * underflow/overflow/invalid flags */ 1031 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1032 code = FPE_FLTOVF; 1033 spefscr |= SPEFSCR_FOVFS; 1034 } 1035 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1036 code = FPE_FLTUND; 1037 spefscr |= SPEFSCR_FUNFS; 1038 } 1039 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1040 code = FPE_FLTDIV; 1041 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1042 code = FPE_FLTINV; 1043 spefscr |= SPEFSCR_FINVS; 1044 } 1045 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1046 code = FPE_FLTRES; 1047 1048 current->thread.spefscr = spefscr; 1049 1050 _exception(SIGFPE, regs, code, regs->nip); 1051 return; 1052 } 1053 #endif 1054 1055 /* 1056 * We enter here if we get an unrecoverable exception, that is, one 1057 * that happened at a point where the RI (recoverable interrupt) bit 1058 * in the MSR is 0. This indicates that SRR0/1 are live, and that 1059 * we therefore lost state by taking this exception. 1060 */ 1061 void unrecoverable_exception(struct pt_regs *regs) 1062 { 1063 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1064 regs->trap, regs->nip); 1065 die("Unrecoverable exception", regs, SIGABRT); 1066 } 1067 1068 #ifdef CONFIG_BOOKE_WDT 1069 /* 1070 * Default handler for a Watchdog exception, 1071 * spins until a reboot occurs 1072 */ 1073 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 1074 { 1075 /* Generic WatchdogHandler, implement your own */ 1076 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 1077 return; 1078 } 1079 1080 void WatchdogException(struct pt_regs *regs) 1081 { 1082 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 1083 WatchdogHandler(regs); 1084 } 1085 #endif 1086 1087 /* 1088 * We enter here if we discover during exception entry that we are 1089 * running in supervisor mode with a userspace value in the stack pointer. 1090 */ 1091 void kernel_bad_stack(struct pt_regs *regs) 1092 { 1093 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1094 regs->gpr[1], regs->nip); 1095 die("Bad kernel stack pointer", regs, SIGABRT); 1096 } 1097 1098 void __init trap_init(void) 1099 { 1100 } 1101