1 /* 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * and Paul Mackerras (paulus@samba.org) 11 */ 12 13 /* 14 * This file handles the architecture-dependent parts of hardware exceptions 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/stddef.h> 22 #include <linux/unistd.h> 23 #include <linux/ptrace.h> 24 #include <linux/user.h> 25 #include <linux/interrupt.h> 26 #include <linux/init.h> 27 #include <linux/module.h> 28 #include <linux/prctl.h> 29 #include <linux/delay.h> 30 #include <linux/kprobes.h> 31 #include <linux/kexec.h> 32 #include <linux/backlight.h> 33 #include <linux/bug.h> 34 #include <linux/kdebug.h> 35 #include <linux/debugfs.h> 36 37 #include <asm/emulated_ops.h> 38 #include <asm/pgtable.h> 39 #include <asm/uaccess.h> 40 #include <asm/system.h> 41 #include <asm/io.h> 42 #include <asm/machdep.h> 43 #include <asm/rtas.h> 44 #include <asm/pmc.h> 45 #ifdef CONFIG_PPC32 46 #include <asm/reg.h> 47 #endif 48 #ifdef CONFIG_PMAC_BACKLIGHT 49 #include <asm/backlight.h> 50 #endif 51 #ifdef CONFIG_PPC64 52 #include <asm/firmware.h> 53 #include <asm/processor.h> 54 #endif 55 #include <asm/kexec.h> 56 #include <asm/ppc-opcode.h> 57 #ifdef CONFIG_FSL_BOOKE 58 #include <asm/dbell.h> 59 #endif 60 61 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 62 int (*__debugger)(struct pt_regs *regs) __read_mostly; 63 int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly; 64 int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly; 65 int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly; 66 int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly; 67 int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly; 68 int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly; 69 70 EXPORT_SYMBOL(__debugger); 71 EXPORT_SYMBOL(__debugger_ipi); 72 EXPORT_SYMBOL(__debugger_bpt); 73 EXPORT_SYMBOL(__debugger_sstep); 74 EXPORT_SYMBOL(__debugger_iabr_match); 75 EXPORT_SYMBOL(__debugger_dabr_match); 76 EXPORT_SYMBOL(__debugger_fault_handler); 77 #endif 78 79 /* 80 * Trap & Exception support 81 */ 82 83 #ifdef CONFIG_PMAC_BACKLIGHT 84 static void pmac_backlight_unblank(void) 85 { 86 mutex_lock(&pmac_backlight_mutex); 87 if (pmac_backlight) { 88 struct backlight_properties *props; 89 90 props = &pmac_backlight->props; 91 props->brightness = props->max_brightness; 92 props->power = FB_BLANK_UNBLANK; 93 backlight_update_status(pmac_backlight); 94 } 95 mutex_unlock(&pmac_backlight_mutex); 96 } 97 #else 98 static inline void pmac_backlight_unblank(void) { } 99 #endif 100 101 int die(const char *str, struct pt_regs *regs, long err) 102 { 103 static struct { 104 raw_spinlock_t lock; 105 u32 lock_owner; 106 int lock_owner_depth; 107 } die = { 108 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock), 109 .lock_owner = -1, 110 .lock_owner_depth = 0 111 }; 112 static int die_counter; 113 unsigned long flags; 114 115 if (debugger(regs)) 116 return 1; 117 118 oops_enter(); 119 120 if (die.lock_owner != raw_smp_processor_id()) { 121 console_verbose(); 122 raw_spin_lock_irqsave(&die.lock, flags); 123 die.lock_owner = smp_processor_id(); 124 die.lock_owner_depth = 0; 125 bust_spinlocks(1); 126 if (machine_is(powermac)) 127 pmac_backlight_unblank(); 128 } else { 129 local_save_flags(flags); 130 } 131 132 if (++die.lock_owner_depth < 3) { 133 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 134 #ifdef CONFIG_PREEMPT 135 printk("PREEMPT "); 136 #endif 137 #ifdef CONFIG_SMP 138 printk("SMP NR_CPUS=%d ", NR_CPUS); 139 #endif 140 #ifdef CONFIG_DEBUG_PAGEALLOC 141 printk("DEBUG_PAGEALLOC "); 142 #endif 143 #ifdef CONFIG_NUMA 144 printk("NUMA "); 145 #endif 146 printk("%s\n", ppc_md.name ? ppc_md.name : ""); 147 148 sysfs_printk_last_file(); 149 if (notify_die(DIE_OOPS, str, regs, err, 255, 150 SIGSEGV) == NOTIFY_STOP) 151 return 1; 152 153 print_modules(); 154 show_regs(regs); 155 } else { 156 printk("Recursive die() failure, output suppressed\n"); 157 } 158 159 bust_spinlocks(0); 160 die.lock_owner = -1; 161 add_taint(TAINT_DIE); 162 raw_spin_unlock_irqrestore(&die.lock, flags); 163 164 if (kexec_should_crash(current) || 165 kexec_sr_activated(smp_processor_id())) 166 crash_kexec(regs); 167 crash_kexec_secondary(regs); 168 169 if (in_interrupt()) 170 panic("Fatal exception in interrupt"); 171 172 if (panic_on_oops) 173 panic("Fatal exception"); 174 175 oops_exit(); 176 do_exit(err); 177 178 return 0; 179 } 180 181 void user_single_step_siginfo(struct task_struct *tsk, 182 struct pt_regs *regs, siginfo_t *info) 183 { 184 memset(info, 0, sizeof(*info)); 185 info->si_signo = SIGTRAP; 186 info->si_code = TRAP_TRACE; 187 info->si_addr = (void __user *)regs->nip; 188 } 189 190 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 191 { 192 siginfo_t info; 193 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \ 194 "at %08lx nip %08lx lr %08lx code %x\n"; 195 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \ 196 "at %016lx nip %016lx lr %016lx code %x\n"; 197 198 if (!user_mode(regs)) { 199 if (die("Exception in kernel mode", regs, signr)) 200 return; 201 } else if (show_unhandled_signals && 202 unhandled_signal(current, signr) && 203 printk_ratelimit()) { 204 printk(regs->msr & MSR_SF ? fmt64 : fmt32, 205 current->comm, current->pid, signr, 206 addr, regs->nip, regs->link, code); 207 } 208 209 memset(&info, 0, sizeof(info)); 210 info.si_signo = signr; 211 info.si_code = code; 212 info.si_addr = (void __user *) addr; 213 force_sig_info(signr, &info, current); 214 } 215 216 #ifdef CONFIG_PPC64 217 void system_reset_exception(struct pt_regs *regs) 218 { 219 /* See if any machine dependent calls */ 220 if (ppc_md.system_reset_exception) { 221 if (ppc_md.system_reset_exception(regs)) 222 return; 223 } 224 225 #ifdef CONFIG_KEXEC 226 cpu_set(smp_processor_id(), cpus_in_sr); 227 #endif 228 229 die("System Reset", regs, SIGABRT); 230 231 /* 232 * Some CPUs when released from the debugger will execute this path. 233 * These CPUs entered the debugger via a soft-reset. If the CPU was 234 * hung before entering the debugger it will return to the hung 235 * state when exiting this function. This causes a problem in 236 * kdump since the hung CPU(s) will not respond to the IPI sent 237 * from kdump. To prevent the problem we call crash_kexec_secondary() 238 * here. If a kdump had not been initiated or we exit the debugger 239 * with the "exit and recover" command (x) crash_kexec_secondary() 240 * will return after 5ms and the CPU returns to its previous state. 241 */ 242 crash_kexec_secondary(regs); 243 244 /* Must die if the interrupt is not recoverable */ 245 if (!(regs->msr & MSR_RI)) 246 panic("Unrecoverable System Reset"); 247 248 /* What should we do here? We could issue a shutdown or hard reset. */ 249 } 250 #endif 251 252 /* 253 * I/O accesses can cause machine checks on powermacs. 254 * Check if the NIP corresponds to the address of a sync 255 * instruction for which there is an entry in the exception 256 * table. 257 * Note that the 601 only takes a machine check on TEA 258 * (transfer error ack) signal assertion, and does not 259 * set any of the top 16 bits of SRR1. 260 * -- paulus. 261 */ 262 static inline int check_io_access(struct pt_regs *regs) 263 { 264 #ifdef CONFIG_PPC32 265 unsigned long msr = regs->msr; 266 const struct exception_table_entry *entry; 267 unsigned int *nip = (unsigned int *)regs->nip; 268 269 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 270 && (entry = search_exception_tables(regs->nip)) != NULL) { 271 /* 272 * Check that it's a sync instruction, or somewhere 273 * in the twi; isync; nop sequence that inb/inw/inl uses. 274 * As the address is in the exception table 275 * we should be able to read the instr there. 276 * For the debug message, we look at the preceding 277 * load or store. 278 */ 279 if (*nip == 0x60000000) /* nop */ 280 nip -= 2; 281 else if (*nip == 0x4c00012c) /* isync */ 282 --nip; 283 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 284 /* sync or twi */ 285 unsigned int rb; 286 287 --nip; 288 rb = (*nip >> 11) & 0x1f; 289 printk(KERN_DEBUG "%s bad port %lx at %p\n", 290 (*nip & 0x100)? "OUT to": "IN from", 291 regs->gpr[rb] - _IO_BASE, nip); 292 regs->msr |= MSR_RI; 293 regs->nip = entry->fixup; 294 return 1; 295 } 296 } 297 #endif /* CONFIG_PPC32 */ 298 return 0; 299 } 300 301 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 302 /* On 4xx, the reason for the machine check or program exception 303 is in the ESR. */ 304 #define get_reason(regs) ((regs)->dsisr) 305 #ifndef CONFIG_FSL_BOOKE 306 #define get_mc_reason(regs) ((regs)->dsisr) 307 #else 308 #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK) 309 #endif 310 #define REASON_FP ESR_FP 311 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 312 #define REASON_PRIVILEGED ESR_PPR 313 #define REASON_TRAP ESR_PTR 314 315 /* single-step stuff */ 316 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 317 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 318 319 #else 320 /* On non-4xx, the reason for the machine check or program 321 exception is in the MSR. */ 322 #define get_reason(regs) ((regs)->msr) 323 #define get_mc_reason(regs) ((regs)->msr) 324 #define REASON_FP 0x100000 325 #define REASON_ILLEGAL 0x80000 326 #define REASON_PRIVILEGED 0x40000 327 #define REASON_TRAP 0x20000 328 329 #define single_stepping(regs) ((regs)->msr & MSR_SE) 330 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 331 #endif 332 333 #if defined(CONFIG_4xx) 334 int machine_check_4xx(struct pt_regs *regs) 335 { 336 unsigned long reason = get_mc_reason(regs); 337 338 if (reason & ESR_IMCP) { 339 printk("Instruction"); 340 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 341 } else 342 printk("Data"); 343 printk(" machine check in kernel mode.\n"); 344 345 return 0; 346 } 347 348 int machine_check_440A(struct pt_regs *regs) 349 { 350 unsigned long reason = get_mc_reason(regs); 351 352 printk("Machine check in kernel mode.\n"); 353 if (reason & ESR_IMCP){ 354 printk("Instruction Synchronous Machine Check exception\n"); 355 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 356 } 357 else { 358 u32 mcsr = mfspr(SPRN_MCSR); 359 if (mcsr & MCSR_IB) 360 printk("Instruction Read PLB Error\n"); 361 if (mcsr & MCSR_DRB) 362 printk("Data Read PLB Error\n"); 363 if (mcsr & MCSR_DWB) 364 printk("Data Write PLB Error\n"); 365 if (mcsr & MCSR_TLBP) 366 printk("TLB Parity Error\n"); 367 if (mcsr & MCSR_ICP){ 368 flush_instruction_cache(); 369 printk("I-Cache Parity Error\n"); 370 } 371 if (mcsr & MCSR_DCSP) 372 printk("D-Cache Search Parity Error\n"); 373 if (mcsr & MCSR_DCFP) 374 printk("D-Cache Flush Parity Error\n"); 375 if (mcsr & MCSR_IMPE) 376 printk("Machine Check exception is imprecise\n"); 377 378 /* Clear MCSR */ 379 mtspr(SPRN_MCSR, mcsr); 380 } 381 return 0; 382 } 383 384 int machine_check_47x(struct pt_regs *regs) 385 { 386 unsigned long reason = get_mc_reason(regs); 387 u32 mcsr; 388 389 printk(KERN_ERR "Machine check in kernel mode.\n"); 390 if (reason & ESR_IMCP) { 391 printk(KERN_ERR 392 "Instruction Synchronous Machine Check exception\n"); 393 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 394 return 0; 395 } 396 mcsr = mfspr(SPRN_MCSR); 397 if (mcsr & MCSR_IB) 398 printk(KERN_ERR "Instruction Read PLB Error\n"); 399 if (mcsr & MCSR_DRB) 400 printk(KERN_ERR "Data Read PLB Error\n"); 401 if (mcsr & MCSR_DWB) 402 printk(KERN_ERR "Data Write PLB Error\n"); 403 if (mcsr & MCSR_TLBP) 404 printk(KERN_ERR "TLB Parity Error\n"); 405 if (mcsr & MCSR_ICP) { 406 flush_instruction_cache(); 407 printk(KERN_ERR "I-Cache Parity Error\n"); 408 } 409 if (mcsr & MCSR_DCSP) 410 printk(KERN_ERR "D-Cache Search Parity Error\n"); 411 if (mcsr & PPC47x_MCSR_GPR) 412 printk(KERN_ERR "GPR Parity Error\n"); 413 if (mcsr & PPC47x_MCSR_FPR) 414 printk(KERN_ERR "FPR Parity Error\n"); 415 if (mcsr & PPC47x_MCSR_IPR) 416 printk(KERN_ERR "Machine Check exception is imprecise\n"); 417 418 /* Clear MCSR */ 419 mtspr(SPRN_MCSR, mcsr); 420 421 return 0; 422 } 423 #elif defined(CONFIG_E500) 424 int machine_check_e500(struct pt_regs *regs) 425 { 426 unsigned long reason = get_mc_reason(regs); 427 428 printk("Machine check in kernel mode.\n"); 429 printk("Caused by (from MCSR=%lx): ", reason); 430 431 if (reason & MCSR_MCP) 432 printk("Machine Check Signal\n"); 433 if (reason & MCSR_ICPERR) 434 printk("Instruction Cache Parity Error\n"); 435 if (reason & MCSR_DCP_PERR) 436 printk("Data Cache Push Parity Error\n"); 437 if (reason & MCSR_DCPERR) 438 printk("Data Cache Parity Error\n"); 439 if (reason & MCSR_BUS_IAERR) 440 printk("Bus - Instruction Address Error\n"); 441 if (reason & MCSR_BUS_RAERR) 442 printk("Bus - Read Address Error\n"); 443 if (reason & MCSR_BUS_WAERR) 444 printk("Bus - Write Address Error\n"); 445 if (reason & MCSR_BUS_IBERR) 446 printk("Bus - Instruction Data Error\n"); 447 if (reason & MCSR_BUS_RBERR) 448 printk("Bus - Read Data Bus Error\n"); 449 if (reason & MCSR_BUS_WBERR) 450 printk("Bus - Read Data Bus Error\n"); 451 if (reason & MCSR_BUS_IPERR) 452 printk("Bus - Instruction Parity Error\n"); 453 if (reason & MCSR_BUS_RPERR) 454 printk("Bus - Read Parity Error\n"); 455 456 return 0; 457 } 458 #elif defined(CONFIG_E200) 459 int machine_check_e200(struct pt_regs *regs) 460 { 461 unsigned long reason = get_mc_reason(regs); 462 463 printk("Machine check in kernel mode.\n"); 464 printk("Caused by (from MCSR=%lx): ", reason); 465 466 if (reason & MCSR_MCP) 467 printk("Machine Check Signal\n"); 468 if (reason & MCSR_CP_PERR) 469 printk("Cache Push Parity Error\n"); 470 if (reason & MCSR_CPERR) 471 printk("Cache Parity Error\n"); 472 if (reason & MCSR_EXCP_ERR) 473 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 474 if (reason & MCSR_BUS_IRERR) 475 printk("Bus - Read Bus Error on instruction fetch\n"); 476 if (reason & MCSR_BUS_DRERR) 477 printk("Bus - Read Bus Error on data load\n"); 478 if (reason & MCSR_BUS_WRERR) 479 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 480 481 return 0; 482 } 483 #else 484 int machine_check_generic(struct pt_regs *regs) 485 { 486 unsigned long reason = get_mc_reason(regs); 487 488 printk("Machine check in kernel mode.\n"); 489 printk("Caused by (from SRR1=%lx): ", reason); 490 switch (reason & 0x601F0000) { 491 case 0x80000: 492 printk("Machine check signal\n"); 493 break; 494 case 0: /* for 601 */ 495 case 0x40000: 496 case 0x140000: /* 7450 MSS error and TEA */ 497 printk("Transfer error ack signal\n"); 498 break; 499 case 0x20000: 500 printk("Data parity error signal\n"); 501 break; 502 case 0x10000: 503 printk("Address parity error signal\n"); 504 break; 505 case 0x20000000: 506 printk("L1 Data Cache error\n"); 507 break; 508 case 0x40000000: 509 printk("L1 Instruction Cache error\n"); 510 break; 511 case 0x00100000: 512 printk("L2 data cache parity error\n"); 513 break; 514 default: 515 printk("Unknown values in msr\n"); 516 } 517 return 0; 518 } 519 #endif /* everything else */ 520 521 void machine_check_exception(struct pt_regs *regs) 522 { 523 int recover = 0; 524 525 __get_cpu_var(irq_stat).mce_exceptions++; 526 527 /* See if any machine dependent calls. In theory, we would want 528 * to call the CPU first, and call the ppc_md. one if the CPU 529 * one returns a positive number. However there is existing code 530 * that assumes the board gets a first chance, so let's keep it 531 * that way for now and fix things later. --BenH. 532 */ 533 if (ppc_md.machine_check_exception) 534 recover = ppc_md.machine_check_exception(regs); 535 else if (cur_cpu_spec->machine_check) 536 recover = cur_cpu_spec->machine_check(regs); 537 538 if (recover > 0) 539 return; 540 541 if (user_mode(regs)) { 542 regs->msr |= MSR_RI; 543 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 544 return; 545 } 546 547 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 548 /* the qspan pci read routines can cause machine checks -- Cort 549 * 550 * yuck !!! that totally needs to go away ! There are better ways 551 * to deal with that than having a wart in the mcheck handler. 552 * -- BenH 553 */ 554 bad_page_fault(regs, regs->dar, SIGBUS); 555 return; 556 #endif 557 558 if (debugger_fault_handler(regs)) { 559 regs->msr |= MSR_RI; 560 return; 561 } 562 563 if (check_io_access(regs)) 564 return; 565 566 if (debugger_fault_handler(regs)) 567 return; 568 die("Machine check", regs, SIGBUS); 569 570 /* Must die if the interrupt is not recoverable */ 571 if (!(regs->msr & MSR_RI)) 572 panic("Unrecoverable Machine check"); 573 } 574 575 void SMIException(struct pt_regs *regs) 576 { 577 die("System Management Interrupt", regs, SIGABRT); 578 } 579 580 void unknown_exception(struct pt_regs *regs) 581 { 582 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 583 regs->nip, regs->msr, regs->trap); 584 585 _exception(SIGTRAP, regs, 0, 0); 586 } 587 588 void instruction_breakpoint_exception(struct pt_regs *regs) 589 { 590 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 591 5, SIGTRAP) == NOTIFY_STOP) 592 return; 593 if (debugger_iabr_match(regs)) 594 return; 595 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 596 } 597 598 void RunModeException(struct pt_regs *regs) 599 { 600 _exception(SIGTRAP, regs, 0, 0); 601 } 602 603 void __kprobes single_step_exception(struct pt_regs *regs) 604 { 605 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 606 607 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 608 5, SIGTRAP) == NOTIFY_STOP) 609 return; 610 if (debugger_sstep(regs)) 611 return; 612 613 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 614 } 615 616 /* 617 * After we have successfully emulated an instruction, we have to 618 * check if the instruction was being single-stepped, and if so, 619 * pretend we got a single-step exception. This was pointed out 620 * by Kumar Gala. -- paulus 621 */ 622 static void emulate_single_step(struct pt_regs *regs) 623 { 624 if (single_stepping(regs)) { 625 clear_single_step(regs); 626 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 627 } 628 } 629 630 static inline int __parse_fpscr(unsigned long fpscr) 631 { 632 int ret = 0; 633 634 /* Invalid operation */ 635 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 636 ret = FPE_FLTINV; 637 638 /* Overflow */ 639 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 640 ret = FPE_FLTOVF; 641 642 /* Underflow */ 643 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 644 ret = FPE_FLTUND; 645 646 /* Divide by zero */ 647 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 648 ret = FPE_FLTDIV; 649 650 /* Inexact result */ 651 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 652 ret = FPE_FLTRES; 653 654 return ret; 655 } 656 657 static void parse_fpe(struct pt_regs *regs) 658 { 659 int code = 0; 660 661 flush_fp_to_thread(current); 662 663 code = __parse_fpscr(current->thread.fpscr.val); 664 665 _exception(SIGFPE, regs, code, regs->nip); 666 } 667 668 /* 669 * Illegal instruction emulation support. Originally written to 670 * provide the PVR to user applications using the mfspr rd, PVR. 671 * Return non-zero if we can't emulate, or -EFAULT if the associated 672 * memory access caused an access fault. Return zero on success. 673 * 674 * There are a couple of ways to do this, either "decode" the instruction 675 * or directly match lots of bits. In this case, matching lots of 676 * bits is faster and easier. 677 * 678 */ 679 static int emulate_string_inst(struct pt_regs *regs, u32 instword) 680 { 681 u8 rT = (instword >> 21) & 0x1f; 682 u8 rA = (instword >> 16) & 0x1f; 683 u8 NB_RB = (instword >> 11) & 0x1f; 684 u32 num_bytes; 685 unsigned long EA; 686 int pos = 0; 687 688 /* Early out if we are an invalid form of lswx */ 689 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX) 690 if ((rT == rA) || (rT == NB_RB)) 691 return -EINVAL; 692 693 EA = (rA == 0) ? 0 : regs->gpr[rA]; 694 695 switch (instword & PPC_INST_STRING_MASK) { 696 case PPC_INST_LSWX: 697 case PPC_INST_STSWX: 698 EA += NB_RB; 699 num_bytes = regs->xer & 0x7f; 700 break; 701 case PPC_INST_LSWI: 702 case PPC_INST_STSWI: 703 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 704 break; 705 default: 706 return -EINVAL; 707 } 708 709 while (num_bytes != 0) 710 { 711 u8 val; 712 u32 shift = 8 * (3 - (pos & 0x3)); 713 714 switch ((instword & PPC_INST_STRING_MASK)) { 715 case PPC_INST_LSWX: 716 case PPC_INST_LSWI: 717 if (get_user(val, (u8 __user *)EA)) 718 return -EFAULT; 719 /* first time updating this reg, 720 * zero it out */ 721 if (pos == 0) 722 regs->gpr[rT] = 0; 723 regs->gpr[rT] |= val << shift; 724 break; 725 case PPC_INST_STSWI: 726 case PPC_INST_STSWX: 727 val = regs->gpr[rT] >> shift; 728 if (put_user(val, (u8 __user *)EA)) 729 return -EFAULT; 730 break; 731 } 732 /* move EA to next address */ 733 EA += 1; 734 num_bytes--; 735 736 /* manage our position within the register */ 737 if (++pos == 4) { 738 pos = 0; 739 if (++rT == 32) 740 rT = 0; 741 } 742 } 743 744 return 0; 745 } 746 747 static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword) 748 { 749 u32 ra,rs; 750 unsigned long tmp; 751 752 ra = (instword >> 16) & 0x1f; 753 rs = (instword >> 21) & 0x1f; 754 755 tmp = regs->gpr[rs]; 756 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL); 757 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL); 758 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL; 759 regs->gpr[ra] = tmp; 760 761 return 0; 762 } 763 764 static int emulate_isel(struct pt_regs *regs, u32 instword) 765 { 766 u8 rT = (instword >> 21) & 0x1f; 767 u8 rA = (instword >> 16) & 0x1f; 768 u8 rB = (instword >> 11) & 0x1f; 769 u8 BC = (instword >> 6) & 0x1f; 770 u8 bit; 771 unsigned long tmp; 772 773 tmp = (rA == 0) ? 0 : regs->gpr[rA]; 774 bit = (regs->ccr >> (31 - BC)) & 0x1; 775 776 regs->gpr[rT] = bit ? tmp : regs->gpr[rB]; 777 778 return 0; 779 } 780 781 static int emulate_instruction(struct pt_regs *regs) 782 { 783 u32 instword; 784 u32 rd; 785 786 if (!user_mode(regs) || (regs->msr & MSR_LE)) 787 return -EINVAL; 788 CHECK_FULL_REGS(regs); 789 790 if (get_user(instword, (u32 __user *)(regs->nip))) 791 return -EFAULT; 792 793 /* Emulate the mfspr rD, PVR. */ 794 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) { 795 PPC_WARN_EMULATED(mfpvr, regs); 796 rd = (instword >> 21) & 0x1f; 797 regs->gpr[rd] = mfspr(SPRN_PVR); 798 return 0; 799 } 800 801 /* Emulating the dcba insn is just a no-op. */ 802 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) { 803 PPC_WARN_EMULATED(dcba, regs); 804 return 0; 805 } 806 807 /* Emulate the mcrxr insn. */ 808 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) { 809 int shift = (instword >> 21) & 0x1c; 810 unsigned long msk = 0xf0000000UL >> shift; 811 812 PPC_WARN_EMULATED(mcrxr, regs); 813 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 814 regs->xer &= ~0xf0000000UL; 815 return 0; 816 } 817 818 /* Emulate load/store string insn. */ 819 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) { 820 PPC_WARN_EMULATED(string, regs); 821 return emulate_string_inst(regs, instword); 822 } 823 824 /* Emulate the popcntb (Population Count Bytes) instruction. */ 825 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) { 826 PPC_WARN_EMULATED(popcntb, regs); 827 return emulate_popcntb_inst(regs, instword); 828 } 829 830 /* Emulate isel (Integer Select) instruction */ 831 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) { 832 PPC_WARN_EMULATED(isel, regs); 833 return emulate_isel(regs, instword); 834 } 835 836 return -EINVAL; 837 } 838 839 int is_valid_bugaddr(unsigned long addr) 840 { 841 return is_kernel_addr(addr); 842 } 843 844 void __kprobes program_check_exception(struct pt_regs *regs) 845 { 846 unsigned int reason = get_reason(regs); 847 extern int do_mathemu(struct pt_regs *regs); 848 849 /* We can now get here via a FP Unavailable exception if the core 850 * has no FPU, in that case the reason flags will be 0 */ 851 852 if (reason & REASON_FP) { 853 /* IEEE FP exception */ 854 parse_fpe(regs); 855 return; 856 } 857 if (reason & REASON_TRAP) { 858 /* Debugger is first in line to stop recursive faults in 859 * rcu_lock, notify_die, or atomic_notifier_call_chain */ 860 if (debugger_bpt(regs)) 861 return; 862 863 /* trap exception */ 864 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 865 == NOTIFY_STOP) 866 return; 867 868 if (!(regs->msr & MSR_PR) && /* not user-mode */ 869 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) { 870 regs->nip += 4; 871 return; 872 } 873 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 874 return; 875 } 876 877 local_irq_enable(); 878 879 #ifdef CONFIG_MATH_EMULATION 880 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 881 * but there seems to be a hardware bug on the 405GP (RevD) 882 * that means ESR is sometimes set incorrectly - either to 883 * ESR_DST (!?) or 0. In the process of chasing this with the 884 * hardware people - not sure if it can happen on any illegal 885 * instruction or only on FP instructions, whether there is a 886 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 887 switch (do_mathemu(regs)) { 888 case 0: 889 emulate_single_step(regs); 890 return; 891 case 1: { 892 int code = 0; 893 code = __parse_fpscr(current->thread.fpscr.val); 894 _exception(SIGFPE, regs, code, regs->nip); 895 return; 896 } 897 case -EFAULT: 898 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 899 return; 900 } 901 /* fall through on any other errors */ 902 #endif /* CONFIG_MATH_EMULATION */ 903 904 /* Try to emulate it if we should. */ 905 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 906 switch (emulate_instruction(regs)) { 907 case 0: 908 regs->nip += 4; 909 emulate_single_step(regs); 910 return; 911 case -EFAULT: 912 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 913 return; 914 } 915 } 916 917 if (reason & REASON_PRIVILEGED) 918 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 919 else 920 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 921 } 922 923 void alignment_exception(struct pt_regs *regs) 924 { 925 int sig, code, fixed = 0; 926 927 /* we don't implement logging of alignment exceptions */ 928 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 929 fixed = fix_alignment(regs); 930 931 if (fixed == 1) { 932 regs->nip += 4; /* skip over emulated instruction */ 933 emulate_single_step(regs); 934 return; 935 } 936 937 /* Operand address was bad */ 938 if (fixed == -EFAULT) { 939 sig = SIGSEGV; 940 code = SEGV_ACCERR; 941 } else { 942 sig = SIGBUS; 943 code = BUS_ADRALN; 944 } 945 if (user_mode(regs)) 946 _exception(sig, regs, code, regs->dar); 947 else 948 bad_page_fault(regs, regs->dar, sig); 949 } 950 951 void StackOverflow(struct pt_regs *regs) 952 { 953 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 954 current, regs->gpr[1]); 955 debugger(regs); 956 show_regs(regs); 957 panic("kernel stack overflow"); 958 } 959 960 void nonrecoverable_exception(struct pt_regs *regs) 961 { 962 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 963 regs->nip, regs->msr); 964 debugger(regs); 965 die("nonrecoverable exception", regs, SIGKILL); 966 } 967 968 void trace_syscall(struct pt_regs *regs) 969 { 970 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 971 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0], 972 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 973 } 974 975 void kernel_fp_unavailable_exception(struct pt_regs *regs) 976 { 977 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 978 "%lx at %lx\n", regs->trap, regs->nip); 979 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 980 } 981 982 void altivec_unavailable_exception(struct pt_regs *regs) 983 { 984 if (user_mode(regs)) { 985 /* A user program has executed an altivec instruction, 986 but this kernel doesn't support altivec. */ 987 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 988 return; 989 } 990 991 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 992 "%lx at %lx\n", regs->trap, regs->nip); 993 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 994 } 995 996 void vsx_unavailable_exception(struct pt_regs *regs) 997 { 998 if (user_mode(regs)) { 999 /* A user program has executed an vsx instruction, 1000 but this kernel doesn't support vsx. */ 1001 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1002 return; 1003 } 1004 1005 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception " 1006 "%lx at %lx\n", regs->trap, regs->nip); 1007 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT); 1008 } 1009 1010 void performance_monitor_exception(struct pt_regs *regs) 1011 { 1012 __get_cpu_var(irq_stat).pmu_irqs++; 1013 1014 perf_irq(regs); 1015 } 1016 1017 #ifdef CONFIG_8xx 1018 void SoftwareEmulation(struct pt_regs *regs) 1019 { 1020 extern int do_mathemu(struct pt_regs *); 1021 extern int Soft_emulate_8xx(struct pt_regs *); 1022 #if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU) 1023 int errcode; 1024 #endif 1025 1026 CHECK_FULL_REGS(regs); 1027 1028 if (!user_mode(regs)) { 1029 debugger(regs); 1030 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 1031 } 1032 1033 #ifdef CONFIG_MATH_EMULATION 1034 errcode = do_mathemu(regs); 1035 if (errcode >= 0) 1036 PPC_WARN_EMULATED(math, regs); 1037 1038 switch (errcode) { 1039 case 0: 1040 emulate_single_step(regs); 1041 return; 1042 case 1: { 1043 int code = 0; 1044 code = __parse_fpscr(current->thread.fpscr.val); 1045 _exception(SIGFPE, regs, code, regs->nip); 1046 return; 1047 } 1048 case -EFAULT: 1049 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 1050 return; 1051 default: 1052 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1053 return; 1054 } 1055 1056 #elif defined(CONFIG_8XX_MINIMAL_FPEMU) 1057 errcode = Soft_emulate_8xx(regs); 1058 if (errcode >= 0) 1059 PPC_WARN_EMULATED(8xx, regs); 1060 1061 switch (errcode) { 1062 case 0: 1063 emulate_single_step(regs); 1064 return; 1065 case 1: 1066 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1067 return; 1068 case -EFAULT: 1069 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 1070 return; 1071 } 1072 #else 1073 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1074 #endif 1075 } 1076 #endif /* CONFIG_8xx */ 1077 1078 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1079 static void handle_debug(struct pt_regs *regs, unsigned long debug_status) 1080 { 1081 int changed = 0; 1082 /* 1083 * Determine the cause of the debug event, clear the 1084 * event flags and send a trap to the handler. Torez 1085 */ 1086 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { 1087 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W); 1088 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1089 current->thread.dbcr2 &= ~DBCR2_DAC12MODE; 1090 #endif 1091 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT, 1092 5); 1093 changed |= 0x01; 1094 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) { 1095 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W); 1096 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT, 1097 6); 1098 changed |= 0x01; 1099 } else if (debug_status & DBSR_IAC1) { 1100 current->thread.dbcr0 &= ~DBCR0_IAC1; 1101 dbcr_iac_range(current) &= ~DBCR_IAC12MODE; 1102 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT, 1103 1); 1104 changed |= 0x01; 1105 } else if (debug_status & DBSR_IAC2) { 1106 current->thread.dbcr0 &= ~DBCR0_IAC2; 1107 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT, 1108 2); 1109 changed |= 0x01; 1110 } else if (debug_status & DBSR_IAC3) { 1111 current->thread.dbcr0 &= ~DBCR0_IAC3; 1112 dbcr_iac_range(current) &= ~DBCR_IAC34MODE; 1113 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT, 1114 3); 1115 changed |= 0x01; 1116 } else if (debug_status & DBSR_IAC4) { 1117 current->thread.dbcr0 &= ~DBCR0_IAC4; 1118 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT, 1119 4); 1120 changed |= 0x01; 1121 } 1122 /* 1123 * At the point this routine was called, the MSR(DE) was turned off. 1124 * Check all other debug flags and see if that bit needs to be turned 1125 * back on or not. 1126 */ 1127 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1)) 1128 regs->msr |= MSR_DE; 1129 else 1130 /* Make sure the IDM flag is off */ 1131 current->thread.dbcr0 &= ~DBCR0_IDM; 1132 1133 if (changed & 0x01) 1134 mtspr(SPRN_DBCR0, current->thread.dbcr0); 1135 } 1136 1137 void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) 1138 { 1139 current->thread.dbsr = debug_status; 1140 1141 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while 1142 * on server, it stops on the target of the branch. In order to simulate 1143 * the server behaviour, we thus restart right away with a single step 1144 * instead of stopping here when hitting a BT 1145 */ 1146 if (debug_status & DBSR_BT) { 1147 regs->msr &= ~MSR_DE; 1148 1149 /* Disable BT */ 1150 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT); 1151 /* Clear the BT event */ 1152 mtspr(SPRN_DBSR, DBSR_BT); 1153 1154 /* Do the single step trick only when coming from userspace */ 1155 if (user_mode(regs)) { 1156 current->thread.dbcr0 &= ~DBCR0_BT; 1157 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; 1158 regs->msr |= MSR_DE; 1159 return; 1160 } 1161 1162 if (notify_die(DIE_SSTEP, "block_step", regs, 5, 1163 5, SIGTRAP) == NOTIFY_STOP) { 1164 return; 1165 } 1166 if (debugger_sstep(regs)) 1167 return; 1168 } else if (debug_status & DBSR_IC) { /* Instruction complete */ 1169 regs->msr &= ~MSR_DE; 1170 1171 /* Disable instruction completion */ 1172 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 1173 /* Clear the instruction completion event */ 1174 mtspr(SPRN_DBSR, DBSR_IC); 1175 1176 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 1177 5, SIGTRAP) == NOTIFY_STOP) { 1178 return; 1179 } 1180 1181 if (debugger_sstep(regs)) 1182 return; 1183 1184 if (user_mode(regs)) { 1185 current->thread.dbcr0 &= ~DBCR0_IC; 1186 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1187 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, 1188 current->thread.dbcr1)) 1189 regs->msr |= MSR_DE; 1190 else 1191 /* Make sure the IDM bit is off */ 1192 current->thread.dbcr0 &= ~DBCR0_IDM; 1193 #endif 1194 } 1195 1196 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 1197 } else 1198 handle_debug(regs, debug_status); 1199 } 1200 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 1201 1202 #if !defined(CONFIG_TAU_INT) 1203 void TAUException(struct pt_regs *regs) 1204 { 1205 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 1206 regs->nip, regs->msr, regs->trap, print_tainted()); 1207 } 1208 #endif /* CONFIG_INT_TAU */ 1209 1210 #ifdef CONFIG_ALTIVEC 1211 void altivec_assist_exception(struct pt_regs *regs) 1212 { 1213 int err; 1214 1215 if (!user_mode(regs)) { 1216 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 1217 " at %lx\n", regs->nip); 1218 die("Kernel VMX/Altivec assist exception", regs, SIGILL); 1219 } 1220 1221 flush_altivec_to_thread(current); 1222 1223 PPC_WARN_EMULATED(altivec, regs); 1224 err = emulate_altivec(regs); 1225 if (err == 0) { 1226 regs->nip += 4; /* skip emulated instruction */ 1227 emulate_single_step(regs); 1228 return; 1229 } 1230 1231 if (err == -EFAULT) { 1232 /* got an error reading the instruction */ 1233 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1234 } else { 1235 /* didn't recognize the instruction */ 1236 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 1237 if (printk_ratelimit()) 1238 printk(KERN_ERR "Unrecognized altivec instruction " 1239 "in %s at %lx\n", current->comm, regs->nip); 1240 current->thread.vscr.u[3] |= 0x10000; 1241 } 1242 } 1243 #endif /* CONFIG_ALTIVEC */ 1244 1245 #ifdef CONFIG_VSX 1246 void vsx_assist_exception(struct pt_regs *regs) 1247 { 1248 if (!user_mode(regs)) { 1249 printk(KERN_EMERG "VSX assist exception in kernel mode" 1250 " at %lx\n", regs->nip); 1251 die("Kernel VSX assist exception", regs, SIGILL); 1252 } 1253 1254 flush_vsx_to_thread(current); 1255 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip); 1256 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1257 } 1258 #endif /* CONFIG_VSX */ 1259 1260 #ifdef CONFIG_FSL_BOOKE 1261 1262 void doorbell_exception(struct pt_regs *regs) 1263 { 1264 #ifdef CONFIG_SMP 1265 int cpu = smp_processor_id(); 1266 int msg; 1267 1268 if (num_online_cpus() < 2) 1269 return; 1270 1271 for (msg = 0; msg < 4; msg++) 1272 if (test_and_clear_bit(msg, &dbell_smp_message[cpu])) 1273 smp_message_recv(msg); 1274 #else 1275 printk(KERN_WARNING "Received doorbell on non-smp system\n"); 1276 #endif 1277 } 1278 1279 void CacheLockingException(struct pt_regs *regs, unsigned long address, 1280 unsigned long error_code) 1281 { 1282 /* We treat cache locking instructions from the user 1283 * as priv ops, in the future we could try to do 1284 * something smarter 1285 */ 1286 if (error_code & (ESR_DLK|ESR_ILK)) 1287 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 1288 return; 1289 } 1290 #endif /* CONFIG_FSL_BOOKE */ 1291 1292 #ifdef CONFIG_SPE 1293 void SPEFloatingPointException(struct pt_regs *regs) 1294 { 1295 extern int do_spe_mathemu(struct pt_regs *regs); 1296 unsigned long spefscr; 1297 int fpexc_mode; 1298 int code = 0; 1299 int err; 1300 1301 preempt_disable(); 1302 if (regs->msr & MSR_SPE) 1303 giveup_spe(current); 1304 preempt_enable(); 1305 1306 spefscr = current->thread.spefscr; 1307 fpexc_mode = current->thread.fpexc_mode; 1308 1309 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1310 code = FPE_FLTOVF; 1311 } 1312 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1313 code = FPE_FLTUND; 1314 } 1315 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1316 code = FPE_FLTDIV; 1317 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1318 code = FPE_FLTINV; 1319 } 1320 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1321 code = FPE_FLTRES; 1322 1323 err = do_spe_mathemu(regs); 1324 if (err == 0) { 1325 regs->nip += 4; /* skip emulated instruction */ 1326 emulate_single_step(regs); 1327 return; 1328 } 1329 1330 if (err == -EFAULT) { 1331 /* got an error reading the instruction */ 1332 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1333 } else if (err == -EINVAL) { 1334 /* didn't recognize the instruction */ 1335 printk(KERN_ERR "unrecognized spe instruction " 1336 "in %s at %lx\n", current->comm, regs->nip); 1337 } else { 1338 _exception(SIGFPE, regs, code, regs->nip); 1339 } 1340 1341 return; 1342 } 1343 1344 void SPEFloatingPointRoundException(struct pt_regs *regs) 1345 { 1346 extern int speround_handler(struct pt_regs *regs); 1347 int err; 1348 1349 preempt_disable(); 1350 if (regs->msr & MSR_SPE) 1351 giveup_spe(current); 1352 preempt_enable(); 1353 1354 regs->nip -= 4; 1355 err = speround_handler(regs); 1356 if (err == 0) { 1357 regs->nip += 4; /* skip emulated instruction */ 1358 emulate_single_step(regs); 1359 return; 1360 } 1361 1362 if (err == -EFAULT) { 1363 /* got an error reading the instruction */ 1364 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1365 } else if (err == -EINVAL) { 1366 /* didn't recognize the instruction */ 1367 printk(KERN_ERR "unrecognized spe instruction " 1368 "in %s at %lx\n", current->comm, regs->nip); 1369 } else { 1370 _exception(SIGFPE, regs, 0, regs->nip); 1371 return; 1372 } 1373 } 1374 #endif 1375 1376 /* 1377 * We enter here if we get an unrecoverable exception, that is, one 1378 * that happened at a point where the RI (recoverable interrupt) bit 1379 * in the MSR is 0. This indicates that SRR0/1 are live, and that 1380 * we therefore lost state by taking this exception. 1381 */ 1382 void unrecoverable_exception(struct pt_regs *regs) 1383 { 1384 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1385 regs->trap, regs->nip); 1386 die("Unrecoverable exception", regs, SIGABRT); 1387 } 1388 1389 #ifdef CONFIG_BOOKE_WDT 1390 /* 1391 * Default handler for a Watchdog exception, 1392 * spins until a reboot occurs 1393 */ 1394 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 1395 { 1396 /* Generic WatchdogHandler, implement your own */ 1397 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 1398 return; 1399 } 1400 1401 void WatchdogException(struct pt_regs *regs) 1402 { 1403 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 1404 WatchdogHandler(regs); 1405 } 1406 #endif 1407 1408 /* 1409 * We enter here if we discover during exception entry that we are 1410 * running in supervisor mode with a userspace value in the stack pointer. 1411 */ 1412 void kernel_bad_stack(struct pt_regs *regs) 1413 { 1414 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1415 regs->gpr[1], regs->nip); 1416 die("Bad kernel stack pointer", regs, SIGABRT); 1417 } 1418 1419 void __init trap_init(void) 1420 { 1421 } 1422 1423 1424 #ifdef CONFIG_PPC_EMULATED_STATS 1425 1426 #define WARN_EMULATED_SETUP(type) .type = { .name = #type } 1427 1428 struct ppc_emulated ppc_emulated = { 1429 #ifdef CONFIG_ALTIVEC 1430 WARN_EMULATED_SETUP(altivec), 1431 #endif 1432 WARN_EMULATED_SETUP(dcba), 1433 WARN_EMULATED_SETUP(dcbz), 1434 WARN_EMULATED_SETUP(fp_pair), 1435 WARN_EMULATED_SETUP(isel), 1436 WARN_EMULATED_SETUP(mcrxr), 1437 WARN_EMULATED_SETUP(mfpvr), 1438 WARN_EMULATED_SETUP(multiple), 1439 WARN_EMULATED_SETUP(popcntb), 1440 WARN_EMULATED_SETUP(spe), 1441 WARN_EMULATED_SETUP(string), 1442 WARN_EMULATED_SETUP(unaligned), 1443 #ifdef CONFIG_MATH_EMULATION 1444 WARN_EMULATED_SETUP(math), 1445 #elif defined(CONFIG_8XX_MINIMAL_FPEMU) 1446 WARN_EMULATED_SETUP(8xx), 1447 #endif 1448 #ifdef CONFIG_VSX 1449 WARN_EMULATED_SETUP(vsx), 1450 #endif 1451 }; 1452 1453 u32 ppc_warn_emulated; 1454 1455 void ppc_warn_emulated_print(const char *type) 1456 { 1457 if (printk_ratelimit()) 1458 pr_warning("%s used emulated %s instruction\n", current->comm, 1459 type); 1460 } 1461 1462 static int __init ppc_warn_emulated_init(void) 1463 { 1464 struct dentry *dir, *d; 1465 unsigned int i; 1466 struct ppc_emulated_entry *entries = (void *)&ppc_emulated; 1467 1468 if (!powerpc_debugfs_root) 1469 return -ENODEV; 1470 1471 dir = debugfs_create_dir("emulated_instructions", 1472 powerpc_debugfs_root); 1473 if (!dir) 1474 return -ENOMEM; 1475 1476 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir, 1477 &ppc_warn_emulated); 1478 if (!d) 1479 goto fail; 1480 1481 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) { 1482 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir, 1483 (u32 *)&entries[i].val.counter); 1484 if (!d) 1485 goto fail; 1486 } 1487 1488 return 0; 1489 1490 fail: 1491 debugfs_remove_recursive(dir); 1492 return -ENOMEM; 1493 } 1494 1495 device_initcall(ppc_warn_emulated_init); 1496 1497 #endif /* CONFIG_PPC_EMULATED_STATS */ 1498