1 /* 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * and Paul Mackerras (paulus@samba.org) 11 */ 12 13 /* 14 * This file handles the architecture-dependent parts of hardware exceptions 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/stddef.h> 22 #include <linux/unistd.h> 23 #include <linux/ptrace.h> 24 #include <linux/slab.h> 25 #include <linux/user.h> 26 #include <linux/a.out.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/module.h> 30 #include <linux/prctl.h> 31 #include <linux/delay.h> 32 #include <linux/kprobes.h> 33 #include <linux/kexec.h> 34 #include <linux/backlight.h> 35 36 #include <asm/kdebug.h> 37 #include <asm/pgtable.h> 38 #include <asm/uaccess.h> 39 #include <asm/system.h> 40 #include <asm/io.h> 41 #include <asm/machdep.h> 42 #include <asm/rtas.h> 43 #include <asm/pmc.h> 44 #ifdef CONFIG_PPC32 45 #include <asm/reg.h> 46 #endif 47 #ifdef CONFIG_PMAC_BACKLIGHT 48 #include <asm/backlight.h> 49 #endif 50 #ifdef CONFIG_PPC64 51 #include <asm/firmware.h> 52 #include <asm/processor.h> 53 #endif 54 #include <asm/kexec.h> 55 56 #ifdef CONFIG_PPC64 /* XXX */ 57 #define _IO_BASE pci_io_base 58 #ifdef CONFIG_KEXEC 59 cpumask_t cpus_in_sr = CPU_MASK_NONE; 60 #endif 61 #endif 62 63 #ifdef CONFIG_DEBUGGER 64 int (*__debugger)(struct pt_regs *regs); 65 int (*__debugger_ipi)(struct pt_regs *regs); 66 int (*__debugger_bpt)(struct pt_regs *regs); 67 int (*__debugger_sstep)(struct pt_regs *regs); 68 int (*__debugger_iabr_match)(struct pt_regs *regs); 69 int (*__debugger_dabr_match)(struct pt_regs *regs); 70 int (*__debugger_fault_handler)(struct pt_regs *regs); 71 72 EXPORT_SYMBOL(__debugger); 73 EXPORT_SYMBOL(__debugger_ipi); 74 EXPORT_SYMBOL(__debugger_bpt); 75 EXPORT_SYMBOL(__debugger_sstep); 76 EXPORT_SYMBOL(__debugger_iabr_match); 77 EXPORT_SYMBOL(__debugger_dabr_match); 78 EXPORT_SYMBOL(__debugger_fault_handler); 79 #endif 80 81 ATOMIC_NOTIFIER_HEAD(powerpc_die_chain); 82 83 int register_die_notifier(struct notifier_block *nb) 84 { 85 return atomic_notifier_chain_register(&powerpc_die_chain, nb); 86 } 87 EXPORT_SYMBOL(register_die_notifier); 88 89 int unregister_die_notifier(struct notifier_block *nb) 90 { 91 return atomic_notifier_chain_unregister(&powerpc_die_chain, nb); 92 } 93 EXPORT_SYMBOL(unregister_die_notifier); 94 95 /* 96 * Trap & Exception support 97 */ 98 99 static DEFINE_SPINLOCK(die_lock); 100 101 int die(const char *str, struct pt_regs *regs, long err) 102 { 103 static int die_counter; 104 105 if (debugger(regs)) 106 return 1; 107 108 console_verbose(); 109 spin_lock_irq(&die_lock); 110 bust_spinlocks(1); 111 #ifdef CONFIG_PMAC_BACKLIGHT 112 mutex_lock(&pmac_backlight_mutex); 113 if (machine_is(powermac) && pmac_backlight) { 114 struct backlight_properties *props; 115 116 down(&pmac_backlight->sem); 117 props = pmac_backlight->props; 118 props->brightness = props->max_brightness; 119 props->power = FB_BLANK_UNBLANK; 120 props->update_status(pmac_backlight); 121 up(&pmac_backlight->sem); 122 } 123 mutex_unlock(&pmac_backlight_mutex); 124 #endif 125 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 126 #ifdef CONFIG_PREEMPT 127 printk("PREEMPT "); 128 #endif 129 #ifdef CONFIG_SMP 130 printk("SMP NR_CPUS=%d ", NR_CPUS); 131 #endif 132 #ifdef CONFIG_DEBUG_PAGEALLOC 133 printk("DEBUG_PAGEALLOC "); 134 #endif 135 #ifdef CONFIG_NUMA 136 printk("NUMA "); 137 #endif 138 printk("%s\n", ppc_md.name ? "" : ppc_md.name); 139 140 print_modules(); 141 show_regs(regs); 142 bust_spinlocks(0); 143 spin_unlock_irq(&die_lock); 144 145 if (kexec_should_crash(current) || 146 kexec_sr_activated(smp_processor_id())) 147 crash_kexec(regs); 148 crash_kexec_secondary(regs); 149 150 if (in_interrupt()) 151 panic("Fatal exception in interrupt"); 152 153 if (panic_on_oops) { 154 #ifdef CONFIG_PPC64 155 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); 156 ssleep(5); 157 #endif 158 panic("Fatal exception"); 159 } 160 do_exit(err); 161 162 return 0; 163 } 164 165 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 166 { 167 siginfo_t info; 168 169 if (!user_mode(regs)) { 170 if (die("Exception in kernel mode", regs, signr)) 171 return; 172 } 173 174 memset(&info, 0, sizeof(info)); 175 info.si_signo = signr; 176 info.si_code = code; 177 info.si_addr = (void __user *) addr; 178 force_sig_info(signr, &info, current); 179 180 /* 181 * Init gets no signals that it doesn't have a handler for. 182 * That's all very well, but if it has caused a synchronous 183 * exception and we ignore the resulting signal, it will just 184 * generate the same exception over and over again and we get 185 * nowhere. Better to kill it and let the kernel panic. 186 */ 187 if (current->pid == 1) { 188 __sighandler_t handler; 189 190 spin_lock_irq(¤t->sighand->siglock); 191 handler = current->sighand->action[signr-1].sa.sa_handler; 192 spin_unlock_irq(¤t->sighand->siglock); 193 if (handler == SIG_DFL) { 194 /* init has generated a synchronous exception 195 and it doesn't have a handler for the signal */ 196 printk(KERN_CRIT "init has generated signal %d " 197 "but has no handler for it\n", signr); 198 do_exit(signr); 199 } 200 } 201 } 202 203 #ifdef CONFIG_PPC64 204 void system_reset_exception(struct pt_regs *regs) 205 { 206 /* See if any machine dependent calls */ 207 if (ppc_md.system_reset_exception) { 208 if (ppc_md.system_reset_exception(regs)) 209 return; 210 } 211 212 #ifdef CONFIG_KEXEC 213 cpu_set(smp_processor_id(), cpus_in_sr); 214 #endif 215 216 die("System Reset", regs, SIGABRT); 217 218 /* Must die if the interrupt is not recoverable */ 219 if (!(regs->msr & MSR_RI)) 220 panic("Unrecoverable System Reset"); 221 222 /* What should we do here? We could issue a shutdown or hard reset. */ 223 } 224 #endif 225 226 /* 227 * I/O accesses can cause machine checks on powermacs. 228 * Check if the NIP corresponds to the address of a sync 229 * instruction for which there is an entry in the exception 230 * table. 231 * Note that the 601 only takes a machine check on TEA 232 * (transfer error ack) signal assertion, and does not 233 * set any of the top 16 bits of SRR1. 234 * -- paulus. 235 */ 236 static inline int check_io_access(struct pt_regs *regs) 237 { 238 #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) 239 unsigned long msr = regs->msr; 240 const struct exception_table_entry *entry; 241 unsigned int *nip = (unsigned int *)regs->nip; 242 243 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 244 && (entry = search_exception_tables(regs->nip)) != NULL) { 245 /* 246 * Check that it's a sync instruction, or somewhere 247 * in the twi; isync; nop sequence that inb/inw/inl uses. 248 * As the address is in the exception table 249 * we should be able to read the instr there. 250 * For the debug message, we look at the preceding 251 * load or store. 252 */ 253 if (*nip == 0x60000000) /* nop */ 254 nip -= 2; 255 else if (*nip == 0x4c00012c) /* isync */ 256 --nip; 257 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 258 /* sync or twi */ 259 unsigned int rb; 260 261 --nip; 262 rb = (*nip >> 11) & 0x1f; 263 printk(KERN_DEBUG "%s bad port %lx at %p\n", 264 (*nip & 0x100)? "OUT to": "IN from", 265 regs->gpr[rb] - _IO_BASE, nip); 266 regs->msr |= MSR_RI; 267 regs->nip = entry->fixup; 268 return 1; 269 } 270 } 271 #endif /* CONFIG_PPC_PMAC && CONFIG_PPC32 */ 272 return 0; 273 } 274 275 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 276 /* On 4xx, the reason for the machine check or program exception 277 is in the ESR. */ 278 #define get_reason(regs) ((regs)->dsisr) 279 #ifndef CONFIG_FSL_BOOKE 280 #define get_mc_reason(regs) ((regs)->dsisr) 281 #else 282 #define get_mc_reason(regs) (mfspr(SPRN_MCSR)) 283 #endif 284 #define REASON_FP ESR_FP 285 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 286 #define REASON_PRIVILEGED ESR_PPR 287 #define REASON_TRAP ESR_PTR 288 289 /* single-step stuff */ 290 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 291 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 292 293 #else 294 /* On non-4xx, the reason for the machine check or program 295 exception is in the MSR. */ 296 #define get_reason(regs) ((regs)->msr) 297 #define get_mc_reason(regs) ((regs)->msr) 298 #define REASON_FP 0x100000 299 #define REASON_ILLEGAL 0x80000 300 #define REASON_PRIVILEGED 0x40000 301 #define REASON_TRAP 0x20000 302 303 #define single_stepping(regs) ((regs)->msr & MSR_SE) 304 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 305 #endif 306 307 /* 308 * This is "fall-back" implementation for configurations 309 * which don't provide platform-specific machine check info 310 */ 311 void __attribute__ ((weak)) 312 platform_machine_check(struct pt_regs *regs) 313 { 314 } 315 316 void machine_check_exception(struct pt_regs *regs) 317 { 318 int recover = 0; 319 unsigned long reason = get_mc_reason(regs); 320 321 /* See if any machine dependent calls */ 322 if (ppc_md.machine_check_exception) 323 recover = ppc_md.machine_check_exception(regs); 324 325 if (recover) 326 return; 327 328 if (user_mode(regs)) { 329 regs->msr |= MSR_RI; 330 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 331 return; 332 } 333 334 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 335 /* the qspan pci read routines can cause machine checks -- Cort */ 336 bad_page_fault(regs, regs->dar, SIGBUS); 337 return; 338 #endif 339 340 if (debugger_fault_handler(regs)) { 341 regs->msr |= MSR_RI; 342 return; 343 } 344 345 if (check_io_access(regs)) 346 return; 347 348 #if defined(CONFIG_4xx) && !defined(CONFIG_440A) 349 if (reason & ESR_IMCP) { 350 printk("Instruction"); 351 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 352 } else 353 printk("Data"); 354 printk(" machine check in kernel mode.\n"); 355 #elif defined(CONFIG_440A) 356 printk("Machine check in kernel mode.\n"); 357 if (reason & ESR_IMCP){ 358 printk("Instruction Synchronous Machine Check exception\n"); 359 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 360 } 361 else { 362 u32 mcsr = mfspr(SPRN_MCSR); 363 if (mcsr & MCSR_IB) 364 printk("Instruction Read PLB Error\n"); 365 if (mcsr & MCSR_DRB) 366 printk("Data Read PLB Error\n"); 367 if (mcsr & MCSR_DWB) 368 printk("Data Write PLB Error\n"); 369 if (mcsr & MCSR_TLBP) 370 printk("TLB Parity Error\n"); 371 if (mcsr & MCSR_ICP){ 372 flush_instruction_cache(); 373 printk("I-Cache Parity Error\n"); 374 } 375 if (mcsr & MCSR_DCSP) 376 printk("D-Cache Search Parity Error\n"); 377 if (mcsr & MCSR_DCFP) 378 printk("D-Cache Flush Parity Error\n"); 379 if (mcsr & MCSR_IMPE) 380 printk("Machine Check exception is imprecise\n"); 381 382 /* Clear MCSR */ 383 mtspr(SPRN_MCSR, mcsr); 384 } 385 #elif defined (CONFIG_E500) 386 printk("Machine check in kernel mode.\n"); 387 printk("Caused by (from MCSR=%lx): ", reason); 388 389 if (reason & MCSR_MCP) 390 printk("Machine Check Signal\n"); 391 if (reason & MCSR_ICPERR) 392 printk("Instruction Cache Parity Error\n"); 393 if (reason & MCSR_DCP_PERR) 394 printk("Data Cache Push Parity Error\n"); 395 if (reason & MCSR_DCPERR) 396 printk("Data Cache Parity Error\n"); 397 if (reason & MCSR_GL_CI) 398 printk("Guarded Load or Cache-Inhibited stwcx.\n"); 399 if (reason & MCSR_BUS_IAERR) 400 printk("Bus - Instruction Address Error\n"); 401 if (reason & MCSR_BUS_RAERR) 402 printk("Bus - Read Address Error\n"); 403 if (reason & MCSR_BUS_WAERR) 404 printk("Bus - Write Address Error\n"); 405 if (reason & MCSR_BUS_IBERR) 406 printk("Bus - Instruction Data Error\n"); 407 if (reason & MCSR_BUS_RBERR) 408 printk("Bus - Read Data Bus Error\n"); 409 if (reason & MCSR_BUS_WBERR) 410 printk("Bus - Read Data Bus Error\n"); 411 if (reason & MCSR_BUS_IPERR) 412 printk("Bus - Instruction Parity Error\n"); 413 if (reason & MCSR_BUS_RPERR) 414 printk("Bus - Read Parity Error\n"); 415 #elif defined (CONFIG_E200) 416 printk("Machine check in kernel mode.\n"); 417 printk("Caused by (from MCSR=%lx): ", reason); 418 419 if (reason & MCSR_MCP) 420 printk("Machine Check Signal\n"); 421 if (reason & MCSR_CP_PERR) 422 printk("Cache Push Parity Error\n"); 423 if (reason & MCSR_CPERR) 424 printk("Cache Parity Error\n"); 425 if (reason & MCSR_EXCP_ERR) 426 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 427 if (reason & MCSR_BUS_IRERR) 428 printk("Bus - Read Bus Error on instruction fetch\n"); 429 if (reason & MCSR_BUS_DRERR) 430 printk("Bus - Read Bus Error on data load\n"); 431 if (reason & MCSR_BUS_WRERR) 432 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 433 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 434 printk("Machine check in kernel mode.\n"); 435 printk("Caused by (from SRR1=%lx): ", reason); 436 switch (reason & 0x601F0000) { 437 case 0x80000: 438 printk("Machine check signal\n"); 439 break; 440 case 0: /* for 601 */ 441 case 0x40000: 442 case 0x140000: /* 7450 MSS error and TEA */ 443 printk("Transfer error ack signal\n"); 444 break; 445 case 0x20000: 446 printk("Data parity error signal\n"); 447 break; 448 case 0x10000: 449 printk("Address parity error signal\n"); 450 break; 451 case 0x20000000: 452 printk("L1 Data Cache error\n"); 453 break; 454 case 0x40000000: 455 printk("L1 Instruction Cache error\n"); 456 break; 457 case 0x00100000: 458 printk("L2 data cache parity error\n"); 459 break; 460 default: 461 printk("Unknown values in msr\n"); 462 } 463 #endif /* CONFIG_4xx */ 464 465 /* 466 * Optional platform-provided routine to print out 467 * additional info, e.g. bus error registers. 468 */ 469 platform_machine_check(regs); 470 471 if (debugger_fault_handler(regs)) 472 return; 473 die("Machine check", regs, SIGBUS); 474 475 /* Must die if the interrupt is not recoverable */ 476 if (!(regs->msr & MSR_RI)) 477 panic("Unrecoverable Machine check"); 478 } 479 480 void SMIException(struct pt_regs *regs) 481 { 482 die("System Management Interrupt", regs, SIGABRT); 483 } 484 485 void unknown_exception(struct pt_regs *regs) 486 { 487 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 488 regs->nip, regs->msr, regs->trap); 489 490 _exception(SIGTRAP, regs, 0, 0); 491 } 492 493 void instruction_breakpoint_exception(struct pt_regs *regs) 494 { 495 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 496 5, SIGTRAP) == NOTIFY_STOP) 497 return; 498 if (debugger_iabr_match(regs)) 499 return; 500 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 501 } 502 503 void RunModeException(struct pt_regs *regs) 504 { 505 _exception(SIGTRAP, regs, 0, 0); 506 } 507 508 void __kprobes single_step_exception(struct pt_regs *regs) 509 { 510 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 511 512 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 513 5, SIGTRAP) == NOTIFY_STOP) 514 return; 515 if (debugger_sstep(regs)) 516 return; 517 518 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 519 } 520 521 /* 522 * After we have successfully emulated an instruction, we have to 523 * check if the instruction was being single-stepped, and if so, 524 * pretend we got a single-step exception. This was pointed out 525 * by Kumar Gala. -- paulus 526 */ 527 static void emulate_single_step(struct pt_regs *regs) 528 { 529 if (single_stepping(regs)) { 530 clear_single_step(regs); 531 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 532 } 533 } 534 535 static void parse_fpe(struct pt_regs *regs) 536 { 537 int code = 0; 538 unsigned long fpscr; 539 540 flush_fp_to_thread(current); 541 542 fpscr = current->thread.fpscr.val; 543 544 /* Invalid operation */ 545 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 546 code = FPE_FLTINV; 547 548 /* Overflow */ 549 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 550 code = FPE_FLTOVF; 551 552 /* Underflow */ 553 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 554 code = FPE_FLTUND; 555 556 /* Divide by zero */ 557 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 558 code = FPE_FLTDIV; 559 560 /* Inexact result */ 561 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 562 code = FPE_FLTRES; 563 564 _exception(SIGFPE, regs, code, regs->nip); 565 } 566 567 /* 568 * Illegal instruction emulation support. Originally written to 569 * provide the PVR to user applications using the mfspr rd, PVR. 570 * Return non-zero if we can't emulate, or -EFAULT if the associated 571 * memory access caused an access fault. Return zero on success. 572 * 573 * There are a couple of ways to do this, either "decode" the instruction 574 * or directly match lots of bits. In this case, matching lots of 575 * bits is faster and easier. 576 * 577 */ 578 #define INST_MFSPR_PVR 0x7c1f42a6 579 #define INST_MFSPR_PVR_MASK 0xfc1fffff 580 581 #define INST_DCBA 0x7c0005ec 582 #define INST_DCBA_MASK 0x7c0007fe 583 584 #define INST_MCRXR 0x7c000400 585 #define INST_MCRXR_MASK 0x7c0007fe 586 587 #define INST_STRING 0x7c00042a 588 #define INST_STRING_MASK 0x7c0007fe 589 #define INST_STRING_GEN_MASK 0x7c00067e 590 #define INST_LSWI 0x7c0004aa 591 #define INST_LSWX 0x7c00042a 592 #define INST_STSWI 0x7c0005aa 593 #define INST_STSWX 0x7c00052a 594 595 static int emulate_string_inst(struct pt_regs *regs, u32 instword) 596 { 597 u8 rT = (instword >> 21) & 0x1f; 598 u8 rA = (instword >> 16) & 0x1f; 599 u8 NB_RB = (instword >> 11) & 0x1f; 600 u32 num_bytes; 601 unsigned long EA; 602 int pos = 0; 603 604 /* Early out if we are an invalid form of lswx */ 605 if ((instword & INST_STRING_MASK) == INST_LSWX) 606 if ((rT == rA) || (rT == NB_RB)) 607 return -EINVAL; 608 609 EA = (rA == 0) ? 0 : regs->gpr[rA]; 610 611 switch (instword & INST_STRING_MASK) { 612 case INST_LSWX: 613 case INST_STSWX: 614 EA += NB_RB; 615 num_bytes = regs->xer & 0x7f; 616 break; 617 case INST_LSWI: 618 case INST_STSWI: 619 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 620 break; 621 default: 622 return -EINVAL; 623 } 624 625 while (num_bytes != 0) 626 { 627 u8 val; 628 u32 shift = 8 * (3 - (pos & 0x3)); 629 630 switch ((instword & INST_STRING_MASK)) { 631 case INST_LSWX: 632 case INST_LSWI: 633 if (get_user(val, (u8 __user *)EA)) 634 return -EFAULT; 635 /* first time updating this reg, 636 * zero it out */ 637 if (pos == 0) 638 regs->gpr[rT] = 0; 639 regs->gpr[rT] |= val << shift; 640 break; 641 case INST_STSWI: 642 case INST_STSWX: 643 val = regs->gpr[rT] >> shift; 644 if (put_user(val, (u8 __user *)EA)) 645 return -EFAULT; 646 break; 647 } 648 /* move EA to next address */ 649 EA += 1; 650 num_bytes--; 651 652 /* manage our position within the register */ 653 if (++pos == 4) { 654 pos = 0; 655 if (++rT == 32) 656 rT = 0; 657 } 658 } 659 660 return 0; 661 } 662 663 static int emulate_instruction(struct pt_regs *regs) 664 { 665 u32 instword; 666 u32 rd; 667 668 if (!user_mode(regs) || (regs->msr & MSR_LE)) 669 return -EINVAL; 670 CHECK_FULL_REGS(regs); 671 672 if (get_user(instword, (u32 __user *)(regs->nip))) 673 return -EFAULT; 674 675 /* Emulate the mfspr rD, PVR. */ 676 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { 677 rd = (instword >> 21) & 0x1f; 678 regs->gpr[rd] = mfspr(SPRN_PVR); 679 return 0; 680 } 681 682 /* Emulating the dcba insn is just a no-op. */ 683 if ((instword & INST_DCBA_MASK) == INST_DCBA) 684 return 0; 685 686 /* Emulate the mcrxr insn. */ 687 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { 688 int shift = (instword >> 21) & 0x1c; 689 unsigned long msk = 0xf0000000UL >> shift; 690 691 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 692 regs->xer &= ~0xf0000000UL; 693 return 0; 694 } 695 696 /* Emulate load/store string insn. */ 697 if ((instword & INST_STRING_GEN_MASK) == INST_STRING) 698 return emulate_string_inst(regs, instword); 699 700 return -EINVAL; 701 } 702 703 /* 704 * Look through the list of trap instructions that are used for BUG(), 705 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know 706 * that the exception was caused by a trap instruction of some kind. 707 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0 708 * otherwise. 709 */ 710 extern struct bug_entry __start___bug_table[], __stop___bug_table[]; 711 712 #ifndef CONFIG_MODULES 713 #define module_find_bug(x) NULL 714 #endif 715 716 struct bug_entry *find_bug(unsigned long bugaddr) 717 { 718 struct bug_entry *bug; 719 720 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug) 721 if (bugaddr == bug->bug_addr) 722 return bug; 723 return module_find_bug(bugaddr); 724 } 725 726 static int check_bug_trap(struct pt_regs *regs) 727 { 728 struct bug_entry *bug; 729 unsigned long addr; 730 731 if (regs->msr & MSR_PR) 732 return 0; /* not in kernel */ 733 addr = regs->nip; /* address of trap instruction */ 734 if (addr < PAGE_OFFSET) 735 return 0; 736 bug = find_bug(regs->nip); 737 if (bug == NULL) 738 return 0; 739 if (bug->line & BUG_WARNING_TRAP) { 740 /* this is a WARN_ON rather than BUG/BUG_ON */ 741 printk(KERN_ERR "Badness in %s at %s:%ld\n", 742 bug->function, bug->file, 743 bug->line & ~BUG_WARNING_TRAP); 744 dump_stack(); 745 return 1; 746 } 747 printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n", 748 bug->function, bug->file, bug->line); 749 750 return 0; 751 } 752 753 void __kprobes program_check_exception(struct pt_regs *regs) 754 { 755 unsigned int reason = get_reason(regs); 756 extern int do_mathemu(struct pt_regs *regs); 757 758 #ifdef CONFIG_MATH_EMULATION 759 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 760 * but there seems to be a hardware bug on the 405GP (RevD) 761 * that means ESR is sometimes set incorrectly - either to 762 * ESR_DST (!?) or 0. In the process of chasing this with the 763 * hardware people - not sure if it can happen on any illegal 764 * instruction or only on FP instructions, whether there is a 765 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 766 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) { 767 emulate_single_step(regs); 768 return; 769 } 770 #endif /* CONFIG_MATH_EMULATION */ 771 772 if (reason & REASON_FP) { 773 /* IEEE FP exception */ 774 parse_fpe(regs); 775 return; 776 } 777 if (reason & REASON_TRAP) { 778 /* trap exception */ 779 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 780 == NOTIFY_STOP) 781 return; 782 if (debugger_bpt(regs)) 783 return; 784 if (check_bug_trap(regs)) { 785 regs->nip += 4; 786 return; 787 } 788 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 789 return; 790 } 791 792 local_irq_enable(); 793 794 /* Try to emulate it if we should. */ 795 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 796 switch (emulate_instruction(regs)) { 797 case 0: 798 regs->nip += 4; 799 emulate_single_step(regs); 800 return; 801 case -EFAULT: 802 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 803 return; 804 } 805 } 806 807 if (reason & REASON_PRIVILEGED) 808 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 809 else 810 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 811 } 812 813 void alignment_exception(struct pt_regs *regs) 814 { 815 int fixed = 0; 816 817 /* we don't implement logging of alignment exceptions */ 818 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 819 fixed = fix_alignment(regs); 820 821 if (fixed == 1) { 822 regs->nip += 4; /* skip over emulated instruction */ 823 emulate_single_step(regs); 824 return; 825 } 826 827 /* Operand address was bad */ 828 if (fixed == -EFAULT) { 829 if (user_mode(regs)) 830 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar); 831 else 832 /* Search exception table */ 833 bad_page_fault(regs, regs->dar, SIGSEGV); 834 return; 835 } 836 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar); 837 } 838 839 void StackOverflow(struct pt_regs *regs) 840 { 841 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 842 current, regs->gpr[1]); 843 debugger(regs); 844 show_regs(regs); 845 panic("kernel stack overflow"); 846 } 847 848 void nonrecoverable_exception(struct pt_regs *regs) 849 { 850 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 851 regs->nip, regs->msr); 852 debugger(regs); 853 die("nonrecoverable exception", regs, SIGKILL); 854 } 855 856 void trace_syscall(struct pt_regs *regs) 857 { 858 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 859 current, current->pid, regs->nip, regs->link, regs->gpr[0], 860 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 861 } 862 863 void kernel_fp_unavailable_exception(struct pt_regs *regs) 864 { 865 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 866 "%lx at %lx\n", regs->trap, regs->nip); 867 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 868 } 869 870 void altivec_unavailable_exception(struct pt_regs *regs) 871 { 872 #if !defined(CONFIG_ALTIVEC) 873 if (user_mode(regs)) { 874 /* A user program has executed an altivec instruction, 875 but this kernel doesn't support altivec. */ 876 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 877 return; 878 } 879 #endif 880 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 881 "%lx at %lx\n", regs->trap, regs->nip); 882 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 883 } 884 885 void performance_monitor_exception(struct pt_regs *regs) 886 { 887 perf_irq(regs); 888 } 889 890 #ifdef CONFIG_8xx 891 void SoftwareEmulation(struct pt_regs *regs) 892 { 893 extern int do_mathemu(struct pt_regs *); 894 extern int Soft_emulate_8xx(struct pt_regs *); 895 int errcode; 896 897 CHECK_FULL_REGS(regs); 898 899 if (!user_mode(regs)) { 900 debugger(regs); 901 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 902 } 903 904 #ifdef CONFIG_MATH_EMULATION 905 errcode = do_mathemu(regs); 906 #else 907 errcode = Soft_emulate_8xx(regs); 908 #endif 909 if (errcode) { 910 if (errcode > 0) 911 _exception(SIGFPE, regs, 0, 0); 912 else if (errcode == -EFAULT) 913 _exception(SIGSEGV, regs, 0, 0); 914 else 915 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 916 } else 917 emulate_single_step(regs); 918 } 919 #endif /* CONFIG_8xx */ 920 921 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 922 923 void DebugException(struct pt_regs *regs, unsigned long debug_status) 924 { 925 if (debug_status & DBSR_IC) { /* instruction completion */ 926 regs->msr &= ~MSR_DE; 927 if (user_mode(regs)) { 928 current->thread.dbcr0 &= ~DBCR0_IC; 929 } else { 930 /* Disable instruction completion */ 931 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 932 /* Clear the instruction completion event */ 933 mtspr(SPRN_DBSR, DBSR_IC); 934 if (debugger_sstep(regs)) 935 return; 936 } 937 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 938 } 939 } 940 #endif /* CONFIG_4xx || CONFIG_BOOKE */ 941 942 #if !defined(CONFIG_TAU_INT) 943 void TAUException(struct pt_regs *regs) 944 { 945 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 946 regs->nip, regs->msr, regs->trap, print_tainted()); 947 } 948 #endif /* CONFIG_INT_TAU */ 949 950 #ifdef CONFIG_ALTIVEC 951 void altivec_assist_exception(struct pt_regs *regs) 952 { 953 int err; 954 955 if (!user_mode(regs)) { 956 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 957 " at %lx\n", regs->nip); 958 die("Kernel VMX/Altivec assist exception", regs, SIGILL); 959 } 960 961 flush_altivec_to_thread(current); 962 963 err = emulate_altivec(regs); 964 if (err == 0) { 965 regs->nip += 4; /* skip emulated instruction */ 966 emulate_single_step(regs); 967 return; 968 } 969 970 if (err == -EFAULT) { 971 /* got an error reading the instruction */ 972 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 973 } else { 974 /* didn't recognize the instruction */ 975 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 976 if (printk_ratelimit()) 977 printk(KERN_ERR "Unrecognized altivec instruction " 978 "in %s at %lx\n", current->comm, regs->nip); 979 current->thread.vscr.u[3] |= 0x10000; 980 } 981 } 982 #endif /* CONFIG_ALTIVEC */ 983 984 #ifdef CONFIG_FSL_BOOKE 985 void CacheLockingException(struct pt_regs *regs, unsigned long address, 986 unsigned long error_code) 987 { 988 /* We treat cache locking instructions from the user 989 * as priv ops, in the future we could try to do 990 * something smarter 991 */ 992 if (error_code & (ESR_DLK|ESR_ILK)) 993 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 994 return; 995 } 996 #endif /* CONFIG_FSL_BOOKE */ 997 998 #ifdef CONFIG_SPE 999 void SPEFloatingPointException(struct pt_regs *regs) 1000 { 1001 unsigned long spefscr; 1002 int fpexc_mode; 1003 int code = 0; 1004 1005 spefscr = current->thread.spefscr; 1006 fpexc_mode = current->thread.fpexc_mode; 1007 1008 /* Hardware does not neccessarily set sticky 1009 * underflow/overflow/invalid flags */ 1010 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1011 code = FPE_FLTOVF; 1012 spefscr |= SPEFSCR_FOVFS; 1013 } 1014 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1015 code = FPE_FLTUND; 1016 spefscr |= SPEFSCR_FUNFS; 1017 } 1018 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1019 code = FPE_FLTDIV; 1020 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1021 code = FPE_FLTINV; 1022 spefscr |= SPEFSCR_FINVS; 1023 } 1024 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1025 code = FPE_FLTRES; 1026 1027 current->thread.spefscr = spefscr; 1028 1029 _exception(SIGFPE, regs, code, regs->nip); 1030 return; 1031 } 1032 #endif 1033 1034 /* 1035 * We enter here if we get an unrecoverable exception, that is, one 1036 * that happened at a point where the RI (recoverable interrupt) bit 1037 * in the MSR is 0. This indicates that SRR0/1 are live, and that 1038 * we therefore lost state by taking this exception. 1039 */ 1040 void unrecoverable_exception(struct pt_regs *regs) 1041 { 1042 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1043 regs->trap, regs->nip); 1044 die("Unrecoverable exception", regs, SIGABRT); 1045 } 1046 1047 #ifdef CONFIG_BOOKE_WDT 1048 /* 1049 * Default handler for a Watchdog exception, 1050 * spins until a reboot occurs 1051 */ 1052 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 1053 { 1054 /* Generic WatchdogHandler, implement your own */ 1055 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 1056 return; 1057 } 1058 1059 void WatchdogException(struct pt_regs *regs) 1060 { 1061 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 1062 WatchdogHandler(regs); 1063 } 1064 #endif 1065 1066 /* 1067 * We enter here if we discover during exception entry that we are 1068 * running in supervisor mode with a userspace value in the stack pointer. 1069 */ 1070 void kernel_bad_stack(struct pt_regs *regs) 1071 { 1072 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1073 regs->gpr[1], regs->nip); 1074 die("Bad kernel stack pointer", regs, SIGABRT); 1075 } 1076 1077 void __init trap_init(void) 1078 { 1079 } 1080