1 /* 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * and Paul Mackerras (paulus@samba.org) 11 */ 12 13 /* 14 * This file handles the architecture-dependent parts of hardware exceptions 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/stddef.h> 22 #include <linux/unistd.h> 23 #include <linux/ptrace.h> 24 #include <linux/slab.h> 25 #include <linux/user.h> 26 #include <linux/a.out.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/module.h> 30 #include <linux/prctl.h> 31 #include <linux/delay.h> 32 #include <linux/kprobes.h> 33 #include <linux/kexec.h> 34 #include <linux/backlight.h> 35 #include <linux/bug.h> 36 #include <linux/kdebug.h> 37 38 #include <asm/pgtable.h> 39 #include <asm/uaccess.h> 40 #include <asm/system.h> 41 #include <asm/io.h> 42 #include <asm/machdep.h> 43 #include <asm/rtas.h> 44 #include <asm/pmc.h> 45 #ifdef CONFIG_PPC32 46 #include <asm/reg.h> 47 #endif 48 #ifdef CONFIG_PMAC_BACKLIGHT 49 #include <asm/backlight.h> 50 #endif 51 #ifdef CONFIG_PPC64 52 #include <asm/firmware.h> 53 #include <asm/processor.h> 54 #endif 55 #include <asm/kexec.h> 56 57 #ifdef CONFIG_DEBUGGER 58 int (*__debugger)(struct pt_regs *regs); 59 int (*__debugger_ipi)(struct pt_regs *regs); 60 int (*__debugger_bpt)(struct pt_regs *regs); 61 int (*__debugger_sstep)(struct pt_regs *regs); 62 int (*__debugger_iabr_match)(struct pt_regs *regs); 63 int (*__debugger_dabr_match)(struct pt_regs *regs); 64 int (*__debugger_fault_handler)(struct pt_regs *regs); 65 66 EXPORT_SYMBOL(__debugger); 67 EXPORT_SYMBOL(__debugger_ipi); 68 EXPORT_SYMBOL(__debugger_bpt); 69 EXPORT_SYMBOL(__debugger_sstep); 70 EXPORT_SYMBOL(__debugger_iabr_match); 71 EXPORT_SYMBOL(__debugger_dabr_match); 72 EXPORT_SYMBOL(__debugger_fault_handler); 73 #endif 74 75 /* 76 * Trap & Exception support 77 */ 78 79 #ifdef CONFIG_PMAC_BACKLIGHT 80 static void pmac_backlight_unblank(void) 81 { 82 mutex_lock(&pmac_backlight_mutex); 83 if (pmac_backlight) { 84 struct backlight_properties *props; 85 86 props = &pmac_backlight->props; 87 props->brightness = props->max_brightness; 88 props->power = FB_BLANK_UNBLANK; 89 backlight_update_status(pmac_backlight); 90 } 91 mutex_unlock(&pmac_backlight_mutex); 92 } 93 #else 94 static inline void pmac_backlight_unblank(void) { } 95 #endif 96 97 int die(const char *str, struct pt_regs *regs, long err) 98 { 99 static struct { 100 spinlock_t lock; 101 u32 lock_owner; 102 int lock_owner_depth; 103 } die = { 104 .lock = __SPIN_LOCK_UNLOCKED(die.lock), 105 .lock_owner = -1, 106 .lock_owner_depth = 0 107 }; 108 static int die_counter; 109 unsigned long flags; 110 111 if (debugger(regs)) 112 return 1; 113 114 oops_enter(); 115 116 if (die.lock_owner != raw_smp_processor_id()) { 117 console_verbose(); 118 spin_lock_irqsave(&die.lock, flags); 119 die.lock_owner = smp_processor_id(); 120 die.lock_owner_depth = 0; 121 bust_spinlocks(1); 122 if (machine_is(powermac)) 123 pmac_backlight_unblank(); 124 } else { 125 local_save_flags(flags); 126 } 127 128 if (++die.lock_owner_depth < 3) { 129 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 130 #ifdef CONFIG_PREEMPT 131 printk("PREEMPT "); 132 #endif 133 #ifdef CONFIG_SMP 134 printk("SMP NR_CPUS=%d ", NR_CPUS); 135 #endif 136 #ifdef CONFIG_DEBUG_PAGEALLOC 137 printk("DEBUG_PAGEALLOC "); 138 #endif 139 #ifdef CONFIG_NUMA 140 printk("NUMA "); 141 #endif 142 printk("%s\n", ppc_md.name ? ppc_md.name : ""); 143 144 print_modules(); 145 show_regs(regs); 146 } else { 147 printk("Recursive die() failure, output suppressed\n"); 148 } 149 150 bust_spinlocks(0); 151 die.lock_owner = -1; 152 add_taint(TAINT_DIE); 153 spin_unlock_irqrestore(&die.lock, flags); 154 155 if (kexec_should_crash(current) || 156 kexec_sr_activated(smp_processor_id())) 157 crash_kexec(regs); 158 crash_kexec_secondary(regs); 159 160 if (in_interrupt()) 161 panic("Fatal exception in interrupt"); 162 163 if (panic_on_oops) 164 panic("Fatal exception"); 165 166 oops_exit(); 167 do_exit(err); 168 169 return 0; 170 } 171 172 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 173 { 174 siginfo_t info; 175 176 if (!user_mode(regs)) { 177 if (die("Exception in kernel mode", regs, signr)) 178 return; 179 } 180 181 memset(&info, 0, sizeof(info)); 182 info.si_signo = signr; 183 info.si_code = code; 184 info.si_addr = (void __user *) addr; 185 force_sig_info(signr, &info, current); 186 187 /* 188 * Init gets no signals that it doesn't have a handler for. 189 * That's all very well, but if it has caused a synchronous 190 * exception and we ignore the resulting signal, it will just 191 * generate the same exception over and over again and we get 192 * nowhere. Better to kill it and let the kernel panic. 193 */ 194 if (is_init(current)) { 195 __sighandler_t handler; 196 197 spin_lock_irq(¤t->sighand->siglock); 198 handler = current->sighand->action[signr-1].sa.sa_handler; 199 spin_unlock_irq(¤t->sighand->siglock); 200 if (handler == SIG_DFL) { 201 /* init has generated a synchronous exception 202 and it doesn't have a handler for the signal */ 203 printk(KERN_CRIT "init has generated signal %d " 204 "but has no handler for it\n", signr); 205 do_exit(signr); 206 } 207 } 208 } 209 210 #ifdef CONFIG_PPC64 211 void system_reset_exception(struct pt_regs *regs) 212 { 213 /* See if any machine dependent calls */ 214 if (ppc_md.system_reset_exception) { 215 if (ppc_md.system_reset_exception(regs)) 216 return; 217 } 218 219 #ifdef CONFIG_KEXEC 220 cpu_set(smp_processor_id(), cpus_in_sr); 221 #endif 222 223 die("System Reset", regs, SIGABRT); 224 225 /* 226 * Some CPUs when released from the debugger will execute this path. 227 * These CPUs entered the debugger via a soft-reset. If the CPU was 228 * hung before entering the debugger it will return to the hung 229 * state when exiting this function. This causes a problem in 230 * kdump since the hung CPU(s) will not respond to the IPI sent 231 * from kdump. To prevent the problem we call crash_kexec_secondary() 232 * here. If a kdump had not been initiated or we exit the debugger 233 * with the "exit and recover" command (x) crash_kexec_secondary() 234 * will return after 5ms and the CPU returns to its previous state. 235 */ 236 crash_kexec_secondary(regs); 237 238 /* Must die if the interrupt is not recoverable */ 239 if (!(regs->msr & MSR_RI)) 240 panic("Unrecoverable System Reset"); 241 242 /* What should we do here? We could issue a shutdown or hard reset. */ 243 } 244 #endif 245 246 /* 247 * I/O accesses can cause machine checks on powermacs. 248 * Check if the NIP corresponds to the address of a sync 249 * instruction for which there is an entry in the exception 250 * table. 251 * Note that the 601 only takes a machine check on TEA 252 * (transfer error ack) signal assertion, and does not 253 * set any of the top 16 bits of SRR1. 254 * -- paulus. 255 */ 256 static inline int check_io_access(struct pt_regs *regs) 257 { 258 #ifdef CONFIG_PPC32 259 unsigned long msr = regs->msr; 260 const struct exception_table_entry *entry; 261 unsigned int *nip = (unsigned int *)regs->nip; 262 263 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 264 && (entry = search_exception_tables(regs->nip)) != NULL) { 265 /* 266 * Check that it's a sync instruction, or somewhere 267 * in the twi; isync; nop sequence that inb/inw/inl uses. 268 * As the address is in the exception table 269 * we should be able to read the instr there. 270 * For the debug message, we look at the preceding 271 * load or store. 272 */ 273 if (*nip == 0x60000000) /* nop */ 274 nip -= 2; 275 else if (*nip == 0x4c00012c) /* isync */ 276 --nip; 277 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 278 /* sync or twi */ 279 unsigned int rb; 280 281 --nip; 282 rb = (*nip >> 11) & 0x1f; 283 printk(KERN_DEBUG "%s bad port %lx at %p\n", 284 (*nip & 0x100)? "OUT to": "IN from", 285 regs->gpr[rb] - _IO_BASE, nip); 286 regs->msr |= MSR_RI; 287 regs->nip = entry->fixup; 288 return 1; 289 } 290 } 291 #endif /* CONFIG_PPC32 */ 292 return 0; 293 } 294 295 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 296 /* On 4xx, the reason for the machine check or program exception 297 is in the ESR. */ 298 #define get_reason(regs) ((regs)->dsisr) 299 #ifndef CONFIG_FSL_BOOKE 300 #define get_mc_reason(regs) ((regs)->dsisr) 301 #else 302 #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK) 303 #endif 304 #define REASON_FP ESR_FP 305 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 306 #define REASON_PRIVILEGED ESR_PPR 307 #define REASON_TRAP ESR_PTR 308 309 /* single-step stuff */ 310 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 311 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 312 313 #else 314 /* On non-4xx, the reason for the machine check or program 315 exception is in the MSR. */ 316 #define get_reason(regs) ((regs)->msr) 317 #define get_mc_reason(regs) ((regs)->msr) 318 #define REASON_FP 0x100000 319 #define REASON_ILLEGAL 0x80000 320 #define REASON_PRIVILEGED 0x40000 321 #define REASON_TRAP 0x20000 322 323 #define single_stepping(regs) ((regs)->msr & MSR_SE) 324 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 325 #endif 326 327 /* 328 * This is "fall-back" implementation for configurations 329 * which don't provide platform-specific machine check info 330 */ 331 void __attribute__ ((weak)) 332 platform_machine_check(struct pt_regs *regs) 333 { 334 } 335 336 void machine_check_exception(struct pt_regs *regs) 337 { 338 int recover = 0; 339 unsigned long reason = get_mc_reason(regs); 340 341 /* See if any machine dependent calls */ 342 if (ppc_md.machine_check_exception) 343 recover = ppc_md.machine_check_exception(regs); 344 345 if (recover) 346 return; 347 348 if (user_mode(regs)) { 349 regs->msr |= MSR_RI; 350 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 351 return; 352 } 353 354 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 355 /* the qspan pci read routines can cause machine checks -- Cort */ 356 bad_page_fault(regs, regs->dar, SIGBUS); 357 return; 358 #endif 359 360 if (debugger_fault_handler(regs)) { 361 regs->msr |= MSR_RI; 362 return; 363 } 364 365 if (check_io_access(regs)) 366 return; 367 368 #if defined(CONFIG_4xx) && !defined(CONFIG_440A) 369 if (reason & ESR_IMCP) { 370 printk("Instruction"); 371 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 372 } else 373 printk("Data"); 374 printk(" machine check in kernel mode.\n"); 375 #elif defined(CONFIG_440A) 376 printk("Machine check in kernel mode.\n"); 377 if (reason & ESR_IMCP){ 378 printk("Instruction Synchronous Machine Check exception\n"); 379 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 380 } 381 else { 382 u32 mcsr = mfspr(SPRN_MCSR); 383 if (mcsr & MCSR_IB) 384 printk("Instruction Read PLB Error\n"); 385 if (mcsr & MCSR_DRB) 386 printk("Data Read PLB Error\n"); 387 if (mcsr & MCSR_DWB) 388 printk("Data Write PLB Error\n"); 389 if (mcsr & MCSR_TLBP) 390 printk("TLB Parity Error\n"); 391 if (mcsr & MCSR_ICP){ 392 flush_instruction_cache(); 393 printk("I-Cache Parity Error\n"); 394 } 395 if (mcsr & MCSR_DCSP) 396 printk("D-Cache Search Parity Error\n"); 397 if (mcsr & MCSR_DCFP) 398 printk("D-Cache Flush Parity Error\n"); 399 if (mcsr & MCSR_IMPE) 400 printk("Machine Check exception is imprecise\n"); 401 402 /* Clear MCSR */ 403 mtspr(SPRN_MCSR, mcsr); 404 } 405 #elif defined (CONFIG_E500) 406 printk("Machine check in kernel mode.\n"); 407 printk("Caused by (from MCSR=%lx): ", reason); 408 409 if (reason & MCSR_MCP) 410 printk("Machine Check Signal\n"); 411 if (reason & MCSR_ICPERR) 412 printk("Instruction Cache Parity Error\n"); 413 if (reason & MCSR_DCP_PERR) 414 printk("Data Cache Push Parity Error\n"); 415 if (reason & MCSR_DCPERR) 416 printk("Data Cache Parity Error\n"); 417 if (reason & MCSR_BUS_IAERR) 418 printk("Bus - Instruction Address Error\n"); 419 if (reason & MCSR_BUS_RAERR) 420 printk("Bus - Read Address Error\n"); 421 if (reason & MCSR_BUS_WAERR) 422 printk("Bus - Write Address Error\n"); 423 if (reason & MCSR_BUS_IBERR) 424 printk("Bus - Instruction Data Error\n"); 425 if (reason & MCSR_BUS_RBERR) 426 printk("Bus - Read Data Bus Error\n"); 427 if (reason & MCSR_BUS_WBERR) 428 printk("Bus - Read Data Bus Error\n"); 429 if (reason & MCSR_BUS_IPERR) 430 printk("Bus - Instruction Parity Error\n"); 431 if (reason & MCSR_BUS_RPERR) 432 printk("Bus - Read Parity Error\n"); 433 #elif defined (CONFIG_E200) 434 printk("Machine check in kernel mode.\n"); 435 printk("Caused by (from MCSR=%lx): ", reason); 436 437 if (reason & MCSR_MCP) 438 printk("Machine Check Signal\n"); 439 if (reason & MCSR_CP_PERR) 440 printk("Cache Push Parity Error\n"); 441 if (reason & MCSR_CPERR) 442 printk("Cache Parity Error\n"); 443 if (reason & MCSR_EXCP_ERR) 444 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 445 if (reason & MCSR_BUS_IRERR) 446 printk("Bus - Read Bus Error on instruction fetch\n"); 447 if (reason & MCSR_BUS_DRERR) 448 printk("Bus - Read Bus Error on data load\n"); 449 if (reason & MCSR_BUS_WRERR) 450 printk("Bus - Write Bus Error on buffered store or cache line push\n"); 451 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */ 452 printk("Machine check in kernel mode.\n"); 453 printk("Caused by (from SRR1=%lx): ", reason); 454 switch (reason & 0x601F0000) { 455 case 0x80000: 456 printk("Machine check signal\n"); 457 break; 458 case 0: /* for 601 */ 459 case 0x40000: 460 case 0x140000: /* 7450 MSS error and TEA */ 461 printk("Transfer error ack signal\n"); 462 break; 463 case 0x20000: 464 printk("Data parity error signal\n"); 465 break; 466 case 0x10000: 467 printk("Address parity error signal\n"); 468 break; 469 case 0x20000000: 470 printk("L1 Data Cache error\n"); 471 break; 472 case 0x40000000: 473 printk("L1 Instruction Cache error\n"); 474 break; 475 case 0x00100000: 476 printk("L2 data cache parity error\n"); 477 break; 478 default: 479 printk("Unknown values in msr\n"); 480 } 481 #endif /* CONFIG_4xx */ 482 483 /* 484 * Optional platform-provided routine to print out 485 * additional info, e.g. bus error registers. 486 */ 487 platform_machine_check(regs); 488 489 if (debugger_fault_handler(regs)) 490 return; 491 die("Machine check", regs, SIGBUS); 492 493 /* Must die if the interrupt is not recoverable */ 494 if (!(regs->msr & MSR_RI)) 495 panic("Unrecoverable Machine check"); 496 } 497 498 void SMIException(struct pt_regs *regs) 499 { 500 die("System Management Interrupt", regs, SIGABRT); 501 } 502 503 void unknown_exception(struct pt_regs *regs) 504 { 505 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 506 regs->nip, regs->msr, regs->trap); 507 508 _exception(SIGTRAP, regs, 0, 0); 509 } 510 511 void instruction_breakpoint_exception(struct pt_regs *regs) 512 { 513 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 514 5, SIGTRAP) == NOTIFY_STOP) 515 return; 516 if (debugger_iabr_match(regs)) 517 return; 518 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 519 } 520 521 void RunModeException(struct pt_regs *regs) 522 { 523 _exception(SIGTRAP, regs, 0, 0); 524 } 525 526 void __kprobes single_step_exception(struct pt_regs *regs) 527 { 528 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 529 530 if (notify_die(DIE_SSTEP, "single_step", regs, 5, 531 5, SIGTRAP) == NOTIFY_STOP) 532 return; 533 if (debugger_sstep(regs)) 534 return; 535 536 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 537 } 538 539 /* 540 * After we have successfully emulated an instruction, we have to 541 * check if the instruction was being single-stepped, and if so, 542 * pretend we got a single-step exception. This was pointed out 543 * by Kumar Gala. -- paulus 544 */ 545 static void emulate_single_step(struct pt_regs *regs) 546 { 547 if (single_stepping(regs)) { 548 clear_single_step(regs); 549 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 550 } 551 } 552 553 static inline int __parse_fpscr(unsigned long fpscr) 554 { 555 int ret = 0; 556 557 /* Invalid operation */ 558 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 559 ret = FPE_FLTINV; 560 561 /* Overflow */ 562 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 563 ret = FPE_FLTOVF; 564 565 /* Underflow */ 566 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 567 ret = FPE_FLTUND; 568 569 /* Divide by zero */ 570 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 571 ret = FPE_FLTDIV; 572 573 /* Inexact result */ 574 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 575 ret = FPE_FLTRES; 576 577 return ret; 578 } 579 580 static void parse_fpe(struct pt_regs *regs) 581 { 582 int code = 0; 583 584 flush_fp_to_thread(current); 585 586 code = __parse_fpscr(current->thread.fpscr.val); 587 588 _exception(SIGFPE, regs, code, regs->nip); 589 } 590 591 /* 592 * Illegal instruction emulation support. Originally written to 593 * provide the PVR to user applications using the mfspr rd, PVR. 594 * Return non-zero if we can't emulate, or -EFAULT if the associated 595 * memory access caused an access fault. Return zero on success. 596 * 597 * There are a couple of ways to do this, either "decode" the instruction 598 * or directly match lots of bits. In this case, matching lots of 599 * bits is faster and easier. 600 * 601 */ 602 #define INST_MFSPR_PVR 0x7c1f42a6 603 #define INST_MFSPR_PVR_MASK 0xfc1fffff 604 605 #define INST_DCBA 0x7c0005ec 606 #define INST_DCBA_MASK 0xfc0007fe 607 608 #define INST_MCRXR 0x7c000400 609 #define INST_MCRXR_MASK 0xfc0007fe 610 611 #define INST_STRING 0x7c00042a 612 #define INST_STRING_MASK 0xfc0007fe 613 #define INST_STRING_GEN_MASK 0xfc00067e 614 #define INST_LSWI 0x7c0004aa 615 #define INST_LSWX 0x7c00042a 616 #define INST_STSWI 0x7c0005aa 617 #define INST_STSWX 0x7c00052a 618 619 #define INST_POPCNTB 0x7c0000f4 620 #define INST_POPCNTB_MASK 0xfc0007fe 621 622 static int emulate_string_inst(struct pt_regs *regs, u32 instword) 623 { 624 u8 rT = (instword >> 21) & 0x1f; 625 u8 rA = (instword >> 16) & 0x1f; 626 u8 NB_RB = (instword >> 11) & 0x1f; 627 u32 num_bytes; 628 unsigned long EA; 629 int pos = 0; 630 631 /* Early out if we are an invalid form of lswx */ 632 if ((instword & INST_STRING_MASK) == INST_LSWX) 633 if ((rT == rA) || (rT == NB_RB)) 634 return -EINVAL; 635 636 EA = (rA == 0) ? 0 : regs->gpr[rA]; 637 638 switch (instword & INST_STRING_MASK) { 639 case INST_LSWX: 640 case INST_STSWX: 641 EA += NB_RB; 642 num_bytes = regs->xer & 0x7f; 643 break; 644 case INST_LSWI: 645 case INST_STSWI: 646 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 647 break; 648 default: 649 return -EINVAL; 650 } 651 652 while (num_bytes != 0) 653 { 654 u8 val; 655 u32 shift = 8 * (3 - (pos & 0x3)); 656 657 switch ((instword & INST_STRING_MASK)) { 658 case INST_LSWX: 659 case INST_LSWI: 660 if (get_user(val, (u8 __user *)EA)) 661 return -EFAULT; 662 /* first time updating this reg, 663 * zero it out */ 664 if (pos == 0) 665 regs->gpr[rT] = 0; 666 regs->gpr[rT] |= val << shift; 667 break; 668 case INST_STSWI: 669 case INST_STSWX: 670 val = regs->gpr[rT] >> shift; 671 if (put_user(val, (u8 __user *)EA)) 672 return -EFAULT; 673 break; 674 } 675 /* move EA to next address */ 676 EA += 1; 677 num_bytes--; 678 679 /* manage our position within the register */ 680 if (++pos == 4) { 681 pos = 0; 682 if (++rT == 32) 683 rT = 0; 684 } 685 } 686 687 return 0; 688 } 689 690 static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword) 691 { 692 u32 ra,rs; 693 unsigned long tmp; 694 695 ra = (instword >> 16) & 0x1f; 696 rs = (instword >> 21) & 0x1f; 697 698 tmp = regs->gpr[rs]; 699 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL); 700 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL); 701 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL; 702 regs->gpr[ra] = tmp; 703 704 return 0; 705 } 706 707 static int emulate_instruction(struct pt_regs *regs) 708 { 709 u32 instword; 710 u32 rd; 711 712 if (!user_mode(regs) || (regs->msr & MSR_LE)) 713 return -EINVAL; 714 CHECK_FULL_REGS(regs); 715 716 if (get_user(instword, (u32 __user *)(regs->nip))) 717 return -EFAULT; 718 719 /* Emulate the mfspr rD, PVR. */ 720 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { 721 rd = (instword >> 21) & 0x1f; 722 regs->gpr[rd] = mfspr(SPRN_PVR); 723 return 0; 724 } 725 726 /* Emulating the dcba insn is just a no-op. */ 727 if ((instword & INST_DCBA_MASK) == INST_DCBA) 728 return 0; 729 730 /* Emulate the mcrxr insn. */ 731 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { 732 int shift = (instword >> 21) & 0x1c; 733 unsigned long msk = 0xf0000000UL >> shift; 734 735 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 736 regs->xer &= ~0xf0000000UL; 737 return 0; 738 } 739 740 /* Emulate load/store string insn. */ 741 if ((instword & INST_STRING_GEN_MASK) == INST_STRING) 742 return emulate_string_inst(regs, instword); 743 744 /* Emulate the popcntb (Population Count Bytes) instruction. */ 745 if ((instword & INST_POPCNTB_MASK) == INST_POPCNTB) { 746 return emulate_popcntb_inst(regs, instword); 747 } 748 749 return -EINVAL; 750 } 751 752 int is_valid_bugaddr(unsigned long addr) 753 { 754 return is_kernel_addr(addr); 755 } 756 757 void __kprobes program_check_exception(struct pt_regs *regs) 758 { 759 unsigned int reason = get_reason(regs); 760 extern int do_mathemu(struct pt_regs *regs); 761 762 /* We can now get here via a FP Unavailable exception if the core 763 * has no FPU, in that case the reason flags will be 0 */ 764 765 if (reason & REASON_FP) { 766 /* IEEE FP exception */ 767 parse_fpe(regs); 768 return; 769 } 770 if (reason & REASON_TRAP) { 771 /* trap exception */ 772 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 773 == NOTIFY_STOP) 774 return; 775 if (debugger_bpt(regs)) 776 return; 777 778 if (!(regs->msr & MSR_PR) && /* not user-mode */ 779 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) { 780 regs->nip += 4; 781 return; 782 } 783 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 784 return; 785 } 786 787 local_irq_enable(); 788 789 #ifdef CONFIG_MATH_EMULATION 790 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 791 * but there seems to be a hardware bug on the 405GP (RevD) 792 * that means ESR is sometimes set incorrectly - either to 793 * ESR_DST (!?) or 0. In the process of chasing this with the 794 * hardware people - not sure if it can happen on any illegal 795 * instruction or only on FP instructions, whether there is a 796 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 797 switch (do_mathemu(regs)) { 798 case 0: 799 emulate_single_step(regs); 800 return; 801 case 1: { 802 int code = 0; 803 code = __parse_fpscr(current->thread.fpscr.val); 804 _exception(SIGFPE, regs, code, regs->nip); 805 return; 806 } 807 case -EFAULT: 808 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 809 return; 810 } 811 /* fall through on any other errors */ 812 #endif /* CONFIG_MATH_EMULATION */ 813 814 /* Try to emulate it if we should. */ 815 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 816 switch (emulate_instruction(regs)) { 817 case 0: 818 regs->nip += 4; 819 emulate_single_step(regs); 820 return; 821 case -EFAULT: 822 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 823 return; 824 } 825 } 826 827 if (reason & REASON_PRIVILEGED) 828 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 829 else 830 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 831 } 832 833 void alignment_exception(struct pt_regs *regs) 834 { 835 int sig, code, fixed = 0; 836 837 /* we don't implement logging of alignment exceptions */ 838 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 839 fixed = fix_alignment(regs); 840 841 if (fixed == 1) { 842 regs->nip += 4; /* skip over emulated instruction */ 843 emulate_single_step(regs); 844 return; 845 } 846 847 /* Operand address was bad */ 848 if (fixed == -EFAULT) { 849 sig = SIGSEGV; 850 code = SEGV_ACCERR; 851 } else { 852 sig = SIGBUS; 853 code = BUS_ADRALN; 854 } 855 if (user_mode(regs)) 856 _exception(sig, regs, code, regs->dar); 857 else 858 bad_page_fault(regs, regs->dar, sig); 859 } 860 861 void StackOverflow(struct pt_regs *regs) 862 { 863 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 864 current, regs->gpr[1]); 865 debugger(regs); 866 show_regs(regs); 867 panic("kernel stack overflow"); 868 } 869 870 void nonrecoverable_exception(struct pt_regs *regs) 871 { 872 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 873 regs->nip, regs->msr); 874 debugger(regs); 875 die("nonrecoverable exception", regs, SIGKILL); 876 } 877 878 void trace_syscall(struct pt_regs *regs) 879 { 880 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 881 current, current->pid, regs->nip, regs->link, regs->gpr[0], 882 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 883 } 884 885 void kernel_fp_unavailable_exception(struct pt_regs *regs) 886 { 887 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 888 "%lx at %lx\n", regs->trap, regs->nip); 889 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 890 } 891 892 void altivec_unavailable_exception(struct pt_regs *regs) 893 { 894 if (user_mode(regs)) { 895 /* A user program has executed an altivec instruction, 896 but this kernel doesn't support altivec. */ 897 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 898 return; 899 } 900 901 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 902 "%lx at %lx\n", regs->trap, regs->nip); 903 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 904 } 905 906 void performance_monitor_exception(struct pt_regs *regs) 907 { 908 perf_irq(regs); 909 } 910 911 #ifdef CONFIG_8xx 912 void SoftwareEmulation(struct pt_regs *regs) 913 { 914 extern int do_mathemu(struct pt_regs *); 915 extern int Soft_emulate_8xx(struct pt_regs *); 916 int errcode; 917 918 CHECK_FULL_REGS(regs); 919 920 if (!user_mode(regs)) { 921 debugger(regs); 922 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 923 } 924 925 #ifdef CONFIG_MATH_EMULATION 926 errcode = do_mathemu(regs); 927 928 switch (errcode) { 929 case 0: 930 emulate_single_step(regs); 931 return; 932 case 1: { 933 int code = 0; 934 code = __parse_fpscr(current->thread.fpscr.val); 935 _exception(SIGFPE, regs, code, regs->nip); 936 return; 937 } 938 case -EFAULT: 939 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 940 return; 941 default: 942 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 943 return; 944 } 945 946 #else 947 errcode = Soft_emulate_8xx(regs); 948 switch (errcode) { 949 case 0: 950 emulate_single_step(regs); 951 return; 952 case 1: 953 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 954 return; 955 case -EFAULT: 956 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 957 return; 958 } 959 #endif 960 } 961 #endif /* CONFIG_8xx */ 962 963 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 964 965 void DebugException(struct pt_regs *regs, unsigned long debug_status) 966 { 967 if (debug_status & DBSR_IC) { /* instruction completion */ 968 regs->msr &= ~MSR_DE; 969 if (user_mode(regs)) { 970 current->thread.dbcr0 &= ~DBCR0_IC; 971 } else { 972 /* Disable instruction completion */ 973 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 974 /* Clear the instruction completion event */ 975 mtspr(SPRN_DBSR, DBSR_IC); 976 if (debugger_sstep(regs)) 977 return; 978 } 979 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 980 } 981 } 982 #endif /* CONFIG_4xx || CONFIG_BOOKE */ 983 984 #if !defined(CONFIG_TAU_INT) 985 void TAUException(struct pt_regs *regs) 986 { 987 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 988 regs->nip, regs->msr, regs->trap, print_tainted()); 989 } 990 #endif /* CONFIG_INT_TAU */ 991 992 #ifdef CONFIG_ALTIVEC 993 void altivec_assist_exception(struct pt_regs *regs) 994 { 995 int err; 996 997 if (!user_mode(regs)) { 998 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 999 " at %lx\n", regs->nip); 1000 die("Kernel VMX/Altivec assist exception", regs, SIGILL); 1001 } 1002 1003 flush_altivec_to_thread(current); 1004 1005 err = emulate_altivec(regs); 1006 if (err == 0) { 1007 regs->nip += 4; /* skip emulated instruction */ 1008 emulate_single_step(regs); 1009 return; 1010 } 1011 1012 if (err == -EFAULT) { 1013 /* got an error reading the instruction */ 1014 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 1015 } else { 1016 /* didn't recognize the instruction */ 1017 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 1018 if (printk_ratelimit()) 1019 printk(KERN_ERR "Unrecognized altivec instruction " 1020 "in %s at %lx\n", current->comm, regs->nip); 1021 current->thread.vscr.u[3] |= 0x10000; 1022 } 1023 } 1024 #endif /* CONFIG_ALTIVEC */ 1025 1026 #ifdef CONFIG_FSL_BOOKE 1027 void CacheLockingException(struct pt_regs *regs, unsigned long address, 1028 unsigned long error_code) 1029 { 1030 /* We treat cache locking instructions from the user 1031 * as priv ops, in the future we could try to do 1032 * something smarter 1033 */ 1034 if (error_code & (ESR_DLK|ESR_ILK)) 1035 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 1036 return; 1037 } 1038 #endif /* CONFIG_FSL_BOOKE */ 1039 1040 #ifdef CONFIG_SPE 1041 void SPEFloatingPointException(struct pt_regs *regs) 1042 { 1043 unsigned long spefscr; 1044 int fpexc_mode; 1045 int code = 0; 1046 1047 spefscr = current->thread.spefscr; 1048 fpexc_mode = current->thread.fpexc_mode; 1049 1050 /* Hardware does not neccessarily set sticky 1051 * underflow/overflow/invalid flags */ 1052 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 1053 code = FPE_FLTOVF; 1054 spefscr |= SPEFSCR_FOVFS; 1055 } 1056 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 1057 code = FPE_FLTUND; 1058 spefscr |= SPEFSCR_FUNFS; 1059 } 1060 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 1061 code = FPE_FLTDIV; 1062 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 1063 code = FPE_FLTINV; 1064 spefscr |= SPEFSCR_FINVS; 1065 } 1066 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 1067 code = FPE_FLTRES; 1068 1069 current->thread.spefscr = spefscr; 1070 1071 _exception(SIGFPE, regs, code, regs->nip); 1072 return; 1073 } 1074 #endif 1075 1076 /* 1077 * We enter here if we get an unrecoverable exception, that is, one 1078 * that happened at a point where the RI (recoverable interrupt) bit 1079 * in the MSR is 0. This indicates that SRR0/1 are live, and that 1080 * we therefore lost state by taking this exception. 1081 */ 1082 void unrecoverable_exception(struct pt_regs *regs) 1083 { 1084 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1085 regs->trap, regs->nip); 1086 die("Unrecoverable exception", regs, SIGABRT); 1087 } 1088 1089 #ifdef CONFIG_BOOKE_WDT 1090 /* 1091 * Default handler for a Watchdog exception, 1092 * spins until a reboot occurs 1093 */ 1094 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 1095 { 1096 /* Generic WatchdogHandler, implement your own */ 1097 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 1098 return; 1099 } 1100 1101 void WatchdogException(struct pt_regs *regs) 1102 { 1103 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 1104 WatchdogHandler(regs); 1105 } 1106 #endif 1107 1108 /* 1109 * We enter here if we discover during exception entry that we are 1110 * running in supervisor mode with a userspace value in the stack pointer. 1111 */ 1112 void kernel_bad_stack(struct pt_regs *regs) 1113 { 1114 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1115 regs->gpr[1], regs->nip); 1116 die("Bad kernel stack pointer", regs, SIGABRT); 1117 } 1118 1119 void __init trap_init(void) 1120 { 1121 } 1122