114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3*fe04b112SScott Wood * Copyright 2007-2010 Freescale Semiconductor, Inc. 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 614cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 714cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 814cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 914cf11afSPaul Mackerras * 1014cf11afSPaul Mackerras * Modified by Cort Dougan (cort@cs.nmt.edu) 1114cf11afSPaul Mackerras * and Paul Mackerras (paulus@samba.org) 1214cf11afSPaul Mackerras */ 1314cf11afSPaul Mackerras 1414cf11afSPaul Mackerras /* 1514cf11afSPaul Mackerras * This file handles the architecture-dependent parts of hardware exceptions 1614cf11afSPaul Mackerras */ 1714cf11afSPaul Mackerras 1814cf11afSPaul Mackerras #include <linux/errno.h> 1914cf11afSPaul Mackerras #include <linux/sched.h> 2014cf11afSPaul Mackerras #include <linux/kernel.h> 2114cf11afSPaul Mackerras #include <linux/mm.h> 2214cf11afSPaul Mackerras #include <linux/stddef.h> 2314cf11afSPaul Mackerras #include <linux/unistd.h> 248dad3f92SPaul Mackerras #include <linux/ptrace.h> 2514cf11afSPaul Mackerras #include <linux/user.h> 2614cf11afSPaul Mackerras #include <linux/interrupt.h> 2714cf11afSPaul Mackerras #include <linux/init.h> 2814cf11afSPaul Mackerras #include <linux/module.h> 298dad3f92SPaul Mackerras #include <linux/prctl.h> 3014cf11afSPaul Mackerras #include <linux/delay.h> 3114cf11afSPaul Mackerras #include <linux/kprobes.h> 32cc532915SMichael Ellerman #include <linux/kexec.h> 335474c120SMichael Hanselmann #include <linux/backlight.h> 3473c9ceabSJeremy Fitzhardinge #include <linux/bug.h> 351eeb66a1SChristoph Hellwig #include <linux/kdebug.h> 3680947e7cSGeert Uytterhoeven #include <linux/debugfs.h> 3714cf11afSPaul Mackerras 3880947e7cSGeert Uytterhoeven #include <asm/emulated_ops.h> 3914cf11afSPaul Mackerras #include <asm/pgtable.h> 4014cf11afSPaul Mackerras #include <asm/uaccess.h> 4114cf11afSPaul Mackerras #include <asm/system.h> 4214cf11afSPaul Mackerras #include <asm/io.h> 4386417780SPaul Mackerras #include <asm/machdep.h> 4486417780SPaul Mackerras #include <asm/rtas.h> 45f7f6f4feSDavid Gibson #include <asm/pmc.h> 46dc1c1ca3SStephen Rothwell #ifdef CONFIG_PPC32 4714cf11afSPaul Mackerras #include <asm/reg.h> 4886417780SPaul Mackerras #endif 4914cf11afSPaul Mackerras #ifdef CONFIG_PMAC_BACKLIGHT 5014cf11afSPaul Mackerras #include <asm/backlight.h> 5114cf11afSPaul Mackerras #endif 52dc1c1ca3SStephen Rothwell #ifdef CONFIG_PPC64 5386417780SPaul Mackerras #include <asm/firmware.h> 54dc1c1ca3SStephen Rothwell #include <asm/processor.h> 55dc1c1ca3SStephen Rothwell #endif 56c0ce7d08SDavid Wilder #include <asm/kexec.h> 5716c57b36SKumar Gala #include <asm/ppc-opcode.h> 58620165f9SKumar Gala #ifdef CONFIG_FSL_BOOKE 59620165f9SKumar Gala #include <asm/dbell.h> 60620165f9SKumar Gala #endif 61dc1c1ca3SStephen Rothwell 627dbb922cSOlof Johansson #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 635be3492fSAnton Blanchard int (*__debugger)(struct pt_regs *regs) __read_mostly; 645be3492fSAnton Blanchard int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly; 655be3492fSAnton Blanchard int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly; 665be3492fSAnton Blanchard int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly; 675be3492fSAnton Blanchard int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly; 685be3492fSAnton Blanchard int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly; 695be3492fSAnton Blanchard int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly; 7014cf11afSPaul Mackerras 7114cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger); 7214cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_ipi); 7314cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_bpt); 7414cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_sstep); 7514cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_iabr_match); 7614cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_dabr_match); 7714cf11afSPaul Mackerras EXPORT_SYMBOL(__debugger_fault_handler); 7814cf11afSPaul Mackerras #endif 7914cf11afSPaul Mackerras 8014cf11afSPaul Mackerras /* 8114cf11afSPaul Mackerras * Trap & Exception support 8214cf11afSPaul Mackerras */ 8314cf11afSPaul Mackerras 846031d9d9Santon@samba.org #ifdef CONFIG_PMAC_BACKLIGHT 856031d9d9Santon@samba.org static void pmac_backlight_unblank(void) 866031d9d9Santon@samba.org { 876031d9d9Santon@samba.org mutex_lock(&pmac_backlight_mutex); 886031d9d9Santon@samba.org if (pmac_backlight) { 896031d9d9Santon@samba.org struct backlight_properties *props; 906031d9d9Santon@samba.org 916031d9d9Santon@samba.org props = &pmac_backlight->props; 926031d9d9Santon@samba.org props->brightness = props->max_brightness; 936031d9d9Santon@samba.org props->power = FB_BLANK_UNBLANK; 946031d9d9Santon@samba.org backlight_update_status(pmac_backlight); 956031d9d9Santon@samba.org } 966031d9d9Santon@samba.org mutex_unlock(&pmac_backlight_mutex); 976031d9d9Santon@samba.org } 986031d9d9Santon@samba.org #else 996031d9d9Santon@samba.org static inline void pmac_backlight_unblank(void) { } 1006031d9d9Santon@samba.org #endif 1016031d9d9Santon@samba.org 10214cf11afSPaul Mackerras int die(const char *str, struct pt_regs *regs, long err) 10314cf11afSPaul Mackerras { 10434c2a14fSanton@samba.org static struct { 105b8f87782SThomas Gleixner raw_spinlock_t lock; 10634c2a14fSanton@samba.org u32 lock_owner; 10734c2a14fSanton@samba.org int lock_owner_depth; 10834c2a14fSanton@samba.org } die = { 109b8f87782SThomas Gleixner .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock), 11034c2a14fSanton@samba.org .lock_owner = -1, 11134c2a14fSanton@samba.org .lock_owner_depth = 0 11234c2a14fSanton@samba.org }; 113c0ce7d08SDavid Wilder static int die_counter; 11434c2a14fSanton@samba.org unsigned long flags; 11514cf11afSPaul Mackerras 11614cf11afSPaul Mackerras if (debugger(regs)) 11714cf11afSPaul Mackerras return 1; 11814cf11afSPaul Mackerras 119293e4688Santon@samba.org oops_enter(); 120293e4688Santon@samba.org 12134c2a14fSanton@samba.org if (die.lock_owner != raw_smp_processor_id()) { 12214cf11afSPaul Mackerras console_verbose(); 123b8f87782SThomas Gleixner raw_spin_lock_irqsave(&die.lock, flags); 12434c2a14fSanton@samba.org die.lock_owner = smp_processor_id(); 12534c2a14fSanton@samba.org die.lock_owner_depth = 0; 12614cf11afSPaul Mackerras bust_spinlocks(1); 1276031d9d9Santon@samba.org if (machine_is(powermac)) 1286031d9d9Santon@samba.org pmac_backlight_unblank(); 12934c2a14fSanton@samba.org } else { 13034c2a14fSanton@samba.org local_save_flags(flags); 13134c2a14fSanton@samba.org } 1325474c120SMichael Hanselmann 13334c2a14fSanton@samba.org if (++die.lock_owner_depth < 3) { 13414cf11afSPaul Mackerras printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); 13514cf11afSPaul Mackerras #ifdef CONFIG_PREEMPT 13614cf11afSPaul Mackerras printk("PREEMPT "); 13714cf11afSPaul Mackerras #endif 13814cf11afSPaul Mackerras #ifdef CONFIG_SMP 13914cf11afSPaul Mackerras printk("SMP NR_CPUS=%d ", NR_CPUS); 14014cf11afSPaul Mackerras #endif 14114cf11afSPaul Mackerras #ifdef CONFIG_DEBUG_PAGEALLOC 14214cf11afSPaul Mackerras printk("DEBUG_PAGEALLOC "); 14314cf11afSPaul Mackerras #endif 14414cf11afSPaul Mackerras #ifdef CONFIG_NUMA 14514cf11afSPaul Mackerras printk("NUMA "); 14614cf11afSPaul Mackerras #endif 147ae7f4463Santon@samba.org printk("%s\n", ppc_md.name ? ppc_md.name : ""); 148e8222502SBenjamin Herrenschmidt 14966fcb105SAnton Blanchard sysfs_printk_last_file(); 15066fcb105SAnton Blanchard if (notify_die(DIE_OOPS, str, regs, err, 255, 15166fcb105SAnton Blanchard SIGSEGV) == NOTIFY_STOP) 15266fcb105SAnton Blanchard return 1; 15366fcb105SAnton Blanchard 15414cf11afSPaul Mackerras print_modules(); 15514cf11afSPaul Mackerras show_regs(regs); 15634c2a14fSanton@samba.org } else { 15734c2a14fSanton@samba.org printk("Recursive die() failure, output suppressed\n"); 15834c2a14fSanton@samba.org } 15934c2a14fSanton@samba.org 16014cf11afSPaul Mackerras bust_spinlocks(0); 16134c2a14fSanton@samba.org die.lock_owner = -1; 162bcdcd8e7SPavel Emelianov add_taint(TAINT_DIE); 163b8f87782SThomas Gleixner raw_spin_unlock_irqrestore(&die.lock, flags); 164cc532915SMichael Ellerman 165c0ce7d08SDavid Wilder if (kexec_should_crash(current) || 166c0ce7d08SDavid Wilder kexec_sr_activated(smp_processor_id())) 167cc532915SMichael Ellerman crash_kexec(regs); 168c0ce7d08SDavid Wilder crash_kexec_secondary(regs); 16914cf11afSPaul Mackerras 17014cf11afSPaul Mackerras if (in_interrupt()) 17114cf11afSPaul Mackerras panic("Fatal exception in interrupt"); 17214cf11afSPaul Mackerras 173cea6a4baSHorms if (panic_on_oops) 174012c437dSHorms panic("Fatal exception"); 175cea6a4baSHorms 176293e4688Santon@samba.org oops_exit(); 17714cf11afSPaul Mackerras do_exit(err); 17814cf11afSPaul Mackerras 17914cf11afSPaul Mackerras return 0; 18014cf11afSPaul Mackerras } 18114cf11afSPaul Mackerras 18225baa35bSOleg Nesterov void user_single_step_siginfo(struct task_struct *tsk, 18325baa35bSOleg Nesterov struct pt_regs *regs, siginfo_t *info) 18425baa35bSOleg Nesterov { 18525baa35bSOleg Nesterov memset(info, 0, sizeof(*info)); 18625baa35bSOleg Nesterov info->si_signo = SIGTRAP; 18725baa35bSOleg Nesterov info->si_code = TRAP_TRACE; 18825baa35bSOleg Nesterov info->si_addr = (void __user *)regs->nip; 18925baa35bSOleg Nesterov } 19025baa35bSOleg Nesterov 19114cf11afSPaul Mackerras void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) 19214cf11afSPaul Mackerras { 19314cf11afSPaul Mackerras siginfo_t info; 194d0c3d534SOlof Johansson const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \ 195d0c3d534SOlof Johansson "at %08lx nip %08lx lr %08lx code %x\n"; 196d0c3d534SOlof Johansson const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \ 197d0c3d534SOlof Johansson "at %016lx nip %016lx lr %016lx code %x\n"; 19814cf11afSPaul Mackerras 19914cf11afSPaul Mackerras if (!user_mode(regs)) { 20014cf11afSPaul Mackerras if (die("Exception in kernel mode", regs, signr)) 20114cf11afSPaul Mackerras return; 202d0c3d534SOlof Johansson } else if (show_unhandled_signals && 203d0c3d534SOlof Johansson unhandled_signal(current, signr) && 204d0c3d534SOlof Johansson printk_ratelimit()) { 205d0c3d534SOlof Johansson printk(regs->msr & MSR_SF ? fmt64 : fmt32, 206d0c3d534SOlof Johansson current->comm, current->pid, signr, 207d0c3d534SOlof Johansson addr, regs->nip, regs->link, code); 20814cf11afSPaul Mackerras } 20914cf11afSPaul Mackerras 21014cf11afSPaul Mackerras memset(&info, 0, sizeof(info)); 21114cf11afSPaul Mackerras info.si_signo = signr; 21214cf11afSPaul Mackerras info.si_code = code; 21314cf11afSPaul Mackerras info.si_addr = (void __user *) addr; 21414cf11afSPaul Mackerras force_sig_info(signr, &info, current); 21514cf11afSPaul Mackerras } 21614cf11afSPaul Mackerras 21714cf11afSPaul Mackerras #ifdef CONFIG_PPC64 21814cf11afSPaul Mackerras void system_reset_exception(struct pt_regs *regs) 21914cf11afSPaul Mackerras { 22014cf11afSPaul Mackerras /* See if any machine dependent calls */ 221c902be71SArnd Bergmann if (ppc_md.system_reset_exception) { 222c902be71SArnd Bergmann if (ppc_md.system_reset_exception(regs)) 223c902be71SArnd Bergmann return; 224c902be71SArnd Bergmann } 22514cf11afSPaul Mackerras 226c0ce7d08SDavid Wilder #ifdef CONFIG_KEXEC 227c0ce7d08SDavid Wilder cpu_set(smp_processor_id(), cpus_in_sr); 228c0ce7d08SDavid Wilder #endif 229c0ce7d08SDavid Wilder 2308dad3f92SPaul Mackerras die("System Reset", regs, SIGABRT); 23114cf11afSPaul Mackerras 232eac8392fSDavid Wilder /* 233eac8392fSDavid Wilder * Some CPUs when released from the debugger will execute this path. 234eac8392fSDavid Wilder * These CPUs entered the debugger via a soft-reset. If the CPU was 235eac8392fSDavid Wilder * hung before entering the debugger it will return to the hung 236eac8392fSDavid Wilder * state when exiting this function. This causes a problem in 237eac8392fSDavid Wilder * kdump since the hung CPU(s) will not respond to the IPI sent 238eac8392fSDavid Wilder * from kdump. To prevent the problem we call crash_kexec_secondary() 239eac8392fSDavid Wilder * here. If a kdump had not been initiated or we exit the debugger 240eac8392fSDavid Wilder * with the "exit and recover" command (x) crash_kexec_secondary() 241eac8392fSDavid Wilder * will return after 5ms and the CPU returns to its previous state. 242eac8392fSDavid Wilder */ 243eac8392fSDavid Wilder crash_kexec_secondary(regs); 244eac8392fSDavid Wilder 24514cf11afSPaul Mackerras /* Must die if the interrupt is not recoverable */ 24614cf11afSPaul Mackerras if (!(regs->msr & MSR_RI)) 24714cf11afSPaul Mackerras panic("Unrecoverable System Reset"); 24814cf11afSPaul Mackerras 24914cf11afSPaul Mackerras /* What should we do here? We could issue a shutdown or hard reset. */ 25014cf11afSPaul Mackerras } 25114cf11afSPaul Mackerras #endif 25214cf11afSPaul Mackerras 25314cf11afSPaul Mackerras /* 25414cf11afSPaul Mackerras * I/O accesses can cause machine checks on powermacs. 25514cf11afSPaul Mackerras * Check if the NIP corresponds to the address of a sync 25614cf11afSPaul Mackerras * instruction for which there is an entry in the exception 25714cf11afSPaul Mackerras * table. 25814cf11afSPaul Mackerras * Note that the 601 only takes a machine check on TEA 25914cf11afSPaul Mackerras * (transfer error ack) signal assertion, and does not 26014cf11afSPaul Mackerras * set any of the top 16 bits of SRR1. 26114cf11afSPaul Mackerras * -- paulus. 26214cf11afSPaul Mackerras */ 26314cf11afSPaul Mackerras static inline int check_io_access(struct pt_regs *regs) 26414cf11afSPaul Mackerras { 26568a64357SBenjamin Herrenschmidt #ifdef CONFIG_PPC32 26614cf11afSPaul Mackerras unsigned long msr = regs->msr; 26714cf11afSPaul Mackerras const struct exception_table_entry *entry; 26814cf11afSPaul Mackerras unsigned int *nip = (unsigned int *)regs->nip; 26914cf11afSPaul Mackerras 27014cf11afSPaul Mackerras if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) 27114cf11afSPaul Mackerras && (entry = search_exception_tables(regs->nip)) != NULL) { 27214cf11afSPaul Mackerras /* 27314cf11afSPaul Mackerras * Check that it's a sync instruction, or somewhere 27414cf11afSPaul Mackerras * in the twi; isync; nop sequence that inb/inw/inl uses. 27514cf11afSPaul Mackerras * As the address is in the exception table 27614cf11afSPaul Mackerras * we should be able to read the instr there. 27714cf11afSPaul Mackerras * For the debug message, we look at the preceding 27814cf11afSPaul Mackerras * load or store. 27914cf11afSPaul Mackerras */ 28014cf11afSPaul Mackerras if (*nip == 0x60000000) /* nop */ 28114cf11afSPaul Mackerras nip -= 2; 28214cf11afSPaul Mackerras else if (*nip == 0x4c00012c) /* isync */ 28314cf11afSPaul Mackerras --nip; 28414cf11afSPaul Mackerras if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 28514cf11afSPaul Mackerras /* sync or twi */ 28614cf11afSPaul Mackerras unsigned int rb; 28714cf11afSPaul Mackerras 28814cf11afSPaul Mackerras --nip; 28914cf11afSPaul Mackerras rb = (*nip >> 11) & 0x1f; 29014cf11afSPaul Mackerras printk(KERN_DEBUG "%s bad port %lx at %p\n", 29114cf11afSPaul Mackerras (*nip & 0x100)? "OUT to": "IN from", 29214cf11afSPaul Mackerras regs->gpr[rb] - _IO_BASE, nip); 29314cf11afSPaul Mackerras regs->msr |= MSR_RI; 29414cf11afSPaul Mackerras regs->nip = entry->fixup; 29514cf11afSPaul Mackerras return 1; 29614cf11afSPaul Mackerras } 29714cf11afSPaul Mackerras } 29868a64357SBenjamin Herrenschmidt #endif /* CONFIG_PPC32 */ 29914cf11afSPaul Mackerras return 0; 30014cf11afSPaul Mackerras } 30114cf11afSPaul Mackerras 302172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 30314cf11afSPaul Mackerras /* On 4xx, the reason for the machine check or program exception 30414cf11afSPaul Mackerras is in the ESR. */ 30514cf11afSPaul Mackerras #define get_reason(regs) ((regs)->dsisr) 30614cf11afSPaul Mackerras #ifndef CONFIG_FSL_BOOKE 30714cf11afSPaul Mackerras #define get_mc_reason(regs) ((regs)->dsisr) 30814cf11afSPaul Mackerras #else 309*fe04b112SScott Wood #define get_mc_reason(regs) (mfspr(SPRN_MCSR)) 31014cf11afSPaul Mackerras #endif 31114cf11afSPaul Mackerras #define REASON_FP ESR_FP 31214cf11afSPaul Mackerras #define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 31314cf11afSPaul Mackerras #define REASON_PRIVILEGED ESR_PPR 31414cf11afSPaul Mackerras #define REASON_TRAP ESR_PTR 31514cf11afSPaul Mackerras 31614cf11afSPaul Mackerras /* single-step stuff */ 31714cf11afSPaul Mackerras #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 31814cf11afSPaul Mackerras #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 31914cf11afSPaul Mackerras 32014cf11afSPaul Mackerras #else 32114cf11afSPaul Mackerras /* On non-4xx, the reason for the machine check or program 32214cf11afSPaul Mackerras exception is in the MSR. */ 32314cf11afSPaul Mackerras #define get_reason(regs) ((regs)->msr) 32414cf11afSPaul Mackerras #define get_mc_reason(regs) ((regs)->msr) 32514cf11afSPaul Mackerras #define REASON_FP 0x100000 32614cf11afSPaul Mackerras #define REASON_ILLEGAL 0x80000 32714cf11afSPaul Mackerras #define REASON_PRIVILEGED 0x40000 32814cf11afSPaul Mackerras #define REASON_TRAP 0x20000 32914cf11afSPaul Mackerras 33014cf11afSPaul Mackerras #define single_stepping(regs) ((regs)->msr & MSR_SE) 33114cf11afSPaul Mackerras #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) 33214cf11afSPaul Mackerras #endif 33314cf11afSPaul Mackerras 33447c0bd1aSBenjamin Herrenschmidt #if defined(CONFIG_4xx) 33547c0bd1aSBenjamin Herrenschmidt int machine_check_4xx(struct pt_regs *regs) 33614cf11afSPaul Mackerras { 3371a6a4ffeSKumar Gala unsigned long reason = get_mc_reason(regs); 33814cf11afSPaul Mackerras 33914cf11afSPaul Mackerras if (reason & ESR_IMCP) { 34014cf11afSPaul Mackerras printk("Instruction"); 34114cf11afSPaul Mackerras mtspr(SPRN_ESR, reason & ~ESR_IMCP); 34214cf11afSPaul Mackerras } else 34314cf11afSPaul Mackerras printk("Data"); 34414cf11afSPaul Mackerras printk(" machine check in kernel mode.\n"); 34547c0bd1aSBenjamin Herrenschmidt 34647c0bd1aSBenjamin Herrenschmidt return 0; 34747c0bd1aSBenjamin Herrenschmidt } 34847c0bd1aSBenjamin Herrenschmidt 34947c0bd1aSBenjamin Herrenschmidt int machine_check_440A(struct pt_regs *regs) 35047c0bd1aSBenjamin Herrenschmidt { 35147c0bd1aSBenjamin Herrenschmidt unsigned long reason = get_mc_reason(regs); 35247c0bd1aSBenjamin Herrenschmidt 35314cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 35414cf11afSPaul Mackerras if (reason & ESR_IMCP){ 35514cf11afSPaul Mackerras printk("Instruction Synchronous Machine Check exception\n"); 35614cf11afSPaul Mackerras mtspr(SPRN_ESR, reason & ~ESR_IMCP); 35714cf11afSPaul Mackerras } 35814cf11afSPaul Mackerras else { 35914cf11afSPaul Mackerras u32 mcsr = mfspr(SPRN_MCSR); 36014cf11afSPaul Mackerras if (mcsr & MCSR_IB) 36114cf11afSPaul Mackerras printk("Instruction Read PLB Error\n"); 36214cf11afSPaul Mackerras if (mcsr & MCSR_DRB) 36314cf11afSPaul Mackerras printk("Data Read PLB Error\n"); 36414cf11afSPaul Mackerras if (mcsr & MCSR_DWB) 36514cf11afSPaul Mackerras printk("Data Write PLB Error\n"); 36614cf11afSPaul Mackerras if (mcsr & MCSR_TLBP) 36714cf11afSPaul Mackerras printk("TLB Parity Error\n"); 36814cf11afSPaul Mackerras if (mcsr & MCSR_ICP){ 36914cf11afSPaul Mackerras flush_instruction_cache(); 37014cf11afSPaul Mackerras printk("I-Cache Parity Error\n"); 37114cf11afSPaul Mackerras } 37214cf11afSPaul Mackerras if (mcsr & MCSR_DCSP) 37314cf11afSPaul Mackerras printk("D-Cache Search Parity Error\n"); 37414cf11afSPaul Mackerras if (mcsr & MCSR_DCFP) 37514cf11afSPaul Mackerras printk("D-Cache Flush Parity Error\n"); 37614cf11afSPaul Mackerras if (mcsr & MCSR_IMPE) 37714cf11afSPaul Mackerras printk("Machine Check exception is imprecise\n"); 37814cf11afSPaul Mackerras 37914cf11afSPaul Mackerras /* Clear MCSR */ 38014cf11afSPaul Mackerras mtspr(SPRN_MCSR, mcsr); 38114cf11afSPaul Mackerras } 38247c0bd1aSBenjamin Herrenschmidt return 0; 38347c0bd1aSBenjamin Herrenschmidt } 384fc5e7097SDave Kleikamp 385fc5e7097SDave Kleikamp int machine_check_47x(struct pt_regs *regs) 386fc5e7097SDave Kleikamp { 387fc5e7097SDave Kleikamp unsigned long reason = get_mc_reason(regs); 388fc5e7097SDave Kleikamp u32 mcsr; 389fc5e7097SDave Kleikamp 390fc5e7097SDave Kleikamp printk(KERN_ERR "Machine check in kernel mode.\n"); 391fc5e7097SDave Kleikamp if (reason & ESR_IMCP) { 392fc5e7097SDave Kleikamp printk(KERN_ERR 393fc5e7097SDave Kleikamp "Instruction Synchronous Machine Check exception\n"); 394fc5e7097SDave Kleikamp mtspr(SPRN_ESR, reason & ~ESR_IMCP); 395fc5e7097SDave Kleikamp return 0; 396fc5e7097SDave Kleikamp } 397fc5e7097SDave Kleikamp mcsr = mfspr(SPRN_MCSR); 398fc5e7097SDave Kleikamp if (mcsr & MCSR_IB) 399fc5e7097SDave Kleikamp printk(KERN_ERR "Instruction Read PLB Error\n"); 400fc5e7097SDave Kleikamp if (mcsr & MCSR_DRB) 401fc5e7097SDave Kleikamp printk(KERN_ERR "Data Read PLB Error\n"); 402fc5e7097SDave Kleikamp if (mcsr & MCSR_DWB) 403fc5e7097SDave Kleikamp printk(KERN_ERR "Data Write PLB Error\n"); 404fc5e7097SDave Kleikamp if (mcsr & MCSR_TLBP) 405fc5e7097SDave Kleikamp printk(KERN_ERR "TLB Parity Error\n"); 406fc5e7097SDave Kleikamp if (mcsr & MCSR_ICP) { 407fc5e7097SDave Kleikamp flush_instruction_cache(); 408fc5e7097SDave Kleikamp printk(KERN_ERR "I-Cache Parity Error\n"); 409fc5e7097SDave Kleikamp } 410fc5e7097SDave Kleikamp if (mcsr & MCSR_DCSP) 411fc5e7097SDave Kleikamp printk(KERN_ERR "D-Cache Search Parity Error\n"); 412fc5e7097SDave Kleikamp if (mcsr & PPC47x_MCSR_GPR) 413fc5e7097SDave Kleikamp printk(KERN_ERR "GPR Parity Error\n"); 414fc5e7097SDave Kleikamp if (mcsr & PPC47x_MCSR_FPR) 415fc5e7097SDave Kleikamp printk(KERN_ERR "FPR Parity Error\n"); 416fc5e7097SDave Kleikamp if (mcsr & PPC47x_MCSR_IPR) 417fc5e7097SDave Kleikamp printk(KERN_ERR "Machine Check exception is imprecise\n"); 418fc5e7097SDave Kleikamp 419fc5e7097SDave Kleikamp /* Clear MCSR */ 420fc5e7097SDave Kleikamp mtspr(SPRN_MCSR, mcsr); 421fc5e7097SDave Kleikamp 422fc5e7097SDave Kleikamp return 0; 423fc5e7097SDave Kleikamp } 42414cf11afSPaul Mackerras #elif defined(CONFIG_E500) 425*fe04b112SScott Wood int machine_check_e500mc(struct pt_regs *regs) 426*fe04b112SScott Wood { 427*fe04b112SScott Wood unsigned long mcsr = mfspr(SPRN_MCSR); 428*fe04b112SScott Wood unsigned long reason = mcsr; 429*fe04b112SScott Wood int recoverable = 1; 430*fe04b112SScott Wood 431*fe04b112SScott Wood printk("Machine check in kernel mode.\n"); 432*fe04b112SScott Wood printk("Caused by (from MCSR=%lx): ", reason); 433*fe04b112SScott Wood 434*fe04b112SScott Wood if (reason & MCSR_MCP) 435*fe04b112SScott Wood printk("Machine Check Signal\n"); 436*fe04b112SScott Wood 437*fe04b112SScott Wood if (reason & MCSR_ICPERR) { 438*fe04b112SScott Wood printk("Instruction Cache Parity Error\n"); 439*fe04b112SScott Wood 440*fe04b112SScott Wood /* 441*fe04b112SScott Wood * This is recoverable by invalidating the i-cache. 442*fe04b112SScott Wood */ 443*fe04b112SScott Wood mtspr(SPRN_L1CSR1, mfspr(SPRN_L1CSR1) | L1CSR1_ICFI); 444*fe04b112SScott Wood while (mfspr(SPRN_L1CSR1) & L1CSR1_ICFI) 445*fe04b112SScott Wood ; 446*fe04b112SScott Wood 447*fe04b112SScott Wood /* 448*fe04b112SScott Wood * This will generally be accompanied by an instruction 449*fe04b112SScott Wood * fetch error report -- only treat MCSR_IF as fatal 450*fe04b112SScott Wood * if it wasn't due to an L1 parity error. 451*fe04b112SScott Wood */ 452*fe04b112SScott Wood reason &= ~MCSR_IF; 453*fe04b112SScott Wood } 454*fe04b112SScott Wood 455*fe04b112SScott Wood if (reason & MCSR_DCPERR_MC) { 456*fe04b112SScott Wood printk("Data Cache Parity Error\n"); 457*fe04b112SScott Wood recoverable = 0; 458*fe04b112SScott Wood } 459*fe04b112SScott Wood 460*fe04b112SScott Wood if (reason & MCSR_L2MMU_MHIT) { 461*fe04b112SScott Wood printk("Hit on multiple TLB entries\n"); 462*fe04b112SScott Wood recoverable = 0; 463*fe04b112SScott Wood } 464*fe04b112SScott Wood 465*fe04b112SScott Wood if (reason & MCSR_NMI) 466*fe04b112SScott Wood printk("Non-maskable interrupt\n"); 467*fe04b112SScott Wood 468*fe04b112SScott Wood if (reason & MCSR_IF) { 469*fe04b112SScott Wood printk("Instruction Fetch Error Report\n"); 470*fe04b112SScott Wood recoverable = 0; 471*fe04b112SScott Wood } 472*fe04b112SScott Wood 473*fe04b112SScott Wood if (reason & MCSR_LD) { 474*fe04b112SScott Wood printk("Load Error Report\n"); 475*fe04b112SScott Wood recoverable = 0; 476*fe04b112SScott Wood } 477*fe04b112SScott Wood 478*fe04b112SScott Wood if (reason & MCSR_ST) { 479*fe04b112SScott Wood printk("Store Error Report\n"); 480*fe04b112SScott Wood recoverable = 0; 481*fe04b112SScott Wood } 482*fe04b112SScott Wood 483*fe04b112SScott Wood if (reason & MCSR_LDG) { 484*fe04b112SScott Wood printk("Guarded Load Error Report\n"); 485*fe04b112SScott Wood recoverable = 0; 486*fe04b112SScott Wood } 487*fe04b112SScott Wood 488*fe04b112SScott Wood if (reason & MCSR_TLBSYNC) 489*fe04b112SScott Wood printk("Simultaneous tlbsync operations\n"); 490*fe04b112SScott Wood 491*fe04b112SScott Wood if (reason & MCSR_BSL2_ERR) { 492*fe04b112SScott Wood printk("Level 2 Cache Error\n"); 493*fe04b112SScott Wood recoverable = 0; 494*fe04b112SScott Wood } 495*fe04b112SScott Wood 496*fe04b112SScott Wood if (reason & MCSR_MAV) { 497*fe04b112SScott Wood u64 addr; 498*fe04b112SScott Wood 499*fe04b112SScott Wood addr = mfspr(SPRN_MCAR); 500*fe04b112SScott Wood addr |= (u64)mfspr(SPRN_MCARU) << 32; 501*fe04b112SScott Wood 502*fe04b112SScott Wood printk("Machine Check %s Address: %#llx\n", 503*fe04b112SScott Wood reason & MCSR_MEA ? "Effective" : "Physical", addr); 504*fe04b112SScott Wood } 505*fe04b112SScott Wood 506*fe04b112SScott Wood mtspr(SPRN_MCSR, mcsr); 507*fe04b112SScott Wood return mfspr(SPRN_MCSR) == 0 && recoverable; 508*fe04b112SScott Wood } 509*fe04b112SScott Wood 51047c0bd1aSBenjamin Herrenschmidt int machine_check_e500(struct pt_regs *regs) 51147c0bd1aSBenjamin Herrenschmidt { 51247c0bd1aSBenjamin Herrenschmidt unsigned long reason = get_mc_reason(regs); 51347c0bd1aSBenjamin Herrenschmidt 51414cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 51514cf11afSPaul Mackerras printk("Caused by (from MCSR=%lx): ", reason); 51614cf11afSPaul Mackerras 51714cf11afSPaul Mackerras if (reason & MCSR_MCP) 51814cf11afSPaul Mackerras printk("Machine Check Signal\n"); 51914cf11afSPaul Mackerras if (reason & MCSR_ICPERR) 52014cf11afSPaul Mackerras printk("Instruction Cache Parity Error\n"); 52114cf11afSPaul Mackerras if (reason & MCSR_DCP_PERR) 52214cf11afSPaul Mackerras printk("Data Cache Push Parity Error\n"); 52314cf11afSPaul Mackerras if (reason & MCSR_DCPERR) 52414cf11afSPaul Mackerras printk("Data Cache Parity Error\n"); 52514cf11afSPaul Mackerras if (reason & MCSR_BUS_IAERR) 52614cf11afSPaul Mackerras printk("Bus - Instruction Address Error\n"); 52714cf11afSPaul Mackerras if (reason & MCSR_BUS_RAERR) 52814cf11afSPaul Mackerras printk("Bus - Read Address Error\n"); 52914cf11afSPaul Mackerras if (reason & MCSR_BUS_WAERR) 53014cf11afSPaul Mackerras printk("Bus - Write Address Error\n"); 53114cf11afSPaul Mackerras if (reason & MCSR_BUS_IBERR) 53214cf11afSPaul Mackerras printk("Bus - Instruction Data Error\n"); 53314cf11afSPaul Mackerras if (reason & MCSR_BUS_RBERR) 53414cf11afSPaul Mackerras printk("Bus - Read Data Bus Error\n"); 53514cf11afSPaul Mackerras if (reason & MCSR_BUS_WBERR) 53614cf11afSPaul Mackerras printk("Bus - Read Data Bus Error\n"); 53714cf11afSPaul Mackerras if (reason & MCSR_BUS_IPERR) 53814cf11afSPaul Mackerras printk("Bus - Instruction Parity Error\n"); 53914cf11afSPaul Mackerras if (reason & MCSR_BUS_RPERR) 54014cf11afSPaul Mackerras printk("Bus - Read Parity Error\n"); 54147c0bd1aSBenjamin Herrenschmidt 54247c0bd1aSBenjamin Herrenschmidt return 0; 54347c0bd1aSBenjamin Herrenschmidt } 54414cf11afSPaul Mackerras #elif defined(CONFIG_E200) 54547c0bd1aSBenjamin Herrenschmidt int machine_check_e200(struct pt_regs *regs) 54647c0bd1aSBenjamin Herrenschmidt { 54747c0bd1aSBenjamin Herrenschmidt unsigned long reason = get_mc_reason(regs); 54847c0bd1aSBenjamin Herrenschmidt 54914cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 55014cf11afSPaul Mackerras printk("Caused by (from MCSR=%lx): ", reason); 55114cf11afSPaul Mackerras 55214cf11afSPaul Mackerras if (reason & MCSR_MCP) 55314cf11afSPaul Mackerras printk("Machine Check Signal\n"); 55414cf11afSPaul Mackerras if (reason & MCSR_CP_PERR) 55514cf11afSPaul Mackerras printk("Cache Push Parity Error\n"); 55614cf11afSPaul Mackerras if (reason & MCSR_CPERR) 55714cf11afSPaul Mackerras printk("Cache Parity Error\n"); 55814cf11afSPaul Mackerras if (reason & MCSR_EXCP_ERR) 55914cf11afSPaul Mackerras printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n"); 56014cf11afSPaul Mackerras if (reason & MCSR_BUS_IRERR) 56114cf11afSPaul Mackerras printk("Bus - Read Bus Error on instruction fetch\n"); 56214cf11afSPaul Mackerras if (reason & MCSR_BUS_DRERR) 56314cf11afSPaul Mackerras printk("Bus - Read Bus Error on data load\n"); 56414cf11afSPaul Mackerras if (reason & MCSR_BUS_WRERR) 56514cf11afSPaul Mackerras printk("Bus - Write Bus Error on buffered store or cache line push\n"); 56647c0bd1aSBenjamin Herrenschmidt 56747c0bd1aSBenjamin Herrenschmidt return 0; 56847c0bd1aSBenjamin Herrenschmidt } 56947c0bd1aSBenjamin Herrenschmidt #else 57047c0bd1aSBenjamin Herrenschmidt int machine_check_generic(struct pt_regs *regs) 57147c0bd1aSBenjamin Herrenschmidt { 57247c0bd1aSBenjamin Herrenschmidt unsigned long reason = get_mc_reason(regs); 57347c0bd1aSBenjamin Herrenschmidt 57414cf11afSPaul Mackerras printk("Machine check in kernel mode.\n"); 57514cf11afSPaul Mackerras printk("Caused by (from SRR1=%lx): ", reason); 57614cf11afSPaul Mackerras switch (reason & 0x601F0000) { 57714cf11afSPaul Mackerras case 0x80000: 57814cf11afSPaul Mackerras printk("Machine check signal\n"); 57914cf11afSPaul Mackerras break; 58014cf11afSPaul Mackerras case 0: /* for 601 */ 58114cf11afSPaul Mackerras case 0x40000: 58214cf11afSPaul Mackerras case 0x140000: /* 7450 MSS error and TEA */ 58314cf11afSPaul Mackerras printk("Transfer error ack signal\n"); 58414cf11afSPaul Mackerras break; 58514cf11afSPaul Mackerras case 0x20000: 58614cf11afSPaul Mackerras printk("Data parity error signal\n"); 58714cf11afSPaul Mackerras break; 58814cf11afSPaul Mackerras case 0x10000: 58914cf11afSPaul Mackerras printk("Address parity error signal\n"); 59014cf11afSPaul Mackerras break; 59114cf11afSPaul Mackerras case 0x20000000: 59214cf11afSPaul Mackerras printk("L1 Data Cache error\n"); 59314cf11afSPaul Mackerras break; 59414cf11afSPaul Mackerras case 0x40000000: 59514cf11afSPaul Mackerras printk("L1 Instruction Cache error\n"); 59614cf11afSPaul Mackerras break; 59714cf11afSPaul Mackerras case 0x00100000: 59814cf11afSPaul Mackerras printk("L2 data cache parity error\n"); 59914cf11afSPaul Mackerras break; 60014cf11afSPaul Mackerras default: 60114cf11afSPaul Mackerras printk("Unknown values in msr\n"); 60214cf11afSPaul Mackerras } 60375918a4bSOlof Johansson return 0; 60475918a4bSOlof Johansson } 60547c0bd1aSBenjamin Herrenschmidt #endif /* everything else */ 60675918a4bSOlof Johansson 60775918a4bSOlof Johansson void machine_check_exception(struct pt_regs *regs) 60875918a4bSOlof Johansson { 60975918a4bSOlof Johansson int recover = 0; 61075918a4bSOlof Johansson 61189713ed1SAnton Blanchard __get_cpu_var(irq_stat).mce_exceptions++; 61289713ed1SAnton Blanchard 61347c0bd1aSBenjamin Herrenschmidt /* See if any machine dependent calls. In theory, we would want 61447c0bd1aSBenjamin Herrenschmidt * to call the CPU first, and call the ppc_md. one if the CPU 61547c0bd1aSBenjamin Herrenschmidt * one returns a positive number. However there is existing code 61647c0bd1aSBenjamin Herrenschmidt * that assumes the board gets a first chance, so let's keep it 61747c0bd1aSBenjamin Herrenschmidt * that way for now and fix things later. --BenH. 61847c0bd1aSBenjamin Herrenschmidt */ 61975918a4bSOlof Johansson if (ppc_md.machine_check_exception) 62075918a4bSOlof Johansson recover = ppc_md.machine_check_exception(regs); 62147c0bd1aSBenjamin Herrenschmidt else if (cur_cpu_spec->machine_check) 62247c0bd1aSBenjamin Herrenschmidt recover = cur_cpu_spec->machine_check(regs); 62375918a4bSOlof Johansson 62447c0bd1aSBenjamin Herrenschmidt if (recover > 0) 62575918a4bSOlof Johansson return; 62675918a4bSOlof Johansson 62775918a4bSOlof Johansson if (user_mode(regs)) { 62875918a4bSOlof Johansson regs->msr |= MSR_RI; 62975918a4bSOlof Johansson _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 63075918a4bSOlof Johansson return; 63175918a4bSOlof Johansson } 63275918a4bSOlof Johansson 63375918a4bSOlof Johansson #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 63447c0bd1aSBenjamin Herrenschmidt /* the qspan pci read routines can cause machine checks -- Cort 63547c0bd1aSBenjamin Herrenschmidt * 63647c0bd1aSBenjamin Herrenschmidt * yuck !!! that totally needs to go away ! There are better ways 63747c0bd1aSBenjamin Herrenschmidt * to deal with that than having a wart in the mcheck handler. 63847c0bd1aSBenjamin Herrenschmidt * -- BenH 63947c0bd1aSBenjamin Herrenschmidt */ 64075918a4bSOlof Johansson bad_page_fault(regs, regs->dar, SIGBUS); 64175918a4bSOlof Johansson return; 64275918a4bSOlof Johansson #endif 64375918a4bSOlof Johansson 64475918a4bSOlof Johansson if (debugger_fault_handler(regs)) { 64575918a4bSOlof Johansson regs->msr |= MSR_RI; 64675918a4bSOlof Johansson return; 64775918a4bSOlof Johansson } 64875918a4bSOlof Johansson 64975918a4bSOlof Johansson if (check_io_access(regs)) 65075918a4bSOlof Johansson return; 65175918a4bSOlof Johansson 65214cf11afSPaul Mackerras if (debugger_fault_handler(regs)) 65314cf11afSPaul Mackerras return; 6548dad3f92SPaul Mackerras die("Machine check", regs, SIGBUS); 65514cf11afSPaul Mackerras 65614cf11afSPaul Mackerras /* Must die if the interrupt is not recoverable */ 65714cf11afSPaul Mackerras if (!(regs->msr & MSR_RI)) 65814cf11afSPaul Mackerras panic("Unrecoverable Machine check"); 65914cf11afSPaul Mackerras } 66014cf11afSPaul Mackerras 66114cf11afSPaul Mackerras void SMIException(struct pt_regs *regs) 66214cf11afSPaul Mackerras { 66314cf11afSPaul Mackerras die("System Management Interrupt", regs, SIGABRT); 66414cf11afSPaul Mackerras } 66514cf11afSPaul Mackerras 666dc1c1ca3SStephen Rothwell void unknown_exception(struct pt_regs *regs) 66714cf11afSPaul Mackerras { 66814cf11afSPaul Mackerras printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 66914cf11afSPaul Mackerras regs->nip, regs->msr, regs->trap); 67014cf11afSPaul Mackerras 67114cf11afSPaul Mackerras _exception(SIGTRAP, regs, 0, 0); 67214cf11afSPaul Mackerras } 67314cf11afSPaul Mackerras 674dc1c1ca3SStephen Rothwell void instruction_breakpoint_exception(struct pt_regs *regs) 67514cf11afSPaul Mackerras { 67614cf11afSPaul Mackerras if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5, 67714cf11afSPaul Mackerras 5, SIGTRAP) == NOTIFY_STOP) 67814cf11afSPaul Mackerras return; 67914cf11afSPaul Mackerras if (debugger_iabr_match(regs)) 68014cf11afSPaul Mackerras return; 68114cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 68214cf11afSPaul Mackerras } 68314cf11afSPaul Mackerras 68414cf11afSPaul Mackerras void RunModeException(struct pt_regs *regs) 68514cf11afSPaul Mackerras { 68614cf11afSPaul Mackerras _exception(SIGTRAP, regs, 0, 0); 68714cf11afSPaul Mackerras } 68814cf11afSPaul Mackerras 6898dad3f92SPaul Mackerras void __kprobes single_step_exception(struct pt_regs *regs) 69014cf11afSPaul Mackerras { 69114cf11afSPaul Mackerras regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 69214cf11afSPaul Mackerras 69314cf11afSPaul Mackerras if (notify_die(DIE_SSTEP, "single_step", regs, 5, 69414cf11afSPaul Mackerras 5, SIGTRAP) == NOTIFY_STOP) 69514cf11afSPaul Mackerras return; 69614cf11afSPaul Mackerras if (debugger_sstep(regs)) 69714cf11afSPaul Mackerras return; 69814cf11afSPaul Mackerras 69914cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 70014cf11afSPaul Mackerras } 70114cf11afSPaul Mackerras 70214cf11afSPaul Mackerras /* 70314cf11afSPaul Mackerras * After we have successfully emulated an instruction, we have to 70414cf11afSPaul Mackerras * check if the instruction was being single-stepped, and if so, 70514cf11afSPaul Mackerras * pretend we got a single-step exception. This was pointed out 70614cf11afSPaul Mackerras * by Kumar Gala. -- paulus 70714cf11afSPaul Mackerras */ 7088dad3f92SPaul Mackerras static void emulate_single_step(struct pt_regs *regs) 70914cf11afSPaul Mackerras { 71014cf11afSPaul Mackerras if (single_stepping(regs)) { 71114cf11afSPaul Mackerras clear_single_step(regs); 71214cf11afSPaul Mackerras _exception(SIGTRAP, regs, TRAP_TRACE, 0); 71314cf11afSPaul Mackerras } 71414cf11afSPaul Mackerras } 71514cf11afSPaul Mackerras 7165fad293bSKumar Gala static inline int __parse_fpscr(unsigned long fpscr) 717dc1c1ca3SStephen Rothwell { 7185fad293bSKumar Gala int ret = 0; 719dc1c1ca3SStephen Rothwell 720dc1c1ca3SStephen Rothwell /* Invalid operation */ 721dc1c1ca3SStephen Rothwell if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) 7225fad293bSKumar Gala ret = FPE_FLTINV; 723dc1c1ca3SStephen Rothwell 724dc1c1ca3SStephen Rothwell /* Overflow */ 725dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX)) 7265fad293bSKumar Gala ret = FPE_FLTOVF; 727dc1c1ca3SStephen Rothwell 728dc1c1ca3SStephen Rothwell /* Underflow */ 729dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX)) 7305fad293bSKumar Gala ret = FPE_FLTUND; 731dc1c1ca3SStephen Rothwell 732dc1c1ca3SStephen Rothwell /* Divide by zero */ 733dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX)) 7345fad293bSKumar Gala ret = FPE_FLTDIV; 735dc1c1ca3SStephen Rothwell 736dc1c1ca3SStephen Rothwell /* Inexact result */ 737dc1c1ca3SStephen Rothwell else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX)) 7385fad293bSKumar Gala ret = FPE_FLTRES; 7395fad293bSKumar Gala 7405fad293bSKumar Gala return ret; 7415fad293bSKumar Gala } 7425fad293bSKumar Gala 7435fad293bSKumar Gala static void parse_fpe(struct pt_regs *regs) 7445fad293bSKumar Gala { 7455fad293bSKumar Gala int code = 0; 7465fad293bSKumar Gala 7475fad293bSKumar Gala flush_fp_to_thread(current); 7485fad293bSKumar Gala 7495fad293bSKumar Gala code = __parse_fpscr(current->thread.fpscr.val); 750dc1c1ca3SStephen Rothwell 751dc1c1ca3SStephen Rothwell _exception(SIGFPE, regs, code, regs->nip); 752dc1c1ca3SStephen Rothwell } 753dc1c1ca3SStephen Rothwell 754dc1c1ca3SStephen Rothwell /* 755dc1c1ca3SStephen Rothwell * Illegal instruction emulation support. Originally written to 75614cf11afSPaul Mackerras * provide the PVR to user applications using the mfspr rd, PVR. 75714cf11afSPaul Mackerras * Return non-zero if we can't emulate, or -EFAULT if the associated 75814cf11afSPaul Mackerras * memory access caused an access fault. Return zero on success. 75914cf11afSPaul Mackerras * 76014cf11afSPaul Mackerras * There are a couple of ways to do this, either "decode" the instruction 76114cf11afSPaul Mackerras * or directly match lots of bits. In this case, matching lots of 76214cf11afSPaul Mackerras * bits is faster and easier. 76386417780SPaul Mackerras * 76414cf11afSPaul Mackerras */ 76514cf11afSPaul Mackerras static int emulate_string_inst(struct pt_regs *regs, u32 instword) 76614cf11afSPaul Mackerras { 76714cf11afSPaul Mackerras u8 rT = (instword >> 21) & 0x1f; 76814cf11afSPaul Mackerras u8 rA = (instword >> 16) & 0x1f; 76914cf11afSPaul Mackerras u8 NB_RB = (instword >> 11) & 0x1f; 77014cf11afSPaul Mackerras u32 num_bytes; 77114cf11afSPaul Mackerras unsigned long EA; 77214cf11afSPaul Mackerras int pos = 0; 77314cf11afSPaul Mackerras 77414cf11afSPaul Mackerras /* Early out if we are an invalid form of lswx */ 77516c57b36SKumar Gala if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX) 77614cf11afSPaul Mackerras if ((rT == rA) || (rT == NB_RB)) 77714cf11afSPaul Mackerras return -EINVAL; 77814cf11afSPaul Mackerras 77914cf11afSPaul Mackerras EA = (rA == 0) ? 0 : regs->gpr[rA]; 78014cf11afSPaul Mackerras 78116c57b36SKumar Gala switch (instword & PPC_INST_STRING_MASK) { 78216c57b36SKumar Gala case PPC_INST_LSWX: 78316c57b36SKumar Gala case PPC_INST_STSWX: 78414cf11afSPaul Mackerras EA += NB_RB; 78514cf11afSPaul Mackerras num_bytes = regs->xer & 0x7f; 78614cf11afSPaul Mackerras break; 78716c57b36SKumar Gala case PPC_INST_LSWI: 78816c57b36SKumar Gala case PPC_INST_STSWI: 78914cf11afSPaul Mackerras num_bytes = (NB_RB == 0) ? 32 : NB_RB; 79014cf11afSPaul Mackerras break; 79114cf11afSPaul Mackerras default: 79214cf11afSPaul Mackerras return -EINVAL; 79314cf11afSPaul Mackerras } 79414cf11afSPaul Mackerras 79514cf11afSPaul Mackerras while (num_bytes != 0) 79614cf11afSPaul Mackerras { 79714cf11afSPaul Mackerras u8 val; 79814cf11afSPaul Mackerras u32 shift = 8 * (3 - (pos & 0x3)); 79914cf11afSPaul Mackerras 80016c57b36SKumar Gala switch ((instword & PPC_INST_STRING_MASK)) { 80116c57b36SKumar Gala case PPC_INST_LSWX: 80216c57b36SKumar Gala case PPC_INST_LSWI: 80314cf11afSPaul Mackerras if (get_user(val, (u8 __user *)EA)) 80414cf11afSPaul Mackerras return -EFAULT; 80514cf11afSPaul Mackerras /* first time updating this reg, 80614cf11afSPaul Mackerras * zero it out */ 80714cf11afSPaul Mackerras if (pos == 0) 80814cf11afSPaul Mackerras regs->gpr[rT] = 0; 80914cf11afSPaul Mackerras regs->gpr[rT] |= val << shift; 81014cf11afSPaul Mackerras break; 81116c57b36SKumar Gala case PPC_INST_STSWI: 81216c57b36SKumar Gala case PPC_INST_STSWX: 81314cf11afSPaul Mackerras val = regs->gpr[rT] >> shift; 81414cf11afSPaul Mackerras if (put_user(val, (u8 __user *)EA)) 81514cf11afSPaul Mackerras return -EFAULT; 81614cf11afSPaul Mackerras break; 81714cf11afSPaul Mackerras } 81814cf11afSPaul Mackerras /* move EA to next address */ 81914cf11afSPaul Mackerras EA += 1; 82014cf11afSPaul Mackerras num_bytes--; 82114cf11afSPaul Mackerras 82214cf11afSPaul Mackerras /* manage our position within the register */ 82314cf11afSPaul Mackerras if (++pos == 4) { 82414cf11afSPaul Mackerras pos = 0; 82514cf11afSPaul Mackerras if (++rT == 32) 82614cf11afSPaul Mackerras rT = 0; 82714cf11afSPaul Mackerras } 82814cf11afSPaul Mackerras } 82914cf11afSPaul Mackerras 83014cf11afSPaul Mackerras return 0; 83114cf11afSPaul Mackerras } 83214cf11afSPaul Mackerras 833c3412dcbSWill Schmidt static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword) 834c3412dcbSWill Schmidt { 835c3412dcbSWill Schmidt u32 ra,rs; 836c3412dcbSWill Schmidt unsigned long tmp; 837c3412dcbSWill Schmidt 838c3412dcbSWill Schmidt ra = (instword >> 16) & 0x1f; 839c3412dcbSWill Schmidt rs = (instword >> 21) & 0x1f; 840c3412dcbSWill Schmidt 841c3412dcbSWill Schmidt tmp = regs->gpr[rs]; 842c3412dcbSWill Schmidt tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL); 843c3412dcbSWill Schmidt tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL); 844c3412dcbSWill Schmidt tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL; 845c3412dcbSWill Schmidt regs->gpr[ra] = tmp; 846c3412dcbSWill Schmidt 847c3412dcbSWill Schmidt return 0; 848c3412dcbSWill Schmidt } 849c3412dcbSWill Schmidt 850c1469f13SKumar Gala static int emulate_isel(struct pt_regs *regs, u32 instword) 851c1469f13SKumar Gala { 852c1469f13SKumar Gala u8 rT = (instword >> 21) & 0x1f; 853c1469f13SKumar Gala u8 rA = (instword >> 16) & 0x1f; 854c1469f13SKumar Gala u8 rB = (instword >> 11) & 0x1f; 855c1469f13SKumar Gala u8 BC = (instword >> 6) & 0x1f; 856c1469f13SKumar Gala u8 bit; 857c1469f13SKumar Gala unsigned long tmp; 858c1469f13SKumar Gala 859c1469f13SKumar Gala tmp = (rA == 0) ? 0 : regs->gpr[rA]; 860c1469f13SKumar Gala bit = (regs->ccr >> (31 - BC)) & 0x1; 861c1469f13SKumar Gala 862c1469f13SKumar Gala regs->gpr[rT] = bit ? tmp : regs->gpr[rB]; 863c1469f13SKumar Gala 864c1469f13SKumar Gala return 0; 865c1469f13SKumar Gala } 866c1469f13SKumar Gala 86714cf11afSPaul Mackerras static int emulate_instruction(struct pt_regs *regs) 86814cf11afSPaul Mackerras { 86914cf11afSPaul Mackerras u32 instword; 87014cf11afSPaul Mackerras u32 rd; 87114cf11afSPaul Mackerras 872fab5db97SPaul Mackerras if (!user_mode(regs) || (regs->msr & MSR_LE)) 87314cf11afSPaul Mackerras return -EINVAL; 87414cf11afSPaul Mackerras CHECK_FULL_REGS(regs); 87514cf11afSPaul Mackerras 87614cf11afSPaul Mackerras if (get_user(instword, (u32 __user *)(regs->nip))) 87714cf11afSPaul Mackerras return -EFAULT; 87814cf11afSPaul Mackerras 87914cf11afSPaul Mackerras /* Emulate the mfspr rD, PVR. */ 88016c57b36SKumar Gala if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) { 881eecff81dSAnton Blanchard PPC_WARN_EMULATED(mfpvr, regs); 88214cf11afSPaul Mackerras rd = (instword >> 21) & 0x1f; 88314cf11afSPaul Mackerras regs->gpr[rd] = mfspr(SPRN_PVR); 88414cf11afSPaul Mackerras return 0; 88514cf11afSPaul Mackerras } 88614cf11afSPaul Mackerras 88714cf11afSPaul Mackerras /* Emulating the dcba insn is just a no-op. */ 88880947e7cSGeert Uytterhoeven if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) { 889eecff81dSAnton Blanchard PPC_WARN_EMULATED(dcba, regs); 89014cf11afSPaul Mackerras return 0; 89180947e7cSGeert Uytterhoeven } 89214cf11afSPaul Mackerras 89314cf11afSPaul Mackerras /* Emulate the mcrxr insn. */ 89416c57b36SKumar Gala if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) { 89586417780SPaul Mackerras int shift = (instword >> 21) & 0x1c; 89614cf11afSPaul Mackerras unsigned long msk = 0xf0000000UL >> shift; 89714cf11afSPaul Mackerras 898eecff81dSAnton Blanchard PPC_WARN_EMULATED(mcrxr, regs); 89914cf11afSPaul Mackerras regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); 90014cf11afSPaul Mackerras regs->xer &= ~0xf0000000UL; 90114cf11afSPaul Mackerras return 0; 90214cf11afSPaul Mackerras } 90314cf11afSPaul Mackerras 90414cf11afSPaul Mackerras /* Emulate load/store string insn. */ 90580947e7cSGeert Uytterhoeven if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) { 906eecff81dSAnton Blanchard PPC_WARN_EMULATED(string, regs); 90714cf11afSPaul Mackerras return emulate_string_inst(regs, instword); 90880947e7cSGeert Uytterhoeven } 90914cf11afSPaul Mackerras 910c3412dcbSWill Schmidt /* Emulate the popcntb (Population Count Bytes) instruction. */ 91116c57b36SKumar Gala if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) { 912eecff81dSAnton Blanchard PPC_WARN_EMULATED(popcntb, regs); 913c3412dcbSWill Schmidt return emulate_popcntb_inst(regs, instword); 914c3412dcbSWill Schmidt } 915c3412dcbSWill Schmidt 916c1469f13SKumar Gala /* Emulate isel (Integer Select) instruction */ 91716c57b36SKumar Gala if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) { 918eecff81dSAnton Blanchard PPC_WARN_EMULATED(isel, regs); 919c1469f13SKumar Gala return emulate_isel(regs, instword); 920c1469f13SKumar Gala } 921c1469f13SKumar Gala 92214cf11afSPaul Mackerras return -EINVAL; 92314cf11afSPaul Mackerras } 92414cf11afSPaul Mackerras 92573c9ceabSJeremy Fitzhardinge int is_valid_bugaddr(unsigned long addr) 92614cf11afSPaul Mackerras { 92773c9ceabSJeremy Fitzhardinge return is_kernel_addr(addr); 92814cf11afSPaul Mackerras } 92914cf11afSPaul Mackerras 9308dad3f92SPaul Mackerras void __kprobes program_check_exception(struct pt_regs *regs) 93114cf11afSPaul Mackerras { 93214cf11afSPaul Mackerras unsigned int reason = get_reason(regs); 93314cf11afSPaul Mackerras extern int do_mathemu(struct pt_regs *regs); 93414cf11afSPaul Mackerras 935aa42c69cSKim Phillips /* We can now get here via a FP Unavailable exception if the core 93604903a30SKumar Gala * has no FPU, in that case the reason flags will be 0 */ 93714cf11afSPaul Mackerras 93814cf11afSPaul Mackerras if (reason & REASON_FP) { 93914cf11afSPaul Mackerras /* IEEE FP exception */ 940dc1c1ca3SStephen Rothwell parse_fpe(regs); 9418dad3f92SPaul Mackerras return; 9428dad3f92SPaul Mackerras } 9438dad3f92SPaul Mackerras if (reason & REASON_TRAP) { 94414cf11afSPaul Mackerras /* trap exception */ 945dc1c1ca3SStephen Rothwell if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP) 946dc1c1ca3SStephen Rothwell == NOTIFY_STOP) 947dc1c1ca3SStephen Rothwell return; 94814cf11afSPaul Mackerras if (debugger_bpt(regs)) 94914cf11afSPaul Mackerras return; 95073c9ceabSJeremy Fitzhardinge 95173c9ceabSJeremy Fitzhardinge if (!(regs->msr & MSR_PR) && /* not user-mode */ 952608e2619SHeiko Carstens report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) { 95314cf11afSPaul Mackerras regs->nip += 4; 95414cf11afSPaul Mackerras return; 95514cf11afSPaul Mackerras } 9568dad3f92SPaul Mackerras _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip); 9578dad3f92SPaul Mackerras return; 9588dad3f92SPaul Mackerras } 9598dad3f92SPaul Mackerras 960cd8a5673SPaul Mackerras local_irq_enable(); 961cd8a5673SPaul Mackerras 96204903a30SKumar Gala #ifdef CONFIG_MATH_EMULATION 96304903a30SKumar Gala /* (reason & REASON_ILLEGAL) would be the obvious thing here, 96404903a30SKumar Gala * but there seems to be a hardware bug on the 405GP (RevD) 96504903a30SKumar Gala * that means ESR is sometimes set incorrectly - either to 96604903a30SKumar Gala * ESR_DST (!?) or 0. In the process of chasing this with the 96704903a30SKumar Gala * hardware people - not sure if it can happen on any illegal 96804903a30SKumar Gala * instruction or only on FP instructions, whether there is a 96904903a30SKumar Gala * pattern to occurences etc. -dgibson 31/Mar/2003 */ 9705fad293bSKumar Gala switch (do_mathemu(regs)) { 9715fad293bSKumar Gala case 0: 97204903a30SKumar Gala emulate_single_step(regs); 97304903a30SKumar Gala return; 9745fad293bSKumar Gala case 1: { 9755fad293bSKumar Gala int code = 0; 9765fad293bSKumar Gala code = __parse_fpscr(current->thread.fpscr.val); 9775fad293bSKumar Gala _exception(SIGFPE, regs, code, regs->nip); 9785fad293bSKumar Gala return; 97904903a30SKumar Gala } 9805fad293bSKumar Gala case -EFAULT: 9815fad293bSKumar Gala _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 9825fad293bSKumar Gala return; 9835fad293bSKumar Gala } 9845fad293bSKumar Gala /* fall through on any other errors */ 98504903a30SKumar Gala #endif /* CONFIG_MATH_EMULATION */ 98604903a30SKumar Gala 9878dad3f92SPaul Mackerras /* Try to emulate it if we should. */ 9888dad3f92SPaul Mackerras if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { 98914cf11afSPaul Mackerras switch (emulate_instruction(regs)) { 99014cf11afSPaul Mackerras case 0: 99114cf11afSPaul Mackerras regs->nip += 4; 99214cf11afSPaul Mackerras emulate_single_step(regs); 9938dad3f92SPaul Mackerras return; 99414cf11afSPaul Mackerras case -EFAULT: 99514cf11afSPaul Mackerras _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 9968dad3f92SPaul Mackerras return; 9978dad3f92SPaul Mackerras } 9988dad3f92SPaul Mackerras } 9998dad3f92SPaul Mackerras 100014cf11afSPaul Mackerras if (reason & REASON_PRIVILEGED) 100114cf11afSPaul Mackerras _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 100214cf11afSPaul Mackerras else 100314cf11afSPaul Mackerras _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 100414cf11afSPaul Mackerras } 100514cf11afSPaul Mackerras 1006dc1c1ca3SStephen Rothwell void alignment_exception(struct pt_regs *regs) 100714cf11afSPaul Mackerras { 10084393c4f6SBenjamin Herrenschmidt int sig, code, fixed = 0; 100914cf11afSPaul Mackerras 1010e9370ae1SPaul Mackerras /* we don't implement logging of alignment exceptions */ 1011e9370ae1SPaul Mackerras if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 101214cf11afSPaul Mackerras fixed = fix_alignment(regs); 101314cf11afSPaul Mackerras 101414cf11afSPaul Mackerras if (fixed == 1) { 101514cf11afSPaul Mackerras regs->nip += 4; /* skip over emulated instruction */ 101614cf11afSPaul Mackerras emulate_single_step(regs); 101714cf11afSPaul Mackerras return; 101814cf11afSPaul Mackerras } 101914cf11afSPaul Mackerras 102014cf11afSPaul Mackerras /* Operand address was bad */ 102114cf11afSPaul Mackerras if (fixed == -EFAULT) { 10224393c4f6SBenjamin Herrenschmidt sig = SIGSEGV; 10234393c4f6SBenjamin Herrenschmidt code = SEGV_ACCERR; 10244393c4f6SBenjamin Herrenschmidt } else { 10254393c4f6SBenjamin Herrenschmidt sig = SIGBUS; 10264393c4f6SBenjamin Herrenschmidt code = BUS_ADRALN; 102714cf11afSPaul Mackerras } 10284393c4f6SBenjamin Herrenschmidt if (user_mode(regs)) 10294393c4f6SBenjamin Herrenschmidt _exception(sig, regs, code, regs->dar); 10304393c4f6SBenjamin Herrenschmidt else 10314393c4f6SBenjamin Herrenschmidt bad_page_fault(regs, regs->dar, sig); 103214cf11afSPaul Mackerras } 103314cf11afSPaul Mackerras 103414cf11afSPaul Mackerras void StackOverflow(struct pt_regs *regs) 103514cf11afSPaul Mackerras { 103614cf11afSPaul Mackerras printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", 103714cf11afSPaul Mackerras current, regs->gpr[1]); 103814cf11afSPaul Mackerras debugger(regs); 103914cf11afSPaul Mackerras show_regs(regs); 104014cf11afSPaul Mackerras panic("kernel stack overflow"); 104114cf11afSPaul Mackerras } 104214cf11afSPaul Mackerras 104314cf11afSPaul Mackerras void nonrecoverable_exception(struct pt_regs *regs) 104414cf11afSPaul Mackerras { 104514cf11afSPaul Mackerras printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", 104614cf11afSPaul Mackerras regs->nip, regs->msr); 104714cf11afSPaul Mackerras debugger(regs); 104814cf11afSPaul Mackerras die("nonrecoverable exception", regs, SIGKILL); 104914cf11afSPaul Mackerras } 105014cf11afSPaul Mackerras 105114cf11afSPaul Mackerras void trace_syscall(struct pt_regs *regs) 105214cf11afSPaul Mackerras { 105314cf11afSPaul Mackerras printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", 105419c5870cSAlexey Dobriyan current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0], 105514cf11afSPaul Mackerras regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); 105614cf11afSPaul Mackerras } 105714cf11afSPaul Mackerras 1058dc1c1ca3SStephen Rothwell void kernel_fp_unavailable_exception(struct pt_regs *regs) 1059dc1c1ca3SStephen Rothwell { 1060dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Unrecoverable FP Unavailable Exception " 1061dc1c1ca3SStephen Rothwell "%lx at %lx\n", regs->trap, regs->nip); 1062dc1c1ca3SStephen Rothwell die("Unrecoverable FP Unavailable Exception", regs, SIGABRT); 1063dc1c1ca3SStephen Rothwell } 1064dc1c1ca3SStephen Rothwell 1065dc1c1ca3SStephen Rothwell void altivec_unavailable_exception(struct pt_regs *regs) 1066dc1c1ca3SStephen Rothwell { 1067dc1c1ca3SStephen Rothwell if (user_mode(regs)) { 1068dc1c1ca3SStephen Rothwell /* A user program has executed an altivec instruction, 1069dc1c1ca3SStephen Rothwell but this kernel doesn't support altivec. */ 1070dc1c1ca3SStephen Rothwell _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1071dc1c1ca3SStephen Rothwell return; 1072dc1c1ca3SStephen Rothwell } 10736c4841c2SAnton Blanchard 1074dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception " 1075dc1c1ca3SStephen Rothwell "%lx at %lx\n", regs->trap, regs->nip); 1076dc1c1ca3SStephen Rothwell die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 1077dc1c1ca3SStephen Rothwell } 1078dc1c1ca3SStephen Rothwell 1079ce48b210SMichael Neuling void vsx_unavailable_exception(struct pt_regs *regs) 1080ce48b210SMichael Neuling { 1081ce48b210SMichael Neuling if (user_mode(regs)) { 1082ce48b210SMichael Neuling /* A user program has executed an vsx instruction, 1083ce48b210SMichael Neuling but this kernel doesn't support vsx. */ 1084ce48b210SMichael Neuling _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1085ce48b210SMichael Neuling return; 1086ce48b210SMichael Neuling } 1087ce48b210SMichael Neuling 1088ce48b210SMichael Neuling printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception " 1089ce48b210SMichael Neuling "%lx at %lx\n", regs->trap, regs->nip); 1090ce48b210SMichael Neuling die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT); 1091ce48b210SMichael Neuling } 1092ce48b210SMichael Neuling 1093dc1c1ca3SStephen Rothwell void performance_monitor_exception(struct pt_regs *regs) 1094dc1c1ca3SStephen Rothwell { 109589713ed1SAnton Blanchard __get_cpu_var(irq_stat).pmu_irqs++; 109689713ed1SAnton Blanchard 1097dc1c1ca3SStephen Rothwell perf_irq(regs); 1098dc1c1ca3SStephen Rothwell } 1099dc1c1ca3SStephen Rothwell 11008dad3f92SPaul Mackerras #ifdef CONFIG_8xx 110114cf11afSPaul Mackerras void SoftwareEmulation(struct pt_regs *regs) 110214cf11afSPaul Mackerras { 110314cf11afSPaul Mackerras extern int do_mathemu(struct pt_regs *); 110414cf11afSPaul Mackerras extern int Soft_emulate_8xx(struct pt_regs *); 11055dd57a13SScott Wood #if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU) 110614cf11afSPaul Mackerras int errcode; 11075dd57a13SScott Wood #endif 110814cf11afSPaul Mackerras 110914cf11afSPaul Mackerras CHECK_FULL_REGS(regs); 111014cf11afSPaul Mackerras 111114cf11afSPaul Mackerras if (!user_mode(regs)) { 111214cf11afSPaul Mackerras debugger(regs); 111314cf11afSPaul Mackerras die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 111414cf11afSPaul Mackerras } 111514cf11afSPaul Mackerras 111614cf11afSPaul Mackerras #ifdef CONFIG_MATH_EMULATION 111714cf11afSPaul Mackerras errcode = do_mathemu(regs); 111880947e7cSGeert Uytterhoeven if (errcode >= 0) 1119eecff81dSAnton Blanchard PPC_WARN_EMULATED(math, regs); 11205fad293bSKumar Gala 11215fad293bSKumar Gala switch (errcode) { 11225fad293bSKumar Gala case 0: 11235fad293bSKumar Gala emulate_single_step(regs); 11245fad293bSKumar Gala return; 11255fad293bSKumar Gala case 1: { 11265fad293bSKumar Gala int code = 0; 11275fad293bSKumar Gala code = __parse_fpscr(current->thread.fpscr.val); 11285fad293bSKumar Gala _exception(SIGFPE, regs, code, regs->nip); 11295fad293bSKumar Gala return; 11305fad293bSKumar Gala } 11315fad293bSKumar Gala case -EFAULT: 11325fad293bSKumar Gala _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 11335fad293bSKumar Gala return; 11345fad293bSKumar Gala default: 11355fad293bSKumar Gala _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 11365fad293bSKumar Gala return; 11375fad293bSKumar Gala } 11385fad293bSKumar Gala 11395dd57a13SScott Wood #elif defined(CONFIG_8XX_MINIMAL_FPEMU) 114014cf11afSPaul Mackerras errcode = Soft_emulate_8xx(regs); 114180947e7cSGeert Uytterhoeven if (errcode >= 0) 1142eecff81dSAnton Blanchard PPC_WARN_EMULATED(8xx, regs); 114380947e7cSGeert Uytterhoeven 11445fad293bSKumar Gala switch (errcode) { 11455fad293bSKumar Gala case 0: 114614cf11afSPaul Mackerras emulate_single_step(regs); 11475fad293bSKumar Gala return; 11485fad293bSKumar Gala case 1: 11495fad293bSKumar Gala _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 11505fad293bSKumar Gala return; 11515fad293bSKumar Gala case -EFAULT: 11525fad293bSKumar Gala _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); 11535fad293bSKumar Gala return; 11545fad293bSKumar Gala } 11555dd57a13SScott Wood #else 11565dd57a13SScott Wood _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 11575fad293bSKumar Gala #endif 115814cf11afSPaul Mackerras } 11598dad3f92SPaul Mackerras #endif /* CONFIG_8xx */ 116014cf11afSPaul Mackerras 1161172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 11623bffb652SDave Kleikamp static void handle_debug(struct pt_regs *regs, unsigned long debug_status) 11633bffb652SDave Kleikamp { 11643bffb652SDave Kleikamp int changed = 0; 11653bffb652SDave Kleikamp /* 11663bffb652SDave Kleikamp * Determine the cause of the debug event, clear the 11673bffb652SDave Kleikamp * event flags and send a trap to the handler. Torez 11683bffb652SDave Kleikamp */ 11693bffb652SDave Kleikamp if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { 11703bffb652SDave Kleikamp dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W); 11713bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 11723bffb652SDave Kleikamp current->thread.dbcr2 &= ~DBCR2_DAC12MODE; 11733bffb652SDave Kleikamp #endif 11743bffb652SDave Kleikamp do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT, 11753bffb652SDave Kleikamp 5); 11763bffb652SDave Kleikamp changed |= 0x01; 11773bffb652SDave Kleikamp } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) { 11783bffb652SDave Kleikamp dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W); 11793bffb652SDave Kleikamp do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT, 11803bffb652SDave Kleikamp 6); 11813bffb652SDave Kleikamp changed |= 0x01; 11823bffb652SDave Kleikamp } else if (debug_status & DBSR_IAC1) { 11833bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IAC1; 11843bffb652SDave Kleikamp dbcr_iac_range(current) &= ~DBCR_IAC12MODE; 11853bffb652SDave Kleikamp do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT, 11863bffb652SDave Kleikamp 1); 11873bffb652SDave Kleikamp changed |= 0x01; 11883bffb652SDave Kleikamp } else if (debug_status & DBSR_IAC2) { 11893bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IAC2; 11903bffb652SDave Kleikamp do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT, 11913bffb652SDave Kleikamp 2); 11923bffb652SDave Kleikamp changed |= 0x01; 11933bffb652SDave Kleikamp } else if (debug_status & DBSR_IAC3) { 11943bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IAC3; 11953bffb652SDave Kleikamp dbcr_iac_range(current) &= ~DBCR_IAC34MODE; 11963bffb652SDave Kleikamp do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT, 11973bffb652SDave Kleikamp 3); 11983bffb652SDave Kleikamp changed |= 0x01; 11993bffb652SDave Kleikamp } else if (debug_status & DBSR_IAC4) { 12003bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IAC4; 12013bffb652SDave Kleikamp do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT, 12023bffb652SDave Kleikamp 4); 12033bffb652SDave Kleikamp changed |= 0x01; 12043bffb652SDave Kleikamp } 12053bffb652SDave Kleikamp /* 12063bffb652SDave Kleikamp * At the point this routine was called, the MSR(DE) was turned off. 12073bffb652SDave Kleikamp * Check all other debug flags and see if that bit needs to be turned 12083bffb652SDave Kleikamp * back on or not. 12093bffb652SDave Kleikamp */ 12103bffb652SDave Kleikamp if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1)) 12113bffb652SDave Kleikamp regs->msr |= MSR_DE; 12123bffb652SDave Kleikamp else 12133bffb652SDave Kleikamp /* Make sure the IDM flag is off */ 12143bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IDM; 12153bffb652SDave Kleikamp 12163bffb652SDave Kleikamp if (changed & 0x01) 12173bffb652SDave Kleikamp mtspr(SPRN_DBCR0, current->thread.dbcr0); 12183bffb652SDave Kleikamp } 121914cf11afSPaul Mackerras 1220f8279621SKumar Gala void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) 122114cf11afSPaul Mackerras { 12223bffb652SDave Kleikamp current->thread.dbsr = debug_status; 12233bffb652SDave Kleikamp 1224ec097c84SRoland McGrath /* Hack alert: On BookE, Branch Taken stops on the branch itself, while 1225ec097c84SRoland McGrath * on server, it stops on the target of the branch. In order to simulate 1226ec097c84SRoland McGrath * the server behaviour, we thus restart right away with a single step 1227ec097c84SRoland McGrath * instead of stopping here when hitting a BT 1228ec097c84SRoland McGrath */ 1229ec097c84SRoland McGrath if (debug_status & DBSR_BT) { 1230ec097c84SRoland McGrath regs->msr &= ~MSR_DE; 1231ec097c84SRoland McGrath 1232ec097c84SRoland McGrath /* Disable BT */ 1233ec097c84SRoland McGrath mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT); 1234ec097c84SRoland McGrath /* Clear the BT event */ 1235ec097c84SRoland McGrath mtspr(SPRN_DBSR, DBSR_BT); 1236ec097c84SRoland McGrath 1237ec097c84SRoland McGrath /* Do the single step trick only when coming from userspace */ 1238ec097c84SRoland McGrath if (user_mode(regs)) { 1239ec097c84SRoland McGrath current->thread.dbcr0 &= ~DBCR0_BT; 1240ec097c84SRoland McGrath current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; 1241ec097c84SRoland McGrath regs->msr |= MSR_DE; 1242ec097c84SRoland McGrath return; 1243ec097c84SRoland McGrath } 1244ec097c84SRoland McGrath 1245ec097c84SRoland McGrath if (notify_die(DIE_SSTEP, "block_step", regs, 5, 1246ec097c84SRoland McGrath 5, SIGTRAP) == NOTIFY_STOP) { 1247ec097c84SRoland McGrath return; 1248ec097c84SRoland McGrath } 1249ec097c84SRoland McGrath if (debugger_sstep(regs)) 1250ec097c84SRoland McGrath return; 1251ec097c84SRoland McGrath } else if (debug_status & DBSR_IC) { /* Instruction complete */ 125214cf11afSPaul Mackerras regs->msr &= ~MSR_DE; 1253f8279621SKumar Gala 125414cf11afSPaul Mackerras /* Disable instruction completion */ 125514cf11afSPaul Mackerras mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); 125614cf11afSPaul Mackerras /* Clear the instruction completion event */ 125714cf11afSPaul Mackerras mtspr(SPRN_DBSR, DBSR_IC); 1258f8279621SKumar Gala 1259f8279621SKumar Gala if (notify_die(DIE_SSTEP, "single_step", regs, 5, 1260f8279621SKumar Gala 5, SIGTRAP) == NOTIFY_STOP) { 126114cf11afSPaul Mackerras return; 126214cf11afSPaul Mackerras } 1263f8279621SKumar Gala 1264f8279621SKumar Gala if (debugger_sstep(regs)) 1265f8279621SKumar Gala return; 1266f8279621SKumar Gala 12673bffb652SDave Kleikamp if (user_mode(regs)) { 12683bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IC; 12693bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 12703bffb652SDave Kleikamp if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, 12713bffb652SDave Kleikamp current->thread.dbcr1)) 12723bffb652SDave Kleikamp regs->msr |= MSR_DE; 12733bffb652SDave Kleikamp else 12743bffb652SDave Kleikamp /* Make sure the IDM bit is off */ 12753bffb652SDave Kleikamp current->thread.dbcr0 &= ~DBCR0_IDM; 12763bffb652SDave Kleikamp #endif 12773bffb652SDave Kleikamp } 1278f8279621SKumar Gala 1279f8279621SKumar Gala _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 12803bffb652SDave Kleikamp } else 12813bffb652SDave Kleikamp handle_debug(regs, debug_status); 128214cf11afSPaul Mackerras } 1283172ae2e7SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 128414cf11afSPaul Mackerras 128514cf11afSPaul Mackerras #if !defined(CONFIG_TAU_INT) 128614cf11afSPaul Mackerras void TAUException(struct pt_regs *regs) 128714cf11afSPaul Mackerras { 128814cf11afSPaul Mackerras printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 128914cf11afSPaul Mackerras regs->nip, regs->msr, regs->trap, print_tainted()); 129014cf11afSPaul Mackerras } 129114cf11afSPaul Mackerras #endif /* CONFIG_INT_TAU */ 129214cf11afSPaul Mackerras 129314cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1294dc1c1ca3SStephen Rothwell void altivec_assist_exception(struct pt_regs *regs) 129514cf11afSPaul Mackerras { 129614cf11afSPaul Mackerras int err; 129714cf11afSPaul Mackerras 129814cf11afSPaul Mackerras if (!user_mode(regs)) { 129914cf11afSPaul Mackerras printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode" 130014cf11afSPaul Mackerras " at %lx\n", regs->nip); 13018dad3f92SPaul Mackerras die("Kernel VMX/Altivec assist exception", regs, SIGILL); 130214cf11afSPaul Mackerras } 130314cf11afSPaul Mackerras 1304dc1c1ca3SStephen Rothwell flush_altivec_to_thread(current); 1305dc1c1ca3SStephen Rothwell 1306eecff81dSAnton Blanchard PPC_WARN_EMULATED(altivec, regs); 130714cf11afSPaul Mackerras err = emulate_altivec(regs); 130814cf11afSPaul Mackerras if (err == 0) { 130914cf11afSPaul Mackerras regs->nip += 4; /* skip emulated instruction */ 131014cf11afSPaul Mackerras emulate_single_step(regs); 131114cf11afSPaul Mackerras return; 131214cf11afSPaul Mackerras } 131314cf11afSPaul Mackerras 131414cf11afSPaul Mackerras if (err == -EFAULT) { 131514cf11afSPaul Mackerras /* got an error reading the instruction */ 131614cf11afSPaul Mackerras _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 131714cf11afSPaul Mackerras } else { 131814cf11afSPaul Mackerras /* didn't recognize the instruction */ 131914cf11afSPaul Mackerras /* XXX quick hack for now: set the non-Java bit in the VSCR */ 132014cf11afSPaul Mackerras if (printk_ratelimit()) 132114cf11afSPaul Mackerras printk(KERN_ERR "Unrecognized altivec instruction " 132214cf11afSPaul Mackerras "in %s at %lx\n", current->comm, regs->nip); 132314cf11afSPaul Mackerras current->thread.vscr.u[3] |= 0x10000; 132414cf11afSPaul Mackerras } 132514cf11afSPaul Mackerras } 132614cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 132714cf11afSPaul Mackerras 1328ce48b210SMichael Neuling #ifdef CONFIG_VSX 1329ce48b210SMichael Neuling void vsx_assist_exception(struct pt_regs *regs) 1330ce48b210SMichael Neuling { 1331ce48b210SMichael Neuling if (!user_mode(regs)) { 1332ce48b210SMichael Neuling printk(KERN_EMERG "VSX assist exception in kernel mode" 1333ce48b210SMichael Neuling " at %lx\n", regs->nip); 1334ce48b210SMichael Neuling die("Kernel VSX assist exception", regs, SIGILL); 1335ce48b210SMichael Neuling } 1336ce48b210SMichael Neuling 1337ce48b210SMichael Neuling flush_vsx_to_thread(current); 1338ce48b210SMichael Neuling printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip); 1339ce48b210SMichael Neuling _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 1340ce48b210SMichael Neuling } 1341ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 1342ce48b210SMichael Neuling 134314cf11afSPaul Mackerras #ifdef CONFIG_FSL_BOOKE 1344620165f9SKumar Gala 1345620165f9SKumar Gala void doorbell_exception(struct pt_regs *regs) 1346620165f9SKumar Gala { 1347620165f9SKumar Gala #ifdef CONFIG_SMP 1348620165f9SKumar Gala int cpu = smp_processor_id(); 1349620165f9SKumar Gala int msg; 1350620165f9SKumar Gala 1351620165f9SKumar Gala if (num_online_cpus() < 2) 1352620165f9SKumar Gala return; 1353620165f9SKumar Gala 1354620165f9SKumar Gala for (msg = 0; msg < 4; msg++) 1355620165f9SKumar Gala if (test_and_clear_bit(msg, &dbell_smp_message[cpu])) 1356620165f9SKumar Gala smp_message_recv(msg); 1357620165f9SKumar Gala #else 1358620165f9SKumar Gala printk(KERN_WARNING "Received doorbell on non-smp system\n"); 1359620165f9SKumar Gala #endif 1360620165f9SKumar Gala } 1361620165f9SKumar Gala 136214cf11afSPaul Mackerras void CacheLockingException(struct pt_regs *regs, unsigned long address, 136314cf11afSPaul Mackerras unsigned long error_code) 136414cf11afSPaul Mackerras { 136514cf11afSPaul Mackerras /* We treat cache locking instructions from the user 136614cf11afSPaul Mackerras * as priv ops, in the future we could try to do 136714cf11afSPaul Mackerras * something smarter 136814cf11afSPaul Mackerras */ 136914cf11afSPaul Mackerras if (error_code & (ESR_DLK|ESR_ILK)) 137014cf11afSPaul Mackerras _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); 137114cf11afSPaul Mackerras return; 137214cf11afSPaul Mackerras } 137314cf11afSPaul Mackerras #endif /* CONFIG_FSL_BOOKE */ 137414cf11afSPaul Mackerras 137514cf11afSPaul Mackerras #ifdef CONFIG_SPE 137614cf11afSPaul Mackerras void SPEFloatingPointException(struct pt_regs *regs) 137714cf11afSPaul Mackerras { 13786a800f36SLiu Yu extern int do_spe_mathemu(struct pt_regs *regs); 137914cf11afSPaul Mackerras unsigned long spefscr; 138014cf11afSPaul Mackerras int fpexc_mode; 138114cf11afSPaul Mackerras int code = 0; 13826a800f36SLiu Yu int err; 13836a800f36SLiu Yu 13846a800f36SLiu Yu preempt_disable(); 13856a800f36SLiu Yu if (regs->msr & MSR_SPE) 13866a800f36SLiu Yu giveup_spe(current); 13876a800f36SLiu Yu preempt_enable(); 138814cf11afSPaul Mackerras 138914cf11afSPaul Mackerras spefscr = current->thread.spefscr; 139014cf11afSPaul Mackerras fpexc_mode = current->thread.fpexc_mode; 139114cf11afSPaul Mackerras 139214cf11afSPaul Mackerras if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 139314cf11afSPaul Mackerras code = FPE_FLTOVF; 139414cf11afSPaul Mackerras } 139514cf11afSPaul Mackerras else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) { 139614cf11afSPaul Mackerras code = FPE_FLTUND; 139714cf11afSPaul Mackerras } 139814cf11afSPaul Mackerras else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV)) 139914cf11afSPaul Mackerras code = FPE_FLTDIV; 140014cf11afSPaul Mackerras else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) { 140114cf11afSPaul Mackerras code = FPE_FLTINV; 140214cf11afSPaul Mackerras } 140314cf11afSPaul Mackerras else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES)) 140414cf11afSPaul Mackerras code = FPE_FLTRES; 140514cf11afSPaul Mackerras 14066a800f36SLiu Yu err = do_spe_mathemu(regs); 14076a800f36SLiu Yu if (err == 0) { 14086a800f36SLiu Yu regs->nip += 4; /* skip emulated instruction */ 14096a800f36SLiu Yu emulate_single_step(regs); 141014cf11afSPaul Mackerras return; 141114cf11afSPaul Mackerras } 14126a800f36SLiu Yu 14136a800f36SLiu Yu if (err == -EFAULT) { 14146a800f36SLiu Yu /* got an error reading the instruction */ 14156a800f36SLiu Yu _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 14166a800f36SLiu Yu } else if (err == -EINVAL) { 14176a800f36SLiu Yu /* didn't recognize the instruction */ 14186a800f36SLiu Yu printk(KERN_ERR "unrecognized spe instruction " 14196a800f36SLiu Yu "in %s at %lx\n", current->comm, regs->nip); 14206a800f36SLiu Yu } else { 14216a800f36SLiu Yu _exception(SIGFPE, regs, code, regs->nip); 14226a800f36SLiu Yu } 14236a800f36SLiu Yu 14246a800f36SLiu Yu return; 14256a800f36SLiu Yu } 14266a800f36SLiu Yu 14276a800f36SLiu Yu void SPEFloatingPointRoundException(struct pt_regs *regs) 14286a800f36SLiu Yu { 14296a800f36SLiu Yu extern int speround_handler(struct pt_regs *regs); 14306a800f36SLiu Yu int err; 14316a800f36SLiu Yu 14326a800f36SLiu Yu preempt_disable(); 14336a800f36SLiu Yu if (regs->msr & MSR_SPE) 14346a800f36SLiu Yu giveup_spe(current); 14356a800f36SLiu Yu preempt_enable(); 14366a800f36SLiu Yu 14376a800f36SLiu Yu regs->nip -= 4; 14386a800f36SLiu Yu err = speround_handler(regs); 14396a800f36SLiu Yu if (err == 0) { 14406a800f36SLiu Yu regs->nip += 4; /* skip emulated instruction */ 14416a800f36SLiu Yu emulate_single_step(regs); 14426a800f36SLiu Yu return; 14436a800f36SLiu Yu } 14446a800f36SLiu Yu 14456a800f36SLiu Yu if (err == -EFAULT) { 14466a800f36SLiu Yu /* got an error reading the instruction */ 14476a800f36SLiu Yu _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); 14486a800f36SLiu Yu } else if (err == -EINVAL) { 14496a800f36SLiu Yu /* didn't recognize the instruction */ 14506a800f36SLiu Yu printk(KERN_ERR "unrecognized spe instruction " 14516a800f36SLiu Yu "in %s at %lx\n", current->comm, regs->nip); 14526a800f36SLiu Yu } else { 14536a800f36SLiu Yu _exception(SIGFPE, regs, 0, regs->nip); 14546a800f36SLiu Yu return; 14556a800f36SLiu Yu } 14566a800f36SLiu Yu } 145714cf11afSPaul Mackerras #endif 145814cf11afSPaul Mackerras 1459dc1c1ca3SStephen Rothwell /* 1460dc1c1ca3SStephen Rothwell * We enter here if we get an unrecoverable exception, that is, one 1461dc1c1ca3SStephen Rothwell * that happened at a point where the RI (recoverable interrupt) bit 1462dc1c1ca3SStephen Rothwell * in the MSR is 0. This indicates that SRR0/1 are live, and that 1463dc1c1ca3SStephen Rothwell * we therefore lost state by taking this exception. 1464dc1c1ca3SStephen Rothwell */ 1465dc1c1ca3SStephen Rothwell void unrecoverable_exception(struct pt_regs *regs) 1466dc1c1ca3SStephen Rothwell { 1467dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n", 1468dc1c1ca3SStephen Rothwell regs->trap, regs->nip); 1469dc1c1ca3SStephen Rothwell die("Unrecoverable exception", regs, SIGABRT); 1470dc1c1ca3SStephen Rothwell } 1471dc1c1ca3SStephen Rothwell 147214cf11afSPaul Mackerras #ifdef CONFIG_BOOKE_WDT 147314cf11afSPaul Mackerras /* 147414cf11afSPaul Mackerras * Default handler for a Watchdog exception, 147514cf11afSPaul Mackerras * spins until a reboot occurs 147614cf11afSPaul Mackerras */ 147714cf11afSPaul Mackerras void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) 147814cf11afSPaul Mackerras { 147914cf11afSPaul Mackerras /* Generic WatchdogHandler, implement your own */ 148014cf11afSPaul Mackerras mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); 148114cf11afSPaul Mackerras return; 148214cf11afSPaul Mackerras } 148314cf11afSPaul Mackerras 148414cf11afSPaul Mackerras void WatchdogException(struct pt_regs *regs) 148514cf11afSPaul Mackerras { 148614cf11afSPaul Mackerras printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); 148714cf11afSPaul Mackerras WatchdogHandler(regs); 148814cf11afSPaul Mackerras } 148914cf11afSPaul Mackerras #endif 1490dc1c1ca3SStephen Rothwell 1491dc1c1ca3SStephen Rothwell /* 1492dc1c1ca3SStephen Rothwell * We enter here if we discover during exception entry that we are 1493dc1c1ca3SStephen Rothwell * running in supervisor mode with a userspace value in the stack pointer. 1494dc1c1ca3SStephen Rothwell */ 1495dc1c1ca3SStephen Rothwell void kernel_bad_stack(struct pt_regs *regs) 1496dc1c1ca3SStephen Rothwell { 1497dc1c1ca3SStephen Rothwell printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n", 1498dc1c1ca3SStephen Rothwell regs->gpr[1], regs->nip); 1499dc1c1ca3SStephen Rothwell die("Bad kernel stack pointer", regs, SIGABRT); 1500dc1c1ca3SStephen Rothwell } 150114cf11afSPaul Mackerras 150214cf11afSPaul Mackerras void __init trap_init(void) 150314cf11afSPaul Mackerras { 150414cf11afSPaul Mackerras } 150580947e7cSGeert Uytterhoeven 150680947e7cSGeert Uytterhoeven 150780947e7cSGeert Uytterhoeven #ifdef CONFIG_PPC_EMULATED_STATS 150880947e7cSGeert Uytterhoeven 150980947e7cSGeert Uytterhoeven #define WARN_EMULATED_SETUP(type) .type = { .name = #type } 151080947e7cSGeert Uytterhoeven 151180947e7cSGeert Uytterhoeven struct ppc_emulated ppc_emulated = { 151280947e7cSGeert Uytterhoeven #ifdef CONFIG_ALTIVEC 151380947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(altivec), 151480947e7cSGeert Uytterhoeven #endif 151580947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(dcba), 151680947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(dcbz), 151780947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(fp_pair), 151880947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(isel), 151980947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(mcrxr), 152080947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(mfpvr), 152180947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(multiple), 152280947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(popcntb), 152380947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(spe), 152480947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(string), 152580947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(unaligned), 152680947e7cSGeert Uytterhoeven #ifdef CONFIG_MATH_EMULATION 152780947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(math), 152880947e7cSGeert Uytterhoeven #elif defined(CONFIG_8XX_MINIMAL_FPEMU) 152980947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(8xx), 153080947e7cSGeert Uytterhoeven #endif 153180947e7cSGeert Uytterhoeven #ifdef CONFIG_VSX 153280947e7cSGeert Uytterhoeven WARN_EMULATED_SETUP(vsx), 153380947e7cSGeert Uytterhoeven #endif 153480947e7cSGeert Uytterhoeven }; 153580947e7cSGeert Uytterhoeven 153680947e7cSGeert Uytterhoeven u32 ppc_warn_emulated; 153780947e7cSGeert Uytterhoeven 153880947e7cSGeert Uytterhoeven void ppc_warn_emulated_print(const char *type) 153980947e7cSGeert Uytterhoeven { 154080947e7cSGeert Uytterhoeven if (printk_ratelimit()) 154180947e7cSGeert Uytterhoeven pr_warning("%s used emulated %s instruction\n", current->comm, 154280947e7cSGeert Uytterhoeven type); 154380947e7cSGeert Uytterhoeven } 154480947e7cSGeert Uytterhoeven 154580947e7cSGeert Uytterhoeven static int __init ppc_warn_emulated_init(void) 154680947e7cSGeert Uytterhoeven { 154780947e7cSGeert Uytterhoeven struct dentry *dir, *d; 154880947e7cSGeert Uytterhoeven unsigned int i; 154980947e7cSGeert Uytterhoeven struct ppc_emulated_entry *entries = (void *)&ppc_emulated; 155080947e7cSGeert Uytterhoeven 155180947e7cSGeert Uytterhoeven if (!powerpc_debugfs_root) 155280947e7cSGeert Uytterhoeven return -ENODEV; 155380947e7cSGeert Uytterhoeven 155480947e7cSGeert Uytterhoeven dir = debugfs_create_dir("emulated_instructions", 155580947e7cSGeert Uytterhoeven powerpc_debugfs_root); 155680947e7cSGeert Uytterhoeven if (!dir) 155780947e7cSGeert Uytterhoeven return -ENOMEM; 155880947e7cSGeert Uytterhoeven 155980947e7cSGeert Uytterhoeven d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir, 156080947e7cSGeert Uytterhoeven &ppc_warn_emulated); 156180947e7cSGeert Uytterhoeven if (!d) 156280947e7cSGeert Uytterhoeven goto fail; 156380947e7cSGeert Uytterhoeven 156480947e7cSGeert Uytterhoeven for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) { 156580947e7cSGeert Uytterhoeven d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir, 156680947e7cSGeert Uytterhoeven (u32 *)&entries[i].val.counter); 156780947e7cSGeert Uytterhoeven if (!d) 156880947e7cSGeert Uytterhoeven goto fail; 156980947e7cSGeert Uytterhoeven } 157080947e7cSGeert Uytterhoeven 157180947e7cSGeert Uytterhoeven return 0; 157280947e7cSGeert Uytterhoeven 157380947e7cSGeert Uytterhoeven fail: 157480947e7cSGeert Uytterhoeven debugfs_remove_recursive(dir); 157580947e7cSGeert Uytterhoeven return -ENOMEM; 157680947e7cSGeert Uytterhoeven } 157780947e7cSGeert Uytterhoeven 157880947e7cSGeert Uytterhoeven device_initcall(ppc_warn_emulated_init); 157980947e7cSGeert Uytterhoeven 158080947e7cSGeert Uytterhoeven #endif /* CONFIG_PPC_EMULATED_STATS */ 1581