1 /* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #undef DEBUG 14 15 #include <linux/module.h> 16 #include <linux/string.h> 17 #include <linux/sched.h> 18 #include <linux/init.h> 19 #include <linux/kernel.h> 20 #include <linux/reboot.h> 21 #include <linux/delay.h> 22 #include <linux/initrd.h> 23 #include <linux/seq_file.h> 24 #include <linux/ioport.h> 25 #include <linux/console.h> 26 #include <linux/utsname.h> 27 #include <linux/tty.h> 28 #include <linux/root_dev.h> 29 #include <linux/notifier.h> 30 #include <linux/cpu.h> 31 #include <linux/unistd.h> 32 #include <linux/serial.h> 33 #include <linux/serial_8250.h> 34 #include <linux/bootmem.h> 35 #include <linux/pci.h> 36 #include <linux/lockdep.h> 37 #include <linux/memblock.h> 38 #include <asm/io.h> 39 #include <asm/kdump.h> 40 #include <asm/prom.h> 41 #include <asm/processor.h> 42 #include <asm/pgtable.h> 43 #include <asm/smp.h> 44 #include <asm/elf.h> 45 #include <asm/machdep.h> 46 #include <asm/paca.h> 47 #include <asm/time.h> 48 #include <asm/cputable.h> 49 #include <asm/sections.h> 50 #include <asm/btext.h> 51 #include <asm/nvram.h> 52 #include <asm/setup.h> 53 #include <asm/system.h> 54 #include <asm/rtas.h> 55 #include <asm/iommu.h> 56 #include <asm/serial.h> 57 #include <asm/cache.h> 58 #include <asm/page.h> 59 #include <asm/mmu.h> 60 #include <asm/firmware.h> 61 #include <asm/xmon.h> 62 #include <asm/udbg.h> 63 #include <asm/kexec.h> 64 #include <asm/mmu_context.h> 65 66 #include "setup.h" 67 68 #ifdef DEBUG 69 #define DBG(fmt...) udbg_printf(fmt) 70 #else 71 #define DBG(fmt...) 72 #endif 73 74 int boot_cpuid = 0; 75 u64 ppc64_pft_size; 76 77 /* Pick defaults since we might want to patch instructions 78 * before we've read this from the device tree. 79 */ 80 struct ppc64_caches ppc64_caches = { 81 .dline_size = 0x40, 82 .log_dline_size = 6, 83 .iline_size = 0x40, 84 .log_iline_size = 6 85 }; 86 EXPORT_SYMBOL_GPL(ppc64_caches); 87 88 /* 89 * These are used in binfmt_elf.c to put aux entries on the stack 90 * for each elf executable being started. 91 */ 92 int dcache_bsize; 93 int icache_bsize; 94 int ucache_bsize; 95 96 #ifdef CONFIG_SMP 97 98 static int smt_enabled_cmdline; 99 100 /* Look for ibm,smt-enabled OF option */ 101 static void check_smt_enabled(void) 102 { 103 struct device_node *dn; 104 const char *smt_option; 105 106 /* Allow the command line to overrule the OF option */ 107 if (smt_enabled_cmdline) 108 return; 109 110 dn = of_find_node_by_path("/options"); 111 112 if (dn) { 113 smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); 114 115 if (smt_option) { 116 if (!strcmp(smt_option, "on")) 117 smt_enabled_at_boot = 1; 118 else if (!strcmp(smt_option, "off")) 119 smt_enabled_at_boot = 0; 120 } 121 } 122 } 123 124 /* Look for smt-enabled= cmdline option */ 125 static int __init early_smt_enabled(char *p) 126 { 127 smt_enabled_cmdline = 1; 128 129 if (!p) 130 return 0; 131 132 if (!strcmp(p, "on") || !strcmp(p, "1")) 133 smt_enabled_at_boot = 1; 134 else if (!strcmp(p, "off") || !strcmp(p, "0")) 135 smt_enabled_at_boot = 0; 136 137 return 0; 138 } 139 early_param("smt-enabled", early_smt_enabled); 140 141 #else 142 #define check_smt_enabled() 143 #endif /* CONFIG_SMP */ 144 145 /* 146 * Early initialization entry point. This is called by head.S 147 * with MMU translation disabled. We rely on the "feature" of 148 * the CPU that ignores the top 2 bits of the address in real 149 * mode so we can access kernel globals normally provided we 150 * only toy with things in the RMO region. From here, we do 151 * some early parsing of the device-tree to setup out MEMBLOCK 152 * data structures, and allocate & initialize the hash table 153 * and segment tables so we can start running with translation 154 * enabled. 155 * 156 * It is this function which will call the probe() callback of 157 * the various platform types and copy the matching one to the 158 * global ppc_md structure. Your platform can eventually do 159 * some very early initializations from the probe() routine, but 160 * this is not recommended, be very careful as, for example, the 161 * device-tree is not accessible via normal means at this point. 162 */ 163 164 void __init early_setup(unsigned long dt_ptr) 165 { 166 /* -------- printk is _NOT_ safe to use here ! ------- */ 167 168 /* Identify CPU type */ 169 identify_cpu(0, mfspr(SPRN_PVR)); 170 171 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 172 initialise_paca(&boot_paca, 0); 173 setup_paca(&boot_paca); 174 175 /* Initialize lockdep early or else spinlocks will blow */ 176 lockdep_init(); 177 178 /* -------- printk is now safe to use ------- */ 179 180 /* Enable early debugging if any specified (see udbg.h) */ 181 udbg_early_init(); 182 183 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 184 185 /* 186 * Do early initialization using the flattened device 187 * tree, such as retrieving the physical memory map or 188 * calculating/retrieving the hash table size. 189 */ 190 early_init_devtree(__va(dt_ptr)); 191 192 /* Now we know the logical id of our boot cpu, setup the paca. */ 193 setup_paca(&paca[boot_cpuid]); 194 195 /* Fix up paca fields required for the boot cpu */ 196 get_paca()->cpu_start = 1; 197 198 /* Probe the machine type */ 199 probe_machine(); 200 201 setup_kdump_trampoline(); 202 203 DBG("Found, Initializing memory management...\n"); 204 205 /* Initialize the hash table or TLB handling */ 206 early_init_mmu(); 207 208 DBG(" <- early_setup()\n"); 209 } 210 211 #ifdef CONFIG_SMP 212 void early_setup_secondary(void) 213 { 214 /* Mark interrupts enabled in PACA */ 215 get_paca()->soft_enabled = 0; 216 217 /* Initialize the hash table or TLB handling */ 218 early_init_mmu_secondary(); 219 } 220 221 #endif /* CONFIG_SMP */ 222 223 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 224 void smp_release_cpus(void) 225 { 226 unsigned long *ptr; 227 228 DBG(" -> smp_release_cpus()\n"); 229 230 /* All secondary cpus are spinning on a common spinloop, release them 231 * all now so they can start to spin on their individual paca 232 * spinloops. For non SMP kernels, the secondary cpus never get out 233 * of the common spinloop. 234 */ 235 236 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 237 - PHYSICAL_START); 238 *ptr = __pa(generic_secondary_smp_init); 239 mb(); 240 241 DBG(" <- smp_release_cpus()\n"); 242 } 243 #endif /* CONFIG_SMP || CONFIG_KEXEC */ 244 245 /* 246 * Initialize some remaining members of the ppc64_caches and systemcfg 247 * structures 248 * (at least until we get rid of them completely). This is mostly some 249 * cache informations about the CPU that will be used by cache flush 250 * routines and/or provided to userland 251 */ 252 static void __init initialize_cache_info(void) 253 { 254 struct device_node *np; 255 unsigned long num_cpus = 0; 256 257 DBG(" -> initialize_cache_info()\n"); 258 259 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 260 num_cpus += 1; 261 262 /* We're assuming *all* of the CPUs have the same 263 * d-cache and i-cache sizes... -Peter 264 */ 265 266 if ( num_cpus == 1 ) { 267 const u32 *sizep, *lsizep; 268 u32 size, lsize; 269 270 size = 0; 271 lsize = cur_cpu_spec->dcache_bsize; 272 sizep = of_get_property(np, "d-cache-size", NULL); 273 if (sizep != NULL) 274 size = *sizep; 275 lsizep = of_get_property(np, "d-cache-block-size", NULL); 276 /* fallback if block size missing */ 277 if (lsizep == NULL) 278 lsizep = of_get_property(np, "d-cache-line-size", NULL); 279 if (lsizep != NULL) 280 lsize = *lsizep; 281 if (sizep == 0 || lsizep == 0) 282 DBG("Argh, can't find dcache properties ! " 283 "sizep: %p, lsizep: %p\n", sizep, lsizep); 284 285 ppc64_caches.dsize = size; 286 ppc64_caches.dline_size = lsize; 287 ppc64_caches.log_dline_size = __ilog2(lsize); 288 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 289 290 size = 0; 291 lsize = cur_cpu_spec->icache_bsize; 292 sizep = of_get_property(np, "i-cache-size", NULL); 293 if (sizep != NULL) 294 size = *sizep; 295 lsizep = of_get_property(np, "i-cache-block-size", NULL); 296 if (lsizep == NULL) 297 lsizep = of_get_property(np, "i-cache-line-size", NULL); 298 if (lsizep != NULL) 299 lsize = *lsizep; 300 if (sizep == 0 || lsizep == 0) 301 DBG("Argh, can't find icache properties ! " 302 "sizep: %p, lsizep: %p\n", sizep, lsizep); 303 304 ppc64_caches.isize = size; 305 ppc64_caches.iline_size = lsize; 306 ppc64_caches.log_iline_size = __ilog2(lsize); 307 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 308 } 309 } 310 311 DBG(" <- initialize_cache_info()\n"); 312 } 313 314 315 /* 316 * Do some initial setup of the system. The parameters are those which 317 * were passed in from the bootloader. 318 */ 319 void __init setup_system(void) 320 { 321 DBG(" -> setup_system()\n"); 322 323 /* Apply the CPUs-specific and firmware specific fixups to kernel 324 * text (nop out sections not relevant to this CPU or this firmware) 325 */ 326 do_feature_fixups(cur_cpu_spec->cpu_features, 327 &__start___ftr_fixup, &__stop___ftr_fixup); 328 do_feature_fixups(cur_cpu_spec->mmu_features, 329 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); 330 do_feature_fixups(powerpc_firmware_features, 331 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 332 do_lwsync_fixups(cur_cpu_spec->cpu_features, 333 &__start___lwsync_fixup, &__stop___lwsync_fixup); 334 335 /* 336 * Unflatten the device-tree passed by prom_init or kexec 337 */ 338 unflatten_device_tree(); 339 340 /* 341 * Fill the ppc64_caches & systemcfg structures with informations 342 * retrieved from the device-tree. 343 */ 344 initialize_cache_info(); 345 346 #ifdef CONFIG_PPC_RTAS 347 /* 348 * Initialize RTAS if available 349 */ 350 rtas_initialize(); 351 #endif /* CONFIG_PPC_RTAS */ 352 353 /* 354 * Check if we have an initrd provided via the device-tree 355 */ 356 check_for_initrd(); 357 358 /* 359 * Do some platform specific early initializations, that includes 360 * setting up the hash table pointers. It also sets up some interrupt-mapping 361 * related options that will be used by finish_device_tree() 362 */ 363 if (ppc_md.init_early) 364 ppc_md.init_early(); 365 366 /* 367 * We can discover serial ports now since the above did setup the 368 * hash table management for us, thus ioremap works. We do that early 369 * so that further code can be debugged 370 */ 371 find_legacy_serial_ports(); 372 373 /* 374 * Register early console 375 */ 376 register_early_udbg_console(); 377 378 /* 379 * Initialize xmon 380 */ 381 xmon_setup(); 382 383 check_smt_enabled(); 384 smp_setup_cpu_maps(); 385 386 #ifdef CONFIG_SMP 387 /* Release secondary cpus out of their spinloops at 0x60 now that 388 * we can map physical -> logical CPU ids 389 */ 390 smp_release_cpus(); 391 #endif 392 393 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 394 395 printk("-----------------------------------------------------\n"); 396 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 397 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size()); 398 if (ppc64_caches.dline_size != 0x80) 399 printk("ppc64_caches.dcache_line_size = 0x%x\n", 400 ppc64_caches.dline_size); 401 if (ppc64_caches.iline_size != 0x80) 402 printk("ppc64_caches.icache_line_size = 0x%x\n", 403 ppc64_caches.iline_size); 404 #ifdef CONFIG_PPC_STD_MMU_64 405 if (htab_address) 406 printk("htab_address = 0x%p\n", htab_address); 407 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 408 #endif /* CONFIG_PPC_STD_MMU_64 */ 409 if (PHYSICAL_START > 0) 410 printk("physical_start = 0x%llx\n", 411 (unsigned long long)PHYSICAL_START); 412 printk("-----------------------------------------------------\n"); 413 414 DBG(" <- setup_system()\n"); 415 } 416 417 static u64 slb0_limit(void) 418 { 419 if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) { 420 return 1UL << SID_SHIFT_1T; 421 } 422 return 1UL << SID_SHIFT; 423 } 424 425 static void __init irqstack_early_init(void) 426 { 427 u64 limit = slb0_limit(); 428 unsigned int i; 429 430 /* 431 * interrupt stacks must be under 256MB, we cannot afford to take 432 * SLB misses on them. 433 */ 434 for_each_possible_cpu(i) { 435 softirq_ctx[i] = (struct thread_info *) 436 __va(memblock_alloc_base(THREAD_SIZE, 437 THREAD_SIZE, limit)); 438 hardirq_ctx[i] = (struct thread_info *) 439 __va(memblock_alloc_base(THREAD_SIZE, 440 THREAD_SIZE, limit)); 441 } 442 } 443 444 #ifdef CONFIG_PPC_BOOK3E 445 static void __init exc_lvl_early_init(void) 446 { 447 unsigned int i; 448 449 for_each_possible_cpu(i) { 450 critirq_ctx[i] = (struct thread_info *) 451 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 452 dbgirq_ctx[i] = (struct thread_info *) 453 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 454 mcheckirq_ctx[i] = (struct thread_info *) 455 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); 456 } 457 } 458 #else 459 #define exc_lvl_early_init() 460 #endif 461 462 /* 463 * Stack space used when we detect a bad kernel stack pointer, and 464 * early in SMP boots before relocation is enabled. 465 */ 466 static void __init emergency_stack_init(void) 467 { 468 u64 limit; 469 unsigned int i; 470 471 /* 472 * Emergency stacks must be under 256MB, we cannot afford to take 473 * SLB misses on them. The ABI also requires them to be 128-byte 474 * aligned. 475 * 476 * Since we use these as temporary stacks during secondary CPU 477 * bringup, we need to get at them in real mode. This means they 478 * must also be within the RMO region. 479 */ 480 limit = min(slb0_limit(), memblock.rmo_size); 481 482 for_each_possible_cpu(i) { 483 unsigned long sp; 484 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); 485 sp += THREAD_SIZE; 486 paca[i].emergency_sp = __va(sp); 487 } 488 } 489 490 /* 491 * Called into from start_kernel, after lock_kernel has been called. 492 * Initializes bootmem, which is unsed to manage page allocation until 493 * mem_init is called. 494 */ 495 void __init setup_arch(char **cmdline_p) 496 { 497 ppc64_boot_msg(0x12, "Setup Arch"); 498 499 *cmdline_p = cmd_line; 500 501 /* 502 * Set cache line size based on type of cpu as a default. 503 * Systems with OF can look in the properties on the cpu node(s) 504 * for a possibly more accurate value. 505 */ 506 dcache_bsize = ppc64_caches.dline_size; 507 icache_bsize = ppc64_caches.iline_size; 508 509 /* reboot on panic */ 510 panic_timeout = 180; 511 512 if (ppc_md.panic) 513 setup_panic(); 514 515 init_mm.start_code = (unsigned long)_stext; 516 init_mm.end_code = (unsigned long) _etext; 517 init_mm.end_data = (unsigned long) _edata; 518 init_mm.brk = klimit; 519 520 irqstack_early_init(); 521 exc_lvl_early_init(); 522 emergency_stack_init(); 523 524 #ifdef CONFIG_PPC_STD_MMU_64 525 stabs_alloc(); 526 #endif 527 /* set up the bootmem stuff with available memory */ 528 do_init_bootmem(); 529 sparse_init(); 530 531 #ifdef CONFIG_DUMMY_CONSOLE 532 conswitchp = &dummy_con; 533 #endif 534 535 if (ppc_md.setup_arch) 536 ppc_md.setup_arch(); 537 538 paging_init(); 539 540 /* Initialize the MMU context management stuff */ 541 mmu_context_init(); 542 543 ppc64_boot_msg(0x15, "Setup Done"); 544 } 545 546 547 /* ToDo: do something useful if ppc_md is not yet setup. */ 548 #define PPC64_LINUX_FUNCTION 0x0f000000 549 #define PPC64_IPL_MESSAGE 0xc0000000 550 #define PPC64_TERM_MESSAGE 0xb0000000 551 552 static void ppc64_do_msg(unsigned int src, const char *msg) 553 { 554 if (ppc_md.progress) { 555 char buf[128]; 556 557 sprintf(buf, "%08X\n", src); 558 ppc_md.progress(buf, 0); 559 snprintf(buf, 128, "%s", msg); 560 ppc_md.progress(buf, 0); 561 } 562 } 563 564 /* Print a boot progress message. */ 565 void ppc64_boot_msg(unsigned int src, const char *msg) 566 { 567 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 568 printk("[boot]%04x %s\n", src, msg); 569 } 570 571 #ifdef CONFIG_SMP 572 #define PCPU_DYN_SIZE () 573 574 static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) 575 { 576 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, 577 __pa(MAX_DMA_ADDRESS)); 578 } 579 580 static void __init pcpu_fc_free(void *ptr, size_t size) 581 { 582 free_bootmem(__pa(ptr), size); 583 } 584 585 static int pcpu_cpu_distance(unsigned int from, unsigned int to) 586 { 587 if (cpu_to_node(from) == cpu_to_node(to)) 588 return LOCAL_DISTANCE; 589 else 590 return REMOTE_DISTANCE; 591 } 592 593 unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; 594 EXPORT_SYMBOL(__per_cpu_offset); 595 596 void __init setup_per_cpu_areas(void) 597 { 598 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; 599 size_t atom_size; 600 unsigned long delta; 601 unsigned int cpu; 602 int rc; 603 604 /* 605 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need 606 * to group units. For larger mappings, use 1M atom which 607 * should be large enough to contain a number of units. 608 */ 609 if (mmu_linear_psize == MMU_PAGE_4K) 610 atom_size = PAGE_SIZE; 611 else 612 atom_size = 1 << 20; 613 614 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, 615 pcpu_fc_alloc, pcpu_fc_free); 616 if (rc < 0) 617 panic("cannot initialize percpu area (err=%d)", rc); 618 619 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; 620 for_each_possible_cpu(cpu) { 621 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; 622 paca[cpu].data_offset = __per_cpu_offset[cpu]; 623 } 624 } 625 #endif 626 627 628 #ifdef CONFIG_PPC_INDIRECT_IO 629 struct ppc_pci_io ppc_pci_io; 630 EXPORT_SYMBOL(ppc_pci_io); 631 #endif /* CONFIG_PPC_INDIRECT_IO */ 632 633