1 /* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #undef DEBUG 14 15 #include <linux/config.h> 16 #include <linux/module.h> 17 #include <linux/string.h> 18 #include <linux/sched.h> 19 #include <linux/init.h> 20 #include <linux/kernel.h> 21 #include <linux/reboot.h> 22 #include <linux/delay.h> 23 #include <linux/initrd.h> 24 #include <linux/ide.h> 25 #include <linux/seq_file.h> 26 #include <linux/ioport.h> 27 #include <linux/console.h> 28 #include <linux/utsname.h> 29 #include <linux/tty.h> 30 #include <linux/root_dev.h> 31 #include <linux/notifier.h> 32 #include <linux/cpu.h> 33 #include <linux/unistd.h> 34 #include <linux/serial.h> 35 #include <linux/serial_8250.h> 36 #include <asm/io.h> 37 #include <asm/prom.h> 38 #include <asm/processor.h> 39 #include <asm/pgtable.h> 40 #include <asm/smp.h> 41 #include <asm/elf.h> 42 #include <asm/machdep.h> 43 #include <asm/paca.h> 44 #include <asm/time.h> 45 #include <asm/cputable.h> 46 #include <asm/sections.h> 47 #include <asm/btext.h> 48 #include <asm/nvram.h> 49 #include <asm/setup.h> 50 #include <asm/system.h> 51 #include <asm/rtas.h> 52 #include <asm/iommu.h> 53 #include <asm/serial.h> 54 #include <asm/cache.h> 55 #include <asm/page.h> 56 #include <asm/mmu.h> 57 #include <asm/lmb.h> 58 #include <asm/iseries/it_lp_naca.h> 59 #include <asm/firmware.h> 60 #include <asm/xmon.h> 61 #include <asm/udbg.h> 62 #include <asm/kexec.h> 63 64 #include "setup.h" 65 66 #ifdef DEBUG 67 #define DBG(fmt...) udbg_printf(fmt) 68 #else 69 #define DBG(fmt...) 70 #endif 71 72 /* 73 * Here are some early debugging facilities. You can enable one 74 * but your kernel will not boot on anything else if you do so 75 */ 76 77 /* This one is for use on LPAR machines that support an HVC console 78 * on vterm 0 79 */ 80 extern void udbg_init_debug_lpar(void); 81 /* This one is for use on Apple G5 machines 82 */ 83 extern void udbg_init_pmac_realmode(void); 84 /* That's RTAS panel debug */ 85 extern void call_rtas_display_status_delay(unsigned char c); 86 /* Here's maple real mode debug */ 87 extern void udbg_init_maple_realmode(void); 88 89 #define EARLY_DEBUG_INIT() do {} while(0) 90 91 #if 0 92 #define EARLY_DEBUG_INIT() udbg_init_debug_lpar() 93 #define EARLY_DEBUG_INIT() udbg_init_maple_realmode() 94 #define EARLY_DEBUG_INIT() udbg_init_pmac_realmode() 95 #define EARLY_DEBUG_INIT() \ 96 do { udbg_putc = call_rtas_display_status_delay; } while(0) 97 #endif 98 99 int have_of = 1; 100 int boot_cpuid = 0; 101 int boot_cpuid_phys = 0; 102 dev_t boot_dev; 103 u64 ppc64_pft_size; 104 105 /* Pick defaults since we might want to patch instructions 106 * before we've read this from the device tree. 107 */ 108 struct ppc64_caches ppc64_caches = { 109 .dline_size = 0x80, 110 .log_dline_size = 7, 111 .iline_size = 0x80, 112 .log_iline_size = 7 113 }; 114 EXPORT_SYMBOL_GPL(ppc64_caches); 115 116 /* 117 * These are used in binfmt_elf.c to put aux entries on the stack 118 * for each elf executable being started. 119 */ 120 int dcache_bsize; 121 int icache_bsize; 122 int ucache_bsize; 123 124 /* The main machine-dep calls structure 125 */ 126 struct machdep_calls ppc_md; 127 EXPORT_SYMBOL(ppc_md); 128 129 #ifdef CONFIG_MAGIC_SYSRQ 130 unsigned long SYSRQ_KEY; 131 #endif /* CONFIG_MAGIC_SYSRQ */ 132 133 134 static int ppc64_panic_event(struct notifier_block *, unsigned long, void *); 135 static struct notifier_block ppc64_panic_block = { 136 .notifier_call = ppc64_panic_event, 137 .priority = INT_MIN /* may not return; must be done last */ 138 }; 139 140 #ifdef CONFIG_SMP 141 142 static int smt_enabled_cmdline; 143 144 /* Look for ibm,smt-enabled OF option */ 145 static void check_smt_enabled(void) 146 { 147 struct device_node *dn; 148 char *smt_option; 149 150 /* Allow the command line to overrule the OF option */ 151 if (smt_enabled_cmdline) 152 return; 153 154 dn = of_find_node_by_path("/options"); 155 156 if (dn) { 157 smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL); 158 159 if (smt_option) { 160 if (!strcmp(smt_option, "on")) 161 smt_enabled_at_boot = 1; 162 else if (!strcmp(smt_option, "off")) 163 smt_enabled_at_boot = 0; 164 } 165 } 166 } 167 168 /* Look for smt-enabled= cmdline option */ 169 static int __init early_smt_enabled(char *p) 170 { 171 smt_enabled_cmdline = 1; 172 173 if (!p) 174 return 0; 175 176 if (!strcmp(p, "on") || !strcmp(p, "1")) 177 smt_enabled_at_boot = 1; 178 else if (!strcmp(p, "off") || !strcmp(p, "0")) 179 smt_enabled_at_boot = 0; 180 181 return 0; 182 } 183 early_param("smt-enabled", early_smt_enabled); 184 185 #else 186 #define check_smt_enabled() 187 #endif /* CONFIG_SMP */ 188 189 extern struct machdep_calls pSeries_md; 190 extern struct machdep_calls pmac_md; 191 extern struct machdep_calls maple_md; 192 extern struct machdep_calls cell_md; 193 extern struct machdep_calls iseries_md; 194 195 /* Ultimately, stuff them in an elf section like initcalls... */ 196 static struct machdep_calls __initdata *machines[] = { 197 #ifdef CONFIG_PPC_PSERIES 198 &pSeries_md, 199 #endif /* CONFIG_PPC_PSERIES */ 200 #ifdef CONFIG_PPC_PMAC 201 &pmac_md, 202 #endif /* CONFIG_PPC_PMAC */ 203 #ifdef CONFIG_PPC_MAPLE 204 &maple_md, 205 #endif /* CONFIG_PPC_MAPLE */ 206 #ifdef CONFIG_PPC_CELL 207 &cell_md, 208 #endif 209 #ifdef CONFIG_PPC_ISERIES 210 &iseries_md, 211 #endif 212 NULL 213 }; 214 215 /* 216 * Early initialization entry point. This is called by head.S 217 * with MMU translation disabled. We rely on the "feature" of 218 * the CPU that ignores the top 2 bits of the address in real 219 * mode so we can access kernel globals normally provided we 220 * only toy with things in the RMO region. From here, we do 221 * some early parsing of the device-tree to setup out LMB 222 * data structures, and allocate & initialize the hash table 223 * and segment tables so we can start running with translation 224 * enabled. 225 * 226 * It is this function which will call the probe() callback of 227 * the various platform types and copy the matching one to the 228 * global ppc_md structure. Your platform can eventually do 229 * some very early initializations from the probe() routine, but 230 * this is not recommended, be very careful as, for example, the 231 * device-tree is not accessible via normal means at this point. 232 */ 233 234 void __init early_setup(unsigned long dt_ptr) 235 { 236 struct paca_struct *lpaca = get_paca(); 237 static struct machdep_calls **mach; 238 239 /* 240 * Enable early debugging if any specified (see top of 241 * this file) 242 */ 243 EARLY_DEBUG_INIT(); 244 245 DBG(" -> early_setup()\n"); 246 247 /* 248 * Do early initializations using the flattened device 249 * tree, like retreiving the physical memory map or 250 * calculating/retreiving the hash table size 251 */ 252 early_init_devtree(__va(dt_ptr)); 253 254 /* 255 * Iterate all ppc_md structures until we find the proper 256 * one for the current machine type 257 */ 258 DBG("Probing machine type for platform %x...\n", _machine); 259 260 for (mach = machines; *mach; mach++) { 261 if ((*mach)->probe(_machine)) 262 break; 263 } 264 /* What can we do if we didn't find ? */ 265 if (*mach == NULL) { 266 DBG("No suitable machine found !\n"); 267 for (;;); 268 } 269 ppc_md = **mach; 270 271 DBG("Found, Initializing memory management...\n"); 272 273 /* 274 * Initialize the MMU Hash table and create the linear mapping 275 * of memory. Has to be done before stab/slb initialization as 276 * this is currently where the page size encoding is obtained 277 */ 278 htab_initialize(); 279 280 /* 281 * Initialize stab / SLB management except on iSeries 282 */ 283 if (!firmware_has_feature(FW_FEATURE_ISERIES)) { 284 if (cpu_has_feature(CPU_FTR_SLB)) 285 slb_initialize(); 286 else 287 stab_initialize(lpaca->stab_real); 288 } 289 290 DBG(" <- early_setup()\n"); 291 } 292 293 #ifdef CONFIG_SMP 294 void early_setup_secondary(void) 295 { 296 struct paca_struct *lpaca = get_paca(); 297 298 /* Mark enabled in PACA */ 299 lpaca->proc_enabled = 0; 300 301 /* Initialize hash table for that CPU */ 302 htab_initialize_secondary(); 303 304 /* Initialize STAB/SLB. We use a virtual address as it works 305 * in real mode on pSeries and we want a virutal address on 306 * iSeries anyway 307 */ 308 if (cpu_has_feature(CPU_FTR_SLB)) 309 slb_initialize(); 310 else 311 stab_initialize(lpaca->stab_addr); 312 } 313 314 #endif /* CONFIG_SMP */ 315 316 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 317 void smp_release_cpus(void) 318 { 319 extern unsigned long __secondary_hold_spinloop; 320 321 DBG(" -> smp_release_cpus()\n"); 322 323 /* All secondary cpus are spinning on a common spinloop, release them 324 * all now so they can start to spin on their individual paca 325 * spinloops. For non SMP kernels, the secondary cpus never get out 326 * of the common spinloop. 327 * This is useless but harmless on iSeries, secondaries are already 328 * waiting on their paca spinloops. */ 329 330 __secondary_hold_spinloop = 1; 331 mb(); 332 333 DBG(" <- smp_release_cpus()\n"); 334 } 335 #else 336 #define smp_release_cpus() 337 #endif /* CONFIG_SMP || CONFIG_KEXEC */ 338 339 /* 340 * Initialize some remaining members of the ppc64_caches and systemcfg 341 * structures 342 * (at least until we get rid of them completely). This is mostly some 343 * cache informations about the CPU that will be used by cache flush 344 * routines and/or provided to userland 345 */ 346 static void __init initialize_cache_info(void) 347 { 348 struct device_node *np; 349 unsigned long num_cpus = 0; 350 351 DBG(" -> initialize_cache_info()\n"); 352 353 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 354 num_cpus += 1; 355 356 /* We're assuming *all* of the CPUs have the same 357 * d-cache and i-cache sizes... -Peter 358 */ 359 360 if ( num_cpus == 1 ) { 361 u32 *sizep, *lsizep; 362 u32 size, lsize; 363 const char *dc, *ic; 364 365 /* Then read cache informations */ 366 if (_machine == PLATFORM_POWERMAC) { 367 dc = "d-cache-block-size"; 368 ic = "i-cache-block-size"; 369 } else { 370 dc = "d-cache-line-size"; 371 ic = "i-cache-line-size"; 372 } 373 374 size = 0; 375 lsize = cur_cpu_spec->dcache_bsize; 376 sizep = (u32 *)get_property(np, "d-cache-size", NULL); 377 if (sizep != NULL) 378 size = *sizep; 379 lsizep = (u32 *) get_property(np, dc, NULL); 380 if (lsizep != NULL) 381 lsize = *lsizep; 382 if (sizep == 0 || lsizep == 0) 383 DBG("Argh, can't find dcache properties ! " 384 "sizep: %p, lsizep: %p\n", sizep, lsizep); 385 386 ppc64_caches.dsize = size; 387 ppc64_caches.dline_size = lsize; 388 ppc64_caches.log_dline_size = __ilog2(lsize); 389 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 390 391 size = 0; 392 lsize = cur_cpu_spec->icache_bsize; 393 sizep = (u32 *)get_property(np, "i-cache-size", NULL); 394 if (sizep != NULL) 395 size = *sizep; 396 lsizep = (u32 *)get_property(np, ic, NULL); 397 if (lsizep != NULL) 398 lsize = *lsizep; 399 if (sizep == 0 || lsizep == 0) 400 DBG("Argh, can't find icache properties ! " 401 "sizep: %p, lsizep: %p\n", sizep, lsizep); 402 403 ppc64_caches.isize = size; 404 ppc64_caches.iline_size = lsize; 405 ppc64_caches.log_iline_size = __ilog2(lsize); 406 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 407 } 408 } 409 410 DBG(" <- initialize_cache_info()\n"); 411 } 412 413 414 /* 415 * Do some initial setup of the system. The parameters are those which 416 * were passed in from the bootloader. 417 */ 418 void __init setup_system(void) 419 { 420 DBG(" -> setup_system()\n"); 421 422 /* 423 * Unflatten the device-tree passed by prom_init or kexec 424 */ 425 unflatten_device_tree(); 426 427 #ifdef CONFIG_KEXEC 428 kexec_setup(); /* requires unflattened device tree. */ 429 #endif 430 431 /* 432 * Fill the ppc64_caches & systemcfg structures with informations 433 * retreived from the device-tree. Need to be called before 434 * finish_device_tree() since the later requires some of the 435 * informations filled up here to properly parse the interrupt 436 * tree. 437 * It also sets up the cache line sizes which allows to call 438 * routines like flush_icache_range (used by the hash init 439 * later on). 440 */ 441 initialize_cache_info(); 442 443 #ifdef CONFIG_PPC_RTAS 444 /* 445 * Initialize RTAS if available 446 */ 447 rtas_initialize(); 448 #endif /* CONFIG_PPC_RTAS */ 449 450 /* 451 * Check if we have an initrd provided via the device-tree 452 */ 453 check_for_initrd(); 454 455 /* 456 * Do some platform specific early initializations, that includes 457 * setting up the hash table pointers. It also sets up some interrupt-mapping 458 * related options that will be used by finish_device_tree() 459 */ 460 ppc_md.init_early(); 461 462 /* 463 * "Finish" the device-tree, that is do the actual parsing of 464 * some of the properties like the interrupt map 465 */ 466 finish_device_tree(); 467 468 #ifdef CONFIG_BOOTX_TEXT 469 init_boot_display(); 470 #endif 471 472 /* 473 * Initialize xmon 474 */ 475 #ifdef CONFIG_XMON_DEFAULT 476 xmon_init(1); 477 #endif 478 /* 479 * Register early console 480 */ 481 register_early_udbg_console(); 482 483 /* Save unparsed command line copy for /proc/cmdline */ 484 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE); 485 486 parse_early_param(); 487 488 check_smt_enabled(); 489 smp_setup_cpu_maps(); 490 491 /* Release secondary cpus out of their spinloops at 0x60 now that 492 * we can map physical -> logical CPU ids 493 */ 494 smp_release_cpus(); 495 496 printk("Starting Linux PPC64 %s\n", system_utsname.version); 497 498 printk("-----------------------------------------------------\n"); 499 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); 500 printk("ppc64_interrupt_controller = 0x%ld\n", 501 ppc64_interrupt_controller); 502 printk("platform = 0x%x\n", _machine); 503 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); 504 printk("ppc64_caches.dcache_line_size = 0x%x\n", 505 ppc64_caches.dline_size); 506 printk("ppc64_caches.icache_line_size = 0x%x\n", 507 ppc64_caches.iline_size); 508 printk("htab_address = 0x%p\n", htab_address); 509 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 510 printk("-----------------------------------------------------\n"); 511 512 mm_init_ppc64(); 513 514 DBG(" <- setup_system()\n"); 515 } 516 517 static int ppc64_panic_event(struct notifier_block *this, 518 unsigned long event, void *ptr) 519 { 520 ppc_md.panic((char *)ptr); /* May not return */ 521 return NOTIFY_DONE; 522 } 523 524 #ifdef CONFIG_IRQSTACKS 525 static void __init irqstack_early_init(void) 526 { 527 unsigned int i; 528 529 /* 530 * interrupt stacks must be under 256MB, we cannot afford to take 531 * SLB misses on them. 532 */ 533 for_each_cpu(i) { 534 softirq_ctx[i] = (struct thread_info *) 535 __va(lmb_alloc_base(THREAD_SIZE, 536 THREAD_SIZE, 0x10000000)); 537 hardirq_ctx[i] = (struct thread_info *) 538 __va(lmb_alloc_base(THREAD_SIZE, 539 THREAD_SIZE, 0x10000000)); 540 } 541 } 542 #else 543 #define irqstack_early_init() 544 #endif 545 546 /* 547 * Stack space used when we detect a bad kernel stack pointer, and 548 * early in SMP boots before relocation is enabled. 549 */ 550 static void __init emergency_stack_init(void) 551 { 552 unsigned long limit; 553 unsigned int i; 554 555 /* 556 * Emergency stacks must be under 256MB, we cannot afford to take 557 * SLB misses on them. The ABI also requires them to be 128-byte 558 * aligned. 559 * 560 * Since we use these as temporary stacks during secondary CPU 561 * bringup, we need to get at them in real mode. This means they 562 * must also be within the RMO region. 563 */ 564 limit = min(0x10000000UL, lmb.rmo_size); 565 566 for_each_cpu(i) 567 paca[i].emergency_sp = 568 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE; 569 } 570 571 /* 572 * Called into from start_kernel, after lock_kernel has been called. 573 * Initializes bootmem, which is unsed to manage page allocation until 574 * mem_init is called. 575 */ 576 void __init setup_arch(char **cmdline_p) 577 { 578 extern void do_init_bootmem(void); 579 580 ppc64_boot_msg(0x12, "Setup Arch"); 581 582 *cmdline_p = cmd_line; 583 584 /* 585 * Set cache line size based on type of cpu as a default. 586 * Systems with OF can look in the properties on the cpu node(s) 587 * for a possibly more accurate value. 588 */ 589 dcache_bsize = ppc64_caches.dline_size; 590 icache_bsize = ppc64_caches.iline_size; 591 592 /* reboot on panic */ 593 panic_timeout = 180; 594 595 if (ppc_md.panic) 596 notifier_chain_register(&panic_notifier_list, &ppc64_panic_block); 597 598 init_mm.start_code = PAGE_OFFSET; 599 init_mm.end_code = (unsigned long) _etext; 600 init_mm.end_data = (unsigned long) _edata; 601 init_mm.brk = klimit; 602 603 irqstack_early_init(); 604 emergency_stack_init(); 605 606 stabs_alloc(); 607 608 /* set up the bootmem stuff with available memory */ 609 do_init_bootmem(); 610 sparse_init(); 611 612 #ifdef CONFIG_DUMMY_CONSOLE 613 conswitchp = &dummy_con; 614 #endif 615 616 ppc_md.setup_arch(); 617 618 /* Use the default idle loop if the platform hasn't provided one. */ 619 if (NULL == ppc_md.idle_loop) { 620 ppc_md.idle_loop = default_idle; 621 printk(KERN_INFO "Using default idle loop\n"); 622 } 623 624 paging_init(); 625 ppc64_boot_msg(0x15, "Setup Done"); 626 } 627 628 629 /* ToDo: do something useful if ppc_md is not yet setup. */ 630 #define PPC64_LINUX_FUNCTION 0x0f000000 631 #define PPC64_IPL_MESSAGE 0xc0000000 632 #define PPC64_TERM_MESSAGE 0xb0000000 633 634 static void ppc64_do_msg(unsigned int src, const char *msg) 635 { 636 if (ppc_md.progress) { 637 char buf[128]; 638 639 sprintf(buf, "%08X\n", src); 640 ppc_md.progress(buf, 0); 641 snprintf(buf, 128, "%s", msg); 642 ppc_md.progress(buf, 0); 643 } 644 } 645 646 /* Print a boot progress message. */ 647 void ppc64_boot_msg(unsigned int src, const char *msg) 648 { 649 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 650 printk("[boot]%04x %s\n", src, msg); 651 } 652 653 /* Print a termination message (print only -- does not stop the kernel) */ 654 void ppc64_terminate_msg(unsigned int src, const char *msg) 655 { 656 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); 657 printk("[terminate]%04x %s\n", src, msg); 658 } 659 660 #ifndef CONFIG_PPC_ISERIES 661 /* 662 * This function can be used by platforms to "find" legacy serial ports. 663 * It works for "serial" nodes under an "isa" node, and will try to 664 * respect the "ibm,aix-loc" property if any. It works with up to 8 665 * ports. 666 */ 667 668 #define MAX_LEGACY_SERIAL_PORTS 8 669 static struct plat_serial8250_port serial_ports[MAX_LEGACY_SERIAL_PORTS+1]; 670 static unsigned int old_serial_count; 671 672 void __init generic_find_legacy_serial_ports(u64 *physport, 673 unsigned int *default_speed) 674 { 675 struct device_node *np; 676 u32 *sizeprop; 677 678 struct isa_reg_property { 679 u32 space; 680 u32 address; 681 u32 size; 682 }; 683 struct pci_reg_property { 684 struct pci_address addr; 685 u32 size_hi; 686 u32 size_lo; 687 }; 688 689 DBG(" -> generic_find_legacy_serial_port()\n"); 690 691 *physport = 0; 692 if (default_speed) 693 *default_speed = 0; 694 695 np = of_find_node_by_path("/"); 696 if (!np) 697 return; 698 699 /* First fill our array */ 700 for (np = NULL; (np = of_find_node_by_type(np, "serial"));) { 701 struct device_node *isa, *pci; 702 struct isa_reg_property *reg; 703 unsigned long phys_size, addr_size, io_base; 704 u32 *rangesp; 705 u32 *interrupts, *clk, *spd; 706 char *typep; 707 int index, rlen, rentsize; 708 709 /* Ok, first check if it's under an "isa" parent */ 710 isa = of_get_parent(np); 711 if (!isa || strcmp(isa->name, "isa")) { 712 DBG("%s: no isa parent found\n", np->full_name); 713 continue; 714 } 715 716 /* Now look for an "ibm,aix-loc" property that gives us ordering 717 * if any... 718 */ 719 typep = (char *)get_property(np, "ibm,aix-loc", NULL); 720 721 /* Get the ISA port number */ 722 reg = (struct isa_reg_property *)get_property(np, "reg", NULL); 723 if (reg == NULL) 724 goto next_port; 725 /* We assume the interrupt number isn't translated ... */ 726 interrupts = (u32 *)get_property(np, "interrupts", NULL); 727 /* get clock freq. if present */ 728 clk = (u32 *)get_property(np, "clock-frequency", NULL); 729 /* get default speed if present */ 730 spd = (u32 *)get_property(np, "current-speed", NULL); 731 /* Default to locate at end of array */ 732 index = old_serial_count; /* end of the array by default */ 733 734 /* If we have a location index, then use it */ 735 if (typep && *typep == 'S') { 736 index = simple_strtol(typep+1, NULL, 0) - 1; 737 /* if index is out of range, use end of array instead */ 738 if (index >= MAX_LEGACY_SERIAL_PORTS) 739 index = old_serial_count; 740 /* if our index is still out of range, that mean that 741 * array is full, we could scan for a free slot but that 742 * make little sense to bother, just skip the port 743 */ 744 if (index >= MAX_LEGACY_SERIAL_PORTS) 745 goto next_port; 746 if (index >= old_serial_count) 747 old_serial_count = index + 1; 748 /* Check if there is a port who already claimed our slot */ 749 if (serial_ports[index].iobase != 0) { 750 /* if we still have some room, move it, else override */ 751 if (old_serial_count < MAX_LEGACY_SERIAL_PORTS) { 752 DBG("Moved legacy port %d -> %d\n", index, 753 old_serial_count); 754 serial_ports[old_serial_count++] = 755 serial_ports[index]; 756 } else { 757 DBG("Replacing legacy port %d\n", index); 758 } 759 } 760 } 761 if (index >= MAX_LEGACY_SERIAL_PORTS) 762 goto next_port; 763 if (index >= old_serial_count) 764 old_serial_count = index + 1; 765 766 /* Now fill the entry */ 767 memset(&serial_ports[index], 0, sizeof(struct plat_serial8250_port)); 768 serial_ports[index].uartclk = clk ? *clk : BASE_BAUD * 16; 769 serial_ports[index].iobase = reg->address; 770 serial_ports[index].irq = interrupts ? interrupts[0] : 0; 771 serial_ports[index].flags = ASYNC_BOOT_AUTOCONF; 772 773 DBG("Added legacy port, index: %d, port: %x, irq: %d, clk: %d\n", 774 index, 775 serial_ports[index].iobase, 776 serial_ports[index].irq, 777 serial_ports[index].uartclk); 778 779 /* Get phys address of IO reg for port 1 */ 780 if (index != 0) 781 goto next_port; 782 783 pci = of_get_parent(isa); 784 if (!pci) { 785 DBG("%s: no pci parent found\n", np->full_name); 786 goto next_port; 787 } 788 789 rangesp = (u32 *)get_property(pci, "ranges", &rlen); 790 if (rangesp == NULL) { 791 of_node_put(pci); 792 goto next_port; 793 } 794 rlen /= 4; 795 796 /* we need the #size-cells of the PCI bridge node itself */ 797 phys_size = 1; 798 sizeprop = (u32 *)get_property(pci, "#size-cells", NULL); 799 if (sizeprop != NULL) 800 phys_size = *sizeprop; 801 /* we need the parent #addr-cells */ 802 addr_size = prom_n_addr_cells(pci); 803 rentsize = 3 + addr_size + phys_size; 804 io_base = 0; 805 for (;rlen >= rentsize; rlen -= rentsize,rangesp += rentsize) { 806 if (((rangesp[0] >> 24) & 0x3) != 1) 807 continue; /* not IO space */ 808 io_base = rangesp[3]; 809 if (addr_size == 2) 810 io_base = (io_base << 32) | rangesp[4]; 811 } 812 if (io_base != 0) { 813 *physport = io_base + reg->address; 814 if (default_speed && spd) 815 *default_speed = *spd; 816 } 817 of_node_put(pci); 818 next_port: 819 of_node_put(isa); 820 } 821 822 DBG(" <- generic_find_legacy_serial_port()\n"); 823 } 824 825 static struct platform_device serial_device = { 826 .name = "serial8250", 827 .id = PLAT8250_DEV_PLATFORM, 828 .dev = { 829 .platform_data = serial_ports, 830 }, 831 }; 832 833 static int __init serial_dev_init(void) 834 { 835 return platform_device_register(&serial_device); 836 } 837 arch_initcall(serial_dev_init); 838 839 #endif /* CONFIG_PPC_ISERIES */ 840 841 int check_legacy_ioport(unsigned long base_port) 842 { 843 if (ppc_md.check_legacy_ioport == NULL) 844 return 0; 845 return ppc_md.check_legacy_ioport(base_port); 846 } 847 EXPORT_SYMBOL(check_legacy_ioport); 848 849 void cpu_die(void) 850 { 851 if (ppc_md.cpu_die) 852 ppc_md.cpu_die(); 853 } 854