1 /* 2 * Common prep/pmac/chrp boot and setup code. 3 */ 4 5 #include <linux/module.h> 6 #include <linux/string.h> 7 #include <linux/sched.h> 8 #include <linux/init.h> 9 #include <linux/kernel.h> 10 #include <linux/reboot.h> 11 #include <linux/delay.h> 12 #include <linux/initrd.h> 13 #include <linux/tty.h> 14 #include <linux/bootmem.h> 15 #include <linux/seq_file.h> 16 #include <linux/root_dev.h> 17 #include <linux/cpu.h> 18 #include <linux/console.h> 19 #include <linux/lmb.h> 20 21 #include <asm/io.h> 22 #include <asm/prom.h> 23 #include <asm/processor.h> 24 #include <asm/pgtable.h> 25 #include <asm/setup.h> 26 #include <asm/smp.h> 27 #include <asm/elf.h> 28 #include <asm/cputable.h> 29 #include <asm/bootx.h> 30 #include <asm/btext.h> 31 #include <asm/machdep.h> 32 #include <asm/uaccess.h> 33 #include <asm/system.h> 34 #include <asm/pmac_feature.h> 35 #include <asm/sections.h> 36 #include <asm/nvram.h> 37 #include <asm/xmon.h> 38 #include <asm/time.h> 39 #include <asm/serial.h> 40 #include <asm/udbg.h> 41 #include <asm/mmu_context.h> 42 #include <asm/swiotlb.h> 43 44 #include "setup.h" 45 46 #define DBG(fmt...) 47 48 extern void bootx_init(unsigned long r4, unsigned long phys); 49 50 int boot_cpuid; 51 EXPORT_SYMBOL_GPL(boot_cpuid); 52 int boot_cpuid_phys; 53 54 int smp_hw_index[NR_CPUS]; 55 56 unsigned long ISA_DMA_THRESHOLD; 57 unsigned int DMA_MODE_READ; 58 unsigned int DMA_MODE_WRITE; 59 60 #ifdef CONFIG_VGA_CONSOLE 61 unsigned long vgacon_remap_base; 62 EXPORT_SYMBOL(vgacon_remap_base); 63 #endif 64 65 /* 66 * These are used in binfmt_elf.c to put aux entries on the stack 67 * for each elf executable being started. 68 */ 69 int dcache_bsize; 70 int icache_bsize; 71 int ucache_bsize; 72 73 /* 74 * We're called here very early in the boot. We determine the machine 75 * type and call the appropriate low-level setup functions. 76 * -- Cort <cort@fsmlabs.com> 77 * 78 * Note that the kernel may be running at an address which is different 79 * from the address that it was linked at, so we must use RELOC/PTRRELOC 80 * to access static data (including strings). -- paulus 81 */ 82 notrace unsigned long __init early_init(unsigned long dt_ptr) 83 { 84 unsigned long offset = reloc_offset(); 85 struct cpu_spec *spec; 86 87 /* First zero the BSS -- use memset_io, some platforms don't have 88 * caches on yet */ 89 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, 90 __bss_stop - __bss_start); 91 92 /* 93 * Identify the CPU type and fix up code sections 94 * that depend on which cpu we have. 95 */ 96 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 97 98 do_feature_fixups(spec->cpu_features, 99 PTRRELOC(&__start___ftr_fixup), 100 PTRRELOC(&__stop___ftr_fixup)); 101 102 do_feature_fixups(spec->mmu_features, 103 PTRRELOC(&__start___mmu_ftr_fixup), 104 PTRRELOC(&__stop___mmu_ftr_fixup)); 105 106 do_lwsync_fixups(spec->cpu_features, 107 PTRRELOC(&__start___lwsync_fixup), 108 PTRRELOC(&__stop___lwsync_fixup)); 109 110 return KERNELBASE + offset; 111 } 112 113 114 /* 115 * Find out what kind of machine we're on and save any data we need 116 * from the early boot process (devtree is copied on pmac by prom_init()). 117 * This is called very early on the boot process, after a minimal 118 * MMU environment has been set up but before MMU_init is called. 119 */ 120 notrace void __init machine_init(unsigned long dt_ptr) 121 { 122 /* Enable early debugging if any specified (see udbg.h) */ 123 udbg_early_init(); 124 125 /* Do some early initialization based on the flat device tree */ 126 early_init_devtree(__va(dt_ptr)); 127 128 probe_machine(); 129 130 setup_kdump_trampoline(); 131 132 #ifdef CONFIG_6xx 133 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 134 cpu_has_feature(CPU_FTR_CAN_NAP)) 135 ppc_md.power_save = ppc6xx_idle; 136 #endif 137 138 #ifdef CONFIG_E500 139 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 140 cpu_has_feature(CPU_FTR_CAN_NAP)) 141 ppc_md.power_save = e500_idle; 142 #endif 143 if (ppc_md.progress) 144 ppc_md.progress("id mach(): done", 0x200); 145 } 146 147 #ifdef CONFIG_BOOKE_WDT 148 /* Checks wdt=x and wdt_period=xx command-line option */ 149 notrace int __init early_parse_wdt(char *p) 150 { 151 if (p && strncmp(p, "0", 1) != 0) 152 booke_wdt_enabled = 1; 153 154 return 0; 155 } 156 early_param("wdt", early_parse_wdt); 157 158 int __init early_parse_wdt_period (char *p) 159 { 160 if (p) 161 booke_wdt_period = simple_strtoul(p, NULL, 0); 162 163 return 0; 164 } 165 early_param("wdt_period", early_parse_wdt_period); 166 #endif /* CONFIG_BOOKE_WDT */ 167 168 /* Checks "l2cr=xxxx" command-line option */ 169 int __init ppc_setup_l2cr(char *str) 170 { 171 if (cpu_has_feature(CPU_FTR_L2CR)) { 172 unsigned long val = simple_strtoul(str, NULL, 0); 173 printk(KERN_INFO "l2cr set to %lx\n", val); 174 _set_L2CR(0); /* force invalidate by disable cache */ 175 _set_L2CR(val); /* and enable it */ 176 } 177 return 1; 178 } 179 __setup("l2cr=", ppc_setup_l2cr); 180 181 /* Checks "l3cr=xxxx" command-line option */ 182 int __init ppc_setup_l3cr(char *str) 183 { 184 if (cpu_has_feature(CPU_FTR_L3CR)) { 185 unsigned long val = simple_strtoul(str, NULL, 0); 186 printk(KERN_INFO "l3cr set to %lx\n", val); 187 _set_L3CR(val); /* and enable it */ 188 } 189 return 1; 190 } 191 __setup("l3cr=", ppc_setup_l3cr); 192 193 #ifdef CONFIG_GENERIC_NVRAM 194 195 /* Generic nvram hooks used by drivers/char/gen_nvram.c */ 196 unsigned char nvram_read_byte(int addr) 197 { 198 if (ppc_md.nvram_read_val) 199 return ppc_md.nvram_read_val(addr); 200 return 0xff; 201 } 202 EXPORT_SYMBOL(nvram_read_byte); 203 204 void nvram_write_byte(unsigned char val, int addr) 205 { 206 if (ppc_md.nvram_write_val) 207 ppc_md.nvram_write_val(addr, val); 208 } 209 EXPORT_SYMBOL(nvram_write_byte); 210 211 void nvram_sync(void) 212 { 213 if (ppc_md.nvram_sync) 214 ppc_md.nvram_sync(); 215 } 216 EXPORT_SYMBOL(nvram_sync); 217 218 #endif /* CONFIG_NVRAM */ 219 220 int __init ppc_init(void) 221 { 222 /* clear the progress line */ 223 if (ppc_md.progress) 224 ppc_md.progress(" ", 0xffff); 225 226 /* call platform init */ 227 if (ppc_md.init != NULL) { 228 ppc_md.init(); 229 } 230 return 0; 231 } 232 233 arch_initcall(ppc_init); 234 235 #ifdef CONFIG_IRQSTACKS 236 static void __init irqstack_early_init(void) 237 { 238 unsigned int i; 239 240 /* interrupt stacks must be in lowmem, we get that for free on ppc32 241 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ 242 for_each_possible_cpu(i) { 243 softirq_ctx[i] = (struct thread_info *) 244 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 245 hardirq_ctx[i] = (struct thread_info *) 246 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 247 } 248 } 249 #else 250 #define irqstack_early_init() 251 #endif 252 253 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 254 static void __init exc_lvl_early_init(void) 255 { 256 unsigned int i; 257 258 /* interrupt stacks must be in lowmem, we get that for free on ppc32 259 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ 260 for_each_possible_cpu(i) { 261 critirq_ctx[i] = (struct thread_info *) 262 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 263 #ifdef CONFIG_BOOKE 264 dbgirq_ctx[i] = (struct thread_info *) 265 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 266 mcheckirq_ctx[i] = (struct thread_info *) 267 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 268 #endif 269 } 270 } 271 #else 272 #define exc_lvl_early_init() 273 #endif 274 275 /* Warning, IO base is not yet inited */ 276 void __init setup_arch(char **cmdline_p) 277 { 278 *cmdline_p = cmd_line; 279 280 /* so udelay does something sensible, assume <= 1000 bogomips */ 281 loops_per_jiffy = 500000000 / HZ; 282 283 unflatten_device_tree(); 284 check_for_initrd(); 285 286 if (ppc_md.init_early) 287 ppc_md.init_early(); 288 289 find_legacy_serial_ports(); 290 291 smp_setup_cpu_maps(); 292 293 /* Register early console */ 294 register_early_udbg_console(); 295 296 xmon_setup(); 297 298 /* 299 * Set cache line size based on type of cpu as a default. 300 * Systems with OF can look in the properties on the cpu node(s) 301 * for a possibly more accurate value. 302 */ 303 dcache_bsize = cur_cpu_spec->dcache_bsize; 304 icache_bsize = cur_cpu_spec->icache_bsize; 305 ucache_bsize = 0; 306 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) 307 ucache_bsize = icache_bsize = dcache_bsize; 308 309 /* reboot on panic */ 310 panic_timeout = 180; 311 312 if (ppc_md.panic) 313 setup_panic(); 314 315 init_mm.start_code = (unsigned long)_stext; 316 init_mm.end_code = (unsigned long) _etext; 317 init_mm.end_data = (unsigned long) _edata; 318 init_mm.brk = klimit; 319 320 exc_lvl_early_init(); 321 322 irqstack_early_init(); 323 324 /* set up the bootmem stuff with available memory */ 325 do_init_bootmem(); 326 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); 327 328 #ifdef CONFIG_DUMMY_CONSOLE 329 conswitchp = &dummy_con; 330 #endif 331 332 if (ppc_md.setup_arch) 333 ppc_md.setup_arch(); 334 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 335 336 #ifdef CONFIG_SWIOTLB 337 if (ppc_swiotlb_enable) 338 swiotlb_init(); 339 #endif 340 341 paging_init(); 342 343 /* Initialize the MMU context management stuff */ 344 mmu_context_init(); 345 346 } 347