xref: /linux/arch/powerpc/kernel/setup_32.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84)
1 /*
2  * Common prep/pmac/chrp boot and setup code.
3  */
4 
5 #include <linux/config.h>
6 #include <linux/module.h>
7 #include <linux/string.h>
8 #include <linux/sched.h>
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/reboot.h>
12 #include <linux/delay.h>
13 #include <linux/initrd.h>
14 #include <linux/ide.h>
15 #include <linux/tty.h>
16 #include <linux/bootmem.h>
17 #include <linux/seq_file.h>
18 #include <linux/root_dev.h>
19 #include <linux/cpu.h>
20 #include <linux/console.h>
21 
22 #include <asm/residual.h>
23 #include <asm/io.h>
24 #include <asm/prom.h>
25 #include <asm/processor.h>
26 #include <asm/pgtable.h>
27 #include <asm/setup.h>
28 #include <asm/amigappc.h>
29 #include <asm/smp.h>
30 #include <asm/elf.h>
31 #include <asm/cputable.h>
32 #include <asm/bootx.h>
33 #include <asm/btext.h>
34 #include <asm/machdep.h>
35 #include <asm/uaccess.h>
36 #include <asm/system.h>
37 #include <asm/pmac_feature.h>
38 #include <asm/sections.h>
39 #include <asm/nvram.h>
40 #include <asm/xmon.h>
41 #include <asm/time.h>
42 #include <asm/serial.h>
43 #include <asm/udbg.h>
44 
45 #include "setup.h"
46 
47 #define DBG(fmt...)
48 
49 #if defined CONFIG_KGDB
50 #include <asm/kgdb.h>
51 #endif
52 
53 extern void bootx_init(unsigned long r4, unsigned long phys);
54 
55 boot_infos_t *boot_infos;
56 struct ide_machdep_calls ppc_ide_md;
57 
58 int boot_cpuid;
59 EXPORT_SYMBOL_GPL(boot_cpuid);
60 int boot_cpuid_phys;
61 
62 unsigned long ISA_DMA_THRESHOLD;
63 unsigned int DMA_MODE_READ;
64 unsigned int DMA_MODE_WRITE;
65 
66 int have_of = 1;
67 
68 #ifdef CONFIG_PPC_MULTIPLATFORM
69 dev_t boot_dev;
70 #endif /* CONFIG_PPC_MULTIPLATFORM */
71 
72 #ifdef CONFIG_MAGIC_SYSRQ
73 unsigned long SYSRQ_KEY = 0x54;
74 #endif /* CONFIG_MAGIC_SYSRQ */
75 
76 #ifdef CONFIG_VGA_CONSOLE
77 unsigned long vgacon_remap_base;
78 #endif
79 
80 /*
81  * These are used in binfmt_elf.c to put aux entries on the stack
82  * for each elf executable being started.
83  */
84 int dcache_bsize;
85 int icache_bsize;
86 int ucache_bsize;
87 
88 /*
89  * We're called here very early in the boot.  We determine the machine
90  * type and call the appropriate low-level setup functions.
91  *  -- Cort <cort@fsmlabs.com>
92  *
93  * Note that the kernel may be running at an address which is different
94  * from the address that it was linked at, so we must use RELOC/PTRRELOC
95  * to access static data (including strings).  -- paulus
96  */
97 unsigned long __init early_init(unsigned long dt_ptr)
98 {
99 	unsigned long offset = reloc_offset();
100 
101 	/* First zero the BSS -- use memset_io, some platforms don't have
102 	 * caches on yet */
103 	memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
104 
105 	/*
106 	 * Identify the CPU type and fix up code sections
107 	 * that depend on which cpu we have.
108 	 */
109 	identify_cpu(offset, 0);
110 	do_cpu_ftr_fixups(offset);
111 
112 	return KERNELBASE + offset;
113 }
114 
115 
116 /*
117  * Find out what kind of machine we're on and save any data we need
118  * from the early boot process (devtree is copied on pmac by prom_init()).
119  * This is called very early on the boot process, after a minimal
120  * MMU environment has been set up but before MMU_init is called.
121  */
122 void __init machine_init(unsigned long dt_ptr, unsigned long phys)
123 {
124 	/* If btext is enabled, we might have a BAT setup for early display,
125 	 * thus we do enable some very basic udbg output
126 	 */
127 #ifdef CONFIG_BOOTX_TEXT
128 	udbg_putc = btext_drawchar;
129 #endif
130 
131 	/* Do some early initialization based on the flat device tree */
132 	early_init_devtree(__va(dt_ptr));
133 
134 	probe_machine();
135 
136 #ifdef CONFIG_6xx
137 	if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
138 	    cpu_has_feature(CPU_FTR_CAN_NAP))
139 		ppc_md.power_save = ppc6xx_idle;
140 #endif
141 
142 	if (ppc_md.progress)
143 		ppc_md.progress("id mach(): done", 0x200);
144 }
145 
146 #ifdef CONFIG_BOOKE_WDT
147 /* Checks wdt=x and wdt_period=xx command-line option */
148 int __init early_parse_wdt(char *p)
149 {
150 	if (p && strncmp(p, "0", 1) != 0)
151 	       booke_wdt_enabled = 1;
152 
153 	return 0;
154 }
155 early_param("wdt", early_parse_wdt);
156 
157 int __init early_parse_wdt_period (char *p)
158 {
159 	if (p)
160 		booke_wdt_period = simple_strtoul(p, NULL, 0);
161 
162 	return 0;
163 }
164 early_param("wdt_period", early_parse_wdt_period);
165 #endif	/* CONFIG_BOOKE_WDT */
166 
167 /* Checks "l2cr=xxxx" command-line option */
168 int __init ppc_setup_l2cr(char *str)
169 {
170 	if (cpu_has_feature(CPU_FTR_L2CR)) {
171 		unsigned long val = simple_strtoul(str, NULL, 0);
172 		printk(KERN_INFO "l2cr set to %lx\n", val);
173 		_set_L2CR(0);		/* force invalidate by disable cache */
174 		_set_L2CR(val);		/* and enable it */
175 	}
176 	return 1;
177 }
178 __setup("l2cr=", ppc_setup_l2cr);
179 
180 #ifdef CONFIG_GENERIC_NVRAM
181 
182 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
183 unsigned char nvram_read_byte(int addr)
184 {
185 	if (ppc_md.nvram_read_val)
186 		return ppc_md.nvram_read_val(addr);
187 	return 0xff;
188 }
189 EXPORT_SYMBOL(nvram_read_byte);
190 
191 void nvram_write_byte(unsigned char val, int addr)
192 {
193 	if (ppc_md.nvram_write_val)
194 		ppc_md.nvram_write_val(addr, val);
195 }
196 EXPORT_SYMBOL(nvram_write_byte);
197 
198 void nvram_sync(void)
199 {
200 	if (ppc_md.nvram_sync)
201 		ppc_md.nvram_sync();
202 }
203 EXPORT_SYMBOL(nvram_sync);
204 
205 #endif /* CONFIG_NVRAM */
206 
207 static struct cpu cpu_devices[NR_CPUS];
208 
209 int __init ppc_init(void)
210 {
211 	int i;
212 
213 	/* clear the progress line */
214 	if ( ppc_md.progress ) ppc_md.progress("             ", 0xffff);
215 
216 	/* register CPU devices */
217 	for_each_possible_cpu(i)
218 		register_cpu(&cpu_devices[i], i);
219 
220 	/* call platform init */
221 	if (ppc_md.init != NULL) {
222 		ppc_md.init();
223 	}
224 	return 0;
225 }
226 
227 arch_initcall(ppc_init);
228 
229 /* Warning, IO base is not yet inited */
230 void __init setup_arch(char **cmdline_p)
231 {
232 	*cmdline_p = cmd_line;
233 
234 	/* so udelay does something sensible, assume <= 1000 bogomips */
235 	loops_per_jiffy = 500000000 / HZ;
236 
237 	unflatten_device_tree();
238 	check_for_initrd();
239 
240 	if (ppc_md.init_early)
241 		ppc_md.init_early();
242 
243 	find_legacy_serial_ports();
244 	finish_device_tree();
245 
246 	smp_setup_cpu_maps();
247 
248 #ifdef CONFIG_XMON_DEFAULT
249 	xmon_init(1);
250 #endif
251 	/* Register early console */
252 	register_early_udbg_console();
253 
254 #if defined(CONFIG_KGDB)
255 	if (ppc_md.kgdb_map_scc)
256 		ppc_md.kgdb_map_scc();
257 	set_debug_traps();
258 	if (strstr(cmd_line, "gdb")) {
259 		if (ppc_md.progress)
260 			ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
261 		printk("kgdb breakpoint activated\n");
262 		breakpoint();
263 	}
264 #endif
265 
266 	/*
267 	 * Set cache line size based on type of cpu as a default.
268 	 * Systems with OF can look in the properties on the cpu node(s)
269 	 * for a possibly more accurate value.
270 	 */
271 	if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
272 		dcache_bsize = cur_cpu_spec->dcache_bsize;
273 		icache_bsize = cur_cpu_spec->icache_bsize;
274 		ucache_bsize = 0;
275 	} else
276 		ucache_bsize = dcache_bsize = icache_bsize
277 			= cur_cpu_spec->dcache_bsize;
278 
279 	/* reboot on panic */
280 	panic_timeout = 180;
281 
282 	if (ppc_md.panic)
283 		setup_panic();
284 
285 	init_mm.start_code = PAGE_OFFSET;
286 	init_mm.end_code = (unsigned long) _etext;
287 	init_mm.end_data = (unsigned long) _edata;
288 	init_mm.brk = klimit;
289 
290 	if (do_early_xmon)
291 		debugger(NULL);
292 
293 	/* set up the bootmem stuff with available memory */
294 	do_init_bootmem();
295 	if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
296 
297 #ifdef CONFIG_DUMMY_CONSOLE
298 	conswitchp = &dummy_con;
299 #endif
300 
301 	ppc_md.setup_arch();
302 	if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
303 
304 	paging_init();
305 }
306