1 /* 2 * Common prep/pmac/chrp boot and setup code. 3 */ 4 5 #include <linux/module.h> 6 #include <linux/string.h> 7 #include <linux/sched.h> 8 #include <linux/init.h> 9 #include <linux/kernel.h> 10 #include <linux/reboot.h> 11 #include <linux/delay.h> 12 #include <linux/initrd.h> 13 #include <linux/tty.h> 14 #include <linux/bootmem.h> 15 #include <linux/seq_file.h> 16 #include <linux/root_dev.h> 17 #include <linux/cpu.h> 18 #include <linux/console.h> 19 #include <linux/lmb.h> 20 21 #include <asm/io.h> 22 #include <asm/prom.h> 23 #include <asm/processor.h> 24 #include <asm/pgtable.h> 25 #include <asm/setup.h> 26 #include <asm/smp.h> 27 #include <asm/elf.h> 28 #include <asm/cputable.h> 29 #include <asm/bootx.h> 30 #include <asm/btext.h> 31 #include <asm/machdep.h> 32 #include <asm/uaccess.h> 33 #include <asm/system.h> 34 #include <asm/pmac_feature.h> 35 #include <asm/sections.h> 36 #include <asm/nvram.h> 37 #include <asm/xmon.h> 38 #include <asm/time.h> 39 #include <asm/serial.h> 40 #include <asm/udbg.h> 41 #include <asm/mmu_context.h> 42 #include <asm/swiotlb.h> 43 44 #include "setup.h" 45 46 #define DBG(fmt...) 47 48 extern void bootx_init(unsigned long r4, unsigned long phys); 49 50 int boot_cpuid; 51 EXPORT_SYMBOL_GPL(boot_cpuid); 52 int boot_cpuid_phys; 53 54 int smp_hw_index[NR_CPUS]; 55 56 unsigned long ISA_DMA_THRESHOLD; 57 unsigned int DMA_MODE_READ; 58 unsigned int DMA_MODE_WRITE; 59 60 #ifdef CONFIG_VGA_CONSOLE 61 unsigned long vgacon_remap_base; 62 EXPORT_SYMBOL(vgacon_remap_base); 63 #endif 64 65 /* 66 * These are used in binfmt_elf.c to put aux entries on the stack 67 * for each elf executable being started. 68 */ 69 int dcache_bsize; 70 int icache_bsize; 71 int ucache_bsize; 72 73 /* 74 * We're called here very early in the boot. We determine the machine 75 * type and call the appropriate low-level setup functions. 76 * -- Cort <cort@fsmlabs.com> 77 * 78 * Note that the kernel may be running at an address which is different 79 * from the address that it was linked at, so we must use RELOC/PTRRELOC 80 * to access static data (including strings). -- paulus 81 */ 82 notrace unsigned long __init early_init(unsigned long dt_ptr) 83 { 84 unsigned long offset = reloc_offset(); 85 struct cpu_spec *spec; 86 87 /* First zero the BSS -- use memset_io, some platforms don't have 88 * caches on yet */ 89 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, 90 __bss_stop - __bss_start); 91 92 /* 93 * Identify the CPU type and fix up code sections 94 * that depend on which cpu we have. 95 */ 96 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 97 98 do_feature_fixups(spec->cpu_features, 99 PTRRELOC(&__start___ftr_fixup), 100 PTRRELOC(&__stop___ftr_fixup)); 101 102 do_feature_fixups(spec->mmu_features, 103 PTRRELOC(&__start___mmu_ftr_fixup), 104 PTRRELOC(&__stop___mmu_ftr_fixup)); 105 106 do_lwsync_fixups(spec->cpu_features, 107 PTRRELOC(&__start___lwsync_fixup), 108 PTRRELOC(&__stop___lwsync_fixup)); 109 110 return KERNELBASE + offset; 111 } 112 113 114 /* 115 * Find out what kind of machine we're on and save any data we need 116 * from the early boot process (devtree is copied on pmac by prom_init()). 117 * This is called very early on the boot process, after a minimal 118 * MMU environment has been set up but before MMU_init is called. 119 */ 120 notrace void __init machine_init(unsigned long dt_ptr) 121 { 122 lockdep_init(); 123 124 /* Enable early debugging if any specified (see udbg.h) */ 125 udbg_early_init(); 126 127 /* Do some early initialization based on the flat device tree */ 128 early_init_devtree(__va(dt_ptr)); 129 130 probe_machine(); 131 132 setup_kdump_trampoline(); 133 134 #ifdef CONFIG_6xx 135 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 136 cpu_has_feature(CPU_FTR_CAN_NAP)) 137 ppc_md.power_save = ppc6xx_idle; 138 #endif 139 140 #ifdef CONFIG_E500 141 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 142 cpu_has_feature(CPU_FTR_CAN_NAP)) 143 ppc_md.power_save = e500_idle; 144 #endif 145 if (ppc_md.progress) 146 ppc_md.progress("id mach(): done", 0x200); 147 } 148 149 #ifdef CONFIG_BOOKE_WDT 150 /* Checks wdt=x and wdt_period=xx command-line option */ 151 notrace int __init early_parse_wdt(char *p) 152 { 153 if (p && strncmp(p, "0", 1) != 0) 154 booke_wdt_enabled = 1; 155 156 return 0; 157 } 158 early_param("wdt", early_parse_wdt); 159 160 int __init early_parse_wdt_period (char *p) 161 { 162 if (p) 163 booke_wdt_period = simple_strtoul(p, NULL, 0); 164 165 return 0; 166 } 167 early_param("wdt_period", early_parse_wdt_period); 168 #endif /* CONFIG_BOOKE_WDT */ 169 170 /* Checks "l2cr=xxxx" command-line option */ 171 int __init ppc_setup_l2cr(char *str) 172 { 173 if (cpu_has_feature(CPU_FTR_L2CR)) { 174 unsigned long val = simple_strtoul(str, NULL, 0); 175 printk(KERN_INFO "l2cr set to %lx\n", val); 176 _set_L2CR(0); /* force invalidate by disable cache */ 177 _set_L2CR(val); /* and enable it */ 178 } 179 return 1; 180 } 181 __setup("l2cr=", ppc_setup_l2cr); 182 183 /* Checks "l3cr=xxxx" command-line option */ 184 int __init ppc_setup_l3cr(char *str) 185 { 186 if (cpu_has_feature(CPU_FTR_L3CR)) { 187 unsigned long val = simple_strtoul(str, NULL, 0); 188 printk(KERN_INFO "l3cr set to %lx\n", val); 189 _set_L3CR(val); /* and enable it */ 190 } 191 return 1; 192 } 193 __setup("l3cr=", ppc_setup_l3cr); 194 195 #ifdef CONFIG_GENERIC_NVRAM 196 197 /* Generic nvram hooks used by drivers/char/gen_nvram.c */ 198 unsigned char nvram_read_byte(int addr) 199 { 200 if (ppc_md.nvram_read_val) 201 return ppc_md.nvram_read_val(addr); 202 return 0xff; 203 } 204 EXPORT_SYMBOL(nvram_read_byte); 205 206 void nvram_write_byte(unsigned char val, int addr) 207 { 208 if (ppc_md.nvram_write_val) 209 ppc_md.nvram_write_val(addr, val); 210 } 211 EXPORT_SYMBOL(nvram_write_byte); 212 213 void nvram_sync(void) 214 { 215 if (ppc_md.nvram_sync) 216 ppc_md.nvram_sync(); 217 } 218 EXPORT_SYMBOL(nvram_sync); 219 220 #endif /* CONFIG_NVRAM */ 221 222 int __init ppc_init(void) 223 { 224 /* clear the progress line */ 225 if (ppc_md.progress) 226 ppc_md.progress(" ", 0xffff); 227 228 /* call platform init */ 229 if (ppc_md.init != NULL) { 230 ppc_md.init(); 231 } 232 return 0; 233 } 234 235 arch_initcall(ppc_init); 236 237 #ifdef CONFIG_IRQSTACKS 238 static void __init irqstack_early_init(void) 239 { 240 unsigned int i; 241 242 /* interrupt stacks must be in lowmem, we get that for free on ppc32 243 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ 244 for_each_possible_cpu(i) { 245 softirq_ctx[i] = (struct thread_info *) 246 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 247 hardirq_ctx[i] = (struct thread_info *) 248 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 249 } 250 } 251 #else 252 #define irqstack_early_init() 253 #endif 254 255 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 256 static void __init exc_lvl_early_init(void) 257 { 258 unsigned int i; 259 260 /* interrupt stacks must be in lowmem, we get that for free on ppc32 261 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ 262 for_each_possible_cpu(i) { 263 critirq_ctx[i] = (struct thread_info *) 264 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 265 #ifdef CONFIG_BOOKE 266 dbgirq_ctx[i] = (struct thread_info *) 267 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 268 mcheckirq_ctx[i] = (struct thread_info *) 269 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 270 #endif 271 } 272 } 273 #else 274 #define exc_lvl_early_init() 275 #endif 276 277 /* Warning, IO base is not yet inited */ 278 void __init setup_arch(char **cmdline_p) 279 { 280 *cmdline_p = cmd_line; 281 282 /* so udelay does something sensible, assume <= 1000 bogomips */ 283 loops_per_jiffy = 500000000 / HZ; 284 285 unflatten_device_tree(); 286 check_for_initrd(); 287 288 if (ppc_md.init_early) 289 ppc_md.init_early(); 290 291 find_legacy_serial_ports(); 292 293 smp_setup_cpu_maps(); 294 295 /* Register early console */ 296 register_early_udbg_console(); 297 298 xmon_setup(); 299 300 /* 301 * Set cache line size based on type of cpu as a default. 302 * Systems with OF can look in the properties on the cpu node(s) 303 * for a possibly more accurate value. 304 */ 305 dcache_bsize = cur_cpu_spec->dcache_bsize; 306 icache_bsize = cur_cpu_spec->icache_bsize; 307 ucache_bsize = 0; 308 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) 309 ucache_bsize = icache_bsize = dcache_bsize; 310 311 /* reboot on panic */ 312 panic_timeout = 180; 313 314 if (ppc_md.panic) 315 setup_panic(); 316 317 init_mm.start_code = (unsigned long)_stext; 318 init_mm.end_code = (unsigned long) _etext; 319 init_mm.end_data = (unsigned long) _edata; 320 init_mm.brk = klimit; 321 322 exc_lvl_early_init(); 323 324 irqstack_early_init(); 325 326 /* set up the bootmem stuff with available memory */ 327 do_init_bootmem(); 328 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); 329 330 #ifdef CONFIG_DUMMY_CONSOLE 331 conswitchp = &dummy_con; 332 #endif 333 334 if (ppc_md.setup_arch) 335 ppc_md.setup_arch(); 336 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 337 338 #ifdef CONFIG_SWIOTLB 339 if (ppc_swiotlb_enable) 340 swiotlb_init(); 341 #endif 342 343 paging_init(); 344 345 /* Initialize the MMU context management stuff */ 346 mmu_context_init(); 347 348 } 349