xref: /linux/arch/powerpc/kernel/setup-common.c (revision d8d2af70b98109418bb16ff6638d7c1c4336f7fe)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Common boot and setup code for both 32-bit and 64-bit.
4  * Extracted from arch/powerpc/kernel/setup_64.c.
5  *
6  * Copyright (C) 2001 PPC64 Team, IBM Corp
7  */
8 
9 #undef DEBUG
10 
11 #include <linux/export.h>
12 #include <linux/panic_notifier.h>
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/reboot.h>
18 #include <linux/delay.h>
19 #include <linux/initrd.h>
20 #include <linux/platform_device.h>
21 #include <linux/seq_file.h>
22 #include <linux/ioport.h>
23 #include <linux/console.h>
24 #include <linux/screen_info.h>
25 #include <linux/root_dev.h>
26 #include <linux/notifier.h>
27 #include <linux/cpu.h>
28 #include <linux/unistd.h>
29 #include <linux/serial.h>
30 #include <linux/serial_8250.h>
31 #include <linux/percpu.h>
32 #include <linux/memblock.h>
33 #include <linux/of_irq.h>
34 #include <linux/of_fdt.h>
35 #include <linux/of_platform.h>
36 #include <linux/hugetlb.h>
37 #include <linux/pgtable.h>
38 #include <asm/io.h>
39 #include <asm/paca.h>
40 #include <asm/processor.h>
41 #include <asm/vdso_datapage.h>
42 #include <asm/smp.h>
43 #include <asm/elf.h>
44 #include <asm/machdep.h>
45 #include <asm/time.h>
46 #include <asm/cputable.h>
47 #include <asm/sections.h>
48 #include <asm/firmware.h>
49 #include <asm/btext.h>
50 #include <asm/nvram.h>
51 #include <asm/setup.h>
52 #include <asm/rtas.h>
53 #include <asm/iommu.h>
54 #include <asm/serial.h>
55 #include <asm/cache.h>
56 #include <asm/page.h>
57 #include <asm/mmu.h>
58 #include <asm/xmon.h>
59 #include <asm/cputhreads.h>
60 #include <mm/mmu_decl.h>
61 #include <asm/fadump.h>
62 #include <asm/udbg.h>
63 #include <asm/hugetlb.h>
64 #include <asm/livepatch.h>
65 #include <asm/mmu_context.h>
66 #include <asm/cpu_has_feature.h>
67 #include <asm/kasan.h>
68 #include <asm/mce.h>
69 
70 #include "setup.h"
71 
72 #ifdef DEBUG
73 #define DBG(fmt...) udbg_printf(fmt)
74 #else
75 #define DBG(fmt...)
76 #endif
77 
78 /* The main machine-dep calls structure
79  */
80 struct machdep_calls ppc_md;
81 EXPORT_SYMBOL(ppc_md);
82 struct machdep_calls *machine_id;
83 EXPORT_SYMBOL(machine_id);
84 
85 int boot_cpuid = -1;
86 EXPORT_SYMBOL_GPL(boot_cpuid);
87 
88 /*
89  * These are used in binfmt_elf.c to put aux entries on the stack
90  * for each elf executable being started.
91  */
92 int dcache_bsize;
93 int icache_bsize;
94 
95 /*
96  * This still seems to be needed... -- paulus
97  */
98 struct screen_info screen_info = {
99 	.orig_x = 0,
100 	.orig_y = 25,
101 	.orig_video_cols = 80,
102 	.orig_video_lines = 25,
103 	.orig_video_isVGA = 1,
104 	.orig_video_points = 16
105 };
106 #if defined(CONFIG_FB_VGA16_MODULE)
107 EXPORT_SYMBOL(screen_info);
108 #endif
109 
110 /* Variables required to store legacy IO irq routing */
111 int of_i8042_kbd_irq;
112 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
113 int of_i8042_aux_irq;
114 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
115 
116 #ifdef __DO_IRQ_CANON
117 /* XXX should go elsewhere eventually */
118 int ppc_do_canonicalize_irqs;
119 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
120 #endif
121 
122 #ifdef CONFIG_CRASH_CORE
123 /* This keeps a track of which one is the crashing cpu. */
124 int crashing_cpu = -1;
125 #endif
126 
127 /* also used by kexec */
128 void machine_shutdown(void)
129 {
130 	/*
131 	 * if fadump is active, cleanup the fadump registration before we
132 	 * shutdown.
133 	 */
134 	fadump_cleanup();
135 
136 	if (ppc_md.machine_shutdown)
137 		ppc_md.machine_shutdown();
138 }
139 
140 static void machine_hang(void)
141 {
142 	pr_emerg("System Halted, OK to turn off power\n");
143 	local_irq_disable();
144 	while (1)
145 		;
146 }
147 
148 void machine_restart(char *cmd)
149 {
150 	machine_shutdown();
151 	if (ppc_md.restart)
152 		ppc_md.restart(cmd);
153 
154 	smp_send_stop();
155 
156 	do_kernel_restart(cmd);
157 	mdelay(1000);
158 
159 	machine_hang();
160 }
161 
162 void machine_power_off(void)
163 {
164 	machine_shutdown();
165 	if (pm_power_off)
166 		pm_power_off();
167 
168 	smp_send_stop();
169 	machine_hang();
170 }
171 /* Used by the G5 thermal driver */
172 EXPORT_SYMBOL_GPL(machine_power_off);
173 
174 void (*pm_power_off)(void);
175 EXPORT_SYMBOL_GPL(pm_power_off);
176 
177 void machine_halt(void)
178 {
179 	machine_shutdown();
180 	if (ppc_md.halt)
181 		ppc_md.halt();
182 
183 	smp_send_stop();
184 	machine_hang();
185 }
186 
187 #ifdef CONFIG_SMP
188 DEFINE_PER_CPU(unsigned int, cpu_pvr);
189 #endif
190 
191 static void show_cpuinfo_summary(struct seq_file *m)
192 {
193 	struct device_node *root;
194 	const char *model = NULL;
195 	unsigned long bogosum = 0;
196 	int i;
197 
198 	if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
199 		for_each_online_cpu(i)
200 			bogosum += loops_per_jiffy;
201 		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
202 			   bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
203 	}
204 	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
205 	if (ppc_md.name)
206 		seq_printf(m, "platform\t: %s\n", ppc_md.name);
207 	root = of_find_node_by_path("/");
208 	if (root)
209 		model = of_get_property(root, "model", NULL);
210 	if (model)
211 		seq_printf(m, "model\t\t: %s\n", model);
212 	of_node_put(root);
213 
214 	if (ppc_md.show_cpuinfo != NULL)
215 		ppc_md.show_cpuinfo(m);
216 
217 	/* Display the amount of memory */
218 	if (IS_ENABLED(CONFIG_PPC32))
219 		seq_printf(m, "Memory\t\t: %d MB\n",
220 			   (unsigned int)(total_memory / (1024 * 1024)));
221 }
222 
223 static int show_cpuinfo(struct seq_file *m, void *v)
224 {
225 	unsigned long cpu_id = (unsigned long)v - 1;
226 	unsigned int pvr;
227 	unsigned long proc_freq;
228 	unsigned short maj;
229 	unsigned short min;
230 
231 #ifdef CONFIG_SMP
232 	pvr = per_cpu(cpu_pvr, cpu_id);
233 #else
234 	pvr = mfspr(SPRN_PVR);
235 #endif
236 	maj = (pvr >> 8) & 0xFF;
237 	min = pvr & 0xFF;
238 
239 	seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
240 
241 	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
242 		seq_puts(m, cur_cpu_spec->cpu_name);
243 	else
244 		seq_printf(m, "unknown (%08x)", pvr);
245 
246 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
247 		seq_puts(m, ", altivec supported");
248 
249 	seq_putc(m, '\n');
250 
251 #ifdef CONFIG_TAU
252 	if (cpu_has_feature(CPU_FTR_TAU)) {
253 		if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
254 			/* more straightforward, but potentially misleading */
255 			seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
256 				   cpu_temp(cpu_id));
257 		} else {
258 			/* show the actual temp sensor range */
259 			u32 temp;
260 			temp = cpu_temp_both(cpu_id);
261 			seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
262 				   temp & 0xff, temp >> 16);
263 		}
264 	}
265 #endif /* CONFIG_TAU */
266 
267 	/*
268 	 * Platforms that have variable clock rates, should implement
269 	 * the method ppc_md.get_proc_freq() that reports the clock
270 	 * rate of a given cpu. The rest can use ppc_proc_freq to
271 	 * report the clock rate that is same across all cpus.
272 	 */
273 	if (ppc_md.get_proc_freq)
274 		proc_freq = ppc_md.get_proc_freq(cpu_id);
275 	else
276 		proc_freq = ppc_proc_freq;
277 
278 	if (proc_freq)
279 		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
280 			   proc_freq / 1000000, proc_freq % 1000000);
281 
282 	/* If we are a Freescale core do a simple check so
283 	 * we don't have to keep adding cases in the future */
284 	if (PVR_VER(pvr) & 0x8000) {
285 		switch (PVR_VER(pvr)) {
286 		case 0x8000:	/* 7441/7450/7451, Voyager */
287 		case 0x8001:	/* 7445/7455, Apollo 6 */
288 		case 0x8002:	/* 7447/7457, Apollo 7 */
289 		case 0x8003:	/* 7447A, Apollo 7 PM */
290 		case 0x8004:	/* 7448, Apollo 8 */
291 		case 0x800c:	/* 7410, Nitro */
292 			maj = ((pvr >> 8) & 0xF);
293 			min = PVR_MIN(pvr);
294 			break;
295 		default:	/* e500/book-e */
296 			maj = PVR_MAJ(pvr);
297 			min = PVR_MIN(pvr);
298 			break;
299 		}
300 	} else {
301 		switch (PVR_VER(pvr)) {
302 			case 0x1008:	/* 740P/750P ?? */
303 				maj = ((pvr >> 8) & 0xFF) - 1;
304 				min = pvr & 0xFF;
305 				break;
306 			case 0x004e: /* POWER9 bits 12-15 give chip type */
307 			case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
308 				maj = (pvr >> 8) & 0x0F;
309 				min = pvr & 0xFF;
310 				break;
311 			default:
312 				maj = (pvr >> 8) & 0xFF;
313 				min = pvr & 0xFF;
314 				break;
315 		}
316 	}
317 
318 	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
319 		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
320 
321 	if (IS_ENABLED(CONFIG_PPC32))
322 		seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
323 			   (loops_per_jiffy / (5000 / HZ)) % 100);
324 
325 	seq_putc(m, '\n');
326 
327 	/* If this is the last cpu, print the summary */
328 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
329 		show_cpuinfo_summary(m);
330 
331 	return 0;
332 }
333 
334 static void *c_start(struct seq_file *m, loff_t *pos)
335 {
336 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
337 		*pos = cpumask_first(cpu_online_mask);
338 	else
339 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
340 	if ((*pos) < nr_cpu_ids)
341 		return (void *)(unsigned long)(*pos + 1);
342 	return NULL;
343 }
344 
345 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
346 {
347 	(*pos)++;
348 	return c_start(m, pos);
349 }
350 
351 static void c_stop(struct seq_file *m, void *v)
352 {
353 }
354 
355 const struct seq_operations cpuinfo_op = {
356 	.start	= c_start,
357 	.next	= c_next,
358 	.stop	= c_stop,
359 	.show	= show_cpuinfo,
360 };
361 
362 void __init check_for_initrd(void)
363 {
364 #ifdef CONFIG_BLK_DEV_INITRD
365 	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
366 	    initrd_start, initrd_end);
367 
368 	/* If we were passed an initrd, set the ROOT_DEV properly if the values
369 	 * look sensible. If not, clear initrd reference.
370 	 */
371 	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
372 	    initrd_end > initrd_start)
373 		ROOT_DEV = Root_RAM0;
374 	else
375 		initrd_start = initrd_end = 0;
376 
377 	if (initrd_start)
378 		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
379 
380 	DBG(" <- check_for_initrd()\n");
381 #endif /* CONFIG_BLK_DEV_INITRD */
382 }
383 
384 #ifdef CONFIG_SMP
385 
386 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
387 cpumask_t threads_core_mask __read_mostly;
388 EXPORT_SYMBOL_GPL(threads_per_core);
389 EXPORT_SYMBOL_GPL(threads_per_subcore);
390 EXPORT_SYMBOL_GPL(threads_shift);
391 EXPORT_SYMBOL_GPL(threads_core_mask);
392 
393 static void __init cpu_init_thread_core_maps(int tpc)
394 {
395 	int i;
396 
397 	threads_per_core = tpc;
398 	threads_per_subcore = tpc;
399 	cpumask_clear(&threads_core_mask);
400 
401 	/* This implementation only supports power of 2 number of threads
402 	 * for simplicity and performance
403 	 */
404 	threads_shift = ilog2(tpc);
405 	BUG_ON(tpc != (1 << threads_shift));
406 
407 	for (i = 0; i < tpc; i++)
408 		cpumask_set_cpu(i, &threads_core_mask);
409 
410 	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
411 	       tpc, tpc > 1 ? "s" : "");
412 	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
413 }
414 
415 
416 u32 *cpu_to_phys_id = NULL;
417 
418 /**
419  * setup_cpu_maps - initialize the following cpu maps:
420  *                  cpu_possible_mask
421  *                  cpu_present_mask
422  *
423  * Having the possible map set up early allows us to restrict allocations
424  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
425  *
426  * We do not initialize the online map here; cpus set their own bits in
427  * cpu_online_mask as they come up.
428  *
429  * This function is valid only for Open Firmware systems.  finish_device_tree
430  * must be called before using this.
431  *
432  * While we're here, we may as well set the "physical" cpu ids in the paca.
433  *
434  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
435  */
436 void __init smp_setup_cpu_maps(void)
437 {
438 	struct device_node *dn;
439 	int cpu = 0;
440 	int nthreads = 1;
441 
442 	DBG("smp_setup_cpu_maps()\n");
443 
444 	cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
445 					__alignof__(u32));
446 	if (!cpu_to_phys_id)
447 		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
448 		      __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
449 
450 	for_each_node_by_type(dn, "cpu") {
451 		const __be32 *intserv;
452 		__be32 cpu_be;
453 		int j, len;
454 
455 		DBG("  * %pOF...\n", dn);
456 
457 		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
458 				&len);
459 		if (intserv) {
460 			DBG("    ibm,ppc-interrupt-server#s -> %lu threads\n",
461 			    (len / sizeof(int)));
462 		} else {
463 			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
464 			intserv = of_get_property(dn, "reg", &len);
465 			if (!intserv) {
466 				cpu_be = cpu_to_be32(cpu);
467 				/* XXX: what is this? uninitialized?? */
468 				intserv = &cpu_be;	/* assume logical == phys */
469 				len = 4;
470 			}
471 		}
472 
473 		nthreads = len / sizeof(int);
474 
475 		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
476 			bool avail;
477 
478 			DBG("    thread %d -> cpu %d (hard id %d)\n",
479 			    j, cpu, be32_to_cpu(intserv[j]));
480 
481 			avail = of_device_is_available(dn);
482 			if (!avail)
483 				avail = !of_property_match_string(dn,
484 						"enable-method", "spin-table");
485 
486 			set_cpu_present(cpu, avail);
487 			set_cpu_possible(cpu, true);
488 			cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
489 			cpu++;
490 		}
491 
492 		if (cpu >= nr_cpu_ids) {
493 			of_node_put(dn);
494 			break;
495 		}
496 	}
497 
498 	/* If no SMT supported, nthreads is forced to 1 */
499 	if (!cpu_has_feature(CPU_FTR_SMT)) {
500 		DBG("  SMT disabled ! nthreads forced to 1\n");
501 		nthreads = 1;
502 	}
503 
504 #ifdef CONFIG_PPC64
505 	/*
506 	 * On pSeries LPAR, we need to know how many cpus
507 	 * could possibly be added to this partition.
508 	 */
509 	if (firmware_has_feature(FW_FEATURE_LPAR) &&
510 	    (dn = of_find_node_by_path("/rtas"))) {
511 		int num_addr_cell, num_size_cell, maxcpus;
512 		const __be32 *ireg;
513 
514 		num_addr_cell = of_n_addr_cells(dn);
515 		num_size_cell = of_n_size_cells(dn);
516 
517 		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
518 
519 		if (!ireg)
520 			goto out;
521 
522 		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
523 
524 		/* Double maxcpus for processors which have SMT capability */
525 		if (cpu_has_feature(CPU_FTR_SMT))
526 			maxcpus *= nthreads;
527 
528 		if (maxcpus > nr_cpu_ids) {
529 			printk(KERN_WARNING
530 			       "Partition configured for %d cpus, "
531 			       "operating system maximum is %u.\n",
532 			       maxcpus, nr_cpu_ids);
533 			maxcpus = nr_cpu_ids;
534 		} else
535 			printk(KERN_INFO "Partition configured for %d cpus.\n",
536 			       maxcpus);
537 
538 		for (cpu = 0; cpu < maxcpus; cpu++)
539 			set_cpu_possible(cpu, true);
540 	out:
541 		of_node_put(dn);
542 	}
543 	vdso_data->processorCount = num_present_cpus();
544 #endif /* CONFIG_PPC64 */
545 
546         /* Initialize CPU <=> thread mapping/
547 	 *
548 	 * WARNING: We assume that the number of threads is the same for
549 	 * every CPU in the system. If that is not the case, then some code
550 	 * here will have to be reworked
551 	 */
552 	cpu_init_thread_core_maps(nthreads);
553 
554 	/* Now that possible cpus are set, set nr_cpu_ids for later use */
555 	setup_nr_cpu_ids();
556 
557 	free_unused_pacas();
558 }
559 #endif /* CONFIG_SMP */
560 
561 #ifdef CONFIG_PCSPKR_PLATFORM
562 static __init int add_pcspkr(void)
563 {
564 	struct device_node *np;
565 	struct platform_device *pd;
566 	int ret;
567 
568 	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
569 	of_node_put(np);
570 	if (!np)
571 		return -ENODEV;
572 
573 	pd = platform_device_alloc("pcspkr", -1);
574 	if (!pd)
575 		return -ENOMEM;
576 
577 	ret = platform_device_add(pd);
578 	if (ret)
579 		platform_device_put(pd);
580 
581 	return ret;
582 }
583 device_initcall(add_pcspkr);
584 #endif	/* CONFIG_PCSPKR_PLATFORM */
585 
586 static __init void probe_machine(void)
587 {
588 	extern struct machdep_calls __machine_desc_start;
589 	extern struct machdep_calls __machine_desc_end;
590 	unsigned int i;
591 
592 	/*
593 	 * Iterate all ppc_md structures until we find the proper
594 	 * one for the current machine type
595 	 */
596 	DBG("Probing machine type ...\n");
597 
598 	/*
599 	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
600 	 * entry before probe_machine() which will be overwritten
601 	 */
602 	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
603 		if (((void **)&ppc_md)[i]) {
604 			printk(KERN_ERR "Entry %d in ppc_md non empty before"
605 			       " machine probe !\n", i);
606 		}
607 	}
608 
609 	for (machine_id = &__machine_desc_start;
610 	     machine_id < &__machine_desc_end;
611 	     machine_id++) {
612 		DBG("  %s ...", machine_id->name);
613 		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
614 		if (ppc_md.probe()) {
615 			DBG(" match !\n");
616 			break;
617 		}
618 		DBG("\n");
619 	}
620 	/* What can we do if we didn't find ? */
621 	if (machine_id >= &__machine_desc_end) {
622 		pr_err("No suitable machine description found !\n");
623 		for (;;);
624 	}
625 
626 	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
627 }
628 
629 /* Match a class of boards, not a specific device configuration. */
630 int check_legacy_ioport(unsigned long base_port)
631 {
632 	struct device_node *parent, *np = NULL;
633 	int ret = -ENODEV;
634 
635 	switch(base_port) {
636 	case I8042_DATA_REG:
637 		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
638 			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
639 		if (np) {
640 			parent = of_get_parent(np);
641 
642 			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
643 			if (!of_i8042_kbd_irq)
644 				of_i8042_kbd_irq = 1;
645 
646 			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
647 			if (!of_i8042_aux_irq)
648 				of_i8042_aux_irq = 12;
649 
650 			of_node_put(np);
651 			np = parent;
652 			break;
653 		}
654 		np = of_find_node_by_type(NULL, "8042");
655 		/* Pegasos has no device_type on its 8042 node, look for the
656 		 * name instead */
657 		if (!np)
658 			np = of_find_node_by_name(NULL, "8042");
659 		if (np) {
660 			of_i8042_kbd_irq = 1;
661 			of_i8042_aux_irq = 12;
662 		}
663 		break;
664 	case FDC_BASE: /* FDC1 */
665 		np = of_find_node_by_type(NULL, "fdc");
666 		break;
667 	default:
668 		/* ipmi is supposed to fail here */
669 		break;
670 	}
671 	if (!np)
672 		return ret;
673 	parent = of_get_parent(np);
674 	if (parent) {
675 		if (of_node_is_type(parent, "isa"))
676 			ret = 0;
677 		of_node_put(parent);
678 	}
679 	of_node_put(np);
680 	return ret;
681 }
682 EXPORT_SYMBOL(check_legacy_ioport);
683 
684 static int ppc_panic_event(struct notifier_block *this,
685                              unsigned long event, void *ptr)
686 {
687 	/*
688 	 * panic does a local_irq_disable, but we really
689 	 * want interrupts to be hard disabled.
690 	 */
691 	hard_irq_disable();
692 
693 	/*
694 	 * If firmware-assisted dump has been registered then trigger
695 	 * firmware-assisted dump and let firmware handle everything else.
696 	 */
697 	crash_fadump(NULL, ptr);
698 	if (ppc_md.panic)
699 		ppc_md.panic(ptr);  /* May not return */
700 	return NOTIFY_DONE;
701 }
702 
703 static struct notifier_block ppc_panic_block = {
704 	.notifier_call = ppc_panic_event,
705 	.priority = INT_MIN /* may not return; must be done last */
706 };
707 
708 /*
709  * Dump out kernel offset information on panic.
710  */
711 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
712 			      void *p)
713 {
714 	pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
715 		 kaslr_offset(), KERNELBASE);
716 
717 	return 0;
718 }
719 
720 static struct notifier_block kernel_offset_notifier = {
721 	.notifier_call = dump_kernel_offset
722 };
723 
724 void __init setup_panic(void)
725 {
726 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
727 		atomic_notifier_chain_register(&panic_notifier_list,
728 					       &kernel_offset_notifier);
729 
730 	/* PPC64 always does a hard irq disable in its panic handler */
731 	if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
732 		return;
733 	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
734 }
735 
736 #ifdef CONFIG_CHECK_CACHE_COHERENCY
737 /*
738  * For platforms that have configurable cache-coherency.  This function
739  * checks that the cache coherency setting of the kernel matches the setting
740  * left by the firmware, as indicated in the device tree.  Since a mismatch
741  * will eventually result in DMA failures, we print * and error and call
742  * BUG() in that case.
743  */
744 
745 #define KERNEL_COHERENCY	(!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
746 
747 static int __init check_cache_coherency(void)
748 {
749 	struct device_node *np;
750 	const void *prop;
751 	bool devtree_coherency;
752 
753 	np = of_find_node_by_path("/");
754 	prop = of_get_property(np, "coherency-off", NULL);
755 	of_node_put(np);
756 
757 	devtree_coherency = prop ? false : true;
758 
759 	if (devtree_coherency != KERNEL_COHERENCY) {
760 		printk(KERN_ERR
761 			"kernel coherency:%s != device tree_coherency:%s\n",
762 			KERNEL_COHERENCY ? "on" : "off",
763 			devtree_coherency ? "on" : "off");
764 		BUG();
765 	}
766 
767 	return 0;
768 }
769 
770 late_initcall(check_cache_coherency);
771 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
772 
773 void ppc_printk_progress(char *s, unsigned short hex)
774 {
775 	pr_info("%s\n", s);
776 }
777 
778 static __init void print_system_info(void)
779 {
780 	pr_info("-----------------------------------------------------\n");
781 	pr_info("phys_mem_size     = 0x%llx\n",
782 		(unsigned long long)memblock_phys_mem_size());
783 
784 	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
785 	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
786 
787 	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
788 	pr_info("  possible        = 0x%016lx\n",
789 		(unsigned long)CPU_FTRS_POSSIBLE);
790 	pr_info("  always          = 0x%016lx\n",
791 		(unsigned long)CPU_FTRS_ALWAYS);
792 	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
793 		cur_cpu_spec->cpu_user_features,
794 		cur_cpu_spec->cpu_user_features2);
795 	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
796 #ifdef CONFIG_PPC64
797 	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
798 #ifdef CONFIG_PPC_BOOK3S
799 	pr_info("vmalloc start     = 0x%lx\n", KERN_VIRT_START);
800 	pr_info("IO start          = 0x%lx\n", KERN_IO_START);
801 	pr_info("vmemmap start     = 0x%lx\n", (unsigned long)vmemmap);
802 #endif
803 #endif
804 
805 	if (!early_radix_enabled())
806 		print_system_hash_info();
807 
808 	if (PHYSICAL_START > 0)
809 		pr_info("physical_start    = 0x%llx\n",
810 		       (unsigned long long)PHYSICAL_START);
811 	pr_info("-----------------------------------------------------\n");
812 }
813 
814 #ifdef CONFIG_SMP
815 static void __init smp_setup_pacas(void)
816 {
817 	int cpu;
818 
819 	for_each_possible_cpu(cpu) {
820 		if (cpu == smp_processor_id())
821 			continue;
822 		allocate_paca(cpu);
823 		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
824 	}
825 
826 	memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
827 	cpu_to_phys_id = NULL;
828 }
829 #endif
830 
831 /*
832  * Called into from start_kernel this initializes memblock, which is used
833  * to manage page allocation until mem_init is called.
834  */
835 void __init setup_arch(char **cmdline_p)
836 {
837 	kasan_init();
838 
839 	*cmdline_p = boot_command_line;
840 
841 	/* Set a half-reasonable default so udelay does something sensible */
842 	loops_per_jiffy = 500000000 / HZ;
843 
844 	/* Unflatten the device-tree passed by prom_init or kexec */
845 	unflatten_device_tree();
846 
847 	/*
848 	 * Initialize cache line/block info from device-tree (on ppc64) or
849 	 * just cputable (on ppc32).
850 	 */
851 	initialize_cache_info();
852 
853 	/* Initialize RTAS if available. */
854 	rtas_initialize();
855 
856 	/* Check if we have an initrd provided via the device-tree. */
857 	check_for_initrd();
858 
859 	/* Probe the machine type, establish ppc_md. */
860 	probe_machine();
861 
862 	/* Setup panic notifier if requested by the platform. */
863 	setup_panic();
864 
865 	/*
866 	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
867 	 * it from their respective probe() function.
868 	 */
869 	setup_power_save();
870 
871 	/* Discover standard serial ports. */
872 	find_legacy_serial_ports();
873 
874 	/* Register early console with the printk subsystem. */
875 	register_early_udbg_console();
876 
877 	/* Setup the various CPU maps based on the device-tree. */
878 	smp_setup_cpu_maps();
879 
880 	/* Initialize xmon. */
881 	xmon_setup();
882 
883 	/* Check the SMT related command line arguments (ppc64). */
884 	check_smt_enabled();
885 
886 	/* Parse memory topology */
887 	mem_topology_setup();
888 
889 	/*
890 	 * Release secondary cpus out of their spinloops at 0x60 now that
891 	 * we can map physical -> logical CPU ids.
892 	 *
893 	 * Freescale Book3e parts spin in a loop provided by firmware,
894 	 * so smp_release_cpus() does nothing for them.
895 	 */
896 #ifdef CONFIG_SMP
897 	smp_setup_pacas();
898 
899 	/* On BookE, setup per-core TLB data structures. */
900 	setup_tlb_core_data();
901 #endif
902 
903 	/* Print various info about the machine that has been gathered so far. */
904 	print_system_info();
905 
906 	/* Reserve large chunks of memory for use by CMA for KVM. */
907 	kvm_cma_reserve();
908 
909 	/*  Reserve large chunks of memory for us by CMA for hugetlb */
910 	gigantic_hugetlb_cma_reserve();
911 
912 	klp_init_thread_info(&init_task);
913 
914 	setup_initial_init_mm(_stext, _etext, _edata, _end);
915 
916 	mm_iommu_init(&init_mm);
917 	irqstack_early_init();
918 	exc_lvl_early_init();
919 	emergency_stack_init();
920 
921 	mce_init();
922 	smp_release_cpus();
923 
924 	initmem_init();
925 
926 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
927 
928 	if (ppc_md.setup_arch)
929 		ppc_md.setup_arch();
930 
931 	setup_barrier_nospec();
932 	setup_spectre_v2();
933 
934 	paging_init();
935 
936 	/* Initialize the MMU context management stuff. */
937 	mmu_context_init();
938 
939 	/* Interrupt code needs to be 64K-aligned. */
940 	if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
941 		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
942 		      (unsigned long)_stext);
943 }
944