xref: /linux/arch/powerpc/kernel/setup-common.c (revision b8265621f4888af9494e1d685620871ec81bc33d)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Common boot and setup code for both 32-bit and 64-bit.
4  * Extracted from arch/powerpc/kernel/setup_64.c.
5  *
6  * Copyright (C) 2001 PPC64 Team, IBM Corp
7  */
8 
9 #undef DEBUG
10 
11 #include <linux/export.h>
12 #include <linux/string.h>
13 #include <linux/sched.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/reboot.h>
17 #include <linux/delay.h>
18 #include <linux/initrd.h>
19 #include <linux/platform_device.h>
20 #include <linux/seq_file.h>
21 #include <linux/ioport.h>
22 #include <linux/console.h>
23 #include <linux/screen_info.h>
24 #include <linux/root_dev.h>
25 #include <linux/notifier.h>
26 #include <linux/cpu.h>
27 #include <linux/unistd.h>
28 #include <linux/serial.h>
29 #include <linux/serial_8250.h>
30 #include <linux/percpu.h>
31 #include <linux/memblock.h>
32 #include <linux/of_platform.h>
33 #include <linux/hugetlb.h>
34 #include <linux/pgtable.h>
35 #include <asm/debugfs.h>
36 #include <asm/io.h>
37 #include <asm/paca.h>
38 #include <asm/prom.h>
39 #include <asm/processor.h>
40 #include <asm/vdso_datapage.h>
41 #include <asm/smp.h>
42 #include <asm/elf.h>
43 #include <asm/machdep.h>
44 #include <asm/time.h>
45 #include <asm/cputable.h>
46 #include <asm/sections.h>
47 #include <asm/firmware.h>
48 #include <asm/btext.h>
49 #include <asm/nvram.h>
50 #include <asm/setup.h>
51 #include <asm/rtas.h>
52 #include <asm/iommu.h>
53 #include <asm/serial.h>
54 #include <asm/cache.h>
55 #include <asm/page.h>
56 #include <asm/mmu.h>
57 #include <asm/xmon.h>
58 #include <asm/cputhreads.h>
59 #include <mm/mmu_decl.h>
60 #include <asm/fadump.h>
61 #include <asm/udbg.h>
62 #include <asm/hugetlb.h>
63 #include <asm/livepatch.h>
64 #include <asm/mmu_context.h>
65 #include <asm/cpu_has_feature.h>
66 #include <asm/kasan.h>
67 
68 #include "setup.h"
69 
70 #ifdef DEBUG
71 #include <asm/udbg.h>
72 #define DBG(fmt...) udbg_printf(fmt)
73 #else
74 #define DBG(fmt...)
75 #endif
76 
77 /* The main machine-dep calls structure
78  */
79 struct machdep_calls ppc_md;
80 EXPORT_SYMBOL(ppc_md);
81 struct machdep_calls *machine_id;
82 EXPORT_SYMBOL(machine_id);
83 
84 int boot_cpuid = -1;
85 EXPORT_SYMBOL_GPL(boot_cpuid);
86 
87 /*
88  * These are used in binfmt_elf.c to put aux entries on the stack
89  * for each elf executable being started.
90  */
91 int dcache_bsize;
92 int icache_bsize;
93 int ucache_bsize;
94 
95 
96 unsigned long klimit = (unsigned long) _end;
97 
98 /*
99  * This still seems to be needed... -- paulus
100  */
101 struct screen_info screen_info = {
102 	.orig_x = 0,
103 	.orig_y = 25,
104 	.orig_video_cols = 80,
105 	.orig_video_lines = 25,
106 	.orig_video_isVGA = 1,
107 	.orig_video_points = 16
108 };
109 #if defined(CONFIG_FB_VGA16_MODULE)
110 EXPORT_SYMBOL(screen_info);
111 #endif
112 
113 /* Variables required to store legacy IO irq routing */
114 int of_i8042_kbd_irq;
115 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
116 int of_i8042_aux_irq;
117 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
118 
119 #ifdef __DO_IRQ_CANON
120 /* XXX should go elsewhere eventually */
121 int ppc_do_canonicalize_irqs;
122 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
123 #endif
124 
125 #ifdef CONFIG_CRASH_CORE
126 /* This keeps a track of which one is the crashing cpu. */
127 int crashing_cpu = -1;
128 #endif
129 
130 /* also used by kexec */
131 void machine_shutdown(void)
132 {
133 	/*
134 	 * if fadump is active, cleanup the fadump registration before we
135 	 * shutdown.
136 	 */
137 	fadump_cleanup();
138 
139 	if (ppc_md.machine_shutdown)
140 		ppc_md.machine_shutdown();
141 }
142 
143 static void machine_hang(void)
144 {
145 	pr_emerg("System Halted, OK to turn off power\n");
146 	local_irq_disable();
147 	while (1)
148 		;
149 }
150 
151 void machine_restart(char *cmd)
152 {
153 	machine_shutdown();
154 	if (ppc_md.restart)
155 		ppc_md.restart(cmd);
156 
157 	smp_send_stop();
158 
159 	do_kernel_restart(cmd);
160 	mdelay(1000);
161 
162 	machine_hang();
163 }
164 
165 void machine_power_off(void)
166 {
167 	machine_shutdown();
168 	if (pm_power_off)
169 		pm_power_off();
170 
171 	smp_send_stop();
172 	machine_hang();
173 }
174 /* Used by the G5 thermal driver */
175 EXPORT_SYMBOL_GPL(machine_power_off);
176 
177 void (*pm_power_off)(void);
178 EXPORT_SYMBOL_GPL(pm_power_off);
179 
180 void machine_halt(void)
181 {
182 	machine_shutdown();
183 	if (ppc_md.halt)
184 		ppc_md.halt();
185 
186 	smp_send_stop();
187 	machine_hang();
188 }
189 
190 #ifdef CONFIG_SMP
191 DEFINE_PER_CPU(unsigned int, cpu_pvr);
192 #endif
193 
194 static void show_cpuinfo_summary(struct seq_file *m)
195 {
196 	struct device_node *root;
197 	const char *model = NULL;
198 	unsigned long bogosum = 0;
199 	int i;
200 
201 	if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
202 		for_each_online_cpu(i)
203 			bogosum += loops_per_jiffy;
204 		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
205 			   bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
206 	}
207 	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
208 	if (ppc_md.name)
209 		seq_printf(m, "platform\t: %s\n", ppc_md.name);
210 	root = of_find_node_by_path("/");
211 	if (root)
212 		model = of_get_property(root, "model", NULL);
213 	if (model)
214 		seq_printf(m, "model\t\t: %s\n", model);
215 	of_node_put(root);
216 
217 	if (ppc_md.show_cpuinfo != NULL)
218 		ppc_md.show_cpuinfo(m);
219 
220 	/* Display the amount of memory */
221 	if (IS_ENABLED(CONFIG_PPC32))
222 		seq_printf(m, "Memory\t\t: %d MB\n",
223 			   (unsigned int)(total_memory / (1024 * 1024)));
224 }
225 
226 static int show_cpuinfo(struct seq_file *m, void *v)
227 {
228 	unsigned long cpu_id = (unsigned long)v - 1;
229 	unsigned int pvr;
230 	unsigned long proc_freq;
231 	unsigned short maj;
232 	unsigned short min;
233 
234 #ifdef CONFIG_SMP
235 	pvr = per_cpu(cpu_pvr, cpu_id);
236 #else
237 	pvr = mfspr(SPRN_PVR);
238 #endif
239 	maj = (pvr >> 8) & 0xFF;
240 	min = pvr & 0xFF;
241 
242 	seq_printf(m, "processor\t: %lu\n", cpu_id);
243 	seq_printf(m, "cpu\t\t: ");
244 
245 	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
246 		seq_printf(m, "%s", cur_cpu_spec->cpu_name);
247 	else
248 		seq_printf(m, "unknown (%08x)", pvr);
249 
250 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
251 		seq_printf(m, ", altivec supported");
252 
253 	seq_printf(m, "\n");
254 
255 #ifdef CONFIG_TAU
256 	if (cpu_has_feature(CPU_FTR_TAU)) {
257 		if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
258 			/* more straightforward, but potentially misleading */
259 			seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
260 				   cpu_temp(cpu_id));
261 		} else {
262 			/* show the actual temp sensor range */
263 			u32 temp;
264 			temp = cpu_temp_both(cpu_id);
265 			seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
266 				   temp & 0xff, temp >> 16);
267 		}
268 	}
269 #endif /* CONFIG_TAU */
270 
271 	/*
272 	 * Platforms that have variable clock rates, should implement
273 	 * the method ppc_md.get_proc_freq() that reports the clock
274 	 * rate of a given cpu. The rest can use ppc_proc_freq to
275 	 * report the clock rate that is same across all cpus.
276 	 */
277 	if (ppc_md.get_proc_freq)
278 		proc_freq = ppc_md.get_proc_freq(cpu_id);
279 	else
280 		proc_freq = ppc_proc_freq;
281 
282 	if (proc_freq)
283 		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
284 			   proc_freq / 1000000, proc_freq % 1000000);
285 
286 	if (ppc_md.show_percpuinfo != NULL)
287 		ppc_md.show_percpuinfo(m, cpu_id);
288 
289 	/* If we are a Freescale core do a simple check so
290 	 * we dont have to keep adding cases in the future */
291 	if (PVR_VER(pvr) & 0x8000) {
292 		switch (PVR_VER(pvr)) {
293 		case 0x8000:	/* 7441/7450/7451, Voyager */
294 		case 0x8001:	/* 7445/7455, Apollo 6 */
295 		case 0x8002:	/* 7447/7457, Apollo 7 */
296 		case 0x8003:	/* 7447A, Apollo 7 PM */
297 		case 0x8004:	/* 7448, Apollo 8 */
298 		case 0x800c:	/* 7410, Nitro */
299 			maj = ((pvr >> 8) & 0xF);
300 			min = PVR_MIN(pvr);
301 			break;
302 		default:	/* e500/book-e */
303 			maj = PVR_MAJ(pvr);
304 			min = PVR_MIN(pvr);
305 			break;
306 		}
307 	} else {
308 		switch (PVR_VER(pvr)) {
309 			case 0x1008:	/* 740P/750P ?? */
310 				maj = ((pvr >> 8) & 0xFF) - 1;
311 				min = pvr & 0xFF;
312 				break;
313 			case 0x004e: /* POWER9 bits 12-15 give chip type */
314 				maj = (pvr >> 8) & 0x0F;
315 				min = pvr & 0xFF;
316 				break;
317 			default:
318 				maj = (pvr >> 8) & 0xFF;
319 				min = pvr & 0xFF;
320 				break;
321 		}
322 	}
323 
324 	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
325 		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
326 
327 	if (IS_ENABLED(CONFIG_PPC32))
328 		seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
329 			   (loops_per_jiffy / (5000 / HZ)) % 100);
330 
331 	seq_printf(m, "\n");
332 
333 	/* If this is the last cpu, print the summary */
334 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
335 		show_cpuinfo_summary(m);
336 
337 	return 0;
338 }
339 
340 static void *c_start(struct seq_file *m, loff_t *pos)
341 {
342 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
343 		*pos = cpumask_first(cpu_online_mask);
344 	else
345 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
346 	if ((*pos) < nr_cpu_ids)
347 		return (void *)(unsigned long)(*pos + 1);
348 	return NULL;
349 }
350 
351 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
352 {
353 	(*pos)++;
354 	return c_start(m, pos);
355 }
356 
357 static void c_stop(struct seq_file *m, void *v)
358 {
359 }
360 
361 const struct seq_operations cpuinfo_op = {
362 	.start	= c_start,
363 	.next	= c_next,
364 	.stop	= c_stop,
365 	.show	= show_cpuinfo,
366 };
367 
368 void __init check_for_initrd(void)
369 {
370 #ifdef CONFIG_BLK_DEV_INITRD
371 	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
372 	    initrd_start, initrd_end);
373 
374 	/* If we were passed an initrd, set the ROOT_DEV properly if the values
375 	 * look sensible. If not, clear initrd reference.
376 	 */
377 	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
378 	    initrd_end > initrd_start)
379 		ROOT_DEV = Root_RAM0;
380 	else
381 		initrd_start = initrd_end = 0;
382 
383 	if (initrd_start)
384 		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
385 
386 	DBG(" <- check_for_initrd()\n");
387 #endif /* CONFIG_BLK_DEV_INITRD */
388 }
389 
390 #ifdef CONFIG_SMP
391 
392 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
393 cpumask_t threads_core_mask __read_mostly;
394 EXPORT_SYMBOL_GPL(threads_per_core);
395 EXPORT_SYMBOL_GPL(threads_per_subcore);
396 EXPORT_SYMBOL_GPL(threads_shift);
397 EXPORT_SYMBOL_GPL(threads_core_mask);
398 
399 static void __init cpu_init_thread_core_maps(int tpc)
400 {
401 	int i;
402 
403 	threads_per_core = tpc;
404 	threads_per_subcore = tpc;
405 	cpumask_clear(&threads_core_mask);
406 
407 	/* This implementation only supports power of 2 number of threads
408 	 * for simplicity and performance
409 	 */
410 	threads_shift = ilog2(tpc);
411 	BUG_ON(tpc != (1 << threads_shift));
412 
413 	for (i = 0; i < tpc; i++)
414 		cpumask_set_cpu(i, &threads_core_mask);
415 
416 	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
417 	       tpc, tpc > 1 ? "s" : "");
418 	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
419 }
420 
421 
422 u32 *cpu_to_phys_id = NULL;
423 
424 /**
425  * setup_cpu_maps - initialize the following cpu maps:
426  *                  cpu_possible_mask
427  *                  cpu_present_mask
428  *
429  * Having the possible map set up early allows us to restrict allocations
430  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
431  *
432  * We do not initialize the online map here; cpus set their own bits in
433  * cpu_online_mask as they come up.
434  *
435  * This function is valid only for Open Firmware systems.  finish_device_tree
436  * must be called before using this.
437  *
438  * While we're here, we may as well set the "physical" cpu ids in the paca.
439  *
440  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
441  */
442 void __init smp_setup_cpu_maps(void)
443 {
444 	struct device_node *dn;
445 	int cpu = 0;
446 	int nthreads = 1;
447 
448 	DBG("smp_setup_cpu_maps()\n");
449 
450 	cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
451 					__alignof__(u32));
452 	if (!cpu_to_phys_id)
453 		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
454 		      __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
455 
456 	for_each_node_by_type(dn, "cpu") {
457 		const __be32 *intserv;
458 		__be32 cpu_be;
459 		int j, len;
460 
461 		DBG("  * %pOF...\n", dn);
462 
463 		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
464 				&len);
465 		if (intserv) {
466 			DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
467 			    nthreads);
468 		} else {
469 			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
470 			intserv = of_get_property(dn, "reg", &len);
471 			if (!intserv) {
472 				cpu_be = cpu_to_be32(cpu);
473 				/* XXX: what is this? uninitialized?? */
474 				intserv = &cpu_be;	/* assume logical == phys */
475 				len = 4;
476 			}
477 		}
478 
479 		nthreads = len / sizeof(int);
480 
481 		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
482 			bool avail;
483 
484 			DBG("    thread %d -> cpu %d (hard id %d)\n",
485 			    j, cpu, be32_to_cpu(intserv[j]));
486 
487 			avail = of_device_is_available(dn);
488 			if (!avail)
489 				avail = !of_property_match_string(dn,
490 						"enable-method", "spin-table");
491 
492 			set_cpu_present(cpu, avail);
493 			set_cpu_possible(cpu, true);
494 			cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
495 			cpu++;
496 		}
497 
498 		if (cpu >= nr_cpu_ids) {
499 			of_node_put(dn);
500 			break;
501 		}
502 	}
503 
504 	/* If no SMT supported, nthreads is forced to 1 */
505 	if (!cpu_has_feature(CPU_FTR_SMT)) {
506 		DBG("  SMT disabled ! nthreads forced to 1\n");
507 		nthreads = 1;
508 	}
509 
510 #ifdef CONFIG_PPC64
511 	/*
512 	 * On pSeries LPAR, we need to know how many cpus
513 	 * could possibly be added to this partition.
514 	 */
515 	if (firmware_has_feature(FW_FEATURE_LPAR) &&
516 	    (dn = of_find_node_by_path("/rtas"))) {
517 		int num_addr_cell, num_size_cell, maxcpus;
518 		const __be32 *ireg;
519 
520 		num_addr_cell = of_n_addr_cells(dn);
521 		num_size_cell = of_n_size_cells(dn);
522 
523 		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
524 
525 		if (!ireg)
526 			goto out;
527 
528 		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
529 
530 		/* Double maxcpus for processors which have SMT capability */
531 		if (cpu_has_feature(CPU_FTR_SMT))
532 			maxcpus *= nthreads;
533 
534 		if (maxcpus > nr_cpu_ids) {
535 			printk(KERN_WARNING
536 			       "Partition configured for %d cpus, "
537 			       "operating system maximum is %u.\n",
538 			       maxcpus, nr_cpu_ids);
539 			maxcpus = nr_cpu_ids;
540 		} else
541 			printk(KERN_INFO "Partition configured for %d cpus.\n",
542 			       maxcpus);
543 
544 		for (cpu = 0; cpu < maxcpus; cpu++)
545 			set_cpu_possible(cpu, true);
546 	out:
547 		of_node_put(dn);
548 	}
549 	vdso_data->processorCount = num_present_cpus();
550 #endif /* CONFIG_PPC64 */
551 
552         /* Initialize CPU <=> thread mapping/
553 	 *
554 	 * WARNING: We assume that the number of threads is the same for
555 	 * every CPU in the system. If that is not the case, then some code
556 	 * here will have to be reworked
557 	 */
558 	cpu_init_thread_core_maps(nthreads);
559 
560 	/* Now that possible cpus are set, set nr_cpu_ids for later use */
561 	setup_nr_cpu_ids();
562 
563 	free_unused_pacas();
564 }
565 #endif /* CONFIG_SMP */
566 
567 #ifdef CONFIG_PCSPKR_PLATFORM
568 static __init int add_pcspkr(void)
569 {
570 	struct device_node *np;
571 	struct platform_device *pd;
572 	int ret;
573 
574 	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
575 	of_node_put(np);
576 	if (!np)
577 		return -ENODEV;
578 
579 	pd = platform_device_alloc("pcspkr", -1);
580 	if (!pd)
581 		return -ENOMEM;
582 
583 	ret = platform_device_add(pd);
584 	if (ret)
585 		platform_device_put(pd);
586 
587 	return ret;
588 }
589 device_initcall(add_pcspkr);
590 #endif	/* CONFIG_PCSPKR_PLATFORM */
591 
592 void probe_machine(void)
593 {
594 	extern struct machdep_calls __machine_desc_start;
595 	extern struct machdep_calls __machine_desc_end;
596 	unsigned int i;
597 
598 	/*
599 	 * Iterate all ppc_md structures until we find the proper
600 	 * one for the current machine type
601 	 */
602 	DBG("Probing machine type ...\n");
603 
604 	/*
605 	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
606 	 * entry before probe_machine() which will be overwritten
607 	 */
608 	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
609 		if (((void **)&ppc_md)[i]) {
610 			printk(KERN_ERR "Entry %d in ppc_md non empty before"
611 			       " machine probe !\n", i);
612 		}
613 	}
614 
615 	for (machine_id = &__machine_desc_start;
616 	     machine_id < &__machine_desc_end;
617 	     machine_id++) {
618 		DBG("  %s ...", machine_id->name);
619 		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
620 		if (ppc_md.probe()) {
621 			DBG(" match !\n");
622 			break;
623 		}
624 		DBG("\n");
625 	}
626 	/* What can we do if we didn't find ? */
627 	if (machine_id >= &__machine_desc_end) {
628 		pr_err("No suitable machine description found !\n");
629 		for (;;);
630 	}
631 
632 	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
633 }
634 
635 /* Match a class of boards, not a specific device configuration. */
636 int check_legacy_ioport(unsigned long base_port)
637 {
638 	struct device_node *parent, *np = NULL;
639 	int ret = -ENODEV;
640 
641 	switch(base_port) {
642 	case I8042_DATA_REG:
643 		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
644 			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
645 		if (np) {
646 			parent = of_get_parent(np);
647 
648 			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
649 			if (!of_i8042_kbd_irq)
650 				of_i8042_kbd_irq = 1;
651 
652 			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
653 			if (!of_i8042_aux_irq)
654 				of_i8042_aux_irq = 12;
655 
656 			of_node_put(np);
657 			np = parent;
658 			break;
659 		}
660 		np = of_find_node_by_type(NULL, "8042");
661 		/* Pegasos has no device_type on its 8042 node, look for the
662 		 * name instead */
663 		if (!np)
664 			np = of_find_node_by_name(NULL, "8042");
665 		if (np) {
666 			of_i8042_kbd_irq = 1;
667 			of_i8042_aux_irq = 12;
668 		}
669 		break;
670 	case FDC_BASE: /* FDC1 */
671 		np = of_find_node_by_type(NULL, "fdc");
672 		break;
673 	default:
674 		/* ipmi is supposed to fail here */
675 		break;
676 	}
677 	if (!np)
678 		return ret;
679 	parent = of_get_parent(np);
680 	if (parent) {
681 		if (of_node_is_type(parent, "isa"))
682 			ret = 0;
683 		of_node_put(parent);
684 	}
685 	of_node_put(np);
686 	return ret;
687 }
688 EXPORT_SYMBOL(check_legacy_ioport);
689 
690 static int ppc_panic_event(struct notifier_block *this,
691                              unsigned long event, void *ptr)
692 {
693 	/*
694 	 * panic does a local_irq_disable, but we really
695 	 * want interrupts to be hard disabled.
696 	 */
697 	hard_irq_disable();
698 
699 	/*
700 	 * If firmware-assisted dump has been registered then trigger
701 	 * firmware-assisted dump and let firmware handle everything else.
702 	 */
703 	crash_fadump(NULL, ptr);
704 	if (ppc_md.panic)
705 		ppc_md.panic(ptr);  /* May not return */
706 	return NOTIFY_DONE;
707 }
708 
709 static struct notifier_block ppc_panic_block = {
710 	.notifier_call = ppc_panic_event,
711 	.priority = INT_MIN /* may not return; must be done last */
712 };
713 
714 /*
715  * Dump out kernel offset information on panic.
716  */
717 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
718 			      void *p)
719 {
720 	pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
721 		 kaslr_offset(), KERNELBASE);
722 
723 	return 0;
724 }
725 
726 static struct notifier_block kernel_offset_notifier = {
727 	.notifier_call = dump_kernel_offset
728 };
729 
730 void __init setup_panic(void)
731 {
732 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
733 		atomic_notifier_chain_register(&panic_notifier_list,
734 					       &kernel_offset_notifier);
735 
736 	/* PPC64 always does a hard irq disable in its panic handler */
737 	if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
738 		return;
739 	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
740 }
741 
742 #ifdef CONFIG_CHECK_CACHE_COHERENCY
743 /*
744  * For platforms that have configurable cache-coherency.  This function
745  * checks that the cache coherency setting of the kernel matches the setting
746  * left by the firmware, as indicated in the device tree.  Since a mismatch
747  * will eventually result in DMA failures, we print * and error and call
748  * BUG() in that case.
749  */
750 
751 #define KERNEL_COHERENCY	(!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
752 
753 static int __init check_cache_coherency(void)
754 {
755 	struct device_node *np;
756 	const void *prop;
757 	bool devtree_coherency;
758 
759 	np = of_find_node_by_path("/");
760 	prop = of_get_property(np, "coherency-off", NULL);
761 	of_node_put(np);
762 
763 	devtree_coherency = prop ? false : true;
764 
765 	if (devtree_coherency != KERNEL_COHERENCY) {
766 		printk(KERN_ERR
767 			"kernel coherency:%s != device tree_coherency:%s\n",
768 			KERNEL_COHERENCY ? "on" : "off",
769 			devtree_coherency ? "on" : "off");
770 		BUG();
771 	}
772 
773 	return 0;
774 }
775 
776 late_initcall(check_cache_coherency);
777 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
778 
779 #ifdef CONFIG_DEBUG_FS
780 struct dentry *powerpc_debugfs_root;
781 EXPORT_SYMBOL(powerpc_debugfs_root);
782 
783 static int powerpc_debugfs_init(void)
784 {
785 	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
786 	return 0;
787 }
788 arch_initcall(powerpc_debugfs_init);
789 #endif
790 
791 void ppc_printk_progress(char *s, unsigned short hex)
792 {
793 	pr_info("%s\n", s);
794 }
795 
796 static __init void print_system_info(void)
797 {
798 	pr_info("-----------------------------------------------------\n");
799 	pr_info("phys_mem_size     = 0x%llx\n",
800 		(unsigned long long)memblock_phys_mem_size());
801 
802 	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
803 	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
804 	if (ucache_bsize != 0)
805 		pr_info("ucache_bsize      = 0x%x\n", ucache_bsize);
806 
807 	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
808 	pr_info("  possible        = 0x%016lx\n",
809 		(unsigned long)CPU_FTRS_POSSIBLE);
810 	pr_info("  always          = 0x%016lx\n",
811 		(unsigned long)CPU_FTRS_ALWAYS);
812 	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
813 		cur_cpu_spec->cpu_user_features,
814 		cur_cpu_spec->cpu_user_features2);
815 	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
816 #ifdef CONFIG_PPC64
817 	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
818 #ifdef CONFIG_PPC_BOOK3S
819 	pr_info("vmalloc start     = 0x%lx\n", KERN_VIRT_START);
820 	pr_info("IO start          = 0x%lx\n", KERN_IO_START);
821 	pr_info("vmemmap start     = 0x%lx\n", (unsigned long)vmemmap);
822 #endif
823 #endif
824 
825 	if (!early_radix_enabled())
826 		print_system_hash_info();
827 
828 	if (PHYSICAL_START > 0)
829 		pr_info("physical_start    = 0x%llx\n",
830 		       (unsigned long long)PHYSICAL_START);
831 	pr_info("-----------------------------------------------------\n");
832 }
833 
834 #ifdef CONFIG_SMP
835 static void smp_setup_pacas(void)
836 {
837 	int cpu;
838 
839 	for_each_possible_cpu(cpu) {
840 		if (cpu == smp_processor_id())
841 			continue;
842 		allocate_paca(cpu);
843 		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
844 	}
845 
846 	memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
847 	cpu_to_phys_id = NULL;
848 }
849 #endif
850 
851 /*
852  * Called into from start_kernel this initializes memblock, which is used
853  * to manage page allocation until mem_init is called.
854  */
855 void __init setup_arch(char **cmdline_p)
856 {
857 	kasan_init();
858 
859 	*cmdline_p = boot_command_line;
860 
861 	/* Set a half-reasonable default so udelay does something sensible */
862 	loops_per_jiffy = 500000000 / HZ;
863 
864 	/* Unflatten the device-tree passed by prom_init or kexec */
865 	unflatten_device_tree();
866 
867 	/*
868 	 * Initialize cache line/block info from device-tree (on ppc64) or
869 	 * just cputable (on ppc32).
870 	 */
871 	initialize_cache_info();
872 
873 	/* Initialize RTAS if available. */
874 	rtas_initialize();
875 
876 	/* Check if we have an initrd provided via the device-tree. */
877 	check_for_initrd();
878 
879 	/* Probe the machine type, establish ppc_md. */
880 	probe_machine();
881 
882 	/* Setup panic notifier if requested by the platform. */
883 	setup_panic();
884 
885 	/*
886 	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
887 	 * it from their respective probe() function.
888 	 */
889 	setup_power_save();
890 
891 	/* Discover standard serial ports. */
892 	find_legacy_serial_ports();
893 
894 	/* Register early console with the printk subsystem. */
895 	register_early_udbg_console();
896 
897 	/* Setup the various CPU maps based on the device-tree. */
898 	smp_setup_cpu_maps();
899 
900 	/* Initialize xmon. */
901 	xmon_setup();
902 
903 	/* Check the SMT related command line arguments (ppc64). */
904 	check_smt_enabled();
905 
906 	/* Parse memory topology */
907 	mem_topology_setup();
908 
909 	/*
910 	 * Release secondary cpus out of their spinloops at 0x60 now that
911 	 * we can map physical -> logical CPU ids.
912 	 *
913 	 * Freescale Book3e parts spin in a loop provided by firmware,
914 	 * so smp_release_cpus() does nothing for them.
915 	 */
916 #ifdef CONFIG_SMP
917 	smp_setup_pacas();
918 
919 	/* On BookE, setup per-core TLB data structures. */
920 	setup_tlb_core_data();
921 
922 	smp_release_cpus();
923 #endif
924 
925 	/* Print various info about the machine that has been gathered so far. */
926 	print_system_info();
927 
928 	/* Reserve large chunks of memory for use by CMA for KVM. */
929 	kvm_cma_reserve();
930 
931 	klp_init_thread_info(&init_task);
932 
933 	init_mm.start_code = (unsigned long)_stext;
934 	init_mm.end_code = (unsigned long) _etext;
935 	init_mm.end_data = (unsigned long) _edata;
936 	init_mm.brk = klimit;
937 
938 	mm_iommu_init(&init_mm);
939 	irqstack_early_init();
940 	exc_lvl_early_init();
941 	emergency_stack_init();
942 
943 	initmem_init();
944 
945 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
946 
947 	if (ppc_md.setup_arch)
948 		ppc_md.setup_arch();
949 
950 	setup_barrier_nospec();
951 	setup_spectre_v2();
952 
953 	paging_init();
954 
955 	/* Initialize the MMU context management stuff. */
956 	mmu_context_init();
957 
958 	/* Interrupt code needs to be 64K-aligned. */
959 	if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
960 		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
961 		      (unsigned long)_stext);
962 }
963