1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation 4 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM 5 * 6 * RTAS specific routines for PCI. 7 * 8 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/threads.h> 13 #include <linux/pci.h> 14 #include <linux/string.h> 15 #include <linux/init.h> 16 #include <linux/pgtable.h> 17 #include <linux/of_address.h> 18 #include <linux/of_fdt.h> 19 20 #include <asm/io.h> 21 #include <asm/irq.h> 22 #include <asm/machdep.h> 23 #include <asm/pci-bridge.h> 24 #include <asm/iommu.h> 25 #include <asm/rtas.h> 26 #include <asm/mpic.h> 27 #include <asm/ppc-pci.h> 28 #include <asm/eeh.h> 29 30 /* RTAS tokens */ 31 static int read_pci_config; 32 static int write_pci_config; 33 static int ibm_read_pci_config; 34 static int ibm_write_pci_config; 35 36 static inline int config_access_valid(struct pci_dn *dn, int where) 37 { 38 if (where < 256) 39 return 1; 40 if (where < 4096 && dn->pci_ext_config_space) 41 return 1; 42 43 return 0; 44 } 45 46 int rtas_pci_dn_read_config(struct pci_dn *pdn, int where, int size, u32 *val) 47 { 48 int returnval = -1; 49 unsigned long buid, addr; 50 int ret; 51 52 if (!pdn) 53 return PCIBIOS_DEVICE_NOT_FOUND; 54 if (!config_access_valid(pdn, where)) 55 return PCIBIOS_BAD_REGISTER_NUMBER; 56 #ifdef CONFIG_EEH 57 if (pdn->edev && 58 (pdn->edev->mode & EEH_DEV_REMOVED)) 59 return PCIBIOS_DEVICE_NOT_FOUND; 60 61 if (pdn->edev && pdn->edev->pe && 62 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED)) 63 return PCIBIOS_SET_FAILED; 64 #endif 65 66 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 67 buid = pdn->phb->buid; 68 if (buid) { 69 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, 70 addr, BUID_HI(buid), BUID_LO(buid), size); 71 } else { 72 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); 73 } 74 *val = returnval; 75 76 if (ret) 77 return PCIBIOS_DEVICE_NOT_FOUND; 78 79 return PCIBIOS_SUCCESSFUL; 80 } 81 82 static int rtas_pci_read_config(struct pci_bus *bus, 83 unsigned int devfn, 84 int where, int size, u32 *val) 85 { 86 struct pci_dn *pdn; 87 int ret; 88 89 *val = 0xFFFFFFFF; 90 91 pdn = pci_get_pdn_by_devfn(bus, devfn); 92 93 /* Validity of pdn is checked in here */ 94 ret = rtas_pci_dn_read_config(pdn, where, size, val); 95 if (*val == EEH_IO_ERROR_VALUE(size) && 96 eeh_dev_check_failure(pdn_to_eeh_dev(pdn))) 97 return PCIBIOS_DEVICE_NOT_FOUND; 98 99 return ret; 100 } 101 102 int rtas_pci_dn_write_config(struct pci_dn *pdn, int where, int size, u32 val) 103 { 104 unsigned long buid, addr; 105 int ret; 106 107 if (!pdn) 108 return PCIBIOS_DEVICE_NOT_FOUND; 109 if (!config_access_valid(pdn, where)) 110 return PCIBIOS_BAD_REGISTER_NUMBER; 111 #ifdef CONFIG_EEH 112 if (pdn->edev && 113 (pdn->edev->mode & EEH_DEV_REMOVED)) 114 return PCIBIOS_DEVICE_NOT_FOUND; 115 116 if (pdn->edev && pdn->edev->pe && 117 (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED)) 118 return PCIBIOS_SET_FAILED; 119 #endif 120 121 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); 122 buid = pdn->phb->buid; 123 if (buid) { 124 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, 125 BUID_HI(buid), BUID_LO(buid), size, (ulong) val); 126 } else { 127 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); 128 } 129 130 if (ret) 131 return PCIBIOS_DEVICE_NOT_FOUND; 132 133 return PCIBIOS_SUCCESSFUL; 134 } 135 136 static int rtas_pci_write_config(struct pci_bus *bus, 137 unsigned int devfn, 138 int where, int size, u32 val) 139 { 140 struct pci_dn *pdn; 141 142 pdn = pci_get_pdn_by_devfn(bus, devfn); 143 144 /* Validity of pdn is checked in here. */ 145 return rtas_pci_dn_write_config(pdn, where, size, val); 146 } 147 148 static struct pci_ops rtas_pci_ops = { 149 .read = rtas_pci_read_config, 150 .write = rtas_pci_write_config, 151 }; 152 153 static int is_python(struct device_node *dev) 154 { 155 const char *model = of_get_property(dev, "model", NULL); 156 157 if (model && strstr(model, "Python")) 158 return 1; 159 160 return 0; 161 } 162 163 static void python_countermeasures(struct device_node *dev) 164 { 165 struct resource registers; 166 void __iomem *chip_regs; 167 volatile u32 val; 168 169 if (of_address_to_resource(dev, 0, ®isters)) { 170 printk(KERN_ERR "Can't get address for Python workarounds !\n"); 171 return; 172 } 173 174 /* Python's register file is 1 MB in size. */ 175 chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000); 176 177 /* 178 * Firmware doesn't always clear this bit which is critical 179 * for good performance - Anton 180 */ 181 182 #define PRG_CL_RESET_VALID 0x00010000 183 184 val = in_be32(chip_regs + 0xf6030); 185 if (val & PRG_CL_RESET_VALID) { 186 printk(KERN_INFO "Python workaround: "); 187 val &= ~PRG_CL_RESET_VALID; 188 out_be32(chip_regs + 0xf6030, val); 189 /* 190 * We must read it back for changes to 191 * take effect 192 */ 193 val = in_be32(chip_regs + 0xf6030); 194 printk("reg0: %x\n", val); 195 } 196 197 iounmap(chip_regs); 198 } 199 200 void __init init_pci_config_tokens(void) 201 { 202 read_pci_config = rtas_function_token(RTAS_FN_READ_PCI_CONFIG); 203 write_pci_config = rtas_function_token(RTAS_FN_WRITE_PCI_CONFIG); 204 ibm_read_pci_config = rtas_function_token(RTAS_FN_IBM_READ_PCI_CONFIG); 205 ibm_write_pci_config = rtas_function_token(RTAS_FN_IBM_WRITE_PCI_CONFIG); 206 } 207 208 unsigned long get_phb_buid(struct device_node *phb) 209 { 210 struct resource r; 211 212 if (ibm_read_pci_config == -1) 213 return 0; 214 if (of_address_to_resource(phb, 0, &r)) 215 return 0; 216 return r.start; 217 } 218 219 static int phb_set_bus_ranges(struct device_node *dev, 220 struct pci_controller *phb) 221 { 222 const __be32 *bus_range; 223 unsigned int len; 224 225 bus_range = of_get_property(dev, "bus-range", &len); 226 if (bus_range == NULL || len < 2 * sizeof(int)) { 227 return 1; 228 } 229 230 phb->first_busno = be32_to_cpu(bus_range[0]); 231 phb->last_busno = be32_to_cpu(bus_range[1]); 232 233 return 0; 234 } 235 236 int rtas_setup_phb(struct pci_controller *phb) 237 { 238 struct device_node *dev = phb->dn; 239 240 if (is_python(dev)) 241 python_countermeasures(dev); 242 243 if (phb_set_bus_ranges(dev, phb)) 244 return 1; 245 246 phb->ops = &rtas_pci_ops; 247 phb->buid = get_phb_buid(dev); 248 249 return 0; 250 } 251