xref: /linux/arch/powerpc/kernel/ptrace/ptrace-view.c (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 
3 #include <linux/regset.h>
4 #include <linux/elf.h>
5 #include <linux/nospec.h>
6 #include <linux/pkeys.h>
7 
8 #include "ptrace-decl.h"
9 
10 struct pt_regs_offset {
11 	const char *name;
12 	int offset;
13 };
14 
15 #define STR(s)	#s			/* convert to string */
16 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
17 #define GPR_OFFSET_NAME(num)	\
18 	{.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \
19 	{.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
20 #define REG_OFFSET_END {.name = NULL, .offset = 0}
21 
22 static const struct pt_regs_offset regoffset_table[] = {
23 	GPR_OFFSET_NAME(0),
24 	GPR_OFFSET_NAME(1),
25 	GPR_OFFSET_NAME(2),
26 	GPR_OFFSET_NAME(3),
27 	GPR_OFFSET_NAME(4),
28 	GPR_OFFSET_NAME(5),
29 	GPR_OFFSET_NAME(6),
30 	GPR_OFFSET_NAME(7),
31 	GPR_OFFSET_NAME(8),
32 	GPR_OFFSET_NAME(9),
33 	GPR_OFFSET_NAME(10),
34 	GPR_OFFSET_NAME(11),
35 	GPR_OFFSET_NAME(12),
36 	GPR_OFFSET_NAME(13),
37 	GPR_OFFSET_NAME(14),
38 	GPR_OFFSET_NAME(15),
39 	GPR_OFFSET_NAME(16),
40 	GPR_OFFSET_NAME(17),
41 	GPR_OFFSET_NAME(18),
42 	GPR_OFFSET_NAME(19),
43 	GPR_OFFSET_NAME(20),
44 	GPR_OFFSET_NAME(21),
45 	GPR_OFFSET_NAME(22),
46 	GPR_OFFSET_NAME(23),
47 	GPR_OFFSET_NAME(24),
48 	GPR_OFFSET_NAME(25),
49 	GPR_OFFSET_NAME(26),
50 	GPR_OFFSET_NAME(27),
51 	GPR_OFFSET_NAME(28),
52 	GPR_OFFSET_NAME(29),
53 	GPR_OFFSET_NAME(30),
54 	GPR_OFFSET_NAME(31),
55 	REG_OFFSET_NAME(nip),
56 	REG_OFFSET_NAME(msr),
57 	REG_OFFSET_NAME(ctr),
58 	REG_OFFSET_NAME(link),
59 	REG_OFFSET_NAME(xer),
60 	REG_OFFSET_NAME(ccr),
61 #ifdef CONFIG_PPC64
62 	REG_OFFSET_NAME(softe),
63 #else
64 	REG_OFFSET_NAME(mq),
65 #endif
66 	REG_OFFSET_NAME(trap),
67 	REG_OFFSET_NAME(dar),
68 	REG_OFFSET_NAME(dsisr),
69 	REG_OFFSET_END,
70 };
71 
72 /**
73  * regs_query_register_offset() - query register offset from its name
74  * @name:	the name of a register
75  *
76  * regs_query_register_offset() returns the offset of a register in struct
77  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
78  */
79 int regs_query_register_offset(const char *name)
80 {
81 	const struct pt_regs_offset *roff;
82 	for (roff = regoffset_table; roff->name != NULL; roff++)
83 		if (!strcmp(roff->name, name))
84 			return roff->offset;
85 	return -EINVAL;
86 }
87 
88 /**
89  * regs_query_register_name() - query register name from its offset
90  * @offset:	the offset of a register in struct pt_regs.
91  *
92  * regs_query_register_name() returns the name of a register from its
93  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
94  */
95 const char *regs_query_register_name(unsigned int offset)
96 {
97 	const struct pt_regs_offset *roff;
98 	for (roff = regoffset_table; roff->name != NULL; roff++)
99 		if (roff->offset == offset)
100 			return roff->name;
101 	return NULL;
102 }
103 
104 /*
105  * does not yet catch signals sent when the child dies.
106  * in exit.c or in signal.c.
107  */
108 
109 static unsigned long get_user_msr(struct task_struct *task)
110 {
111 	return task->thread.regs->msr | task->thread.fpexc_mode;
112 }
113 
114 static int set_user_msr(struct task_struct *task, unsigned long msr)
115 {
116 	task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
117 	task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
118 	return 0;
119 }
120 
121 #ifdef CONFIG_PPC64
122 static int get_user_dscr(struct task_struct *task, unsigned long *data)
123 {
124 	*data = task->thread.dscr;
125 	return 0;
126 }
127 
128 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
129 {
130 	task->thread.dscr = dscr;
131 	task->thread.dscr_inherit = 1;
132 	return 0;
133 }
134 #else
135 static int get_user_dscr(struct task_struct *task, unsigned long *data)
136 {
137 	return -EIO;
138 }
139 
140 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
141 {
142 	return -EIO;
143 }
144 #endif
145 
146 /*
147  * We prevent mucking around with the reserved area of trap
148  * which are used internally by the kernel.
149  */
150 static int set_user_trap(struct task_struct *task, unsigned long trap)
151 {
152 	set_trap(task->thread.regs, trap);
153 	return 0;
154 }
155 
156 /*
157  * Get contents of register REGNO in task TASK.
158  */
159 int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
160 {
161 	unsigned int regs_max;
162 
163 	if (task->thread.regs == NULL || !data)
164 		return -EIO;
165 
166 	if (regno == PT_MSR) {
167 		*data = get_user_msr(task);
168 		return 0;
169 	}
170 
171 	if (regno == PT_DSCR)
172 		return get_user_dscr(task, data);
173 
174 	/*
175 	 * softe copies paca->irq_soft_mask variable state. Since irq_soft_mask is
176 	 * no more used as a flag, lets force usr to alway see the softe value as 1
177 	 * which means interrupts are not soft disabled.
178 	 */
179 	if (IS_ENABLED(CONFIG_PPC64) && regno == PT_SOFTE) {
180 		*data = 1;
181 		return  0;
182 	}
183 
184 	regs_max = sizeof(struct user_pt_regs) / sizeof(unsigned long);
185 	if (regno < regs_max) {
186 		regno = array_index_nospec(regno, regs_max);
187 		*data = ((unsigned long *)task->thread.regs)[regno];
188 		return 0;
189 	}
190 
191 	return -EIO;
192 }
193 
194 /*
195  * Write contents of register REGNO in task TASK.
196  */
197 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
198 {
199 	if (task->thread.regs == NULL)
200 		return -EIO;
201 
202 	if (regno == PT_MSR)
203 		return set_user_msr(task, data);
204 	if (regno == PT_TRAP)
205 		return set_user_trap(task, data);
206 	if (regno == PT_DSCR)
207 		return set_user_dscr(task, data);
208 
209 	if (regno <= PT_MAX_PUT_REG) {
210 		regno = array_index_nospec(regno, PT_MAX_PUT_REG + 1);
211 		((unsigned long *)task->thread.regs)[regno] = data;
212 		return 0;
213 	}
214 	return -EIO;
215 }
216 
217 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
218 		   struct membuf to)
219 {
220 	struct membuf to_msr = membuf_at(&to, offsetof(struct pt_regs, msr));
221 #ifdef CONFIG_PPC64
222 	struct membuf to_softe = membuf_at(&to, offsetof(struct pt_regs, softe));
223 #endif
224 	int i;
225 
226 	if (target->thread.regs == NULL)
227 		return -EIO;
228 
229 	if (!FULL_REGS(target->thread.regs)) {
230 		/* We have a partial register set.  Fill 14-31 with bogus values */
231 		for (i = 14; i < 32; i++)
232 			target->thread.regs->gpr[i] = NV_REG_POISON;
233 	}
234 
235 	membuf_write(&to, target->thread.regs, sizeof(struct user_pt_regs));
236 
237 	membuf_store(&to_msr, get_user_msr(target));
238 #ifdef CONFIG_PPC64
239 	membuf_store(&to_softe, 0x1ul);
240 #endif
241 	return membuf_zero(&to, ELF_NGREG * sizeof(unsigned long) -
242 				 sizeof(struct user_pt_regs));
243 }
244 
245 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
246 		   unsigned int pos, unsigned int count, const void *kbuf,
247 		   const void __user *ubuf)
248 {
249 	unsigned long reg;
250 	int ret;
251 
252 	if (target->thread.regs == NULL)
253 		return -EIO;
254 
255 	CHECK_FULL_REGS(target->thread.regs);
256 
257 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
258 				 target->thread.regs,
259 				 0, PT_MSR * sizeof(reg));
260 
261 	if (!ret && count > 0) {
262 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
263 					 PT_MSR * sizeof(reg),
264 					 (PT_MSR + 1) * sizeof(reg));
265 		if (!ret)
266 			ret = set_user_msr(target, reg);
267 	}
268 
269 	BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
270 		     offsetof(struct pt_regs, msr) + sizeof(long));
271 
272 	if (!ret)
273 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
274 					 &target->thread.regs->orig_gpr3,
275 					 PT_ORIG_R3 * sizeof(reg),
276 					 (PT_MAX_PUT_REG + 1) * sizeof(reg));
277 
278 	if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
279 		ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
280 						(PT_MAX_PUT_REG + 1) * sizeof(reg),
281 						PT_TRAP * sizeof(reg));
282 
283 	if (!ret && count > 0) {
284 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
285 					 PT_TRAP * sizeof(reg),
286 					 (PT_TRAP + 1) * sizeof(reg));
287 		if (!ret)
288 			ret = set_user_trap(target, reg);
289 	}
290 
291 	if (!ret)
292 		ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
293 						(PT_TRAP + 1) * sizeof(reg), -1);
294 
295 	return ret;
296 }
297 
298 #ifdef CONFIG_PPC64
299 static int ppr_get(struct task_struct *target, const struct user_regset *regset,
300 		   struct membuf to)
301 {
302 	return membuf_write(&to, &target->thread.regs->ppr, sizeof(u64));
303 }
304 
305 static int ppr_set(struct task_struct *target, const struct user_regset *regset,
306 		   unsigned int pos, unsigned int count, const void *kbuf,
307 		   const void __user *ubuf)
308 {
309 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
310 				  &target->thread.regs->ppr, 0, sizeof(u64));
311 }
312 
313 static int dscr_get(struct task_struct *target, const struct user_regset *regset,
314 		    struct membuf to)
315 {
316 	return membuf_write(&to, &target->thread.dscr, sizeof(u64));
317 }
318 static int dscr_set(struct task_struct *target, const struct user_regset *regset,
319 		    unsigned int pos, unsigned int count, const void *kbuf,
320 		    const void __user *ubuf)
321 {
322 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
323 				  &target->thread.dscr, 0, sizeof(u64));
324 }
325 #endif
326 #ifdef CONFIG_PPC_BOOK3S_64
327 static int tar_get(struct task_struct *target, const struct user_regset *regset,
328 		   struct membuf to)
329 {
330 	return membuf_write(&to, &target->thread.tar, sizeof(u64));
331 }
332 static int tar_set(struct task_struct *target, const struct user_regset *regset,
333 		   unsigned int pos, unsigned int count, const void *kbuf,
334 		   const void __user *ubuf)
335 {
336 	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
337 				  &target->thread.tar, 0, sizeof(u64));
338 }
339 
340 static int ebb_active(struct task_struct *target, const struct user_regset *regset)
341 {
342 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
343 		return -ENODEV;
344 
345 	if (target->thread.used_ebb)
346 		return regset->n;
347 
348 	return 0;
349 }
350 
351 static int ebb_get(struct task_struct *target, const struct user_regset *regset,
352 		   struct membuf to)
353 {
354 	/* Build tests */
355 	BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
356 	BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
357 
358 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
359 		return -ENODEV;
360 
361 	if (!target->thread.used_ebb)
362 		return -ENODATA;
363 
364 	return membuf_write(&to, &target->thread.ebbrr, 3 * sizeof(unsigned long));
365 }
366 
367 static int ebb_set(struct task_struct *target, const struct user_regset *regset,
368 		   unsigned int pos, unsigned int count, const void *kbuf,
369 		   const void __user *ubuf)
370 {
371 	int ret = 0;
372 
373 	/* Build tests */
374 	BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
375 	BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
376 
377 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
378 		return -ENODEV;
379 
380 	if (target->thread.used_ebb)
381 		return -ENODATA;
382 
383 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.ebbrr,
384 				 0, sizeof(unsigned long));
385 
386 	if (!ret)
387 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
388 					 &target->thread.ebbhr, sizeof(unsigned long),
389 					 2 * sizeof(unsigned long));
390 
391 	if (!ret)
392 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
393 					 &target->thread.bescr, 2 * sizeof(unsigned long),
394 					 3 * sizeof(unsigned long));
395 
396 	return ret;
397 }
398 static int pmu_active(struct task_struct *target, const struct user_regset *regset)
399 {
400 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
401 		return -ENODEV;
402 
403 	return regset->n;
404 }
405 
406 static int pmu_get(struct task_struct *target, const struct user_regset *regset,
407 		   struct membuf to)
408 {
409 	/* Build tests */
410 	BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
411 	BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
412 	BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
413 	BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
414 
415 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
416 		return -ENODEV;
417 
418 	return membuf_write(&to, &target->thread.siar, 5 * sizeof(unsigned long));
419 }
420 
421 static int pmu_set(struct task_struct *target, const struct user_regset *regset,
422 		   unsigned int pos, unsigned int count, const void *kbuf,
423 		   const void __user *ubuf)
424 {
425 	int ret = 0;
426 
427 	/* Build tests */
428 	BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
429 	BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
430 	BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
431 	BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
432 
433 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
434 		return -ENODEV;
435 
436 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.siar,
437 				 0, sizeof(unsigned long));
438 
439 	if (!ret)
440 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
441 					 &target->thread.sdar, sizeof(unsigned long),
442 					 2 * sizeof(unsigned long));
443 
444 	if (!ret)
445 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
446 					 &target->thread.sier, 2 * sizeof(unsigned long),
447 					 3 * sizeof(unsigned long));
448 
449 	if (!ret)
450 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
451 					 &target->thread.mmcr2, 3 * sizeof(unsigned long),
452 					 4 * sizeof(unsigned long));
453 
454 	if (!ret)
455 		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
456 					 &target->thread.mmcr0, 4 * sizeof(unsigned long),
457 					 5 * sizeof(unsigned long));
458 	return ret;
459 }
460 #endif
461 
462 #ifdef CONFIG_PPC_MEM_KEYS
463 static int pkey_active(struct task_struct *target, const struct user_regset *regset)
464 {
465 	if (!arch_pkeys_enabled())
466 		return -ENODEV;
467 
468 	return regset->n;
469 }
470 
471 static int pkey_get(struct task_struct *target, const struct user_regset *regset,
472 		    struct membuf to)
473 {
474 
475 	if (!arch_pkeys_enabled())
476 		return -ENODEV;
477 
478 	membuf_store(&to, target->thread.regs->amr);
479 	membuf_store(&to, target->thread.regs->iamr);
480 	return membuf_store(&to, default_uamor);
481 }
482 
483 static int pkey_set(struct task_struct *target, const struct user_regset *regset,
484 		    unsigned int pos, unsigned int count, const void *kbuf,
485 		    const void __user *ubuf)
486 {
487 	u64 new_amr;
488 	int ret;
489 
490 	if (!arch_pkeys_enabled())
491 		return -ENODEV;
492 
493 	/* Only the AMR can be set from userspace */
494 	if (pos != 0 || count != sizeof(new_amr))
495 		return -EINVAL;
496 
497 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
498 				 &new_amr, 0, sizeof(new_amr));
499 	if (ret)
500 		return ret;
501 
502 	/*
503 	 * UAMOR determines which bits of the AMR can be set from userspace.
504 	 * UAMOR value 0b11 indicates that the AMR value can be modified
505 	 * from userspace. If the kernel is using a specific key, we avoid
506 	 * userspace modifying the AMR value for that key by masking them
507 	 * via UAMOR 0b00.
508 	 *
509 	 * Pick the AMR values for the keys that kernel is using. This
510 	 * will be indicated by the ~default_uamor bits.
511 	 */
512 	target->thread.regs->amr = (new_amr & default_uamor) |
513 		(target->thread.regs->amr & ~default_uamor);
514 
515 	return 0;
516 }
517 #endif /* CONFIG_PPC_MEM_KEYS */
518 
519 static const struct user_regset native_regsets[] = {
520 	[REGSET_GPR] = {
521 		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
522 		.size = sizeof(long), .align = sizeof(long),
523 		.regset_get = gpr_get, .set = gpr_set
524 	},
525 #ifdef CONFIG_PPC_FPU_REGS
526 	[REGSET_FPR] = {
527 		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
528 		.size = sizeof(double), .align = sizeof(double),
529 		.regset_get = fpr_get, .set = fpr_set
530 	},
531 #endif
532 #ifdef CONFIG_ALTIVEC
533 	[REGSET_VMX] = {
534 		.core_note_type = NT_PPC_VMX, .n = 34,
535 		.size = sizeof(vector128), .align = sizeof(vector128),
536 		.active = vr_active, .regset_get = vr_get, .set = vr_set
537 	},
538 #endif
539 #ifdef CONFIG_VSX
540 	[REGSET_VSX] = {
541 		.core_note_type = NT_PPC_VSX, .n = 32,
542 		.size = sizeof(double), .align = sizeof(double),
543 		.active = vsr_active, .regset_get = vsr_get, .set = vsr_set
544 	},
545 #endif
546 #ifdef CONFIG_SPE
547 	[REGSET_SPE] = {
548 		.core_note_type = NT_PPC_SPE, .n = 35,
549 		.size = sizeof(u32), .align = sizeof(u32),
550 		.active = evr_active, .regset_get = evr_get, .set = evr_set
551 	},
552 #endif
553 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
554 	[REGSET_TM_CGPR] = {
555 		.core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
556 		.size = sizeof(long), .align = sizeof(long),
557 		.active = tm_cgpr_active, .regset_get = tm_cgpr_get, .set = tm_cgpr_set
558 	},
559 	[REGSET_TM_CFPR] = {
560 		.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
561 		.size = sizeof(double), .align = sizeof(double),
562 		.active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set
563 	},
564 	[REGSET_TM_CVMX] = {
565 		.core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
566 		.size = sizeof(vector128), .align = sizeof(vector128),
567 		.active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set
568 	},
569 	[REGSET_TM_CVSX] = {
570 		.core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
571 		.size = sizeof(double), .align = sizeof(double),
572 		.active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set
573 	},
574 	[REGSET_TM_SPR] = {
575 		.core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
576 		.size = sizeof(u64), .align = sizeof(u64),
577 		.active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set
578 	},
579 	[REGSET_TM_CTAR] = {
580 		.core_note_type = NT_PPC_TM_CTAR, .n = 1,
581 		.size = sizeof(u64), .align = sizeof(u64),
582 		.active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set
583 	},
584 	[REGSET_TM_CPPR] = {
585 		.core_note_type = NT_PPC_TM_CPPR, .n = 1,
586 		.size = sizeof(u64), .align = sizeof(u64),
587 		.active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set
588 	},
589 	[REGSET_TM_CDSCR] = {
590 		.core_note_type = NT_PPC_TM_CDSCR, .n = 1,
591 		.size = sizeof(u64), .align = sizeof(u64),
592 		.active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set
593 	},
594 #endif
595 #ifdef CONFIG_PPC64
596 	[REGSET_PPR] = {
597 		.core_note_type = NT_PPC_PPR, .n = 1,
598 		.size = sizeof(u64), .align = sizeof(u64),
599 		.regset_get = ppr_get, .set = ppr_set
600 	},
601 	[REGSET_DSCR] = {
602 		.core_note_type = NT_PPC_DSCR, .n = 1,
603 		.size = sizeof(u64), .align = sizeof(u64),
604 		.regset_get = dscr_get, .set = dscr_set
605 	},
606 #endif
607 #ifdef CONFIG_PPC_BOOK3S_64
608 	[REGSET_TAR] = {
609 		.core_note_type = NT_PPC_TAR, .n = 1,
610 		.size = sizeof(u64), .align = sizeof(u64),
611 		.regset_get = tar_get, .set = tar_set
612 	},
613 	[REGSET_EBB] = {
614 		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
615 		.size = sizeof(u64), .align = sizeof(u64),
616 		.active = ebb_active, .regset_get = ebb_get, .set = ebb_set
617 	},
618 	[REGSET_PMR] = {
619 		.core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
620 		.size = sizeof(u64), .align = sizeof(u64),
621 		.active = pmu_active, .regset_get = pmu_get, .set = pmu_set
622 	},
623 #endif
624 #ifdef CONFIG_PPC_MEM_KEYS
625 	[REGSET_PKEY] = {
626 		.core_note_type = NT_PPC_PKEY, .n = ELF_NPKEY,
627 		.size = sizeof(u64), .align = sizeof(u64),
628 		.active = pkey_active, .regset_get = pkey_get, .set = pkey_set
629 	},
630 #endif
631 };
632 
633 const struct user_regset_view user_ppc_native_view = {
634 	.name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
635 	.regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
636 };
637 
638 #include <linux/compat.h>
639 
640 int gpr32_get_common(struct task_struct *target,
641 		     const struct user_regset *regset,
642 		     struct membuf to, unsigned long *regs)
643 {
644 	int i;
645 
646 	for (i = 0; i < PT_MSR; i++)
647 		membuf_store(&to, (u32)regs[i]);
648 	membuf_store(&to, (u32)get_user_msr(target));
649 	for (i++ ; i < PT_REGS_COUNT; i++)
650 		membuf_store(&to, (u32)regs[i]);
651 	return membuf_zero(&to, (ELF_NGREG - PT_REGS_COUNT) * sizeof(u32));
652 }
653 
654 int gpr32_set_common(struct task_struct *target,
655 		     const struct user_regset *regset,
656 		     unsigned int pos, unsigned int count,
657 		     const void *kbuf, const void __user *ubuf,
658 		     unsigned long *regs)
659 {
660 	const compat_ulong_t *k = kbuf;
661 	const compat_ulong_t __user *u = ubuf;
662 	compat_ulong_t reg;
663 
664 	pos /= sizeof(reg);
665 	count /= sizeof(reg);
666 
667 	if (kbuf)
668 		for (; count > 0 && pos < PT_MSR; --count)
669 			regs[pos++] = *k++;
670 	else
671 		for (; count > 0 && pos < PT_MSR; --count) {
672 			if (__get_user(reg, u++))
673 				return -EFAULT;
674 			regs[pos++] = reg;
675 		}
676 
677 
678 	if (count > 0 && pos == PT_MSR) {
679 		if (kbuf)
680 			reg = *k++;
681 		else if (__get_user(reg, u++))
682 			return -EFAULT;
683 		set_user_msr(target, reg);
684 		++pos;
685 		--count;
686 	}
687 
688 	if (kbuf) {
689 		for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
690 			regs[pos++] = *k++;
691 		for (; count > 0 && pos < PT_TRAP; --count, ++pos)
692 			++k;
693 	} else {
694 		for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
695 			if (__get_user(reg, u++))
696 				return -EFAULT;
697 			regs[pos++] = reg;
698 		}
699 		for (; count > 0 && pos < PT_TRAP; --count, ++pos)
700 			if (__get_user(reg, u++))
701 				return -EFAULT;
702 	}
703 
704 	if (count > 0 && pos == PT_TRAP) {
705 		if (kbuf)
706 			reg = *k++;
707 		else if (__get_user(reg, u++))
708 			return -EFAULT;
709 		set_user_trap(target, reg);
710 		++pos;
711 		--count;
712 	}
713 
714 	kbuf = k;
715 	ubuf = u;
716 	pos *= sizeof(reg);
717 	count *= sizeof(reg);
718 	return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
719 					 (PT_TRAP + 1) * sizeof(reg), -1);
720 }
721 
722 static int gpr32_get(struct task_struct *target,
723 		     const struct user_regset *regset,
724 		     struct membuf to)
725 {
726 	int i;
727 
728 	if (target->thread.regs == NULL)
729 		return -EIO;
730 
731 	if (!FULL_REGS(target->thread.regs)) {
732 		/*
733 		 * We have a partial register set.
734 		 * Fill 14-31 with bogus values.
735 		 */
736 		for (i = 14; i < 32; i++)
737 			target->thread.regs->gpr[i] = NV_REG_POISON;
738 	}
739 	return gpr32_get_common(target, regset, to,
740 			&target->thread.regs->gpr[0]);
741 }
742 
743 static int gpr32_set(struct task_struct *target,
744 		     const struct user_regset *regset,
745 		     unsigned int pos, unsigned int count,
746 		     const void *kbuf, const void __user *ubuf)
747 {
748 	if (target->thread.regs == NULL)
749 		return -EIO;
750 
751 	CHECK_FULL_REGS(target->thread.regs);
752 	return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
753 			&target->thread.regs->gpr[0]);
754 }
755 
756 /*
757  * These are the regset flavors matching the CONFIG_PPC32 native set.
758  */
759 static const struct user_regset compat_regsets[] = {
760 	[REGSET_GPR] = {
761 		.core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
762 		.size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
763 		.regset_get = gpr32_get, .set = gpr32_set
764 	},
765 	[REGSET_FPR] = {
766 		.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
767 		.size = sizeof(double), .align = sizeof(double),
768 		.regset_get = fpr_get, .set = fpr_set
769 	},
770 #ifdef CONFIG_ALTIVEC
771 	[REGSET_VMX] = {
772 		.core_note_type = NT_PPC_VMX, .n = 34,
773 		.size = sizeof(vector128), .align = sizeof(vector128),
774 		.active = vr_active, .regset_get = vr_get, .set = vr_set
775 	},
776 #endif
777 #ifdef CONFIG_SPE
778 	[REGSET_SPE] = {
779 		.core_note_type = NT_PPC_SPE, .n = 35,
780 		.size = sizeof(u32), .align = sizeof(u32),
781 		.active = evr_active, .regset_get = evr_get, .set = evr_set
782 	},
783 #endif
784 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
785 	[REGSET_TM_CGPR] = {
786 		.core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
787 		.size = sizeof(long), .align = sizeof(long),
788 		.active = tm_cgpr_active,
789 		.regset_get = tm_cgpr32_get, .set = tm_cgpr32_set
790 	},
791 	[REGSET_TM_CFPR] = {
792 		.core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
793 		.size = sizeof(double), .align = sizeof(double),
794 		.active = tm_cfpr_active, .regset_get = tm_cfpr_get, .set = tm_cfpr_set
795 	},
796 	[REGSET_TM_CVMX] = {
797 		.core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
798 		.size = sizeof(vector128), .align = sizeof(vector128),
799 		.active = tm_cvmx_active, .regset_get = tm_cvmx_get, .set = tm_cvmx_set
800 	},
801 	[REGSET_TM_CVSX] = {
802 		.core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
803 		.size = sizeof(double), .align = sizeof(double),
804 		.active = tm_cvsx_active, .regset_get = tm_cvsx_get, .set = tm_cvsx_set
805 	},
806 	[REGSET_TM_SPR] = {
807 		.core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
808 		.size = sizeof(u64), .align = sizeof(u64),
809 		.active = tm_spr_active, .regset_get = tm_spr_get, .set = tm_spr_set
810 	},
811 	[REGSET_TM_CTAR] = {
812 		.core_note_type = NT_PPC_TM_CTAR, .n = 1,
813 		.size = sizeof(u64), .align = sizeof(u64),
814 		.active = tm_tar_active, .regset_get = tm_tar_get, .set = tm_tar_set
815 	},
816 	[REGSET_TM_CPPR] = {
817 		.core_note_type = NT_PPC_TM_CPPR, .n = 1,
818 		.size = sizeof(u64), .align = sizeof(u64),
819 		.active = tm_ppr_active, .regset_get = tm_ppr_get, .set = tm_ppr_set
820 	},
821 	[REGSET_TM_CDSCR] = {
822 		.core_note_type = NT_PPC_TM_CDSCR, .n = 1,
823 		.size = sizeof(u64), .align = sizeof(u64),
824 		.active = tm_dscr_active, .regset_get = tm_dscr_get, .set = tm_dscr_set
825 	},
826 #endif
827 #ifdef CONFIG_PPC64
828 	[REGSET_PPR] = {
829 		.core_note_type = NT_PPC_PPR, .n = 1,
830 		.size = sizeof(u64), .align = sizeof(u64),
831 		.regset_get = ppr_get, .set = ppr_set
832 	},
833 	[REGSET_DSCR] = {
834 		.core_note_type = NT_PPC_DSCR, .n = 1,
835 		.size = sizeof(u64), .align = sizeof(u64),
836 		.regset_get = dscr_get, .set = dscr_set
837 	},
838 #endif
839 #ifdef CONFIG_PPC_BOOK3S_64
840 	[REGSET_TAR] = {
841 		.core_note_type = NT_PPC_TAR, .n = 1,
842 		.size = sizeof(u64), .align = sizeof(u64),
843 		.regset_get = tar_get, .set = tar_set
844 	},
845 	[REGSET_EBB] = {
846 		.core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
847 		.size = sizeof(u64), .align = sizeof(u64),
848 		.active = ebb_active, .regset_get = ebb_get, .set = ebb_set
849 	},
850 #endif
851 };
852 
853 static const struct user_regset_view user_ppc_compat_view = {
854 	.name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
855 	.regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
856 };
857 
858 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
859 {
860 	if (IS_ENABLED(CONFIG_PPC64) && test_tsk_thread_flag(task, TIF_32BIT))
861 		return &user_ppc_compat_view;
862 	return &user_ppc_native_view;
863 }
864