1 #undef DEBUG 2 3 #include <linux/kernel.h> 4 #include <linux/string.h> 5 #include <linux/pci_regs.h> 6 #include <linux/module.h> 7 #include <linux/ioport.h> 8 #include <asm/prom.h> 9 #include <asm/pci-bridge.h> 10 11 #ifdef DEBUG 12 #define DBG(fmt...) do { printk(fmt); } while(0) 13 #else 14 #define DBG(fmt...) do { } while(0) 15 #endif 16 17 #ifdef CONFIG_PPC64 18 #define PRu64 "%lx" 19 #else 20 #define PRu64 "%llx" 21 #endif 22 23 /* Max address size we deal with */ 24 #define OF_MAX_ADDR_CELLS 4 25 #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ 26 (ns) > 0) 27 28 /* Debug utility */ 29 #ifdef DEBUG 30 static void of_dump_addr(const char *s, u32 *addr, int na) 31 { 32 printk("%s", s); 33 while(na--) 34 printk(" %08x", *(addr++)); 35 printk("\n"); 36 } 37 #else 38 static void of_dump_addr(const char *s, u32 *addr, int na) { } 39 #endif 40 41 /* Read a big address */ 42 static inline u64 of_read_addr(u32 *cell, int size) 43 { 44 u64 r = 0; 45 while (size--) 46 r = (r << 32) | *(cell++); 47 return r; 48 } 49 50 /* Callbacks for bus specific translators */ 51 struct of_bus { 52 const char *name; 53 const char *addresses; 54 int (*match)(struct device_node *parent); 55 void (*count_cells)(struct device_node *child, 56 int *addrc, int *sizec); 57 u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna); 58 int (*translate)(u32 *addr, u64 offset, int na); 59 unsigned int (*get_flags)(u32 *addr); 60 }; 61 62 63 /* 64 * Default translator (generic bus) 65 */ 66 67 static void of_bus_default_count_cells(struct device_node *dev, 68 int *addrc, int *sizec) 69 { 70 if (addrc) 71 *addrc = prom_n_addr_cells(dev); 72 if (sizec) 73 *sizec = prom_n_size_cells(dev); 74 } 75 76 static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna) 77 { 78 u64 cp, s, da; 79 80 cp = of_read_addr(range, na); 81 s = of_read_addr(range + na + pna, ns); 82 da = of_read_addr(addr, na); 83 84 DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", 85 cp, s, da); 86 87 if (da < cp || da >= (cp + s)) 88 return OF_BAD_ADDR; 89 return da - cp; 90 } 91 92 static int of_bus_default_translate(u32 *addr, u64 offset, int na) 93 { 94 u64 a = of_read_addr(addr, na); 95 memset(addr, 0, na * 4); 96 a += offset; 97 if (na > 1) 98 addr[na - 2] = a >> 32; 99 addr[na - 1] = a & 0xffffffffu; 100 101 return 0; 102 } 103 104 static unsigned int of_bus_default_get_flags(u32 *addr) 105 { 106 return IORESOURCE_MEM; 107 } 108 109 110 /* 111 * PCI bus specific translator 112 */ 113 114 static int of_bus_pci_match(struct device_node *np) 115 { 116 /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */ 117 return !strcmp(np->type, "pci") || !strcmp(np->type, "vci"); 118 } 119 120 static void of_bus_pci_count_cells(struct device_node *np, 121 int *addrc, int *sizec) 122 { 123 if (addrc) 124 *addrc = 3; 125 if (sizec) 126 *sizec = 2; 127 } 128 129 static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna) 130 { 131 u64 cp, s, da; 132 133 /* Check address type match */ 134 if ((addr[0] ^ range[0]) & 0x03000000) 135 return OF_BAD_ADDR; 136 137 /* Read address values, skipping high cell */ 138 cp = of_read_addr(range + 1, na - 1); 139 s = of_read_addr(range + na + pna, ns); 140 da = of_read_addr(addr + 1, na - 1); 141 142 DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); 143 144 if (da < cp || da >= (cp + s)) 145 return OF_BAD_ADDR; 146 return da - cp; 147 } 148 149 static int of_bus_pci_translate(u32 *addr, u64 offset, int na) 150 { 151 return of_bus_default_translate(addr + 1, offset, na - 1); 152 } 153 154 static unsigned int of_bus_pci_get_flags(u32 *addr) 155 { 156 unsigned int flags = 0; 157 u32 w = addr[0]; 158 159 switch((w >> 24) & 0x03) { 160 case 0x01: 161 flags |= IORESOURCE_IO; 162 case 0x02: /* 32 bits */ 163 case 0x03: /* 64 bits */ 164 flags |= IORESOURCE_MEM; 165 } 166 if (w & 0x40000000) 167 flags |= IORESOURCE_PREFETCH; 168 return flags; 169 } 170 171 /* 172 * ISA bus specific translator 173 */ 174 175 static int of_bus_isa_match(struct device_node *np) 176 { 177 return !strcmp(np->name, "isa"); 178 } 179 180 static void of_bus_isa_count_cells(struct device_node *child, 181 int *addrc, int *sizec) 182 { 183 if (addrc) 184 *addrc = 2; 185 if (sizec) 186 *sizec = 1; 187 } 188 189 static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna) 190 { 191 u64 cp, s, da; 192 193 /* Check address type match */ 194 if ((addr[0] ^ range[0]) & 0x00000001) 195 return OF_BAD_ADDR; 196 197 /* Read address values, skipping high cell */ 198 cp = of_read_addr(range + 1, na - 1); 199 s = of_read_addr(range + na + pna, ns); 200 da = of_read_addr(addr + 1, na - 1); 201 202 DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); 203 204 if (da < cp || da >= (cp + s)) 205 return OF_BAD_ADDR; 206 return da - cp; 207 } 208 209 static int of_bus_isa_translate(u32 *addr, u64 offset, int na) 210 { 211 return of_bus_default_translate(addr + 1, offset, na - 1); 212 } 213 214 static unsigned int of_bus_isa_get_flags(u32 *addr) 215 { 216 unsigned int flags = 0; 217 u32 w = addr[0]; 218 219 if (w & 1) 220 flags |= IORESOURCE_IO; 221 else 222 flags |= IORESOURCE_MEM; 223 return flags; 224 } 225 226 227 /* 228 * Array of bus specific translators 229 */ 230 231 static struct of_bus of_busses[] = { 232 /* PCI */ 233 { 234 .name = "pci", 235 .addresses = "assigned-addresses", 236 .match = of_bus_pci_match, 237 .count_cells = of_bus_pci_count_cells, 238 .map = of_bus_pci_map, 239 .translate = of_bus_pci_translate, 240 .get_flags = of_bus_pci_get_flags, 241 }, 242 /* ISA */ 243 { 244 .name = "isa", 245 .addresses = "reg", 246 .match = of_bus_isa_match, 247 .count_cells = of_bus_isa_count_cells, 248 .map = of_bus_isa_map, 249 .translate = of_bus_isa_translate, 250 .get_flags = of_bus_isa_get_flags, 251 }, 252 /* Default */ 253 { 254 .name = "default", 255 .addresses = "reg", 256 .match = NULL, 257 .count_cells = of_bus_default_count_cells, 258 .map = of_bus_default_map, 259 .translate = of_bus_default_translate, 260 .get_flags = of_bus_default_get_flags, 261 }, 262 }; 263 264 static struct of_bus *of_match_bus(struct device_node *np) 265 { 266 int i; 267 268 for (i = 0; i < ARRAY_SIZE(of_busses); i ++) 269 if (!of_busses[i].match || of_busses[i].match(np)) 270 return &of_busses[i]; 271 BUG(); 272 return NULL; 273 } 274 275 static int of_translate_one(struct device_node *parent, struct of_bus *bus, 276 struct of_bus *pbus, u32 *addr, 277 int na, int ns, int pna) 278 { 279 u32 *ranges; 280 unsigned int rlen; 281 int rone; 282 u64 offset = OF_BAD_ADDR; 283 284 /* Normally, an absence of a "ranges" property means we are 285 * crossing a non-translatable boundary, and thus the addresses 286 * below the current not cannot be converted to CPU physical ones. 287 * Unfortunately, while this is very clear in the spec, it's not 288 * what Apple understood, and they do have things like /uni-n or 289 * /ht nodes with no "ranges" property and a lot of perfectly 290 * useable mapped devices below them. Thus we treat the absence of 291 * "ranges" as equivalent to an empty "ranges" property which means 292 * a 1:1 translation at that level. It's up to the caller not to try 293 * to translate addresses that aren't supposed to be translated in 294 * the first place. --BenH. 295 */ 296 ranges = (u32 *)get_property(parent, "ranges", &rlen); 297 if (ranges == NULL || rlen == 0) { 298 offset = of_read_addr(addr, na); 299 memset(addr, 0, pna * 4); 300 DBG("OF: no ranges, 1:1 translation\n"); 301 goto finish; 302 } 303 304 DBG("OF: walking ranges...\n"); 305 306 /* Now walk through the ranges */ 307 rlen /= 4; 308 rone = na + pna + ns; 309 for (; rlen >= rone; rlen -= rone, ranges += rone) { 310 offset = bus->map(addr, ranges, na, ns, pna); 311 if (offset != OF_BAD_ADDR) 312 break; 313 } 314 if (offset == OF_BAD_ADDR) { 315 DBG("OF: not found !\n"); 316 return 1; 317 } 318 memcpy(addr, ranges + na, 4 * pna); 319 320 finish: 321 of_dump_addr("OF: parent translation for:", addr, pna); 322 DBG("OF: with offset: "PRu64"\n", offset); 323 324 /* Translate it into parent bus space */ 325 return pbus->translate(addr, offset, pna); 326 } 327 328 329 /* 330 * Translate an address from the device-tree into a CPU physical address, 331 * this walks up the tree and applies the various bus mappings on the 332 * way. 333 * 334 * Note: We consider that crossing any level with #size-cells == 0 to mean 335 * that translation is impossible (that is we are not dealing with a value 336 * that can be mapped to a cpu physical address). This is not really specified 337 * that way, but this is traditionally the way IBM at least do things 338 */ 339 u64 of_translate_address(struct device_node *dev, u32 *in_addr) 340 { 341 struct device_node *parent = NULL; 342 struct of_bus *bus, *pbus; 343 u32 addr[OF_MAX_ADDR_CELLS]; 344 int na, ns, pna, pns; 345 u64 result = OF_BAD_ADDR; 346 347 DBG("OF: ** translation for device %s **\n", dev->full_name); 348 349 /* Increase refcount at current level */ 350 of_node_get(dev); 351 352 /* Get parent & match bus type */ 353 parent = of_get_parent(dev); 354 if (parent == NULL) 355 goto bail; 356 bus = of_match_bus(parent); 357 358 /* Cound address cells & copy address locally */ 359 bus->count_cells(dev, &na, &ns); 360 if (!OF_CHECK_COUNTS(na, ns)) { 361 printk(KERN_ERR "prom_parse: Bad cell count for %s\n", 362 dev->full_name); 363 goto bail; 364 } 365 memcpy(addr, in_addr, na * 4); 366 367 DBG("OF: bus is %s (na=%d, ns=%d) on %s\n", 368 bus->name, na, ns, parent->full_name); 369 of_dump_addr("OF: translating address:", addr, na); 370 371 /* Translate */ 372 for (;;) { 373 /* Switch to parent bus */ 374 of_node_put(dev); 375 dev = parent; 376 parent = of_get_parent(dev); 377 378 /* If root, we have finished */ 379 if (parent == NULL) { 380 DBG("OF: reached root node\n"); 381 result = of_read_addr(addr, na); 382 break; 383 } 384 385 /* Get new parent bus and counts */ 386 pbus = of_match_bus(parent); 387 pbus->count_cells(dev, &pna, &pns); 388 if (!OF_CHECK_COUNTS(pna, pns)) { 389 printk(KERN_ERR "prom_parse: Bad cell count for %s\n", 390 dev->full_name); 391 break; 392 } 393 394 DBG("OF: parent bus is %s (na=%d, ns=%d) on %s\n", 395 pbus->name, pna, pns, parent->full_name); 396 397 /* Apply bus translation */ 398 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna)) 399 break; 400 401 /* Complete the move up one level */ 402 na = pna; 403 ns = pns; 404 bus = pbus; 405 406 of_dump_addr("OF: one level translation:", addr, na); 407 } 408 bail: 409 of_node_put(parent); 410 of_node_put(dev); 411 412 return result; 413 } 414 EXPORT_SYMBOL(of_translate_address); 415 416 u32 *of_get_address(struct device_node *dev, int index, u64 *size, 417 unsigned int *flags) 418 { 419 u32 *prop; 420 unsigned int psize; 421 struct device_node *parent; 422 struct of_bus *bus; 423 int onesize, i, na, ns; 424 425 /* Get parent & match bus type */ 426 parent = of_get_parent(dev); 427 if (parent == NULL) 428 return NULL; 429 bus = of_match_bus(parent); 430 bus->count_cells(dev, &na, &ns); 431 of_node_put(parent); 432 if (!OF_CHECK_COUNTS(na, ns)) 433 return NULL; 434 435 /* Get "reg" or "assigned-addresses" property */ 436 prop = (u32 *)get_property(dev, bus->addresses, &psize); 437 if (prop == NULL) 438 return NULL; 439 psize /= 4; 440 441 onesize = na + ns; 442 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 443 if (i == index) { 444 if (size) 445 *size = of_read_addr(prop + na, ns); 446 if (flags) 447 *flags = bus->get_flags(prop); 448 return prop; 449 } 450 return NULL; 451 } 452 EXPORT_SYMBOL(of_get_address); 453 454 u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, 455 unsigned int *flags) 456 { 457 u32 *prop; 458 unsigned int psize; 459 struct device_node *parent; 460 struct of_bus *bus; 461 int onesize, i, na, ns; 462 463 /* Get parent & match bus type */ 464 parent = of_get_parent(dev); 465 if (parent == NULL) 466 return NULL; 467 bus = of_match_bus(parent); 468 if (strcmp(bus->name, "pci")) { 469 of_node_put(parent); 470 return NULL; 471 } 472 bus->count_cells(dev, &na, &ns); 473 of_node_put(parent); 474 if (!OF_CHECK_COUNTS(na, ns)) 475 return NULL; 476 477 /* Get "reg" or "assigned-addresses" property */ 478 prop = (u32 *)get_property(dev, bus->addresses, &psize); 479 if (prop == NULL) 480 return NULL; 481 psize /= 4; 482 483 onesize = na + ns; 484 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 485 if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { 486 if (size) 487 *size = of_read_addr(prop + na, ns); 488 if (flags) 489 *flags = bus->get_flags(prop); 490 return prop; 491 } 492 return NULL; 493 } 494 EXPORT_SYMBOL(of_get_pci_address); 495 496 static int __of_address_to_resource(struct device_node *dev, u32 *addrp, 497 u64 size, unsigned int flags, 498 struct resource *r) 499 { 500 u64 taddr; 501 502 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) 503 return -EINVAL; 504 taddr = of_translate_address(dev, addrp); 505 if (taddr == OF_BAD_ADDR) 506 return -EINVAL; 507 memset(r, 0, sizeof(struct resource)); 508 if (flags & IORESOURCE_IO) { 509 unsigned long port; 510 port = pci_address_to_pio(taddr); 511 if (port == (unsigned long)-1) 512 return -EINVAL; 513 r->start = port; 514 r->end = port + size - 1; 515 } else { 516 r->start = taddr; 517 r->end = taddr + size - 1; 518 } 519 r->flags = flags; 520 r->name = dev->name; 521 return 0; 522 } 523 524 int of_address_to_resource(struct device_node *dev, int index, 525 struct resource *r) 526 { 527 u32 *addrp; 528 u64 size; 529 unsigned int flags; 530 531 addrp = of_get_address(dev, index, &size, &flags); 532 if (addrp == NULL) 533 return -EINVAL; 534 return __of_address_to_resource(dev, addrp, size, flags, r); 535 } 536 EXPORT_SYMBOL_GPL(of_address_to_resource); 537 538 int of_pci_address_to_resource(struct device_node *dev, int bar, 539 struct resource *r) 540 { 541 u32 *addrp; 542 u64 size; 543 unsigned int flags; 544 545 addrp = of_get_pci_address(dev, bar, &size, &flags); 546 if (addrp == NULL) 547 return -EINVAL; 548 return __of_address_to_resource(dev, addrp, size, flags, r); 549 } 550 EXPORT_SYMBOL_GPL(of_pci_address_to_resource); 551