1 /* 2 * Derived from "arch/i386/kernel/process.c" 3 * Copyright (C) 1995 Linus Torvalds 4 * 5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 6 * Paul Mackerras (paulus@cs.anu.edu.au) 7 * 8 * PowerPC version 9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 14 * 2 of the License, or (at your option) any later version. 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/smp.h> 22 #include <linux/stddef.h> 23 #include <linux/unistd.h> 24 #include <linux/ptrace.h> 25 #include <linux/slab.h> 26 #include <linux/user.h> 27 #include <linux/elf.h> 28 #include <linux/init.h> 29 #include <linux/prctl.h> 30 #include <linux/init_task.h> 31 #include <linux/module.h> 32 #include <linux/kallsyms.h> 33 #include <linux/mqueue.h> 34 #include <linux/hardirq.h> 35 #include <linux/utsname.h> 36 #include <linux/ftrace.h> 37 #include <linux/kernel_stat.h> 38 #include <linux/personality.h> 39 #include <linux/random.h> 40 #include <linux/hw_breakpoint.h> 41 42 #include <asm/pgtable.h> 43 #include <asm/uaccess.h> 44 #include <asm/system.h> 45 #include <asm/io.h> 46 #include <asm/processor.h> 47 #include <asm/mmu.h> 48 #include <asm/prom.h> 49 #include <asm/machdep.h> 50 #include <asm/time.h> 51 #include <asm/syscalls.h> 52 #ifdef CONFIG_PPC64 53 #include <asm/firmware.h> 54 #endif 55 #include <linux/kprobes.h> 56 #include <linux/kdebug.h> 57 58 extern unsigned long _get_SP(void); 59 60 #ifndef CONFIG_SMP 61 struct task_struct *last_task_used_math = NULL; 62 struct task_struct *last_task_used_altivec = NULL; 63 struct task_struct *last_task_used_vsx = NULL; 64 struct task_struct *last_task_used_spe = NULL; 65 #endif 66 67 /* 68 * Make sure the floating-point register state in the 69 * the thread_struct is up to date for task tsk. 70 */ 71 void flush_fp_to_thread(struct task_struct *tsk) 72 { 73 if (tsk->thread.regs) { 74 /* 75 * We need to disable preemption here because if we didn't, 76 * another process could get scheduled after the regs->msr 77 * test but before we have finished saving the FP registers 78 * to the thread_struct. That process could take over the 79 * FPU, and then when we get scheduled again we would store 80 * bogus values for the remaining FP registers. 81 */ 82 preempt_disable(); 83 if (tsk->thread.regs->msr & MSR_FP) { 84 #ifdef CONFIG_SMP 85 /* 86 * This should only ever be called for current or 87 * for a stopped child process. Since we save away 88 * the FP register state on context switch on SMP, 89 * there is something wrong if a stopped child appears 90 * to still have its FP state in the CPU registers. 91 */ 92 BUG_ON(tsk != current); 93 #endif 94 giveup_fpu(tsk); 95 } 96 preempt_enable(); 97 } 98 } 99 100 void enable_kernel_fp(void) 101 { 102 WARN_ON(preemptible()); 103 104 #ifdef CONFIG_SMP 105 if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) 106 giveup_fpu(current); 107 else 108 giveup_fpu(NULL); /* just enables FP for kernel */ 109 #else 110 giveup_fpu(last_task_used_math); 111 #endif /* CONFIG_SMP */ 112 } 113 EXPORT_SYMBOL(enable_kernel_fp); 114 115 #ifdef CONFIG_ALTIVEC 116 void enable_kernel_altivec(void) 117 { 118 WARN_ON(preemptible()); 119 120 #ifdef CONFIG_SMP 121 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) 122 giveup_altivec(current); 123 else 124 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */ 125 #else 126 giveup_altivec(last_task_used_altivec); 127 #endif /* CONFIG_SMP */ 128 } 129 EXPORT_SYMBOL(enable_kernel_altivec); 130 131 /* 132 * Make sure the VMX/Altivec register state in the 133 * the thread_struct is up to date for task tsk. 134 */ 135 void flush_altivec_to_thread(struct task_struct *tsk) 136 { 137 if (tsk->thread.regs) { 138 preempt_disable(); 139 if (tsk->thread.regs->msr & MSR_VEC) { 140 #ifdef CONFIG_SMP 141 BUG_ON(tsk != current); 142 #endif 143 giveup_altivec(tsk); 144 } 145 preempt_enable(); 146 } 147 } 148 #endif /* CONFIG_ALTIVEC */ 149 150 #ifdef CONFIG_VSX 151 #if 0 152 /* not currently used, but some crazy RAID module might want to later */ 153 void enable_kernel_vsx(void) 154 { 155 WARN_ON(preemptible()); 156 157 #ifdef CONFIG_SMP 158 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) 159 giveup_vsx(current); 160 else 161 giveup_vsx(NULL); /* just enable vsx for kernel - force */ 162 #else 163 giveup_vsx(last_task_used_vsx); 164 #endif /* CONFIG_SMP */ 165 } 166 EXPORT_SYMBOL(enable_kernel_vsx); 167 #endif 168 169 void giveup_vsx(struct task_struct *tsk) 170 { 171 giveup_fpu(tsk); 172 giveup_altivec(tsk); 173 __giveup_vsx(tsk); 174 } 175 176 void flush_vsx_to_thread(struct task_struct *tsk) 177 { 178 if (tsk->thread.regs) { 179 preempt_disable(); 180 if (tsk->thread.regs->msr & MSR_VSX) { 181 #ifdef CONFIG_SMP 182 BUG_ON(tsk != current); 183 #endif 184 giveup_vsx(tsk); 185 } 186 preempt_enable(); 187 } 188 } 189 #endif /* CONFIG_VSX */ 190 191 #ifdef CONFIG_SPE 192 193 void enable_kernel_spe(void) 194 { 195 WARN_ON(preemptible()); 196 197 #ifdef CONFIG_SMP 198 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) 199 giveup_spe(current); 200 else 201 giveup_spe(NULL); /* just enable SPE for kernel - force */ 202 #else 203 giveup_spe(last_task_used_spe); 204 #endif /* __SMP __ */ 205 } 206 EXPORT_SYMBOL(enable_kernel_spe); 207 208 void flush_spe_to_thread(struct task_struct *tsk) 209 { 210 if (tsk->thread.regs) { 211 preempt_disable(); 212 if (tsk->thread.regs->msr & MSR_SPE) { 213 #ifdef CONFIG_SMP 214 BUG_ON(tsk != current); 215 #endif 216 giveup_spe(tsk); 217 } 218 preempt_enable(); 219 } 220 } 221 #endif /* CONFIG_SPE */ 222 223 #ifndef CONFIG_SMP 224 /* 225 * If we are doing lazy switching of CPU state (FP, altivec or SPE), 226 * and the current task has some state, discard it. 227 */ 228 void discard_lazy_cpu_state(void) 229 { 230 preempt_disable(); 231 if (last_task_used_math == current) 232 last_task_used_math = NULL; 233 #ifdef CONFIG_ALTIVEC 234 if (last_task_used_altivec == current) 235 last_task_used_altivec = NULL; 236 #endif /* CONFIG_ALTIVEC */ 237 #ifdef CONFIG_VSX 238 if (last_task_used_vsx == current) 239 last_task_used_vsx = NULL; 240 #endif /* CONFIG_VSX */ 241 #ifdef CONFIG_SPE 242 if (last_task_used_spe == current) 243 last_task_used_spe = NULL; 244 #endif 245 preempt_enable(); 246 } 247 #endif /* CONFIG_SMP */ 248 249 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 250 void do_send_trap(struct pt_regs *regs, unsigned long address, 251 unsigned long error_code, int signal_code, int breakpt) 252 { 253 siginfo_t info; 254 255 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 256 11, SIGSEGV) == NOTIFY_STOP) 257 return; 258 259 /* Deliver the signal to userspace */ 260 info.si_signo = SIGTRAP; 261 info.si_errno = breakpt; /* breakpoint or watchpoint id */ 262 info.si_code = signal_code; 263 info.si_addr = (void __user *)address; 264 force_sig_info(SIGTRAP, &info, current); 265 } 266 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 267 void do_dabr(struct pt_regs *regs, unsigned long address, 268 unsigned long error_code) 269 { 270 siginfo_t info; 271 272 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 273 11, SIGSEGV) == NOTIFY_STOP) 274 return; 275 276 if (debugger_dabr_match(regs)) 277 return; 278 279 /* Clear the DABR */ 280 set_dabr(0); 281 282 /* Deliver the signal to userspace */ 283 info.si_signo = SIGTRAP; 284 info.si_errno = 0; 285 info.si_code = TRAP_HWBKPT; 286 info.si_addr = (void __user *)address; 287 force_sig_info(SIGTRAP, &info, current); 288 } 289 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 290 291 static DEFINE_PER_CPU(unsigned long, current_dabr); 292 293 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 294 /* 295 * Set the debug registers back to their default "safe" values. 296 */ 297 static void set_debug_reg_defaults(struct thread_struct *thread) 298 { 299 thread->iac1 = thread->iac2 = 0; 300 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 301 thread->iac3 = thread->iac4 = 0; 302 #endif 303 thread->dac1 = thread->dac2 = 0; 304 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 305 thread->dvc1 = thread->dvc2 = 0; 306 #endif 307 thread->dbcr0 = 0; 308 #ifdef CONFIG_BOOKE 309 /* 310 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 311 */ 312 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \ 313 DBCR1_IAC3US | DBCR1_IAC4US; 314 /* 315 * Force Data Address Compare User/Supervisor bits to be User-only 316 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 317 */ 318 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 319 #else 320 thread->dbcr1 = 0; 321 #endif 322 } 323 324 static void prime_debug_regs(struct thread_struct *thread) 325 { 326 mtspr(SPRN_IAC1, thread->iac1); 327 mtspr(SPRN_IAC2, thread->iac2); 328 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 329 mtspr(SPRN_IAC3, thread->iac3); 330 mtspr(SPRN_IAC4, thread->iac4); 331 #endif 332 mtspr(SPRN_DAC1, thread->dac1); 333 mtspr(SPRN_DAC2, thread->dac2); 334 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 335 mtspr(SPRN_DVC1, thread->dvc1); 336 mtspr(SPRN_DVC2, thread->dvc2); 337 #endif 338 mtspr(SPRN_DBCR0, thread->dbcr0); 339 mtspr(SPRN_DBCR1, thread->dbcr1); 340 #ifdef CONFIG_BOOKE 341 mtspr(SPRN_DBCR2, thread->dbcr2); 342 #endif 343 } 344 /* 345 * Unless neither the old or new thread are making use of the 346 * debug registers, set the debug registers from the values 347 * stored in the new thread. 348 */ 349 static void switch_booke_debug_regs(struct thread_struct *new_thread) 350 { 351 if ((current->thread.dbcr0 & DBCR0_IDM) 352 || (new_thread->dbcr0 & DBCR0_IDM)) 353 prime_debug_regs(new_thread); 354 } 355 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 356 static void set_debug_reg_defaults(struct thread_struct *thread) 357 { 358 if (thread->dabr) { 359 thread->dabr = 0; 360 set_dabr(0); 361 } 362 } 363 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 364 365 int set_dabr(unsigned long dabr) 366 { 367 __get_cpu_var(current_dabr) = dabr; 368 369 if (ppc_md.set_dabr) 370 return ppc_md.set_dabr(dabr); 371 372 /* XXX should we have a CPU_FTR_HAS_DABR ? */ 373 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 374 mtspr(SPRN_DAC1, dabr); 375 #ifdef CONFIG_PPC_47x 376 isync(); 377 #endif 378 #elif defined(CONFIG_PPC_BOOK3S) 379 mtspr(SPRN_DABR, dabr); 380 #endif 381 382 383 return 0; 384 } 385 386 #ifdef CONFIG_PPC64 387 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 388 #endif 389 390 struct task_struct *__switch_to(struct task_struct *prev, 391 struct task_struct *new) 392 { 393 struct thread_struct *new_thread, *old_thread; 394 unsigned long flags; 395 struct task_struct *last; 396 397 #ifdef CONFIG_SMP 398 /* avoid complexity of lazy save/restore of fpu 399 * by just saving it every time we switch out if 400 * this task used the fpu during the last quantum. 401 * 402 * If it tries to use the fpu again, it'll trap and 403 * reload its fp regs. So we don't have to do a restore 404 * every switch, just a save. 405 * -- Cort 406 */ 407 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP)) 408 giveup_fpu(prev); 409 #ifdef CONFIG_ALTIVEC 410 /* 411 * If the previous thread used altivec in the last quantum 412 * (thus changing altivec regs) then save them. 413 * We used to check the VRSAVE register but not all apps 414 * set it, so we don't rely on it now (and in fact we need 415 * to save & restore VSCR even if VRSAVE == 0). -- paulus 416 * 417 * On SMP we always save/restore altivec regs just to avoid the 418 * complexity of changing processors. 419 * -- Cort 420 */ 421 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) 422 giveup_altivec(prev); 423 #endif /* CONFIG_ALTIVEC */ 424 #ifdef CONFIG_VSX 425 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX)) 426 /* VMX and FPU registers are already save here */ 427 __giveup_vsx(prev); 428 #endif /* CONFIG_VSX */ 429 #ifdef CONFIG_SPE 430 /* 431 * If the previous thread used spe in the last quantum 432 * (thus changing spe regs) then save them. 433 * 434 * On SMP we always save/restore spe regs just to avoid the 435 * complexity of changing processors. 436 */ 437 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE))) 438 giveup_spe(prev); 439 #endif /* CONFIG_SPE */ 440 441 #else /* CONFIG_SMP */ 442 #ifdef CONFIG_ALTIVEC 443 /* Avoid the trap. On smp this this never happens since 444 * we don't set last_task_used_altivec -- Cort 445 */ 446 if (new->thread.regs && last_task_used_altivec == new) 447 new->thread.regs->msr |= MSR_VEC; 448 #endif /* CONFIG_ALTIVEC */ 449 #ifdef CONFIG_VSX 450 if (new->thread.regs && last_task_used_vsx == new) 451 new->thread.regs->msr |= MSR_VSX; 452 #endif /* CONFIG_VSX */ 453 #ifdef CONFIG_SPE 454 /* Avoid the trap. On smp this this never happens since 455 * we don't set last_task_used_spe 456 */ 457 if (new->thread.regs && last_task_used_spe == new) 458 new->thread.regs->msr |= MSR_SPE; 459 #endif /* CONFIG_SPE */ 460 461 #endif /* CONFIG_SMP */ 462 463 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 464 switch_booke_debug_regs(&new->thread); 465 #else 466 /* 467 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 468 * schedule DABR 469 */ 470 #ifndef CONFIG_HAVE_HW_BREAKPOINT 471 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) 472 set_dabr(new->thread.dabr); 473 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 474 #endif 475 476 477 new_thread = &new->thread; 478 old_thread = ¤t->thread; 479 480 #if defined(CONFIG_PPC_BOOK3E_64) 481 /* XXX Current Book3E code doesn't deal with kernel side DBCR0, 482 * we always hold the user values, so we set it now. 483 * 484 * However, we ensure the kernel MSR:DE is appropriately cleared too 485 * to avoid spurrious single step exceptions in the kernel. 486 * 487 * This will have to change to merge with the ppc32 code at some point, 488 * but I don't like much what ppc32 is doing today so there's some 489 * thinking needed there 490 */ 491 if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) { 492 u32 dbcr0; 493 494 mtmsr(mfmsr() & ~MSR_DE); 495 isync(); 496 dbcr0 = mfspr(SPRN_DBCR0); 497 dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0; 498 mtspr(SPRN_DBCR0, dbcr0); 499 } 500 #endif /* CONFIG_PPC64_BOOK3E */ 501 502 #ifdef CONFIG_PPC64 503 /* 504 * Collect processor utilization data per process 505 */ 506 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 507 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); 508 long unsigned start_tb, current_tb; 509 start_tb = old_thread->start_tb; 510 cu->current_tb = current_tb = mfspr(SPRN_PURR); 511 old_thread->accum_tb += (current_tb - start_tb); 512 new_thread->start_tb = current_tb; 513 } 514 #endif 515 516 local_irq_save(flags); 517 518 account_system_vtime(current); 519 account_process_vtime(current); 520 calculate_steal_time(); 521 522 /* 523 * We can't take a PMU exception inside _switch() since there is a 524 * window where the kernel stack SLB and the kernel stack are out 525 * of sync. Hard disable here. 526 */ 527 hard_irq_disable(); 528 last = _switch(old_thread, new_thread); 529 530 local_irq_restore(flags); 531 532 return last; 533 } 534 535 static int instructions_to_print = 16; 536 537 static void show_instructions(struct pt_regs *regs) 538 { 539 int i; 540 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 541 sizeof(int)); 542 543 printk("Instruction dump:"); 544 545 for (i = 0; i < instructions_to_print; i++) { 546 int instr; 547 548 if (!(i % 8)) 549 printk("\n"); 550 551 #if !defined(CONFIG_BOOKE) 552 /* If executing with the IMMU off, adjust pc rather 553 * than print XXXXXXXX. 554 */ 555 if (!(regs->msr & MSR_IR)) 556 pc = (unsigned long)phys_to_virt(pc); 557 #endif 558 559 /* We use __get_user here *only* to avoid an OOPS on a 560 * bad address because the pc *should* only be a 561 * kernel address. 562 */ 563 if (!__kernel_text_address(pc) || 564 __get_user(instr, (unsigned int __user *)pc)) { 565 printk("XXXXXXXX "); 566 } else { 567 if (regs->nip == pc) 568 printk("<%08x> ", instr); 569 else 570 printk("%08x ", instr); 571 } 572 573 pc += sizeof(int); 574 } 575 576 printk("\n"); 577 } 578 579 static struct regbit { 580 unsigned long bit; 581 const char *name; 582 } msr_bits[] = { 583 {MSR_EE, "EE"}, 584 {MSR_PR, "PR"}, 585 {MSR_FP, "FP"}, 586 {MSR_VEC, "VEC"}, 587 {MSR_VSX, "VSX"}, 588 {MSR_ME, "ME"}, 589 {MSR_CE, "CE"}, 590 {MSR_DE, "DE"}, 591 {MSR_IR, "IR"}, 592 {MSR_DR, "DR"}, 593 {0, NULL} 594 }; 595 596 static void printbits(unsigned long val, struct regbit *bits) 597 { 598 const char *sep = ""; 599 600 printk("<"); 601 for (; bits->bit; ++bits) 602 if (val & bits->bit) { 603 printk("%s%s", sep, bits->name); 604 sep = ","; 605 } 606 printk(">"); 607 } 608 609 #ifdef CONFIG_PPC64 610 #define REG "%016lx" 611 #define REGS_PER_LINE 4 612 #define LAST_VOLATILE 13 613 #else 614 #define REG "%08lx" 615 #define REGS_PER_LINE 8 616 #define LAST_VOLATILE 12 617 #endif 618 619 void show_regs(struct pt_regs * regs) 620 { 621 int i, trap; 622 623 printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 624 regs->nip, regs->link, regs->ctr); 625 printk("REGS: %p TRAP: %04lx %s (%s)\n", 626 regs, regs->trap, print_tainted(), init_utsname()->release); 627 printk("MSR: "REG" ", regs->msr); 628 printbits(regs->msr, msr_bits); 629 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 630 trap = TRAP(regs); 631 if (trap == 0x300 || trap == 0x600) 632 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 633 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 634 #else 635 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); 636 #endif 637 printk("TASK = %p[%d] '%s' THREAD: %p", 638 current, task_pid_nr(current), current->comm, task_thread_info(current)); 639 640 #ifdef CONFIG_SMP 641 printk(" CPU: %d", raw_smp_processor_id()); 642 #endif /* CONFIG_SMP */ 643 644 for (i = 0; i < 32; i++) { 645 if ((i % REGS_PER_LINE) == 0) 646 printk("\nGPR%02d: ", i); 647 printk(REG " ", regs->gpr[i]); 648 if (i == LAST_VOLATILE && !FULL_REGS(regs)) 649 break; 650 } 651 printk("\n"); 652 #ifdef CONFIG_KALLSYMS 653 /* 654 * Lookup NIP late so we have the best change of getting the 655 * above info out without failing 656 */ 657 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 658 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 659 #endif 660 show_stack(current, (unsigned long *) regs->gpr[1]); 661 if (!user_mode(regs)) 662 show_instructions(regs); 663 } 664 665 void exit_thread(void) 666 { 667 discard_lazy_cpu_state(); 668 } 669 670 void flush_thread(void) 671 { 672 discard_lazy_cpu_state(); 673 674 #ifdef CONFIG_HAVE_HW_BREAKPOINTS 675 flush_ptrace_hw_breakpoint(current); 676 #else /* CONFIG_HAVE_HW_BREAKPOINTS */ 677 set_debug_reg_defaults(¤t->thread); 678 #endif /* CONFIG_HAVE_HW_BREAKPOINTS */ 679 } 680 681 void 682 release_thread(struct task_struct *t) 683 { 684 } 685 686 /* 687 * This gets called before we allocate a new thread and copy 688 * the current task into it. 689 */ 690 void prepare_to_copy(struct task_struct *tsk) 691 { 692 flush_fp_to_thread(current); 693 flush_altivec_to_thread(current); 694 flush_vsx_to_thread(current); 695 flush_spe_to_thread(current); 696 #ifdef CONFIG_HAVE_HW_BREAKPOINT 697 flush_ptrace_hw_breakpoint(tsk); 698 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 699 } 700 701 /* 702 * Copy a thread.. 703 */ 704 int copy_thread(unsigned long clone_flags, unsigned long usp, 705 unsigned long unused, struct task_struct *p, 706 struct pt_regs *regs) 707 { 708 struct pt_regs *childregs, *kregs; 709 extern void ret_from_fork(void); 710 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 711 712 CHECK_FULL_REGS(regs); 713 /* Copy registers */ 714 sp -= sizeof(struct pt_regs); 715 childregs = (struct pt_regs *) sp; 716 *childregs = *regs; 717 if ((childregs->msr & MSR_PR) == 0) { 718 /* for kernel thread, set `current' and stackptr in new task */ 719 childregs->gpr[1] = sp + sizeof(struct pt_regs); 720 #ifdef CONFIG_PPC32 721 childregs->gpr[2] = (unsigned long) p; 722 #else 723 clear_tsk_thread_flag(p, TIF_32BIT); 724 #endif 725 p->thread.regs = NULL; /* no user register state */ 726 } else { 727 childregs->gpr[1] = usp; 728 p->thread.regs = childregs; 729 if (clone_flags & CLONE_SETTLS) { 730 #ifdef CONFIG_PPC64 731 if (!test_thread_flag(TIF_32BIT)) 732 childregs->gpr[13] = childregs->gpr[6]; 733 else 734 #endif 735 childregs->gpr[2] = childregs->gpr[6]; 736 } 737 } 738 childregs->gpr[3] = 0; /* Result from fork() */ 739 sp -= STACK_FRAME_OVERHEAD; 740 741 /* 742 * The way this works is that at some point in the future 743 * some task will call _switch to switch to the new task. 744 * That will pop off the stack frame created below and start 745 * the new task running at ret_from_fork. The new task will 746 * do some house keeping and then return from the fork or clone 747 * system call, using the stack frame created above. 748 */ 749 sp -= sizeof(struct pt_regs); 750 kregs = (struct pt_regs *) sp; 751 sp -= STACK_FRAME_OVERHEAD; 752 p->thread.ksp = sp; 753 p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 754 _ALIGN_UP(sizeof(struct thread_info), 16); 755 756 #ifdef CONFIG_PPC_STD_MMU_64 757 if (cpu_has_feature(CPU_FTR_SLB)) { 758 unsigned long sp_vsid; 759 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 760 761 if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) 762 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 763 << SLB_VSID_SHIFT_1T; 764 else 765 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 766 << SLB_VSID_SHIFT; 767 sp_vsid |= SLB_VSID_KERNEL | llp; 768 p->thread.ksp_vsid = sp_vsid; 769 } 770 #endif /* CONFIG_PPC_STD_MMU_64 */ 771 772 /* 773 * The PPC64 ABI makes use of a TOC to contain function 774 * pointers. The function (ret_from_except) is actually a pointer 775 * to the TOC entry. The first entry is a pointer to the actual 776 * function. 777 */ 778 #ifdef CONFIG_PPC64 779 kregs->nip = *((unsigned long *)ret_from_fork); 780 #else 781 kregs->nip = (unsigned long)ret_from_fork; 782 #endif 783 784 return 0; 785 } 786 787 /* 788 * Set up a thread for executing a new program 789 */ 790 void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 791 { 792 #ifdef CONFIG_PPC64 793 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 794 #endif 795 796 set_fs(USER_DS); 797 798 /* 799 * If we exec out of a kernel thread then thread.regs will not be 800 * set. Do it now. 801 */ 802 if (!current->thread.regs) { 803 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 804 current->thread.regs = regs - 1; 805 } 806 807 memset(regs->gpr, 0, sizeof(regs->gpr)); 808 regs->ctr = 0; 809 regs->link = 0; 810 regs->xer = 0; 811 regs->ccr = 0; 812 regs->gpr[1] = sp; 813 814 /* 815 * We have just cleared all the nonvolatile GPRs, so make 816 * FULL_REGS(regs) return true. This is necessary to allow 817 * ptrace to examine the thread immediately after exec. 818 */ 819 regs->trap &= ~1UL; 820 821 #ifdef CONFIG_PPC32 822 regs->mq = 0; 823 regs->nip = start; 824 regs->msr = MSR_USER; 825 #else 826 if (!test_thread_flag(TIF_32BIT)) { 827 unsigned long entry, toc; 828 829 /* start is a relocated pointer to the function descriptor for 830 * the elf _start routine. The first entry in the function 831 * descriptor is the entry address of _start and the second 832 * entry is the TOC value we need to use. 833 */ 834 __get_user(entry, (unsigned long __user *)start); 835 __get_user(toc, (unsigned long __user *)start+1); 836 837 /* Check whether the e_entry function descriptor entries 838 * need to be relocated before we can use them. 839 */ 840 if (load_addr != 0) { 841 entry += load_addr; 842 toc += load_addr; 843 } 844 regs->nip = entry; 845 regs->gpr[2] = toc; 846 regs->msr = MSR_USER64; 847 } else { 848 regs->nip = start; 849 regs->gpr[2] = 0; 850 regs->msr = MSR_USER32; 851 } 852 #endif 853 854 discard_lazy_cpu_state(); 855 #ifdef CONFIG_VSX 856 current->thread.used_vsr = 0; 857 #endif 858 memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); 859 current->thread.fpscr.val = 0; 860 #ifdef CONFIG_ALTIVEC 861 memset(current->thread.vr, 0, sizeof(current->thread.vr)); 862 memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); 863 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */ 864 current->thread.vrsave = 0; 865 current->thread.used_vr = 0; 866 #endif /* CONFIG_ALTIVEC */ 867 #ifdef CONFIG_SPE 868 memset(current->thread.evr, 0, sizeof(current->thread.evr)); 869 current->thread.acc = 0; 870 current->thread.spefscr = 0; 871 current->thread.used_spe = 0; 872 #endif /* CONFIG_SPE */ 873 } 874 875 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 876 | PR_FP_EXC_RES | PR_FP_EXC_INV) 877 878 int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 879 { 880 struct pt_regs *regs = tsk->thread.regs; 881 882 /* This is a bit hairy. If we are an SPE enabled processor 883 * (have embedded fp) we store the IEEE exception enable flags in 884 * fpexc_mode. fpexc_mode is also used for setting FP exception 885 * mode (asyn, precise, disabled) for 'Classic' FP. */ 886 if (val & PR_FP_EXC_SW_ENABLE) { 887 #ifdef CONFIG_SPE 888 if (cpu_has_feature(CPU_FTR_SPE)) { 889 tsk->thread.fpexc_mode = val & 890 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 891 return 0; 892 } else { 893 return -EINVAL; 894 } 895 #else 896 return -EINVAL; 897 #endif 898 } 899 900 /* on a CONFIG_SPE this does not hurt us. The bits that 901 * __pack_fe01 use do not overlap with bits used for 902 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 903 * on CONFIG_SPE implementations are reserved so writing to 904 * them does not change anything */ 905 if (val > PR_FP_EXC_PRECISE) 906 return -EINVAL; 907 tsk->thread.fpexc_mode = __pack_fe01(val); 908 if (regs != NULL && (regs->msr & MSR_FP) != 0) 909 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 910 | tsk->thread.fpexc_mode; 911 return 0; 912 } 913 914 int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 915 { 916 unsigned int val; 917 918 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 919 #ifdef CONFIG_SPE 920 if (cpu_has_feature(CPU_FTR_SPE)) 921 val = tsk->thread.fpexc_mode; 922 else 923 return -EINVAL; 924 #else 925 return -EINVAL; 926 #endif 927 else 928 val = __unpack_fe01(tsk->thread.fpexc_mode); 929 return put_user(val, (unsigned int __user *) adr); 930 } 931 932 int set_endian(struct task_struct *tsk, unsigned int val) 933 { 934 struct pt_regs *regs = tsk->thread.regs; 935 936 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 937 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 938 return -EINVAL; 939 940 if (regs == NULL) 941 return -EINVAL; 942 943 if (val == PR_ENDIAN_BIG) 944 regs->msr &= ~MSR_LE; 945 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 946 regs->msr |= MSR_LE; 947 else 948 return -EINVAL; 949 950 return 0; 951 } 952 953 int get_endian(struct task_struct *tsk, unsigned long adr) 954 { 955 struct pt_regs *regs = tsk->thread.regs; 956 unsigned int val; 957 958 if (!cpu_has_feature(CPU_FTR_PPC_LE) && 959 !cpu_has_feature(CPU_FTR_REAL_LE)) 960 return -EINVAL; 961 962 if (regs == NULL) 963 return -EINVAL; 964 965 if (regs->msr & MSR_LE) { 966 if (cpu_has_feature(CPU_FTR_REAL_LE)) 967 val = PR_ENDIAN_LITTLE; 968 else 969 val = PR_ENDIAN_PPC_LITTLE; 970 } else 971 val = PR_ENDIAN_BIG; 972 973 return put_user(val, (unsigned int __user *)adr); 974 } 975 976 int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 977 { 978 tsk->thread.align_ctl = val; 979 return 0; 980 } 981 982 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 983 { 984 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 985 } 986 987 #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff)) 988 989 int sys_clone(unsigned long clone_flags, unsigned long usp, 990 int __user *parent_tidp, void __user *child_threadptr, 991 int __user *child_tidp, int p6, 992 struct pt_regs *regs) 993 { 994 CHECK_FULL_REGS(regs); 995 if (usp == 0) 996 usp = regs->gpr[1]; /* stack pointer for child */ 997 #ifdef CONFIG_PPC64 998 if (test_thread_flag(TIF_32BIT)) { 999 parent_tidp = TRUNC_PTR(parent_tidp); 1000 child_tidp = TRUNC_PTR(child_tidp); 1001 } 1002 #endif 1003 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); 1004 } 1005 1006 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, 1007 unsigned long p4, unsigned long p5, unsigned long p6, 1008 struct pt_regs *regs) 1009 { 1010 CHECK_FULL_REGS(regs); 1011 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); 1012 } 1013 1014 int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, 1015 unsigned long p4, unsigned long p5, unsigned long p6, 1016 struct pt_regs *regs) 1017 { 1018 CHECK_FULL_REGS(regs); 1019 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1], 1020 regs, 0, NULL, NULL); 1021 } 1022 1023 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, 1024 unsigned long a3, unsigned long a4, unsigned long a5, 1025 struct pt_regs *regs) 1026 { 1027 int error; 1028 char *filename; 1029 1030 filename = getname((char __user *) a0); 1031 error = PTR_ERR(filename); 1032 if (IS_ERR(filename)) 1033 goto out; 1034 flush_fp_to_thread(current); 1035 flush_altivec_to_thread(current); 1036 flush_spe_to_thread(current); 1037 error = do_execve(filename, (char __user * __user *) a1, 1038 (char __user * __user *) a2, regs); 1039 putname(filename); 1040 out: 1041 return error; 1042 } 1043 1044 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1045 unsigned long nbytes) 1046 { 1047 unsigned long stack_page; 1048 unsigned long cpu = task_cpu(p); 1049 1050 /* 1051 * Avoid crashing if the stack has overflowed and corrupted 1052 * task_cpu(p), which is in the thread_info struct. 1053 */ 1054 if (cpu < NR_CPUS && cpu_possible(cpu)) { 1055 stack_page = (unsigned long) hardirq_ctx[cpu]; 1056 if (sp >= stack_page + sizeof(struct thread_struct) 1057 && sp <= stack_page + THREAD_SIZE - nbytes) 1058 return 1; 1059 1060 stack_page = (unsigned long) softirq_ctx[cpu]; 1061 if (sp >= stack_page + sizeof(struct thread_struct) 1062 && sp <= stack_page + THREAD_SIZE - nbytes) 1063 return 1; 1064 } 1065 return 0; 1066 } 1067 1068 int validate_sp(unsigned long sp, struct task_struct *p, 1069 unsigned long nbytes) 1070 { 1071 unsigned long stack_page = (unsigned long)task_stack_page(p); 1072 1073 if (sp >= stack_page + sizeof(struct thread_struct) 1074 && sp <= stack_page + THREAD_SIZE - nbytes) 1075 return 1; 1076 1077 return valid_irq_stack(sp, p, nbytes); 1078 } 1079 1080 EXPORT_SYMBOL(validate_sp); 1081 1082 unsigned long get_wchan(struct task_struct *p) 1083 { 1084 unsigned long ip, sp; 1085 int count = 0; 1086 1087 if (!p || p == current || p->state == TASK_RUNNING) 1088 return 0; 1089 1090 sp = p->thread.ksp; 1091 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 1092 return 0; 1093 1094 do { 1095 sp = *(unsigned long *)sp; 1096 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 1097 return 0; 1098 if (count > 0) { 1099 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 1100 if (!in_sched_functions(ip)) 1101 return ip; 1102 } 1103 } while (count++ < 16); 1104 return 0; 1105 } 1106 1107 static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 1108 1109 void show_stack(struct task_struct *tsk, unsigned long *stack) 1110 { 1111 unsigned long sp, ip, lr, newsp; 1112 int count = 0; 1113 int firstframe = 1; 1114 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 1115 int curr_frame = current->curr_ret_stack; 1116 extern void return_to_handler(void); 1117 unsigned long rth = (unsigned long)return_to_handler; 1118 unsigned long mrth = -1; 1119 #ifdef CONFIG_PPC64 1120 extern void mod_return_to_handler(void); 1121 rth = *(unsigned long *)rth; 1122 mrth = (unsigned long)mod_return_to_handler; 1123 mrth = *(unsigned long *)mrth; 1124 #endif 1125 #endif 1126 1127 sp = (unsigned long) stack; 1128 if (tsk == NULL) 1129 tsk = current; 1130 if (sp == 0) { 1131 if (tsk == current) 1132 asm("mr %0,1" : "=r" (sp)); 1133 else 1134 sp = tsk->thread.ksp; 1135 } 1136 1137 lr = 0; 1138 printk("Call Trace:\n"); 1139 do { 1140 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 1141 return; 1142 1143 stack = (unsigned long *) sp; 1144 newsp = stack[0]; 1145 ip = stack[STACK_FRAME_LR_SAVE]; 1146 if (!firstframe || ip != lr) { 1147 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 1148 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 1149 if ((ip == rth || ip == mrth) && curr_frame >= 0) { 1150 printk(" (%pS)", 1151 (void *)current->ret_stack[curr_frame].ret); 1152 curr_frame--; 1153 } 1154 #endif 1155 if (firstframe) 1156 printk(" (unreliable)"); 1157 printk("\n"); 1158 } 1159 firstframe = 0; 1160 1161 /* 1162 * See if this is an exception frame. 1163 * We look for the "regshere" marker in the current frame. 1164 */ 1165 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1166 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 1167 struct pt_regs *regs = (struct pt_regs *) 1168 (sp + STACK_FRAME_OVERHEAD); 1169 lr = regs->link; 1170 printk("--- Exception: %lx at %pS\n LR = %pS\n", 1171 regs->trap, (void *)regs->nip, (void *)lr); 1172 firstframe = 1; 1173 } 1174 1175 sp = newsp; 1176 } while (count++ < kstack_depth_to_print); 1177 } 1178 1179 void dump_stack(void) 1180 { 1181 show_stack(current, NULL); 1182 } 1183 EXPORT_SYMBOL(dump_stack); 1184 1185 #ifdef CONFIG_PPC64 1186 void ppc64_runlatch_on(void) 1187 { 1188 unsigned long ctrl; 1189 1190 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) { 1191 HMT_medium(); 1192 1193 ctrl = mfspr(SPRN_CTRLF); 1194 ctrl |= CTRL_RUNLATCH; 1195 mtspr(SPRN_CTRLT, ctrl); 1196 1197 set_thread_flag(TIF_RUNLATCH); 1198 } 1199 } 1200 1201 void ppc64_runlatch_off(void) 1202 { 1203 unsigned long ctrl; 1204 1205 if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) { 1206 HMT_medium(); 1207 1208 clear_thread_flag(TIF_RUNLATCH); 1209 1210 ctrl = mfspr(SPRN_CTRLF); 1211 ctrl &= ~CTRL_RUNLATCH; 1212 mtspr(SPRN_CTRLT, ctrl); 1213 } 1214 } 1215 #endif 1216 1217 #if THREAD_SHIFT < PAGE_SHIFT 1218 1219 static struct kmem_cache *thread_info_cache; 1220 1221 struct thread_info *alloc_thread_info(struct task_struct *tsk) 1222 { 1223 struct thread_info *ti; 1224 1225 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); 1226 if (unlikely(ti == NULL)) 1227 return NULL; 1228 #ifdef CONFIG_DEBUG_STACK_USAGE 1229 memset(ti, 0, THREAD_SIZE); 1230 #endif 1231 return ti; 1232 } 1233 1234 void free_thread_info(struct thread_info *ti) 1235 { 1236 kmem_cache_free(thread_info_cache, ti); 1237 } 1238 1239 void thread_info_cache_init(void) 1240 { 1241 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE, 1242 THREAD_SIZE, 0, NULL); 1243 BUG_ON(thread_info_cache == NULL); 1244 } 1245 1246 #endif /* THREAD_SHIFT < PAGE_SHIFT */ 1247 1248 unsigned long arch_align_stack(unsigned long sp) 1249 { 1250 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1251 sp -= get_random_int() & ~PAGE_MASK; 1252 return sp & ~0xf; 1253 } 1254 1255 static inline unsigned long brk_rnd(void) 1256 { 1257 unsigned long rnd = 0; 1258 1259 /* 8MB for 32bit, 1GB for 64bit */ 1260 if (is_32bit_task()) 1261 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT))); 1262 else 1263 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT))); 1264 1265 return rnd << PAGE_SHIFT; 1266 } 1267 1268 unsigned long arch_randomize_brk(struct mm_struct *mm) 1269 { 1270 unsigned long base = mm->brk; 1271 unsigned long ret; 1272 1273 #ifdef CONFIG_PPC_STD_MMU_64 1274 /* 1275 * If we are using 1TB segments and we are allowed to randomise 1276 * the heap, we can put it above 1TB so it is backed by a 1TB 1277 * segment. Otherwise the heap will be in the bottom 1TB 1278 * which always uses 256MB segments and this may result in a 1279 * performance penalty. 1280 */ 1281 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 1282 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 1283 #endif 1284 1285 ret = PAGE_ALIGN(base + brk_rnd()); 1286 1287 if (ret < mm->brk) 1288 return mm->brk; 1289 1290 return ret; 1291 } 1292 1293 unsigned long randomize_et_dyn(unsigned long base) 1294 { 1295 unsigned long ret = PAGE_ALIGN(base + brk_rnd()); 1296 1297 if (ret < base) 1298 return base; 1299 1300 return ret; 1301 } 1302 1303 #ifdef CONFIG_SMP 1304 int arch_sd_sibling_asym_packing(void) 1305 { 1306 if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { 1307 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); 1308 return SD_ASYM_PACKING; 1309 } 1310 return 0; 1311 } 1312 #endif 1313