1 /* 2 * Derived from "arch/i386/kernel/process.c" 3 * Copyright (C) 1995 Linus Torvalds 4 * 5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 6 * Paul Mackerras (paulus@cs.anu.edu.au) 7 * 8 * PowerPC version 9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 14 * 2 of the License, or (at your option) any later version. 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/smp.h> 22 #include <linux/stddef.h> 23 #include <linux/unistd.h> 24 #include <linux/ptrace.h> 25 #include <linux/slab.h> 26 #include <linux/user.h> 27 #include <linux/elf.h> 28 #include <linux/init.h> 29 #include <linux/prctl.h> 30 #include <linux/init_task.h> 31 #include <linux/module.h> 32 #include <linux/kallsyms.h> 33 #include <linux/mqueue.h> 34 #include <linux/hardirq.h> 35 #include <linux/utsname.h> 36 #include <linux/ftrace.h> 37 #include <linux/kernel_stat.h> 38 #include <linux/personality.h> 39 #include <linux/random.h> 40 #include <linux/hw_breakpoint.h> 41 42 #include <asm/pgtable.h> 43 #include <asm/uaccess.h> 44 #include <asm/system.h> 45 #include <asm/io.h> 46 #include <asm/processor.h> 47 #include <asm/mmu.h> 48 #include <asm/prom.h> 49 #include <asm/machdep.h> 50 #include <asm/time.h> 51 #include <asm/syscalls.h> 52 #ifdef CONFIG_PPC64 53 #include <asm/firmware.h> 54 #endif 55 #include <linux/kprobes.h> 56 #include <linux/kdebug.h> 57 58 extern unsigned long _get_SP(void); 59 60 #ifndef CONFIG_SMP 61 struct task_struct *last_task_used_math = NULL; 62 struct task_struct *last_task_used_altivec = NULL; 63 struct task_struct *last_task_used_vsx = NULL; 64 struct task_struct *last_task_used_spe = NULL; 65 #endif 66 67 /* 68 * Make sure the floating-point register state in the 69 * the thread_struct is up to date for task tsk. 70 */ 71 void flush_fp_to_thread(struct task_struct *tsk) 72 { 73 if (tsk->thread.regs) { 74 /* 75 * We need to disable preemption here because if we didn't, 76 * another process could get scheduled after the regs->msr 77 * test but before we have finished saving the FP registers 78 * to the thread_struct. That process could take over the 79 * FPU, and then when we get scheduled again we would store 80 * bogus values for the remaining FP registers. 81 */ 82 preempt_disable(); 83 if (tsk->thread.regs->msr & MSR_FP) { 84 #ifdef CONFIG_SMP 85 /* 86 * This should only ever be called for current or 87 * for a stopped child process. Since we save away 88 * the FP register state on context switch on SMP, 89 * there is something wrong if a stopped child appears 90 * to still have its FP state in the CPU registers. 91 */ 92 BUG_ON(tsk != current); 93 #endif 94 giveup_fpu(tsk); 95 } 96 preempt_enable(); 97 } 98 } 99 100 void enable_kernel_fp(void) 101 { 102 WARN_ON(preemptible()); 103 104 #ifdef CONFIG_SMP 105 if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) 106 giveup_fpu(current); 107 else 108 giveup_fpu(NULL); /* just enables FP for kernel */ 109 #else 110 giveup_fpu(last_task_used_math); 111 #endif /* CONFIG_SMP */ 112 } 113 EXPORT_SYMBOL(enable_kernel_fp); 114 115 #ifdef CONFIG_ALTIVEC 116 void enable_kernel_altivec(void) 117 { 118 WARN_ON(preemptible()); 119 120 #ifdef CONFIG_SMP 121 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) 122 giveup_altivec(current); 123 else 124 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */ 125 #else 126 giveup_altivec(last_task_used_altivec); 127 #endif /* CONFIG_SMP */ 128 } 129 EXPORT_SYMBOL(enable_kernel_altivec); 130 131 /* 132 * Make sure the VMX/Altivec register state in the 133 * the thread_struct is up to date for task tsk. 134 */ 135 void flush_altivec_to_thread(struct task_struct *tsk) 136 { 137 if (tsk->thread.regs) { 138 preempt_disable(); 139 if (tsk->thread.regs->msr & MSR_VEC) { 140 #ifdef CONFIG_SMP 141 BUG_ON(tsk != current); 142 #endif 143 giveup_altivec(tsk); 144 } 145 preempt_enable(); 146 } 147 } 148 #endif /* CONFIG_ALTIVEC */ 149 150 #ifdef CONFIG_VSX 151 #if 0 152 /* not currently used, but some crazy RAID module might want to later */ 153 void enable_kernel_vsx(void) 154 { 155 WARN_ON(preemptible()); 156 157 #ifdef CONFIG_SMP 158 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) 159 giveup_vsx(current); 160 else 161 giveup_vsx(NULL); /* just enable vsx for kernel - force */ 162 #else 163 giveup_vsx(last_task_used_vsx); 164 #endif /* CONFIG_SMP */ 165 } 166 EXPORT_SYMBOL(enable_kernel_vsx); 167 #endif 168 169 void giveup_vsx(struct task_struct *tsk) 170 { 171 giveup_fpu(tsk); 172 giveup_altivec(tsk); 173 __giveup_vsx(tsk); 174 } 175 176 void flush_vsx_to_thread(struct task_struct *tsk) 177 { 178 if (tsk->thread.regs) { 179 preempt_disable(); 180 if (tsk->thread.regs->msr & MSR_VSX) { 181 #ifdef CONFIG_SMP 182 BUG_ON(tsk != current); 183 #endif 184 giveup_vsx(tsk); 185 } 186 preempt_enable(); 187 } 188 } 189 #endif /* CONFIG_VSX */ 190 191 #ifdef CONFIG_SPE 192 193 void enable_kernel_spe(void) 194 { 195 WARN_ON(preemptible()); 196 197 #ifdef CONFIG_SMP 198 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) 199 giveup_spe(current); 200 else 201 giveup_spe(NULL); /* just enable SPE for kernel - force */ 202 #else 203 giveup_spe(last_task_used_spe); 204 #endif /* __SMP __ */ 205 } 206 EXPORT_SYMBOL(enable_kernel_spe); 207 208 void flush_spe_to_thread(struct task_struct *tsk) 209 { 210 if (tsk->thread.regs) { 211 preempt_disable(); 212 if (tsk->thread.regs->msr & MSR_SPE) { 213 #ifdef CONFIG_SMP 214 BUG_ON(tsk != current); 215 #endif 216 giveup_spe(tsk); 217 } 218 preempt_enable(); 219 } 220 } 221 #endif /* CONFIG_SPE */ 222 223 #ifndef CONFIG_SMP 224 /* 225 * If we are doing lazy switching of CPU state (FP, altivec or SPE), 226 * and the current task has some state, discard it. 227 */ 228 void discard_lazy_cpu_state(void) 229 { 230 preempt_disable(); 231 if (last_task_used_math == current) 232 last_task_used_math = NULL; 233 #ifdef CONFIG_ALTIVEC 234 if (last_task_used_altivec == current) 235 last_task_used_altivec = NULL; 236 #endif /* CONFIG_ALTIVEC */ 237 #ifdef CONFIG_VSX 238 if (last_task_used_vsx == current) 239 last_task_used_vsx = NULL; 240 #endif /* CONFIG_VSX */ 241 #ifdef CONFIG_SPE 242 if (last_task_used_spe == current) 243 last_task_used_spe = NULL; 244 #endif 245 preempt_enable(); 246 } 247 #endif /* CONFIG_SMP */ 248 249 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 250 void do_send_trap(struct pt_regs *regs, unsigned long address, 251 unsigned long error_code, int signal_code, int breakpt) 252 { 253 siginfo_t info; 254 255 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 256 11, SIGSEGV) == NOTIFY_STOP) 257 return; 258 259 /* Deliver the signal to userspace */ 260 info.si_signo = SIGTRAP; 261 info.si_errno = breakpt; /* breakpoint or watchpoint id */ 262 info.si_code = signal_code; 263 info.si_addr = (void __user *)address; 264 force_sig_info(SIGTRAP, &info, current); 265 } 266 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 267 void do_dabr(struct pt_regs *regs, unsigned long address, 268 unsigned long error_code) 269 { 270 siginfo_t info; 271 272 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 273 11, SIGSEGV) == NOTIFY_STOP) 274 return; 275 276 if (debugger_dabr_match(regs)) 277 return; 278 279 /* Clear the DABR */ 280 set_dabr(0); 281 282 /* Deliver the signal to userspace */ 283 info.si_signo = SIGTRAP; 284 info.si_errno = 0; 285 info.si_code = TRAP_HWBKPT; 286 info.si_addr = (void __user *)address; 287 force_sig_info(SIGTRAP, &info, current); 288 } 289 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 290 291 static DEFINE_PER_CPU(unsigned long, current_dabr); 292 293 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 294 /* 295 * Set the debug registers back to their default "safe" values. 296 */ 297 static void set_debug_reg_defaults(struct thread_struct *thread) 298 { 299 thread->iac1 = thread->iac2 = 0; 300 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 301 thread->iac3 = thread->iac4 = 0; 302 #endif 303 thread->dac1 = thread->dac2 = 0; 304 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 305 thread->dvc1 = thread->dvc2 = 0; 306 #endif 307 thread->dbcr0 = 0; 308 #ifdef CONFIG_BOOKE 309 /* 310 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 311 */ 312 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \ 313 DBCR1_IAC3US | DBCR1_IAC4US; 314 /* 315 * Force Data Address Compare User/Supervisor bits to be User-only 316 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 317 */ 318 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 319 #else 320 thread->dbcr1 = 0; 321 #endif 322 } 323 324 static void prime_debug_regs(struct thread_struct *thread) 325 { 326 mtspr(SPRN_IAC1, thread->iac1); 327 mtspr(SPRN_IAC2, thread->iac2); 328 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 329 mtspr(SPRN_IAC3, thread->iac3); 330 mtspr(SPRN_IAC4, thread->iac4); 331 #endif 332 mtspr(SPRN_DAC1, thread->dac1); 333 mtspr(SPRN_DAC2, thread->dac2); 334 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 335 mtspr(SPRN_DVC1, thread->dvc1); 336 mtspr(SPRN_DVC2, thread->dvc2); 337 #endif 338 mtspr(SPRN_DBCR0, thread->dbcr0); 339 mtspr(SPRN_DBCR1, thread->dbcr1); 340 #ifdef CONFIG_BOOKE 341 mtspr(SPRN_DBCR2, thread->dbcr2); 342 #endif 343 } 344 /* 345 * Unless neither the old or new thread are making use of the 346 * debug registers, set the debug registers from the values 347 * stored in the new thread. 348 */ 349 static void switch_booke_debug_regs(struct thread_struct *new_thread) 350 { 351 if ((current->thread.dbcr0 & DBCR0_IDM) 352 || (new_thread->dbcr0 & DBCR0_IDM)) 353 prime_debug_regs(new_thread); 354 } 355 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 356 #ifndef CONFIG_HAVE_HW_BREAKPOINT 357 static void set_debug_reg_defaults(struct thread_struct *thread) 358 { 359 if (thread->dabr) { 360 thread->dabr = 0; 361 set_dabr(0); 362 } 363 } 364 #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 365 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 366 367 int set_dabr(unsigned long dabr) 368 { 369 __get_cpu_var(current_dabr) = dabr; 370 371 if (ppc_md.set_dabr) 372 return ppc_md.set_dabr(dabr); 373 374 /* XXX should we have a CPU_FTR_HAS_DABR ? */ 375 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 376 mtspr(SPRN_DAC1, dabr); 377 #ifdef CONFIG_PPC_47x 378 isync(); 379 #endif 380 #elif defined(CONFIG_PPC_BOOK3S) 381 mtspr(SPRN_DABR, dabr); 382 #endif 383 384 385 return 0; 386 } 387 388 #ifdef CONFIG_PPC64 389 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 390 #endif 391 392 struct task_struct *__switch_to(struct task_struct *prev, 393 struct task_struct *new) 394 { 395 struct thread_struct *new_thread, *old_thread; 396 unsigned long flags; 397 struct task_struct *last; 398 399 #ifdef CONFIG_SMP 400 /* avoid complexity of lazy save/restore of fpu 401 * by just saving it every time we switch out if 402 * this task used the fpu during the last quantum. 403 * 404 * If it tries to use the fpu again, it'll trap and 405 * reload its fp regs. So we don't have to do a restore 406 * every switch, just a save. 407 * -- Cort 408 */ 409 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP)) 410 giveup_fpu(prev); 411 #ifdef CONFIG_ALTIVEC 412 /* 413 * If the previous thread used altivec in the last quantum 414 * (thus changing altivec regs) then save them. 415 * We used to check the VRSAVE register but not all apps 416 * set it, so we don't rely on it now (and in fact we need 417 * to save & restore VSCR even if VRSAVE == 0). -- paulus 418 * 419 * On SMP we always save/restore altivec regs just to avoid the 420 * complexity of changing processors. 421 * -- Cort 422 */ 423 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) 424 giveup_altivec(prev); 425 #endif /* CONFIG_ALTIVEC */ 426 #ifdef CONFIG_VSX 427 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX)) 428 /* VMX and FPU registers are already save here */ 429 __giveup_vsx(prev); 430 #endif /* CONFIG_VSX */ 431 #ifdef CONFIG_SPE 432 /* 433 * If the previous thread used spe in the last quantum 434 * (thus changing spe regs) then save them. 435 * 436 * On SMP we always save/restore spe regs just to avoid the 437 * complexity of changing processors. 438 */ 439 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE))) 440 giveup_spe(prev); 441 #endif /* CONFIG_SPE */ 442 443 #else /* CONFIG_SMP */ 444 #ifdef CONFIG_ALTIVEC 445 /* Avoid the trap. On smp this this never happens since 446 * we don't set last_task_used_altivec -- Cort 447 */ 448 if (new->thread.regs && last_task_used_altivec == new) 449 new->thread.regs->msr |= MSR_VEC; 450 #endif /* CONFIG_ALTIVEC */ 451 #ifdef CONFIG_VSX 452 if (new->thread.regs && last_task_used_vsx == new) 453 new->thread.regs->msr |= MSR_VSX; 454 #endif /* CONFIG_VSX */ 455 #ifdef CONFIG_SPE 456 /* Avoid the trap. On smp this this never happens since 457 * we don't set last_task_used_spe 458 */ 459 if (new->thread.regs && last_task_used_spe == new) 460 new->thread.regs->msr |= MSR_SPE; 461 #endif /* CONFIG_SPE */ 462 463 #endif /* CONFIG_SMP */ 464 465 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 466 switch_booke_debug_regs(&new->thread); 467 #else 468 /* 469 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 470 * schedule DABR 471 */ 472 #ifndef CONFIG_HAVE_HW_BREAKPOINT 473 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) 474 set_dabr(new->thread.dabr); 475 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 476 #endif 477 478 479 new_thread = &new->thread; 480 old_thread = ¤t->thread; 481 482 #if defined(CONFIG_PPC_BOOK3E_64) 483 /* XXX Current Book3E code doesn't deal with kernel side DBCR0, 484 * we always hold the user values, so we set it now. 485 * 486 * However, we ensure the kernel MSR:DE is appropriately cleared too 487 * to avoid spurrious single step exceptions in the kernel. 488 * 489 * This will have to change to merge with the ppc32 code at some point, 490 * but I don't like much what ppc32 is doing today so there's some 491 * thinking needed there 492 */ 493 if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) { 494 u32 dbcr0; 495 496 mtmsr(mfmsr() & ~MSR_DE); 497 isync(); 498 dbcr0 = mfspr(SPRN_DBCR0); 499 dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0; 500 mtspr(SPRN_DBCR0, dbcr0); 501 } 502 #endif /* CONFIG_PPC64_BOOK3E */ 503 504 #ifdef CONFIG_PPC64 505 /* 506 * Collect processor utilization data per process 507 */ 508 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 509 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); 510 long unsigned start_tb, current_tb; 511 start_tb = old_thread->start_tb; 512 cu->current_tb = current_tb = mfspr(SPRN_PURR); 513 old_thread->accum_tb += (current_tb - start_tb); 514 new_thread->start_tb = current_tb; 515 } 516 #endif 517 518 local_irq_save(flags); 519 520 account_system_vtime(current); 521 account_process_vtime(current); 522 523 /* 524 * We can't take a PMU exception inside _switch() since there is a 525 * window where the kernel stack SLB and the kernel stack are out 526 * of sync. Hard disable here. 527 */ 528 hard_irq_disable(); 529 last = _switch(old_thread, new_thread); 530 531 local_irq_restore(flags); 532 533 return last; 534 } 535 536 static int instructions_to_print = 16; 537 538 static void show_instructions(struct pt_regs *regs) 539 { 540 int i; 541 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 542 sizeof(int)); 543 544 printk("Instruction dump:"); 545 546 for (i = 0; i < instructions_to_print; i++) { 547 int instr; 548 549 if (!(i % 8)) 550 printk("\n"); 551 552 #if !defined(CONFIG_BOOKE) 553 /* If executing with the IMMU off, adjust pc rather 554 * than print XXXXXXXX. 555 */ 556 if (!(regs->msr & MSR_IR)) 557 pc = (unsigned long)phys_to_virt(pc); 558 #endif 559 560 /* We use __get_user here *only* to avoid an OOPS on a 561 * bad address because the pc *should* only be a 562 * kernel address. 563 */ 564 if (!__kernel_text_address(pc) || 565 __get_user(instr, (unsigned int __user *)pc)) { 566 printk("XXXXXXXX "); 567 } else { 568 if (regs->nip == pc) 569 printk("<%08x> ", instr); 570 else 571 printk("%08x ", instr); 572 } 573 574 pc += sizeof(int); 575 } 576 577 printk("\n"); 578 } 579 580 static struct regbit { 581 unsigned long bit; 582 const char *name; 583 } msr_bits[] = { 584 {MSR_EE, "EE"}, 585 {MSR_PR, "PR"}, 586 {MSR_FP, "FP"}, 587 {MSR_VEC, "VEC"}, 588 {MSR_VSX, "VSX"}, 589 {MSR_ME, "ME"}, 590 {MSR_CE, "CE"}, 591 {MSR_DE, "DE"}, 592 {MSR_IR, "IR"}, 593 {MSR_DR, "DR"}, 594 {0, NULL} 595 }; 596 597 static void printbits(unsigned long val, struct regbit *bits) 598 { 599 const char *sep = ""; 600 601 printk("<"); 602 for (; bits->bit; ++bits) 603 if (val & bits->bit) { 604 printk("%s%s", sep, bits->name); 605 sep = ","; 606 } 607 printk(">"); 608 } 609 610 #ifdef CONFIG_PPC64 611 #define REG "%016lx" 612 #define REGS_PER_LINE 4 613 #define LAST_VOLATILE 13 614 #else 615 #define REG "%08lx" 616 #define REGS_PER_LINE 8 617 #define LAST_VOLATILE 12 618 #endif 619 620 void show_regs(struct pt_regs * regs) 621 { 622 int i, trap; 623 624 printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 625 regs->nip, regs->link, regs->ctr); 626 printk("REGS: %p TRAP: %04lx %s (%s)\n", 627 regs, regs->trap, print_tainted(), init_utsname()->release); 628 printk("MSR: "REG" ", regs->msr); 629 printbits(regs->msr, msr_bits); 630 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 631 trap = TRAP(regs); 632 if (trap == 0x300 || trap == 0x600) 633 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 634 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 635 #else 636 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr); 637 #endif 638 printk("TASK = %p[%d] '%s' THREAD: %p", 639 current, task_pid_nr(current), current->comm, task_thread_info(current)); 640 641 #ifdef CONFIG_SMP 642 printk(" CPU: %d", raw_smp_processor_id()); 643 #endif /* CONFIG_SMP */ 644 645 for (i = 0; i < 32; i++) { 646 if ((i % REGS_PER_LINE) == 0) 647 printk("\nGPR%02d: ", i); 648 printk(REG " ", regs->gpr[i]); 649 if (i == LAST_VOLATILE && !FULL_REGS(regs)) 650 break; 651 } 652 printk("\n"); 653 #ifdef CONFIG_KALLSYMS 654 /* 655 * Lookup NIP late so we have the best change of getting the 656 * above info out without failing 657 */ 658 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 659 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 660 #endif 661 show_stack(current, (unsigned long *) regs->gpr[1]); 662 if (!user_mode(regs)) 663 show_instructions(regs); 664 } 665 666 void exit_thread(void) 667 { 668 discard_lazy_cpu_state(); 669 } 670 671 void flush_thread(void) 672 { 673 discard_lazy_cpu_state(); 674 675 #ifdef CONFIG_HAVE_HW_BREAKPOINT 676 flush_ptrace_hw_breakpoint(current); 677 #else /* CONFIG_HAVE_HW_BREAKPOINT */ 678 set_debug_reg_defaults(¤t->thread); 679 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 680 } 681 682 void 683 release_thread(struct task_struct *t) 684 { 685 } 686 687 /* 688 * This gets called before we allocate a new thread and copy 689 * the current task into it. 690 */ 691 void prepare_to_copy(struct task_struct *tsk) 692 { 693 flush_fp_to_thread(current); 694 flush_altivec_to_thread(current); 695 flush_vsx_to_thread(current); 696 flush_spe_to_thread(current); 697 #ifdef CONFIG_HAVE_HW_BREAKPOINT 698 flush_ptrace_hw_breakpoint(tsk); 699 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 700 } 701 702 /* 703 * Copy a thread.. 704 */ 705 int copy_thread(unsigned long clone_flags, unsigned long usp, 706 unsigned long unused, struct task_struct *p, 707 struct pt_regs *regs) 708 { 709 struct pt_regs *childregs, *kregs; 710 extern void ret_from_fork(void); 711 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 712 713 CHECK_FULL_REGS(regs); 714 /* Copy registers */ 715 sp -= sizeof(struct pt_regs); 716 childregs = (struct pt_regs *) sp; 717 *childregs = *regs; 718 if ((childregs->msr & MSR_PR) == 0) { 719 /* for kernel thread, set `current' and stackptr in new task */ 720 childregs->gpr[1] = sp + sizeof(struct pt_regs); 721 #ifdef CONFIG_PPC32 722 childregs->gpr[2] = (unsigned long) p; 723 #else 724 clear_tsk_thread_flag(p, TIF_32BIT); 725 #endif 726 p->thread.regs = NULL; /* no user register state */ 727 } else { 728 childregs->gpr[1] = usp; 729 p->thread.regs = childregs; 730 if (clone_flags & CLONE_SETTLS) { 731 #ifdef CONFIG_PPC64 732 if (!is_32bit_task()) 733 childregs->gpr[13] = childregs->gpr[6]; 734 else 735 #endif 736 childregs->gpr[2] = childregs->gpr[6]; 737 } 738 } 739 childregs->gpr[3] = 0; /* Result from fork() */ 740 sp -= STACK_FRAME_OVERHEAD; 741 742 /* 743 * The way this works is that at some point in the future 744 * some task will call _switch to switch to the new task. 745 * That will pop off the stack frame created below and start 746 * the new task running at ret_from_fork. The new task will 747 * do some house keeping and then return from the fork or clone 748 * system call, using the stack frame created above. 749 */ 750 sp -= sizeof(struct pt_regs); 751 kregs = (struct pt_regs *) sp; 752 sp -= STACK_FRAME_OVERHEAD; 753 p->thread.ksp = sp; 754 p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 755 _ALIGN_UP(sizeof(struct thread_info), 16); 756 757 #ifdef CONFIG_PPC_STD_MMU_64 758 if (cpu_has_feature(CPU_FTR_SLB)) { 759 unsigned long sp_vsid; 760 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 761 762 if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) 763 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 764 << SLB_VSID_SHIFT_1T; 765 else 766 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 767 << SLB_VSID_SHIFT; 768 sp_vsid |= SLB_VSID_KERNEL | llp; 769 p->thread.ksp_vsid = sp_vsid; 770 } 771 #endif /* CONFIG_PPC_STD_MMU_64 */ 772 773 /* 774 * The PPC64 ABI makes use of a TOC to contain function 775 * pointers. The function (ret_from_except) is actually a pointer 776 * to the TOC entry. The first entry is a pointer to the actual 777 * function. 778 */ 779 #ifdef CONFIG_PPC64 780 kregs->nip = *((unsigned long *)ret_from_fork); 781 #else 782 kregs->nip = (unsigned long)ret_from_fork; 783 #endif 784 785 return 0; 786 } 787 788 /* 789 * Set up a thread for executing a new program 790 */ 791 void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 792 { 793 #ifdef CONFIG_PPC64 794 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 795 #endif 796 797 set_fs(USER_DS); 798 799 /* 800 * If we exec out of a kernel thread then thread.regs will not be 801 * set. Do it now. 802 */ 803 if (!current->thread.regs) { 804 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 805 current->thread.regs = regs - 1; 806 } 807 808 memset(regs->gpr, 0, sizeof(regs->gpr)); 809 regs->ctr = 0; 810 regs->link = 0; 811 regs->xer = 0; 812 regs->ccr = 0; 813 regs->gpr[1] = sp; 814 815 /* 816 * We have just cleared all the nonvolatile GPRs, so make 817 * FULL_REGS(regs) return true. This is necessary to allow 818 * ptrace to examine the thread immediately after exec. 819 */ 820 regs->trap &= ~1UL; 821 822 #ifdef CONFIG_PPC32 823 regs->mq = 0; 824 regs->nip = start; 825 regs->msr = MSR_USER; 826 #else 827 if (!is_32bit_task()) { 828 unsigned long entry, toc; 829 830 /* start is a relocated pointer to the function descriptor for 831 * the elf _start routine. The first entry in the function 832 * descriptor is the entry address of _start and the second 833 * entry is the TOC value we need to use. 834 */ 835 __get_user(entry, (unsigned long __user *)start); 836 __get_user(toc, (unsigned long __user *)start+1); 837 838 /* Check whether the e_entry function descriptor entries 839 * need to be relocated before we can use them. 840 */ 841 if (load_addr != 0) { 842 entry += load_addr; 843 toc += load_addr; 844 } 845 regs->nip = entry; 846 regs->gpr[2] = toc; 847 regs->msr = MSR_USER64; 848 } else { 849 regs->nip = start; 850 regs->gpr[2] = 0; 851 regs->msr = MSR_USER32; 852 } 853 #endif 854 855 discard_lazy_cpu_state(); 856 #ifdef CONFIG_VSX 857 current->thread.used_vsr = 0; 858 #endif 859 memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); 860 current->thread.fpscr.val = 0; 861 #ifdef CONFIG_ALTIVEC 862 memset(current->thread.vr, 0, sizeof(current->thread.vr)); 863 memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); 864 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */ 865 current->thread.vrsave = 0; 866 current->thread.used_vr = 0; 867 #endif /* CONFIG_ALTIVEC */ 868 #ifdef CONFIG_SPE 869 memset(current->thread.evr, 0, sizeof(current->thread.evr)); 870 current->thread.acc = 0; 871 current->thread.spefscr = 0; 872 current->thread.used_spe = 0; 873 #endif /* CONFIG_SPE */ 874 } 875 876 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 877 | PR_FP_EXC_RES | PR_FP_EXC_INV) 878 879 int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 880 { 881 struct pt_regs *regs = tsk->thread.regs; 882 883 /* This is a bit hairy. If we are an SPE enabled processor 884 * (have embedded fp) we store the IEEE exception enable flags in 885 * fpexc_mode. fpexc_mode is also used for setting FP exception 886 * mode (asyn, precise, disabled) for 'Classic' FP. */ 887 if (val & PR_FP_EXC_SW_ENABLE) { 888 #ifdef CONFIG_SPE 889 if (cpu_has_feature(CPU_FTR_SPE)) { 890 tsk->thread.fpexc_mode = val & 891 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 892 return 0; 893 } else { 894 return -EINVAL; 895 } 896 #else 897 return -EINVAL; 898 #endif 899 } 900 901 /* on a CONFIG_SPE this does not hurt us. The bits that 902 * __pack_fe01 use do not overlap with bits used for 903 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 904 * on CONFIG_SPE implementations are reserved so writing to 905 * them does not change anything */ 906 if (val > PR_FP_EXC_PRECISE) 907 return -EINVAL; 908 tsk->thread.fpexc_mode = __pack_fe01(val); 909 if (regs != NULL && (regs->msr & MSR_FP) != 0) 910 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 911 | tsk->thread.fpexc_mode; 912 return 0; 913 } 914 915 int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 916 { 917 unsigned int val; 918 919 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 920 #ifdef CONFIG_SPE 921 if (cpu_has_feature(CPU_FTR_SPE)) 922 val = tsk->thread.fpexc_mode; 923 else 924 return -EINVAL; 925 #else 926 return -EINVAL; 927 #endif 928 else 929 val = __unpack_fe01(tsk->thread.fpexc_mode); 930 return put_user(val, (unsigned int __user *) adr); 931 } 932 933 int set_endian(struct task_struct *tsk, unsigned int val) 934 { 935 struct pt_regs *regs = tsk->thread.regs; 936 937 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 938 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 939 return -EINVAL; 940 941 if (regs == NULL) 942 return -EINVAL; 943 944 if (val == PR_ENDIAN_BIG) 945 regs->msr &= ~MSR_LE; 946 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 947 regs->msr |= MSR_LE; 948 else 949 return -EINVAL; 950 951 return 0; 952 } 953 954 int get_endian(struct task_struct *tsk, unsigned long adr) 955 { 956 struct pt_regs *regs = tsk->thread.regs; 957 unsigned int val; 958 959 if (!cpu_has_feature(CPU_FTR_PPC_LE) && 960 !cpu_has_feature(CPU_FTR_REAL_LE)) 961 return -EINVAL; 962 963 if (regs == NULL) 964 return -EINVAL; 965 966 if (regs->msr & MSR_LE) { 967 if (cpu_has_feature(CPU_FTR_REAL_LE)) 968 val = PR_ENDIAN_LITTLE; 969 else 970 val = PR_ENDIAN_PPC_LITTLE; 971 } else 972 val = PR_ENDIAN_BIG; 973 974 return put_user(val, (unsigned int __user *)adr); 975 } 976 977 int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 978 { 979 tsk->thread.align_ctl = val; 980 return 0; 981 } 982 983 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 984 { 985 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 986 } 987 988 #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff)) 989 990 int sys_clone(unsigned long clone_flags, unsigned long usp, 991 int __user *parent_tidp, void __user *child_threadptr, 992 int __user *child_tidp, int p6, 993 struct pt_regs *regs) 994 { 995 CHECK_FULL_REGS(regs); 996 if (usp == 0) 997 usp = regs->gpr[1]; /* stack pointer for child */ 998 #ifdef CONFIG_PPC64 999 if (is_32bit_task()) { 1000 parent_tidp = TRUNC_PTR(parent_tidp); 1001 child_tidp = TRUNC_PTR(child_tidp); 1002 } 1003 #endif 1004 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); 1005 } 1006 1007 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, 1008 unsigned long p4, unsigned long p5, unsigned long p6, 1009 struct pt_regs *regs) 1010 { 1011 CHECK_FULL_REGS(regs); 1012 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); 1013 } 1014 1015 int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, 1016 unsigned long p4, unsigned long p5, unsigned long p6, 1017 struct pt_regs *regs) 1018 { 1019 CHECK_FULL_REGS(regs); 1020 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1], 1021 regs, 0, NULL, NULL); 1022 } 1023 1024 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, 1025 unsigned long a3, unsigned long a4, unsigned long a5, 1026 struct pt_regs *regs) 1027 { 1028 int error; 1029 char *filename; 1030 1031 filename = getname((const char __user *) a0); 1032 error = PTR_ERR(filename); 1033 if (IS_ERR(filename)) 1034 goto out; 1035 flush_fp_to_thread(current); 1036 flush_altivec_to_thread(current); 1037 flush_spe_to_thread(current); 1038 error = do_execve(filename, 1039 (const char __user *const __user *) a1, 1040 (const char __user *const __user *) a2, regs); 1041 putname(filename); 1042 out: 1043 return error; 1044 } 1045 1046 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1047 unsigned long nbytes) 1048 { 1049 unsigned long stack_page; 1050 unsigned long cpu = task_cpu(p); 1051 1052 /* 1053 * Avoid crashing if the stack has overflowed and corrupted 1054 * task_cpu(p), which is in the thread_info struct. 1055 */ 1056 if (cpu < NR_CPUS && cpu_possible(cpu)) { 1057 stack_page = (unsigned long) hardirq_ctx[cpu]; 1058 if (sp >= stack_page + sizeof(struct thread_struct) 1059 && sp <= stack_page + THREAD_SIZE - nbytes) 1060 return 1; 1061 1062 stack_page = (unsigned long) softirq_ctx[cpu]; 1063 if (sp >= stack_page + sizeof(struct thread_struct) 1064 && sp <= stack_page + THREAD_SIZE - nbytes) 1065 return 1; 1066 } 1067 return 0; 1068 } 1069 1070 int validate_sp(unsigned long sp, struct task_struct *p, 1071 unsigned long nbytes) 1072 { 1073 unsigned long stack_page = (unsigned long)task_stack_page(p); 1074 1075 if (sp >= stack_page + sizeof(struct thread_struct) 1076 && sp <= stack_page + THREAD_SIZE - nbytes) 1077 return 1; 1078 1079 return valid_irq_stack(sp, p, nbytes); 1080 } 1081 1082 EXPORT_SYMBOL(validate_sp); 1083 1084 unsigned long get_wchan(struct task_struct *p) 1085 { 1086 unsigned long ip, sp; 1087 int count = 0; 1088 1089 if (!p || p == current || p->state == TASK_RUNNING) 1090 return 0; 1091 1092 sp = p->thread.ksp; 1093 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 1094 return 0; 1095 1096 do { 1097 sp = *(unsigned long *)sp; 1098 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 1099 return 0; 1100 if (count > 0) { 1101 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 1102 if (!in_sched_functions(ip)) 1103 return ip; 1104 } 1105 } while (count++ < 16); 1106 return 0; 1107 } 1108 1109 static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 1110 1111 void show_stack(struct task_struct *tsk, unsigned long *stack) 1112 { 1113 unsigned long sp, ip, lr, newsp; 1114 int count = 0; 1115 int firstframe = 1; 1116 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 1117 int curr_frame = current->curr_ret_stack; 1118 extern void return_to_handler(void); 1119 unsigned long rth = (unsigned long)return_to_handler; 1120 unsigned long mrth = -1; 1121 #ifdef CONFIG_PPC64 1122 extern void mod_return_to_handler(void); 1123 rth = *(unsigned long *)rth; 1124 mrth = (unsigned long)mod_return_to_handler; 1125 mrth = *(unsigned long *)mrth; 1126 #endif 1127 #endif 1128 1129 sp = (unsigned long) stack; 1130 if (tsk == NULL) 1131 tsk = current; 1132 if (sp == 0) { 1133 if (tsk == current) 1134 asm("mr %0,1" : "=r" (sp)); 1135 else 1136 sp = tsk->thread.ksp; 1137 } 1138 1139 lr = 0; 1140 printk("Call Trace:\n"); 1141 do { 1142 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 1143 return; 1144 1145 stack = (unsigned long *) sp; 1146 newsp = stack[0]; 1147 ip = stack[STACK_FRAME_LR_SAVE]; 1148 if (!firstframe || ip != lr) { 1149 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 1150 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 1151 if ((ip == rth || ip == mrth) && curr_frame >= 0) { 1152 printk(" (%pS)", 1153 (void *)current->ret_stack[curr_frame].ret); 1154 curr_frame--; 1155 } 1156 #endif 1157 if (firstframe) 1158 printk(" (unreliable)"); 1159 printk("\n"); 1160 } 1161 firstframe = 0; 1162 1163 /* 1164 * See if this is an exception frame. 1165 * We look for the "regshere" marker in the current frame. 1166 */ 1167 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1168 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 1169 struct pt_regs *regs = (struct pt_regs *) 1170 (sp + STACK_FRAME_OVERHEAD); 1171 lr = regs->link; 1172 printk("--- Exception: %lx at %pS\n LR = %pS\n", 1173 regs->trap, (void *)regs->nip, (void *)lr); 1174 firstframe = 1; 1175 } 1176 1177 sp = newsp; 1178 } while (count++ < kstack_depth_to_print); 1179 } 1180 1181 void dump_stack(void) 1182 { 1183 show_stack(current, NULL); 1184 } 1185 EXPORT_SYMBOL(dump_stack); 1186 1187 #ifdef CONFIG_PPC64 1188 void ppc64_runlatch_on(void) 1189 { 1190 unsigned long ctrl; 1191 1192 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) { 1193 HMT_medium(); 1194 1195 ctrl = mfspr(SPRN_CTRLF); 1196 ctrl |= CTRL_RUNLATCH; 1197 mtspr(SPRN_CTRLT, ctrl); 1198 1199 set_thread_flag(TIF_RUNLATCH); 1200 } 1201 } 1202 1203 void __ppc64_runlatch_off(void) 1204 { 1205 unsigned long ctrl; 1206 1207 HMT_medium(); 1208 1209 clear_thread_flag(TIF_RUNLATCH); 1210 1211 ctrl = mfspr(SPRN_CTRLF); 1212 ctrl &= ~CTRL_RUNLATCH; 1213 mtspr(SPRN_CTRLT, ctrl); 1214 } 1215 #endif 1216 1217 #if THREAD_SHIFT < PAGE_SHIFT 1218 1219 static struct kmem_cache *thread_info_cache; 1220 1221 struct thread_info *alloc_thread_info(struct task_struct *tsk) 1222 { 1223 struct thread_info *ti; 1224 1225 ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); 1226 if (unlikely(ti == NULL)) 1227 return NULL; 1228 #ifdef CONFIG_DEBUG_STACK_USAGE 1229 memset(ti, 0, THREAD_SIZE); 1230 #endif 1231 return ti; 1232 } 1233 1234 void free_thread_info(struct thread_info *ti) 1235 { 1236 kmem_cache_free(thread_info_cache, ti); 1237 } 1238 1239 void thread_info_cache_init(void) 1240 { 1241 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE, 1242 THREAD_SIZE, 0, NULL); 1243 BUG_ON(thread_info_cache == NULL); 1244 } 1245 1246 #endif /* THREAD_SHIFT < PAGE_SHIFT */ 1247 1248 unsigned long arch_align_stack(unsigned long sp) 1249 { 1250 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1251 sp -= get_random_int() & ~PAGE_MASK; 1252 return sp & ~0xf; 1253 } 1254 1255 static inline unsigned long brk_rnd(void) 1256 { 1257 unsigned long rnd = 0; 1258 1259 /* 8MB for 32bit, 1GB for 64bit */ 1260 if (is_32bit_task()) 1261 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT))); 1262 else 1263 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT))); 1264 1265 return rnd << PAGE_SHIFT; 1266 } 1267 1268 unsigned long arch_randomize_brk(struct mm_struct *mm) 1269 { 1270 unsigned long base = mm->brk; 1271 unsigned long ret; 1272 1273 #ifdef CONFIG_PPC_STD_MMU_64 1274 /* 1275 * If we are using 1TB segments and we are allowed to randomise 1276 * the heap, we can put it above 1TB so it is backed by a 1TB 1277 * segment. Otherwise the heap will be in the bottom 1TB 1278 * which always uses 256MB segments and this may result in a 1279 * performance penalty. 1280 */ 1281 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 1282 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 1283 #endif 1284 1285 ret = PAGE_ALIGN(base + brk_rnd()); 1286 1287 if (ret < mm->brk) 1288 return mm->brk; 1289 1290 return ret; 1291 } 1292 1293 unsigned long randomize_et_dyn(unsigned long base) 1294 { 1295 unsigned long ret = PAGE_ALIGN(base + brk_rnd()); 1296 1297 if (ret < base) 1298 return base; 1299 1300 return ret; 1301 } 1302