1 /* 2 * Derived from "arch/i386/kernel/process.c" 3 * Copyright (C) 1995 Linus Torvalds 4 * 5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 6 * Paul Mackerras (paulus@cs.anu.edu.au) 7 * 8 * PowerPC version 9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * as published by the Free Software Foundation; either version 14 * 2 of the License, or (at your option) any later version. 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/smp.h> 22 #include <linux/stddef.h> 23 #include <linux/unistd.h> 24 #include <linux/ptrace.h> 25 #include <linux/slab.h> 26 #include <linux/user.h> 27 #include <linux/elf.h> 28 #include <linux/init.h> 29 #include <linux/prctl.h> 30 #include <linux/init_task.h> 31 #include <linux/export.h> 32 #include <linux/kallsyms.h> 33 #include <linux/mqueue.h> 34 #include <linux/hardirq.h> 35 #include <linux/utsname.h> 36 #include <linux/ftrace.h> 37 #include <linux/kernel_stat.h> 38 #include <linux/personality.h> 39 #include <linux/random.h> 40 #include <linux/hw_breakpoint.h> 41 42 #include <asm/pgtable.h> 43 #include <asm/uaccess.h> 44 #include <asm/system.h> 45 #include <asm/io.h> 46 #include <asm/processor.h> 47 #include <asm/mmu.h> 48 #include <asm/prom.h> 49 #include <asm/machdep.h> 50 #include <asm/time.h> 51 #include <asm/syscalls.h> 52 #ifdef CONFIG_PPC64 53 #include <asm/firmware.h> 54 #endif 55 #include <linux/kprobes.h> 56 #include <linux/kdebug.h> 57 58 extern unsigned long _get_SP(void); 59 60 #ifndef CONFIG_SMP 61 struct task_struct *last_task_used_math = NULL; 62 struct task_struct *last_task_used_altivec = NULL; 63 struct task_struct *last_task_used_vsx = NULL; 64 struct task_struct *last_task_used_spe = NULL; 65 #endif 66 67 /* 68 * Make sure the floating-point register state in the 69 * the thread_struct is up to date for task tsk. 70 */ 71 void flush_fp_to_thread(struct task_struct *tsk) 72 { 73 if (tsk->thread.regs) { 74 /* 75 * We need to disable preemption here because if we didn't, 76 * another process could get scheduled after the regs->msr 77 * test but before we have finished saving the FP registers 78 * to the thread_struct. That process could take over the 79 * FPU, and then when we get scheduled again we would store 80 * bogus values for the remaining FP registers. 81 */ 82 preempt_disable(); 83 if (tsk->thread.regs->msr & MSR_FP) { 84 #ifdef CONFIG_SMP 85 /* 86 * This should only ever be called for current or 87 * for a stopped child process. Since we save away 88 * the FP register state on context switch on SMP, 89 * there is something wrong if a stopped child appears 90 * to still have its FP state in the CPU registers. 91 */ 92 BUG_ON(tsk != current); 93 #endif 94 giveup_fpu(tsk); 95 } 96 preempt_enable(); 97 } 98 } 99 EXPORT_SYMBOL_GPL(flush_fp_to_thread); 100 101 void enable_kernel_fp(void) 102 { 103 WARN_ON(preemptible()); 104 105 #ifdef CONFIG_SMP 106 if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) 107 giveup_fpu(current); 108 else 109 giveup_fpu(NULL); /* just enables FP for kernel */ 110 #else 111 giveup_fpu(last_task_used_math); 112 #endif /* CONFIG_SMP */ 113 } 114 EXPORT_SYMBOL(enable_kernel_fp); 115 116 #ifdef CONFIG_ALTIVEC 117 void enable_kernel_altivec(void) 118 { 119 WARN_ON(preemptible()); 120 121 #ifdef CONFIG_SMP 122 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) 123 giveup_altivec(current); 124 else 125 giveup_altivec(NULL); /* just enable AltiVec for kernel - force */ 126 #else 127 giveup_altivec(last_task_used_altivec); 128 #endif /* CONFIG_SMP */ 129 } 130 EXPORT_SYMBOL(enable_kernel_altivec); 131 132 /* 133 * Make sure the VMX/Altivec register state in the 134 * the thread_struct is up to date for task tsk. 135 */ 136 void flush_altivec_to_thread(struct task_struct *tsk) 137 { 138 if (tsk->thread.regs) { 139 preempt_disable(); 140 if (tsk->thread.regs->msr & MSR_VEC) { 141 #ifdef CONFIG_SMP 142 BUG_ON(tsk != current); 143 #endif 144 giveup_altivec(tsk); 145 } 146 preempt_enable(); 147 } 148 } 149 EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 150 #endif /* CONFIG_ALTIVEC */ 151 152 #ifdef CONFIG_VSX 153 #if 0 154 /* not currently used, but some crazy RAID module might want to later */ 155 void enable_kernel_vsx(void) 156 { 157 WARN_ON(preemptible()); 158 159 #ifdef CONFIG_SMP 160 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) 161 giveup_vsx(current); 162 else 163 giveup_vsx(NULL); /* just enable vsx for kernel - force */ 164 #else 165 giveup_vsx(last_task_used_vsx); 166 #endif /* CONFIG_SMP */ 167 } 168 EXPORT_SYMBOL(enable_kernel_vsx); 169 #endif 170 171 void giveup_vsx(struct task_struct *tsk) 172 { 173 giveup_fpu(tsk); 174 giveup_altivec(tsk); 175 __giveup_vsx(tsk); 176 } 177 178 void flush_vsx_to_thread(struct task_struct *tsk) 179 { 180 if (tsk->thread.regs) { 181 preempt_disable(); 182 if (tsk->thread.regs->msr & MSR_VSX) { 183 #ifdef CONFIG_SMP 184 BUG_ON(tsk != current); 185 #endif 186 giveup_vsx(tsk); 187 } 188 preempt_enable(); 189 } 190 } 191 EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 192 #endif /* CONFIG_VSX */ 193 194 #ifdef CONFIG_SPE 195 196 void enable_kernel_spe(void) 197 { 198 WARN_ON(preemptible()); 199 200 #ifdef CONFIG_SMP 201 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) 202 giveup_spe(current); 203 else 204 giveup_spe(NULL); /* just enable SPE for kernel - force */ 205 #else 206 giveup_spe(last_task_used_spe); 207 #endif /* __SMP __ */ 208 } 209 EXPORT_SYMBOL(enable_kernel_spe); 210 211 void flush_spe_to_thread(struct task_struct *tsk) 212 { 213 if (tsk->thread.regs) { 214 preempt_disable(); 215 if (tsk->thread.regs->msr & MSR_SPE) { 216 #ifdef CONFIG_SMP 217 BUG_ON(tsk != current); 218 #endif 219 tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 220 giveup_spe(tsk); 221 } 222 preempt_enable(); 223 } 224 } 225 #endif /* CONFIG_SPE */ 226 227 #ifndef CONFIG_SMP 228 /* 229 * If we are doing lazy switching of CPU state (FP, altivec or SPE), 230 * and the current task has some state, discard it. 231 */ 232 void discard_lazy_cpu_state(void) 233 { 234 preempt_disable(); 235 if (last_task_used_math == current) 236 last_task_used_math = NULL; 237 #ifdef CONFIG_ALTIVEC 238 if (last_task_used_altivec == current) 239 last_task_used_altivec = NULL; 240 #endif /* CONFIG_ALTIVEC */ 241 #ifdef CONFIG_VSX 242 if (last_task_used_vsx == current) 243 last_task_used_vsx = NULL; 244 #endif /* CONFIG_VSX */ 245 #ifdef CONFIG_SPE 246 if (last_task_used_spe == current) 247 last_task_used_spe = NULL; 248 #endif 249 preempt_enable(); 250 } 251 #endif /* CONFIG_SMP */ 252 253 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 254 void do_send_trap(struct pt_regs *regs, unsigned long address, 255 unsigned long error_code, int signal_code, int breakpt) 256 { 257 siginfo_t info; 258 259 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 260 11, SIGSEGV) == NOTIFY_STOP) 261 return; 262 263 /* Deliver the signal to userspace */ 264 info.si_signo = SIGTRAP; 265 info.si_errno = breakpt; /* breakpoint or watchpoint id */ 266 info.si_code = signal_code; 267 info.si_addr = (void __user *)address; 268 force_sig_info(SIGTRAP, &info, current); 269 } 270 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 271 void do_dabr(struct pt_regs *regs, unsigned long address, 272 unsigned long error_code) 273 { 274 siginfo_t info; 275 276 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 277 11, SIGSEGV) == NOTIFY_STOP) 278 return; 279 280 if (debugger_dabr_match(regs)) 281 return; 282 283 /* Clear the DABR */ 284 set_dabr(0); 285 286 /* Deliver the signal to userspace */ 287 info.si_signo = SIGTRAP; 288 info.si_errno = 0; 289 info.si_code = TRAP_HWBKPT; 290 info.si_addr = (void __user *)address; 291 force_sig_info(SIGTRAP, &info, current); 292 } 293 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 294 295 static DEFINE_PER_CPU(unsigned long, current_dabr); 296 297 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 298 /* 299 * Set the debug registers back to their default "safe" values. 300 */ 301 static void set_debug_reg_defaults(struct thread_struct *thread) 302 { 303 thread->iac1 = thread->iac2 = 0; 304 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 305 thread->iac3 = thread->iac4 = 0; 306 #endif 307 thread->dac1 = thread->dac2 = 0; 308 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 309 thread->dvc1 = thread->dvc2 = 0; 310 #endif 311 thread->dbcr0 = 0; 312 #ifdef CONFIG_BOOKE 313 /* 314 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 315 */ 316 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \ 317 DBCR1_IAC3US | DBCR1_IAC4US; 318 /* 319 * Force Data Address Compare User/Supervisor bits to be User-only 320 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 321 */ 322 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 323 #else 324 thread->dbcr1 = 0; 325 #endif 326 } 327 328 static void prime_debug_regs(struct thread_struct *thread) 329 { 330 mtspr(SPRN_IAC1, thread->iac1); 331 mtspr(SPRN_IAC2, thread->iac2); 332 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 333 mtspr(SPRN_IAC3, thread->iac3); 334 mtspr(SPRN_IAC4, thread->iac4); 335 #endif 336 mtspr(SPRN_DAC1, thread->dac1); 337 mtspr(SPRN_DAC2, thread->dac2); 338 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 339 mtspr(SPRN_DVC1, thread->dvc1); 340 mtspr(SPRN_DVC2, thread->dvc2); 341 #endif 342 mtspr(SPRN_DBCR0, thread->dbcr0); 343 mtspr(SPRN_DBCR1, thread->dbcr1); 344 #ifdef CONFIG_BOOKE 345 mtspr(SPRN_DBCR2, thread->dbcr2); 346 #endif 347 } 348 /* 349 * Unless neither the old or new thread are making use of the 350 * debug registers, set the debug registers from the values 351 * stored in the new thread. 352 */ 353 static void switch_booke_debug_regs(struct thread_struct *new_thread) 354 { 355 if ((current->thread.dbcr0 & DBCR0_IDM) 356 || (new_thread->dbcr0 & DBCR0_IDM)) 357 prime_debug_regs(new_thread); 358 } 359 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 360 #ifndef CONFIG_HAVE_HW_BREAKPOINT 361 static void set_debug_reg_defaults(struct thread_struct *thread) 362 { 363 if (thread->dabr) { 364 thread->dabr = 0; 365 set_dabr(0); 366 } 367 } 368 #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 369 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 370 371 int set_dabr(unsigned long dabr) 372 { 373 __get_cpu_var(current_dabr) = dabr; 374 375 if (ppc_md.set_dabr) 376 return ppc_md.set_dabr(dabr); 377 378 /* XXX should we have a CPU_FTR_HAS_DABR ? */ 379 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 380 mtspr(SPRN_DAC1, dabr); 381 #ifdef CONFIG_PPC_47x 382 isync(); 383 #endif 384 #elif defined(CONFIG_PPC_BOOK3S) 385 mtspr(SPRN_DABR, dabr); 386 #endif 387 388 389 return 0; 390 } 391 392 #ifdef CONFIG_PPC64 393 DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 394 #endif 395 396 struct task_struct *__switch_to(struct task_struct *prev, 397 struct task_struct *new) 398 { 399 struct thread_struct *new_thread, *old_thread; 400 unsigned long flags; 401 struct task_struct *last; 402 #ifdef CONFIG_PPC_BOOK3S_64 403 struct ppc64_tlb_batch *batch; 404 #endif 405 406 #ifdef CONFIG_SMP 407 /* avoid complexity of lazy save/restore of fpu 408 * by just saving it every time we switch out if 409 * this task used the fpu during the last quantum. 410 * 411 * If it tries to use the fpu again, it'll trap and 412 * reload its fp regs. So we don't have to do a restore 413 * every switch, just a save. 414 * -- Cort 415 */ 416 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP)) 417 giveup_fpu(prev); 418 #ifdef CONFIG_ALTIVEC 419 /* 420 * If the previous thread used altivec in the last quantum 421 * (thus changing altivec regs) then save them. 422 * We used to check the VRSAVE register but not all apps 423 * set it, so we don't rely on it now (and in fact we need 424 * to save & restore VSCR even if VRSAVE == 0). -- paulus 425 * 426 * On SMP we always save/restore altivec regs just to avoid the 427 * complexity of changing processors. 428 * -- Cort 429 */ 430 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) 431 giveup_altivec(prev); 432 #endif /* CONFIG_ALTIVEC */ 433 #ifdef CONFIG_VSX 434 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX)) 435 /* VMX and FPU registers are already save here */ 436 __giveup_vsx(prev); 437 #endif /* CONFIG_VSX */ 438 #ifdef CONFIG_SPE 439 /* 440 * If the previous thread used spe in the last quantum 441 * (thus changing spe regs) then save them. 442 * 443 * On SMP we always save/restore spe regs just to avoid the 444 * complexity of changing processors. 445 */ 446 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE))) 447 giveup_spe(prev); 448 #endif /* CONFIG_SPE */ 449 450 #else /* CONFIG_SMP */ 451 #ifdef CONFIG_ALTIVEC 452 /* Avoid the trap. On smp this this never happens since 453 * we don't set last_task_used_altivec -- Cort 454 */ 455 if (new->thread.regs && last_task_used_altivec == new) 456 new->thread.regs->msr |= MSR_VEC; 457 #endif /* CONFIG_ALTIVEC */ 458 #ifdef CONFIG_VSX 459 if (new->thread.regs && last_task_used_vsx == new) 460 new->thread.regs->msr |= MSR_VSX; 461 #endif /* CONFIG_VSX */ 462 #ifdef CONFIG_SPE 463 /* Avoid the trap. On smp this this never happens since 464 * we don't set last_task_used_spe 465 */ 466 if (new->thread.regs && last_task_used_spe == new) 467 new->thread.regs->msr |= MSR_SPE; 468 #endif /* CONFIG_SPE */ 469 470 #endif /* CONFIG_SMP */ 471 472 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 473 switch_booke_debug_regs(&new->thread); 474 #else 475 /* 476 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 477 * schedule DABR 478 */ 479 #ifndef CONFIG_HAVE_HW_BREAKPOINT 480 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) 481 set_dabr(new->thread.dabr); 482 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 483 #endif 484 485 486 new_thread = &new->thread; 487 old_thread = ¤t->thread; 488 489 #ifdef CONFIG_PPC64 490 /* 491 * Collect processor utilization data per process 492 */ 493 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 494 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); 495 long unsigned start_tb, current_tb; 496 start_tb = old_thread->start_tb; 497 cu->current_tb = current_tb = mfspr(SPRN_PURR); 498 old_thread->accum_tb += (current_tb - start_tb); 499 new_thread->start_tb = current_tb; 500 } 501 #endif /* CONFIG_PPC64 */ 502 503 #ifdef CONFIG_PPC_BOOK3S_64 504 batch = &__get_cpu_var(ppc64_tlb_batch); 505 if (batch->active) { 506 current_thread_info()->local_flags |= _TLF_LAZY_MMU; 507 if (batch->index) 508 __flush_tlb_pending(batch); 509 batch->active = 0; 510 } 511 #endif /* CONFIG_PPC_BOOK3S_64 */ 512 513 local_irq_save(flags); 514 515 account_system_vtime(current); 516 account_process_vtime(current); 517 518 /* 519 * We can't take a PMU exception inside _switch() since there is a 520 * window where the kernel stack SLB and the kernel stack are out 521 * of sync. Hard disable here. 522 */ 523 hard_irq_disable(); 524 last = _switch(old_thread, new_thread); 525 526 #ifdef CONFIG_PPC_BOOK3S_64 527 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 528 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 529 batch = &__get_cpu_var(ppc64_tlb_batch); 530 batch->active = 1; 531 } 532 #endif /* CONFIG_PPC_BOOK3S_64 */ 533 534 local_irq_restore(flags); 535 536 return last; 537 } 538 539 static int instructions_to_print = 16; 540 541 static void show_instructions(struct pt_regs *regs) 542 { 543 int i; 544 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 545 sizeof(int)); 546 547 printk("Instruction dump:"); 548 549 for (i = 0; i < instructions_to_print; i++) { 550 int instr; 551 552 if (!(i % 8)) 553 printk("\n"); 554 555 #if !defined(CONFIG_BOOKE) 556 /* If executing with the IMMU off, adjust pc rather 557 * than print XXXXXXXX. 558 */ 559 if (!(regs->msr & MSR_IR)) 560 pc = (unsigned long)phys_to_virt(pc); 561 #endif 562 563 /* We use __get_user here *only* to avoid an OOPS on a 564 * bad address because the pc *should* only be a 565 * kernel address. 566 */ 567 if (!__kernel_text_address(pc) || 568 __get_user(instr, (unsigned int __user *)pc)) { 569 printk("XXXXXXXX "); 570 } else { 571 if (regs->nip == pc) 572 printk("<%08x> ", instr); 573 else 574 printk("%08x ", instr); 575 } 576 577 pc += sizeof(int); 578 } 579 580 printk("\n"); 581 } 582 583 static struct regbit { 584 unsigned long bit; 585 const char *name; 586 } msr_bits[] = { 587 {MSR_EE, "EE"}, 588 {MSR_PR, "PR"}, 589 {MSR_FP, "FP"}, 590 {MSR_VEC, "VEC"}, 591 {MSR_VSX, "VSX"}, 592 {MSR_ME, "ME"}, 593 {MSR_CE, "CE"}, 594 {MSR_DE, "DE"}, 595 {MSR_IR, "IR"}, 596 {MSR_DR, "DR"}, 597 {0, NULL} 598 }; 599 600 static void printbits(unsigned long val, struct regbit *bits) 601 { 602 const char *sep = ""; 603 604 printk("<"); 605 for (; bits->bit; ++bits) 606 if (val & bits->bit) { 607 printk("%s%s", sep, bits->name); 608 sep = ","; 609 } 610 printk(">"); 611 } 612 613 #ifdef CONFIG_PPC64 614 #define REG "%016lx" 615 #define REGS_PER_LINE 4 616 #define LAST_VOLATILE 13 617 #else 618 #define REG "%08lx" 619 #define REGS_PER_LINE 8 620 #define LAST_VOLATILE 12 621 #endif 622 623 void show_regs(struct pt_regs * regs) 624 { 625 int i, trap; 626 627 printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 628 regs->nip, regs->link, regs->ctr); 629 printk("REGS: %p TRAP: %04lx %s (%s)\n", 630 regs, regs->trap, print_tainted(), init_utsname()->release); 631 printk("MSR: "REG" ", regs->msr); 632 printbits(regs->msr, msr_bits); 633 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 634 trap = TRAP(regs); 635 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 636 printk("CFAR: "REG"\n", regs->orig_gpr3); 637 if (trap == 0x300 || trap == 0x600) 638 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 639 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 640 #else 641 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr); 642 #endif 643 printk("TASK = %p[%d] '%s' THREAD: %p", 644 current, task_pid_nr(current), current->comm, task_thread_info(current)); 645 646 #ifdef CONFIG_SMP 647 printk(" CPU: %d", raw_smp_processor_id()); 648 #endif /* CONFIG_SMP */ 649 650 for (i = 0; i < 32; i++) { 651 if ((i % REGS_PER_LINE) == 0) 652 printk("\nGPR%02d: ", i); 653 printk(REG " ", regs->gpr[i]); 654 if (i == LAST_VOLATILE && !FULL_REGS(regs)) 655 break; 656 } 657 printk("\n"); 658 #ifdef CONFIG_KALLSYMS 659 /* 660 * Lookup NIP late so we have the best change of getting the 661 * above info out without failing 662 */ 663 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 664 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 665 #endif 666 show_stack(current, (unsigned long *) regs->gpr[1]); 667 if (!user_mode(regs)) 668 show_instructions(regs); 669 } 670 671 void exit_thread(void) 672 { 673 discard_lazy_cpu_state(); 674 } 675 676 void flush_thread(void) 677 { 678 discard_lazy_cpu_state(); 679 680 #ifdef CONFIG_HAVE_HW_BREAKPOINT 681 flush_ptrace_hw_breakpoint(current); 682 #else /* CONFIG_HAVE_HW_BREAKPOINT */ 683 set_debug_reg_defaults(¤t->thread); 684 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 685 } 686 687 void 688 release_thread(struct task_struct *t) 689 { 690 } 691 692 /* 693 * This gets called before we allocate a new thread and copy 694 * the current task into it. 695 */ 696 void prepare_to_copy(struct task_struct *tsk) 697 { 698 flush_fp_to_thread(current); 699 flush_altivec_to_thread(current); 700 flush_vsx_to_thread(current); 701 flush_spe_to_thread(current); 702 #ifdef CONFIG_HAVE_HW_BREAKPOINT 703 flush_ptrace_hw_breakpoint(tsk); 704 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 705 } 706 707 /* 708 * Copy a thread.. 709 */ 710 extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */ 711 712 int copy_thread(unsigned long clone_flags, unsigned long usp, 713 unsigned long unused, struct task_struct *p, 714 struct pt_regs *regs) 715 { 716 struct pt_regs *childregs, *kregs; 717 extern void ret_from_fork(void); 718 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 719 720 CHECK_FULL_REGS(regs); 721 /* Copy registers */ 722 sp -= sizeof(struct pt_regs); 723 childregs = (struct pt_regs *) sp; 724 *childregs = *regs; 725 if ((childregs->msr & MSR_PR) == 0) { 726 /* for kernel thread, set `current' and stackptr in new task */ 727 childregs->gpr[1] = sp + sizeof(struct pt_regs); 728 #ifdef CONFIG_PPC32 729 childregs->gpr[2] = (unsigned long) p; 730 #else 731 clear_tsk_thread_flag(p, TIF_32BIT); 732 #endif 733 p->thread.regs = NULL; /* no user register state */ 734 } else { 735 childregs->gpr[1] = usp; 736 p->thread.regs = childregs; 737 if (clone_flags & CLONE_SETTLS) { 738 #ifdef CONFIG_PPC64 739 if (!is_32bit_task()) 740 childregs->gpr[13] = childregs->gpr[6]; 741 else 742 #endif 743 childregs->gpr[2] = childregs->gpr[6]; 744 } 745 } 746 childregs->gpr[3] = 0; /* Result from fork() */ 747 sp -= STACK_FRAME_OVERHEAD; 748 749 /* 750 * The way this works is that at some point in the future 751 * some task will call _switch to switch to the new task. 752 * That will pop off the stack frame created below and start 753 * the new task running at ret_from_fork. The new task will 754 * do some house keeping and then return from the fork or clone 755 * system call, using the stack frame created above. 756 */ 757 sp -= sizeof(struct pt_regs); 758 kregs = (struct pt_regs *) sp; 759 sp -= STACK_FRAME_OVERHEAD; 760 p->thread.ksp = sp; 761 p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 762 _ALIGN_UP(sizeof(struct thread_info), 16); 763 764 #ifdef CONFIG_PPC_STD_MMU_64 765 if (mmu_has_feature(MMU_FTR_SLB)) { 766 unsigned long sp_vsid; 767 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 768 769 if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 770 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 771 << SLB_VSID_SHIFT_1T; 772 else 773 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 774 << SLB_VSID_SHIFT; 775 sp_vsid |= SLB_VSID_KERNEL | llp; 776 p->thread.ksp_vsid = sp_vsid; 777 } 778 #endif /* CONFIG_PPC_STD_MMU_64 */ 779 #ifdef CONFIG_PPC64 780 if (cpu_has_feature(CPU_FTR_DSCR)) { 781 if (current->thread.dscr_inherit) { 782 p->thread.dscr_inherit = 1; 783 p->thread.dscr = current->thread.dscr; 784 } else if (0 != dscr_default) { 785 p->thread.dscr_inherit = 1; 786 p->thread.dscr = dscr_default; 787 } else { 788 p->thread.dscr_inherit = 0; 789 p->thread.dscr = 0; 790 } 791 } 792 #endif 793 794 /* 795 * The PPC64 ABI makes use of a TOC to contain function 796 * pointers. The function (ret_from_except) is actually a pointer 797 * to the TOC entry. The first entry is a pointer to the actual 798 * function. 799 */ 800 #ifdef CONFIG_PPC64 801 kregs->nip = *((unsigned long *)ret_from_fork); 802 #else 803 kregs->nip = (unsigned long)ret_from_fork; 804 #endif 805 806 return 0; 807 } 808 809 /* 810 * Set up a thread for executing a new program 811 */ 812 void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 813 { 814 #ifdef CONFIG_PPC64 815 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 816 #endif 817 818 /* 819 * If we exec out of a kernel thread then thread.regs will not be 820 * set. Do it now. 821 */ 822 if (!current->thread.regs) { 823 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 824 current->thread.regs = regs - 1; 825 } 826 827 memset(regs->gpr, 0, sizeof(regs->gpr)); 828 regs->ctr = 0; 829 regs->link = 0; 830 regs->xer = 0; 831 regs->ccr = 0; 832 regs->gpr[1] = sp; 833 834 /* 835 * We have just cleared all the nonvolatile GPRs, so make 836 * FULL_REGS(regs) return true. This is necessary to allow 837 * ptrace to examine the thread immediately after exec. 838 */ 839 regs->trap &= ~1UL; 840 841 #ifdef CONFIG_PPC32 842 regs->mq = 0; 843 regs->nip = start; 844 regs->msr = MSR_USER; 845 #else 846 if (!is_32bit_task()) { 847 unsigned long entry, toc; 848 849 /* start is a relocated pointer to the function descriptor for 850 * the elf _start routine. The first entry in the function 851 * descriptor is the entry address of _start and the second 852 * entry is the TOC value we need to use. 853 */ 854 __get_user(entry, (unsigned long __user *)start); 855 __get_user(toc, (unsigned long __user *)start+1); 856 857 /* Check whether the e_entry function descriptor entries 858 * need to be relocated before we can use them. 859 */ 860 if (load_addr != 0) { 861 entry += load_addr; 862 toc += load_addr; 863 } 864 regs->nip = entry; 865 regs->gpr[2] = toc; 866 regs->msr = MSR_USER64; 867 } else { 868 regs->nip = start; 869 regs->gpr[2] = 0; 870 regs->msr = MSR_USER32; 871 } 872 #endif 873 874 discard_lazy_cpu_state(); 875 #ifdef CONFIG_VSX 876 current->thread.used_vsr = 0; 877 #endif 878 memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); 879 current->thread.fpscr.val = 0; 880 #ifdef CONFIG_ALTIVEC 881 memset(current->thread.vr, 0, sizeof(current->thread.vr)); 882 memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); 883 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */ 884 current->thread.vrsave = 0; 885 current->thread.used_vr = 0; 886 #endif /* CONFIG_ALTIVEC */ 887 #ifdef CONFIG_SPE 888 memset(current->thread.evr, 0, sizeof(current->thread.evr)); 889 current->thread.acc = 0; 890 current->thread.spefscr = 0; 891 current->thread.used_spe = 0; 892 #endif /* CONFIG_SPE */ 893 } 894 895 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 896 | PR_FP_EXC_RES | PR_FP_EXC_INV) 897 898 int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 899 { 900 struct pt_regs *regs = tsk->thread.regs; 901 902 /* This is a bit hairy. If we are an SPE enabled processor 903 * (have embedded fp) we store the IEEE exception enable flags in 904 * fpexc_mode. fpexc_mode is also used for setting FP exception 905 * mode (asyn, precise, disabled) for 'Classic' FP. */ 906 if (val & PR_FP_EXC_SW_ENABLE) { 907 #ifdef CONFIG_SPE 908 if (cpu_has_feature(CPU_FTR_SPE)) { 909 tsk->thread.fpexc_mode = val & 910 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 911 return 0; 912 } else { 913 return -EINVAL; 914 } 915 #else 916 return -EINVAL; 917 #endif 918 } 919 920 /* on a CONFIG_SPE this does not hurt us. The bits that 921 * __pack_fe01 use do not overlap with bits used for 922 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 923 * on CONFIG_SPE implementations are reserved so writing to 924 * them does not change anything */ 925 if (val > PR_FP_EXC_PRECISE) 926 return -EINVAL; 927 tsk->thread.fpexc_mode = __pack_fe01(val); 928 if (regs != NULL && (regs->msr & MSR_FP) != 0) 929 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 930 | tsk->thread.fpexc_mode; 931 return 0; 932 } 933 934 int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 935 { 936 unsigned int val; 937 938 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 939 #ifdef CONFIG_SPE 940 if (cpu_has_feature(CPU_FTR_SPE)) 941 val = tsk->thread.fpexc_mode; 942 else 943 return -EINVAL; 944 #else 945 return -EINVAL; 946 #endif 947 else 948 val = __unpack_fe01(tsk->thread.fpexc_mode); 949 return put_user(val, (unsigned int __user *) adr); 950 } 951 952 int set_endian(struct task_struct *tsk, unsigned int val) 953 { 954 struct pt_regs *regs = tsk->thread.regs; 955 956 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 957 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 958 return -EINVAL; 959 960 if (regs == NULL) 961 return -EINVAL; 962 963 if (val == PR_ENDIAN_BIG) 964 regs->msr &= ~MSR_LE; 965 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 966 regs->msr |= MSR_LE; 967 else 968 return -EINVAL; 969 970 return 0; 971 } 972 973 int get_endian(struct task_struct *tsk, unsigned long adr) 974 { 975 struct pt_regs *regs = tsk->thread.regs; 976 unsigned int val; 977 978 if (!cpu_has_feature(CPU_FTR_PPC_LE) && 979 !cpu_has_feature(CPU_FTR_REAL_LE)) 980 return -EINVAL; 981 982 if (regs == NULL) 983 return -EINVAL; 984 985 if (regs->msr & MSR_LE) { 986 if (cpu_has_feature(CPU_FTR_REAL_LE)) 987 val = PR_ENDIAN_LITTLE; 988 else 989 val = PR_ENDIAN_PPC_LITTLE; 990 } else 991 val = PR_ENDIAN_BIG; 992 993 return put_user(val, (unsigned int __user *)adr); 994 } 995 996 int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 997 { 998 tsk->thread.align_ctl = val; 999 return 0; 1000 } 1001 1002 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1003 { 1004 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1005 } 1006 1007 #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff)) 1008 1009 int sys_clone(unsigned long clone_flags, unsigned long usp, 1010 int __user *parent_tidp, void __user *child_threadptr, 1011 int __user *child_tidp, int p6, 1012 struct pt_regs *regs) 1013 { 1014 CHECK_FULL_REGS(regs); 1015 if (usp == 0) 1016 usp = regs->gpr[1]; /* stack pointer for child */ 1017 #ifdef CONFIG_PPC64 1018 if (is_32bit_task()) { 1019 parent_tidp = TRUNC_PTR(parent_tidp); 1020 child_tidp = TRUNC_PTR(child_tidp); 1021 } 1022 #endif 1023 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); 1024 } 1025 1026 int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, 1027 unsigned long p4, unsigned long p5, unsigned long p6, 1028 struct pt_regs *regs) 1029 { 1030 CHECK_FULL_REGS(regs); 1031 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); 1032 } 1033 1034 int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, 1035 unsigned long p4, unsigned long p5, unsigned long p6, 1036 struct pt_regs *regs) 1037 { 1038 CHECK_FULL_REGS(regs); 1039 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1], 1040 regs, 0, NULL, NULL); 1041 } 1042 1043 int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, 1044 unsigned long a3, unsigned long a4, unsigned long a5, 1045 struct pt_regs *regs) 1046 { 1047 int error; 1048 char *filename; 1049 1050 filename = getname((const char __user *) a0); 1051 error = PTR_ERR(filename); 1052 if (IS_ERR(filename)) 1053 goto out; 1054 flush_fp_to_thread(current); 1055 flush_altivec_to_thread(current); 1056 flush_spe_to_thread(current); 1057 error = do_execve(filename, 1058 (const char __user *const __user *) a1, 1059 (const char __user *const __user *) a2, regs); 1060 putname(filename); 1061 out: 1062 return error; 1063 } 1064 1065 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1066 unsigned long nbytes) 1067 { 1068 unsigned long stack_page; 1069 unsigned long cpu = task_cpu(p); 1070 1071 /* 1072 * Avoid crashing if the stack has overflowed and corrupted 1073 * task_cpu(p), which is in the thread_info struct. 1074 */ 1075 if (cpu < NR_CPUS && cpu_possible(cpu)) { 1076 stack_page = (unsigned long) hardirq_ctx[cpu]; 1077 if (sp >= stack_page + sizeof(struct thread_struct) 1078 && sp <= stack_page + THREAD_SIZE - nbytes) 1079 return 1; 1080 1081 stack_page = (unsigned long) softirq_ctx[cpu]; 1082 if (sp >= stack_page + sizeof(struct thread_struct) 1083 && sp <= stack_page + THREAD_SIZE - nbytes) 1084 return 1; 1085 } 1086 return 0; 1087 } 1088 1089 int validate_sp(unsigned long sp, struct task_struct *p, 1090 unsigned long nbytes) 1091 { 1092 unsigned long stack_page = (unsigned long)task_stack_page(p); 1093 1094 if (sp >= stack_page + sizeof(struct thread_struct) 1095 && sp <= stack_page + THREAD_SIZE - nbytes) 1096 return 1; 1097 1098 return valid_irq_stack(sp, p, nbytes); 1099 } 1100 1101 EXPORT_SYMBOL(validate_sp); 1102 1103 unsigned long get_wchan(struct task_struct *p) 1104 { 1105 unsigned long ip, sp; 1106 int count = 0; 1107 1108 if (!p || p == current || p->state == TASK_RUNNING) 1109 return 0; 1110 1111 sp = p->thread.ksp; 1112 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 1113 return 0; 1114 1115 do { 1116 sp = *(unsigned long *)sp; 1117 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 1118 return 0; 1119 if (count > 0) { 1120 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 1121 if (!in_sched_functions(ip)) 1122 return ip; 1123 } 1124 } while (count++ < 16); 1125 return 0; 1126 } 1127 1128 static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 1129 1130 void show_stack(struct task_struct *tsk, unsigned long *stack) 1131 { 1132 unsigned long sp, ip, lr, newsp; 1133 int count = 0; 1134 int firstframe = 1; 1135 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 1136 int curr_frame = current->curr_ret_stack; 1137 extern void return_to_handler(void); 1138 unsigned long rth = (unsigned long)return_to_handler; 1139 unsigned long mrth = -1; 1140 #ifdef CONFIG_PPC64 1141 extern void mod_return_to_handler(void); 1142 rth = *(unsigned long *)rth; 1143 mrth = (unsigned long)mod_return_to_handler; 1144 mrth = *(unsigned long *)mrth; 1145 #endif 1146 #endif 1147 1148 sp = (unsigned long) stack; 1149 if (tsk == NULL) 1150 tsk = current; 1151 if (sp == 0) { 1152 if (tsk == current) 1153 asm("mr %0,1" : "=r" (sp)); 1154 else 1155 sp = tsk->thread.ksp; 1156 } 1157 1158 lr = 0; 1159 printk("Call Trace:\n"); 1160 do { 1161 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 1162 return; 1163 1164 stack = (unsigned long *) sp; 1165 newsp = stack[0]; 1166 ip = stack[STACK_FRAME_LR_SAVE]; 1167 if (!firstframe || ip != lr) { 1168 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 1169 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 1170 if ((ip == rth || ip == mrth) && curr_frame >= 0) { 1171 printk(" (%pS)", 1172 (void *)current->ret_stack[curr_frame].ret); 1173 curr_frame--; 1174 } 1175 #endif 1176 if (firstframe) 1177 printk(" (unreliable)"); 1178 printk("\n"); 1179 } 1180 firstframe = 0; 1181 1182 /* 1183 * See if this is an exception frame. 1184 * We look for the "regshere" marker in the current frame. 1185 */ 1186 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1187 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 1188 struct pt_regs *regs = (struct pt_regs *) 1189 (sp + STACK_FRAME_OVERHEAD); 1190 lr = regs->link; 1191 printk("--- Exception: %lx at %pS\n LR = %pS\n", 1192 regs->trap, (void *)regs->nip, (void *)lr); 1193 firstframe = 1; 1194 } 1195 1196 sp = newsp; 1197 } while (count++ < kstack_depth_to_print); 1198 } 1199 1200 void dump_stack(void) 1201 { 1202 show_stack(current, NULL); 1203 } 1204 EXPORT_SYMBOL(dump_stack); 1205 1206 #ifdef CONFIG_PPC64 1207 void ppc64_runlatch_on(void) 1208 { 1209 unsigned long ctrl; 1210 1211 if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) { 1212 HMT_medium(); 1213 1214 ctrl = mfspr(SPRN_CTRLF); 1215 ctrl |= CTRL_RUNLATCH; 1216 mtspr(SPRN_CTRLT, ctrl); 1217 1218 set_thread_flag(TIF_RUNLATCH); 1219 } 1220 } 1221 1222 void __ppc64_runlatch_off(void) 1223 { 1224 unsigned long ctrl; 1225 1226 HMT_medium(); 1227 1228 clear_thread_flag(TIF_RUNLATCH); 1229 1230 ctrl = mfspr(SPRN_CTRLF); 1231 ctrl &= ~CTRL_RUNLATCH; 1232 mtspr(SPRN_CTRLT, ctrl); 1233 } 1234 #endif 1235 1236 #if THREAD_SHIFT < PAGE_SHIFT 1237 1238 static struct kmem_cache *thread_info_cache; 1239 1240 struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node) 1241 { 1242 struct thread_info *ti; 1243 1244 ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node); 1245 if (unlikely(ti == NULL)) 1246 return NULL; 1247 #ifdef CONFIG_DEBUG_STACK_USAGE 1248 memset(ti, 0, THREAD_SIZE); 1249 #endif 1250 return ti; 1251 } 1252 1253 void free_thread_info(struct thread_info *ti) 1254 { 1255 kmem_cache_free(thread_info_cache, ti); 1256 } 1257 1258 void thread_info_cache_init(void) 1259 { 1260 thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE, 1261 THREAD_SIZE, 0, NULL); 1262 BUG_ON(thread_info_cache == NULL); 1263 } 1264 1265 #endif /* THREAD_SHIFT < PAGE_SHIFT */ 1266 1267 unsigned long arch_align_stack(unsigned long sp) 1268 { 1269 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1270 sp -= get_random_int() & ~PAGE_MASK; 1271 return sp & ~0xf; 1272 } 1273 1274 static inline unsigned long brk_rnd(void) 1275 { 1276 unsigned long rnd = 0; 1277 1278 /* 8MB for 32bit, 1GB for 64bit */ 1279 if (is_32bit_task()) 1280 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT))); 1281 else 1282 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT))); 1283 1284 return rnd << PAGE_SHIFT; 1285 } 1286 1287 unsigned long arch_randomize_brk(struct mm_struct *mm) 1288 { 1289 unsigned long base = mm->brk; 1290 unsigned long ret; 1291 1292 #ifdef CONFIG_PPC_STD_MMU_64 1293 /* 1294 * If we are using 1TB segments and we are allowed to randomise 1295 * the heap, we can put it above 1TB so it is backed by a 1TB 1296 * segment. Otherwise the heap will be in the bottom 1TB 1297 * which always uses 256MB segments and this may result in a 1298 * performance penalty. 1299 */ 1300 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 1301 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 1302 #endif 1303 1304 ret = PAGE_ALIGN(base + brk_rnd()); 1305 1306 if (ret < mm->brk) 1307 return mm->brk; 1308 1309 return ret; 1310 } 1311 1312 unsigned long randomize_et_dyn(unsigned long base) 1313 { 1314 unsigned long ret = PAGE_ALIGN(base + brk_rnd()); 1315 1316 if (ret < base) 1317 return base; 1318 1319 return ret; 1320 } 1321