114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 314cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 614cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 714cf11afSPaul Mackerras * 814cf11afSPaul Mackerras * PowerPC version 914cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1014cf11afSPaul Mackerras * 1114cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 1214cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 1314cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 1414cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 1514cf11afSPaul Mackerras */ 1614cf11afSPaul Mackerras 1714cf11afSPaul Mackerras #include <linux/errno.h> 1814cf11afSPaul Mackerras #include <linux/sched.h> 1914cf11afSPaul Mackerras #include <linux/kernel.h> 2014cf11afSPaul Mackerras #include <linux/mm.h> 2114cf11afSPaul Mackerras #include <linux/smp.h> 2214cf11afSPaul Mackerras #include <linux/stddef.h> 2314cf11afSPaul Mackerras #include <linux/unistd.h> 2414cf11afSPaul Mackerras #include <linux/ptrace.h> 2514cf11afSPaul Mackerras #include <linux/slab.h> 2614cf11afSPaul Mackerras #include <linux/user.h> 2714cf11afSPaul Mackerras #include <linux/elf.h> 2814cf11afSPaul Mackerras #include <linux/prctl.h> 2914cf11afSPaul Mackerras #include <linux/init_task.h> 304b16f8e2SPaul Gortmaker #include <linux/export.h> 3114cf11afSPaul Mackerras #include <linux/kallsyms.h> 3214cf11afSPaul Mackerras #include <linux/mqueue.h> 3314cf11afSPaul Mackerras #include <linux/hardirq.h> 3406d67d54SPaul Mackerras #include <linux/utsname.h> 356794c782SSteven Rostedt #include <linux/ftrace.h> 3679741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 37d839088cSAnton Blanchard #include <linux/personality.h> 38d839088cSAnton Blanchard #include <linux/random.h> 395aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 407b051f66SAnton Blanchard #include <linux/uaccess.h> 4114cf11afSPaul Mackerras 4214cf11afSPaul Mackerras #include <asm/pgtable.h> 4314cf11afSPaul Mackerras #include <asm/io.h> 4414cf11afSPaul Mackerras #include <asm/processor.h> 4514cf11afSPaul Mackerras #include <asm/mmu.h> 4614cf11afSPaul Mackerras #include <asm/prom.h> 4776032de8SMichael Ellerman #include <asm/machdep.h> 48c6622f63SPaul Mackerras #include <asm/time.h> 49ae3a197eSDavid Howells #include <asm/runlatch.h> 50a7f31841SArnd Bergmann #include <asm/syscalls.h> 51ae3a197eSDavid Howells #include <asm/switch_to.h> 52fb09692eSMichael Neuling #include <asm/tm.h> 53ae3a197eSDavid Howells #include <asm/debug.h> 5406d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5506d67d54SPaul Mackerras #include <asm/firmware.h> 5606d67d54SPaul Mackerras #endif 577cedd601SAnton Blanchard #include <asm/code-patching.h> 58d6a61bfcSLuis Machado #include <linux/kprobes.h> 59d6a61bfcSLuis Machado #include <linux/kdebug.h> 6014cf11afSPaul Mackerras 618b3c34cfSMichael Neuling /* Transactional Memory debug */ 628b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 638b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 648b3c34cfSMichael Neuling #else 658b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 668b3c34cfSMichael Neuling #endif 678b3c34cfSMichael Neuling 6814cf11afSPaul Mackerras extern unsigned long _get_SP(void); 6914cf11afSPaul Mackerras 70d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 71b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 72d31626f7SPaul Mackerras { 73d31626f7SPaul Mackerras /* 74d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 75d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 76d31626f7SPaul Mackerras * bit so that we know to restore the registers before 77d31626f7SPaul Mackerras * returning to userspace. 78d31626f7SPaul Mackerras */ 79d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 80d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 81d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 82829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 83d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 84d31626f7SPaul Mackerras } 85d31626f7SPaul Mackerras } 86d31626f7SPaul Mackerras #else 87b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 88d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 89d31626f7SPaul Mackerras 903eb5d588SAnton Blanchard bool strict_msr_control; 913eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 923eb5d588SAnton Blanchard 933eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 943eb5d588SAnton Blanchard { 953eb5d588SAnton Blanchard strict_msr_control = true; 963eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 973eb5d588SAnton Blanchard 983eb5d588SAnton Blanchard return 0; 993eb5d588SAnton Blanchard } 1003eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1013eb5d588SAnton Blanchard 1023eb5d588SAnton Blanchard void msr_check_and_set(unsigned long bits) 103a0e72cf1SAnton Blanchard { 104a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 105a0e72cf1SAnton Blanchard unsigned long newmsr; 106a0e72cf1SAnton Blanchard 107a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 108a0e72cf1SAnton Blanchard 109a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 110a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 111a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 112a0e72cf1SAnton Blanchard #endif 113a0e72cf1SAnton Blanchard 114a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 115a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 116a0e72cf1SAnton Blanchard } 117a0e72cf1SAnton Blanchard 1183eb5d588SAnton Blanchard void __msr_check_and_clear(unsigned long bits) 119a0e72cf1SAnton Blanchard { 120a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 121a0e72cf1SAnton Blanchard unsigned long newmsr; 122a0e72cf1SAnton Blanchard 123a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 124a0e72cf1SAnton Blanchard 125a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 126a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 127a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 128a0e72cf1SAnton Blanchard #endif 129a0e72cf1SAnton Blanchard 130a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 131a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 132a0e72cf1SAnton Blanchard } 1333eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 134a0e72cf1SAnton Blanchard 135037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 13698da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 13798da581eSAnton Blanchard { 13898da581eSAnton Blanchard check_if_tm_restore_required(tsk); 13998da581eSAnton Blanchard 140a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 14198da581eSAnton Blanchard __giveup_fpu(tsk); 142a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 14398da581eSAnton Blanchard } 14498da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 14598da581eSAnton Blanchard 14614cf11afSPaul Mackerras /* 14714cf11afSPaul Mackerras * Make sure the floating-point register state in the 14814cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 14914cf11afSPaul Mackerras */ 15014cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 15114cf11afSPaul Mackerras { 15214cf11afSPaul Mackerras if (tsk->thread.regs) { 15314cf11afSPaul Mackerras /* 15414cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 15514cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 15614cf11afSPaul Mackerras * test but before we have finished saving the FP registers 15714cf11afSPaul Mackerras * to the thread_struct. That process could take over the 15814cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 15914cf11afSPaul Mackerras * bogus values for the remaining FP registers. 16014cf11afSPaul Mackerras */ 16114cf11afSPaul Mackerras preempt_disable(); 16214cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 16314cf11afSPaul Mackerras /* 16414cf11afSPaul Mackerras * This should only ever be called for current or 16514cf11afSPaul Mackerras * for a stopped child process. Since we save away 166af1bbc3dSAnton Blanchard * the FP register state on context switch, 16714cf11afSPaul Mackerras * there is something wrong if a stopped child appears 16814cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 16914cf11afSPaul Mackerras */ 17014cf11afSPaul Mackerras BUG_ON(tsk != current); 171b86fd2bdSAnton Blanchard giveup_fpu(tsk); 17214cf11afSPaul Mackerras } 17314cf11afSPaul Mackerras preempt_enable(); 17414cf11afSPaul Mackerras } 17514cf11afSPaul Mackerras } 176de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 177d31626f7SPaul Mackerras #endif /* CONFIG_PPC_FPU */ 17814cf11afSPaul Mackerras 17914cf11afSPaul Mackerras void enable_kernel_fp(void) 18014cf11afSPaul Mackerras { 18114cf11afSPaul Mackerras WARN_ON(preemptible()); 18214cf11afSPaul Mackerras 183a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 184611b0e5cSAnton Blanchard 185a0e72cf1SAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) 186a0e72cf1SAnton Blanchard __giveup_fpu(current); 187b86fd2bdSAnton Blanchard } 18814cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 18914cf11afSPaul Mackerras 19014cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 19198da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 19298da581eSAnton Blanchard { 19398da581eSAnton Blanchard check_if_tm_restore_required(tsk); 19498da581eSAnton Blanchard 195a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 19698da581eSAnton Blanchard __giveup_altivec(tsk); 197a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 19898da581eSAnton Blanchard } 19998da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 20098da581eSAnton Blanchard 20114cf11afSPaul Mackerras void enable_kernel_altivec(void) 20214cf11afSPaul Mackerras { 20314cf11afSPaul Mackerras WARN_ON(preemptible()); 20414cf11afSPaul Mackerras 205a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 206611b0e5cSAnton Blanchard 207a0e72cf1SAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) 208a0e72cf1SAnton Blanchard __giveup_altivec(current); 209b86fd2bdSAnton Blanchard } 21014cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 21114cf11afSPaul Mackerras 21214cf11afSPaul Mackerras /* 21314cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 21414cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 21514cf11afSPaul Mackerras */ 21614cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 21714cf11afSPaul Mackerras { 21814cf11afSPaul Mackerras if (tsk->thread.regs) { 21914cf11afSPaul Mackerras preempt_disable(); 22014cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 22114cf11afSPaul Mackerras BUG_ON(tsk != current); 222b86fd2bdSAnton Blanchard giveup_altivec(tsk); 22314cf11afSPaul Mackerras } 22414cf11afSPaul Mackerras preempt_enable(); 22514cf11afSPaul Mackerras } 22614cf11afSPaul Mackerras } 227de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 22814cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 22914cf11afSPaul Mackerras 230ce48b210SMichael Neuling #ifdef CONFIG_VSX 231a7d623d4SAnton Blanchard void giveup_vsx(struct task_struct *tsk) 232a7d623d4SAnton Blanchard { 233a7d623d4SAnton Blanchard check_if_tm_restore_required(tsk); 234a7d623d4SAnton Blanchard 235a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 236a7d623d4SAnton Blanchard if (tsk->thread.regs->msr & MSR_FP) 237a7d623d4SAnton Blanchard __giveup_fpu(tsk); 238a7d623d4SAnton Blanchard if (tsk->thread.regs->msr & MSR_VEC) 239a7d623d4SAnton Blanchard __giveup_altivec(tsk); 240a7d623d4SAnton Blanchard __giveup_vsx(tsk); 241a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 242a7d623d4SAnton Blanchard } 243a7d623d4SAnton Blanchard EXPORT_SYMBOL(giveup_vsx); 244a7d623d4SAnton Blanchard 245ce48b210SMichael Neuling void enable_kernel_vsx(void) 246ce48b210SMichael Neuling { 247ce48b210SMichael Neuling WARN_ON(preemptible()); 248ce48b210SMichael Neuling 249a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 250611b0e5cSAnton Blanchard 251a0e72cf1SAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) { 252a0e72cf1SAnton Blanchard if (current->thread.regs->msr & MSR_FP) 253a0e72cf1SAnton Blanchard __giveup_fpu(current); 254a0e72cf1SAnton Blanchard if (current->thread.regs->msr & MSR_VEC) 255a0e72cf1SAnton Blanchard __giveup_altivec(current); 256a0e72cf1SAnton Blanchard __giveup_vsx(current); 257611b0e5cSAnton Blanchard } 258ce48b210SMichael Neuling } 259ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 260ce48b210SMichael Neuling 261ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 262ce48b210SMichael Neuling { 263ce48b210SMichael Neuling if (tsk->thread.regs) { 264ce48b210SMichael Neuling preempt_disable(); 265ce48b210SMichael Neuling if (tsk->thread.regs->msr & MSR_VSX) { 266ce48b210SMichael Neuling BUG_ON(tsk != current); 267ce48b210SMichael Neuling giveup_vsx(tsk); 268ce48b210SMichael Neuling } 269ce48b210SMichael Neuling preempt_enable(); 270ce48b210SMichael Neuling } 271ce48b210SMichael Neuling } 272de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 273ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 274ce48b210SMichael Neuling 27514cf11afSPaul Mackerras #ifdef CONFIG_SPE 27698da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 27798da581eSAnton Blanchard { 27898da581eSAnton Blanchard check_if_tm_restore_required(tsk); 27998da581eSAnton Blanchard 280a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 28198da581eSAnton Blanchard __giveup_spe(tsk); 282a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 28398da581eSAnton Blanchard } 28498da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 28514cf11afSPaul Mackerras 28614cf11afSPaul Mackerras void enable_kernel_spe(void) 28714cf11afSPaul Mackerras { 28814cf11afSPaul Mackerras WARN_ON(preemptible()); 28914cf11afSPaul Mackerras 290a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 291611b0e5cSAnton Blanchard 292a0e72cf1SAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) 293a0e72cf1SAnton Blanchard __giveup_spe(current); 29414cf11afSPaul Mackerras } 29514cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 29614cf11afSPaul Mackerras 29714cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 29814cf11afSPaul Mackerras { 29914cf11afSPaul Mackerras if (tsk->thread.regs) { 30014cf11afSPaul Mackerras preempt_disable(); 30114cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 30214cf11afSPaul Mackerras BUG_ON(tsk != current); 303685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 3040ee6c15eSKumar Gala giveup_spe(tsk); 30514cf11afSPaul Mackerras } 30614cf11afSPaul Mackerras preempt_enable(); 30714cf11afSPaul Mackerras } 30814cf11afSPaul Mackerras } 30914cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 31014cf11afSPaul Mackerras 311c2085059SAnton Blanchard static unsigned long msr_all_available; 312c2085059SAnton Blanchard 313c2085059SAnton Blanchard static int __init init_msr_all_available(void) 314c2085059SAnton Blanchard { 315c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 316c2085059SAnton Blanchard msr_all_available |= MSR_FP; 317c2085059SAnton Blanchard #endif 318c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 319c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 320c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 321c2085059SAnton Blanchard #endif 322c2085059SAnton Blanchard #ifdef CONFIG_VSX 323c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 324c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 325c2085059SAnton Blanchard #endif 326c2085059SAnton Blanchard #ifdef CONFIG_SPE 327c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 328c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 329c2085059SAnton Blanchard #endif 330c2085059SAnton Blanchard 331c2085059SAnton Blanchard return 0; 332c2085059SAnton Blanchard } 333c2085059SAnton Blanchard early_initcall(init_msr_all_available); 334c2085059SAnton Blanchard 335c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 336c2085059SAnton Blanchard { 337c2085059SAnton Blanchard unsigned long usermsr; 338c2085059SAnton Blanchard 339c2085059SAnton Blanchard if (!tsk->thread.regs) 340c2085059SAnton Blanchard return; 341c2085059SAnton Blanchard 342c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 343c2085059SAnton Blanchard 344c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 345c2085059SAnton Blanchard return; 346c2085059SAnton Blanchard 347c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 348c2085059SAnton Blanchard 349c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 350c2085059SAnton Blanchard if (usermsr & MSR_FP) 351c2085059SAnton Blanchard __giveup_fpu(tsk); 352c2085059SAnton Blanchard #endif 353c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 354c2085059SAnton Blanchard if (usermsr & MSR_VEC) 355c2085059SAnton Blanchard __giveup_altivec(tsk); 356c2085059SAnton Blanchard #endif 357c2085059SAnton Blanchard #ifdef CONFIG_VSX 358c2085059SAnton Blanchard if (usermsr & MSR_VSX) 359c2085059SAnton Blanchard __giveup_vsx(tsk); 360c2085059SAnton Blanchard #endif 361c2085059SAnton Blanchard #ifdef CONFIG_SPE 362c2085059SAnton Blanchard if (usermsr & MSR_SPE) 363c2085059SAnton Blanchard __giveup_spe(tsk); 364c2085059SAnton Blanchard #endif 365c2085059SAnton Blanchard 366c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 367c2085059SAnton Blanchard } 368c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 369c2085059SAnton Blanchard 370579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 371579e633eSAnton Blanchard { 372579e633eSAnton Blanchard if (tsk->thread.regs) { 373579e633eSAnton Blanchard preempt_disable(); 374579e633eSAnton Blanchard BUG_ON(tsk != current); 375579e633eSAnton Blanchard giveup_all(tsk); 376579e633eSAnton Blanchard 377579e633eSAnton Blanchard #ifdef CONFIG_SPE 378579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 379579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 380579e633eSAnton Blanchard #endif 381579e633eSAnton Blanchard 382579e633eSAnton Blanchard preempt_enable(); 383579e633eSAnton Blanchard } 384579e633eSAnton Blanchard } 385579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 386579e633eSAnton Blanchard 3873bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 3883bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 3893bffb652SDave Kleikamp unsigned long error_code, int signal_code, int breakpt) 3903bffb652SDave Kleikamp { 3913bffb652SDave Kleikamp siginfo_t info; 3923bffb652SDave Kleikamp 39341ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = signal_code; 3943bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 3953bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 3963bffb652SDave Kleikamp return; 3973bffb652SDave Kleikamp 3983bffb652SDave Kleikamp /* Deliver the signal to userspace */ 3993bffb652SDave Kleikamp info.si_signo = SIGTRAP; 4003bffb652SDave Kleikamp info.si_errno = breakpt; /* breakpoint or watchpoint id */ 4013bffb652SDave Kleikamp info.si_code = signal_code; 4023bffb652SDave Kleikamp info.si_addr = (void __user *)address; 4033bffb652SDave Kleikamp force_sig_info(SIGTRAP, &info, current); 4043bffb652SDave Kleikamp } 4053bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 4069422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 407d6a61bfcSLuis Machado unsigned long error_code) 408d6a61bfcSLuis Machado { 409d6a61bfcSLuis Machado siginfo_t info; 410d6a61bfcSLuis Machado 41141ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 412d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 413d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 414d6a61bfcSLuis Machado return; 415d6a61bfcSLuis Machado 4169422de3eSMichael Neuling if (debugger_break_match(regs)) 417d6a61bfcSLuis Machado return; 418d6a61bfcSLuis Machado 4199422de3eSMichael Neuling /* Clear the breakpoint */ 4209422de3eSMichael Neuling hw_breakpoint_disable(); 421d6a61bfcSLuis Machado 422d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 423d6a61bfcSLuis Machado info.si_signo = SIGTRAP; 424d6a61bfcSLuis Machado info.si_errno = 0; 425d6a61bfcSLuis Machado info.si_code = TRAP_HWBKPT; 426d6a61bfcSLuis Machado info.si_addr = (void __user *)address; 427d6a61bfcSLuis Machado force_sig_info(SIGTRAP, &info, current); 428d6a61bfcSLuis Machado } 4293bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 430d6a61bfcSLuis Machado 4319422de3eSMichael Neuling static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk); 432a2ceff5eSMichael Ellerman 4333bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 4343bffb652SDave Kleikamp /* 4353bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 4363bffb652SDave Kleikamp */ 4373bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 4383bffb652SDave Kleikamp { 43951ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 4403bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 44151ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 4423bffb652SDave Kleikamp #endif 44351ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 4443bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 44551ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 4463bffb652SDave Kleikamp #endif 44751ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 4483bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 4493bffb652SDave Kleikamp /* 4503bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 4513bffb652SDave Kleikamp */ 45251ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 4533bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 4543bffb652SDave Kleikamp /* 4553bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 4563bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 4573bffb652SDave Kleikamp */ 45851ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 4593bffb652SDave Kleikamp #else 46051ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 4613bffb652SDave Kleikamp #endif 4623bffb652SDave Kleikamp } 4633bffb652SDave Kleikamp 464f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 4653bffb652SDave Kleikamp { 4666cecf76bSScott Wood /* 4676cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 4686cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 4696cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 4706cecf76bSScott Wood */ 4716cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 4726cecf76bSScott Wood 473f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 474f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 4753bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 476f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 477f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 4783bffb652SDave Kleikamp #endif 479f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 480f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 4813bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 482f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 483f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 4843bffb652SDave Kleikamp #endif 485f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 486f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 4873bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 488f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 4893bffb652SDave Kleikamp #endif 4903bffb652SDave Kleikamp } 4913bffb652SDave Kleikamp /* 4923bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 4933bffb652SDave Kleikamp * debug registers, set the debug registers from the values 4943bffb652SDave Kleikamp * stored in the new thread. 4953bffb652SDave Kleikamp */ 496f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 4973bffb652SDave Kleikamp { 49851ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 499f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 500f5f97210SScott Wood prime_debug_regs(new_debug); 5013bffb652SDave Kleikamp } 5023743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 5033bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 504e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 5053bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 5063bffb652SDave Kleikamp { 5079422de3eSMichael Neuling thread->hw_brk.address = 0; 5089422de3eSMichael Neuling thread->hw_brk.type = 0; 509b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 5103bffb652SDave Kleikamp } 511e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 5123bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 5133bffb652SDave Kleikamp 514172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 5159422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 5169422de3eSMichael Neuling { 517c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 518221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 519221c185dSDave Kleikamp isync(); 520221c185dSDave Kleikamp #endif 5219422de3eSMichael Neuling return 0; 5229422de3eSMichael Neuling } 523c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 5249422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 5259422de3eSMichael Neuling { 526cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 52782a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 5284474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 529cab0af98SMichael Ellerman return 0; 53014cf11afSPaul Mackerras } 5319422de3eSMichael Neuling #else 5329422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 5339422de3eSMichael Neuling { 5349422de3eSMichael Neuling return -EINVAL; 5359422de3eSMichael Neuling } 5369422de3eSMichael Neuling #endif 5379422de3eSMichael Neuling 5389422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 5399422de3eSMichael Neuling { 5409422de3eSMichael Neuling unsigned long dabr, dabrx; 5419422de3eSMichael Neuling 5429422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 5439422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 5449422de3eSMichael Neuling 5459422de3eSMichael Neuling if (ppc_md.set_dabr) 5469422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 5479422de3eSMichael Neuling 5489422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 5499422de3eSMichael Neuling } 5509422de3eSMichael Neuling 551bf99de36SMichael Neuling static inline int set_dawr(struct arch_hw_breakpoint *brk) 552bf99de36SMichael Neuling { 55305d694eaSMichael Neuling unsigned long dawr, dawrx, mrd; 554bf99de36SMichael Neuling 555bf99de36SMichael Neuling dawr = brk->address; 556bf99de36SMichael Neuling 557bf99de36SMichael Neuling dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \ 558bf99de36SMichael Neuling << (63 - 58); //* read/write bits */ 559bf99de36SMichael Neuling dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \ 560bf99de36SMichael Neuling << (63 - 59); //* translate */ 561bf99de36SMichael Neuling dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \ 562bf99de36SMichael Neuling >> 3; //* PRIM bits */ 56305d694eaSMichael Neuling /* dawr length is stored in field MDR bits 48:53. Matches range in 56405d694eaSMichael Neuling doublewords (64 bits) baised by -1 eg. 0b000000=1DW and 56505d694eaSMichael Neuling 0b111111=64DW. 56605d694eaSMichael Neuling brk->len is in bytes. 56705d694eaSMichael Neuling This aligns up to double word size, shifts and does the bias. 56805d694eaSMichael Neuling */ 56905d694eaSMichael Neuling mrd = ((brk->len + 7) >> 3) - 1; 57005d694eaSMichael Neuling dawrx |= (mrd & 0x3f) << (63 - 53); 571bf99de36SMichael Neuling 572bf99de36SMichael Neuling if (ppc_md.set_dawr) 573bf99de36SMichael Neuling return ppc_md.set_dawr(dawr, dawrx); 574bf99de36SMichael Neuling mtspr(SPRN_DAWR, dawr); 575bf99de36SMichael Neuling mtspr(SPRN_DAWRX, dawrx); 576bf99de36SMichael Neuling return 0; 577bf99de36SMichael Neuling } 578bf99de36SMichael Neuling 57921f58507SPaul Gortmaker void __set_breakpoint(struct arch_hw_breakpoint *brk) 5809422de3eSMichael Neuling { 58169111bacSChristoph Lameter memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk)); 5829422de3eSMichael Neuling 583bf99de36SMichael Neuling if (cpu_has_feature(CPU_FTR_DAWR)) 58404c32a51SPaul Gortmaker set_dawr(brk); 58504c32a51SPaul Gortmaker else 58604c32a51SPaul Gortmaker set_dabr(brk); 5879422de3eSMichael Neuling } 58814cf11afSPaul Mackerras 58921f58507SPaul Gortmaker void set_breakpoint(struct arch_hw_breakpoint *brk) 59021f58507SPaul Gortmaker { 59121f58507SPaul Gortmaker preempt_disable(); 59221f58507SPaul Gortmaker __set_breakpoint(brk); 59321f58507SPaul Gortmaker preempt_enable(); 59421f58507SPaul Gortmaker } 59521f58507SPaul Gortmaker 59606d67d54SPaul Mackerras #ifdef CONFIG_PPC64 59706d67d54SPaul Mackerras DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 59806d67d54SPaul Mackerras #endif 59914cf11afSPaul Mackerras 6009422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 6019422de3eSMichael Neuling struct arch_hw_breakpoint *b) 6029422de3eSMichael Neuling { 6039422de3eSMichael Neuling if (a->address != b->address) 6049422de3eSMichael Neuling return false; 6059422de3eSMichael Neuling if (a->type != b->type) 6069422de3eSMichael Neuling return false; 6079422de3eSMichael Neuling if (a->len != b->len) 6089422de3eSMichael Neuling return false; 6099422de3eSMichael Neuling return true; 6109422de3eSMichael Neuling } 611d31626f7SPaul Mackerras 612fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 613d31626f7SPaul Mackerras static void tm_reclaim_thread(struct thread_struct *thr, 614d31626f7SPaul Mackerras struct thread_info *ti, uint8_t cause) 615d31626f7SPaul Mackerras { 616d31626f7SPaul Mackerras unsigned long msr_diff = 0; 617d31626f7SPaul Mackerras 618d31626f7SPaul Mackerras /* 619d31626f7SPaul Mackerras * If FP/VSX registers have been already saved to the 620d31626f7SPaul Mackerras * thread_struct, move them to the transact_fp array. 621d31626f7SPaul Mackerras * We clear the TIF_RESTORE_TM bit since after the reclaim 622d31626f7SPaul Mackerras * the thread will no longer be transactional. 623d31626f7SPaul Mackerras */ 624d31626f7SPaul Mackerras if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) { 625829023dfSAnshuman Khandual msr_diff = thr->ckpt_regs.msr & ~thr->regs->msr; 626d31626f7SPaul Mackerras if (msr_diff & MSR_FP) 627d31626f7SPaul Mackerras memcpy(&thr->transact_fp, &thr->fp_state, 628d31626f7SPaul Mackerras sizeof(struct thread_fp_state)); 629d31626f7SPaul Mackerras if (msr_diff & MSR_VEC) 630d31626f7SPaul Mackerras memcpy(&thr->transact_vr, &thr->vr_state, 631d31626f7SPaul Mackerras sizeof(struct thread_vr_state)); 632d31626f7SPaul Mackerras clear_ti_thread_flag(ti, TIF_RESTORE_TM); 633d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX | MSR_FE0 | MSR_FE1; 634d31626f7SPaul Mackerras } 635d31626f7SPaul Mackerras 636d31626f7SPaul Mackerras tm_reclaim(thr, thr->regs->msr, cause); 637d31626f7SPaul Mackerras 638d31626f7SPaul Mackerras /* Having done the reclaim, we now have the checkpointed 639d31626f7SPaul Mackerras * FP/VSX values in the registers. These might be valid 640d31626f7SPaul Mackerras * even if we have previously called enable_kernel_fp() or 641d31626f7SPaul Mackerras * flush_fp_to_thread(), so update thr->regs->msr to 642d31626f7SPaul Mackerras * indicate their current validity. 643d31626f7SPaul Mackerras */ 644d31626f7SPaul Mackerras thr->regs->msr |= msr_diff; 645d31626f7SPaul Mackerras } 646d31626f7SPaul Mackerras 647d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 648d31626f7SPaul Mackerras { 649d31626f7SPaul Mackerras tm_enable(); 650d31626f7SPaul Mackerras tm_reclaim_thread(¤t->thread, current_thread_info(), cause); 651d31626f7SPaul Mackerras } 652d31626f7SPaul Mackerras 653fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 654fb09692eSMichael Neuling { 655fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 656fb09692eSMichael Neuling * middle of a transaction. 657fb09692eSMichael Neuling * 658fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 659fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 660fb09692eSMichael Neuling * checkpointed (tbegin) state in ckpt_regs and saves the transactional 661fb09692eSMichael Neuling * (current) FPRs into oldtask->thread.transact_fpr[]. 662fb09692eSMichael Neuling * 663fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 664fb09692eSMichael Neuling */ 665fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 666fb09692eSMichael Neuling 667fb09692eSMichael Neuling if (!thr->regs) 668fb09692eSMichael Neuling return; 669fb09692eSMichael Neuling 670fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 671fb09692eSMichael Neuling goto out_and_saveregs; 672fb09692eSMichael Neuling 673fb09692eSMichael Neuling /* Stash the original thread MSR, as giveup_fpu et al will 674fb09692eSMichael Neuling * modify it. We hold onto it to see whether the task used 675d31626f7SPaul Mackerras * FP & vector regs. If the TIF_RESTORE_TM flag is set, 676829023dfSAnshuman Khandual * ckpt_regs.msr is already set. 677fb09692eSMichael Neuling */ 678d31626f7SPaul Mackerras if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM)) 679829023dfSAnshuman Khandual thr->ckpt_regs.msr = thr->regs->msr; 680fb09692eSMichael Neuling 681fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 682fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 683fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 684fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 685fb09692eSMichael Neuling thr->regs->trap); 686fb09692eSMichael Neuling 687d31626f7SPaul Mackerras tm_reclaim_thread(thr, task_thread_info(tsk), TM_CAUSE_RESCHED); 688fb09692eSMichael Neuling 689fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 690fb09692eSMichael Neuling tsk->pid); 691fb09692eSMichael Neuling 692fb09692eSMichael Neuling out_and_saveregs: 693fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 694fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 695fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 696fb09692eSMichael Neuling * cannot happen later in _switch(). 697fb09692eSMichael Neuling */ 698fb09692eSMichael Neuling tm_save_sprs(thr); 699fb09692eSMichael Neuling } 700fb09692eSMichael Neuling 701e6b8fd02SMichael Neuling extern void __tm_recheckpoint(struct thread_struct *thread, 702e6b8fd02SMichael Neuling unsigned long orig_msr); 703e6b8fd02SMichael Neuling 704e6b8fd02SMichael Neuling void tm_recheckpoint(struct thread_struct *thread, 705e6b8fd02SMichael Neuling unsigned long orig_msr) 706e6b8fd02SMichael Neuling { 707e6b8fd02SMichael Neuling unsigned long flags; 708e6b8fd02SMichael Neuling 709e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 710e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 711e6b8fd02SMichael Neuling * So let's hard disable over this region. 712e6b8fd02SMichael Neuling */ 713e6b8fd02SMichael Neuling local_irq_save(flags); 714e6b8fd02SMichael Neuling hard_irq_disable(); 715e6b8fd02SMichael Neuling 716e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 717e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 718e6b8fd02SMichael Neuling */ 719e6b8fd02SMichael Neuling tm_restore_sprs(thread); 720e6b8fd02SMichael Neuling 721e6b8fd02SMichael Neuling __tm_recheckpoint(thread, orig_msr); 722e6b8fd02SMichael Neuling 723e6b8fd02SMichael Neuling local_irq_restore(flags); 724e6b8fd02SMichael Neuling } 725e6b8fd02SMichael Neuling 726bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 727fb09692eSMichael Neuling { 728fb09692eSMichael Neuling unsigned long msr; 729fb09692eSMichael Neuling 730fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 731fb09692eSMichael Neuling return; 732fb09692eSMichael Neuling 733fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 734fb09692eSMichael Neuling * 735fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 736fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 737fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 738fb09692eSMichael Neuling * unavoidable later, we are unable to determine which set of FP regs 739fb09692eSMichael Neuling * need to be restored. 740fb09692eSMichael Neuling */ 741fb09692eSMichael Neuling if (!new->thread.regs) 742fb09692eSMichael Neuling return; 743fb09692eSMichael Neuling 744e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 745fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 746fb09692eSMichael Neuling return; 747e6b8fd02SMichael Neuling } 748829023dfSAnshuman Khandual msr = new->thread.ckpt_regs.msr; 749fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 750fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d " 751fb09692eSMichael Neuling "(new->msr 0x%lx, new->origmsr 0x%lx)\n", 752fb09692eSMichael Neuling new->pid, new->thread.regs->msr, msr); 753fb09692eSMichael Neuling 754fb09692eSMichael Neuling /* This loads the checkpointed FP/VEC state, if used */ 755fb09692eSMichael Neuling tm_recheckpoint(&new->thread, msr); 756fb09692eSMichael Neuling 757fb09692eSMichael Neuling /* This loads the speculative FP/VEC state, if used */ 758fb09692eSMichael Neuling if (msr & MSR_FP) { 759fb09692eSMichael Neuling do_load_up_transact_fpu(&new->thread); 760fb09692eSMichael Neuling new->thread.regs->msr |= 761fb09692eSMichael Neuling (MSR_FP | new->thread.fpexc_mode); 762fb09692eSMichael Neuling } 763f110c0c1SMichael Neuling #ifdef CONFIG_ALTIVEC 764fb09692eSMichael Neuling if (msr & MSR_VEC) { 765fb09692eSMichael Neuling do_load_up_transact_altivec(&new->thread); 766fb09692eSMichael Neuling new->thread.regs->msr |= MSR_VEC; 767fb09692eSMichael Neuling } 768f110c0c1SMichael Neuling #endif 769fb09692eSMichael Neuling /* We may as well turn on VSX too since all the state is restored now */ 770fb09692eSMichael Neuling if (msr & MSR_VSX) 771fb09692eSMichael Neuling new->thread.regs->msr |= MSR_VSX; 772fb09692eSMichael Neuling 773fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 774fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 775fb09692eSMichael Neuling new->pid, mfmsr()); 776fb09692eSMichael Neuling } 777fb09692eSMichael Neuling 778fb09692eSMichael Neuling static inline void __switch_to_tm(struct task_struct *prev) 779fb09692eSMichael Neuling { 780fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 781fb09692eSMichael Neuling tm_enable(); 782fb09692eSMichael Neuling tm_reclaim_task(prev); 783fb09692eSMichael Neuling } 784fb09692eSMichael Neuling } 785d31626f7SPaul Mackerras 786d31626f7SPaul Mackerras /* 787d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 788d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 789d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 790d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 791d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 792d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 793d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 794d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 795d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 796d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 797d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 798d31626f7SPaul Mackerras * state to use. 799d31626f7SPaul Mackerras */ 800d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 801d31626f7SPaul Mackerras { 802d31626f7SPaul Mackerras unsigned long msr_diff; 803d31626f7SPaul Mackerras 804d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 805d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 806d31626f7SPaul Mackerras return; 807d31626f7SPaul Mackerras 808829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 809d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 810d31626f7SPaul Mackerras if (msr_diff & MSR_FP) { 8111f2e25b2SAnton Blanchard msr_check_and_set(MSR_FP); 812d31626f7SPaul Mackerras load_fp_state(¤t->thread.fp_state); 8131f2e25b2SAnton Blanchard msr_check_and_clear(MSR_FP); 814d31626f7SPaul Mackerras regs->msr |= current->thread.fpexc_mode; 815d31626f7SPaul Mackerras } 816d31626f7SPaul Mackerras if (msr_diff & MSR_VEC) { 8171f2e25b2SAnton Blanchard msr_check_and_set(MSR_VEC); 818d31626f7SPaul Mackerras load_vr_state(¤t->thread.vr_state); 8191f2e25b2SAnton Blanchard msr_check_and_clear(MSR_VEC); 820d31626f7SPaul Mackerras } 821d31626f7SPaul Mackerras regs->msr |= msr_diff; 822d31626f7SPaul Mackerras } 823d31626f7SPaul Mackerras 824fb09692eSMichael Neuling #else 825fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 826fb09692eSMichael Neuling #define __switch_to_tm(prev) 827fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 8289422de3eSMichael Neuling 829152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 830152d523eSAnton Blanchard { 831152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 832152d523eSAnton Blanchard if (cpu_has_feature(cpu_has_feature(CPU_FTR_ALTIVEC))) 833152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 834152d523eSAnton Blanchard #endif 835152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 836152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 837152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 838152d523eSAnton Blanchard 839152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 840152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 841152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 842152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 843152d523eSAnton Blanchard 844152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 845152d523eSAnton Blanchard 846152d523eSAnton Blanchard /* 847152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 848152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 849152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 850152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 851152d523eSAnton Blanchard */ 852152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 853152d523eSAnton Blanchard } 854152d523eSAnton Blanchard #endif 855152d523eSAnton Blanchard } 856152d523eSAnton Blanchard 857152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 858152d523eSAnton Blanchard struct thread_struct *new_thread) 859152d523eSAnton Blanchard { 860152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 861152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 862152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 863152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 864152d523eSAnton Blanchard #endif 865152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 866152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 867152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 868152d523eSAnton Blanchard u64 fscr = old_thread->fscr & ~FSCR_DSCR; 869152d523eSAnton Blanchard 870152d523eSAnton Blanchard if (new_thread->dscr_inherit) { 871152d523eSAnton Blanchard dscr = new_thread->dscr; 872152d523eSAnton Blanchard fscr |= FSCR_DSCR; 873152d523eSAnton Blanchard } 874152d523eSAnton Blanchard 875152d523eSAnton Blanchard if (old_thread->dscr != dscr) 876152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 877152d523eSAnton Blanchard 878152d523eSAnton Blanchard if (old_thread->fscr != fscr) 879152d523eSAnton Blanchard mtspr(SPRN_FSCR, fscr); 880152d523eSAnton Blanchard } 881152d523eSAnton Blanchard 882152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 883152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 884152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 885152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 886152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 887152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 888152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 889152d523eSAnton Blanchard 890152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 891152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 892152d523eSAnton Blanchard } 893152d523eSAnton Blanchard #endif 894152d523eSAnton Blanchard } 895152d523eSAnton Blanchard 89614cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 89714cf11afSPaul Mackerras struct task_struct *new) 89814cf11afSPaul Mackerras { 89914cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 90014cf11afSPaul Mackerras struct task_struct *last; 901d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 902d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 903d6bf29b4SPeter Zijlstra #endif 90414cf11afSPaul Mackerras 905152d523eSAnton Blanchard new_thread = &new->thread; 906152d523eSAnton Blanchard old_thread = ¤t->thread; 907152d523eSAnton Blanchard 9087ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 9097ba5fef7SMichael Neuling 91006d67d54SPaul Mackerras #ifdef CONFIG_PPC64 91106d67d54SPaul Mackerras /* 91206d67d54SPaul Mackerras * Collect processor utilization data per process 91306d67d54SPaul Mackerras */ 91406d67d54SPaul Mackerras if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 91569111bacSChristoph Lameter struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array); 91606d67d54SPaul Mackerras long unsigned start_tb, current_tb; 91706d67d54SPaul Mackerras start_tb = old_thread->start_tb; 91806d67d54SPaul Mackerras cu->current_tb = current_tb = mfspr(SPRN_PURR); 91906d67d54SPaul Mackerras old_thread->accum_tb += (current_tb - start_tb); 92006d67d54SPaul Mackerras new_thread->start_tb = current_tb; 92106d67d54SPaul Mackerras } 922d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC64 */ 923d6bf29b4SPeter Zijlstra 924d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 92569111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 926d6bf29b4SPeter Zijlstra if (batch->active) { 927d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 928d6bf29b4SPeter Zijlstra if (batch->index) 929d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 930d6bf29b4SPeter Zijlstra batch->active = 0; 931d6bf29b4SPeter Zijlstra } 932d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC_BOOK3S_64 */ 93306d67d54SPaul Mackerras 934*f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 935*f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 936*f3d885ccSAnton Blanchard #else 937*f3d885ccSAnton Blanchard /* 938*f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 939*f3d885ccSAnton Blanchard * schedule DABR 940*f3d885ccSAnton Blanchard */ 941*f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 942*f3d885ccSAnton Blanchard if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk))) 943*f3d885ccSAnton Blanchard __set_breakpoint(&new->thread.hw_brk); 944*f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 945*f3d885ccSAnton Blanchard #endif 946*f3d885ccSAnton Blanchard 947*f3d885ccSAnton Blanchard /* 948*f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 949*f3d885ccSAnton Blanchard * change a number of them. 950*f3d885ccSAnton Blanchard */ 951*f3d885ccSAnton Blanchard save_sprs(&prev->thread); 952*f3d885ccSAnton Blanchard 953*f3d885ccSAnton Blanchard __switch_to_tm(prev); 954*f3d885ccSAnton Blanchard 955*f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 956*f3d885ccSAnton Blanchard giveup_all(prev); 957*f3d885ccSAnton Blanchard 95844387e9fSAnton Blanchard /* 95944387e9fSAnton Blanchard * We can't take a PMU exception inside _switch() since there is a 96044387e9fSAnton Blanchard * window where the kernel stack SLB and the kernel stack are out 96144387e9fSAnton Blanchard * of sync. Hard disable here. 96244387e9fSAnton Blanchard */ 96344387e9fSAnton Blanchard hard_irq_disable(); 964bc2a9408SMichael Neuling 965bc2a9408SMichael Neuling tm_recheckpoint_new_task(new); 966bc2a9408SMichael Neuling 96714cf11afSPaul Mackerras last = _switch(old_thread, new_thread); 96814cf11afSPaul Mackerras 969152d523eSAnton Blanchard /* Need to recalculate these after calling _switch() */ 970152d523eSAnton Blanchard old_thread = &last->thread; 971152d523eSAnton Blanchard new_thread = ¤t->thread; 972152d523eSAnton Blanchard 973*f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 974*f3d885ccSAnton Blanchard 975d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 976d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 977d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 97869111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 979d6bf29b4SPeter Zijlstra batch->active = 1; 980d6bf29b4SPeter Zijlstra } 981d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC_BOOK3S_64 */ 982d6bf29b4SPeter Zijlstra 98314cf11afSPaul Mackerras return last; 98414cf11afSPaul Mackerras } 98514cf11afSPaul Mackerras 98606d67d54SPaul Mackerras static int instructions_to_print = 16; 98706d67d54SPaul Mackerras 98806d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 98906d67d54SPaul Mackerras { 99006d67d54SPaul Mackerras int i; 99106d67d54SPaul Mackerras unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 99206d67d54SPaul Mackerras sizeof(int)); 99306d67d54SPaul Mackerras 99406d67d54SPaul Mackerras printk("Instruction dump:"); 99506d67d54SPaul Mackerras 99606d67d54SPaul Mackerras for (i = 0; i < instructions_to_print; i++) { 99706d67d54SPaul Mackerras int instr; 99806d67d54SPaul Mackerras 99906d67d54SPaul Mackerras if (!(i % 8)) 100006d67d54SPaul Mackerras printk("\n"); 100106d67d54SPaul Mackerras 10020de2d820SScott Wood #if !defined(CONFIG_BOOKE) 10030de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 10040de2d820SScott Wood * than print XXXXXXXX. 10050de2d820SScott Wood */ 10060de2d820SScott Wood if (!(regs->msr & MSR_IR)) 10070de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 10080de2d820SScott Wood #endif 10090de2d820SScott Wood 101000ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 10117b051f66SAnton Blanchard probe_kernel_address((unsigned int __user *)pc, instr)) { 101240c8cefaSIra Snyder printk(KERN_CONT "XXXXXXXX "); 101306d67d54SPaul Mackerras } else { 101406d67d54SPaul Mackerras if (regs->nip == pc) 101540c8cefaSIra Snyder printk(KERN_CONT "<%08x> ", instr); 101606d67d54SPaul Mackerras else 101740c8cefaSIra Snyder printk(KERN_CONT "%08x ", instr); 101806d67d54SPaul Mackerras } 101906d67d54SPaul Mackerras 102006d67d54SPaul Mackerras pc += sizeof(int); 102106d67d54SPaul Mackerras } 102206d67d54SPaul Mackerras 102306d67d54SPaul Mackerras printk("\n"); 102406d67d54SPaul Mackerras } 102506d67d54SPaul Mackerras 102606d67d54SPaul Mackerras static struct regbit { 102706d67d54SPaul Mackerras unsigned long bit; 102806d67d54SPaul Mackerras const char *name; 102906d67d54SPaul Mackerras } msr_bits[] = { 10303bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 10313bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 10323bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 10333bfd0c9cSAnton Blanchard #endif 10343bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 10353bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 10363bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 10373bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 10383bfd0c9cSAnton Blanchard #endif 103906d67d54SPaul Mackerras {MSR_EE, "EE"}, 104006d67d54SPaul Mackerras {MSR_PR, "PR"}, 104106d67d54SPaul Mackerras {MSR_FP, "FP"}, 104206d67d54SPaul Mackerras {MSR_ME, "ME"}, 10433bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 10441b98326bSKumar Gala {MSR_DE, "DE"}, 10453bfd0c9cSAnton Blanchard #else 10463bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 10473bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 10483bfd0c9cSAnton Blanchard #endif 104906d67d54SPaul Mackerras {MSR_IR, "IR"}, 105006d67d54SPaul Mackerras {MSR_DR, "DR"}, 10513bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 10523bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 10533bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 10543bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 10553bfd0c9cSAnton Blanchard #endif 105606d67d54SPaul Mackerras {0, NULL} 105706d67d54SPaul Mackerras }; 105806d67d54SPaul Mackerras 105906d67d54SPaul Mackerras static void printbits(unsigned long val, struct regbit *bits) 106006d67d54SPaul Mackerras { 106106d67d54SPaul Mackerras const char *sep = ""; 106206d67d54SPaul Mackerras 106306d67d54SPaul Mackerras printk("<"); 106406d67d54SPaul Mackerras for (; bits->bit; ++bits) 106506d67d54SPaul Mackerras if (val & bits->bit) { 106606d67d54SPaul Mackerras printk("%s%s", sep, bits->name); 106706d67d54SPaul Mackerras sep = ","; 106806d67d54SPaul Mackerras } 106906d67d54SPaul Mackerras printk(">"); 107006d67d54SPaul Mackerras } 107106d67d54SPaul Mackerras 107206d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1073f6f7dde3Santon@samba.org #define REG "%016lx" 107406d67d54SPaul Mackerras #define REGS_PER_LINE 4 107506d67d54SPaul Mackerras #define LAST_VOLATILE 13 107606d67d54SPaul Mackerras #else 1077f6f7dde3Santon@samba.org #define REG "%08lx" 107806d67d54SPaul Mackerras #define REGS_PER_LINE 8 107906d67d54SPaul Mackerras #define LAST_VOLATILE 12 108006d67d54SPaul Mackerras #endif 108106d67d54SPaul Mackerras 108214cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 108314cf11afSPaul Mackerras { 108414cf11afSPaul Mackerras int i, trap; 108514cf11afSPaul Mackerras 1086a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1087a43cb95dSTejun Heo 108806d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 108906d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 109006d67d54SPaul Mackerras printk("REGS: %p TRAP: %04lx %s (%s)\n", 109196b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 109206d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 109306d67d54SPaul Mackerras printbits(regs->msr, msr_bits); 1094f6f7dde3Santon@samba.org printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 109514cf11afSPaul Mackerras trap = TRAP(regs); 10965115a026SMichael Neuling if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 10979db8bcfdSAnton Blanchard printk("CFAR: "REG" ", regs->orig_gpr3); 1098c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1099ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 11009db8bcfdSAnton Blanchard printk("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 110114170789SKumar Gala #else 11029db8bcfdSAnton Blanchard printk("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 11039db8bcfdSAnton Blanchard #endif 11049db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 11059db8bcfdSAnton Blanchard printk("SOFTE: %ld ", regs->softe); 11069db8bcfdSAnton Blanchard #endif 11079db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 11086d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 11099db8bcfdSAnton Blanchard printk("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 111014170789SKumar Gala #endif 111114cf11afSPaul Mackerras 111214cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 111306d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 1114a2367194SKumar Gala printk("\nGPR%02d: ", i); 111506d67d54SPaul Mackerras printk(REG " ", regs->gpr[i]); 111606d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 111714cf11afSPaul Mackerras break; 111814cf11afSPaul Mackerras } 111914cf11afSPaul Mackerras printk("\n"); 112014cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 112114cf11afSPaul Mackerras /* 112214cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 112314cf11afSPaul Mackerras * above info out without failing 112414cf11afSPaul Mackerras */ 1125058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1126058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 112714cf11afSPaul Mackerras #endif 112814cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 112906d67d54SPaul Mackerras if (!user_mode(regs)) 113006d67d54SPaul Mackerras show_instructions(regs); 113114cf11afSPaul Mackerras } 113214cf11afSPaul Mackerras 113314cf11afSPaul Mackerras void exit_thread(void) 113414cf11afSPaul Mackerras { 113514cf11afSPaul Mackerras } 113614cf11afSPaul Mackerras 113714cf11afSPaul Mackerras void flush_thread(void) 113814cf11afSPaul Mackerras { 1139e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 11405aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1141e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 11423bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1143e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 114414cf11afSPaul Mackerras } 114514cf11afSPaul Mackerras 114614cf11afSPaul Mackerras void 114714cf11afSPaul Mackerras release_thread(struct task_struct *t) 114814cf11afSPaul Mackerras { 114914cf11afSPaul Mackerras } 115014cf11afSPaul Mackerras 115114cf11afSPaul Mackerras /* 115255ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 115355ccf3feSSuresh Siddha * copy the current task into the new thread. 115414cf11afSPaul Mackerras */ 115555ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 115614cf11afSPaul Mackerras { 1157579e633eSAnton Blanchard flush_all_to_thread(src); 1158621b5060SMichael Neuling /* 1159621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1160621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1161621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1162621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1163621b5060SMichael Neuling * checkpointed state back and the TM mode. 1164621b5060SMichael Neuling */ 1165621b5060SMichael Neuling __switch_to_tm(src); 1166621b5060SMichael Neuling tm_recheckpoint_new_task(src); 1167330a1eb7SMichael Ellerman 116855ccf3feSSuresh Siddha *dst = *src; 1169330a1eb7SMichael Ellerman 1170330a1eb7SMichael Ellerman clear_task_ebb(dst); 1171330a1eb7SMichael Ellerman 117255ccf3feSSuresh Siddha return 0; 117314cf11afSPaul Mackerras } 117414cf11afSPaul Mackerras 1175cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1176cec15488SMichael Ellerman { 1177cec15488SMichael Ellerman #ifdef CONFIG_PPC_STD_MMU_64 1178cec15488SMichael Ellerman unsigned long sp_vsid; 1179cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1180cec15488SMichael Ellerman 1181cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1182cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1183cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1184cec15488SMichael Ellerman else 1185cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1186cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1187cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1188cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1189cec15488SMichael Ellerman #endif 1190cec15488SMichael Ellerman } 1191cec15488SMichael Ellerman 119214cf11afSPaul Mackerras /* 119314cf11afSPaul Mackerras * Copy a thread.. 119414cf11afSPaul Mackerras */ 1195efcac658SAlexey Kardashevskiy 11966eca8933SAlex Dowad /* 11976eca8933SAlex Dowad * Copy architecture-specific thread state 11986eca8933SAlex Dowad */ 11996f2c55b8SAlexey Dobriyan int copy_thread(unsigned long clone_flags, unsigned long usp, 12006eca8933SAlex Dowad unsigned long kthread_arg, struct task_struct *p) 120114cf11afSPaul Mackerras { 120214cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 120314cf11afSPaul Mackerras extern void ret_from_fork(void); 120458254e10SAl Viro extern void ret_from_kernel_thread(void); 120558254e10SAl Viro void (*f)(void); 12060cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 120714cf11afSPaul Mackerras 120814cf11afSPaul Mackerras /* Copy registers */ 120914cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 121014cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1211ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 12126eca8933SAlex Dowad /* kernel thread */ 1213138d1ce8SAl Viro struct thread_info *ti = (void *)task_stack_page(p); 121458254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 121514cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 12167cedd601SAnton Blanchard /* function */ 12177cedd601SAnton Blanchard if (usp) 12187cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 121958254e10SAl Viro #ifdef CONFIG_PPC64 1220b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1221138d1ce8SAl Viro childregs->softe = 1; 122206d67d54SPaul Mackerras #endif 12236eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 122414cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1225138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 122658254e10SAl Viro f = ret_from_kernel_thread; 122714cf11afSPaul Mackerras } else { 12286eca8933SAlex Dowad /* user thread */ 1229afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 123058254e10SAl Viro CHECK_FULL_REGS(regs); 123158254e10SAl Viro *childregs = *regs; 1232ea516b11SAl Viro if (usp) 123314cf11afSPaul Mackerras childregs->gpr[1] = usp; 123414cf11afSPaul Mackerras p->thread.regs = childregs; 123558254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 123606d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 123706d67d54SPaul Mackerras #ifdef CONFIG_PPC64 12389904b005SDenis Kirjanov if (!is_32bit_task()) 123906d67d54SPaul Mackerras childregs->gpr[13] = childregs->gpr[6]; 124006d67d54SPaul Mackerras else 124106d67d54SPaul Mackerras #endif 124214cf11afSPaul Mackerras childregs->gpr[2] = childregs->gpr[6]; 124314cf11afSPaul Mackerras } 124458254e10SAl Viro 124558254e10SAl Viro f = ret_from_fork; 124606d67d54SPaul Mackerras } 124714cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 124814cf11afSPaul Mackerras 124914cf11afSPaul Mackerras /* 125014cf11afSPaul Mackerras * The way this works is that at some point in the future 125114cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 125214cf11afSPaul Mackerras * That will pop off the stack frame created below and start 125314cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 125414cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 125514cf11afSPaul Mackerras * system call, using the stack frame created above. 125614cf11afSPaul Mackerras */ 1257af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 125814cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 125914cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 126014cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 126114cf11afSPaul Mackerras p->thread.ksp = sp; 1262cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 126385218827SKumar Gala p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 126485218827SKumar Gala _ALIGN_UP(sizeof(struct thread_info), 16); 1265cbc9565eSBenjamin Herrenschmidt #endif 126628d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 126728d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 126828d170abSOleg Nesterov #endif 126928d170abSOleg Nesterov 127018461960SPaul Mackerras p->thread.fp_save_area = NULL; 127118461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 127218461960SPaul Mackerras p->thread.vr_save_area = NULL; 127318461960SPaul Mackerras #endif 127418461960SPaul Mackerras 1275cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 127606d67d54SPaul Mackerras 1277efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1278efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 12791021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1280efcac658SAlexey Kardashevskiy p->thread.dscr = current->thread.dscr; 1281efcac658SAlexey Kardashevskiy } 128292779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 128392779245SHaren Myneni p->thread.ppr = INIT_PPR; 1284efcac658SAlexey Kardashevskiy #endif 12857cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 128614cf11afSPaul Mackerras return 0; 128714cf11afSPaul Mackerras } 128814cf11afSPaul Mackerras 128914cf11afSPaul Mackerras /* 129014cf11afSPaul Mackerras * Set up a thread for executing a new program 129114cf11afSPaul Mackerras */ 129206d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 129314cf11afSPaul Mackerras { 129490eac727SMichael Ellerman #ifdef CONFIG_PPC64 129590eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 129690eac727SMichael Ellerman #endif 129790eac727SMichael Ellerman 129806d67d54SPaul Mackerras /* 129906d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 130006d67d54SPaul Mackerras * set. Do it now. 130106d67d54SPaul Mackerras */ 130206d67d54SPaul Mackerras if (!current->thread.regs) { 13030cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 13040cec6fd1SAl Viro current->thread.regs = regs - 1; 130506d67d54SPaul Mackerras } 130606d67d54SPaul Mackerras 130714cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 130814cf11afSPaul Mackerras regs->ctr = 0; 130914cf11afSPaul Mackerras regs->link = 0; 131014cf11afSPaul Mackerras regs->xer = 0; 131114cf11afSPaul Mackerras regs->ccr = 0; 131214cf11afSPaul Mackerras regs->gpr[1] = sp; 131306d67d54SPaul Mackerras 1314474f8196SRoland McGrath /* 1315474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1316474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1317474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1318474f8196SRoland McGrath */ 1319474f8196SRoland McGrath regs->trap &= ~1UL; 1320474f8196SRoland McGrath 132106d67d54SPaul Mackerras #ifdef CONFIG_PPC32 132206d67d54SPaul Mackerras regs->mq = 0; 132306d67d54SPaul Mackerras regs->nip = start; 132414cf11afSPaul Mackerras regs->msr = MSR_USER; 132506d67d54SPaul Mackerras #else 13269904b005SDenis Kirjanov if (!is_32bit_task()) { 132794af3abfSRusty Russell unsigned long entry; 132806d67d54SPaul Mackerras 132994af3abfSRusty Russell if (is_elf2_task()) { 133094af3abfSRusty Russell /* Look ma, no function descriptors! */ 133194af3abfSRusty Russell entry = start; 133294af3abfSRusty Russell 133394af3abfSRusty Russell /* 133494af3abfSRusty Russell * Ulrich says: 133594af3abfSRusty Russell * The latest iteration of the ABI requires that when 133694af3abfSRusty Russell * calling a function (at its global entry point), 133794af3abfSRusty Russell * the caller must ensure r12 holds the entry point 133894af3abfSRusty Russell * address (so that the function can quickly 133994af3abfSRusty Russell * establish addressability). 134094af3abfSRusty Russell */ 134194af3abfSRusty Russell regs->gpr[12] = start; 134294af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 134394af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 134494af3abfSRusty Russell } else { 134594af3abfSRusty Russell unsigned long toc; 134694af3abfSRusty Russell 134794af3abfSRusty Russell /* start is a relocated pointer to the function 134894af3abfSRusty Russell * descriptor for the elf _start routine. The first 134994af3abfSRusty Russell * entry in the function descriptor is the entry 135094af3abfSRusty Russell * address of _start and the second entry is the TOC 135194af3abfSRusty Russell * value we need to use. 135206d67d54SPaul Mackerras */ 135306d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 135406d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 135506d67d54SPaul Mackerras 135606d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 135706d67d54SPaul Mackerras * need to be relocated before we can use them. 135806d67d54SPaul Mackerras */ 135906d67d54SPaul Mackerras if (load_addr != 0) { 136006d67d54SPaul Mackerras entry += load_addr; 136106d67d54SPaul Mackerras toc += load_addr; 136206d67d54SPaul Mackerras } 136306d67d54SPaul Mackerras regs->gpr[2] = toc; 136494af3abfSRusty Russell } 136594af3abfSRusty Russell regs->nip = entry; 136606d67d54SPaul Mackerras regs->msr = MSR_USER64; 1367d4bf9a78SStephen Rothwell } else { 1368d4bf9a78SStephen Rothwell regs->nip = start; 1369d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1370d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 137106d67d54SPaul Mackerras } 137206d67d54SPaul Mackerras #endif 1373ce48b210SMichael Neuling #ifdef CONFIG_VSX 1374ce48b210SMichael Neuling current->thread.used_vsr = 0; 1375ce48b210SMichael Neuling #endif 1376de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 137718461960SPaul Mackerras current->thread.fp_save_area = NULL; 137814cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1379de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1380de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 138118461960SPaul Mackerras current->thread.vr_save_area = NULL; 138214cf11afSPaul Mackerras current->thread.vrsave = 0; 138314cf11afSPaul Mackerras current->thread.used_vr = 0; 138414cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 138514cf11afSPaul Mackerras #ifdef CONFIG_SPE 138614cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 138714cf11afSPaul Mackerras current->thread.acc = 0; 138814cf11afSPaul Mackerras current->thread.spefscr = 0; 138914cf11afSPaul Mackerras current->thread.used_spe = 0; 139014cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1391bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1392bc2a9408SMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) 1393bc2a9408SMichael Neuling regs->msr |= MSR_TM; 1394bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1395bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1396bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 1397bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 139814cf11afSPaul Mackerras } 1399e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 140014cf11afSPaul Mackerras 140114cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 140214cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 140314cf11afSPaul Mackerras 140414cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 140514cf11afSPaul Mackerras { 140614cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 140714cf11afSPaul Mackerras 140814cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 140914cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 141014cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 141114cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 141214cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 141314cf11afSPaul Mackerras #ifdef CONFIG_SPE 14145e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1415640e9225SJoseph Myers /* 1416640e9225SJoseph Myers * When the sticky exception bits are set 1417640e9225SJoseph Myers * directly by userspace, it must call prctl 1418640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1419640e9225SJoseph Myers * in the existing prctl settings) or 1420640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1421640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1422640e9225SJoseph Myers * saving and restoring the whole 1423640e9225SJoseph Myers * floating-point environment need to do so 1424640e9225SJoseph Myers * anyway to restore the prctl settings from 1425640e9225SJoseph Myers * the saved environment. 1426640e9225SJoseph Myers */ 1427640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 142814cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 142914cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 143006d67d54SPaul Mackerras return 0; 14315e14d21eSKumar Gala } else { 14325e14d21eSKumar Gala return -EINVAL; 14335e14d21eSKumar Gala } 143414cf11afSPaul Mackerras #else 143514cf11afSPaul Mackerras return -EINVAL; 143614cf11afSPaul Mackerras #endif 143706d67d54SPaul Mackerras } 143806d67d54SPaul Mackerras 143914cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 144014cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 144114cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 144214cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 144314cf11afSPaul Mackerras * them does not change anything */ 144414cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 144514cf11afSPaul Mackerras return -EINVAL; 144614cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 144714cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 144814cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 144914cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 145014cf11afSPaul Mackerras return 0; 145114cf11afSPaul Mackerras } 145214cf11afSPaul Mackerras 145314cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 145414cf11afSPaul Mackerras { 145514cf11afSPaul Mackerras unsigned int val; 145614cf11afSPaul Mackerras 145714cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 145814cf11afSPaul Mackerras #ifdef CONFIG_SPE 1459640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1460640e9225SJoseph Myers /* 1461640e9225SJoseph Myers * When the sticky exception bits are set 1462640e9225SJoseph Myers * directly by userspace, it must call prctl 1463640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1464640e9225SJoseph Myers * in the existing prctl settings) or 1465640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1466640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1467640e9225SJoseph Myers * saving and restoring the whole 1468640e9225SJoseph Myers * floating-point environment need to do so 1469640e9225SJoseph Myers * anyway to restore the prctl settings from 1470640e9225SJoseph Myers * the saved environment. 1471640e9225SJoseph Myers */ 1472640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 147314cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1474640e9225SJoseph Myers } else 14755e14d21eSKumar Gala return -EINVAL; 147614cf11afSPaul Mackerras #else 147714cf11afSPaul Mackerras return -EINVAL; 147814cf11afSPaul Mackerras #endif 147914cf11afSPaul Mackerras else 148014cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 148114cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 148214cf11afSPaul Mackerras } 148314cf11afSPaul Mackerras 1484fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1485fab5db97SPaul Mackerras { 1486fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1487fab5db97SPaul Mackerras 1488fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1489fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1490fab5db97SPaul Mackerras return -EINVAL; 1491fab5db97SPaul Mackerras 1492fab5db97SPaul Mackerras if (regs == NULL) 1493fab5db97SPaul Mackerras return -EINVAL; 1494fab5db97SPaul Mackerras 1495fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1496fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1497fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1498fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1499fab5db97SPaul Mackerras else 1500fab5db97SPaul Mackerras return -EINVAL; 1501fab5db97SPaul Mackerras 1502fab5db97SPaul Mackerras return 0; 1503fab5db97SPaul Mackerras } 1504fab5db97SPaul Mackerras 1505fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 1506fab5db97SPaul Mackerras { 1507fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1508fab5db97SPaul Mackerras unsigned int val; 1509fab5db97SPaul Mackerras 1510fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 1511fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 1512fab5db97SPaul Mackerras return -EINVAL; 1513fab5db97SPaul Mackerras 1514fab5db97SPaul Mackerras if (regs == NULL) 1515fab5db97SPaul Mackerras return -EINVAL; 1516fab5db97SPaul Mackerras 1517fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 1518fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 1519fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 1520fab5db97SPaul Mackerras else 1521fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 1522fab5db97SPaul Mackerras } else 1523fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 1524fab5db97SPaul Mackerras 1525fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 1526fab5db97SPaul Mackerras } 1527fab5db97SPaul Mackerras 1528e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 1529e9370ae1SPaul Mackerras { 1530e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 1531e9370ae1SPaul Mackerras return 0; 1532e9370ae1SPaul Mackerras } 1533e9370ae1SPaul Mackerras 1534e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1535e9370ae1SPaul Mackerras { 1536e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1537e9370ae1SPaul Mackerras } 1538e9370ae1SPaul Mackerras 1539bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1540bb72c481SPaul Mackerras unsigned long nbytes) 1541bb72c481SPaul Mackerras { 1542bb72c481SPaul Mackerras unsigned long stack_page; 1543bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 1544bb72c481SPaul Mackerras 1545bb72c481SPaul Mackerras /* 1546bb72c481SPaul Mackerras * Avoid crashing if the stack has overflowed and corrupted 1547bb72c481SPaul Mackerras * task_cpu(p), which is in the thread_info struct. 1548bb72c481SPaul Mackerras */ 1549bb72c481SPaul Mackerras if (cpu < NR_CPUS && cpu_possible(cpu)) { 1550bb72c481SPaul Mackerras stack_page = (unsigned long) hardirq_ctx[cpu]; 1551bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1552bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1553bb72c481SPaul Mackerras return 1; 1554bb72c481SPaul Mackerras 1555bb72c481SPaul Mackerras stack_page = (unsigned long) softirq_ctx[cpu]; 1556bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1557bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1558bb72c481SPaul Mackerras return 1; 1559bb72c481SPaul Mackerras } 1560bb72c481SPaul Mackerras return 0; 1561bb72c481SPaul Mackerras } 1562bb72c481SPaul Mackerras 15632f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 156414cf11afSPaul Mackerras unsigned long nbytes) 156514cf11afSPaul Mackerras { 15660cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 156714cf11afSPaul Mackerras 156814cf11afSPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 156914cf11afSPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 157014cf11afSPaul Mackerras return 1; 157114cf11afSPaul Mackerras 1572bb72c481SPaul Mackerras return valid_irq_stack(sp, p, nbytes); 157314cf11afSPaul Mackerras } 157414cf11afSPaul Mackerras 15752f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 15762f25194dSAnton Blanchard 157706d67d54SPaul Mackerras unsigned long get_wchan(struct task_struct *p) 157806d67d54SPaul Mackerras { 157906d67d54SPaul Mackerras unsigned long ip, sp; 158006d67d54SPaul Mackerras int count = 0; 158106d67d54SPaul Mackerras 158206d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 158306d67d54SPaul Mackerras return 0; 158406d67d54SPaul Mackerras 158506d67d54SPaul Mackerras sp = p->thread.ksp; 1586ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 158706d67d54SPaul Mackerras return 0; 158806d67d54SPaul Mackerras 158906d67d54SPaul Mackerras do { 159006d67d54SPaul Mackerras sp = *(unsigned long *)sp; 1591ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 159206d67d54SPaul Mackerras return 0; 159306d67d54SPaul Mackerras if (count > 0) { 1594ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 159506d67d54SPaul Mackerras if (!in_sched_functions(ip)) 159606d67d54SPaul Mackerras return ip; 159706d67d54SPaul Mackerras } 159806d67d54SPaul Mackerras } while (count++ < 16); 159906d67d54SPaul Mackerras return 0; 160006d67d54SPaul Mackerras } 160106d67d54SPaul Mackerras 1602c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 160314cf11afSPaul Mackerras 160414cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 160514cf11afSPaul Mackerras { 160606d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 160714cf11afSPaul Mackerras int count = 0; 160806d67d54SPaul Mackerras int firstframe = 1; 16096794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 16106794c782SSteven Rostedt int curr_frame = current->curr_ret_stack; 16116794c782SSteven Rostedt extern void return_to_handler(void); 16129135c3ccSSteven Rostedt unsigned long rth = (unsigned long)return_to_handler; 16136794c782SSteven Rostedt #endif 161414cf11afSPaul Mackerras 161514cf11afSPaul Mackerras sp = (unsigned long) stack; 161614cf11afSPaul Mackerras if (tsk == NULL) 161714cf11afSPaul Mackerras tsk = current; 161814cf11afSPaul Mackerras if (sp == 0) { 161914cf11afSPaul Mackerras if (tsk == current) 1620acf620ecSAnton Blanchard sp = current_stack_pointer(); 162114cf11afSPaul Mackerras else 162214cf11afSPaul Mackerras sp = tsk->thread.ksp; 162314cf11afSPaul Mackerras } 162414cf11afSPaul Mackerras 162506d67d54SPaul Mackerras lr = 0; 162606d67d54SPaul Mackerras printk("Call Trace:\n"); 162714cf11afSPaul Mackerras do { 1628ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 162906d67d54SPaul Mackerras return; 163006d67d54SPaul Mackerras 163106d67d54SPaul Mackerras stack = (unsigned long *) sp; 163206d67d54SPaul Mackerras newsp = stack[0]; 1633ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 163406d67d54SPaul Mackerras if (!firstframe || ip != lr) { 1635058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 16366794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 16377d56c65aSAnton Blanchard if ((ip == rth) && curr_frame >= 0) { 16386794c782SSteven Rostedt printk(" (%pS)", 16396794c782SSteven Rostedt (void *)current->ret_stack[curr_frame].ret); 16406794c782SSteven Rostedt curr_frame--; 16416794c782SSteven Rostedt } 16426794c782SSteven Rostedt #endif 164306d67d54SPaul Mackerras if (firstframe) 164406d67d54SPaul Mackerras printk(" (unreliable)"); 164506d67d54SPaul Mackerras printk("\n"); 164614cf11afSPaul Mackerras } 164706d67d54SPaul Mackerras firstframe = 0; 164806d67d54SPaul Mackerras 164906d67d54SPaul Mackerras /* 165006d67d54SPaul Mackerras * See if this is an exception frame. 165106d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 165206d67d54SPaul Mackerras */ 1653ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1654ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 165506d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 165606d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 165706d67d54SPaul Mackerras lr = regs->link; 16589be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 1659058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 166006d67d54SPaul Mackerras firstframe = 1; 166114cf11afSPaul Mackerras } 166206d67d54SPaul Mackerras 166306d67d54SPaul Mackerras sp = newsp; 166406d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 166506d67d54SPaul Mackerras } 166606d67d54SPaul Mackerras 1667cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 1668fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 16690e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 1670cb2c9b27SAnton Blanchard { 1671fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1672cb2c9b27SAnton Blanchard unsigned long ctrl; 1673cb2c9b27SAnton Blanchard 1674cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1675cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 1676cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1677cb2c9b27SAnton Blanchard 1678fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 1679cb2c9b27SAnton Blanchard } 1680cb2c9b27SAnton Blanchard 1681fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 16820e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 1683cb2c9b27SAnton Blanchard { 1684fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1685cb2c9b27SAnton Blanchard unsigned long ctrl; 1686cb2c9b27SAnton Blanchard 1687fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 1688cb2c9b27SAnton Blanchard 1689cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1690cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 1691cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1692cb2c9b27SAnton Blanchard } 1693fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 1694f6a61680SBenjamin Herrenschmidt 1695d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 1696d839088cSAnton Blanchard { 1697d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1698d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 1699d839088cSAnton Blanchard return sp & ~0xf; 1700d839088cSAnton Blanchard } 1701912f9ee2SAnton Blanchard 1702912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 1703912f9ee2SAnton Blanchard { 1704912f9ee2SAnton Blanchard unsigned long rnd = 0; 1705912f9ee2SAnton Blanchard 1706912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 1707912f9ee2SAnton Blanchard if (is_32bit_task()) 1708912f9ee2SAnton Blanchard rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT))); 1709912f9ee2SAnton Blanchard else 1710912f9ee2SAnton Blanchard rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT))); 1711912f9ee2SAnton Blanchard 1712912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 1713912f9ee2SAnton Blanchard } 1714912f9ee2SAnton Blanchard 1715912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 1716912f9ee2SAnton Blanchard { 17178bbde7a7SAnton Blanchard unsigned long base = mm->brk; 17188bbde7a7SAnton Blanchard unsigned long ret; 17198bbde7a7SAnton Blanchard 1720ce7a35c7SKumar Gala #ifdef CONFIG_PPC_STD_MMU_64 17218bbde7a7SAnton Blanchard /* 17228bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 17238bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 17248bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 17258bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 17268bbde7a7SAnton Blanchard * performance penalty. 17278bbde7a7SAnton Blanchard */ 17288bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 17298bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 17308bbde7a7SAnton Blanchard #endif 17318bbde7a7SAnton Blanchard 17328bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 1733912f9ee2SAnton Blanchard 1734912f9ee2SAnton Blanchard if (ret < mm->brk) 1735912f9ee2SAnton Blanchard return mm->brk; 1736912f9ee2SAnton Blanchard 1737912f9ee2SAnton Blanchard return ret; 1738912f9ee2SAnton Blanchard } 1739501cb16dSAnton Blanchard 1740