12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 214cf11afSPaul Mackerras /* 314cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 414cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 514cf11afSPaul Mackerras * 614cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 714cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 814cf11afSPaul Mackerras * 914cf11afSPaul Mackerras * PowerPC version 1014cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1114cf11afSPaul Mackerras */ 1214cf11afSPaul Mackerras 1314cf11afSPaul Mackerras #include <linux/errno.h> 1414cf11afSPaul Mackerras #include <linux/sched.h> 15b17b0153SIngo Molnar #include <linux/sched/debug.h> 1629930025SIngo Molnar #include <linux/sched/task.h> 1768db0cf1SIngo Molnar #include <linux/sched/task_stack.h> 1814cf11afSPaul Mackerras #include <linux/kernel.h> 1914cf11afSPaul Mackerras #include <linux/mm.h> 2014cf11afSPaul Mackerras #include <linux/smp.h> 2114cf11afSPaul Mackerras #include <linux/stddef.h> 2214cf11afSPaul Mackerras #include <linux/unistd.h> 2314cf11afSPaul Mackerras #include <linux/ptrace.h> 2414cf11afSPaul Mackerras #include <linux/slab.h> 2514cf11afSPaul Mackerras #include <linux/user.h> 2614cf11afSPaul Mackerras #include <linux/elf.h> 2714cf11afSPaul Mackerras #include <linux/prctl.h> 2814cf11afSPaul Mackerras #include <linux/init_task.h> 294b16f8e2SPaul Gortmaker #include <linux/export.h> 3014cf11afSPaul Mackerras #include <linux/kallsyms.h> 3114cf11afSPaul Mackerras #include <linux/mqueue.h> 3214cf11afSPaul Mackerras #include <linux/hardirq.h> 3306d67d54SPaul Mackerras #include <linux/utsname.h> 346794c782SSteven Rostedt #include <linux/ftrace.h> 3579741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 36d839088cSAnton Blanchard #include <linux/personality.h> 37d839088cSAnton Blanchard #include <linux/random.h> 385aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 397b051f66SAnton Blanchard #include <linux/uaccess.h> 407f92bc56SDaniel Axtens #include <linux/elf-randomize.h> 4106bb53b3SRam Pai #include <linux/pkeys.h> 42fb2d9505SChristophe Leroy #include <linux/seq_buf.h> 4314cf11afSPaul Mackerras 443a96570fSNicholas Piggin #include <asm/interrupt.h> 4514cf11afSPaul Mackerras #include <asm/io.h> 4614cf11afSPaul Mackerras #include <asm/processor.h> 4714cf11afSPaul Mackerras #include <asm/mmu.h> 4814cf11afSPaul Mackerras #include <asm/prom.h> 4976032de8SMichael Ellerman #include <asm/machdep.h> 50c6622f63SPaul Mackerras #include <asm/time.h> 51ae3a197eSDavid Howells #include <asm/runlatch.h> 52a7f31841SArnd Bergmann #include <asm/syscalls.h> 53ae3a197eSDavid Howells #include <asm/switch_to.h> 54fb09692eSMichael Neuling #include <asm/tm.h> 55ae3a197eSDavid Howells #include <asm/debug.h> 5606d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5706d67d54SPaul Mackerras #include <asm/firmware.h> 58c2e480baSMadhavan Srinivasan #include <asm/hw_irq.h> 5906d67d54SPaul Mackerras #endif 607cedd601SAnton Blanchard #include <asm/code-patching.h> 617f92bc56SDaniel Axtens #include <asm/exec.h> 625d31a96eSMichael Ellerman #include <asm/livepatch.h> 63b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 640545d543SDaniel Axtens #include <asm/asm-prototypes.h> 65c9386bfdSChristophe Leroy #include <asm/stacktrace.h> 66c1fe190cSMichael Neuling #include <asm/hw_breakpoint.h> 675d31a96eSMichael Ellerman 68d6a61bfcSLuis Machado #include <linux/kprobes.h> 69d6a61bfcSLuis Machado #include <linux/kdebug.h> 7014cf11afSPaul Mackerras 718b3c34cfSMichael Neuling /* Transactional Memory debug */ 728b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 738b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 748b3c34cfSMichael Neuling #else 758b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 768b3c34cfSMichael Neuling #endif 778b3c34cfSMichael Neuling 7814cf11afSPaul Mackerras extern unsigned long _get_SP(void); 7914cf11afSPaul Mackerras 80d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8154820530SMichael Ellerman /* 8254820530SMichael Ellerman * Are we running in "Suspend disabled" mode? If so we have to block any 8354820530SMichael Ellerman * sigreturn that would get us into suspended state, and we also warn in some 8454820530SMichael Ellerman * other paths that we should never reach with suspend disabled. 8554820530SMichael Ellerman */ 8654820530SMichael Ellerman bool tm_suspend_disabled __ro_after_init = false; 8754820530SMichael Ellerman 88b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 89d31626f7SPaul Mackerras { 90d31626f7SPaul Mackerras /* 91d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 92d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 93d31626f7SPaul Mackerras * bit so that we know to restore the registers before 94d31626f7SPaul Mackerras * returning to userspace. 95d31626f7SPaul Mackerras */ 96d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 97d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 98d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 9959dc5bfcSNicholas Piggin regs_set_return_msr(&tsk->thread.ckpt_regs, 10059dc5bfcSNicholas Piggin tsk->thread.regs->msr); 101d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 102d31626f7SPaul Mackerras } 103d31626f7SPaul Mackerras } 104dc16b553SCyril Bur 105d31626f7SPaul Mackerras #else 106b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 107d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 108d31626f7SPaul Mackerras 1093eb5d588SAnton Blanchard bool strict_msr_control; 1103eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 1113eb5d588SAnton Blanchard 1123eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 1133eb5d588SAnton Blanchard { 1143eb5d588SAnton Blanchard strict_msr_control = true; 1153eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1163eb5d588SAnton Blanchard 1173eb5d588SAnton Blanchard return 0; 1183eb5d588SAnton Blanchard } 1193eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1203eb5d588SAnton Blanchard 121e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 122e2b36d59SNicholas Piggin unsigned long notrace msr_check_and_set(unsigned long bits) 123a0e72cf1SAnton Blanchard { 124a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 125a0e72cf1SAnton Blanchard unsigned long newmsr; 126a0e72cf1SAnton Blanchard 127a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 128a0e72cf1SAnton Blanchard 129a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 130a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 131a0e72cf1SAnton Blanchard 132a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 133a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 1343cee070aSCyril Bur 1353cee070aSCyril Bur return newmsr; 136a0e72cf1SAnton Blanchard } 137d1c72112SSimon Guo EXPORT_SYMBOL_GPL(msr_check_and_set); 138a0e72cf1SAnton Blanchard 139e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 140e2b36d59SNicholas Piggin void notrace __msr_check_and_clear(unsigned long bits) 141a0e72cf1SAnton Blanchard { 142a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 143a0e72cf1SAnton Blanchard unsigned long newmsr; 144a0e72cf1SAnton Blanchard 145a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 146a0e72cf1SAnton Blanchard 147a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 148a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 149a0e72cf1SAnton Blanchard 150a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 151a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 152a0e72cf1SAnton Blanchard } 1533eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 154a0e72cf1SAnton Blanchard 155037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1561cdf039bSMathieu Malaterre static void __giveup_fpu(struct task_struct *tsk) 1578792468dSCyril Bur { 1588eb98037SAnton Blanchard unsigned long msr; 1598eb98037SAnton Blanchard 1608792468dSCyril Bur save_fpu(tsk); 1618eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 162fe1ef6bcSMark Cave-Ayland msr &= ~(MSR_FP|MSR_FE0|MSR_FE1); 1638792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1648eb98037SAnton Blanchard msr &= ~MSR_VSX; 16559dc5bfcSNicholas Piggin regs_set_return_msr(tsk->thread.regs, msr); 1668792468dSCyril Bur } 1678792468dSCyril Bur 16898da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 16998da581eSAnton Blanchard { 17098da581eSAnton Blanchard check_if_tm_restore_required(tsk); 17198da581eSAnton Blanchard 172a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 17398da581eSAnton Blanchard __giveup_fpu(tsk); 174a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 17598da581eSAnton Blanchard } 17698da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 17798da581eSAnton Blanchard 17814cf11afSPaul Mackerras /* 17914cf11afSPaul Mackerras * Make sure the floating-point register state in the 18014cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 18114cf11afSPaul Mackerras */ 18214cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 18314cf11afSPaul Mackerras { 18414cf11afSPaul Mackerras if (tsk->thread.regs) { 18514cf11afSPaul Mackerras /* 18614cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 18714cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 18814cf11afSPaul Mackerras * test but before we have finished saving the FP registers 18914cf11afSPaul Mackerras * to the thread_struct. That process could take over the 19014cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 19114cf11afSPaul Mackerras * bogus values for the remaining FP registers. 19214cf11afSPaul Mackerras */ 19314cf11afSPaul Mackerras preempt_disable(); 19414cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 19514cf11afSPaul Mackerras /* 19614cf11afSPaul Mackerras * This should only ever be called for current or 19714cf11afSPaul Mackerras * for a stopped child process. Since we save away 198af1bbc3dSAnton Blanchard * the FP register state on context switch, 19914cf11afSPaul Mackerras * there is something wrong if a stopped child appears 20014cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 20114cf11afSPaul Mackerras */ 20214cf11afSPaul Mackerras BUG_ON(tsk != current); 203b86fd2bdSAnton Blanchard giveup_fpu(tsk); 20414cf11afSPaul Mackerras } 20514cf11afSPaul Mackerras preempt_enable(); 20614cf11afSPaul Mackerras } 20714cf11afSPaul Mackerras } 208de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 20914cf11afSPaul Mackerras 21014cf11afSPaul Mackerras void enable_kernel_fp(void) 21114cf11afSPaul Mackerras { 212e909fb83SCyril Bur unsigned long cpumsr; 213e909fb83SCyril Bur 21414cf11afSPaul Mackerras WARN_ON(preemptible()); 21514cf11afSPaul Mackerras 216e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP); 217611b0e5cSAnton Blanchard 218d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 219d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 220e909fb83SCyril Bur /* 221e909fb83SCyril Bur * If a thread has already been reclaimed then the 222e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 223e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 224e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 225e909fb83SCyril Bur * checkpointed structure. 226e909fb83SCyril Bur */ 2275c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2285c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 229e909fb83SCyril Bur return; 230a0e72cf1SAnton Blanchard __giveup_fpu(current); 231b86fd2bdSAnton Blanchard } 232d64d02ceSAnton Blanchard } 23314cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 234c83c192aSChristophe Leroy #else 235c83c192aSChristophe Leroy static inline void __giveup_fpu(struct task_struct *tsk) { } 236d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 23714cf11afSPaul Mackerras 23814cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 2396f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2406f515d84SCyril Bur { 2418eb98037SAnton Blanchard unsigned long msr; 2428eb98037SAnton Blanchard 2436f515d84SCyril Bur save_altivec(tsk); 2448eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2458eb98037SAnton Blanchard msr &= ~MSR_VEC; 2466f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2478eb98037SAnton Blanchard msr &= ~MSR_VSX; 24859dc5bfcSNicholas Piggin regs_set_return_msr(tsk->thread.regs, msr); 2496f515d84SCyril Bur } 2506f515d84SCyril Bur 25198da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 25298da581eSAnton Blanchard { 25398da581eSAnton Blanchard check_if_tm_restore_required(tsk); 25498da581eSAnton Blanchard 255a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 25698da581eSAnton Blanchard __giveup_altivec(tsk); 257a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 25898da581eSAnton Blanchard } 25998da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 26098da581eSAnton Blanchard 26114cf11afSPaul Mackerras void enable_kernel_altivec(void) 26214cf11afSPaul Mackerras { 263e909fb83SCyril Bur unsigned long cpumsr; 264e909fb83SCyril Bur 26514cf11afSPaul Mackerras WARN_ON(preemptible()); 26614cf11afSPaul Mackerras 267e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_VEC); 268611b0e5cSAnton Blanchard 269d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 270d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 271e909fb83SCyril Bur /* 272e909fb83SCyril Bur * If a thread has already been reclaimed then the 273e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 274e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 275e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 276e909fb83SCyril Bur * checkpointed structure. 277e909fb83SCyril Bur */ 2785c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2795c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 280e909fb83SCyril Bur return; 281a0e72cf1SAnton Blanchard __giveup_altivec(current); 282b86fd2bdSAnton Blanchard } 283d64d02ceSAnton Blanchard } 28414cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 28514cf11afSPaul Mackerras 28614cf11afSPaul Mackerras /* 28714cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 28814cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 28914cf11afSPaul Mackerras */ 29014cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 29114cf11afSPaul Mackerras { 29214cf11afSPaul Mackerras if (tsk->thread.regs) { 29314cf11afSPaul Mackerras preempt_disable(); 29414cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 29514cf11afSPaul Mackerras BUG_ON(tsk != current); 296b86fd2bdSAnton Blanchard giveup_altivec(tsk); 29714cf11afSPaul Mackerras } 29814cf11afSPaul Mackerras preempt_enable(); 29914cf11afSPaul Mackerras } 30014cf11afSPaul Mackerras } 301de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 30214cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 30314cf11afSPaul Mackerras 304ce48b210SMichael Neuling #ifdef CONFIG_VSX 305bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 306a7d623d4SAnton Blanchard { 307dc801081SBenjamin Herrenschmidt unsigned long msr = tsk->thread.regs->msr; 308dc801081SBenjamin Herrenschmidt 309dc801081SBenjamin Herrenschmidt /* 310dc801081SBenjamin Herrenschmidt * We should never be ssetting MSR_VSX without also setting 311dc801081SBenjamin Herrenschmidt * MSR_FP and MSR_VEC 312dc801081SBenjamin Herrenschmidt */ 313dc801081SBenjamin Herrenschmidt WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); 314dc801081SBenjamin Herrenschmidt 315dc801081SBenjamin Herrenschmidt /* __giveup_fpu will clear MSR_VSX */ 316dc801081SBenjamin Herrenschmidt if (msr & MSR_FP) 317a7d623d4SAnton Blanchard __giveup_fpu(tsk); 318dc801081SBenjamin Herrenschmidt if (msr & MSR_VEC) 319a7d623d4SAnton Blanchard __giveup_altivec(tsk); 320bf6a4d5bSCyril Bur } 321bf6a4d5bSCyril Bur 322bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 323bf6a4d5bSCyril Bur { 324bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 325bf6a4d5bSCyril Bur 326bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 327a7d623d4SAnton Blanchard __giveup_vsx(tsk); 328a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 329a7d623d4SAnton Blanchard } 330bf6a4d5bSCyril Bur 331ce48b210SMichael Neuling void enable_kernel_vsx(void) 332ce48b210SMichael Neuling { 333e909fb83SCyril Bur unsigned long cpumsr; 334e909fb83SCyril Bur 335ce48b210SMichael Neuling WARN_ON(preemptible()); 336ce48b210SMichael Neuling 337e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 338611b0e5cSAnton Blanchard 3395a69aec9SBenjamin Herrenschmidt if (current->thread.regs && 3405a69aec9SBenjamin Herrenschmidt (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { 341d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 342e909fb83SCyril Bur /* 343e909fb83SCyril Bur * If a thread has already been reclaimed then the 344e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 345e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 346e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 347e909fb83SCyril Bur * checkpointed structure. 348e909fb83SCyril Bur */ 3495c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 3505c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 351e909fb83SCyril Bur return; 352a0e72cf1SAnton Blanchard __giveup_vsx(current); 353611b0e5cSAnton Blanchard } 354ce48b210SMichael Neuling } 355ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 356ce48b210SMichael Neuling 357ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 358ce48b210SMichael Neuling { 359ce48b210SMichael Neuling if (tsk->thread.regs) { 360ce48b210SMichael Neuling preempt_disable(); 3615a69aec9SBenjamin Herrenschmidt if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { 362ce48b210SMichael Neuling BUG_ON(tsk != current); 363ce48b210SMichael Neuling giveup_vsx(tsk); 364ce48b210SMichael Neuling } 365ce48b210SMichael Neuling preempt_enable(); 366ce48b210SMichael Neuling } 367ce48b210SMichael Neuling } 368de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 369ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 370ce48b210SMichael Neuling 37114cf11afSPaul Mackerras #ifdef CONFIG_SPE 37298da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 37398da581eSAnton Blanchard { 37498da581eSAnton Blanchard check_if_tm_restore_required(tsk); 37598da581eSAnton Blanchard 376a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 37798da581eSAnton Blanchard __giveup_spe(tsk); 378a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 37998da581eSAnton Blanchard } 38098da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 38114cf11afSPaul Mackerras 38214cf11afSPaul Mackerras void enable_kernel_spe(void) 38314cf11afSPaul Mackerras { 38414cf11afSPaul Mackerras WARN_ON(preemptible()); 38514cf11afSPaul Mackerras 386a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 387611b0e5cSAnton Blanchard 388d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 389d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 390a0e72cf1SAnton Blanchard __giveup_spe(current); 39114cf11afSPaul Mackerras } 392d64d02ceSAnton Blanchard } 39314cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 39414cf11afSPaul Mackerras 39514cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 39614cf11afSPaul Mackerras { 39714cf11afSPaul Mackerras if (tsk->thread.regs) { 39814cf11afSPaul Mackerras preempt_disable(); 39914cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 40014cf11afSPaul Mackerras BUG_ON(tsk != current); 401685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 4020ee6c15eSKumar Gala giveup_spe(tsk); 40314cf11afSPaul Mackerras } 40414cf11afSPaul Mackerras preempt_enable(); 40514cf11afSPaul Mackerras } 40614cf11afSPaul Mackerras } 40714cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 40814cf11afSPaul Mackerras 409c2085059SAnton Blanchard static unsigned long msr_all_available; 410c2085059SAnton Blanchard 411c2085059SAnton Blanchard static int __init init_msr_all_available(void) 412c2085059SAnton Blanchard { 413c83c192aSChristophe Leroy if (IS_ENABLED(CONFIG_PPC_FPU)) 414c2085059SAnton Blanchard msr_all_available |= MSR_FP; 415c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 416c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 417c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 418c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 419c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 420c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 421c2085059SAnton Blanchard 422c2085059SAnton Blanchard return 0; 423c2085059SAnton Blanchard } 424c2085059SAnton Blanchard early_initcall(init_msr_all_available); 425c2085059SAnton Blanchard 426c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 427c2085059SAnton Blanchard { 428c2085059SAnton Blanchard unsigned long usermsr; 429c2085059SAnton Blanchard 430c2085059SAnton Blanchard if (!tsk->thread.regs) 431c2085059SAnton Blanchard return; 432c2085059SAnton Blanchard 4338205d5d9SGustavo Romero check_if_tm_restore_required(tsk); 4348205d5d9SGustavo Romero 435c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 436c2085059SAnton Blanchard 437c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 438c2085059SAnton Blanchard return; 439c2085059SAnton Blanchard 440c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 441c2085059SAnton Blanchard 44296c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 44396c79b6bSBenjamin Herrenschmidt 444c2085059SAnton Blanchard if (usermsr & MSR_FP) 445c2085059SAnton Blanchard __giveup_fpu(tsk); 446c2085059SAnton Blanchard if (usermsr & MSR_VEC) 447c2085059SAnton Blanchard __giveup_altivec(tsk); 448c2085059SAnton Blanchard if (usermsr & MSR_SPE) 449c2085059SAnton Blanchard __giveup_spe(tsk); 450c2085059SAnton Blanchard 451c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 452c2085059SAnton Blanchard } 453c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 454c2085059SAnton Blanchard 4556cc0c16dSNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 4566cc0c16dSNicholas Piggin #ifdef CONFIG_PPC_FPU 45701eb0187SNicholas Piggin static bool should_restore_fp(void) 4586cc0c16dSNicholas Piggin { 45901eb0187SNicholas Piggin if (current->thread.load_fp) { 4606cc0c16dSNicholas Piggin current->thread.load_fp++; 46101eb0187SNicholas Piggin return true; 4626cc0c16dSNicholas Piggin } 46301eb0187SNicholas Piggin return false; 46401eb0187SNicholas Piggin } 46501eb0187SNicholas Piggin 46601eb0187SNicholas Piggin static void do_restore_fp(void) 46701eb0187SNicholas Piggin { 46801eb0187SNicholas Piggin load_fp_state(¤t->thread.fp_state); 4696cc0c16dSNicholas Piggin } 4706cc0c16dSNicholas Piggin #else 47101eb0187SNicholas Piggin static bool should_restore_fp(void) { return false; } 47201eb0187SNicholas Piggin static void do_restore_fp(void) { } 4736cc0c16dSNicholas Piggin #endif /* CONFIG_PPC_FPU */ 4746cc0c16dSNicholas Piggin 4756cc0c16dSNicholas Piggin #ifdef CONFIG_ALTIVEC 47601eb0187SNicholas Piggin static bool should_restore_altivec(void) 4776cc0c16dSNicholas Piggin { 47801eb0187SNicholas Piggin if (cpu_has_feature(CPU_FTR_ALTIVEC) && (current->thread.load_vec)) { 47901eb0187SNicholas Piggin current->thread.load_vec++; 48001eb0187SNicholas Piggin return true; 4816cc0c16dSNicholas Piggin } 48201eb0187SNicholas Piggin return false; 48301eb0187SNicholas Piggin } 48401eb0187SNicholas Piggin 48501eb0187SNicholas Piggin static void do_restore_altivec(void) 48601eb0187SNicholas Piggin { 48701eb0187SNicholas Piggin load_vr_state(¤t->thread.vr_state); 48801eb0187SNicholas Piggin current->thread.used_vr = 1; 4896cc0c16dSNicholas Piggin } 4906cc0c16dSNicholas Piggin #else 49101eb0187SNicholas Piggin static bool should_restore_altivec(void) { return false; } 49201eb0187SNicholas Piggin static void do_restore_altivec(void) { } 4936cc0c16dSNicholas Piggin #endif /* CONFIG_ALTIVEC */ 4946cc0c16dSNicholas Piggin 49501eb0187SNicholas Piggin static bool should_restore_vsx(void) 4966cc0c16dSNicholas Piggin { 49701eb0187SNicholas Piggin if (cpu_has_feature(CPU_FTR_VSX)) 49801eb0187SNicholas Piggin return true; 49901eb0187SNicholas Piggin return false; 5006cc0c16dSNicholas Piggin } 50180739c2bSChristophe Leroy #ifdef CONFIG_VSX 50201eb0187SNicholas Piggin static void do_restore_vsx(void) 50301eb0187SNicholas Piggin { 50401eb0187SNicholas Piggin current->thread.used_vsr = 1; 5056cc0c16dSNicholas Piggin } 5066cc0c16dSNicholas Piggin #else 50701eb0187SNicholas Piggin static void do_restore_vsx(void) { } 5086cc0c16dSNicholas Piggin #endif /* CONFIG_VSX */ 5096cc0c16dSNicholas Piggin 510e2b36d59SNicholas Piggin /* 511e2b36d59SNicholas Piggin * The exception exit path calls restore_math() with interrupts hard disabled 512e2b36d59SNicholas Piggin * but the soft irq state not "reconciled". ftrace code that calls 513e2b36d59SNicholas Piggin * local_irq_save/restore causes warnings. 514e2b36d59SNicholas Piggin * 515e2b36d59SNicholas Piggin * Rather than complicate the exit path, just don't trace restore_math. This 516e2b36d59SNicholas Piggin * could be done by having ftrace entry code check for this un-reconciled 517e2b36d59SNicholas Piggin * condition where MSR[EE]=0 and PACA_IRQ_HARD_DIS is not set, and 518e2b36d59SNicholas Piggin * temporarily fix it up for the duration of the ftrace call. 519e2b36d59SNicholas Piggin */ 520e2b36d59SNicholas Piggin void notrace restore_math(struct pt_regs *regs) 52170fe3d98SCyril Bur { 52270fe3d98SCyril Bur unsigned long msr; 52301eb0187SNicholas Piggin unsigned long new_msr = 0; 52470fe3d98SCyril Bur 52570fe3d98SCyril Bur msr = regs->msr; 52670fe3d98SCyril Bur 52770fe3d98SCyril Bur /* 52801eb0187SNicholas Piggin * new_msr tracks the facilities that are to be restored. Only reload 52901eb0187SNicholas Piggin * if the bit is not set in the user MSR (if it is set, the registers 53001eb0187SNicholas Piggin * are live for the user thread). 53170fe3d98SCyril Bur */ 53201eb0187SNicholas Piggin if ((!(msr & MSR_FP)) && should_restore_fp()) 533b91eb518SMichael Ellerman new_msr |= MSR_FP; 53470fe3d98SCyril Bur 53501eb0187SNicholas Piggin if ((!(msr & MSR_VEC)) && should_restore_altivec()) 53601eb0187SNicholas Piggin new_msr |= MSR_VEC; 53770fe3d98SCyril Bur 53801eb0187SNicholas Piggin if ((!(msr & MSR_VSX)) && should_restore_vsx()) { 53901eb0187SNicholas Piggin if (((msr | new_msr) & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC)) 54001eb0187SNicholas Piggin new_msr |= MSR_VSX; 54170fe3d98SCyril Bur } 54270fe3d98SCyril Bur 54301eb0187SNicholas Piggin if (new_msr) { 544b91eb518SMichael Ellerman unsigned long fpexc_mode = 0; 545b91eb518SMichael Ellerman 54601eb0187SNicholas Piggin msr_check_and_set(new_msr); 54770fe3d98SCyril Bur 548b91eb518SMichael Ellerman if (new_msr & MSR_FP) { 54901eb0187SNicholas Piggin do_restore_fp(); 55001eb0187SNicholas Piggin 551b91eb518SMichael Ellerman // This also covers VSX, because VSX implies FP 552b91eb518SMichael Ellerman fpexc_mode = current->thread.fpexc_mode; 553b91eb518SMichael Ellerman } 554b91eb518SMichael Ellerman 55501eb0187SNicholas Piggin if (new_msr & MSR_VEC) 55601eb0187SNicholas Piggin do_restore_altivec(); 55701eb0187SNicholas Piggin 55801eb0187SNicholas Piggin if (new_msr & MSR_VSX) 55901eb0187SNicholas Piggin do_restore_vsx(); 56001eb0187SNicholas Piggin 56101eb0187SNicholas Piggin msr_check_and_clear(new_msr); 56201eb0187SNicholas Piggin 56359dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr | new_msr | fpexc_mode); 56401eb0187SNicholas Piggin } 56570fe3d98SCyril Bur } 56660d62bfdSChristophe Leroy #endif /* CONFIG_PPC_BOOK3S_64 */ 56770fe3d98SCyril Bur 5681cdf039bSMathieu Malaterre static void save_all(struct task_struct *tsk) 569de2a20aaSCyril Bur { 570de2a20aaSCyril Bur unsigned long usermsr; 571de2a20aaSCyril Bur 572de2a20aaSCyril Bur if (!tsk->thread.regs) 573de2a20aaSCyril Bur return; 574de2a20aaSCyril Bur 575de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 576de2a20aaSCyril Bur 577de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 578de2a20aaSCyril Bur return; 579de2a20aaSCyril Bur 580de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 581de2a20aaSCyril Bur 58296c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 58396c79b6bSBenjamin Herrenschmidt 584de2a20aaSCyril Bur if (usermsr & MSR_FP) 5858792468dSCyril Bur save_fpu(tsk); 586de2a20aaSCyril Bur 587de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5886f515d84SCyril Bur save_altivec(tsk); 589de2a20aaSCyril Bur 590de2a20aaSCyril Bur if (usermsr & MSR_SPE) 591de2a20aaSCyril Bur __giveup_spe(tsk); 592de2a20aaSCyril Bur 593de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 594de2a20aaSCyril Bur } 595de2a20aaSCyril Bur 596579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 597579e633eSAnton Blanchard { 598579e633eSAnton Blanchard if (tsk->thread.regs) { 599579e633eSAnton Blanchard preempt_disable(); 600579e633eSAnton Blanchard BUG_ON(tsk != current); 601579e633eSAnton Blanchard #ifdef CONFIG_SPE 602579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 603579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 604579e633eSAnton Blanchard #endif 605e9013785SFelipe Rechia save_all(tsk); 606579e633eSAnton Blanchard 607579e633eSAnton Blanchard preempt_enable(); 608579e633eSAnton Blanchard } 609579e633eSAnton Blanchard } 610579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 611579e633eSAnton Blanchard 6123bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6133bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 61447355040SEric W. Biederman unsigned long error_code, int breakpt) 6153bffb652SDave Kleikamp { 61647355040SEric W. Biederman current->thread.trap_nr = TRAP_HWBKPT; 6173bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 6183bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 6193bffb652SDave Kleikamp return; 6203bffb652SDave Kleikamp 6213bffb652SDave Kleikamp /* Deliver the signal to userspace */ 622f71dd7dcSEric W. Biederman force_sig_ptrace_errno_trap(breakpt, /* breakpoint or watchpoint id */ 623f71dd7dcSEric W. Biederman (void __user *)address); 6243bffb652SDave Kleikamp } 6253bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 6265b905d77SRavi Bangoria 6275b905d77SRavi Bangoria static void do_break_handler(struct pt_regs *regs) 6285b905d77SRavi Bangoria { 6295b905d77SRavi Bangoria struct arch_hw_breakpoint null_brk = {0}; 6305b905d77SRavi Bangoria struct arch_hw_breakpoint *info; 631c545b9f0SChristophe Leroy ppc_inst_t instr = ppc_inst(0); 6325b905d77SRavi Bangoria int type = 0; 6335b905d77SRavi Bangoria int size = 0; 6345b905d77SRavi Bangoria unsigned long ea; 6355b905d77SRavi Bangoria int i; 6365b905d77SRavi Bangoria 6375b905d77SRavi Bangoria /* 6385b905d77SRavi Bangoria * If underneath hw supports only one watchpoint, we know it 6395b905d77SRavi Bangoria * caused exception. 8xx also falls into this category. 6405b905d77SRavi Bangoria */ 6415b905d77SRavi Bangoria if (nr_wp_slots() == 1) { 6425b905d77SRavi Bangoria __set_breakpoint(0, &null_brk); 6435b905d77SRavi Bangoria current->thread.hw_brk[0] = null_brk; 6445b905d77SRavi Bangoria current->thread.hw_brk[0].flags |= HW_BRK_FLAG_DISABLED; 6455b905d77SRavi Bangoria return; 6465b905d77SRavi Bangoria } 6475b905d77SRavi Bangoria 6485b905d77SRavi Bangoria /* Otherwise findout which DAWR caused exception and disable it. */ 6495b905d77SRavi Bangoria wp_get_instr_detail(regs, &instr, &type, &size, &ea); 6505b905d77SRavi Bangoria 6515b905d77SRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) { 6525b905d77SRavi Bangoria info = ¤t->thread.hw_brk[i]; 6535b905d77SRavi Bangoria if (!info->address) 6545b905d77SRavi Bangoria continue; 6555b905d77SRavi Bangoria 6565b905d77SRavi Bangoria if (wp_check_constraints(regs, instr, ea, type, size, info)) { 6575b905d77SRavi Bangoria __set_breakpoint(i, &null_brk); 6585b905d77SRavi Bangoria current->thread.hw_brk[i] = null_brk; 6595b905d77SRavi Bangoria current->thread.hw_brk[i].flags |= HW_BRK_FLAG_DISABLED; 6605b905d77SRavi Bangoria } 6615b905d77SRavi Bangoria } 6625b905d77SRavi Bangoria } 6635b905d77SRavi Bangoria 6643a96570fSNicholas Piggin DEFINE_INTERRUPT_HANDLER(do_break) 665d6a61bfcSLuis Machado { 66641ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 66718722ecfSNicholas Piggin if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, regs->dsisr, 668d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 669d6a61bfcSLuis Machado return; 670d6a61bfcSLuis Machado 6719422de3eSMichael Neuling if (debugger_break_match(regs)) 672d6a61bfcSLuis Machado return; 673d6a61bfcSLuis Machado 6745b905d77SRavi Bangoria /* 6755b905d77SRavi Bangoria * We reach here only when watchpoint exception is generated by ptrace 6765b905d77SRavi Bangoria * event (or hw is buggy!). Now if CONFIG_HAVE_HW_BREAKPOINT is set, 6775b905d77SRavi Bangoria * watchpoint is already handled by hw_breakpoint_handler() so we don't 6785b905d77SRavi Bangoria * have to do anything. But when CONFIG_HAVE_HW_BREAKPOINT is not set, 6795b905d77SRavi Bangoria * we need to manually handle the watchpoint here. 6805b905d77SRavi Bangoria */ 6815b905d77SRavi Bangoria if (!IS_ENABLED(CONFIG_HAVE_HW_BREAKPOINT)) 6825b905d77SRavi Bangoria do_break_handler(regs); 6835b905d77SRavi Bangoria 684d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 68518722ecfSNicholas Piggin force_sig_fault(SIGTRAP, TRAP_HWBKPT, (void __user *)regs->dar); 686d6a61bfcSLuis Machado } 6873bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 688d6a61bfcSLuis Machado 6894a8a9379SRavi Bangoria static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk[HBP_NUM_MAX]); 690a2ceff5eSMichael Ellerman 6913bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6923bffb652SDave Kleikamp /* 6933bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 6943bffb652SDave Kleikamp */ 6953bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6963bffb652SDave Kleikamp { 69751ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 6983bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 69951ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 7003bffb652SDave Kleikamp #endif 70151ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 7023bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 70351ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 7043bffb652SDave Kleikamp #endif 70551ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 7063bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 7073bffb652SDave Kleikamp /* 7083bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 7093bffb652SDave Kleikamp */ 71051ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 7113bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 7123bffb652SDave Kleikamp /* 7133bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 7143bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 7153bffb652SDave Kleikamp */ 71651ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 7173bffb652SDave Kleikamp #else 71851ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 7193bffb652SDave Kleikamp #endif 7203bffb652SDave Kleikamp } 7213bffb652SDave Kleikamp 722f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 7233bffb652SDave Kleikamp { 7246cecf76bSScott Wood /* 7256cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 7266cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 7276cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 7286cecf76bSScott Wood */ 7296cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 7306cecf76bSScott Wood 731f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 732f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 7333bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 734f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 735f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 7363bffb652SDave Kleikamp #endif 737f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 738f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 7393bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 740f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 741f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 7423bffb652SDave Kleikamp #endif 743f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 744f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 7453bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 746f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 7473bffb652SDave Kleikamp #endif 7483bffb652SDave Kleikamp } 7493bffb652SDave Kleikamp /* 7503bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 7513bffb652SDave Kleikamp * debug registers, set the debug registers from the values 7523bffb652SDave Kleikamp * stored in the new thread. 7533bffb652SDave Kleikamp */ 754f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 7553bffb652SDave Kleikamp { 75651ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 757f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 758f5f97210SScott Wood prime_debug_regs(new_debug); 7593bffb652SDave Kleikamp } 7603743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 7613bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 762e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 763303e6a9dSRavi Bangoria static void set_breakpoint(int i, struct arch_hw_breakpoint *brk) 764b5ac51d7SChristophe Leroy { 765b5ac51d7SChristophe Leroy preempt_disable(); 766303e6a9dSRavi Bangoria __set_breakpoint(i, brk); 767b5ac51d7SChristophe Leroy preempt_enable(); 768b5ac51d7SChristophe Leroy } 769b5ac51d7SChristophe Leroy 7703bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 7713bffb652SDave Kleikamp { 772303e6a9dSRavi Bangoria int i; 773303e6a9dSRavi Bangoria struct arch_hw_breakpoint null_brk = {0}; 774303e6a9dSRavi Bangoria 775303e6a9dSRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) { 776303e6a9dSRavi Bangoria thread->hw_brk[i] = null_brk; 777252988cbSNicholas Piggin if (ppc_breakpoint_available()) 778303e6a9dSRavi Bangoria set_breakpoint(i, &thread->hw_brk[i]); 779303e6a9dSRavi Bangoria } 780303e6a9dSRavi Bangoria } 781303e6a9dSRavi Bangoria 782303e6a9dSRavi Bangoria static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 783303e6a9dSRavi Bangoria struct arch_hw_breakpoint *b) 784303e6a9dSRavi Bangoria { 785303e6a9dSRavi Bangoria if (a->address != b->address) 786303e6a9dSRavi Bangoria return false; 787303e6a9dSRavi Bangoria if (a->type != b->type) 788303e6a9dSRavi Bangoria return false; 789303e6a9dSRavi Bangoria if (a->len != b->len) 790303e6a9dSRavi Bangoria return false; 791303e6a9dSRavi Bangoria /* no need to check hw_len. it's calculated from address and len */ 792303e6a9dSRavi Bangoria return true; 793303e6a9dSRavi Bangoria } 794303e6a9dSRavi Bangoria 795303e6a9dSRavi Bangoria static void switch_hw_breakpoint(struct task_struct *new) 796303e6a9dSRavi Bangoria { 797303e6a9dSRavi Bangoria int i; 798303e6a9dSRavi Bangoria 799303e6a9dSRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) { 800303e6a9dSRavi Bangoria if (likely(hw_brk_match(this_cpu_ptr(¤t_brk[i]), 801303e6a9dSRavi Bangoria &new->thread.hw_brk[i]))) 802303e6a9dSRavi Bangoria continue; 803303e6a9dSRavi Bangoria 804303e6a9dSRavi Bangoria __set_breakpoint(i, &new->thread.hw_brk[i]); 805303e6a9dSRavi Bangoria } 8063bffb652SDave Kleikamp } 807e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 8083bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 8093bffb652SDave Kleikamp 8109422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 8119422de3eSMichael Neuling { 8129422de3eSMichael Neuling unsigned long dabr, dabrx; 8139422de3eSMichael Neuling 8149422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 8159422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 8169422de3eSMichael Neuling 8179422de3eSMichael Neuling if (ppc_md.set_dabr) 8189422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 8199422de3eSMichael Neuling 820ad3ed15cSChristophe Leroy if (IS_ENABLED(CONFIG_PPC_ADV_DEBUG_REGS)) { 821ad3ed15cSChristophe Leroy mtspr(SPRN_DAC1, dabr); 822ad3ed15cSChristophe Leroy if (IS_ENABLED(CONFIG_PPC_47x)) 823ad3ed15cSChristophe Leroy isync(); 824ad3ed15cSChristophe Leroy return 0; 825ad3ed15cSChristophe Leroy } else if (IS_ENABLED(CONFIG_PPC_BOOK3S)) { 826ad3ed15cSChristophe Leroy mtspr(SPRN_DABR, dabr); 827ad3ed15cSChristophe Leroy if (cpu_has_feature(CPU_FTR_DABRX)) 828ad3ed15cSChristophe Leroy mtspr(SPRN_DABRX, dabrx); 829ad3ed15cSChristophe Leroy return 0; 830ad3ed15cSChristophe Leroy } else { 831ad3ed15cSChristophe Leroy return -EINVAL; 832ad3ed15cSChristophe Leroy } 8339422de3eSMichael Neuling } 8349422de3eSMichael Neuling 83539413ae0SChristophe Leroy static inline int set_breakpoint_8xx(struct arch_hw_breakpoint *brk) 83639413ae0SChristophe Leroy { 83739413ae0SChristophe Leroy unsigned long lctrl1 = LCTRL1_CTE_GT | LCTRL1_CTF_LT | LCTRL1_CRWE_RW | 83839413ae0SChristophe Leroy LCTRL1_CRWF_RW; 83939413ae0SChristophe Leroy unsigned long lctrl2 = LCTRL2_LW0EN | LCTRL2_LW0LADC | LCTRL2_SLW0EN; 840e68ef121SRavi Bangoria unsigned long start_addr = ALIGN_DOWN(brk->address, HW_BREAKPOINT_SIZE); 841e68ef121SRavi Bangoria unsigned long end_addr = ALIGN(brk->address + brk->len, HW_BREAKPOINT_SIZE); 84239413ae0SChristophe Leroy 84339413ae0SChristophe Leroy if (start_addr == 0) 84439413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_F; 845e68ef121SRavi Bangoria else if (end_addr == 0) 84639413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_E; 84739413ae0SChristophe Leroy else 84839413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_EandF; 84939413ae0SChristophe Leroy 85039413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, 0); 85139413ae0SChristophe Leroy 85239413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == 0) 85339413ae0SChristophe Leroy return 0; 85439413ae0SChristophe Leroy 85539413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_READ) 85639413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_RO | LCTRL1_CRWF_RO; 85739413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_WRITE) 85839413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_WO | LCTRL1_CRWF_WO; 85939413ae0SChristophe Leroy 86039413ae0SChristophe Leroy mtspr(SPRN_CMPE, start_addr - 1); 861e68ef121SRavi Bangoria mtspr(SPRN_CMPF, end_addr); 86239413ae0SChristophe Leroy mtspr(SPRN_LCTRL1, lctrl1); 86339413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, lctrl2); 86439413ae0SChristophe Leroy 86539413ae0SChristophe Leroy return 0; 86639413ae0SChristophe Leroy } 86739413ae0SChristophe Leroy 8684a8a9379SRavi Bangoria void __set_breakpoint(int nr, struct arch_hw_breakpoint *brk) 8699422de3eSMichael Neuling { 8704a8a9379SRavi Bangoria memcpy(this_cpu_ptr(¤t_brk[nr]), brk, sizeof(*brk)); 8719422de3eSMichael Neuling 872c1fe190cSMichael Neuling if (dawr_enabled()) 873252988cbSNicholas Piggin // Power8 or later 8744a8a9379SRavi Bangoria set_dawr(nr, brk); 87539413ae0SChristophe Leroy else if (IS_ENABLED(CONFIG_PPC_8xx)) 87639413ae0SChristophe Leroy set_breakpoint_8xx(brk); 877252988cbSNicholas Piggin else if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 878252988cbSNicholas Piggin // Power7 or earlier 87904c32a51SPaul Gortmaker set_dabr(brk); 880252988cbSNicholas Piggin else 881252988cbSNicholas Piggin // Shouldn't happen due to higher level checks 882252988cbSNicholas Piggin WARN_ON_ONCE(1); 8839422de3eSMichael Neuling } 88414cf11afSPaul Mackerras 885404b27d6SMichael Neuling /* Check if we have DAWR or DABR hardware */ 886404b27d6SMichael Neuling bool ppc_breakpoint_available(void) 887404b27d6SMichael Neuling { 888c1fe190cSMichael Neuling if (dawr_enabled()) 889c1fe190cSMichael Neuling return true; /* POWER8 DAWR or POWER9 forced DAWR */ 890404b27d6SMichael Neuling if (cpu_has_feature(CPU_FTR_ARCH_207S)) 891404b27d6SMichael Neuling return false; /* POWER9 with DAWR disabled */ 892404b27d6SMichael Neuling /* DABR: Everything but POWER8 and POWER9 */ 893404b27d6SMichael Neuling return true; 894404b27d6SMichael Neuling } 895404b27d6SMichael Neuling EXPORT_SYMBOL_GPL(ppc_breakpoint_available); 896404b27d6SMichael Neuling 897fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8985d176f75SCyril Bur 8995d176f75SCyril Bur static inline bool tm_enabled(struct task_struct *tsk) 9005d176f75SCyril Bur { 9015d176f75SCyril Bur return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); 9025d176f75SCyril Bur } 9035d176f75SCyril Bur 904edd00b83SCyril Bur static void tm_reclaim_thread(struct thread_struct *thr, uint8_t cause) 905d31626f7SPaul Mackerras { 9067f821fc9SMichael Neuling /* 9077f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 9087f821fc9SMichael Neuling * checkpointed state outstanding. 9097f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 9107f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 9117f821fc9SMichael Neuling * This will then directly return to userspace without going 9127f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 9137f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 9147f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 9157f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 9167f821fc9SMichael Neuling * this state. 9177f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 9187f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 919027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 9207f821fc9SMichael Neuling */ 9217f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 9227f821fc9SMichael Neuling return; 9237f821fc9SMichael Neuling 92491381b9cSCyril Bur giveup_all(container_of(thr, struct task_struct, thread)); 92591381b9cSCyril Bur 926eb5c3f1cSCyril Bur tm_reclaim(thr, cause); 927eb5c3f1cSCyril Bur 928f48e91e8SMichael Neuling /* 929f48e91e8SMichael Neuling * If we are in a transaction and FP is off then we can't have 930f48e91e8SMichael Neuling * used FP inside that transaction. Hence the checkpointed 931f48e91e8SMichael Neuling * state is the same as the live state. We need to copy the 932f48e91e8SMichael Neuling * live state to the checkpointed state so that when the 933f48e91e8SMichael Neuling * transaction is restored, the checkpointed state is correct 934f48e91e8SMichael Neuling * and the aborted transaction sees the correct state. We use 935f48e91e8SMichael Neuling * ckpt_regs.msr here as that's what tm_reclaim will use to 936f48e91e8SMichael Neuling * determine if it's going to write the checkpointed state or 937f48e91e8SMichael Neuling * not. So either this will write the checkpointed registers, 938f48e91e8SMichael Neuling * or reclaim will. Similarly for VMX. 939f48e91e8SMichael Neuling */ 940f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_FP) == 0) 941f48e91e8SMichael Neuling memcpy(&thr->ckfp_state, &thr->fp_state, 942f48e91e8SMichael Neuling sizeof(struct thread_fp_state)); 943f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_VEC) == 0) 944f48e91e8SMichael Neuling memcpy(&thr->ckvr_state, &thr->vr_state, 945f48e91e8SMichael Neuling sizeof(struct thread_vr_state)); 946d31626f7SPaul Mackerras } 947d31626f7SPaul Mackerras 948d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 949d31626f7SPaul Mackerras { 950d31626f7SPaul Mackerras tm_enable(); 951edd00b83SCyril Bur tm_reclaim_thread(¤t->thread, cause); 952d31626f7SPaul Mackerras } 953d31626f7SPaul Mackerras 954fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 955fb09692eSMichael Neuling { 956fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 957fb09692eSMichael Neuling * middle of a transaction. 958fb09692eSMichael Neuling * 959fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 960fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 961000ec280SCyril Bur * checkpointed (tbegin) state in ckpt_regs, ckfp_state and 962000ec280SCyril Bur * ckvr_state 963fb09692eSMichael Neuling * 964fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 965fb09692eSMichael Neuling */ 966fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 967fb09692eSMichael Neuling 968fb09692eSMichael Neuling if (!thr->regs) 969fb09692eSMichael Neuling return; 970fb09692eSMichael Neuling 971fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 972fb09692eSMichael Neuling goto out_and_saveregs; 973fb09692eSMichael Neuling 97492fb8690SMichael Neuling WARN_ON(tm_suspend_disabled); 97592fb8690SMichael Neuling 976fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 977fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 978fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 979fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 980fb09692eSMichael Neuling thr->regs->trap); 981fb09692eSMichael Neuling 982edd00b83SCyril Bur tm_reclaim_thread(thr, TM_CAUSE_RESCHED); 983fb09692eSMichael Neuling 984fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 985fb09692eSMichael Neuling tsk->pid); 986fb09692eSMichael Neuling 987fb09692eSMichael Neuling out_and_saveregs: 988fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 989fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 990fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 991fb09692eSMichael Neuling * cannot happen later in _switch(). 992fb09692eSMichael Neuling */ 993fb09692eSMichael Neuling tm_save_sprs(thr); 994fb09692eSMichael Neuling } 995fb09692eSMichael Neuling 996eb5c3f1cSCyril Bur extern void __tm_recheckpoint(struct thread_struct *thread); 997e6b8fd02SMichael Neuling 998eb5c3f1cSCyril Bur void tm_recheckpoint(struct thread_struct *thread) 999e6b8fd02SMichael Neuling { 1000e6b8fd02SMichael Neuling unsigned long flags; 1001e6b8fd02SMichael Neuling 10025d176f75SCyril Bur if (!(thread->regs->msr & MSR_TM)) 10035d176f75SCyril Bur return; 10045d176f75SCyril Bur 1005e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 1006e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 1007e6b8fd02SMichael Neuling * So let's hard disable over this region. 1008e6b8fd02SMichael Neuling */ 1009e6b8fd02SMichael Neuling local_irq_save(flags); 1010e6b8fd02SMichael Neuling hard_irq_disable(); 1011e6b8fd02SMichael Neuling 1012e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 1013e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 1014e6b8fd02SMichael Neuling */ 1015e6b8fd02SMichael Neuling tm_restore_sprs(thread); 1016e6b8fd02SMichael Neuling 1017eb5c3f1cSCyril Bur __tm_recheckpoint(thread); 1018e6b8fd02SMichael Neuling 1019e6b8fd02SMichael Neuling local_irq_restore(flags); 1020e6b8fd02SMichael Neuling } 1021e6b8fd02SMichael Neuling 1022bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 1023fb09692eSMichael Neuling { 1024fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 1025fb09692eSMichael Neuling return; 1026fb09692eSMichael Neuling 1027fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 1028fb09692eSMichael Neuling * 1029fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 1030fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 1031fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 1032dc310669SCyril Bur * unavailable later, we are unable to determine which set of FP regs 1033fb09692eSMichael Neuling * need to be restored. 1034fb09692eSMichael Neuling */ 10355d176f75SCyril Bur if (!tm_enabled(new)) 1036fb09692eSMichael Neuling return; 1037fb09692eSMichael Neuling 1038e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 1039fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 1040fb09692eSMichael Neuling return; 1041e6b8fd02SMichael Neuling } 1042fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 1043eb5c3f1cSCyril Bur TM_DEBUG("*** tm_recheckpoint of pid %d (new->msr 0x%lx)\n", 1044eb5c3f1cSCyril Bur new->pid, new->thread.regs->msr); 1045fb09692eSMichael Neuling 1046eb5c3f1cSCyril Bur tm_recheckpoint(&new->thread); 1047fb09692eSMichael Neuling 1048dc310669SCyril Bur /* 1049dc310669SCyril Bur * The checkpointed state has been restored but the live state has 1050dc310669SCyril Bur * not, ensure all the math functionality is turned off to trigger 1051dc310669SCyril Bur * restore_math() to reload. 1052dc310669SCyril Bur */ 1053dc310669SCyril Bur new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); 1054fb09692eSMichael Neuling 1055fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 1056fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 1057fb09692eSMichael Neuling new->pid, mfmsr()); 1058fb09692eSMichael Neuling } 1059fb09692eSMichael Neuling 1060dc310669SCyril Bur static inline void __switch_to_tm(struct task_struct *prev, 1061dc310669SCyril Bur struct task_struct *new) 1062fb09692eSMichael Neuling { 1063fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 10645d176f75SCyril Bur if (tm_enabled(prev) || tm_enabled(new)) 1065fb09692eSMichael Neuling tm_enable(); 10665d176f75SCyril Bur 10675d176f75SCyril Bur if (tm_enabled(prev)) { 10685d176f75SCyril Bur prev->thread.load_tm++; 1069fb09692eSMichael Neuling tm_reclaim_task(prev); 10705d176f75SCyril Bur if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) 10715d176f75SCyril Bur prev->thread.regs->msr &= ~MSR_TM; 10725d176f75SCyril Bur } 10735d176f75SCyril Bur 1074dc310669SCyril Bur tm_recheckpoint_new_task(new); 1075fb09692eSMichael Neuling } 1076fb09692eSMichael Neuling } 1077d31626f7SPaul Mackerras 1078d31626f7SPaul Mackerras /* 1079d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 1080d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 1081d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 1082d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 1083d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 1084d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 1085d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 1086d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 1087d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 1088d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 1089d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 1090d31626f7SPaul Mackerras * state to use. 1091d31626f7SPaul Mackerras */ 1092d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 1093d31626f7SPaul Mackerras { 1094d31626f7SPaul Mackerras unsigned long msr_diff; 1095d31626f7SPaul Mackerras 1096dc310669SCyril Bur /* 1097dc310669SCyril Bur * This is the only moment we should clear TIF_RESTORE_TM as 1098dc310669SCyril Bur * it is here that ckpt_regs.msr and pt_regs.msr become the same 1099dc310669SCyril Bur * again, anything else could lead to an incorrect ckpt_msr being 1100dc310669SCyril Bur * saved and therefore incorrect signal contexts. 1101dc310669SCyril Bur */ 1102d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 1103d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 1104d31626f7SPaul Mackerras return; 1105d31626f7SPaul Mackerras 1106829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 1107d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 110870fe3d98SCyril Bur 1109dc16b553SCyril Bur /* Ensure that restore_math() will restore */ 1110dc16b553SCyril Bur if (msr_diff & MSR_FP) 1111dc16b553SCyril Bur current->thread.load_fp = 1; 111239715bf9SValentin Rothberg #ifdef CONFIG_ALTIVEC 1113dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC) 1114dc16b553SCyril Bur current->thread.load_vec = 1; 1115dc16b553SCyril Bur #endif 111670fe3d98SCyril Bur restore_math(regs); 111770fe3d98SCyril Bur 111859dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr | msr_diff); 1119d31626f7SPaul Mackerras } 1120d31626f7SPaul Mackerras 11212d19630eSChristopher M. Riedl #else /* !CONFIG_PPC_TRANSACTIONAL_MEM */ 1122fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 1123dc310669SCyril Bur #define __switch_to_tm(prev, new) 11242d19630eSChristopher M. Riedl void tm_reclaim_current(uint8_t cause) {} 1125fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 11269422de3eSMichael Neuling 1127152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 1128152d523eSAnton Blanchard { 1129152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 113001d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1131152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1132152d523eSAnton Blanchard #endif 1133359c2ca7SChristophe Leroy #ifdef CONFIG_SPE 1134359c2ca7SChristophe Leroy if (cpu_has_feature(CPU_FTR_SPE)) 1135359c2ca7SChristophe Leroy t->spefscr = mfspr(SPRN_SPEFSCR); 1136359c2ca7SChristophe Leroy #endif 1137152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1138152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1139152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1140152d523eSAnton Blanchard 1141152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1142152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1143152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1144152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1145152d523eSAnton Blanchard 1146152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1147152d523eSAnton Blanchard 1148152d523eSAnton Blanchard /* 1149152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1150152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1151152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1152152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1153152d523eSAnton Blanchard */ 1154152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1155152d523eSAnton Blanchard } 1156152d523eSAnton Blanchard #endif 1157152d523eSAnton Blanchard } 1158152d523eSAnton Blanchard 115934e119c9SNicholas Piggin #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 116034e119c9SNicholas Piggin void kvmppc_save_user_regs(void) 116134e119c9SNicholas Piggin { 116234e119c9SNicholas Piggin unsigned long usermsr; 116334e119c9SNicholas Piggin 116434e119c9SNicholas Piggin if (!current->thread.regs) 116534e119c9SNicholas Piggin return; 116634e119c9SNicholas Piggin 116734e119c9SNicholas Piggin usermsr = current->thread.regs->msr; 116834e119c9SNicholas Piggin 116934e119c9SNicholas Piggin if (usermsr & MSR_FP) 117034e119c9SNicholas Piggin save_fpu(current); 117134e119c9SNicholas Piggin 117234e119c9SNicholas Piggin if (usermsr & MSR_VEC) 117334e119c9SNicholas Piggin save_altivec(current); 117434e119c9SNicholas Piggin 117534e119c9SNicholas Piggin #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 117634e119c9SNicholas Piggin if (usermsr & MSR_TM) { 117734e119c9SNicholas Piggin current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 117834e119c9SNicholas Piggin current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 117934e119c9SNicholas Piggin current->thread.tm_texasr = mfspr(SPRN_TEXASR); 118034e119c9SNicholas Piggin current->thread.regs->msr &= ~MSR_TM; 118134e119c9SNicholas Piggin } 118234e119c9SNicholas Piggin #endif 118334e119c9SNicholas Piggin } 118434e119c9SNicholas Piggin EXPORT_SYMBOL_GPL(kvmppc_save_user_regs); 11855236756dSNicholas Piggin 11865236756dSNicholas Piggin void kvmppc_save_current_sprs(void) 11875236756dSNicholas Piggin { 11885236756dSNicholas Piggin save_sprs(¤t->thread); 11895236756dSNicholas Piggin } 11905236756dSNicholas Piggin EXPORT_SYMBOL_GPL(kvmppc_save_current_sprs); 119134e119c9SNicholas Piggin #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ 119234e119c9SNicholas Piggin 1193152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1194152d523eSAnton Blanchard struct thread_struct *new_thread) 1195152d523eSAnton Blanchard { 1196152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1197152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1198152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1199152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1200152d523eSAnton Blanchard #endif 1201359c2ca7SChristophe Leroy #ifdef CONFIG_SPE 1202359c2ca7SChristophe Leroy if (cpu_has_feature(CPU_FTR_SPE) && 1203359c2ca7SChristophe Leroy old_thread->spefscr != new_thread->spefscr) 1204359c2ca7SChristophe Leroy mtspr(SPRN_SPEFSCR, new_thread->spefscr); 1205359c2ca7SChristophe Leroy #endif 1206152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1207152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1208152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1209b57bd2deSMichael Neuling if (new_thread->dscr_inherit) 1210152d523eSAnton Blanchard dscr = new_thread->dscr; 1211152d523eSAnton Blanchard 1212152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1213152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1214152d523eSAnton Blanchard } 1215152d523eSAnton Blanchard 1216152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1217152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1218152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1219152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1220152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1221152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1222152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1223152d523eSAnton Blanchard 1224b57bd2deSMichael Neuling if (old_thread->fscr != new_thread->fscr) 1225b57bd2deSMichael Neuling mtspr(SPRN_FSCR, new_thread->fscr); 1226b57bd2deSMichael Neuling 1227152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1228152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1229152d523eSAnton Blanchard } 1230ec233edeSSukadev Bhattiprolu 12313449f191SAlastair D'Silva if (cpu_has_feature(CPU_FTR_P9_TIDR) && 1232ec233edeSSukadev Bhattiprolu old_thread->tidr != new_thread->tidr) 1233ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, new_thread->tidr); 1234152d523eSAnton Blanchard #endif 123506bb53b3SRam Pai 1236152d523eSAnton Blanchard } 1237152d523eSAnton Blanchard 123814cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 123914cf11afSPaul Mackerras struct task_struct *new) 124014cf11afSPaul Mackerras { 124114cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 124214cf11afSPaul Mackerras struct task_struct *last; 1243387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 1244d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1245d6bf29b4SPeter Zijlstra #endif 124614cf11afSPaul Mackerras 1247152d523eSAnton Blanchard new_thread = &new->thread; 1248152d523eSAnton Blanchard old_thread = ¤t->thread; 1249152d523eSAnton Blanchard 12507ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 12517ba5fef7SMichael Neuling 1252387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 125369111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1254d6bf29b4SPeter Zijlstra if (batch->active) { 1255d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1256d6bf29b4SPeter Zijlstra if (batch->index) 1257d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1258d6bf29b4SPeter Zijlstra batch->active = 0; 1259d6bf29b4SPeter Zijlstra } 1260f35d2f24SNicholas Piggin 1261f35d2f24SNicholas Piggin /* 1262f35d2f24SNicholas Piggin * On POWER9 the copy-paste buffer can only paste into 1263f35d2f24SNicholas Piggin * foreign real addresses, so unprivileged processes can not 1264f35d2f24SNicholas Piggin * see the data or use it in any way unless they have 1265f35d2f24SNicholas Piggin * foreign real mappings. If the new process has the foreign 1266f35d2f24SNicholas Piggin * real address mappings, we must issue a cp_abort to clear 1267f35d2f24SNicholas Piggin * any state and prevent snooping, corruption or a covert 1268f35d2f24SNicholas Piggin * channel. ISA v3.1 supports paste into local memory. 1269f35d2f24SNicholas Piggin */ 1270f35d2f24SNicholas Piggin if (new->mm && (cpu_has_feature(CPU_FTR_ARCH_31) || 1271f35d2f24SNicholas Piggin atomic_read(&new->mm->context.vas_windows))) 1272f35d2f24SNicholas Piggin asm volatile(PPC_CP_ABORT); 12734e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 127406d67d54SPaul Mackerras 1275f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1276f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1277f3d885ccSAnton Blanchard #else 1278f3d885ccSAnton Blanchard /* 1279f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1280f3d885ccSAnton Blanchard * schedule DABR 1281f3d885ccSAnton Blanchard */ 1282f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1283303e6a9dSRavi Bangoria switch_hw_breakpoint(new); 1284f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1285f3d885ccSAnton Blanchard #endif 1286f3d885ccSAnton Blanchard 1287f3d885ccSAnton Blanchard /* 1288f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1289f3d885ccSAnton Blanchard * change a number of them. 1290f3d885ccSAnton Blanchard */ 1291f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1292f3d885ccSAnton Blanchard 1293f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1294f3d885ccSAnton Blanchard giveup_all(prev); 1295f3d885ccSAnton Blanchard 1296dc310669SCyril Bur __switch_to_tm(prev, new); 1297dc310669SCyril Bur 1298e4c0fc5fSNicholas Piggin if (!radix_enabled()) { 129944387e9fSAnton Blanchard /* 1300e4c0fc5fSNicholas Piggin * We can't take a PMU exception inside _switch() since there 1301e4c0fc5fSNicholas Piggin * is a window where the kernel stack SLB and the kernel stack 1302e4c0fc5fSNicholas Piggin * are out of sync. Hard disable here. 130344387e9fSAnton Blanchard */ 130444387e9fSAnton Blanchard hard_irq_disable(); 1305e4c0fc5fSNicholas Piggin } 1306bc2a9408SMichael Neuling 130720dbe670SAnton Blanchard /* 130859dc5bfcSNicholas Piggin * Call restore_sprs() and set_return_regs_changed() before calling 130959dc5bfcSNicholas Piggin * _switch(). If we move it after _switch() then we miss out on calling 131059dc5bfcSNicholas Piggin * it for new tasks. The reason for this is we manually create a stack 131159dc5bfcSNicholas Piggin * frame for new tasks that directly returns through ret_from_fork() or 131220dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 131320dbe670SAnton Blanchard */ 1314f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1315f3d885ccSAnton Blanchard 131659dc5bfcSNicholas Piggin set_return_regs_changed(); /* _switch changes stack (and regs) */ 131759dc5bfcSNicholas Piggin 131842e03bc5SChristophe Leroy if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64)) 1319c1672883SChristophe Leroy kuap_assert_locked(); 132042e03bc5SChristophe Leroy 132120dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 132220dbe670SAnton Blanchard 1323f35d2f24SNicholas Piggin /* 1324f35d2f24SNicholas Piggin * Nothing after _switch will be run for newly created tasks, 1325f35d2f24SNicholas Piggin * because they switch directly to ret_from_fork/ret_from_kernel_thread 1326f35d2f24SNicholas Piggin * etc. Code added here should have a comment explaining why that is 1327f35d2f24SNicholas Piggin * okay. 1328f35d2f24SNicholas Piggin */ 1329f35d2f24SNicholas Piggin 13304e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1331387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 1332f35d2f24SNicholas Piggin /* 1333f35d2f24SNicholas Piggin * This applies to a process that was context switched while inside 1334f35d2f24SNicholas Piggin * arch_enter_lazy_mmu_mode(), to re-activate the batch that was 1335f35d2f24SNicholas Piggin * deactivated above, before _switch(). This will never be the case 1336f35d2f24SNicholas Piggin * for new tasks. 1337f35d2f24SNicholas Piggin */ 1338d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1339d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 134069111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1341d6bf29b4SPeter Zijlstra batch->active = 1; 1342d6bf29b4SPeter Zijlstra } 1343387e220aSNicholas Piggin #endif 134470fe3d98SCyril Bur 134507d2a628SNicholas Piggin /* 1346f35d2f24SNicholas Piggin * Math facilities are masked out of the child MSR in copy_thread. 1347f35d2f24SNicholas Piggin * A new task does not need to restore_math because it will 1348f35d2f24SNicholas Piggin * demand fault them. 134907d2a628SNicholas Piggin */ 1350f35d2f24SNicholas Piggin if (current->thread.regs) 1351f35d2f24SNicholas Piggin restore_math(current->thread.regs); 13524e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 1353d6bf29b4SPeter Zijlstra 135414cf11afSPaul Mackerras return last; 135514cf11afSPaul Mackerras } 135614cf11afSPaul Mackerras 1357df13102fSChristophe Leroy #define NR_INSN_TO_PRINT 16 135806d67d54SPaul Mackerras 135906d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 136006d67d54SPaul Mackerras { 136106d67d54SPaul Mackerras int i; 1362a6e2c226SAneesh Kumar K.V unsigned long nip = regs->nip; 1363df13102fSChristophe Leroy unsigned long pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 136406d67d54SPaul Mackerras 136506d67d54SPaul Mackerras printk("Instruction dump:"); 136606d67d54SPaul Mackerras 1367a6e2c226SAneesh Kumar K.V /* 1368a6e2c226SAneesh Kumar K.V * If we were executing with the MMU off for instructions, adjust pc 1369a6e2c226SAneesh Kumar K.V * rather than printing XXXXXXXX. 1370a6e2c226SAneesh Kumar K.V */ 1371a6e2c226SAneesh Kumar K.V if (!IS_ENABLED(CONFIG_BOOKE) && !(regs->msr & MSR_IR)) { 1372a6e2c226SAneesh Kumar K.V pc = (unsigned long)phys_to_virt(pc); 1373a6e2c226SAneesh Kumar K.V nip = (unsigned long)phys_to_virt(regs->nip); 1374a6e2c226SAneesh Kumar K.V } 1375a6e2c226SAneesh Kumar K.V 1376df13102fSChristophe Leroy for (i = 0; i < NR_INSN_TO_PRINT; i++) { 137706d67d54SPaul Mackerras int instr; 137806d67d54SPaul Mackerras 137906d67d54SPaul Mackerras if (!(i % 8)) 13802ffd04deSAndrew Donnellan pr_cont("\n"); 138106d67d54SPaul Mackerras 138200ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 138325f12ae4SChristoph Hellwig get_kernel_nofault(instr, (const void *)pc)) { 13842ffd04deSAndrew Donnellan pr_cont("XXXXXXXX "); 138506d67d54SPaul Mackerras } else { 1386a6e2c226SAneesh Kumar K.V if (nip == pc) 13872ffd04deSAndrew Donnellan pr_cont("<%08x> ", instr); 138806d67d54SPaul Mackerras else 13892ffd04deSAndrew Donnellan pr_cont("%08x ", instr); 139006d67d54SPaul Mackerras } 139106d67d54SPaul Mackerras 139206d67d54SPaul Mackerras pc += sizeof(int); 139306d67d54SPaul Mackerras } 139406d67d54SPaul Mackerras 13952ffd04deSAndrew Donnellan pr_cont("\n"); 139606d67d54SPaul Mackerras } 139706d67d54SPaul Mackerras 139888b0fe17SMurilo Opsfelder Araujo void show_user_instructions(struct pt_regs *regs) 139988b0fe17SMurilo Opsfelder Araujo { 140088b0fe17SMurilo Opsfelder Araujo unsigned long pc; 1401df13102fSChristophe Leroy int n = NR_INSN_TO_PRINT; 1402fb2d9505SChristophe Leroy struct seq_buf s; 1403fb2d9505SChristophe Leroy char buf[96]; /* enough for 8 times 9 + 2 chars */ 140488b0fe17SMurilo Opsfelder Araujo 1405df13102fSChristophe Leroy pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 140688b0fe17SMurilo Opsfelder Araujo 1407fb2d9505SChristophe Leroy seq_buf_init(&s, buf, sizeof(buf)); 140888b0fe17SMurilo Opsfelder Araujo 1409fb2d9505SChristophe Leroy while (n) { 1410fb2d9505SChristophe Leroy int i; 1411fb2d9505SChristophe Leroy 1412fb2d9505SChristophe Leroy seq_buf_clear(&s); 1413fb2d9505SChristophe Leroy 1414fb2d9505SChristophe Leroy for (i = 0; i < 8 && n; i++, n--, pc += sizeof(int)) { 141588b0fe17SMurilo Opsfelder Araujo int instr; 141688b0fe17SMurilo Opsfelder Araujo 1417c0ee37e8SChristoph Hellwig if (copy_from_user_nofault(&instr, (void __user *)pc, 1418c0ee37e8SChristoph Hellwig sizeof(instr))) { 1419fb2d9505SChristophe Leroy seq_buf_printf(&s, "XXXXXXXX "); 1420fb2d9505SChristophe Leroy continue; 1421fb2d9505SChristophe Leroy } 1422fb2d9505SChristophe Leroy seq_buf_printf(&s, regs->nip == pc ? "<%08x> " : "%08x ", instr); 142388b0fe17SMurilo Opsfelder Araujo } 142488b0fe17SMurilo Opsfelder Araujo 1425fb2d9505SChristophe Leroy if (!seq_buf_has_overflowed(&s)) 1426fb2d9505SChristophe Leroy pr_info("%s[%d]: code: %s\n", current->comm, 1427fb2d9505SChristophe Leroy current->pid, s.buffer); 142888b0fe17SMurilo Opsfelder Araujo } 142988b0fe17SMurilo Opsfelder Araujo } 143088b0fe17SMurilo Opsfelder Araujo 1431801c0b2cSMichael Neuling struct regbit { 143206d67d54SPaul Mackerras unsigned long bit; 143306d67d54SPaul Mackerras const char *name; 1434801c0b2cSMichael Neuling }; 1435801c0b2cSMichael Neuling 1436801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 14373bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 14383bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 14393bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 14403bfd0c9cSAnton Blanchard #endif 14413bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 14423bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 14433bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 14443bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 14453bfd0c9cSAnton Blanchard #endif 144606d67d54SPaul Mackerras {MSR_EE, "EE"}, 144706d67d54SPaul Mackerras {MSR_PR, "PR"}, 144806d67d54SPaul Mackerras {MSR_FP, "FP"}, 144906d67d54SPaul Mackerras {MSR_ME, "ME"}, 14503bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 14511b98326bSKumar Gala {MSR_DE, "DE"}, 14523bfd0c9cSAnton Blanchard #else 14533bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 14543bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 14553bfd0c9cSAnton Blanchard #endif 145606d67d54SPaul Mackerras {MSR_IR, "IR"}, 145706d67d54SPaul Mackerras {MSR_DR, "DR"}, 14583bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 14593bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 14603bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 14613bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 14623bfd0c9cSAnton Blanchard #endif 146306d67d54SPaul Mackerras {0, NULL} 146406d67d54SPaul Mackerras }; 146506d67d54SPaul Mackerras 1466801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 146706d67d54SPaul Mackerras { 1468801c0b2cSMichael Neuling const char *s = ""; 146906d67d54SPaul Mackerras 147006d67d54SPaul Mackerras for (; bits->bit; ++bits) 147106d67d54SPaul Mackerras if (val & bits->bit) { 1472db5ba5aeSMichael Ellerman pr_cont("%s%s", s, bits->name); 1473801c0b2cSMichael Neuling s = sep; 147406d67d54SPaul Mackerras } 1475801c0b2cSMichael Neuling } 1476801c0b2cSMichael Neuling 1477801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1478801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1479801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1480801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1481801c0b2cSMichael Neuling {MSR_TM, "E"}, 1482801c0b2cSMichael Neuling {0, NULL} 1483801c0b2cSMichael Neuling }; 1484801c0b2cSMichael Neuling 1485801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1486801c0b2cSMichael Neuling { 1487801c0b2cSMichael Neuling /* 1488801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1489801c0b2cSMichael Neuling * Inside the TM[], the output means: 1490801c0b2cSMichael Neuling * E: Enabled (bit 32) 1491801c0b2cSMichael Neuling * S: Suspended (bit 33) 1492801c0b2cSMichael Neuling * T: Transactional (bit 34) 1493801c0b2cSMichael Neuling */ 1494801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1495db5ba5aeSMichael Ellerman pr_cont(",TM["); 1496801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1497db5ba5aeSMichael Ellerman pr_cont("]"); 1498801c0b2cSMichael Neuling } 1499801c0b2cSMichael Neuling } 1500801c0b2cSMichael Neuling #else 1501801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1502801c0b2cSMichael Neuling #endif 1503801c0b2cSMichael Neuling 1504801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1505801c0b2cSMichael Neuling { 1506db5ba5aeSMichael Ellerman pr_cont("<"); 1507801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1508801c0b2cSMichael Neuling print_tm_bits(val); 1509db5ba5aeSMichael Ellerman pr_cont(">"); 151006d67d54SPaul Mackerras } 151106d67d54SPaul Mackerras 151206d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1513f6f7dde3Santon@samba.org #define REG "%016lx" 151406d67d54SPaul Mackerras #define REGS_PER_LINE 4 151506d67d54SPaul Mackerras #else 1516f6f7dde3Santon@samba.org #define REG "%08lx" 151706d67d54SPaul Mackerras #define REGS_PER_LINE 8 151806d67d54SPaul Mackerras #endif 151906d67d54SPaul Mackerras 1520bf13718bSNicholas Piggin static void __show_regs(struct pt_regs *regs) 152114cf11afSPaul Mackerras { 152214cf11afSPaul Mackerras int i, trap; 152314cf11afSPaul Mackerras 152406d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 152506d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 1526182dc9c7SMichael Ellerman printk("REGS: %px TRAP: %04lx %s (%s)\n", 152796b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 152806d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1529801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1530f6fc73fbSMichael Ellerman pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 153114cf11afSPaul Mackerras trap = TRAP(regs); 1532912237eaSNicholas Piggin if (!trap_is_syscall(regs) && cpu_has_feature(CPU_FTR_CFAR)) 15337dae865fSMichael Ellerman pr_cont("CFAR: "REG" ", regs->orig_gpr3); 15347153d4bfSXiongwei Song if (trap == INTERRUPT_MACHINE_CHECK || 15357153d4bfSXiongwei Song trap == INTERRUPT_DATA_STORAGE || 15367153d4bfSXiongwei Song trap == INTERRUPT_ALIGNMENT) { 15372ec42996SChristophe Leroy if (IS_ENABLED(CONFIG_4xx) || IS_ENABLED(CONFIG_BOOKE)) 15384872cbd0SXiongwei Song pr_cont("DEAR: "REG" ESR: "REG" ", regs->dear, regs->esr); 15392ec42996SChristophe Leroy else 15407dae865fSMichael Ellerman pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 15412ec42996SChristophe Leroy } 15422ec42996SChristophe Leroy 15439db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 15443130a7bbSNicholas Piggin pr_cont("IRQMASK: %lx ", regs->softe); 15459db8bcfdSAnton Blanchard #endif 15469db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 15476d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 15487dae865fSMichael Ellerman pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 154914170789SKumar Gala #endif 155014cf11afSPaul Mackerras 155114cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 155206d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 15537dae865fSMichael Ellerman pr_cont("\nGPR%02d: ", i); 15547dae865fSMichael Ellerman pr_cont(REG " ", regs->gpr[i]); 155514cf11afSPaul Mackerras } 15567dae865fSMichael Ellerman pr_cont("\n"); 155714cf11afSPaul Mackerras /* 155814cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 155914cf11afSPaul Mackerras * above info out without failing 156014cf11afSPaul Mackerras */ 15618f020c7cSChristophe Leroy if (IS_ENABLED(CONFIG_KALLSYMS)) { 1562058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1563058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 15648f020c7cSChristophe Leroy } 1565bf13718bSNicholas Piggin } 1566bf13718bSNicholas Piggin 1567bf13718bSNicholas Piggin void show_regs(struct pt_regs *regs) 1568bf13718bSNicholas Piggin { 1569bf13718bSNicholas Piggin show_regs_print_info(KERN_DEFAULT); 1570bf13718bSNicholas Piggin __show_regs(regs); 15719cb8f069SDmitry Safonov show_stack(current, (unsigned long *) regs->gpr[1], KERN_DEFAULT); 157206d67d54SPaul Mackerras if (!user_mode(regs)) 157306d67d54SPaul Mackerras show_instructions(regs); 157414cf11afSPaul Mackerras } 157514cf11afSPaul Mackerras 157614cf11afSPaul Mackerras void flush_thread(void) 157714cf11afSPaul Mackerras { 1578e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 15795aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1580e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 15813bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1582e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 158314cf11afSPaul Mackerras } 158414cf11afSPaul Mackerras 1585425d3314SNicholas Piggin void arch_setup_new_exec(void) 1586425d3314SNicholas Piggin { 1587d7df77e8SAneesh Kumar K.V 1588d7df77e8SAneesh Kumar K.V #ifdef CONFIG_PPC_BOOK3S_64 1589d7df77e8SAneesh Kumar K.V if (!radix_enabled()) 1590425d3314SNicholas Piggin hash__setup_new_exec(); 1591425d3314SNicholas Piggin #endif 1592d7df77e8SAneesh Kumar K.V /* 1593d7df77e8SAneesh Kumar K.V * If we exec out of a kernel thread then thread.regs will not be 1594d7df77e8SAneesh Kumar K.V * set. Do it now. 1595d7df77e8SAneesh Kumar K.V */ 1596d7df77e8SAneesh Kumar K.V if (!current->thread.regs) { 1597d7df77e8SAneesh Kumar K.V struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 1598d7df77e8SAneesh Kumar K.V current->thread.regs = regs - 1; 1599d7df77e8SAneesh Kumar K.V } 1600d5fa30e6SAneesh Kumar K.V 1601d5fa30e6SAneesh Kumar K.V #ifdef CONFIG_PPC_MEM_KEYS 1602d5fa30e6SAneesh Kumar K.V current->thread.regs->amr = default_amr; 1603d5fa30e6SAneesh Kumar K.V current->thread.regs->iamr = default_iamr; 1604d5fa30e6SAneesh Kumar K.V #endif 1605d7df77e8SAneesh Kumar K.V } 1606425d3314SNicholas Piggin 1607ec233edeSSukadev Bhattiprolu #ifdef CONFIG_PPC64 160871cc64a8SAlastair D'Silva /** 160971cc64a8SAlastair D'Silva * Assign a TIDR (thread ID) for task @t and set it in the thread 1610ec233edeSSukadev Bhattiprolu * structure. For now, we only support setting TIDR for 'current' task. 161171cc64a8SAlastair D'Silva * 161271cc64a8SAlastair D'Silva * Since the TID value is a truncated form of it PID, it is possible 161371cc64a8SAlastair D'Silva * (but unlikely) for 2 threads to have the same TID. In the unlikely event 161471cc64a8SAlastair D'Silva * that 2 threads share the same TID and are waiting, one of the following 161571cc64a8SAlastair D'Silva * cases will happen: 161671cc64a8SAlastair D'Silva * 161771cc64a8SAlastair D'Silva * 1. The correct thread is running, the wrong thread is not 161871cc64a8SAlastair D'Silva * In this situation, the correct thread is woken and proceeds to pass it's 161971cc64a8SAlastair D'Silva * condition check. 162071cc64a8SAlastair D'Silva * 162171cc64a8SAlastair D'Silva * 2. Neither threads are running 162271cc64a8SAlastair D'Silva * In this situation, neither thread will be woken. When scheduled, the waiting 162371cc64a8SAlastair D'Silva * threads will execute either a wait, which will return immediately, followed 162471cc64a8SAlastair D'Silva * by a condition check, which will pass for the correct thread and fail 162571cc64a8SAlastair D'Silva * for the wrong thread, or they will execute the condition check immediately. 162671cc64a8SAlastair D'Silva * 162771cc64a8SAlastair D'Silva * 3. The wrong thread is running, the correct thread is not 162871cc64a8SAlastair D'Silva * The wrong thread will be woken, but will fail it's condition check and 162971cc64a8SAlastair D'Silva * re-execute wait. The correct thread, when scheduled, will execute either 163071cc64a8SAlastair D'Silva * it's condition check (which will pass), or wait, which returns immediately 163171cc64a8SAlastair D'Silva * when called the first time after the thread is scheduled, followed by it's 163271cc64a8SAlastair D'Silva * condition check (which will pass). 163371cc64a8SAlastair D'Silva * 163471cc64a8SAlastair D'Silva * 4. Both threads are running 163571cc64a8SAlastair D'Silva * Both threads will be woken. The wrong thread will fail it's condition check 163671cc64a8SAlastair D'Silva * and execute another wait, while the correct thread will pass it's condition 163771cc64a8SAlastair D'Silva * check. 163871cc64a8SAlastair D'Silva * 163971cc64a8SAlastair D'Silva * @t: the task to set the thread ID for 1640ec233edeSSukadev Bhattiprolu */ 1641ec233edeSSukadev Bhattiprolu int set_thread_tidr(struct task_struct *t) 1642ec233edeSSukadev Bhattiprolu { 16433449f191SAlastair D'Silva if (!cpu_has_feature(CPU_FTR_P9_TIDR)) 1644ec233edeSSukadev Bhattiprolu return -EINVAL; 1645ec233edeSSukadev Bhattiprolu 1646ec233edeSSukadev Bhattiprolu if (t != current) 1647ec233edeSSukadev Bhattiprolu return -EINVAL; 1648ec233edeSSukadev Bhattiprolu 16497e4d4233SVaibhav Jain if (t->thread.tidr) 16507e4d4233SVaibhav Jain return 0; 16517e4d4233SVaibhav Jain 165271cc64a8SAlastair D'Silva t->thread.tidr = (u16)task_pid_nr(t); 1653ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, t->thread.tidr); 1654ec233edeSSukadev Bhattiprolu 1655ec233edeSSukadev Bhattiprolu return 0; 1656ec233edeSSukadev Bhattiprolu } 1657b1db5513SChristophe Lombard EXPORT_SYMBOL_GPL(set_thread_tidr); 1658ec233edeSSukadev Bhattiprolu 1659ec233edeSSukadev Bhattiprolu #endif /* CONFIG_PPC64 */ 1660ec233edeSSukadev Bhattiprolu 166114cf11afSPaul Mackerras void 166214cf11afSPaul Mackerras release_thread(struct task_struct *t) 166314cf11afSPaul Mackerras { 166414cf11afSPaul Mackerras } 166514cf11afSPaul Mackerras 166614cf11afSPaul Mackerras /* 166755ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 166855ccf3feSSuresh Siddha * copy the current task into the new thread. 166914cf11afSPaul Mackerras */ 167055ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 167114cf11afSPaul Mackerras { 1672579e633eSAnton Blanchard flush_all_to_thread(src); 1673621b5060SMichael Neuling /* 1674621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1675621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1676621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1677621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1678621b5060SMichael Neuling * checkpointed state back and the TM mode. 16795d176f75SCyril Bur * 16805d176f75SCyril Bur * Can't pass dst because it isn't ready. Doesn't matter, passing 16815d176f75SCyril Bur * dst is only important for __switch_to() 1682621b5060SMichael Neuling */ 1683dc310669SCyril Bur __switch_to_tm(src, src); 1684330a1eb7SMichael Ellerman 168555ccf3feSSuresh Siddha *dst = *src; 1686330a1eb7SMichael Ellerman 1687330a1eb7SMichael Ellerman clear_task_ebb(dst); 1688330a1eb7SMichael Ellerman 168955ccf3feSSuresh Siddha return 0; 169014cf11afSPaul Mackerras } 169114cf11afSPaul Mackerras 1692cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1693cec15488SMichael Ellerman { 1694387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 1695cec15488SMichael Ellerman unsigned long sp_vsid; 1696cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1697cec15488SMichael Ellerman 1698caca285eSAneesh Kumar K.V if (radix_enabled()) 1699caca285eSAneesh Kumar K.V return; 1700caca285eSAneesh Kumar K.V 1701cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1702cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1703cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1704cec15488SMichael Ellerman else 1705cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1706cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1707cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1708cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1709cec15488SMichael Ellerman #endif 1710cec15488SMichael Ellerman } 1711cec15488SMichael Ellerman 171214cf11afSPaul Mackerras /* 171314cf11afSPaul Mackerras * Copy a thread.. 171414cf11afSPaul Mackerras */ 1715efcac658SAlexey Kardashevskiy 17166eca8933SAlex Dowad /* 17176eca8933SAlex Dowad * Copy architecture-specific thread state 17186eca8933SAlex Dowad */ 1719*c5febea0SEric W. Biederman int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) 172014cf11afSPaul Mackerras { 1721*c5febea0SEric W. Biederman unsigned long clone_flags = args->flags; 1722*c5febea0SEric W. Biederman unsigned long usp = args->stack; 1723*c5febea0SEric W. Biederman unsigned long kthread_arg = args->stack_size; 1724*c5febea0SEric W. Biederman unsigned long tls = args->tls; 172514cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 172614cf11afSPaul Mackerras extern void ret_from_fork(void); 17277fa95f9aSNicholas Piggin extern void ret_from_fork_scv(void); 172858254e10SAl Viro extern void ret_from_kernel_thread(void); 172958254e10SAl Viro void (*f)(void); 17300cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 17315d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 17326b424efaSRavi Bangoria #ifdef CONFIG_HAVE_HW_BREAKPOINT 17336b424efaSRavi Bangoria int i; 17346b424efaSRavi Bangoria #endif 17355d31a96eSMichael Ellerman 1736ed1cd6deSChristophe Leroy klp_init_thread_info(p); 173714cf11afSPaul Mackerras 173814cf11afSPaul Mackerras /* Copy registers */ 173914cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 174014cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 17410100e6bbSJens Axboe if (unlikely(p->flags & (PF_KTHREAD | PF_IO_WORKER))) { 17426eca8933SAlex Dowad /* kernel thread */ 174358254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 174414cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 17457cedd601SAnton Blanchard /* function */ 17467cedd601SAnton Blanchard if (usp) 17477cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 174858254e10SAl Viro #ifdef CONFIG_PPC64 1749b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1750c2e480baSMadhavan Srinivasan childregs->softe = IRQS_ENABLED; 175106d67d54SPaul Mackerras #endif 17526eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 175314cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1754138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 175558254e10SAl Viro f = ret_from_kernel_thread; 175614cf11afSPaul Mackerras } else { 17576eca8933SAlex Dowad /* user thread */ 1758afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 175958254e10SAl Viro *childregs = *regs; 1760ea516b11SAl Viro if (usp) 176114cf11afSPaul Mackerras childregs->gpr[1] = usp; 176214cf11afSPaul Mackerras p->thread.regs = childregs; 17637fa95f9aSNicholas Piggin /* 64s sets this in ret_from_fork */ 17647fa95f9aSNicholas Piggin if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64)) 176558254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 176606d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 17679904b005SDenis Kirjanov if (!is_32bit_task()) 1768facd04a9SNicholas Piggin childregs->gpr[13] = tls; 176906d67d54SPaul Mackerras else 1770facd04a9SNicholas Piggin childregs->gpr[2] = tls; 177114cf11afSPaul Mackerras } 177258254e10SAl Viro 17737fa95f9aSNicholas Piggin if (trap_is_scv(regs)) 17747fa95f9aSNicholas Piggin f = ret_from_fork_scv; 17757fa95f9aSNicholas Piggin else 177658254e10SAl Viro f = ret_from_fork; 177706d67d54SPaul Mackerras } 1778d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 177914cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 178014cf11afSPaul Mackerras 178114cf11afSPaul Mackerras /* 178214cf11afSPaul Mackerras * The way this works is that at some point in the future 178314cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 178414cf11afSPaul Mackerras * That will pop off the stack frame created below and start 178514cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 178614cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 178714cf11afSPaul Mackerras * system call, using the stack frame created above. 178814cf11afSPaul Mackerras */ 1789af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 179014cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 179114cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 179214cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 179314cf11afSPaul Mackerras p->thread.ksp = sp; 179428d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 17956b424efaSRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) 17966b424efaSRavi Bangoria p->thread.ptrace_bps[i] = NULL; 179728d170abSOleg Nesterov #endif 179828d170abSOleg Nesterov 1799b6254cedSChristophe Leroy #ifdef CONFIG_PPC_FPU_REGS 180018461960SPaul Mackerras p->thread.fp_save_area = NULL; 1801b6254cedSChristophe Leroy #endif 180218461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 180318461960SPaul Mackerras p->thread.vr_save_area = NULL; 180418461960SPaul Mackerras #endif 180516132529SChristophe Leroy #if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP) 180616132529SChristophe Leroy p->thread.kuap = KUAP_NONE; 180716132529SChristophe Leroy #endif 180843afcf8fSChristophe Leroy #if defined(CONFIG_BOOKE_OR_40x) && defined(CONFIG_PPC_KUAP) 180943afcf8fSChristophe Leroy p->thread.pid = MMU_NO_CONTEXT; 181043afcf8fSChristophe Leroy #endif 181118461960SPaul Mackerras 1812cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 181306d67d54SPaul Mackerras 1814efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1815efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 18161021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1817db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1818efcac658SAlexey Kardashevskiy } 181992779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 18204c2de74cSNicholas Piggin childregs->ppr = DEFAULT_PPR; 1821ec233edeSSukadev Bhattiprolu 1822ec233edeSSukadev Bhattiprolu p->thread.tidr = 0; 1823efcac658SAlexey Kardashevskiy #endif 1824f643fcabSAneesh Kumar K.V /* 1825f643fcabSAneesh Kumar K.V * Run with the current AMR value of the kernel 1826f643fcabSAneesh Kumar K.V */ 1827f643fcabSAneesh Kumar K.V #ifdef CONFIG_PPC_PKEY 1828f643fcabSAneesh Kumar K.V if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) 1829f643fcabSAneesh Kumar K.V kregs->amr = AMR_KUAP_BLOCKED; 1830f643fcabSAneesh Kumar K.V 1831f643fcabSAneesh Kumar K.V if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) 1832f643fcabSAneesh Kumar K.V kregs->iamr = AMR_KUEP_BLOCKED; 1833f643fcabSAneesh Kumar K.V #endif 18347cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 183514cf11afSPaul Mackerras return 0; 183614cf11afSPaul Mackerras } 183714cf11afSPaul Mackerras 18385434ae74SNicholas Piggin void preload_new_slb_context(unsigned long start, unsigned long sp); 18395434ae74SNicholas Piggin 184014cf11afSPaul Mackerras /* 184114cf11afSPaul Mackerras * Set up a thread for executing a new program 184214cf11afSPaul Mackerras */ 184306d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 184414cf11afSPaul Mackerras { 184590eac727SMichael Ellerman #ifdef CONFIG_PPC64 184690eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 18475434ae74SNicholas Piggin 1848bfac2799SChristophe Leroy if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && !radix_enabled()) 18495434ae74SNicholas Piggin preload_new_slb_context(start, sp); 18505434ae74SNicholas Piggin #endif 185190eac727SMichael Ellerman 18528e96a87cSCyril Bur #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 18538e96a87cSCyril Bur /* 18548e96a87cSCyril Bur * Clear any transactional state, we're exec()ing. The cause is 18558e96a87cSCyril Bur * not important as there will never be a recheckpoint so it's not 18568e96a87cSCyril Bur * user visible. 18578e96a87cSCyril Bur */ 18588e96a87cSCyril Bur if (MSR_TM_SUSPENDED(mfmsr())) 18598e96a87cSCyril Bur tm_reclaim_current(0); 18608e96a87cSCyril Bur #endif 18618e96a87cSCyril Bur 186214cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 186314cf11afSPaul Mackerras regs->ctr = 0; 186414cf11afSPaul Mackerras regs->link = 0; 186514cf11afSPaul Mackerras regs->xer = 0; 186614cf11afSPaul Mackerras regs->ccr = 0; 186714cf11afSPaul Mackerras regs->gpr[1] = sp; 186806d67d54SPaul Mackerras 186906d67d54SPaul Mackerras #ifdef CONFIG_PPC32 187006d67d54SPaul Mackerras regs->mq = 0; 187106d67d54SPaul Mackerras regs->nip = start; 187214cf11afSPaul Mackerras regs->msr = MSR_USER; 187306d67d54SPaul Mackerras #else 18749904b005SDenis Kirjanov if (!is_32bit_task()) { 187594af3abfSRusty Russell unsigned long entry; 187606d67d54SPaul Mackerras 187794af3abfSRusty Russell if (is_elf2_task()) { 187894af3abfSRusty Russell /* Look ma, no function descriptors! */ 187994af3abfSRusty Russell entry = start; 188094af3abfSRusty Russell 188194af3abfSRusty Russell /* 188294af3abfSRusty Russell * Ulrich says: 188394af3abfSRusty Russell * The latest iteration of the ABI requires that when 188494af3abfSRusty Russell * calling a function (at its global entry point), 188594af3abfSRusty Russell * the caller must ensure r12 holds the entry point 188694af3abfSRusty Russell * address (so that the function can quickly 188794af3abfSRusty Russell * establish addressability). 188894af3abfSRusty Russell */ 188994af3abfSRusty Russell regs->gpr[12] = start; 189094af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 189194af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 189294af3abfSRusty Russell } else { 189394af3abfSRusty Russell unsigned long toc; 189494af3abfSRusty Russell 189594af3abfSRusty Russell /* start is a relocated pointer to the function 189694af3abfSRusty Russell * descriptor for the elf _start routine. The first 189794af3abfSRusty Russell * entry in the function descriptor is the entry 189894af3abfSRusty Russell * address of _start and the second entry is the TOC 189994af3abfSRusty Russell * value we need to use. 190006d67d54SPaul Mackerras */ 190106d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 190206d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 190306d67d54SPaul Mackerras 190406d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 190506d67d54SPaul Mackerras * need to be relocated before we can use them. 190606d67d54SPaul Mackerras */ 190706d67d54SPaul Mackerras if (load_addr != 0) { 190806d67d54SPaul Mackerras entry += load_addr; 190906d67d54SPaul Mackerras toc += load_addr; 191006d67d54SPaul Mackerras } 191106d67d54SPaul Mackerras regs->gpr[2] = toc; 191294af3abfSRusty Russell } 191359dc5bfcSNicholas Piggin regs_set_return_ip(regs, entry); 191459dc5bfcSNicholas Piggin regs_set_return_msr(regs, MSR_USER64); 1915d4bf9a78SStephen Rothwell } else { 1916d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 191759dc5bfcSNicholas Piggin regs_set_return_ip(regs, start); 191859dc5bfcSNicholas Piggin regs_set_return_msr(regs, MSR_USER32); 191906d67d54SPaul Mackerras } 192059dc5bfcSNicholas Piggin 192106d67d54SPaul Mackerras #endif 1922ce48b210SMichael Neuling #ifdef CONFIG_VSX 1923ce48b210SMichael Neuling current->thread.used_vsr = 0; 1924ce48b210SMichael Neuling #endif 19255434ae74SNicholas Piggin current->thread.load_slb = 0; 19261195892cSBreno Leitao current->thread.load_fp = 0; 1927b6254cedSChristophe Leroy #ifdef CONFIG_PPC_FPU_REGS 1928de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 192918461960SPaul Mackerras current->thread.fp_save_area = NULL; 1930b6254cedSChristophe Leroy #endif 193114cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1932de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1933de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 193418461960SPaul Mackerras current->thread.vr_save_area = NULL; 193514cf11afSPaul Mackerras current->thread.vrsave = 0; 193614cf11afSPaul Mackerras current->thread.used_vr = 0; 19371195892cSBreno Leitao current->thread.load_vec = 0; 193814cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 193914cf11afSPaul Mackerras #ifdef CONFIG_SPE 194014cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 194114cf11afSPaul Mackerras current->thread.acc = 0; 194214cf11afSPaul Mackerras current->thread.spefscr = 0; 194314cf11afSPaul Mackerras current->thread.used_spe = 0; 194414cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1945bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1946bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1947bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1948bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 19497f22ced4SBreno Leitao current->thread.load_tm = 0; 1950bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 195114cf11afSPaul Mackerras } 1952e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 195314cf11afSPaul Mackerras 195414cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 195514cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 195614cf11afSPaul Mackerras 195714cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 195814cf11afSPaul Mackerras { 195914cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 196014cf11afSPaul Mackerras 196114cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 196214cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 196314cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 196414cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 196514cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 19665e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1967640e9225SJoseph Myers /* 1968640e9225SJoseph Myers * When the sticky exception bits are set 1969640e9225SJoseph Myers * directly by userspace, it must call prctl 1970640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1971640e9225SJoseph Myers * in the existing prctl settings) or 1972640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1973640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1974640e9225SJoseph Myers * saving and restoring the whole 1975640e9225SJoseph Myers * floating-point environment need to do so 1976640e9225SJoseph Myers * anyway to restore the prctl settings from 1977640e9225SJoseph Myers * the saved environment. 1978640e9225SJoseph Myers */ 1979532ed190SChristophe Leroy #ifdef CONFIG_SPE 1980640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 198114cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 198214cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 1983532ed190SChristophe Leroy #endif 198406d67d54SPaul Mackerras return 0; 19855e14d21eSKumar Gala } else { 19865e14d21eSKumar Gala return -EINVAL; 19875e14d21eSKumar Gala } 198806d67d54SPaul Mackerras } 198906d67d54SPaul Mackerras 199014cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 199114cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 199214cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 199314cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 199414cf11afSPaul Mackerras * them does not change anything */ 199514cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 199614cf11afSPaul Mackerras return -EINVAL; 199714cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 199859dc5bfcSNicholas Piggin if (regs != NULL && (regs->msr & MSR_FP) != 0) { 199959dc5bfcSNicholas Piggin regs_set_return_msr(regs, (regs->msr & ~(MSR_FE0|MSR_FE1)) 200059dc5bfcSNicholas Piggin | tsk->thread.fpexc_mode); 200159dc5bfcSNicholas Piggin } 200214cf11afSPaul Mackerras return 0; 200314cf11afSPaul Mackerras } 200414cf11afSPaul Mackerras 200514cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 200614cf11afSPaul Mackerras { 2007d208e13cSMichael Ellerman unsigned int val = 0; 200814cf11afSPaul Mackerras 2009532ed190SChristophe Leroy if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) { 2010640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 2011640e9225SJoseph Myers /* 2012640e9225SJoseph Myers * When the sticky exception bits are set 2013640e9225SJoseph Myers * directly by userspace, it must call prctl 2014640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 2015640e9225SJoseph Myers * in the existing prctl settings) or 2016640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 2017640e9225SJoseph Myers * the bits being set). <fenv.h> functions 2018640e9225SJoseph Myers * saving and restoring the whole 2019640e9225SJoseph Myers * floating-point environment need to do so 2020640e9225SJoseph Myers * anyway to restore the prctl settings from 2021640e9225SJoseph Myers * the saved environment. 2022640e9225SJoseph Myers */ 2023532ed190SChristophe Leroy #ifdef CONFIG_SPE 2024640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 202514cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 2026532ed190SChristophe Leroy #endif 2027640e9225SJoseph Myers } else 20285e14d21eSKumar Gala return -EINVAL; 2029532ed190SChristophe Leroy } else { 203014cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 2031532ed190SChristophe Leroy } 203214cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 203314cf11afSPaul Mackerras } 203414cf11afSPaul Mackerras 2035fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 2036fab5db97SPaul Mackerras { 2037fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 2038fab5db97SPaul Mackerras 2039fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 2040fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 2041fab5db97SPaul Mackerras return -EINVAL; 2042fab5db97SPaul Mackerras 2043fab5db97SPaul Mackerras if (regs == NULL) 2044fab5db97SPaul Mackerras return -EINVAL; 2045fab5db97SPaul Mackerras 2046fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 204759dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr & ~MSR_LE); 2048fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 204959dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr | MSR_LE); 2050fab5db97SPaul Mackerras else 2051fab5db97SPaul Mackerras return -EINVAL; 2052fab5db97SPaul Mackerras 2053fab5db97SPaul Mackerras return 0; 2054fab5db97SPaul Mackerras } 2055fab5db97SPaul Mackerras 2056fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 2057fab5db97SPaul Mackerras { 2058fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 2059fab5db97SPaul Mackerras unsigned int val; 2060fab5db97SPaul Mackerras 2061fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 2062fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 2063fab5db97SPaul Mackerras return -EINVAL; 2064fab5db97SPaul Mackerras 2065fab5db97SPaul Mackerras if (regs == NULL) 2066fab5db97SPaul Mackerras return -EINVAL; 2067fab5db97SPaul Mackerras 2068fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 2069fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 2070fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 2071fab5db97SPaul Mackerras else 2072fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 2073fab5db97SPaul Mackerras } else 2074fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 2075fab5db97SPaul Mackerras 2076fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 2077fab5db97SPaul Mackerras } 2078fab5db97SPaul Mackerras 2079e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 2080e9370ae1SPaul Mackerras { 2081e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 2082e9370ae1SPaul Mackerras return 0; 2083e9370ae1SPaul Mackerras } 2084e9370ae1SPaul Mackerras 2085e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 2086e9370ae1SPaul Mackerras { 2087e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 2088e9370ae1SPaul Mackerras } 2089e9370ae1SPaul Mackerras 2090bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 2091bb72c481SPaul Mackerras unsigned long nbytes) 2092bb72c481SPaul Mackerras { 2093bb72c481SPaul Mackerras unsigned long stack_page; 2094bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 2095bb72c481SPaul Mackerras 2096bb72c481SPaul Mackerras stack_page = (unsigned long)hardirq_ctx[cpu]; 2097a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2098bb72c481SPaul Mackerras return 1; 2099bb72c481SPaul Mackerras 2100bb72c481SPaul Mackerras stack_page = (unsigned long)softirq_ctx[cpu]; 2101a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2102bb72c481SPaul Mackerras return 1; 2103a7916a1dSChristophe Leroy 2104bb72c481SPaul Mackerras return 0; 2105bb72c481SPaul Mackerras } 2106bb72c481SPaul Mackerras 2107a2e36683SNicholas Piggin static inline int valid_emergency_stack(unsigned long sp, struct task_struct *p, 2108a2e36683SNicholas Piggin unsigned long nbytes) 2109a2e36683SNicholas Piggin { 2110a2e36683SNicholas Piggin #ifdef CONFIG_PPC64 2111a2e36683SNicholas Piggin unsigned long stack_page; 2112a2e36683SNicholas Piggin unsigned long cpu = task_cpu(p); 2113a2e36683SNicholas Piggin 21140ecf6a9eSMichael Ellerman if (!paca_ptrs) 21150ecf6a9eSMichael Ellerman return 0; 21160ecf6a9eSMichael Ellerman 2117a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->emergency_sp - THREAD_SIZE; 2118a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2119a2e36683SNicholas Piggin return 1; 2120a2e36683SNicholas Piggin 2121a2e36683SNicholas Piggin # ifdef CONFIG_PPC_BOOK3S_64 2122a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->nmi_emergency_sp - THREAD_SIZE; 2123a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2124a2e36683SNicholas Piggin return 1; 2125a2e36683SNicholas Piggin 2126a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->mc_emergency_sp - THREAD_SIZE; 2127a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2128a2e36683SNicholas Piggin return 1; 2129a2e36683SNicholas Piggin # endif 2130a2e36683SNicholas Piggin #endif 2131a2e36683SNicholas Piggin 2132a2e36683SNicholas Piggin return 0; 2133a2e36683SNicholas Piggin } 2134a2e36683SNicholas Piggin 2135a2e36683SNicholas Piggin 21362f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 213714cf11afSPaul Mackerras unsigned long nbytes) 213814cf11afSPaul Mackerras { 21390cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 214014cf11afSPaul Mackerras 2141a7916a1dSChristophe Leroy if (sp < THREAD_SIZE) 2142a7916a1dSChristophe Leroy return 0; 2143a7916a1dSChristophe Leroy 2144a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 214514cf11afSPaul Mackerras return 1; 214614cf11afSPaul Mackerras 2147a2e36683SNicholas Piggin if (valid_irq_stack(sp, p, nbytes)) 2148a2e36683SNicholas Piggin return 1; 2149a2e36683SNicholas Piggin 2150a2e36683SNicholas Piggin return valid_emergency_stack(sp, p, nbytes); 215114cf11afSPaul Mackerras } 215214cf11afSPaul Mackerras 21532f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 21542f25194dSAnton Blanchard 215542a20f86SKees Cook static unsigned long ___get_wchan(struct task_struct *p) 215606d67d54SPaul Mackerras { 215706d67d54SPaul Mackerras unsigned long ip, sp; 215806d67d54SPaul Mackerras int count = 0; 215906d67d54SPaul Mackerras 216006d67d54SPaul Mackerras sp = p->thread.ksp; 2161ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 216206d67d54SPaul Mackerras return 0; 216306d67d54SPaul Mackerras 216406d67d54SPaul Mackerras do { 216506d67d54SPaul Mackerras sp = *(unsigned long *)sp; 21664ca360f3SKautuk Consul if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD) || 2167b03fbd4fSPeter Zijlstra task_is_running(p)) 216806d67d54SPaul Mackerras return 0; 216906d67d54SPaul Mackerras if (count > 0) { 2170ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 217106d67d54SPaul Mackerras if (!in_sched_functions(ip)) 217206d67d54SPaul Mackerras return ip; 217306d67d54SPaul Mackerras } 217406d67d54SPaul Mackerras } while (count++ < 16); 217506d67d54SPaul Mackerras return 0; 217606d67d54SPaul Mackerras } 217706d67d54SPaul Mackerras 217842a20f86SKees Cook unsigned long __get_wchan(struct task_struct *p) 2179018cce33SChristophe Leroy { 2180018cce33SChristophe Leroy unsigned long ret; 2181018cce33SChristophe Leroy 2182018cce33SChristophe Leroy if (!try_get_task_stack(p)) 2183018cce33SChristophe Leroy return 0; 2184018cce33SChristophe Leroy 218542a20f86SKees Cook ret = ___get_wchan(p); 2186018cce33SChristophe Leroy 2187018cce33SChristophe Leroy put_task_stack(p); 2188018cce33SChristophe Leroy 2189018cce33SChristophe Leroy return ret; 2190018cce33SChristophe Leroy } 2191018cce33SChristophe Leroy 2192c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 219314cf11afSPaul Mackerras 2194b112fb91SDaniel Axtens void __no_sanitize_address show_stack(struct task_struct *tsk, 2195b112fb91SDaniel Axtens unsigned long *stack, 2196b9677a8cSDmitry Safonov const char *loglvl) 219714cf11afSPaul Mackerras { 219806d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 219914cf11afSPaul Mackerras int count = 0; 220006d67d54SPaul Mackerras int firstframe = 1; 22017c1bb6bbSNaveen N. Rao unsigned long ret_addr; 22027c1bb6bbSNaveen N. Rao int ftrace_idx = 0; 220314cf11afSPaul Mackerras 220414cf11afSPaul Mackerras if (tsk == NULL) 220514cf11afSPaul Mackerras tsk = current; 2206018cce33SChristophe Leroy 2207018cce33SChristophe Leroy if (!try_get_task_stack(tsk)) 2208018cce33SChristophe Leroy return; 2209018cce33SChristophe Leroy 2210018cce33SChristophe Leroy sp = (unsigned long) stack; 221114cf11afSPaul Mackerras if (sp == 0) { 221214cf11afSPaul Mackerras if (tsk == current) 22133d13e839SMichael Ellerman sp = current_stack_frame(); 221414cf11afSPaul Mackerras else 221514cf11afSPaul Mackerras sp = tsk->thread.ksp; 221614cf11afSPaul Mackerras } 221714cf11afSPaul Mackerras 221806d67d54SPaul Mackerras lr = 0; 2219b9677a8cSDmitry Safonov printk("%sCall Trace:\n", loglvl); 222014cf11afSPaul Mackerras do { 2221ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 2222018cce33SChristophe Leroy break; 222306d67d54SPaul Mackerras 222406d67d54SPaul Mackerras stack = (unsigned long *) sp; 222506d67d54SPaul Mackerras newsp = stack[0]; 2226ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 222706d67d54SPaul Mackerras if (!firstframe || ip != lr) { 2228b9677a8cSDmitry Safonov printk("%s["REG"] ["REG"] %pS", 2229b9677a8cSDmitry Safonov loglvl, sp, ip, (void *)ip); 22307c1bb6bbSNaveen N. Rao ret_addr = ftrace_graph_ret_addr(current, 22317c1bb6bbSNaveen N. Rao &ftrace_idx, ip, stack); 22327c1bb6bbSNaveen N. Rao if (ret_addr != ip) 22337c1bb6bbSNaveen N. Rao pr_cont(" (%pS)", (void *)ret_addr); 223406d67d54SPaul Mackerras if (firstframe) 22359a1f490fSMichael Ellerman pr_cont(" (unreliable)"); 22369a1f490fSMichael Ellerman pr_cont("\n"); 223714cf11afSPaul Mackerras } 223806d67d54SPaul Mackerras firstframe = 0; 223906d67d54SPaul Mackerras 224006d67d54SPaul Mackerras /* 224106d67d54SPaul Mackerras * See if this is an exception frame. 224206d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 224306d67d54SPaul Mackerras */ 2244e3de1e29SMichael Ellerman if (validate_sp(sp, tsk, STACK_FRAME_WITH_PT_REGS) 2245ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 224606d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 224706d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 2248bf13718bSNicholas Piggin 224906d67d54SPaul Mackerras lr = regs->link; 2250bf13718bSNicholas Piggin printk("%s--- interrupt: %lx at %pS\n", 2251bf13718bSNicholas Piggin loglvl, regs->trap, (void *)regs->nip); 2252bf13718bSNicholas Piggin __show_regs(regs); 2253bf13718bSNicholas Piggin printk("%s--- interrupt: %lx\n", 2254bf13718bSNicholas Piggin loglvl, regs->trap); 2255bf13718bSNicholas Piggin 225606d67d54SPaul Mackerras firstframe = 1; 225714cf11afSPaul Mackerras } 225806d67d54SPaul Mackerras 225906d67d54SPaul Mackerras sp = newsp; 226006d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 2261018cce33SChristophe Leroy 2262018cce33SChristophe Leroy put_task_stack(tsk); 226306d67d54SPaul Mackerras } 226406d67d54SPaul Mackerras 2265cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 2266fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 22670e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 2268cb2c9b27SAnton Blanchard { 2269fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2270d1d0d5ffSNicholas Piggin 2271d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2272d1d0d5ffSNicholas Piggin /* 2273d1d0d5ffSNicholas Piggin * Least significant bit (RUN) is the only writable bit of 2274d1d0d5ffSNicholas Piggin * the CTRL register, so we can avoid mfspr. 2.06 is not the 2275d1d0d5ffSNicholas Piggin * earliest ISA where this is the case, but it's convenient. 2276d1d0d5ffSNicholas Piggin */ 2277d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, CTRL_RUNLATCH); 2278d1d0d5ffSNicholas Piggin } else { 2279cb2c9b27SAnton Blanchard unsigned long ctrl; 2280cb2c9b27SAnton Blanchard 2281d1d0d5ffSNicholas Piggin /* 2282d1d0d5ffSNicholas Piggin * Some architectures (e.g., Cell) have writable fields other 2283d1d0d5ffSNicholas Piggin * than RUN, so do the read-modify-write. 2284d1d0d5ffSNicholas Piggin */ 2285cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2286cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 2287cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2288d1d0d5ffSNicholas Piggin } 2289cb2c9b27SAnton Blanchard 2290fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 2291cb2c9b27SAnton Blanchard } 2292cb2c9b27SAnton Blanchard 2293fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 22940e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 2295cb2c9b27SAnton Blanchard { 2296fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2297cb2c9b27SAnton Blanchard 2298fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 2299cb2c9b27SAnton Blanchard 2300d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2301d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, 0); 2302d1d0d5ffSNicholas Piggin } else { 2303d1d0d5ffSNicholas Piggin unsigned long ctrl; 2304d1d0d5ffSNicholas Piggin 2305cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2306cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 2307cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2308cb2c9b27SAnton Blanchard } 2309d1d0d5ffSNicholas Piggin } 2310fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 2311f6a61680SBenjamin Herrenschmidt 2312d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 2313d839088cSAnton Blanchard { 2314d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 2315d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 2316d839088cSAnton Blanchard return sp & ~0xf; 2317d839088cSAnton Blanchard } 2318912f9ee2SAnton Blanchard 2319912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 2320912f9ee2SAnton Blanchard { 2321912f9ee2SAnton Blanchard unsigned long rnd = 0; 2322912f9ee2SAnton Blanchard 2323912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 2324912f9ee2SAnton Blanchard if (is_32bit_task()) 23255ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); 2326912f9ee2SAnton Blanchard else 23275ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); 2328912f9ee2SAnton Blanchard 2329912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 2330912f9ee2SAnton Blanchard } 2331912f9ee2SAnton Blanchard 2332912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 2333912f9ee2SAnton Blanchard { 23348bbde7a7SAnton Blanchard unsigned long base = mm->brk; 23358bbde7a7SAnton Blanchard unsigned long ret; 23368bbde7a7SAnton Blanchard 23374e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 23388bbde7a7SAnton Blanchard /* 23398bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 23408bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 23418bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 23428bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 2343387e220aSNicholas Piggin * performance penalty. 23448bbde7a7SAnton Blanchard */ 2345387e220aSNicholas Piggin if (!radix_enabled() && !is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 23468bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 23478bbde7a7SAnton Blanchard #endif 23488bbde7a7SAnton Blanchard 23498bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 2350912f9ee2SAnton Blanchard 2351912f9ee2SAnton Blanchard if (ret < mm->brk) 2352912f9ee2SAnton Blanchard return mm->brk; 2353912f9ee2SAnton Blanchard 2354912f9ee2SAnton Blanchard return ret; 2355912f9ee2SAnton Blanchard } 2356501cb16dSAnton Blanchard 2357