12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 214cf11afSPaul Mackerras /* 314cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 414cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 514cf11afSPaul Mackerras * 614cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 714cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 814cf11afSPaul Mackerras * 914cf11afSPaul Mackerras * PowerPC version 1014cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1114cf11afSPaul Mackerras */ 1214cf11afSPaul Mackerras 1314cf11afSPaul Mackerras #include <linux/errno.h> 1414cf11afSPaul Mackerras #include <linux/sched.h> 15b17b0153SIngo Molnar #include <linux/sched/debug.h> 1629930025SIngo Molnar #include <linux/sched/task.h> 1768db0cf1SIngo Molnar #include <linux/sched/task_stack.h> 1814cf11afSPaul Mackerras #include <linux/kernel.h> 1914cf11afSPaul Mackerras #include <linux/mm.h> 2014cf11afSPaul Mackerras #include <linux/smp.h> 2114cf11afSPaul Mackerras #include <linux/stddef.h> 2214cf11afSPaul Mackerras #include <linux/unistd.h> 2314cf11afSPaul Mackerras #include <linux/ptrace.h> 2414cf11afSPaul Mackerras #include <linux/slab.h> 2514cf11afSPaul Mackerras #include <linux/user.h> 2614cf11afSPaul Mackerras #include <linux/elf.h> 2714cf11afSPaul Mackerras #include <linux/prctl.h> 2814cf11afSPaul Mackerras #include <linux/init_task.h> 294b16f8e2SPaul Gortmaker #include <linux/export.h> 3014cf11afSPaul Mackerras #include <linux/kallsyms.h> 3114cf11afSPaul Mackerras #include <linux/mqueue.h> 3214cf11afSPaul Mackerras #include <linux/hardirq.h> 3306d67d54SPaul Mackerras #include <linux/utsname.h> 346794c782SSteven Rostedt #include <linux/ftrace.h> 3579741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 36d839088cSAnton Blanchard #include <linux/personality.h> 37d839088cSAnton Blanchard #include <linux/random.h> 385aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 397b051f66SAnton Blanchard #include <linux/uaccess.h> 407f92bc56SDaniel Axtens #include <linux/elf-randomize.h> 4106bb53b3SRam Pai #include <linux/pkeys.h> 42fb2d9505SChristophe Leroy #include <linux/seq_buf.h> 4314cf11afSPaul Mackerras 4414cf11afSPaul Mackerras #include <asm/pgtable.h> 4514cf11afSPaul Mackerras #include <asm/io.h> 4614cf11afSPaul Mackerras #include <asm/processor.h> 4714cf11afSPaul Mackerras #include <asm/mmu.h> 4814cf11afSPaul Mackerras #include <asm/prom.h> 4976032de8SMichael Ellerman #include <asm/machdep.h> 50c6622f63SPaul Mackerras #include <asm/time.h> 51ae3a197eSDavid Howells #include <asm/runlatch.h> 52a7f31841SArnd Bergmann #include <asm/syscalls.h> 53ae3a197eSDavid Howells #include <asm/switch_to.h> 54fb09692eSMichael Neuling #include <asm/tm.h> 55ae3a197eSDavid Howells #include <asm/debug.h> 5606d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5706d67d54SPaul Mackerras #include <asm/firmware.h> 58c2e480baSMadhavan Srinivasan #include <asm/hw_irq.h> 5906d67d54SPaul Mackerras #endif 607cedd601SAnton Blanchard #include <asm/code-patching.h> 617f92bc56SDaniel Axtens #include <asm/exec.h> 625d31a96eSMichael Ellerman #include <asm/livepatch.h> 63b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 640545d543SDaniel Axtens #include <asm/asm-prototypes.h> 65c9386bfdSChristophe Leroy #include <asm/stacktrace.h> 66c1fe190cSMichael Neuling #include <asm/hw_breakpoint.h> 675d31a96eSMichael Ellerman 68d6a61bfcSLuis Machado #include <linux/kprobes.h> 69d6a61bfcSLuis Machado #include <linux/kdebug.h> 7014cf11afSPaul Mackerras 718b3c34cfSMichael Neuling /* Transactional Memory debug */ 728b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 738b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 748b3c34cfSMichael Neuling #else 758b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 768b3c34cfSMichael Neuling #endif 778b3c34cfSMichael Neuling 7814cf11afSPaul Mackerras extern unsigned long _get_SP(void); 7914cf11afSPaul Mackerras 80d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8154820530SMichael Ellerman /* 8254820530SMichael Ellerman * Are we running in "Suspend disabled" mode? If so we have to block any 8354820530SMichael Ellerman * sigreturn that would get us into suspended state, and we also warn in some 8454820530SMichael Ellerman * other paths that we should never reach with suspend disabled. 8554820530SMichael Ellerman */ 8654820530SMichael Ellerman bool tm_suspend_disabled __ro_after_init = false; 8754820530SMichael Ellerman 88b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 89d31626f7SPaul Mackerras { 90d31626f7SPaul Mackerras /* 91d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 92d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 93d31626f7SPaul Mackerras * bit so that we know to restore the registers before 94d31626f7SPaul Mackerras * returning to userspace. 95d31626f7SPaul Mackerras */ 96d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 97d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 98d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 99829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 100d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 101d31626f7SPaul Mackerras } 102d31626f7SPaul Mackerras } 103dc16b553SCyril Bur 104d31626f7SPaul Mackerras #else 105b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 106d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 107d31626f7SPaul Mackerras 1083eb5d588SAnton Blanchard bool strict_msr_control; 1093eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 1103eb5d588SAnton Blanchard 1113eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 1123eb5d588SAnton Blanchard { 1133eb5d588SAnton Blanchard strict_msr_control = true; 1143eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1153eb5d588SAnton Blanchard 1163eb5d588SAnton Blanchard return 0; 1173eb5d588SAnton Blanchard } 1183eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1193eb5d588SAnton Blanchard 120e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 121e2b36d59SNicholas Piggin unsigned long notrace msr_check_and_set(unsigned long bits) 122a0e72cf1SAnton Blanchard { 123a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 124a0e72cf1SAnton Blanchard unsigned long newmsr; 125a0e72cf1SAnton Blanchard 126a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 127a0e72cf1SAnton Blanchard 128a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 129a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 130a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 131a0e72cf1SAnton Blanchard #endif 132a0e72cf1SAnton Blanchard 133a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 134a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 1353cee070aSCyril Bur 1363cee070aSCyril Bur return newmsr; 137a0e72cf1SAnton Blanchard } 138d1c72112SSimon Guo EXPORT_SYMBOL_GPL(msr_check_and_set); 139a0e72cf1SAnton Blanchard 140e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 141e2b36d59SNicholas Piggin void notrace __msr_check_and_clear(unsigned long bits) 142a0e72cf1SAnton Blanchard { 143a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 144a0e72cf1SAnton Blanchard unsigned long newmsr; 145a0e72cf1SAnton Blanchard 146a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 147a0e72cf1SAnton Blanchard 148a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 149a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 150a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 151a0e72cf1SAnton Blanchard #endif 152a0e72cf1SAnton Blanchard 153a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 154a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 155a0e72cf1SAnton Blanchard } 1563eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 157a0e72cf1SAnton Blanchard 158037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1591cdf039bSMathieu Malaterre static void __giveup_fpu(struct task_struct *tsk) 1608792468dSCyril Bur { 1618eb98037SAnton Blanchard unsigned long msr; 1628eb98037SAnton Blanchard 1638792468dSCyril Bur save_fpu(tsk); 1648eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 165fe1ef6bcSMark Cave-Ayland msr &= ~(MSR_FP|MSR_FE0|MSR_FE1); 1668792468dSCyril Bur #ifdef CONFIG_VSX 1678792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1688eb98037SAnton Blanchard msr &= ~MSR_VSX; 1698792468dSCyril Bur #endif 1708eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 1718792468dSCyril Bur } 1728792468dSCyril Bur 17398da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 17498da581eSAnton Blanchard { 17598da581eSAnton Blanchard check_if_tm_restore_required(tsk); 17698da581eSAnton Blanchard 177a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 17898da581eSAnton Blanchard __giveup_fpu(tsk); 179a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 18098da581eSAnton Blanchard } 18198da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 18298da581eSAnton Blanchard 18314cf11afSPaul Mackerras /* 18414cf11afSPaul Mackerras * Make sure the floating-point register state in the 18514cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 18614cf11afSPaul Mackerras */ 18714cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 18814cf11afSPaul Mackerras { 18914cf11afSPaul Mackerras if (tsk->thread.regs) { 19014cf11afSPaul Mackerras /* 19114cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 19214cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 19314cf11afSPaul Mackerras * test but before we have finished saving the FP registers 19414cf11afSPaul Mackerras * to the thread_struct. That process could take over the 19514cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 19614cf11afSPaul Mackerras * bogus values for the remaining FP registers. 19714cf11afSPaul Mackerras */ 19814cf11afSPaul Mackerras preempt_disable(); 19914cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 20014cf11afSPaul Mackerras /* 20114cf11afSPaul Mackerras * This should only ever be called for current or 20214cf11afSPaul Mackerras * for a stopped child process. Since we save away 203af1bbc3dSAnton Blanchard * the FP register state on context switch, 20414cf11afSPaul Mackerras * there is something wrong if a stopped child appears 20514cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 20614cf11afSPaul Mackerras */ 20714cf11afSPaul Mackerras BUG_ON(tsk != current); 208b86fd2bdSAnton Blanchard giveup_fpu(tsk); 20914cf11afSPaul Mackerras } 21014cf11afSPaul Mackerras preempt_enable(); 21114cf11afSPaul Mackerras } 21214cf11afSPaul Mackerras } 213de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 21414cf11afSPaul Mackerras 21514cf11afSPaul Mackerras void enable_kernel_fp(void) 21614cf11afSPaul Mackerras { 217e909fb83SCyril Bur unsigned long cpumsr; 218e909fb83SCyril Bur 21914cf11afSPaul Mackerras WARN_ON(preemptible()); 22014cf11afSPaul Mackerras 221e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP); 222611b0e5cSAnton Blanchard 223d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 224d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 225e909fb83SCyril Bur /* 226e909fb83SCyril Bur * If a thread has already been reclaimed then the 227e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 228e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 229e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 230e909fb83SCyril Bur * checkpointed structure. 231e909fb83SCyril Bur */ 2325c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2335c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 234e909fb83SCyril Bur return; 235a0e72cf1SAnton Blanchard __giveup_fpu(current); 236b86fd2bdSAnton Blanchard } 237d64d02ceSAnton Blanchard } 23814cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 23970fe3d98SCyril Bur 2406a303833SBenjamin Herrenschmidt static int restore_fp(struct task_struct *tsk) 2416a303833SBenjamin Herrenschmidt { 242a8318c13SGustavo Romero if (tsk->thread.load_fp) { 24370fe3d98SCyril Bur load_fp_state(¤t->thread.fp_state); 24470fe3d98SCyril Bur current->thread.load_fp++; 24570fe3d98SCyril Bur return 1; 24670fe3d98SCyril Bur } 24770fe3d98SCyril Bur return 0; 24870fe3d98SCyril Bur } 24970fe3d98SCyril Bur #else 25070fe3d98SCyril Bur static int restore_fp(struct task_struct *tsk) { return 0; } 251d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 25214cf11afSPaul Mackerras 25314cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 25470fe3d98SCyril Bur #define loadvec(thr) ((thr).load_vec) 25570fe3d98SCyril Bur 2566f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2576f515d84SCyril Bur { 2588eb98037SAnton Blanchard unsigned long msr; 2598eb98037SAnton Blanchard 2606f515d84SCyril Bur save_altivec(tsk); 2618eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2628eb98037SAnton Blanchard msr &= ~MSR_VEC; 2636f515d84SCyril Bur #ifdef CONFIG_VSX 2646f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2658eb98037SAnton Blanchard msr &= ~MSR_VSX; 2666f515d84SCyril Bur #endif 2678eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 2686f515d84SCyril Bur } 2696f515d84SCyril Bur 27098da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 27198da581eSAnton Blanchard { 27298da581eSAnton Blanchard check_if_tm_restore_required(tsk); 27398da581eSAnton Blanchard 274a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 27598da581eSAnton Blanchard __giveup_altivec(tsk); 276a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 27798da581eSAnton Blanchard } 27898da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 27998da581eSAnton Blanchard 28014cf11afSPaul Mackerras void enable_kernel_altivec(void) 28114cf11afSPaul Mackerras { 282e909fb83SCyril Bur unsigned long cpumsr; 283e909fb83SCyril Bur 28414cf11afSPaul Mackerras WARN_ON(preemptible()); 28514cf11afSPaul Mackerras 286e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_VEC); 287611b0e5cSAnton Blanchard 288d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 289d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 290e909fb83SCyril Bur /* 291e909fb83SCyril Bur * If a thread has already been reclaimed then the 292e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 293e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 294e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 295e909fb83SCyril Bur * checkpointed structure. 296e909fb83SCyril Bur */ 2975c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2985c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 299e909fb83SCyril Bur return; 300a0e72cf1SAnton Blanchard __giveup_altivec(current); 301b86fd2bdSAnton Blanchard } 302d64d02ceSAnton Blanchard } 30314cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 30414cf11afSPaul Mackerras 30514cf11afSPaul Mackerras /* 30614cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 30714cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 30814cf11afSPaul Mackerras */ 30914cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 31014cf11afSPaul Mackerras { 31114cf11afSPaul Mackerras if (tsk->thread.regs) { 31214cf11afSPaul Mackerras preempt_disable(); 31314cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 31414cf11afSPaul Mackerras BUG_ON(tsk != current); 315b86fd2bdSAnton Blanchard giveup_altivec(tsk); 31614cf11afSPaul Mackerras } 31714cf11afSPaul Mackerras preempt_enable(); 31814cf11afSPaul Mackerras } 31914cf11afSPaul Mackerras } 320de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 32170fe3d98SCyril Bur 32270fe3d98SCyril Bur static int restore_altivec(struct task_struct *tsk) 32370fe3d98SCyril Bur { 324a8318c13SGustavo Romero if (cpu_has_feature(CPU_FTR_ALTIVEC) && (tsk->thread.load_vec)) { 32570fe3d98SCyril Bur load_vr_state(&tsk->thread.vr_state); 32670fe3d98SCyril Bur tsk->thread.used_vr = 1; 32770fe3d98SCyril Bur tsk->thread.load_vec++; 32870fe3d98SCyril Bur 32970fe3d98SCyril Bur return 1; 33070fe3d98SCyril Bur } 33170fe3d98SCyril Bur return 0; 33270fe3d98SCyril Bur } 33370fe3d98SCyril Bur #else 33470fe3d98SCyril Bur #define loadvec(thr) 0 33570fe3d98SCyril Bur static inline int restore_altivec(struct task_struct *tsk) { return 0; } 33614cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 33714cf11afSPaul Mackerras 338ce48b210SMichael Neuling #ifdef CONFIG_VSX 339bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 340a7d623d4SAnton Blanchard { 341dc801081SBenjamin Herrenschmidt unsigned long msr = tsk->thread.regs->msr; 342dc801081SBenjamin Herrenschmidt 343dc801081SBenjamin Herrenschmidt /* 344dc801081SBenjamin Herrenschmidt * We should never be ssetting MSR_VSX without also setting 345dc801081SBenjamin Herrenschmidt * MSR_FP and MSR_VEC 346dc801081SBenjamin Herrenschmidt */ 347dc801081SBenjamin Herrenschmidt WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); 348dc801081SBenjamin Herrenschmidt 349dc801081SBenjamin Herrenschmidt /* __giveup_fpu will clear MSR_VSX */ 350dc801081SBenjamin Herrenschmidt if (msr & MSR_FP) 351a7d623d4SAnton Blanchard __giveup_fpu(tsk); 352dc801081SBenjamin Herrenschmidt if (msr & MSR_VEC) 353a7d623d4SAnton Blanchard __giveup_altivec(tsk); 354bf6a4d5bSCyril Bur } 355bf6a4d5bSCyril Bur 356bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 357bf6a4d5bSCyril Bur { 358bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 359bf6a4d5bSCyril Bur 360bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 361a7d623d4SAnton Blanchard __giveup_vsx(tsk); 362a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 363a7d623d4SAnton Blanchard } 364bf6a4d5bSCyril Bur 365ce48b210SMichael Neuling void enable_kernel_vsx(void) 366ce48b210SMichael Neuling { 367e909fb83SCyril Bur unsigned long cpumsr; 368e909fb83SCyril Bur 369ce48b210SMichael Neuling WARN_ON(preemptible()); 370ce48b210SMichael Neuling 371e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 372611b0e5cSAnton Blanchard 3735a69aec9SBenjamin Herrenschmidt if (current->thread.regs && 3745a69aec9SBenjamin Herrenschmidt (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { 375d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 376e909fb83SCyril Bur /* 377e909fb83SCyril Bur * If a thread has already been reclaimed then the 378e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 379e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 380e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 381e909fb83SCyril Bur * checkpointed structure. 382e909fb83SCyril Bur */ 3835c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 3845c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 385e909fb83SCyril Bur return; 386a0e72cf1SAnton Blanchard __giveup_vsx(current); 387611b0e5cSAnton Blanchard } 388ce48b210SMichael Neuling } 389ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 390ce48b210SMichael Neuling 391ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 392ce48b210SMichael Neuling { 393ce48b210SMichael Neuling if (tsk->thread.regs) { 394ce48b210SMichael Neuling preempt_disable(); 3955a69aec9SBenjamin Herrenschmidt if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { 396ce48b210SMichael Neuling BUG_ON(tsk != current); 397ce48b210SMichael Neuling giveup_vsx(tsk); 398ce48b210SMichael Neuling } 399ce48b210SMichael Neuling preempt_enable(); 400ce48b210SMichael Neuling } 401ce48b210SMichael Neuling } 402de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 40370fe3d98SCyril Bur 40470fe3d98SCyril Bur static int restore_vsx(struct task_struct *tsk) 40570fe3d98SCyril Bur { 40670fe3d98SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) { 40770fe3d98SCyril Bur tsk->thread.used_vsr = 1; 40870fe3d98SCyril Bur return 1; 40970fe3d98SCyril Bur } 41070fe3d98SCyril Bur 41170fe3d98SCyril Bur return 0; 41270fe3d98SCyril Bur } 41370fe3d98SCyril Bur #else 41470fe3d98SCyril Bur static inline int restore_vsx(struct task_struct *tsk) { return 0; } 415ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 416ce48b210SMichael Neuling 41714cf11afSPaul Mackerras #ifdef CONFIG_SPE 41898da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 41998da581eSAnton Blanchard { 42098da581eSAnton Blanchard check_if_tm_restore_required(tsk); 42198da581eSAnton Blanchard 422a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 42398da581eSAnton Blanchard __giveup_spe(tsk); 424a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 42598da581eSAnton Blanchard } 42698da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 42714cf11afSPaul Mackerras 42814cf11afSPaul Mackerras void enable_kernel_spe(void) 42914cf11afSPaul Mackerras { 43014cf11afSPaul Mackerras WARN_ON(preemptible()); 43114cf11afSPaul Mackerras 432a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 433611b0e5cSAnton Blanchard 434d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 435d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 436a0e72cf1SAnton Blanchard __giveup_spe(current); 43714cf11afSPaul Mackerras } 438d64d02ceSAnton Blanchard } 43914cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 44014cf11afSPaul Mackerras 44114cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 44214cf11afSPaul Mackerras { 44314cf11afSPaul Mackerras if (tsk->thread.regs) { 44414cf11afSPaul Mackerras preempt_disable(); 44514cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 44614cf11afSPaul Mackerras BUG_ON(tsk != current); 447685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 4480ee6c15eSKumar Gala giveup_spe(tsk); 44914cf11afSPaul Mackerras } 45014cf11afSPaul Mackerras preempt_enable(); 45114cf11afSPaul Mackerras } 45214cf11afSPaul Mackerras } 45314cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 45414cf11afSPaul Mackerras 455c2085059SAnton Blanchard static unsigned long msr_all_available; 456c2085059SAnton Blanchard 457c2085059SAnton Blanchard static int __init init_msr_all_available(void) 458c2085059SAnton Blanchard { 459c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 460c2085059SAnton Blanchard msr_all_available |= MSR_FP; 461c2085059SAnton Blanchard #endif 462c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 463c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 464c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 465c2085059SAnton Blanchard #endif 466c2085059SAnton Blanchard #ifdef CONFIG_VSX 467c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 468c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 469c2085059SAnton Blanchard #endif 470c2085059SAnton Blanchard #ifdef CONFIG_SPE 471c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 472c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 473c2085059SAnton Blanchard #endif 474c2085059SAnton Blanchard 475c2085059SAnton Blanchard return 0; 476c2085059SAnton Blanchard } 477c2085059SAnton Blanchard early_initcall(init_msr_all_available); 478c2085059SAnton Blanchard 479c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 480c2085059SAnton Blanchard { 481c2085059SAnton Blanchard unsigned long usermsr; 482c2085059SAnton Blanchard 483c2085059SAnton Blanchard if (!tsk->thread.regs) 484c2085059SAnton Blanchard return; 485c2085059SAnton Blanchard 4868205d5d9SGustavo Romero check_if_tm_restore_required(tsk); 4878205d5d9SGustavo Romero 488c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 489c2085059SAnton Blanchard 490c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 491c2085059SAnton Blanchard return; 492c2085059SAnton Blanchard 493c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 494c2085059SAnton Blanchard 49596c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 49696c79b6bSBenjamin Herrenschmidt 497c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 498c2085059SAnton Blanchard if (usermsr & MSR_FP) 499c2085059SAnton Blanchard __giveup_fpu(tsk); 500c2085059SAnton Blanchard #endif 501c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 502c2085059SAnton Blanchard if (usermsr & MSR_VEC) 503c2085059SAnton Blanchard __giveup_altivec(tsk); 504c2085059SAnton Blanchard #endif 505c2085059SAnton Blanchard #ifdef CONFIG_SPE 506c2085059SAnton Blanchard if (usermsr & MSR_SPE) 507c2085059SAnton Blanchard __giveup_spe(tsk); 508c2085059SAnton Blanchard #endif 509c2085059SAnton Blanchard 510c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 511c2085059SAnton Blanchard } 512c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 513c2085059SAnton Blanchard 514e2b36d59SNicholas Piggin /* 515e2b36d59SNicholas Piggin * The exception exit path calls restore_math() with interrupts hard disabled 516e2b36d59SNicholas Piggin * but the soft irq state not "reconciled". ftrace code that calls 517e2b36d59SNicholas Piggin * local_irq_save/restore causes warnings. 518e2b36d59SNicholas Piggin * 519e2b36d59SNicholas Piggin * Rather than complicate the exit path, just don't trace restore_math. This 520e2b36d59SNicholas Piggin * could be done by having ftrace entry code check for this un-reconciled 521e2b36d59SNicholas Piggin * condition where MSR[EE]=0 and PACA_IRQ_HARD_DIS is not set, and 522e2b36d59SNicholas Piggin * temporarily fix it up for the duration of the ftrace call. 523e2b36d59SNicholas Piggin */ 524e2b36d59SNicholas Piggin void notrace restore_math(struct pt_regs *regs) 52570fe3d98SCyril Bur { 52670fe3d98SCyril Bur unsigned long msr; 52770fe3d98SCyril Bur 5285c784c84SBreno Leitao if (!MSR_TM_ACTIVE(regs->msr) && 529dc16b553SCyril Bur !current->thread.load_fp && !loadvec(current->thread)) 53070fe3d98SCyril Bur return; 53170fe3d98SCyril Bur 53270fe3d98SCyril Bur msr = regs->msr; 53370fe3d98SCyril Bur msr_check_and_set(msr_all_available); 53470fe3d98SCyril Bur 53570fe3d98SCyril Bur /* 53670fe3d98SCyril Bur * Only reload if the bit is not set in the user MSR, the bit BEING set 53770fe3d98SCyril Bur * indicates that the registers are hot 53870fe3d98SCyril Bur */ 53970fe3d98SCyril Bur if ((!(msr & MSR_FP)) && restore_fp(current)) 54070fe3d98SCyril Bur msr |= MSR_FP | current->thread.fpexc_mode; 54170fe3d98SCyril Bur 54270fe3d98SCyril Bur if ((!(msr & MSR_VEC)) && restore_altivec(current)) 54370fe3d98SCyril Bur msr |= MSR_VEC; 54470fe3d98SCyril Bur 54570fe3d98SCyril Bur if ((msr & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC) && 54670fe3d98SCyril Bur restore_vsx(current)) { 54770fe3d98SCyril Bur msr |= MSR_VSX; 54870fe3d98SCyril Bur } 54970fe3d98SCyril Bur 55070fe3d98SCyril Bur msr_check_and_clear(msr_all_available); 55170fe3d98SCyril Bur 55270fe3d98SCyril Bur regs->msr = msr; 55370fe3d98SCyril Bur } 55470fe3d98SCyril Bur 5551cdf039bSMathieu Malaterre static void save_all(struct task_struct *tsk) 556de2a20aaSCyril Bur { 557de2a20aaSCyril Bur unsigned long usermsr; 558de2a20aaSCyril Bur 559de2a20aaSCyril Bur if (!tsk->thread.regs) 560de2a20aaSCyril Bur return; 561de2a20aaSCyril Bur 562de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 563de2a20aaSCyril Bur 564de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 565de2a20aaSCyril Bur return; 566de2a20aaSCyril Bur 567de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 568de2a20aaSCyril Bur 56996c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 57096c79b6bSBenjamin Herrenschmidt 571de2a20aaSCyril Bur if (usermsr & MSR_FP) 5728792468dSCyril Bur save_fpu(tsk); 573de2a20aaSCyril Bur 574de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5756f515d84SCyril Bur save_altivec(tsk); 576de2a20aaSCyril Bur 577de2a20aaSCyril Bur if (usermsr & MSR_SPE) 578de2a20aaSCyril Bur __giveup_spe(tsk); 579de2a20aaSCyril Bur 580de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 581c76662e8SRam Pai thread_pkey_regs_save(&tsk->thread); 582de2a20aaSCyril Bur } 583de2a20aaSCyril Bur 584579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 585579e633eSAnton Blanchard { 586579e633eSAnton Blanchard if (tsk->thread.regs) { 587579e633eSAnton Blanchard preempt_disable(); 588579e633eSAnton Blanchard BUG_ON(tsk != current); 589579e633eSAnton Blanchard #ifdef CONFIG_SPE 590579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 591579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 592579e633eSAnton Blanchard #endif 593e9013785SFelipe Rechia save_all(tsk); 594579e633eSAnton Blanchard 595579e633eSAnton Blanchard preempt_enable(); 596579e633eSAnton Blanchard } 597579e633eSAnton Blanchard } 598579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 599579e633eSAnton Blanchard 6003bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6013bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 60247355040SEric W. Biederman unsigned long error_code, int breakpt) 6033bffb652SDave Kleikamp { 60447355040SEric W. Biederman current->thread.trap_nr = TRAP_HWBKPT; 6053bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 6063bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 6073bffb652SDave Kleikamp return; 6083bffb652SDave Kleikamp 6093bffb652SDave Kleikamp /* Deliver the signal to userspace */ 610f71dd7dcSEric W. Biederman force_sig_ptrace_errno_trap(breakpt, /* breakpoint or watchpoint id */ 611f71dd7dcSEric W. Biederman (void __user *)address); 6123bffb652SDave Kleikamp } 6133bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 6149422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 615d6a61bfcSLuis Machado unsigned long error_code) 616d6a61bfcSLuis Machado { 61741ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 618d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 619d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 620d6a61bfcSLuis Machado return; 621d6a61bfcSLuis Machado 6229422de3eSMichael Neuling if (debugger_break_match(regs)) 623d6a61bfcSLuis Machado return; 624d6a61bfcSLuis Machado 6259422de3eSMichael Neuling /* Clear the breakpoint */ 6269422de3eSMichael Neuling hw_breakpoint_disable(); 627d6a61bfcSLuis Machado 628d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 6292e1661d2SEric W. Biederman force_sig_fault(SIGTRAP, TRAP_HWBKPT, (void __user *)address); 630d6a61bfcSLuis Machado } 6313bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 632d6a61bfcSLuis Machado 6339422de3eSMichael Neuling static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk); 634a2ceff5eSMichael Ellerman 6353bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6363bffb652SDave Kleikamp /* 6373bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 6383bffb652SDave Kleikamp */ 6393bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6403bffb652SDave Kleikamp { 64151ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 6423bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 64351ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 6443bffb652SDave Kleikamp #endif 64551ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 6463bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 64751ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 6483bffb652SDave Kleikamp #endif 64951ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 6503bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 6513bffb652SDave Kleikamp /* 6523bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 6533bffb652SDave Kleikamp */ 65451ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 6553bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 6563bffb652SDave Kleikamp /* 6573bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 6583bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 6593bffb652SDave Kleikamp */ 66051ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 6613bffb652SDave Kleikamp #else 66251ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 6633bffb652SDave Kleikamp #endif 6643bffb652SDave Kleikamp } 6653bffb652SDave Kleikamp 666f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 6673bffb652SDave Kleikamp { 6686cecf76bSScott Wood /* 6696cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 6706cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 6716cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 6726cecf76bSScott Wood */ 6736cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 6746cecf76bSScott Wood 675f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 676f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 6773bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 678f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 679f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 6803bffb652SDave Kleikamp #endif 681f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 682f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 6833bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 684f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 685f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 6863bffb652SDave Kleikamp #endif 687f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 688f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 6893bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 690f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 6913bffb652SDave Kleikamp #endif 6923bffb652SDave Kleikamp } 6933bffb652SDave Kleikamp /* 6943bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 6953bffb652SDave Kleikamp * debug registers, set the debug registers from the values 6963bffb652SDave Kleikamp * stored in the new thread. 6973bffb652SDave Kleikamp */ 698f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 6993bffb652SDave Kleikamp { 70051ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 701f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 702f5f97210SScott Wood prime_debug_regs(new_debug); 7033bffb652SDave Kleikamp } 7043743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 7053bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 706e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 707b5ac51d7SChristophe Leroy static void set_breakpoint(struct arch_hw_breakpoint *brk) 708b5ac51d7SChristophe Leroy { 709b5ac51d7SChristophe Leroy preempt_disable(); 710b5ac51d7SChristophe Leroy __set_breakpoint(brk); 711b5ac51d7SChristophe Leroy preempt_enable(); 712b5ac51d7SChristophe Leroy } 713b5ac51d7SChristophe Leroy 7143bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 7153bffb652SDave Kleikamp { 7169422de3eSMichael Neuling thread->hw_brk.address = 0; 7179422de3eSMichael Neuling thread->hw_brk.type = 0; 718b57aeab8SRavi Bangoria thread->hw_brk.len = 0; 719b57aeab8SRavi Bangoria thread->hw_brk.hw_len = 0; 720252988cbSNicholas Piggin if (ppc_breakpoint_available()) 721b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 7223bffb652SDave Kleikamp } 723e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 7243bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 7253bffb652SDave Kleikamp 726172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 7279422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7289422de3eSMichael Neuling { 729c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 730221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 731221c185dSDave Kleikamp isync(); 732221c185dSDave Kleikamp #endif 7339422de3eSMichael Neuling return 0; 7349422de3eSMichael Neuling } 735c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 7369422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7379422de3eSMichael Neuling { 738cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 73982a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 7404474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 741cab0af98SMichael Ellerman return 0; 74214cf11afSPaul Mackerras } 7439422de3eSMichael Neuling #else 7449422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7459422de3eSMichael Neuling { 7469422de3eSMichael Neuling return -EINVAL; 7479422de3eSMichael Neuling } 7489422de3eSMichael Neuling #endif 7499422de3eSMichael Neuling 7509422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 7519422de3eSMichael Neuling { 7529422de3eSMichael Neuling unsigned long dabr, dabrx; 7539422de3eSMichael Neuling 7549422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 7559422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 7569422de3eSMichael Neuling 7579422de3eSMichael Neuling if (ppc_md.set_dabr) 7589422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 7599422de3eSMichael Neuling 7609422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 7619422de3eSMichael Neuling } 7629422de3eSMichael Neuling 76339413ae0SChristophe Leroy static inline int set_breakpoint_8xx(struct arch_hw_breakpoint *brk) 76439413ae0SChristophe Leroy { 76539413ae0SChristophe Leroy unsigned long lctrl1 = LCTRL1_CTE_GT | LCTRL1_CTF_LT | LCTRL1_CRWE_RW | 76639413ae0SChristophe Leroy LCTRL1_CRWF_RW; 76739413ae0SChristophe Leroy unsigned long lctrl2 = LCTRL2_LW0EN | LCTRL2_LW0LADC | LCTRL2_SLW0EN; 76839413ae0SChristophe Leroy unsigned long start_addr = brk->address & ~HW_BREAKPOINT_ALIGN; 76939413ae0SChristophe Leroy unsigned long end_addr = (brk->address + brk->len - 1) | HW_BREAKPOINT_ALIGN; 77039413ae0SChristophe Leroy 77139413ae0SChristophe Leroy if (start_addr == 0) 77239413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_F; 77339413ae0SChristophe Leroy else if (end_addr == ~0U) 77439413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_E; 77539413ae0SChristophe Leroy else 77639413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_EandF; 77739413ae0SChristophe Leroy 77839413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, 0); 77939413ae0SChristophe Leroy 78039413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == 0) 78139413ae0SChristophe Leroy return 0; 78239413ae0SChristophe Leroy 78339413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_READ) 78439413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_RO | LCTRL1_CRWF_RO; 78539413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_WRITE) 78639413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_WO | LCTRL1_CRWF_WO; 78739413ae0SChristophe Leroy 78839413ae0SChristophe Leroy mtspr(SPRN_CMPE, start_addr - 1); 78939413ae0SChristophe Leroy mtspr(SPRN_CMPF, end_addr + 1); 79039413ae0SChristophe Leroy mtspr(SPRN_LCTRL1, lctrl1); 79139413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, lctrl2); 79239413ae0SChristophe Leroy 79339413ae0SChristophe Leroy return 0; 79439413ae0SChristophe Leroy } 79539413ae0SChristophe Leroy 79621f58507SPaul Gortmaker void __set_breakpoint(struct arch_hw_breakpoint *brk) 7979422de3eSMichael Neuling { 79869111bacSChristoph Lameter memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk)); 7999422de3eSMichael Neuling 800c1fe190cSMichael Neuling if (dawr_enabled()) 801252988cbSNicholas Piggin // Power8 or later 80204c32a51SPaul Gortmaker set_dawr(brk); 80339413ae0SChristophe Leroy else if (IS_ENABLED(CONFIG_PPC_8xx)) 80439413ae0SChristophe Leroy set_breakpoint_8xx(brk); 805252988cbSNicholas Piggin else if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 806252988cbSNicholas Piggin // Power7 or earlier 80704c32a51SPaul Gortmaker set_dabr(brk); 808252988cbSNicholas Piggin else 809252988cbSNicholas Piggin // Shouldn't happen due to higher level checks 810252988cbSNicholas Piggin WARN_ON_ONCE(1); 8119422de3eSMichael Neuling } 81214cf11afSPaul Mackerras 813404b27d6SMichael Neuling /* Check if we have DAWR or DABR hardware */ 814404b27d6SMichael Neuling bool ppc_breakpoint_available(void) 815404b27d6SMichael Neuling { 816c1fe190cSMichael Neuling if (dawr_enabled()) 817c1fe190cSMichael Neuling return true; /* POWER8 DAWR or POWER9 forced DAWR */ 818404b27d6SMichael Neuling if (cpu_has_feature(CPU_FTR_ARCH_207S)) 819404b27d6SMichael Neuling return false; /* POWER9 with DAWR disabled */ 820404b27d6SMichael Neuling /* DABR: Everything but POWER8 and POWER9 */ 821404b27d6SMichael Neuling return true; 822404b27d6SMichael Neuling } 823404b27d6SMichael Neuling EXPORT_SYMBOL_GPL(ppc_breakpoint_available); 824404b27d6SMichael Neuling 8259422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 8269422de3eSMichael Neuling struct arch_hw_breakpoint *b) 8279422de3eSMichael Neuling { 8289422de3eSMichael Neuling if (a->address != b->address) 8299422de3eSMichael Neuling return false; 8309422de3eSMichael Neuling if (a->type != b->type) 8319422de3eSMichael Neuling return false; 8329422de3eSMichael Neuling if (a->len != b->len) 8339422de3eSMichael Neuling return false; 834b57aeab8SRavi Bangoria /* no need to check hw_len. it's calculated from address and len */ 8359422de3eSMichael Neuling return true; 8369422de3eSMichael Neuling } 837d31626f7SPaul Mackerras 838fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8395d176f75SCyril Bur 8405d176f75SCyril Bur static inline bool tm_enabled(struct task_struct *tsk) 8415d176f75SCyril Bur { 8425d176f75SCyril Bur return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); 8435d176f75SCyril Bur } 8445d176f75SCyril Bur 845edd00b83SCyril Bur static void tm_reclaim_thread(struct thread_struct *thr, uint8_t cause) 846d31626f7SPaul Mackerras { 8477f821fc9SMichael Neuling /* 8487f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 8497f821fc9SMichael Neuling * checkpointed state outstanding. 8507f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 8517f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 8527f821fc9SMichael Neuling * This will then directly return to userspace without going 8537f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 8547f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 8557f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 8567f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 8577f821fc9SMichael Neuling * this state. 8587f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 8597f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 860027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 8617f821fc9SMichael Neuling */ 8627f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 8637f821fc9SMichael Neuling return; 8647f821fc9SMichael Neuling 86591381b9cSCyril Bur giveup_all(container_of(thr, struct task_struct, thread)); 86691381b9cSCyril Bur 867eb5c3f1cSCyril Bur tm_reclaim(thr, cause); 868eb5c3f1cSCyril Bur 869f48e91e8SMichael Neuling /* 870f48e91e8SMichael Neuling * If we are in a transaction and FP is off then we can't have 871f48e91e8SMichael Neuling * used FP inside that transaction. Hence the checkpointed 872f48e91e8SMichael Neuling * state is the same as the live state. We need to copy the 873f48e91e8SMichael Neuling * live state to the checkpointed state so that when the 874f48e91e8SMichael Neuling * transaction is restored, the checkpointed state is correct 875f48e91e8SMichael Neuling * and the aborted transaction sees the correct state. We use 876f48e91e8SMichael Neuling * ckpt_regs.msr here as that's what tm_reclaim will use to 877f48e91e8SMichael Neuling * determine if it's going to write the checkpointed state or 878f48e91e8SMichael Neuling * not. So either this will write the checkpointed registers, 879f48e91e8SMichael Neuling * or reclaim will. Similarly for VMX. 880f48e91e8SMichael Neuling */ 881f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_FP) == 0) 882f48e91e8SMichael Neuling memcpy(&thr->ckfp_state, &thr->fp_state, 883f48e91e8SMichael Neuling sizeof(struct thread_fp_state)); 884f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_VEC) == 0) 885f48e91e8SMichael Neuling memcpy(&thr->ckvr_state, &thr->vr_state, 886f48e91e8SMichael Neuling sizeof(struct thread_vr_state)); 887d31626f7SPaul Mackerras } 888d31626f7SPaul Mackerras 889d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 890d31626f7SPaul Mackerras { 891d31626f7SPaul Mackerras tm_enable(); 892edd00b83SCyril Bur tm_reclaim_thread(¤t->thread, cause); 893d31626f7SPaul Mackerras } 894d31626f7SPaul Mackerras 895fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 896fb09692eSMichael Neuling { 897fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 898fb09692eSMichael Neuling * middle of a transaction. 899fb09692eSMichael Neuling * 900fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 901fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 902000ec280SCyril Bur * checkpointed (tbegin) state in ckpt_regs, ckfp_state and 903000ec280SCyril Bur * ckvr_state 904fb09692eSMichael Neuling * 905fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 906fb09692eSMichael Neuling */ 907fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 908fb09692eSMichael Neuling 909fb09692eSMichael Neuling if (!thr->regs) 910fb09692eSMichael Neuling return; 911fb09692eSMichael Neuling 912fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 913fb09692eSMichael Neuling goto out_and_saveregs; 914fb09692eSMichael Neuling 91592fb8690SMichael Neuling WARN_ON(tm_suspend_disabled); 91692fb8690SMichael Neuling 917fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 918fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 919fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 920fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 921fb09692eSMichael Neuling thr->regs->trap); 922fb09692eSMichael Neuling 923edd00b83SCyril Bur tm_reclaim_thread(thr, TM_CAUSE_RESCHED); 924fb09692eSMichael Neuling 925fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 926fb09692eSMichael Neuling tsk->pid); 927fb09692eSMichael Neuling 928fb09692eSMichael Neuling out_and_saveregs: 929fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 930fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 931fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 932fb09692eSMichael Neuling * cannot happen later in _switch(). 933fb09692eSMichael Neuling */ 934fb09692eSMichael Neuling tm_save_sprs(thr); 935fb09692eSMichael Neuling } 936fb09692eSMichael Neuling 937eb5c3f1cSCyril Bur extern void __tm_recheckpoint(struct thread_struct *thread); 938e6b8fd02SMichael Neuling 939eb5c3f1cSCyril Bur void tm_recheckpoint(struct thread_struct *thread) 940e6b8fd02SMichael Neuling { 941e6b8fd02SMichael Neuling unsigned long flags; 942e6b8fd02SMichael Neuling 9435d176f75SCyril Bur if (!(thread->regs->msr & MSR_TM)) 9445d176f75SCyril Bur return; 9455d176f75SCyril Bur 946e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 947e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 948e6b8fd02SMichael Neuling * So let's hard disable over this region. 949e6b8fd02SMichael Neuling */ 950e6b8fd02SMichael Neuling local_irq_save(flags); 951e6b8fd02SMichael Neuling hard_irq_disable(); 952e6b8fd02SMichael Neuling 953e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 954e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 955e6b8fd02SMichael Neuling */ 956e6b8fd02SMichael Neuling tm_restore_sprs(thread); 957e6b8fd02SMichael Neuling 958eb5c3f1cSCyril Bur __tm_recheckpoint(thread); 959e6b8fd02SMichael Neuling 960e6b8fd02SMichael Neuling local_irq_restore(flags); 961e6b8fd02SMichael Neuling } 962e6b8fd02SMichael Neuling 963bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 964fb09692eSMichael Neuling { 965fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 966fb09692eSMichael Neuling return; 967fb09692eSMichael Neuling 968fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 969fb09692eSMichael Neuling * 970fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 971fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 972fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 973dc310669SCyril Bur * unavailable later, we are unable to determine which set of FP regs 974fb09692eSMichael Neuling * need to be restored. 975fb09692eSMichael Neuling */ 9765d176f75SCyril Bur if (!tm_enabled(new)) 977fb09692eSMichael Neuling return; 978fb09692eSMichael Neuling 979e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 980fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 981fb09692eSMichael Neuling return; 982e6b8fd02SMichael Neuling } 983fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 984eb5c3f1cSCyril Bur TM_DEBUG("*** tm_recheckpoint of pid %d (new->msr 0x%lx)\n", 985eb5c3f1cSCyril Bur new->pid, new->thread.regs->msr); 986fb09692eSMichael Neuling 987eb5c3f1cSCyril Bur tm_recheckpoint(&new->thread); 988fb09692eSMichael Neuling 989dc310669SCyril Bur /* 990dc310669SCyril Bur * The checkpointed state has been restored but the live state has 991dc310669SCyril Bur * not, ensure all the math functionality is turned off to trigger 992dc310669SCyril Bur * restore_math() to reload. 993dc310669SCyril Bur */ 994dc310669SCyril Bur new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); 995fb09692eSMichael Neuling 996fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 997fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 998fb09692eSMichael Neuling new->pid, mfmsr()); 999fb09692eSMichael Neuling } 1000fb09692eSMichael Neuling 1001dc310669SCyril Bur static inline void __switch_to_tm(struct task_struct *prev, 1002dc310669SCyril Bur struct task_struct *new) 1003fb09692eSMichael Neuling { 1004fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 10055d176f75SCyril Bur if (tm_enabled(prev) || tm_enabled(new)) 1006fb09692eSMichael Neuling tm_enable(); 10075d176f75SCyril Bur 10085d176f75SCyril Bur if (tm_enabled(prev)) { 10095d176f75SCyril Bur prev->thread.load_tm++; 1010fb09692eSMichael Neuling tm_reclaim_task(prev); 10115d176f75SCyril Bur if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) 10125d176f75SCyril Bur prev->thread.regs->msr &= ~MSR_TM; 10135d176f75SCyril Bur } 10145d176f75SCyril Bur 1015dc310669SCyril Bur tm_recheckpoint_new_task(new); 1016fb09692eSMichael Neuling } 1017fb09692eSMichael Neuling } 1018d31626f7SPaul Mackerras 1019d31626f7SPaul Mackerras /* 1020d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 1021d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 1022d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 1023d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 1024d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 1025d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 1026d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 1027d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 1028d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 1029d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 1030d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 1031d31626f7SPaul Mackerras * state to use. 1032d31626f7SPaul Mackerras */ 1033d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 1034d31626f7SPaul Mackerras { 1035d31626f7SPaul Mackerras unsigned long msr_diff; 1036d31626f7SPaul Mackerras 1037dc310669SCyril Bur /* 1038dc310669SCyril Bur * This is the only moment we should clear TIF_RESTORE_TM as 1039dc310669SCyril Bur * it is here that ckpt_regs.msr and pt_regs.msr become the same 1040dc310669SCyril Bur * again, anything else could lead to an incorrect ckpt_msr being 1041dc310669SCyril Bur * saved and therefore incorrect signal contexts. 1042dc310669SCyril Bur */ 1043d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 1044d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 1045d31626f7SPaul Mackerras return; 1046d31626f7SPaul Mackerras 1047829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 1048d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 104970fe3d98SCyril Bur 1050dc16b553SCyril Bur /* Ensure that restore_math() will restore */ 1051dc16b553SCyril Bur if (msr_diff & MSR_FP) 1052dc16b553SCyril Bur current->thread.load_fp = 1; 105339715bf9SValentin Rothberg #ifdef CONFIG_ALTIVEC 1054dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC) 1055dc16b553SCyril Bur current->thread.load_vec = 1; 1056dc16b553SCyril Bur #endif 105770fe3d98SCyril Bur restore_math(regs); 105870fe3d98SCyril Bur 1059d31626f7SPaul Mackerras regs->msr |= msr_diff; 1060d31626f7SPaul Mackerras } 1061d31626f7SPaul Mackerras 1062fb09692eSMichael Neuling #else 1063fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 1064dc310669SCyril Bur #define __switch_to_tm(prev, new) 1065fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 10669422de3eSMichael Neuling 1067152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 1068152d523eSAnton Blanchard { 1069152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 107001d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1071152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1072152d523eSAnton Blanchard #endif 1073152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1074152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1075152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1076152d523eSAnton Blanchard 1077152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1078152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1079152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1080152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1081152d523eSAnton Blanchard 1082152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1083152d523eSAnton Blanchard 1084152d523eSAnton Blanchard /* 1085152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1086152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1087152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1088152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1089152d523eSAnton Blanchard */ 1090152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1091152d523eSAnton Blanchard } 1092152d523eSAnton Blanchard #endif 109306bb53b3SRam Pai 109406bb53b3SRam Pai thread_pkey_regs_save(t); 1095152d523eSAnton Blanchard } 1096152d523eSAnton Blanchard 1097152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1098152d523eSAnton Blanchard struct thread_struct *new_thread) 1099152d523eSAnton Blanchard { 1100152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1101152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1102152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1103152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1104152d523eSAnton Blanchard #endif 1105152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1106152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1107152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1108b57bd2deSMichael Neuling if (new_thread->dscr_inherit) 1109152d523eSAnton Blanchard dscr = new_thread->dscr; 1110152d523eSAnton Blanchard 1111152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1112152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1113152d523eSAnton Blanchard } 1114152d523eSAnton Blanchard 1115152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1116152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1117152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1118152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1119152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1120152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1121152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1122152d523eSAnton Blanchard 1123b57bd2deSMichael Neuling if (old_thread->fscr != new_thread->fscr) 1124b57bd2deSMichael Neuling mtspr(SPRN_FSCR, new_thread->fscr); 1125b57bd2deSMichael Neuling 1126152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1127152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1128152d523eSAnton Blanchard } 1129ec233edeSSukadev Bhattiprolu 11303449f191SAlastair D'Silva if (cpu_has_feature(CPU_FTR_P9_TIDR) && 1131ec233edeSSukadev Bhattiprolu old_thread->tidr != new_thread->tidr) 1132ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, new_thread->tidr); 1133152d523eSAnton Blanchard #endif 113406bb53b3SRam Pai 113506bb53b3SRam Pai thread_pkey_regs_restore(new_thread, old_thread); 1136152d523eSAnton Blanchard } 1137152d523eSAnton Blanchard 113814cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 113914cf11afSPaul Mackerras struct task_struct *new) 114014cf11afSPaul Mackerras { 114114cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 114214cf11afSPaul Mackerras struct task_struct *last; 1143d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 1144d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1145d6bf29b4SPeter Zijlstra #endif 114614cf11afSPaul Mackerras 1147152d523eSAnton Blanchard new_thread = &new->thread; 1148152d523eSAnton Blanchard old_thread = ¤t->thread; 1149152d523eSAnton Blanchard 11507ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 11517ba5fef7SMichael Neuling 11524e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 115369111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1154d6bf29b4SPeter Zijlstra if (batch->active) { 1155d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1156d6bf29b4SPeter Zijlstra if (batch->index) 1157d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1158d6bf29b4SPeter Zijlstra batch->active = 0; 1159d6bf29b4SPeter Zijlstra } 11604e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 116106d67d54SPaul Mackerras 1162f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1163f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1164f3d885ccSAnton Blanchard #else 1165f3d885ccSAnton Blanchard /* 1166f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1167f3d885ccSAnton Blanchard * schedule DABR 1168f3d885ccSAnton Blanchard */ 1169f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1170f3d885ccSAnton Blanchard if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk))) 1171f3d885ccSAnton Blanchard __set_breakpoint(&new->thread.hw_brk); 1172f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1173f3d885ccSAnton Blanchard #endif 1174f3d885ccSAnton Blanchard 1175f3d885ccSAnton Blanchard /* 1176f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1177f3d885ccSAnton Blanchard * change a number of them. 1178f3d885ccSAnton Blanchard */ 1179f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1180f3d885ccSAnton Blanchard 1181f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1182f3d885ccSAnton Blanchard giveup_all(prev); 1183f3d885ccSAnton Blanchard 1184dc310669SCyril Bur __switch_to_tm(prev, new); 1185dc310669SCyril Bur 1186e4c0fc5fSNicholas Piggin if (!radix_enabled()) { 118744387e9fSAnton Blanchard /* 1188e4c0fc5fSNicholas Piggin * We can't take a PMU exception inside _switch() since there 1189e4c0fc5fSNicholas Piggin * is a window where the kernel stack SLB and the kernel stack 1190e4c0fc5fSNicholas Piggin * are out of sync. Hard disable here. 119144387e9fSAnton Blanchard */ 119244387e9fSAnton Blanchard hard_irq_disable(); 1193e4c0fc5fSNicholas Piggin } 1194bc2a9408SMichael Neuling 119520dbe670SAnton Blanchard /* 119620dbe670SAnton Blanchard * Call restore_sprs() before calling _switch(). If we move it after 119720dbe670SAnton Blanchard * _switch() then we miss out on calling it for new tasks. The reason 119820dbe670SAnton Blanchard * for this is we manually create a stack frame for new tasks that 119920dbe670SAnton Blanchard * directly returns through ret_from_fork() or 120020dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 120120dbe670SAnton Blanchard */ 1202f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1203f3d885ccSAnton Blanchard 120420dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 120520dbe670SAnton Blanchard 12064e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1207d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1208d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 120969111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1210d6bf29b4SPeter Zijlstra batch->active = 1; 1211d6bf29b4SPeter Zijlstra } 121270fe3d98SCyril Bur 121305b98791SChristophe Leroy if (current->thread.regs) { 121405b98791SChristophe Leroy restore_math(current->thread.regs); 121507d2a628SNicholas Piggin 121607d2a628SNicholas Piggin /* 121707d2a628SNicholas Piggin * The copy-paste buffer can only store into foreign real 121807d2a628SNicholas Piggin * addresses, so unprivileged processes can not see the 121907d2a628SNicholas Piggin * data or use it in any way unless they have foreign real 12209d2a4d71SSukadev Bhattiprolu * mappings. If the new process has the foreign real address 12219d2a4d71SSukadev Bhattiprolu * mappings, we must issue a cp_abort to clear any state and 12229d2a4d71SSukadev Bhattiprolu * prevent snooping, corruption or a covert channel. 122307d2a628SNicholas Piggin */ 122405b98791SChristophe Leroy if (current->thread.used_vas) 12259d2a4d71SSukadev Bhattiprolu asm volatile(PPC_CP_ABORT); 122607d2a628SNicholas Piggin } 12274e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 1228d6bf29b4SPeter Zijlstra 122914cf11afSPaul Mackerras return last; 123014cf11afSPaul Mackerras } 123114cf11afSPaul Mackerras 1232df13102fSChristophe Leroy #define NR_INSN_TO_PRINT 16 123306d67d54SPaul Mackerras 123406d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 123506d67d54SPaul Mackerras { 123606d67d54SPaul Mackerras int i; 1237df13102fSChristophe Leroy unsigned long pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 123806d67d54SPaul Mackerras 123906d67d54SPaul Mackerras printk("Instruction dump:"); 124006d67d54SPaul Mackerras 1241df13102fSChristophe Leroy for (i = 0; i < NR_INSN_TO_PRINT; i++) { 124206d67d54SPaul Mackerras int instr; 124306d67d54SPaul Mackerras 124406d67d54SPaul Mackerras if (!(i % 8)) 12452ffd04deSAndrew Donnellan pr_cont("\n"); 124606d67d54SPaul Mackerras 12470de2d820SScott Wood #if !defined(CONFIG_BOOKE) 12480de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 12490de2d820SScott Wood * than print XXXXXXXX. 12500de2d820SScott Wood */ 12510de2d820SScott Wood if (!(regs->msr & MSR_IR)) 12520de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 12530de2d820SScott Wood #endif 12540de2d820SScott Wood 125500ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 12563b35bd48SChristophe Leroy probe_kernel_address((const void *)pc, instr)) { 12572ffd04deSAndrew Donnellan pr_cont("XXXXXXXX "); 125806d67d54SPaul Mackerras } else { 125906d67d54SPaul Mackerras if (regs->nip == pc) 12602ffd04deSAndrew Donnellan pr_cont("<%08x> ", instr); 126106d67d54SPaul Mackerras else 12622ffd04deSAndrew Donnellan pr_cont("%08x ", instr); 126306d67d54SPaul Mackerras } 126406d67d54SPaul Mackerras 126506d67d54SPaul Mackerras pc += sizeof(int); 126606d67d54SPaul Mackerras } 126706d67d54SPaul Mackerras 12682ffd04deSAndrew Donnellan pr_cont("\n"); 126906d67d54SPaul Mackerras } 127006d67d54SPaul Mackerras 127188b0fe17SMurilo Opsfelder Araujo void show_user_instructions(struct pt_regs *regs) 127288b0fe17SMurilo Opsfelder Araujo { 127388b0fe17SMurilo Opsfelder Araujo unsigned long pc; 1274df13102fSChristophe Leroy int n = NR_INSN_TO_PRINT; 1275fb2d9505SChristophe Leroy struct seq_buf s; 1276fb2d9505SChristophe Leroy char buf[96]; /* enough for 8 times 9 + 2 chars */ 127788b0fe17SMurilo Opsfelder Araujo 1278df13102fSChristophe Leroy pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 127988b0fe17SMurilo Opsfelder Araujo 1280fb2d9505SChristophe Leroy seq_buf_init(&s, buf, sizeof(buf)); 128188b0fe17SMurilo Opsfelder Araujo 1282fb2d9505SChristophe Leroy while (n) { 1283fb2d9505SChristophe Leroy int i; 1284fb2d9505SChristophe Leroy 1285fb2d9505SChristophe Leroy seq_buf_clear(&s); 1286fb2d9505SChristophe Leroy 1287fb2d9505SChristophe Leroy for (i = 0; i < 8 && n; i++, n--, pc += sizeof(int)) { 128888b0fe17SMurilo Opsfelder Araujo int instr; 128988b0fe17SMurilo Opsfelder Araujo 1290def0bfdbSChristophe Leroy if (probe_user_read(&instr, (void __user *)pc, sizeof(instr))) { 1291fb2d9505SChristophe Leroy seq_buf_printf(&s, "XXXXXXXX "); 1292fb2d9505SChristophe Leroy continue; 1293fb2d9505SChristophe Leroy } 1294fb2d9505SChristophe Leroy seq_buf_printf(&s, regs->nip == pc ? "<%08x> " : "%08x ", instr); 129588b0fe17SMurilo Opsfelder Araujo } 129688b0fe17SMurilo Opsfelder Araujo 1297fb2d9505SChristophe Leroy if (!seq_buf_has_overflowed(&s)) 1298fb2d9505SChristophe Leroy pr_info("%s[%d]: code: %s\n", current->comm, 1299fb2d9505SChristophe Leroy current->pid, s.buffer); 130088b0fe17SMurilo Opsfelder Araujo } 130188b0fe17SMurilo Opsfelder Araujo } 130288b0fe17SMurilo Opsfelder Araujo 1303801c0b2cSMichael Neuling struct regbit { 130406d67d54SPaul Mackerras unsigned long bit; 130506d67d54SPaul Mackerras const char *name; 1306801c0b2cSMichael Neuling }; 1307801c0b2cSMichael Neuling 1308801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 13093bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 13103bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 13113bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 13123bfd0c9cSAnton Blanchard #endif 13133bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 13143bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 13153bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 13163bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 13173bfd0c9cSAnton Blanchard #endif 131806d67d54SPaul Mackerras {MSR_EE, "EE"}, 131906d67d54SPaul Mackerras {MSR_PR, "PR"}, 132006d67d54SPaul Mackerras {MSR_FP, "FP"}, 132106d67d54SPaul Mackerras {MSR_ME, "ME"}, 13223bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 13231b98326bSKumar Gala {MSR_DE, "DE"}, 13243bfd0c9cSAnton Blanchard #else 13253bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 13263bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 13273bfd0c9cSAnton Blanchard #endif 132806d67d54SPaul Mackerras {MSR_IR, "IR"}, 132906d67d54SPaul Mackerras {MSR_DR, "DR"}, 13303bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 13313bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 13323bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 13333bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 13343bfd0c9cSAnton Blanchard #endif 133506d67d54SPaul Mackerras {0, NULL} 133606d67d54SPaul Mackerras }; 133706d67d54SPaul Mackerras 1338801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 133906d67d54SPaul Mackerras { 1340801c0b2cSMichael Neuling const char *s = ""; 134106d67d54SPaul Mackerras 134206d67d54SPaul Mackerras for (; bits->bit; ++bits) 134306d67d54SPaul Mackerras if (val & bits->bit) { 1344db5ba5aeSMichael Ellerman pr_cont("%s%s", s, bits->name); 1345801c0b2cSMichael Neuling s = sep; 134606d67d54SPaul Mackerras } 1347801c0b2cSMichael Neuling } 1348801c0b2cSMichael Neuling 1349801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1350801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1351801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1352801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1353801c0b2cSMichael Neuling {MSR_TM, "E"}, 1354801c0b2cSMichael Neuling {0, NULL} 1355801c0b2cSMichael Neuling }; 1356801c0b2cSMichael Neuling 1357801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1358801c0b2cSMichael Neuling { 1359801c0b2cSMichael Neuling /* 1360801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1361801c0b2cSMichael Neuling * Inside the TM[], the output means: 1362801c0b2cSMichael Neuling * E: Enabled (bit 32) 1363801c0b2cSMichael Neuling * S: Suspended (bit 33) 1364801c0b2cSMichael Neuling * T: Transactional (bit 34) 1365801c0b2cSMichael Neuling */ 1366801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1367db5ba5aeSMichael Ellerman pr_cont(",TM["); 1368801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1369db5ba5aeSMichael Ellerman pr_cont("]"); 1370801c0b2cSMichael Neuling } 1371801c0b2cSMichael Neuling } 1372801c0b2cSMichael Neuling #else 1373801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1374801c0b2cSMichael Neuling #endif 1375801c0b2cSMichael Neuling 1376801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1377801c0b2cSMichael Neuling { 1378db5ba5aeSMichael Ellerman pr_cont("<"); 1379801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1380801c0b2cSMichael Neuling print_tm_bits(val); 1381db5ba5aeSMichael Ellerman pr_cont(">"); 138206d67d54SPaul Mackerras } 138306d67d54SPaul Mackerras 138406d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1385f6f7dde3Santon@samba.org #define REG "%016lx" 138606d67d54SPaul Mackerras #define REGS_PER_LINE 4 138706d67d54SPaul Mackerras #define LAST_VOLATILE 13 138806d67d54SPaul Mackerras #else 1389f6f7dde3Santon@samba.org #define REG "%08lx" 139006d67d54SPaul Mackerras #define REGS_PER_LINE 8 139106d67d54SPaul Mackerras #define LAST_VOLATILE 12 139206d67d54SPaul Mackerras #endif 139306d67d54SPaul Mackerras 139414cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 139514cf11afSPaul Mackerras { 139614cf11afSPaul Mackerras int i, trap; 139714cf11afSPaul Mackerras 1398a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1399a43cb95dSTejun Heo 140006d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 140106d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 1402182dc9c7SMichael Ellerman printk("REGS: %px TRAP: %04lx %s (%s)\n", 140396b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 140406d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1405801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1406f6fc73fbSMichael Ellerman pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 140714cf11afSPaul Mackerras trap = TRAP(regs); 14082271db20SBenjamin Herrenschmidt if ((TRAP(regs) != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 14097dae865fSMichael Ellerman pr_cont("CFAR: "REG" ", regs->orig_gpr3); 1410c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1411ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 14127dae865fSMichael Ellerman pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 141314170789SKumar Gala #else 14147dae865fSMichael Ellerman pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 14159db8bcfdSAnton Blanchard #endif 14169db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 14173130a7bbSNicholas Piggin pr_cont("IRQMASK: %lx ", regs->softe); 14189db8bcfdSAnton Blanchard #endif 14199db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 14206d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 14217dae865fSMichael Ellerman pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 142214170789SKumar Gala #endif 142314cf11afSPaul Mackerras 142414cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 142506d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 14267dae865fSMichael Ellerman pr_cont("\nGPR%02d: ", i); 14277dae865fSMichael Ellerman pr_cont(REG " ", regs->gpr[i]); 142806d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 142914cf11afSPaul Mackerras break; 143014cf11afSPaul Mackerras } 14317dae865fSMichael Ellerman pr_cont("\n"); 143214cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 143314cf11afSPaul Mackerras /* 143414cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 143514cf11afSPaul Mackerras * above info out without failing 143614cf11afSPaul Mackerras */ 1437058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1438058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 143914cf11afSPaul Mackerras #endif 144014cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 144106d67d54SPaul Mackerras if (!user_mode(regs)) 144206d67d54SPaul Mackerras show_instructions(regs); 144314cf11afSPaul Mackerras } 144414cf11afSPaul Mackerras 144514cf11afSPaul Mackerras void flush_thread(void) 144614cf11afSPaul Mackerras { 1447e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 14485aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1449e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 14503bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1451e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 145214cf11afSPaul Mackerras } 145314cf11afSPaul Mackerras 1454425d3314SNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 1455425d3314SNicholas Piggin void arch_setup_new_exec(void) 1456425d3314SNicholas Piggin { 1457425d3314SNicholas Piggin if (radix_enabled()) 1458425d3314SNicholas Piggin return; 1459425d3314SNicholas Piggin hash__setup_new_exec(); 1460425d3314SNicholas Piggin } 1461425d3314SNicholas Piggin #endif 1462425d3314SNicholas Piggin 14639d2a4d71SSukadev Bhattiprolu int set_thread_uses_vas(void) 14649d2a4d71SSukadev Bhattiprolu { 14659d2a4d71SSukadev Bhattiprolu #ifdef CONFIG_PPC_BOOK3S_64 14669d2a4d71SSukadev Bhattiprolu if (!cpu_has_feature(CPU_FTR_ARCH_300)) 14679d2a4d71SSukadev Bhattiprolu return -EINVAL; 14689d2a4d71SSukadev Bhattiprolu 14699d2a4d71SSukadev Bhattiprolu current->thread.used_vas = 1; 14709d2a4d71SSukadev Bhattiprolu 14719d2a4d71SSukadev Bhattiprolu /* 14729d2a4d71SSukadev Bhattiprolu * Even a process that has no foreign real address mapping can use 14739d2a4d71SSukadev Bhattiprolu * an unpaired COPY instruction (to no real effect). Issue CP_ABORT 14749d2a4d71SSukadev Bhattiprolu * to clear any pending COPY and prevent a covert channel. 14759d2a4d71SSukadev Bhattiprolu * 14769d2a4d71SSukadev Bhattiprolu * __switch_to() will issue CP_ABORT on future context switches. 14779d2a4d71SSukadev Bhattiprolu */ 14789d2a4d71SSukadev Bhattiprolu asm volatile(PPC_CP_ABORT); 14799d2a4d71SSukadev Bhattiprolu 14809d2a4d71SSukadev Bhattiprolu #endif /* CONFIG_PPC_BOOK3S_64 */ 14819d2a4d71SSukadev Bhattiprolu return 0; 14829d2a4d71SSukadev Bhattiprolu } 14839d2a4d71SSukadev Bhattiprolu 1484ec233edeSSukadev Bhattiprolu #ifdef CONFIG_PPC64 148571cc64a8SAlastair D'Silva /** 148671cc64a8SAlastair D'Silva * Assign a TIDR (thread ID) for task @t and set it in the thread 1487ec233edeSSukadev Bhattiprolu * structure. For now, we only support setting TIDR for 'current' task. 148871cc64a8SAlastair D'Silva * 148971cc64a8SAlastair D'Silva * Since the TID value is a truncated form of it PID, it is possible 149071cc64a8SAlastair D'Silva * (but unlikely) for 2 threads to have the same TID. In the unlikely event 149171cc64a8SAlastair D'Silva * that 2 threads share the same TID and are waiting, one of the following 149271cc64a8SAlastair D'Silva * cases will happen: 149371cc64a8SAlastair D'Silva * 149471cc64a8SAlastair D'Silva * 1. The correct thread is running, the wrong thread is not 149571cc64a8SAlastair D'Silva * In this situation, the correct thread is woken and proceeds to pass it's 149671cc64a8SAlastair D'Silva * condition check. 149771cc64a8SAlastair D'Silva * 149871cc64a8SAlastair D'Silva * 2. Neither threads are running 149971cc64a8SAlastair D'Silva * In this situation, neither thread will be woken. When scheduled, the waiting 150071cc64a8SAlastair D'Silva * threads will execute either a wait, which will return immediately, followed 150171cc64a8SAlastair D'Silva * by a condition check, which will pass for the correct thread and fail 150271cc64a8SAlastair D'Silva * for the wrong thread, or they will execute the condition check immediately. 150371cc64a8SAlastair D'Silva * 150471cc64a8SAlastair D'Silva * 3. The wrong thread is running, the correct thread is not 150571cc64a8SAlastair D'Silva * The wrong thread will be woken, but will fail it's condition check and 150671cc64a8SAlastair D'Silva * re-execute wait. The correct thread, when scheduled, will execute either 150771cc64a8SAlastair D'Silva * it's condition check (which will pass), or wait, which returns immediately 150871cc64a8SAlastair D'Silva * when called the first time after the thread is scheduled, followed by it's 150971cc64a8SAlastair D'Silva * condition check (which will pass). 151071cc64a8SAlastair D'Silva * 151171cc64a8SAlastair D'Silva * 4. Both threads are running 151271cc64a8SAlastair D'Silva * Both threads will be woken. The wrong thread will fail it's condition check 151371cc64a8SAlastair D'Silva * and execute another wait, while the correct thread will pass it's condition 151471cc64a8SAlastair D'Silva * check. 151571cc64a8SAlastair D'Silva * 151671cc64a8SAlastair D'Silva * @t: the task to set the thread ID for 1517ec233edeSSukadev Bhattiprolu */ 1518ec233edeSSukadev Bhattiprolu int set_thread_tidr(struct task_struct *t) 1519ec233edeSSukadev Bhattiprolu { 15203449f191SAlastair D'Silva if (!cpu_has_feature(CPU_FTR_P9_TIDR)) 1521ec233edeSSukadev Bhattiprolu return -EINVAL; 1522ec233edeSSukadev Bhattiprolu 1523ec233edeSSukadev Bhattiprolu if (t != current) 1524ec233edeSSukadev Bhattiprolu return -EINVAL; 1525ec233edeSSukadev Bhattiprolu 15267e4d4233SVaibhav Jain if (t->thread.tidr) 15277e4d4233SVaibhav Jain return 0; 15287e4d4233SVaibhav Jain 152971cc64a8SAlastair D'Silva t->thread.tidr = (u16)task_pid_nr(t); 1530ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, t->thread.tidr); 1531ec233edeSSukadev Bhattiprolu 1532ec233edeSSukadev Bhattiprolu return 0; 1533ec233edeSSukadev Bhattiprolu } 1534b1db5513SChristophe Lombard EXPORT_SYMBOL_GPL(set_thread_tidr); 1535ec233edeSSukadev Bhattiprolu 1536ec233edeSSukadev Bhattiprolu #endif /* CONFIG_PPC64 */ 1537ec233edeSSukadev Bhattiprolu 153814cf11afSPaul Mackerras void 153914cf11afSPaul Mackerras release_thread(struct task_struct *t) 154014cf11afSPaul Mackerras { 154114cf11afSPaul Mackerras } 154214cf11afSPaul Mackerras 154314cf11afSPaul Mackerras /* 154455ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 154555ccf3feSSuresh Siddha * copy the current task into the new thread. 154614cf11afSPaul Mackerras */ 154755ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 154814cf11afSPaul Mackerras { 1549579e633eSAnton Blanchard flush_all_to_thread(src); 1550621b5060SMichael Neuling /* 1551621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1552621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1553621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1554621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1555621b5060SMichael Neuling * checkpointed state back and the TM mode. 15565d176f75SCyril Bur * 15575d176f75SCyril Bur * Can't pass dst because it isn't ready. Doesn't matter, passing 15585d176f75SCyril Bur * dst is only important for __switch_to() 1559621b5060SMichael Neuling */ 1560dc310669SCyril Bur __switch_to_tm(src, src); 1561330a1eb7SMichael Ellerman 156255ccf3feSSuresh Siddha *dst = *src; 1563330a1eb7SMichael Ellerman 1564330a1eb7SMichael Ellerman clear_task_ebb(dst); 1565330a1eb7SMichael Ellerman 156655ccf3feSSuresh Siddha return 0; 156714cf11afSPaul Mackerras } 156814cf11afSPaul Mackerras 1569cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1570cec15488SMichael Ellerman { 15714e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1572cec15488SMichael Ellerman unsigned long sp_vsid; 1573cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1574cec15488SMichael Ellerman 1575caca285eSAneesh Kumar K.V if (radix_enabled()) 1576caca285eSAneesh Kumar K.V return; 1577caca285eSAneesh Kumar K.V 1578cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1579cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1580cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1581cec15488SMichael Ellerman else 1582cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1583cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1584cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1585cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1586cec15488SMichael Ellerman #endif 1587cec15488SMichael Ellerman } 1588cec15488SMichael Ellerman 158914cf11afSPaul Mackerras /* 159014cf11afSPaul Mackerras * Copy a thread.. 159114cf11afSPaul Mackerras */ 1592efcac658SAlexey Kardashevskiy 15936eca8933SAlex Dowad /* 15946eca8933SAlex Dowad * Copy architecture-specific thread state 15956eca8933SAlex Dowad */ 1596facd04a9SNicholas Piggin int copy_thread_tls(unsigned long clone_flags, unsigned long usp, 1597facd04a9SNicholas Piggin unsigned long kthread_arg, struct task_struct *p, 1598facd04a9SNicholas Piggin unsigned long tls) 159914cf11afSPaul Mackerras { 160014cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 160114cf11afSPaul Mackerras extern void ret_from_fork(void); 160258254e10SAl Viro extern void ret_from_kernel_thread(void); 160358254e10SAl Viro void (*f)(void); 16040cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 16055d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 16065d31a96eSMichael Ellerman 1607ed1cd6deSChristophe Leroy klp_init_thread_info(p); 160814cf11afSPaul Mackerras 160914cf11afSPaul Mackerras /* Copy registers */ 161014cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 161114cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1612ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 16136eca8933SAlex Dowad /* kernel thread */ 161458254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 161514cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 16167cedd601SAnton Blanchard /* function */ 16177cedd601SAnton Blanchard if (usp) 16187cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 161958254e10SAl Viro #ifdef CONFIG_PPC64 1620b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1621c2e480baSMadhavan Srinivasan childregs->softe = IRQS_ENABLED; 162206d67d54SPaul Mackerras #endif 16236eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 162414cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1625138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 162658254e10SAl Viro f = ret_from_kernel_thread; 162714cf11afSPaul Mackerras } else { 16286eca8933SAlex Dowad /* user thread */ 1629afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 163058254e10SAl Viro CHECK_FULL_REGS(regs); 163158254e10SAl Viro *childregs = *regs; 1632ea516b11SAl Viro if (usp) 163314cf11afSPaul Mackerras childregs->gpr[1] = usp; 163414cf11afSPaul Mackerras p->thread.regs = childregs; 163558254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 163606d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 16379904b005SDenis Kirjanov if (!is_32bit_task()) 1638facd04a9SNicholas Piggin childregs->gpr[13] = tls; 163906d67d54SPaul Mackerras else 1640facd04a9SNicholas Piggin childregs->gpr[2] = tls; 164114cf11afSPaul Mackerras } 164258254e10SAl Viro 164358254e10SAl Viro f = ret_from_fork; 164406d67d54SPaul Mackerras } 1645d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 164614cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 164714cf11afSPaul Mackerras 164814cf11afSPaul Mackerras /* 164914cf11afSPaul Mackerras * The way this works is that at some point in the future 165014cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 165114cf11afSPaul Mackerras * That will pop off the stack frame created below and start 165214cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 165314cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 165414cf11afSPaul Mackerras * system call, using the stack frame created above. 165514cf11afSPaul Mackerras */ 1656af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 165714cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 165814cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 165914cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 166014cf11afSPaul Mackerras p->thread.ksp = sp; 1661cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 1662a7916a1dSChristophe Leroy p->thread.ksp_limit = (unsigned long)end_of_stack(p); 1663cbc9565eSBenjamin Herrenschmidt #endif 166428d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 166528d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 166628d170abSOleg Nesterov #endif 166728d170abSOleg Nesterov 166818461960SPaul Mackerras p->thread.fp_save_area = NULL; 166918461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 167018461960SPaul Mackerras p->thread.vr_save_area = NULL; 167118461960SPaul Mackerras #endif 167218461960SPaul Mackerras 1673cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 167406d67d54SPaul Mackerras 1675efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1676efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 16771021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1678db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1679efcac658SAlexey Kardashevskiy } 168092779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 16814c2de74cSNicholas Piggin childregs->ppr = DEFAULT_PPR; 1682ec233edeSSukadev Bhattiprolu 1683ec233edeSSukadev Bhattiprolu p->thread.tidr = 0; 1684efcac658SAlexey Kardashevskiy #endif 16857cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 168614cf11afSPaul Mackerras return 0; 168714cf11afSPaul Mackerras } 168814cf11afSPaul Mackerras 16895434ae74SNicholas Piggin void preload_new_slb_context(unsigned long start, unsigned long sp); 16905434ae74SNicholas Piggin 169114cf11afSPaul Mackerras /* 169214cf11afSPaul Mackerras * Set up a thread for executing a new program 169314cf11afSPaul Mackerras */ 169406d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 169514cf11afSPaul Mackerras { 169690eac727SMichael Ellerman #ifdef CONFIG_PPC64 169790eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 16985434ae74SNicholas Piggin 16995434ae74SNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 1700f89bd8baSAneesh Kumar K.V if (!radix_enabled()) 17015434ae74SNicholas Piggin preload_new_slb_context(start, sp); 17025434ae74SNicholas Piggin #endif 170390eac727SMichael Ellerman #endif 170490eac727SMichael Ellerman 170506d67d54SPaul Mackerras /* 170606d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 170706d67d54SPaul Mackerras * set. Do it now. 170806d67d54SPaul Mackerras */ 170906d67d54SPaul Mackerras if (!current->thread.regs) { 17100cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 17110cec6fd1SAl Viro current->thread.regs = regs - 1; 171206d67d54SPaul Mackerras } 171306d67d54SPaul Mackerras 17148e96a87cSCyril Bur #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 17158e96a87cSCyril Bur /* 17168e96a87cSCyril Bur * Clear any transactional state, we're exec()ing. The cause is 17178e96a87cSCyril Bur * not important as there will never be a recheckpoint so it's not 17188e96a87cSCyril Bur * user visible. 17198e96a87cSCyril Bur */ 17208e96a87cSCyril Bur if (MSR_TM_SUSPENDED(mfmsr())) 17218e96a87cSCyril Bur tm_reclaim_current(0); 17228e96a87cSCyril Bur #endif 17238e96a87cSCyril Bur 172414cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 172514cf11afSPaul Mackerras regs->ctr = 0; 172614cf11afSPaul Mackerras regs->link = 0; 172714cf11afSPaul Mackerras regs->xer = 0; 172814cf11afSPaul Mackerras regs->ccr = 0; 172914cf11afSPaul Mackerras regs->gpr[1] = sp; 173006d67d54SPaul Mackerras 1731474f8196SRoland McGrath /* 1732474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1733474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1734474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1735474f8196SRoland McGrath */ 1736474f8196SRoland McGrath regs->trap &= ~1UL; 1737474f8196SRoland McGrath 173806d67d54SPaul Mackerras #ifdef CONFIG_PPC32 173906d67d54SPaul Mackerras regs->mq = 0; 174006d67d54SPaul Mackerras regs->nip = start; 174114cf11afSPaul Mackerras regs->msr = MSR_USER; 174206d67d54SPaul Mackerras #else 17439904b005SDenis Kirjanov if (!is_32bit_task()) { 174494af3abfSRusty Russell unsigned long entry; 174506d67d54SPaul Mackerras 174694af3abfSRusty Russell if (is_elf2_task()) { 174794af3abfSRusty Russell /* Look ma, no function descriptors! */ 174894af3abfSRusty Russell entry = start; 174994af3abfSRusty Russell 175094af3abfSRusty Russell /* 175194af3abfSRusty Russell * Ulrich says: 175294af3abfSRusty Russell * The latest iteration of the ABI requires that when 175394af3abfSRusty Russell * calling a function (at its global entry point), 175494af3abfSRusty Russell * the caller must ensure r12 holds the entry point 175594af3abfSRusty Russell * address (so that the function can quickly 175694af3abfSRusty Russell * establish addressability). 175794af3abfSRusty Russell */ 175894af3abfSRusty Russell regs->gpr[12] = start; 175994af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 176094af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 176194af3abfSRusty Russell } else { 176294af3abfSRusty Russell unsigned long toc; 176394af3abfSRusty Russell 176494af3abfSRusty Russell /* start is a relocated pointer to the function 176594af3abfSRusty Russell * descriptor for the elf _start routine. The first 176694af3abfSRusty Russell * entry in the function descriptor is the entry 176794af3abfSRusty Russell * address of _start and the second entry is the TOC 176894af3abfSRusty Russell * value we need to use. 176906d67d54SPaul Mackerras */ 177006d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 177106d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 177206d67d54SPaul Mackerras 177306d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 177406d67d54SPaul Mackerras * need to be relocated before we can use them. 177506d67d54SPaul Mackerras */ 177606d67d54SPaul Mackerras if (load_addr != 0) { 177706d67d54SPaul Mackerras entry += load_addr; 177806d67d54SPaul Mackerras toc += load_addr; 177906d67d54SPaul Mackerras } 178006d67d54SPaul Mackerras regs->gpr[2] = toc; 178194af3abfSRusty Russell } 178294af3abfSRusty Russell regs->nip = entry; 178306d67d54SPaul Mackerras regs->msr = MSR_USER64; 1784d4bf9a78SStephen Rothwell } else { 1785d4bf9a78SStephen Rothwell regs->nip = start; 1786d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1787d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 178806d67d54SPaul Mackerras } 178906d67d54SPaul Mackerras #endif 1790ce48b210SMichael Neuling #ifdef CONFIG_VSX 1791ce48b210SMichael Neuling current->thread.used_vsr = 0; 1792ce48b210SMichael Neuling #endif 17935434ae74SNicholas Piggin current->thread.load_slb = 0; 17941195892cSBreno Leitao current->thread.load_fp = 0; 1795de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 179618461960SPaul Mackerras current->thread.fp_save_area = NULL; 179714cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1798de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1799de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 180018461960SPaul Mackerras current->thread.vr_save_area = NULL; 180114cf11afSPaul Mackerras current->thread.vrsave = 0; 180214cf11afSPaul Mackerras current->thread.used_vr = 0; 18031195892cSBreno Leitao current->thread.load_vec = 0; 180414cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 180514cf11afSPaul Mackerras #ifdef CONFIG_SPE 180614cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 180714cf11afSPaul Mackerras current->thread.acc = 0; 180814cf11afSPaul Mackerras current->thread.spefscr = 0; 180914cf11afSPaul Mackerras current->thread.used_spe = 0; 181014cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1811bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1812bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1813bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1814bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 18157f22ced4SBreno Leitao current->thread.load_tm = 0; 1816bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 181706bb53b3SRam Pai 181806bb53b3SRam Pai thread_pkey_regs_init(¤t->thread); 181914cf11afSPaul Mackerras } 1820e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 182114cf11afSPaul Mackerras 182214cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 182314cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 182414cf11afSPaul Mackerras 182514cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 182614cf11afSPaul Mackerras { 182714cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 182814cf11afSPaul Mackerras 182914cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 183014cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 183114cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 183214cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 183314cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 183414cf11afSPaul Mackerras #ifdef CONFIG_SPE 18355e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1836640e9225SJoseph Myers /* 1837640e9225SJoseph Myers * When the sticky exception bits are set 1838640e9225SJoseph Myers * directly by userspace, it must call prctl 1839640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1840640e9225SJoseph Myers * in the existing prctl settings) or 1841640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1842640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1843640e9225SJoseph Myers * saving and restoring the whole 1844640e9225SJoseph Myers * floating-point environment need to do so 1845640e9225SJoseph Myers * anyway to restore the prctl settings from 1846640e9225SJoseph Myers * the saved environment. 1847640e9225SJoseph Myers */ 1848640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 184914cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 185014cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 185106d67d54SPaul Mackerras return 0; 18525e14d21eSKumar Gala } else { 18535e14d21eSKumar Gala return -EINVAL; 18545e14d21eSKumar Gala } 185514cf11afSPaul Mackerras #else 185614cf11afSPaul Mackerras return -EINVAL; 185714cf11afSPaul Mackerras #endif 185806d67d54SPaul Mackerras } 185906d67d54SPaul Mackerras 186014cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 186114cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 186214cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 186314cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 186414cf11afSPaul Mackerras * them does not change anything */ 186514cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 186614cf11afSPaul Mackerras return -EINVAL; 186714cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 186814cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 186914cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 187014cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 187114cf11afSPaul Mackerras return 0; 187214cf11afSPaul Mackerras } 187314cf11afSPaul Mackerras 187414cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 187514cf11afSPaul Mackerras { 187614cf11afSPaul Mackerras unsigned int val; 187714cf11afSPaul Mackerras 187814cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 187914cf11afSPaul Mackerras #ifdef CONFIG_SPE 1880640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1881640e9225SJoseph Myers /* 1882640e9225SJoseph Myers * When the sticky exception bits are set 1883640e9225SJoseph Myers * directly by userspace, it must call prctl 1884640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1885640e9225SJoseph Myers * in the existing prctl settings) or 1886640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1887640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1888640e9225SJoseph Myers * saving and restoring the whole 1889640e9225SJoseph Myers * floating-point environment need to do so 1890640e9225SJoseph Myers * anyway to restore the prctl settings from 1891640e9225SJoseph Myers * the saved environment. 1892640e9225SJoseph Myers */ 1893640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 189414cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1895640e9225SJoseph Myers } else 18965e14d21eSKumar Gala return -EINVAL; 189714cf11afSPaul Mackerras #else 189814cf11afSPaul Mackerras return -EINVAL; 189914cf11afSPaul Mackerras #endif 190014cf11afSPaul Mackerras else 190114cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 190214cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 190314cf11afSPaul Mackerras } 190414cf11afSPaul Mackerras 1905fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1906fab5db97SPaul Mackerras { 1907fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1908fab5db97SPaul Mackerras 1909fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1910fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1911fab5db97SPaul Mackerras return -EINVAL; 1912fab5db97SPaul Mackerras 1913fab5db97SPaul Mackerras if (regs == NULL) 1914fab5db97SPaul Mackerras return -EINVAL; 1915fab5db97SPaul Mackerras 1916fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1917fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1918fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1919fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1920fab5db97SPaul Mackerras else 1921fab5db97SPaul Mackerras return -EINVAL; 1922fab5db97SPaul Mackerras 1923fab5db97SPaul Mackerras return 0; 1924fab5db97SPaul Mackerras } 1925fab5db97SPaul Mackerras 1926fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 1927fab5db97SPaul Mackerras { 1928fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1929fab5db97SPaul Mackerras unsigned int val; 1930fab5db97SPaul Mackerras 1931fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 1932fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 1933fab5db97SPaul Mackerras return -EINVAL; 1934fab5db97SPaul Mackerras 1935fab5db97SPaul Mackerras if (regs == NULL) 1936fab5db97SPaul Mackerras return -EINVAL; 1937fab5db97SPaul Mackerras 1938fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 1939fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 1940fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 1941fab5db97SPaul Mackerras else 1942fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 1943fab5db97SPaul Mackerras } else 1944fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 1945fab5db97SPaul Mackerras 1946fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 1947fab5db97SPaul Mackerras } 1948fab5db97SPaul Mackerras 1949e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 1950e9370ae1SPaul Mackerras { 1951e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 1952e9370ae1SPaul Mackerras return 0; 1953e9370ae1SPaul Mackerras } 1954e9370ae1SPaul Mackerras 1955e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1956e9370ae1SPaul Mackerras { 1957e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1958e9370ae1SPaul Mackerras } 1959e9370ae1SPaul Mackerras 1960bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1961bb72c481SPaul Mackerras unsigned long nbytes) 1962bb72c481SPaul Mackerras { 1963bb72c481SPaul Mackerras unsigned long stack_page; 1964bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 1965bb72c481SPaul Mackerras 1966bb72c481SPaul Mackerras stack_page = (unsigned long)hardirq_ctx[cpu]; 1967a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1968bb72c481SPaul Mackerras return 1; 1969bb72c481SPaul Mackerras 1970bb72c481SPaul Mackerras stack_page = (unsigned long)softirq_ctx[cpu]; 1971a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1972bb72c481SPaul Mackerras return 1; 1973a7916a1dSChristophe Leroy 1974bb72c481SPaul Mackerras return 0; 1975bb72c481SPaul Mackerras } 1976bb72c481SPaul Mackerras 1977*a2e36683SNicholas Piggin static inline int valid_emergency_stack(unsigned long sp, struct task_struct *p, 1978*a2e36683SNicholas Piggin unsigned long nbytes) 1979*a2e36683SNicholas Piggin { 1980*a2e36683SNicholas Piggin #ifdef CONFIG_PPC64 1981*a2e36683SNicholas Piggin unsigned long stack_page; 1982*a2e36683SNicholas Piggin unsigned long cpu = task_cpu(p); 1983*a2e36683SNicholas Piggin 1984*a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->emergency_sp - THREAD_SIZE; 1985*a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1986*a2e36683SNicholas Piggin return 1; 1987*a2e36683SNicholas Piggin 1988*a2e36683SNicholas Piggin # ifdef CONFIG_PPC_BOOK3S_64 1989*a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->nmi_emergency_sp - THREAD_SIZE; 1990*a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1991*a2e36683SNicholas Piggin return 1; 1992*a2e36683SNicholas Piggin 1993*a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->mc_emergency_sp - THREAD_SIZE; 1994*a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1995*a2e36683SNicholas Piggin return 1; 1996*a2e36683SNicholas Piggin # endif 1997*a2e36683SNicholas Piggin #endif 1998*a2e36683SNicholas Piggin 1999*a2e36683SNicholas Piggin return 0; 2000*a2e36683SNicholas Piggin } 2001*a2e36683SNicholas Piggin 2002*a2e36683SNicholas Piggin 20032f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 200414cf11afSPaul Mackerras unsigned long nbytes) 200514cf11afSPaul Mackerras { 20060cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 200714cf11afSPaul Mackerras 2008a7916a1dSChristophe Leroy if (sp < THREAD_SIZE) 2009a7916a1dSChristophe Leroy return 0; 2010a7916a1dSChristophe Leroy 2011a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 201214cf11afSPaul Mackerras return 1; 201314cf11afSPaul Mackerras 2014*a2e36683SNicholas Piggin if (valid_irq_stack(sp, p, nbytes)) 2015*a2e36683SNicholas Piggin return 1; 2016*a2e36683SNicholas Piggin 2017*a2e36683SNicholas Piggin return valid_emergency_stack(sp, p, nbytes); 201814cf11afSPaul Mackerras } 201914cf11afSPaul Mackerras 20202f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 20212f25194dSAnton Blanchard 2022018cce33SChristophe Leroy static unsigned long __get_wchan(struct task_struct *p) 202306d67d54SPaul Mackerras { 202406d67d54SPaul Mackerras unsigned long ip, sp; 202506d67d54SPaul Mackerras int count = 0; 202606d67d54SPaul Mackerras 202706d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 202806d67d54SPaul Mackerras return 0; 202906d67d54SPaul Mackerras 203006d67d54SPaul Mackerras sp = p->thread.ksp; 2031ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 203206d67d54SPaul Mackerras return 0; 203306d67d54SPaul Mackerras 203406d67d54SPaul Mackerras do { 203506d67d54SPaul Mackerras sp = *(unsigned long *)sp; 20364ca360f3SKautuk Consul if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD) || 20374ca360f3SKautuk Consul p->state == TASK_RUNNING) 203806d67d54SPaul Mackerras return 0; 203906d67d54SPaul Mackerras if (count > 0) { 2040ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 204106d67d54SPaul Mackerras if (!in_sched_functions(ip)) 204206d67d54SPaul Mackerras return ip; 204306d67d54SPaul Mackerras } 204406d67d54SPaul Mackerras } while (count++ < 16); 204506d67d54SPaul Mackerras return 0; 204606d67d54SPaul Mackerras } 204706d67d54SPaul Mackerras 2048018cce33SChristophe Leroy unsigned long get_wchan(struct task_struct *p) 2049018cce33SChristophe Leroy { 2050018cce33SChristophe Leroy unsigned long ret; 2051018cce33SChristophe Leroy 2052018cce33SChristophe Leroy if (!try_get_task_stack(p)) 2053018cce33SChristophe Leroy return 0; 2054018cce33SChristophe Leroy 2055018cce33SChristophe Leroy ret = __get_wchan(p); 2056018cce33SChristophe Leroy 2057018cce33SChristophe Leroy put_task_stack(p); 2058018cce33SChristophe Leroy 2059018cce33SChristophe Leroy return ret; 2060018cce33SChristophe Leroy } 2061018cce33SChristophe Leroy 2062c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 206314cf11afSPaul Mackerras 206414cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 206514cf11afSPaul Mackerras { 206606d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 206714cf11afSPaul Mackerras int count = 0; 206806d67d54SPaul Mackerras int firstframe = 1; 20696794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 20707c1bb6bbSNaveen N. Rao unsigned long ret_addr; 20717c1bb6bbSNaveen N. Rao int ftrace_idx = 0; 20726794c782SSteven Rostedt #endif 207314cf11afSPaul Mackerras 207414cf11afSPaul Mackerras if (tsk == NULL) 207514cf11afSPaul Mackerras tsk = current; 2076018cce33SChristophe Leroy 2077018cce33SChristophe Leroy if (!try_get_task_stack(tsk)) 2078018cce33SChristophe Leroy return; 2079018cce33SChristophe Leroy 2080018cce33SChristophe Leroy sp = (unsigned long) stack; 208114cf11afSPaul Mackerras if (sp == 0) { 208214cf11afSPaul Mackerras if (tsk == current) 20833d13e839SMichael Ellerman sp = current_stack_frame(); 208414cf11afSPaul Mackerras else 208514cf11afSPaul Mackerras sp = tsk->thread.ksp; 208614cf11afSPaul Mackerras } 208714cf11afSPaul Mackerras 208806d67d54SPaul Mackerras lr = 0; 208906d67d54SPaul Mackerras printk("Call Trace:\n"); 209014cf11afSPaul Mackerras do { 2091ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 2092018cce33SChristophe Leroy break; 209306d67d54SPaul Mackerras 209406d67d54SPaul Mackerras stack = (unsigned long *) sp; 209506d67d54SPaul Mackerras newsp = stack[0]; 2096ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 209706d67d54SPaul Mackerras if (!firstframe || ip != lr) { 2098058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 20996794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 21007c1bb6bbSNaveen N. Rao ret_addr = ftrace_graph_ret_addr(current, 21017c1bb6bbSNaveen N. Rao &ftrace_idx, ip, stack); 21027c1bb6bbSNaveen N. Rao if (ret_addr != ip) 21037c1bb6bbSNaveen N. Rao pr_cont(" (%pS)", (void *)ret_addr); 21046794c782SSteven Rostedt #endif 210506d67d54SPaul Mackerras if (firstframe) 21069a1f490fSMichael Ellerman pr_cont(" (unreliable)"); 21079a1f490fSMichael Ellerman pr_cont("\n"); 210814cf11afSPaul Mackerras } 210906d67d54SPaul Mackerras firstframe = 0; 211006d67d54SPaul Mackerras 211106d67d54SPaul Mackerras /* 211206d67d54SPaul Mackerras * See if this is an exception frame. 211306d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 211406d67d54SPaul Mackerras */ 2115ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 2116ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 211706d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 211806d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 211906d67d54SPaul Mackerras lr = regs->link; 21209be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 2121058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 212206d67d54SPaul Mackerras firstframe = 1; 212314cf11afSPaul Mackerras } 212406d67d54SPaul Mackerras 212506d67d54SPaul Mackerras sp = newsp; 212606d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 2127018cce33SChristophe Leroy 2128018cce33SChristophe Leroy put_task_stack(tsk); 212906d67d54SPaul Mackerras } 213006d67d54SPaul Mackerras 2131cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 2132fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 21330e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 2134cb2c9b27SAnton Blanchard { 2135fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2136d1d0d5ffSNicholas Piggin 2137d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2138d1d0d5ffSNicholas Piggin /* 2139d1d0d5ffSNicholas Piggin * Least significant bit (RUN) is the only writable bit of 2140d1d0d5ffSNicholas Piggin * the CTRL register, so we can avoid mfspr. 2.06 is not the 2141d1d0d5ffSNicholas Piggin * earliest ISA where this is the case, but it's convenient. 2142d1d0d5ffSNicholas Piggin */ 2143d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, CTRL_RUNLATCH); 2144d1d0d5ffSNicholas Piggin } else { 2145cb2c9b27SAnton Blanchard unsigned long ctrl; 2146cb2c9b27SAnton Blanchard 2147d1d0d5ffSNicholas Piggin /* 2148d1d0d5ffSNicholas Piggin * Some architectures (e.g., Cell) have writable fields other 2149d1d0d5ffSNicholas Piggin * than RUN, so do the read-modify-write. 2150d1d0d5ffSNicholas Piggin */ 2151cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2152cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 2153cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2154d1d0d5ffSNicholas Piggin } 2155cb2c9b27SAnton Blanchard 2156fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 2157cb2c9b27SAnton Blanchard } 2158cb2c9b27SAnton Blanchard 2159fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 21600e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 2161cb2c9b27SAnton Blanchard { 2162fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2163cb2c9b27SAnton Blanchard 2164fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 2165cb2c9b27SAnton Blanchard 2166d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2167d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, 0); 2168d1d0d5ffSNicholas Piggin } else { 2169d1d0d5ffSNicholas Piggin unsigned long ctrl; 2170d1d0d5ffSNicholas Piggin 2171cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2172cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 2173cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2174cb2c9b27SAnton Blanchard } 2175d1d0d5ffSNicholas Piggin } 2176fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 2177f6a61680SBenjamin Herrenschmidt 2178d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 2179d839088cSAnton Blanchard { 2180d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 2181d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 2182d839088cSAnton Blanchard return sp & ~0xf; 2183d839088cSAnton Blanchard } 2184912f9ee2SAnton Blanchard 2185912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 2186912f9ee2SAnton Blanchard { 2187912f9ee2SAnton Blanchard unsigned long rnd = 0; 2188912f9ee2SAnton Blanchard 2189912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 2190912f9ee2SAnton Blanchard if (is_32bit_task()) 21915ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); 2192912f9ee2SAnton Blanchard else 21935ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); 2194912f9ee2SAnton Blanchard 2195912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 2196912f9ee2SAnton Blanchard } 2197912f9ee2SAnton Blanchard 2198912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 2199912f9ee2SAnton Blanchard { 22008bbde7a7SAnton Blanchard unsigned long base = mm->brk; 22018bbde7a7SAnton Blanchard unsigned long ret; 22028bbde7a7SAnton Blanchard 22034e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 22048bbde7a7SAnton Blanchard /* 22058bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 22068bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 22078bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 22088bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 2209caca285eSAneesh Kumar K.V * performance penalty. We don't need to worry about radix. For 2210caca285eSAneesh Kumar K.V * radix, mmu_highuser_ssize remains unchanged from 256MB. 22118bbde7a7SAnton Blanchard */ 22128bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 22138bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 22148bbde7a7SAnton Blanchard #endif 22158bbde7a7SAnton Blanchard 22168bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 2217912f9ee2SAnton Blanchard 2218912f9ee2SAnton Blanchard if (ret < mm->brk) 2219912f9ee2SAnton Blanchard return mm->brk; 2220912f9ee2SAnton Blanchard 2221912f9ee2SAnton Blanchard return ret; 2222912f9ee2SAnton Blanchard } 2223501cb16dSAnton Blanchard 2224