114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 314cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 614cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 714cf11afSPaul Mackerras * 814cf11afSPaul Mackerras * PowerPC version 914cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1014cf11afSPaul Mackerras * 1114cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 1214cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 1314cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 1414cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 1514cf11afSPaul Mackerras */ 1614cf11afSPaul Mackerras 1714cf11afSPaul Mackerras #include <linux/errno.h> 1814cf11afSPaul Mackerras #include <linux/sched.h> 1914cf11afSPaul Mackerras #include <linux/kernel.h> 2014cf11afSPaul Mackerras #include <linux/mm.h> 2114cf11afSPaul Mackerras #include <linux/smp.h> 2214cf11afSPaul Mackerras #include <linux/stddef.h> 2314cf11afSPaul Mackerras #include <linux/unistd.h> 2414cf11afSPaul Mackerras #include <linux/ptrace.h> 2514cf11afSPaul Mackerras #include <linux/slab.h> 2614cf11afSPaul Mackerras #include <linux/user.h> 2714cf11afSPaul Mackerras #include <linux/elf.h> 2814cf11afSPaul Mackerras #include <linux/prctl.h> 2914cf11afSPaul Mackerras #include <linux/init_task.h> 304b16f8e2SPaul Gortmaker #include <linux/export.h> 3114cf11afSPaul Mackerras #include <linux/kallsyms.h> 3214cf11afSPaul Mackerras #include <linux/mqueue.h> 3314cf11afSPaul Mackerras #include <linux/hardirq.h> 3406d67d54SPaul Mackerras #include <linux/utsname.h> 356794c782SSteven Rostedt #include <linux/ftrace.h> 3679741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 37d839088cSAnton Blanchard #include <linux/personality.h> 38d839088cSAnton Blanchard #include <linux/random.h> 395aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 407b051f66SAnton Blanchard #include <linux/uaccess.h> 4114cf11afSPaul Mackerras 4214cf11afSPaul Mackerras #include <asm/pgtable.h> 4314cf11afSPaul Mackerras #include <asm/io.h> 4414cf11afSPaul Mackerras #include <asm/processor.h> 4514cf11afSPaul Mackerras #include <asm/mmu.h> 4614cf11afSPaul Mackerras #include <asm/prom.h> 4776032de8SMichael Ellerman #include <asm/machdep.h> 48c6622f63SPaul Mackerras #include <asm/time.h> 49ae3a197eSDavid Howells #include <asm/runlatch.h> 50a7f31841SArnd Bergmann #include <asm/syscalls.h> 51ae3a197eSDavid Howells #include <asm/switch_to.h> 52fb09692eSMichael Neuling #include <asm/tm.h> 53ae3a197eSDavid Howells #include <asm/debug.h> 5406d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5506d67d54SPaul Mackerras #include <asm/firmware.h> 5606d67d54SPaul Mackerras #endif 577cedd601SAnton Blanchard #include <asm/code-patching.h> 58d6a61bfcSLuis Machado #include <linux/kprobes.h> 59d6a61bfcSLuis Machado #include <linux/kdebug.h> 6014cf11afSPaul Mackerras 618b3c34cfSMichael Neuling /* Transactional Memory debug */ 628b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 638b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 648b3c34cfSMichael Neuling #else 658b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 668b3c34cfSMichael Neuling #endif 678b3c34cfSMichael Neuling 6814cf11afSPaul Mackerras extern unsigned long _get_SP(void); 6914cf11afSPaul Mackerras 7014cf11afSPaul Mackerras #ifndef CONFIG_SMP 7114cf11afSPaul Mackerras struct task_struct *last_task_used_math = NULL; 7214cf11afSPaul Mackerras struct task_struct *last_task_used_altivec = NULL; 73ce48b210SMichael Neuling struct task_struct *last_task_used_vsx = NULL; 7414cf11afSPaul Mackerras struct task_struct *last_task_used_spe = NULL; 7514cf11afSPaul Mackerras #endif 7614cf11afSPaul Mackerras 77d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 78d31626f7SPaul Mackerras void giveup_fpu_maybe_transactional(struct task_struct *tsk) 79d31626f7SPaul Mackerras { 80d31626f7SPaul Mackerras /* 81d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 82d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 83d31626f7SPaul Mackerras * bit so that we know to restore the registers before 84d31626f7SPaul Mackerras * returning to userspace. 85d31626f7SPaul Mackerras */ 86d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 87d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 88d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 89829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 90d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 91d31626f7SPaul Mackerras } 92d31626f7SPaul Mackerras 93d31626f7SPaul Mackerras giveup_fpu(tsk); 94d31626f7SPaul Mackerras } 95d31626f7SPaul Mackerras 96d31626f7SPaul Mackerras void giveup_altivec_maybe_transactional(struct task_struct *tsk) 97d31626f7SPaul Mackerras { 98d31626f7SPaul Mackerras /* 99d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 100d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 101d31626f7SPaul Mackerras * bit so that we know to restore the registers before 102d31626f7SPaul Mackerras * returning to userspace. 103d31626f7SPaul Mackerras */ 104d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 105d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 106d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 107829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 108d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 109d31626f7SPaul Mackerras } 110d31626f7SPaul Mackerras 111d31626f7SPaul Mackerras giveup_altivec(tsk); 112d31626f7SPaul Mackerras } 113d31626f7SPaul Mackerras 114d31626f7SPaul Mackerras #else 115d31626f7SPaul Mackerras #define giveup_fpu_maybe_transactional(tsk) giveup_fpu(tsk) 116d31626f7SPaul Mackerras #define giveup_altivec_maybe_transactional(tsk) giveup_altivec(tsk) 117d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 118d31626f7SPaul Mackerras 119037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 12014cf11afSPaul Mackerras /* 12114cf11afSPaul Mackerras * Make sure the floating-point register state in the 12214cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 12314cf11afSPaul Mackerras */ 12414cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 12514cf11afSPaul Mackerras { 12614cf11afSPaul Mackerras if (tsk->thread.regs) { 12714cf11afSPaul Mackerras /* 12814cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 12914cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 13014cf11afSPaul Mackerras * test but before we have finished saving the FP registers 13114cf11afSPaul Mackerras * to the thread_struct. That process could take over the 13214cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 13314cf11afSPaul Mackerras * bogus values for the remaining FP registers. 13414cf11afSPaul Mackerras */ 13514cf11afSPaul Mackerras preempt_disable(); 13614cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 13714cf11afSPaul Mackerras #ifdef CONFIG_SMP 13814cf11afSPaul Mackerras /* 13914cf11afSPaul Mackerras * This should only ever be called for current or 14014cf11afSPaul Mackerras * for a stopped child process. Since we save away 14114cf11afSPaul Mackerras * the FP register state on context switch on SMP, 14214cf11afSPaul Mackerras * there is something wrong if a stopped child appears 14314cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 14414cf11afSPaul Mackerras */ 14514cf11afSPaul Mackerras BUG_ON(tsk != current); 14614cf11afSPaul Mackerras #endif 147d31626f7SPaul Mackerras giveup_fpu_maybe_transactional(tsk); 14814cf11afSPaul Mackerras } 14914cf11afSPaul Mackerras preempt_enable(); 15014cf11afSPaul Mackerras } 15114cf11afSPaul Mackerras } 152de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 153d31626f7SPaul Mackerras #endif /* CONFIG_PPC_FPU */ 15414cf11afSPaul Mackerras 15514cf11afSPaul Mackerras void enable_kernel_fp(void) 15614cf11afSPaul Mackerras { 15714cf11afSPaul Mackerras WARN_ON(preemptible()); 15814cf11afSPaul Mackerras 15914cf11afSPaul Mackerras #ifdef CONFIG_SMP 16014cf11afSPaul Mackerras if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) 161d31626f7SPaul Mackerras giveup_fpu_maybe_transactional(current); 16214cf11afSPaul Mackerras else 16314cf11afSPaul Mackerras giveup_fpu(NULL); /* just enables FP for kernel */ 16414cf11afSPaul Mackerras #else 165d31626f7SPaul Mackerras giveup_fpu_maybe_transactional(last_task_used_math); 16614cf11afSPaul Mackerras #endif /* CONFIG_SMP */ 16714cf11afSPaul Mackerras } 16814cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 16914cf11afSPaul Mackerras 17014cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 17114cf11afSPaul Mackerras void enable_kernel_altivec(void) 17214cf11afSPaul Mackerras { 17314cf11afSPaul Mackerras WARN_ON(preemptible()); 17414cf11afSPaul Mackerras 17514cf11afSPaul Mackerras #ifdef CONFIG_SMP 17614cf11afSPaul Mackerras if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) 177d31626f7SPaul Mackerras giveup_altivec_maybe_transactional(current); 17814cf11afSPaul Mackerras else 17935000870SAnton Blanchard giveup_altivec_notask(); 18014cf11afSPaul Mackerras #else 181d31626f7SPaul Mackerras giveup_altivec_maybe_transactional(last_task_used_altivec); 18214cf11afSPaul Mackerras #endif /* CONFIG_SMP */ 18314cf11afSPaul Mackerras } 18414cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 18514cf11afSPaul Mackerras 18614cf11afSPaul Mackerras /* 18714cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 18814cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 18914cf11afSPaul Mackerras */ 19014cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 19114cf11afSPaul Mackerras { 19214cf11afSPaul Mackerras if (tsk->thread.regs) { 19314cf11afSPaul Mackerras preempt_disable(); 19414cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 19514cf11afSPaul Mackerras #ifdef CONFIG_SMP 19614cf11afSPaul Mackerras BUG_ON(tsk != current); 19714cf11afSPaul Mackerras #endif 198d31626f7SPaul Mackerras giveup_altivec_maybe_transactional(tsk); 19914cf11afSPaul Mackerras } 20014cf11afSPaul Mackerras preempt_enable(); 20114cf11afSPaul Mackerras } 20214cf11afSPaul Mackerras } 203de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 20414cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 20514cf11afSPaul Mackerras 206ce48b210SMichael Neuling #ifdef CONFIG_VSX 207ce48b210SMichael Neuling void enable_kernel_vsx(void) 208ce48b210SMichael Neuling { 209ce48b210SMichael Neuling WARN_ON(preemptible()); 210ce48b210SMichael Neuling 211ce48b210SMichael Neuling #ifdef CONFIG_SMP 212ce48b210SMichael Neuling if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) 213ce48b210SMichael Neuling giveup_vsx(current); 214ce48b210SMichael Neuling else 215ce48b210SMichael Neuling giveup_vsx(NULL); /* just enable vsx for kernel - force */ 216ce48b210SMichael Neuling #else 217ce48b210SMichael Neuling giveup_vsx(last_task_used_vsx); 218ce48b210SMichael Neuling #endif /* CONFIG_SMP */ 219ce48b210SMichael Neuling } 220ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 221ce48b210SMichael Neuling 2227c292170SMichael Neuling void giveup_vsx(struct task_struct *tsk) 2237c292170SMichael Neuling { 224d31626f7SPaul Mackerras giveup_fpu_maybe_transactional(tsk); 225d31626f7SPaul Mackerras giveup_altivec_maybe_transactional(tsk); 2267c292170SMichael Neuling __giveup_vsx(tsk); 2277c292170SMichael Neuling } 228e1802b06SAnton Blanchard EXPORT_SYMBOL(giveup_vsx); 2297c292170SMichael Neuling 230ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 231ce48b210SMichael Neuling { 232ce48b210SMichael Neuling if (tsk->thread.regs) { 233ce48b210SMichael Neuling preempt_disable(); 234ce48b210SMichael Neuling if (tsk->thread.regs->msr & MSR_VSX) { 235ce48b210SMichael Neuling #ifdef CONFIG_SMP 236ce48b210SMichael Neuling BUG_ON(tsk != current); 237ce48b210SMichael Neuling #endif 238ce48b210SMichael Neuling giveup_vsx(tsk); 239ce48b210SMichael Neuling } 240ce48b210SMichael Neuling preempt_enable(); 241ce48b210SMichael Neuling } 242ce48b210SMichael Neuling } 243de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 244ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 245ce48b210SMichael Neuling 24614cf11afSPaul Mackerras #ifdef CONFIG_SPE 24714cf11afSPaul Mackerras 24814cf11afSPaul Mackerras void enable_kernel_spe(void) 24914cf11afSPaul Mackerras { 25014cf11afSPaul Mackerras WARN_ON(preemptible()); 25114cf11afSPaul Mackerras 25214cf11afSPaul Mackerras #ifdef CONFIG_SMP 25314cf11afSPaul Mackerras if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) 25414cf11afSPaul Mackerras giveup_spe(current); 25514cf11afSPaul Mackerras else 25614cf11afSPaul Mackerras giveup_spe(NULL); /* just enable SPE for kernel - force */ 25714cf11afSPaul Mackerras #else 25814cf11afSPaul Mackerras giveup_spe(last_task_used_spe); 25914cf11afSPaul Mackerras #endif /* __SMP __ */ 26014cf11afSPaul Mackerras } 26114cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 26214cf11afSPaul Mackerras 26314cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 26414cf11afSPaul Mackerras { 26514cf11afSPaul Mackerras if (tsk->thread.regs) { 26614cf11afSPaul Mackerras preempt_disable(); 26714cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 26814cf11afSPaul Mackerras #ifdef CONFIG_SMP 26914cf11afSPaul Mackerras BUG_ON(tsk != current); 27014cf11afSPaul Mackerras #endif 271685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 2720ee6c15eSKumar Gala giveup_spe(tsk); 27314cf11afSPaul Mackerras } 27414cf11afSPaul Mackerras preempt_enable(); 27514cf11afSPaul Mackerras } 27614cf11afSPaul Mackerras } 27714cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 27814cf11afSPaul Mackerras 2795388fb10SPaul Mackerras #ifndef CONFIG_SMP 28048abec07SPaul Mackerras /* 28148abec07SPaul Mackerras * If we are doing lazy switching of CPU state (FP, altivec or SPE), 28248abec07SPaul Mackerras * and the current task has some state, discard it. 28348abec07SPaul Mackerras */ 2845388fb10SPaul Mackerras void discard_lazy_cpu_state(void) 28548abec07SPaul Mackerras { 28648abec07SPaul Mackerras preempt_disable(); 28748abec07SPaul Mackerras if (last_task_used_math == current) 28848abec07SPaul Mackerras last_task_used_math = NULL; 28948abec07SPaul Mackerras #ifdef CONFIG_ALTIVEC 29048abec07SPaul Mackerras if (last_task_used_altivec == current) 29148abec07SPaul Mackerras last_task_used_altivec = NULL; 29248abec07SPaul Mackerras #endif /* CONFIG_ALTIVEC */ 293ce48b210SMichael Neuling #ifdef CONFIG_VSX 294ce48b210SMichael Neuling if (last_task_used_vsx == current) 295ce48b210SMichael Neuling last_task_used_vsx = NULL; 296ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 29748abec07SPaul Mackerras #ifdef CONFIG_SPE 29848abec07SPaul Mackerras if (last_task_used_spe == current) 29948abec07SPaul Mackerras last_task_used_spe = NULL; 30048abec07SPaul Mackerras #endif 30148abec07SPaul Mackerras preempt_enable(); 30248abec07SPaul Mackerras } 3035388fb10SPaul Mackerras #endif /* CONFIG_SMP */ 30448abec07SPaul Mackerras 3053bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 3063bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 3073bffb652SDave Kleikamp unsigned long error_code, int signal_code, int breakpt) 3083bffb652SDave Kleikamp { 3093bffb652SDave Kleikamp siginfo_t info; 3103bffb652SDave Kleikamp 31141ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = signal_code; 3123bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 3133bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 3143bffb652SDave Kleikamp return; 3153bffb652SDave Kleikamp 3163bffb652SDave Kleikamp /* Deliver the signal to userspace */ 3173bffb652SDave Kleikamp info.si_signo = SIGTRAP; 3183bffb652SDave Kleikamp info.si_errno = breakpt; /* breakpoint or watchpoint id */ 3193bffb652SDave Kleikamp info.si_code = signal_code; 3203bffb652SDave Kleikamp info.si_addr = (void __user *)address; 3213bffb652SDave Kleikamp force_sig_info(SIGTRAP, &info, current); 3223bffb652SDave Kleikamp } 3233bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 3249422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 325d6a61bfcSLuis Machado unsigned long error_code) 326d6a61bfcSLuis Machado { 327d6a61bfcSLuis Machado siginfo_t info; 328d6a61bfcSLuis Machado 32941ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 330d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 331d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 332d6a61bfcSLuis Machado return; 333d6a61bfcSLuis Machado 3349422de3eSMichael Neuling if (debugger_break_match(regs)) 335d6a61bfcSLuis Machado return; 336d6a61bfcSLuis Machado 3379422de3eSMichael Neuling /* Clear the breakpoint */ 3389422de3eSMichael Neuling hw_breakpoint_disable(); 339d6a61bfcSLuis Machado 340d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 341d6a61bfcSLuis Machado info.si_signo = SIGTRAP; 342d6a61bfcSLuis Machado info.si_errno = 0; 343d6a61bfcSLuis Machado info.si_code = TRAP_HWBKPT; 344d6a61bfcSLuis Machado info.si_addr = (void __user *)address; 345d6a61bfcSLuis Machado force_sig_info(SIGTRAP, &info, current); 346d6a61bfcSLuis Machado } 3473bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 348d6a61bfcSLuis Machado 3499422de3eSMichael Neuling static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk); 350a2ceff5eSMichael Ellerman 3513bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 3523bffb652SDave Kleikamp /* 3533bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 3543bffb652SDave Kleikamp */ 3553bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 3563bffb652SDave Kleikamp { 35751ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 3583bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 35951ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 3603bffb652SDave Kleikamp #endif 36151ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 3623bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 36351ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 3643bffb652SDave Kleikamp #endif 36551ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 3663bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 3673bffb652SDave Kleikamp /* 3683bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 3693bffb652SDave Kleikamp */ 37051ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 3713bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 3723bffb652SDave Kleikamp /* 3733bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 3743bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 3753bffb652SDave Kleikamp */ 37651ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 3773bffb652SDave Kleikamp #else 37851ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 3793bffb652SDave Kleikamp #endif 3803bffb652SDave Kleikamp } 3813bffb652SDave Kleikamp 382f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 3833bffb652SDave Kleikamp { 3846cecf76bSScott Wood /* 3856cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 3866cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 3876cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 3886cecf76bSScott Wood */ 3896cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 3906cecf76bSScott Wood 391f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 392f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 3933bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 394f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 395f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 3963bffb652SDave Kleikamp #endif 397f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 398f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 3993bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 400f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 401f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 4023bffb652SDave Kleikamp #endif 403f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 404f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 4053bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 406f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 4073bffb652SDave Kleikamp #endif 4083bffb652SDave Kleikamp } 4093bffb652SDave Kleikamp /* 4103bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 4113bffb652SDave Kleikamp * debug registers, set the debug registers from the values 4123bffb652SDave Kleikamp * stored in the new thread. 4133bffb652SDave Kleikamp */ 414f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 4153bffb652SDave Kleikamp { 41651ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 417f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 418f5f97210SScott Wood prime_debug_regs(new_debug); 4193bffb652SDave Kleikamp } 4203743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 4213bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 422e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 4233bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 4243bffb652SDave Kleikamp { 4259422de3eSMichael Neuling thread->hw_brk.address = 0; 4269422de3eSMichael Neuling thread->hw_brk.type = 0; 427b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 4283bffb652SDave Kleikamp } 429e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 4303bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 4313bffb652SDave Kleikamp 432172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 4339422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 4349422de3eSMichael Neuling { 435c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 436221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 437221c185dSDave Kleikamp isync(); 438221c185dSDave Kleikamp #endif 4399422de3eSMichael Neuling return 0; 4409422de3eSMichael Neuling } 441c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 4429422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 4439422de3eSMichael Neuling { 444cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 44582a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 4464474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 447cab0af98SMichael Ellerman return 0; 44814cf11afSPaul Mackerras } 4499422de3eSMichael Neuling #else 4509422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 4519422de3eSMichael Neuling { 4529422de3eSMichael Neuling return -EINVAL; 4539422de3eSMichael Neuling } 4549422de3eSMichael Neuling #endif 4559422de3eSMichael Neuling 4569422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 4579422de3eSMichael Neuling { 4589422de3eSMichael Neuling unsigned long dabr, dabrx; 4599422de3eSMichael Neuling 4609422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 4619422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 4629422de3eSMichael Neuling 4639422de3eSMichael Neuling if (ppc_md.set_dabr) 4649422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 4659422de3eSMichael Neuling 4669422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 4679422de3eSMichael Neuling } 4689422de3eSMichael Neuling 469bf99de36SMichael Neuling static inline int set_dawr(struct arch_hw_breakpoint *brk) 470bf99de36SMichael Neuling { 47105d694eaSMichael Neuling unsigned long dawr, dawrx, mrd; 472bf99de36SMichael Neuling 473bf99de36SMichael Neuling dawr = brk->address; 474bf99de36SMichael Neuling 475bf99de36SMichael Neuling dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \ 476bf99de36SMichael Neuling << (63 - 58); //* read/write bits */ 477bf99de36SMichael Neuling dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \ 478bf99de36SMichael Neuling << (63 - 59); //* translate */ 479bf99de36SMichael Neuling dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \ 480bf99de36SMichael Neuling >> 3; //* PRIM bits */ 48105d694eaSMichael Neuling /* dawr length is stored in field MDR bits 48:53. Matches range in 48205d694eaSMichael Neuling doublewords (64 bits) baised by -1 eg. 0b000000=1DW and 48305d694eaSMichael Neuling 0b111111=64DW. 48405d694eaSMichael Neuling brk->len is in bytes. 48505d694eaSMichael Neuling This aligns up to double word size, shifts and does the bias. 48605d694eaSMichael Neuling */ 48705d694eaSMichael Neuling mrd = ((brk->len + 7) >> 3) - 1; 48805d694eaSMichael Neuling dawrx |= (mrd & 0x3f) << (63 - 53); 489bf99de36SMichael Neuling 490bf99de36SMichael Neuling if (ppc_md.set_dawr) 491bf99de36SMichael Neuling return ppc_md.set_dawr(dawr, dawrx); 492bf99de36SMichael Neuling mtspr(SPRN_DAWR, dawr); 493bf99de36SMichael Neuling mtspr(SPRN_DAWRX, dawrx); 494bf99de36SMichael Neuling return 0; 495bf99de36SMichael Neuling } 496bf99de36SMichael Neuling 49721f58507SPaul Gortmaker void __set_breakpoint(struct arch_hw_breakpoint *brk) 4989422de3eSMichael Neuling { 49969111bacSChristoph Lameter memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk)); 5009422de3eSMichael Neuling 501bf99de36SMichael Neuling if (cpu_has_feature(CPU_FTR_DAWR)) 50204c32a51SPaul Gortmaker set_dawr(brk); 50304c32a51SPaul Gortmaker else 50404c32a51SPaul Gortmaker set_dabr(brk); 5059422de3eSMichael Neuling } 50614cf11afSPaul Mackerras 50721f58507SPaul Gortmaker void set_breakpoint(struct arch_hw_breakpoint *brk) 50821f58507SPaul Gortmaker { 50921f58507SPaul Gortmaker preempt_disable(); 51021f58507SPaul Gortmaker __set_breakpoint(brk); 51121f58507SPaul Gortmaker preempt_enable(); 51221f58507SPaul Gortmaker } 51321f58507SPaul Gortmaker 51406d67d54SPaul Mackerras #ifdef CONFIG_PPC64 51506d67d54SPaul Mackerras DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 51606d67d54SPaul Mackerras #endif 51714cf11afSPaul Mackerras 5189422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 5199422de3eSMichael Neuling struct arch_hw_breakpoint *b) 5209422de3eSMichael Neuling { 5219422de3eSMichael Neuling if (a->address != b->address) 5229422de3eSMichael Neuling return false; 5239422de3eSMichael Neuling if (a->type != b->type) 5249422de3eSMichael Neuling return false; 5259422de3eSMichael Neuling if (a->len != b->len) 5269422de3eSMichael Neuling return false; 5279422de3eSMichael Neuling return true; 5289422de3eSMichael Neuling } 529d31626f7SPaul Mackerras 530fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 531d31626f7SPaul Mackerras static void tm_reclaim_thread(struct thread_struct *thr, 532d31626f7SPaul Mackerras struct thread_info *ti, uint8_t cause) 533d31626f7SPaul Mackerras { 534d31626f7SPaul Mackerras unsigned long msr_diff = 0; 535d31626f7SPaul Mackerras 536d31626f7SPaul Mackerras /* 537d31626f7SPaul Mackerras * If FP/VSX registers have been already saved to the 538d31626f7SPaul Mackerras * thread_struct, move them to the transact_fp array. 539d31626f7SPaul Mackerras * We clear the TIF_RESTORE_TM bit since after the reclaim 540d31626f7SPaul Mackerras * the thread will no longer be transactional. 541d31626f7SPaul Mackerras */ 542d31626f7SPaul Mackerras if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) { 543829023dfSAnshuman Khandual msr_diff = thr->ckpt_regs.msr & ~thr->regs->msr; 544d31626f7SPaul Mackerras if (msr_diff & MSR_FP) 545d31626f7SPaul Mackerras memcpy(&thr->transact_fp, &thr->fp_state, 546d31626f7SPaul Mackerras sizeof(struct thread_fp_state)); 547d31626f7SPaul Mackerras if (msr_diff & MSR_VEC) 548d31626f7SPaul Mackerras memcpy(&thr->transact_vr, &thr->vr_state, 549d31626f7SPaul Mackerras sizeof(struct thread_vr_state)); 550d31626f7SPaul Mackerras clear_ti_thread_flag(ti, TIF_RESTORE_TM); 551d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX | MSR_FE0 | MSR_FE1; 552d31626f7SPaul Mackerras } 553d31626f7SPaul Mackerras 554*7f821fc9SMichael Neuling /* 555*7f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 556*7f821fc9SMichael Neuling * checkpointed state outstanding. 557*7f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 558*7f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 559*7f821fc9SMichael Neuling * This will then directly return to userspace without going 560*7f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 561*7f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 562*7f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 563*7f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 564*7f821fc9SMichael Neuling * this state. 565*7f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 566*7f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 567*7f821fc9SMichael Neuling * benifit of checking for a potential TM bad thing exception. 568*7f821fc9SMichael Neuling */ 569*7f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 570*7f821fc9SMichael Neuling return; 571*7f821fc9SMichael Neuling 572d31626f7SPaul Mackerras tm_reclaim(thr, thr->regs->msr, cause); 573d31626f7SPaul Mackerras 574d31626f7SPaul Mackerras /* Having done the reclaim, we now have the checkpointed 575d31626f7SPaul Mackerras * FP/VSX values in the registers. These might be valid 576d31626f7SPaul Mackerras * even if we have previously called enable_kernel_fp() or 577d31626f7SPaul Mackerras * flush_fp_to_thread(), so update thr->regs->msr to 578d31626f7SPaul Mackerras * indicate their current validity. 579d31626f7SPaul Mackerras */ 580d31626f7SPaul Mackerras thr->regs->msr |= msr_diff; 581d31626f7SPaul Mackerras } 582d31626f7SPaul Mackerras 583d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 584d31626f7SPaul Mackerras { 585d31626f7SPaul Mackerras tm_enable(); 586d31626f7SPaul Mackerras tm_reclaim_thread(¤t->thread, current_thread_info(), cause); 587d31626f7SPaul Mackerras } 588d31626f7SPaul Mackerras 589fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 590fb09692eSMichael Neuling { 591fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 592fb09692eSMichael Neuling * middle of a transaction. 593fb09692eSMichael Neuling * 594fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 595fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 596fb09692eSMichael Neuling * checkpointed (tbegin) state in ckpt_regs and saves the transactional 597fb09692eSMichael Neuling * (current) FPRs into oldtask->thread.transact_fpr[]. 598fb09692eSMichael Neuling * 599fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 600fb09692eSMichael Neuling */ 601fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 602fb09692eSMichael Neuling 603fb09692eSMichael Neuling if (!thr->regs) 604fb09692eSMichael Neuling return; 605fb09692eSMichael Neuling 606fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 607fb09692eSMichael Neuling goto out_and_saveregs; 608fb09692eSMichael Neuling 609fb09692eSMichael Neuling /* Stash the original thread MSR, as giveup_fpu et al will 610fb09692eSMichael Neuling * modify it. We hold onto it to see whether the task used 611d31626f7SPaul Mackerras * FP & vector regs. If the TIF_RESTORE_TM flag is set, 612829023dfSAnshuman Khandual * ckpt_regs.msr is already set. 613fb09692eSMichael Neuling */ 614d31626f7SPaul Mackerras if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM)) 615829023dfSAnshuman Khandual thr->ckpt_regs.msr = thr->regs->msr; 616fb09692eSMichael Neuling 617fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 618fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 619fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 620fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 621fb09692eSMichael Neuling thr->regs->trap); 622fb09692eSMichael Neuling 623d31626f7SPaul Mackerras tm_reclaim_thread(thr, task_thread_info(tsk), TM_CAUSE_RESCHED); 624fb09692eSMichael Neuling 625fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 626fb09692eSMichael Neuling tsk->pid); 627fb09692eSMichael Neuling 628fb09692eSMichael Neuling out_and_saveregs: 629fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 630fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 631fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 632fb09692eSMichael Neuling * cannot happen later in _switch(). 633fb09692eSMichael Neuling */ 634fb09692eSMichael Neuling tm_save_sprs(thr); 635fb09692eSMichael Neuling } 636fb09692eSMichael Neuling 637e6b8fd02SMichael Neuling extern void __tm_recheckpoint(struct thread_struct *thread, 638e6b8fd02SMichael Neuling unsigned long orig_msr); 639e6b8fd02SMichael Neuling 640e6b8fd02SMichael Neuling void tm_recheckpoint(struct thread_struct *thread, 641e6b8fd02SMichael Neuling unsigned long orig_msr) 642e6b8fd02SMichael Neuling { 643e6b8fd02SMichael Neuling unsigned long flags; 644e6b8fd02SMichael Neuling 645e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 646e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 647e6b8fd02SMichael Neuling * So let's hard disable over this region. 648e6b8fd02SMichael Neuling */ 649e6b8fd02SMichael Neuling local_irq_save(flags); 650e6b8fd02SMichael Neuling hard_irq_disable(); 651e6b8fd02SMichael Neuling 652e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 653e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 654e6b8fd02SMichael Neuling */ 655e6b8fd02SMichael Neuling tm_restore_sprs(thread); 656e6b8fd02SMichael Neuling 657e6b8fd02SMichael Neuling __tm_recheckpoint(thread, orig_msr); 658e6b8fd02SMichael Neuling 659e6b8fd02SMichael Neuling local_irq_restore(flags); 660e6b8fd02SMichael Neuling } 661e6b8fd02SMichael Neuling 662bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 663fb09692eSMichael Neuling { 664fb09692eSMichael Neuling unsigned long msr; 665fb09692eSMichael Neuling 666fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 667fb09692eSMichael Neuling return; 668fb09692eSMichael Neuling 669fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 670fb09692eSMichael Neuling * 671fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 672fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 673fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 674fb09692eSMichael Neuling * unavoidable later, we are unable to determine which set of FP regs 675fb09692eSMichael Neuling * need to be restored. 676fb09692eSMichael Neuling */ 677fb09692eSMichael Neuling if (!new->thread.regs) 678fb09692eSMichael Neuling return; 679fb09692eSMichael Neuling 680e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 681fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 682fb09692eSMichael Neuling return; 683e6b8fd02SMichael Neuling } 684829023dfSAnshuman Khandual msr = new->thread.ckpt_regs.msr; 685fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 686fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d " 687fb09692eSMichael Neuling "(new->msr 0x%lx, new->origmsr 0x%lx)\n", 688fb09692eSMichael Neuling new->pid, new->thread.regs->msr, msr); 689fb09692eSMichael Neuling 690fb09692eSMichael Neuling /* This loads the checkpointed FP/VEC state, if used */ 691fb09692eSMichael Neuling tm_recheckpoint(&new->thread, msr); 692fb09692eSMichael Neuling 693fb09692eSMichael Neuling /* This loads the speculative FP/VEC state, if used */ 694fb09692eSMichael Neuling if (msr & MSR_FP) { 695fb09692eSMichael Neuling do_load_up_transact_fpu(&new->thread); 696fb09692eSMichael Neuling new->thread.regs->msr |= 697fb09692eSMichael Neuling (MSR_FP | new->thread.fpexc_mode); 698fb09692eSMichael Neuling } 699f110c0c1SMichael Neuling #ifdef CONFIG_ALTIVEC 700fb09692eSMichael Neuling if (msr & MSR_VEC) { 701fb09692eSMichael Neuling do_load_up_transact_altivec(&new->thread); 702fb09692eSMichael Neuling new->thread.regs->msr |= MSR_VEC; 703fb09692eSMichael Neuling } 704f110c0c1SMichael Neuling #endif 705fb09692eSMichael Neuling /* We may as well turn on VSX too since all the state is restored now */ 706fb09692eSMichael Neuling if (msr & MSR_VSX) 707fb09692eSMichael Neuling new->thread.regs->msr |= MSR_VSX; 708fb09692eSMichael Neuling 709fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 710fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 711fb09692eSMichael Neuling new->pid, mfmsr()); 712fb09692eSMichael Neuling } 713fb09692eSMichael Neuling 714fb09692eSMichael Neuling static inline void __switch_to_tm(struct task_struct *prev) 715fb09692eSMichael Neuling { 716fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 717fb09692eSMichael Neuling tm_enable(); 718fb09692eSMichael Neuling tm_reclaim_task(prev); 719fb09692eSMichael Neuling } 720fb09692eSMichael Neuling } 721d31626f7SPaul Mackerras 722d31626f7SPaul Mackerras /* 723d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 724d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 725d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 726d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 727d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 728d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 729d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 730d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 731d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 732d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 733d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 734d31626f7SPaul Mackerras * state to use. 735d31626f7SPaul Mackerras */ 736d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 737d31626f7SPaul Mackerras { 738d31626f7SPaul Mackerras unsigned long msr_diff; 739d31626f7SPaul Mackerras 740d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 741d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 742d31626f7SPaul Mackerras return; 743d31626f7SPaul Mackerras 744829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 745d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 746d31626f7SPaul Mackerras if (msr_diff & MSR_FP) { 747d31626f7SPaul Mackerras fp_enable(); 748d31626f7SPaul Mackerras load_fp_state(¤t->thread.fp_state); 749d31626f7SPaul Mackerras regs->msr |= current->thread.fpexc_mode; 750d31626f7SPaul Mackerras } 751d31626f7SPaul Mackerras if (msr_diff & MSR_VEC) { 752d31626f7SPaul Mackerras vec_enable(); 753d31626f7SPaul Mackerras load_vr_state(¤t->thread.vr_state); 754d31626f7SPaul Mackerras } 755d31626f7SPaul Mackerras regs->msr |= msr_diff; 756d31626f7SPaul Mackerras } 757d31626f7SPaul Mackerras 758fb09692eSMichael Neuling #else 759fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 760fb09692eSMichael Neuling #define __switch_to_tm(prev) 761fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 7629422de3eSMichael Neuling 76314cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 76414cf11afSPaul Mackerras struct task_struct *new) 76514cf11afSPaul Mackerras { 76614cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 76714cf11afSPaul Mackerras struct task_struct *last; 768d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 769d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 770d6bf29b4SPeter Zijlstra #endif 77114cf11afSPaul Mackerras 7727ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 7737ba5fef7SMichael Neuling 77496d01610SSam bobroff /* Back up the TAR and DSCR across context switches. 775c2d52644SMichael Neuling * Note that the TAR is not available for use in the kernel. (To 776c2d52644SMichael Neuling * provide this, the TAR should be backed up/restored on exception 777c2d52644SMichael Neuling * entry/exit instead, and be in pt_regs. FIXME, this should be in 778c2d52644SMichael Neuling * pt_regs anyway (for debug).) 77996d01610SSam bobroff * Save the TAR and DSCR here before we do treclaim/trecheckpoint as 78096d01610SSam bobroff * these will change them. 781c2d52644SMichael Neuling */ 78296d01610SSam bobroff save_early_sprs(&prev->thread); 783c2d52644SMichael Neuling 784bc2a9408SMichael Neuling __switch_to_tm(prev); 785bc2a9408SMichael Neuling 78614cf11afSPaul Mackerras #ifdef CONFIG_SMP 78714cf11afSPaul Mackerras /* avoid complexity of lazy save/restore of fpu 78814cf11afSPaul Mackerras * by just saving it every time we switch out if 78914cf11afSPaul Mackerras * this task used the fpu during the last quantum. 79014cf11afSPaul Mackerras * 79114cf11afSPaul Mackerras * If it tries to use the fpu again, it'll trap and 79214cf11afSPaul Mackerras * reload its fp regs. So we don't have to do a restore 79314cf11afSPaul Mackerras * every switch, just a save. 79414cf11afSPaul Mackerras * -- Cort 79514cf11afSPaul Mackerras */ 79614cf11afSPaul Mackerras if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP)) 79714cf11afSPaul Mackerras giveup_fpu(prev); 79814cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 79914cf11afSPaul Mackerras /* 80014cf11afSPaul Mackerras * If the previous thread used altivec in the last quantum 80114cf11afSPaul Mackerras * (thus changing altivec regs) then save them. 80214cf11afSPaul Mackerras * We used to check the VRSAVE register but not all apps 80314cf11afSPaul Mackerras * set it, so we don't rely on it now (and in fact we need 80414cf11afSPaul Mackerras * to save & restore VSCR even if VRSAVE == 0). -- paulus 80514cf11afSPaul Mackerras * 80614cf11afSPaul Mackerras * On SMP we always save/restore altivec regs just to avoid the 80714cf11afSPaul Mackerras * complexity of changing processors. 80814cf11afSPaul Mackerras * -- Cort 80914cf11afSPaul Mackerras */ 81014cf11afSPaul Mackerras if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) 81114cf11afSPaul Mackerras giveup_altivec(prev); 81214cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 813ce48b210SMichael Neuling #ifdef CONFIG_VSX 814ce48b210SMichael Neuling if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX)) 8157c292170SMichael Neuling /* VMX and FPU registers are already save here */ 8167c292170SMichael Neuling __giveup_vsx(prev); 817ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 81814cf11afSPaul Mackerras #ifdef CONFIG_SPE 81914cf11afSPaul Mackerras /* 82014cf11afSPaul Mackerras * If the previous thread used spe in the last quantum 82114cf11afSPaul Mackerras * (thus changing spe regs) then save them. 82214cf11afSPaul Mackerras * 82314cf11afSPaul Mackerras * On SMP we always save/restore spe regs just to avoid the 82414cf11afSPaul Mackerras * complexity of changing processors. 82514cf11afSPaul Mackerras */ 82614cf11afSPaul Mackerras if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE))) 82714cf11afSPaul Mackerras giveup_spe(prev); 828c0c0d996SPaul Mackerras #endif /* CONFIG_SPE */ 829c0c0d996SPaul Mackerras 830c0c0d996SPaul Mackerras #else /* CONFIG_SMP */ 831c0c0d996SPaul Mackerras #ifdef CONFIG_ALTIVEC 832c0c0d996SPaul Mackerras /* Avoid the trap. On smp this this never happens since 833c0c0d996SPaul Mackerras * we don't set last_task_used_altivec -- Cort 834c0c0d996SPaul Mackerras */ 835c0c0d996SPaul Mackerras if (new->thread.regs && last_task_used_altivec == new) 836c0c0d996SPaul Mackerras new->thread.regs->msr |= MSR_VEC; 837c0c0d996SPaul Mackerras #endif /* CONFIG_ALTIVEC */ 838ce48b210SMichael Neuling #ifdef CONFIG_VSX 839ce48b210SMichael Neuling if (new->thread.regs && last_task_used_vsx == new) 840ce48b210SMichael Neuling new->thread.regs->msr |= MSR_VSX; 841ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 842c0c0d996SPaul Mackerras #ifdef CONFIG_SPE 84314cf11afSPaul Mackerras /* Avoid the trap. On smp this this never happens since 84414cf11afSPaul Mackerras * we don't set last_task_used_spe 84514cf11afSPaul Mackerras */ 84614cf11afSPaul Mackerras if (new->thread.regs && last_task_used_spe == new) 84714cf11afSPaul Mackerras new->thread.regs->msr |= MSR_SPE; 84814cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 849c0c0d996SPaul Mackerras 85014cf11afSPaul Mackerras #endif /* CONFIG_SMP */ 85114cf11afSPaul Mackerras 852172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 853f5f97210SScott Wood switch_booke_debug_regs(&new->thread.debug); 854c6c9eaceSBenjamin Herrenschmidt #else 8555aae8a53SK.Prasad /* 8565aae8a53SK.Prasad * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 8575aae8a53SK.Prasad * schedule DABR 8585aae8a53SK.Prasad */ 8595aae8a53SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 86069111bacSChristoph Lameter if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk))) 86121f58507SPaul Gortmaker __set_breakpoint(&new->thread.hw_brk); 8625aae8a53SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 863d6a61bfcSLuis Machado #endif 864d6a61bfcSLuis Machado 865c6c9eaceSBenjamin Herrenschmidt 86614cf11afSPaul Mackerras new_thread = &new->thread; 86714cf11afSPaul Mackerras old_thread = ¤t->thread; 86806d67d54SPaul Mackerras 86906d67d54SPaul Mackerras #ifdef CONFIG_PPC64 87006d67d54SPaul Mackerras /* 87106d67d54SPaul Mackerras * Collect processor utilization data per process 87206d67d54SPaul Mackerras */ 87306d67d54SPaul Mackerras if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 87469111bacSChristoph Lameter struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array); 87506d67d54SPaul Mackerras long unsigned start_tb, current_tb; 87606d67d54SPaul Mackerras start_tb = old_thread->start_tb; 87706d67d54SPaul Mackerras cu->current_tb = current_tb = mfspr(SPRN_PURR); 87806d67d54SPaul Mackerras old_thread->accum_tb += (current_tb - start_tb); 87906d67d54SPaul Mackerras new_thread->start_tb = current_tb; 88006d67d54SPaul Mackerras } 881d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC64 */ 882d6bf29b4SPeter Zijlstra 883d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 88469111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 885d6bf29b4SPeter Zijlstra if (batch->active) { 886d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 887d6bf29b4SPeter Zijlstra if (batch->index) 888d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 889d6bf29b4SPeter Zijlstra batch->active = 0; 890d6bf29b4SPeter Zijlstra } 891d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC_BOOK3S_64 */ 89206d67d54SPaul Mackerras 89344387e9fSAnton Blanchard /* 89444387e9fSAnton Blanchard * We can't take a PMU exception inside _switch() since there is a 89544387e9fSAnton Blanchard * window where the kernel stack SLB and the kernel stack are out 89644387e9fSAnton Blanchard * of sync. Hard disable here. 89744387e9fSAnton Blanchard */ 89844387e9fSAnton Blanchard hard_irq_disable(); 899bc2a9408SMichael Neuling 900bc2a9408SMichael Neuling tm_recheckpoint_new_task(new); 901bc2a9408SMichael Neuling 90214cf11afSPaul Mackerras last = _switch(old_thread, new_thread); 90314cf11afSPaul Mackerras 904d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 905d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 906d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 90769111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 908d6bf29b4SPeter Zijlstra batch->active = 1; 909d6bf29b4SPeter Zijlstra } 910d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC_BOOK3S_64 */ 911d6bf29b4SPeter Zijlstra 91214cf11afSPaul Mackerras return last; 91314cf11afSPaul Mackerras } 91414cf11afSPaul Mackerras 91506d67d54SPaul Mackerras static int instructions_to_print = 16; 91606d67d54SPaul Mackerras 91706d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 91806d67d54SPaul Mackerras { 91906d67d54SPaul Mackerras int i; 92006d67d54SPaul Mackerras unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 92106d67d54SPaul Mackerras sizeof(int)); 92206d67d54SPaul Mackerras 92306d67d54SPaul Mackerras printk("Instruction dump:"); 92406d67d54SPaul Mackerras 92506d67d54SPaul Mackerras for (i = 0; i < instructions_to_print; i++) { 92606d67d54SPaul Mackerras int instr; 92706d67d54SPaul Mackerras 92806d67d54SPaul Mackerras if (!(i % 8)) 92906d67d54SPaul Mackerras printk("\n"); 93006d67d54SPaul Mackerras 9310de2d820SScott Wood #if !defined(CONFIG_BOOKE) 9320de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 9330de2d820SScott Wood * than print XXXXXXXX. 9340de2d820SScott Wood */ 9350de2d820SScott Wood if (!(regs->msr & MSR_IR)) 9360de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 9370de2d820SScott Wood #endif 9380de2d820SScott Wood 93900ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 9407b051f66SAnton Blanchard probe_kernel_address((unsigned int __user *)pc, instr)) { 94140c8cefaSIra Snyder printk(KERN_CONT "XXXXXXXX "); 94206d67d54SPaul Mackerras } else { 94306d67d54SPaul Mackerras if (regs->nip == pc) 94440c8cefaSIra Snyder printk(KERN_CONT "<%08x> ", instr); 94506d67d54SPaul Mackerras else 94640c8cefaSIra Snyder printk(KERN_CONT "%08x ", instr); 94706d67d54SPaul Mackerras } 94806d67d54SPaul Mackerras 94906d67d54SPaul Mackerras pc += sizeof(int); 95006d67d54SPaul Mackerras } 95106d67d54SPaul Mackerras 95206d67d54SPaul Mackerras printk("\n"); 95306d67d54SPaul Mackerras } 95406d67d54SPaul Mackerras 95506d67d54SPaul Mackerras static struct regbit { 95606d67d54SPaul Mackerras unsigned long bit; 95706d67d54SPaul Mackerras const char *name; 95806d67d54SPaul Mackerras } msr_bits[] = { 9593bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 9603bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 9613bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 9623bfd0c9cSAnton Blanchard #endif 9633bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 9643bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 9653bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 9663bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 9673bfd0c9cSAnton Blanchard #endif 96806d67d54SPaul Mackerras {MSR_EE, "EE"}, 96906d67d54SPaul Mackerras {MSR_PR, "PR"}, 97006d67d54SPaul Mackerras {MSR_FP, "FP"}, 97106d67d54SPaul Mackerras {MSR_ME, "ME"}, 9723bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 9731b98326bSKumar Gala {MSR_DE, "DE"}, 9743bfd0c9cSAnton Blanchard #else 9753bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 9763bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 9773bfd0c9cSAnton Blanchard #endif 97806d67d54SPaul Mackerras {MSR_IR, "IR"}, 97906d67d54SPaul Mackerras {MSR_DR, "DR"}, 9803bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 9813bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 9823bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 9833bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 9843bfd0c9cSAnton Blanchard #endif 98506d67d54SPaul Mackerras {0, NULL} 98606d67d54SPaul Mackerras }; 98706d67d54SPaul Mackerras 98806d67d54SPaul Mackerras static void printbits(unsigned long val, struct regbit *bits) 98906d67d54SPaul Mackerras { 99006d67d54SPaul Mackerras const char *sep = ""; 99106d67d54SPaul Mackerras 99206d67d54SPaul Mackerras printk("<"); 99306d67d54SPaul Mackerras for (; bits->bit; ++bits) 99406d67d54SPaul Mackerras if (val & bits->bit) { 99506d67d54SPaul Mackerras printk("%s%s", sep, bits->name); 99606d67d54SPaul Mackerras sep = ","; 99706d67d54SPaul Mackerras } 99806d67d54SPaul Mackerras printk(">"); 99906d67d54SPaul Mackerras } 100006d67d54SPaul Mackerras 100106d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1002f6f7dde3Santon@samba.org #define REG "%016lx" 100306d67d54SPaul Mackerras #define REGS_PER_LINE 4 100406d67d54SPaul Mackerras #define LAST_VOLATILE 13 100506d67d54SPaul Mackerras #else 1006f6f7dde3Santon@samba.org #define REG "%08lx" 100706d67d54SPaul Mackerras #define REGS_PER_LINE 8 100806d67d54SPaul Mackerras #define LAST_VOLATILE 12 100906d67d54SPaul Mackerras #endif 101006d67d54SPaul Mackerras 101114cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 101214cf11afSPaul Mackerras { 101314cf11afSPaul Mackerras int i, trap; 101414cf11afSPaul Mackerras 1015a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1016a43cb95dSTejun Heo 101706d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 101806d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 101906d67d54SPaul Mackerras printk("REGS: %p TRAP: %04lx %s (%s)\n", 102096b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 102106d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 102206d67d54SPaul Mackerras printbits(regs->msr, msr_bits); 1023f6f7dde3Santon@samba.org printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 102414cf11afSPaul Mackerras trap = TRAP(regs); 10255115a026SMichael Neuling if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 10269db8bcfdSAnton Blanchard printk("CFAR: "REG" ", regs->orig_gpr3); 1027c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1028ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 10299db8bcfdSAnton Blanchard printk("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 103014170789SKumar Gala #else 10319db8bcfdSAnton Blanchard printk("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 10329db8bcfdSAnton Blanchard #endif 10339db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 10349db8bcfdSAnton Blanchard printk("SOFTE: %ld ", regs->softe); 10359db8bcfdSAnton Blanchard #endif 10369db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10376d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 10389db8bcfdSAnton Blanchard printk("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 103914170789SKumar Gala #endif 104014cf11afSPaul Mackerras 104114cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 104206d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 1043a2367194SKumar Gala printk("\nGPR%02d: ", i); 104406d67d54SPaul Mackerras printk(REG " ", regs->gpr[i]); 104506d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 104614cf11afSPaul Mackerras break; 104714cf11afSPaul Mackerras } 104814cf11afSPaul Mackerras printk("\n"); 104914cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 105014cf11afSPaul Mackerras /* 105114cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 105214cf11afSPaul Mackerras * above info out without failing 105314cf11afSPaul Mackerras */ 1054058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1055058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 105614cf11afSPaul Mackerras #endif 105714cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 105806d67d54SPaul Mackerras if (!user_mode(regs)) 105906d67d54SPaul Mackerras show_instructions(regs); 106014cf11afSPaul Mackerras } 106114cf11afSPaul Mackerras 106214cf11afSPaul Mackerras void exit_thread(void) 106314cf11afSPaul Mackerras { 106448abec07SPaul Mackerras discard_lazy_cpu_state(); 106514cf11afSPaul Mackerras } 106614cf11afSPaul Mackerras 106714cf11afSPaul Mackerras void flush_thread(void) 106814cf11afSPaul Mackerras { 106948abec07SPaul Mackerras discard_lazy_cpu_state(); 107014cf11afSPaul Mackerras 1071e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 10725aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1073e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 10743bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1075e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 107614cf11afSPaul Mackerras } 107714cf11afSPaul Mackerras 107814cf11afSPaul Mackerras void 107914cf11afSPaul Mackerras release_thread(struct task_struct *t) 108014cf11afSPaul Mackerras { 108114cf11afSPaul Mackerras } 108214cf11afSPaul Mackerras 108314cf11afSPaul Mackerras /* 108455ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 108555ccf3feSSuresh Siddha * copy the current task into the new thread. 108614cf11afSPaul Mackerras */ 108755ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 108814cf11afSPaul Mackerras { 108955ccf3feSSuresh Siddha flush_fp_to_thread(src); 109055ccf3feSSuresh Siddha flush_altivec_to_thread(src); 109155ccf3feSSuresh Siddha flush_vsx_to_thread(src); 109255ccf3feSSuresh Siddha flush_spe_to_thread(src); 1093621b5060SMichael Neuling /* 1094621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1095621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1096621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1097621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1098621b5060SMichael Neuling * checkpointed state back and the TM mode. 1099621b5060SMichael Neuling */ 1100621b5060SMichael Neuling __switch_to_tm(src); 1101621b5060SMichael Neuling tm_recheckpoint_new_task(src); 1102330a1eb7SMichael Ellerman 110355ccf3feSSuresh Siddha *dst = *src; 1104330a1eb7SMichael Ellerman 1105330a1eb7SMichael Ellerman clear_task_ebb(dst); 1106330a1eb7SMichael Ellerman 110755ccf3feSSuresh Siddha return 0; 110814cf11afSPaul Mackerras } 110914cf11afSPaul Mackerras 1110cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1111cec15488SMichael Ellerman { 1112cec15488SMichael Ellerman #ifdef CONFIG_PPC_STD_MMU_64 1113cec15488SMichael Ellerman unsigned long sp_vsid; 1114cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1115cec15488SMichael Ellerman 1116cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1117cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1118cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1119cec15488SMichael Ellerman else 1120cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1121cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1122cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1123cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1124cec15488SMichael Ellerman #endif 1125cec15488SMichael Ellerman } 1126cec15488SMichael Ellerman 112714cf11afSPaul Mackerras /* 112814cf11afSPaul Mackerras * Copy a thread.. 112914cf11afSPaul Mackerras */ 1130efcac658SAlexey Kardashevskiy 11316eca8933SAlex Dowad /* 11326eca8933SAlex Dowad * Copy architecture-specific thread state 11336eca8933SAlex Dowad */ 11346f2c55b8SAlexey Dobriyan int copy_thread(unsigned long clone_flags, unsigned long usp, 11356eca8933SAlex Dowad unsigned long kthread_arg, struct task_struct *p) 113614cf11afSPaul Mackerras { 113714cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 113814cf11afSPaul Mackerras extern void ret_from_fork(void); 113958254e10SAl Viro extern void ret_from_kernel_thread(void); 114058254e10SAl Viro void (*f)(void); 11410cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 114214cf11afSPaul Mackerras 114314cf11afSPaul Mackerras /* Copy registers */ 114414cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 114514cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1146ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 11476eca8933SAlex Dowad /* kernel thread */ 1148138d1ce8SAl Viro struct thread_info *ti = (void *)task_stack_page(p); 114958254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 115014cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 11517cedd601SAnton Blanchard /* function */ 11527cedd601SAnton Blanchard if (usp) 11537cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 115458254e10SAl Viro #ifdef CONFIG_PPC64 1155b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1156138d1ce8SAl Viro childregs->softe = 1; 115706d67d54SPaul Mackerras #endif 11586eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 115914cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1160138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 116158254e10SAl Viro f = ret_from_kernel_thread; 116214cf11afSPaul Mackerras } else { 11636eca8933SAlex Dowad /* user thread */ 1164afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 116558254e10SAl Viro CHECK_FULL_REGS(regs); 116658254e10SAl Viro *childregs = *regs; 1167ea516b11SAl Viro if (usp) 116814cf11afSPaul Mackerras childregs->gpr[1] = usp; 116914cf11afSPaul Mackerras p->thread.regs = childregs; 117058254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 117106d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 117206d67d54SPaul Mackerras #ifdef CONFIG_PPC64 11739904b005SDenis Kirjanov if (!is_32bit_task()) 117406d67d54SPaul Mackerras childregs->gpr[13] = childregs->gpr[6]; 117506d67d54SPaul Mackerras else 117606d67d54SPaul Mackerras #endif 117714cf11afSPaul Mackerras childregs->gpr[2] = childregs->gpr[6]; 117814cf11afSPaul Mackerras } 117958254e10SAl Viro 118058254e10SAl Viro f = ret_from_fork; 118106d67d54SPaul Mackerras } 118214cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 118314cf11afSPaul Mackerras 118414cf11afSPaul Mackerras /* 118514cf11afSPaul Mackerras * The way this works is that at some point in the future 118614cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 118714cf11afSPaul Mackerras * That will pop off the stack frame created below and start 118814cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 118914cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 119014cf11afSPaul Mackerras * system call, using the stack frame created above. 119114cf11afSPaul Mackerras */ 1192af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 119314cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 119414cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 119514cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 119614cf11afSPaul Mackerras p->thread.ksp = sp; 1197cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 119885218827SKumar Gala p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 119985218827SKumar Gala _ALIGN_UP(sizeof(struct thread_info), 16); 1200cbc9565eSBenjamin Herrenschmidt #endif 120128d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 120228d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 120328d170abSOleg Nesterov #endif 120428d170abSOleg Nesterov 120518461960SPaul Mackerras p->thread.fp_save_area = NULL; 120618461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 120718461960SPaul Mackerras p->thread.vr_save_area = NULL; 120818461960SPaul Mackerras #endif 120918461960SPaul Mackerras 1210cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 121106d67d54SPaul Mackerras 1212efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1213efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 12141021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1215efcac658SAlexey Kardashevskiy p->thread.dscr = current->thread.dscr; 1216efcac658SAlexey Kardashevskiy } 121792779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 121892779245SHaren Myneni p->thread.ppr = INIT_PPR; 1219efcac658SAlexey Kardashevskiy #endif 12207cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 122114cf11afSPaul Mackerras return 0; 122214cf11afSPaul Mackerras } 122314cf11afSPaul Mackerras 122414cf11afSPaul Mackerras /* 122514cf11afSPaul Mackerras * Set up a thread for executing a new program 122614cf11afSPaul Mackerras */ 122706d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 122814cf11afSPaul Mackerras { 122990eac727SMichael Ellerman #ifdef CONFIG_PPC64 123090eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 123190eac727SMichael Ellerman #endif 123290eac727SMichael Ellerman 123306d67d54SPaul Mackerras /* 123406d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 123506d67d54SPaul Mackerras * set. Do it now. 123606d67d54SPaul Mackerras */ 123706d67d54SPaul Mackerras if (!current->thread.regs) { 12380cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 12390cec6fd1SAl Viro current->thread.regs = regs - 1; 124006d67d54SPaul Mackerras } 124106d67d54SPaul Mackerras 124214cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 124314cf11afSPaul Mackerras regs->ctr = 0; 124414cf11afSPaul Mackerras regs->link = 0; 124514cf11afSPaul Mackerras regs->xer = 0; 124614cf11afSPaul Mackerras regs->ccr = 0; 124714cf11afSPaul Mackerras regs->gpr[1] = sp; 124806d67d54SPaul Mackerras 1249474f8196SRoland McGrath /* 1250474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1251474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1252474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1253474f8196SRoland McGrath */ 1254474f8196SRoland McGrath regs->trap &= ~1UL; 1255474f8196SRoland McGrath 125606d67d54SPaul Mackerras #ifdef CONFIG_PPC32 125706d67d54SPaul Mackerras regs->mq = 0; 125806d67d54SPaul Mackerras regs->nip = start; 125914cf11afSPaul Mackerras regs->msr = MSR_USER; 126006d67d54SPaul Mackerras #else 12619904b005SDenis Kirjanov if (!is_32bit_task()) { 126294af3abfSRusty Russell unsigned long entry; 126306d67d54SPaul Mackerras 126494af3abfSRusty Russell if (is_elf2_task()) { 126594af3abfSRusty Russell /* Look ma, no function descriptors! */ 126694af3abfSRusty Russell entry = start; 126794af3abfSRusty Russell 126894af3abfSRusty Russell /* 126994af3abfSRusty Russell * Ulrich says: 127094af3abfSRusty Russell * The latest iteration of the ABI requires that when 127194af3abfSRusty Russell * calling a function (at its global entry point), 127294af3abfSRusty Russell * the caller must ensure r12 holds the entry point 127394af3abfSRusty Russell * address (so that the function can quickly 127494af3abfSRusty Russell * establish addressability). 127594af3abfSRusty Russell */ 127694af3abfSRusty Russell regs->gpr[12] = start; 127794af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 127894af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 127994af3abfSRusty Russell } else { 128094af3abfSRusty Russell unsigned long toc; 128194af3abfSRusty Russell 128294af3abfSRusty Russell /* start is a relocated pointer to the function 128394af3abfSRusty Russell * descriptor for the elf _start routine. The first 128494af3abfSRusty Russell * entry in the function descriptor is the entry 128594af3abfSRusty Russell * address of _start and the second entry is the TOC 128694af3abfSRusty Russell * value we need to use. 128706d67d54SPaul Mackerras */ 128806d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 128906d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 129006d67d54SPaul Mackerras 129106d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 129206d67d54SPaul Mackerras * need to be relocated before we can use them. 129306d67d54SPaul Mackerras */ 129406d67d54SPaul Mackerras if (load_addr != 0) { 129506d67d54SPaul Mackerras entry += load_addr; 129606d67d54SPaul Mackerras toc += load_addr; 129706d67d54SPaul Mackerras } 129806d67d54SPaul Mackerras regs->gpr[2] = toc; 129994af3abfSRusty Russell } 130094af3abfSRusty Russell regs->nip = entry; 130106d67d54SPaul Mackerras regs->msr = MSR_USER64; 1302d4bf9a78SStephen Rothwell } else { 1303d4bf9a78SStephen Rothwell regs->nip = start; 1304d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1305d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 130606d67d54SPaul Mackerras } 130706d67d54SPaul Mackerras #endif 130848abec07SPaul Mackerras discard_lazy_cpu_state(); 1309ce48b210SMichael Neuling #ifdef CONFIG_VSX 1310ce48b210SMichael Neuling current->thread.used_vsr = 0; 1311ce48b210SMichael Neuling #endif 1312de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 131318461960SPaul Mackerras current->thread.fp_save_area = NULL; 131414cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1315de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1316de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 131718461960SPaul Mackerras current->thread.vr_save_area = NULL; 131814cf11afSPaul Mackerras current->thread.vrsave = 0; 131914cf11afSPaul Mackerras current->thread.used_vr = 0; 132014cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 132114cf11afSPaul Mackerras #ifdef CONFIG_SPE 132214cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 132314cf11afSPaul Mackerras current->thread.acc = 0; 132414cf11afSPaul Mackerras current->thread.spefscr = 0; 132514cf11afSPaul Mackerras current->thread.used_spe = 0; 132614cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1327bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1328bc2a9408SMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) 1329bc2a9408SMichael Neuling regs->msr |= MSR_TM; 1330bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1331bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1332bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 1333bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 133414cf11afSPaul Mackerras } 1335e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 133614cf11afSPaul Mackerras 133714cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 133814cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 133914cf11afSPaul Mackerras 134014cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 134114cf11afSPaul Mackerras { 134214cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 134314cf11afSPaul Mackerras 134414cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 134514cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 134614cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 134714cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 134814cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 134914cf11afSPaul Mackerras #ifdef CONFIG_SPE 13505e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1351640e9225SJoseph Myers /* 1352640e9225SJoseph Myers * When the sticky exception bits are set 1353640e9225SJoseph Myers * directly by userspace, it must call prctl 1354640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1355640e9225SJoseph Myers * in the existing prctl settings) or 1356640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1357640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1358640e9225SJoseph Myers * saving and restoring the whole 1359640e9225SJoseph Myers * floating-point environment need to do so 1360640e9225SJoseph Myers * anyway to restore the prctl settings from 1361640e9225SJoseph Myers * the saved environment. 1362640e9225SJoseph Myers */ 1363640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 136414cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 136514cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 136606d67d54SPaul Mackerras return 0; 13675e14d21eSKumar Gala } else { 13685e14d21eSKumar Gala return -EINVAL; 13695e14d21eSKumar Gala } 137014cf11afSPaul Mackerras #else 137114cf11afSPaul Mackerras return -EINVAL; 137214cf11afSPaul Mackerras #endif 137306d67d54SPaul Mackerras } 137406d67d54SPaul Mackerras 137514cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 137614cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 137714cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 137814cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 137914cf11afSPaul Mackerras * them does not change anything */ 138014cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 138114cf11afSPaul Mackerras return -EINVAL; 138214cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 138314cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 138414cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 138514cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 138614cf11afSPaul Mackerras return 0; 138714cf11afSPaul Mackerras } 138814cf11afSPaul Mackerras 138914cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 139014cf11afSPaul Mackerras { 139114cf11afSPaul Mackerras unsigned int val; 139214cf11afSPaul Mackerras 139314cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 139414cf11afSPaul Mackerras #ifdef CONFIG_SPE 1395640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1396640e9225SJoseph Myers /* 1397640e9225SJoseph Myers * When the sticky exception bits are set 1398640e9225SJoseph Myers * directly by userspace, it must call prctl 1399640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1400640e9225SJoseph Myers * in the existing prctl settings) or 1401640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1402640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1403640e9225SJoseph Myers * saving and restoring the whole 1404640e9225SJoseph Myers * floating-point environment need to do so 1405640e9225SJoseph Myers * anyway to restore the prctl settings from 1406640e9225SJoseph Myers * the saved environment. 1407640e9225SJoseph Myers */ 1408640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 140914cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1410640e9225SJoseph Myers } else 14115e14d21eSKumar Gala return -EINVAL; 141214cf11afSPaul Mackerras #else 141314cf11afSPaul Mackerras return -EINVAL; 141414cf11afSPaul Mackerras #endif 141514cf11afSPaul Mackerras else 141614cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 141714cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 141814cf11afSPaul Mackerras } 141914cf11afSPaul Mackerras 1420fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1421fab5db97SPaul Mackerras { 1422fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1423fab5db97SPaul Mackerras 1424fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1425fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1426fab5db97SPaul Mackerras return -EINVAL; 1427fab5db97SPaul Mackerras 1428fab5db97SPaul Mackerras if (regs == NULL) 1429fab5db97SPaul Mackerras return -EINVAL; 1430fab5db97SPaul Mackerras 1431fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1432fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1433fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1434fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1435fab5db97SPaul Mackerras else 1436fab5db97SPaul Mackerras return -EINVAL; 1437fab5db97SPaul Mackerras 1438fab5db97SPaul Mackerras return 0; 1439fab5db97SPaul Mackerras } 1440fab5db97SPaul Mackerras 1441fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 1442fab5db97SPaul Mackerras { 1443fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1444fab5db97SPaul Mackerras unsigned int val; 1445fab5db97SPaul Mackerras 1446fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 1447fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 1448fab5db97SPaul Mackerras return -EINVAL; 1449fab5db97SPaul Mackerras 1450fab5db97SPaul Mackerras if (regs == NULL) 1451fab5db97SPaul Mackerras return -EINVAL; 1452fab5db97SPaul Mackerras 1453fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 1454fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 1455fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 1456fab5db97SPaul Mackerras else 1457fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 1458fab5db97SPaul Mackerras } else 1459fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 1460fab5db97SPaul Mackerras 1461fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 1462fab5db97SPaul Mackerras } 1463fab5db97SPaul Mackerras 1464e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 1465e9370ae1SPaul Mackerras { 1466e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 1467e9370ae1SPaul Mackerras return 0; 1468e9370ae1SPaul Mackerras } 1469e9370ae1SPaul Mackerras 1470e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1471e9370ae1SPaul Mackerras { 1472e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1473e9370ae1SPaul Mackerras } 1474e9370ae1SPaul Mackerras 1475bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1476bb72c481SPaul Mackerras unsigned long nbytes) 1477bb72c481SPaul Mackerras { 1478bb72c481SPaul Mackerras unsigned long stack_page; 1479bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 1480bb72c481SPaul Mackerras 1481bb72c481SPaul Mackerras /* 1482bb72c481SPaul Mackerras * Avoid crashing if the stack has overflowed and corrupted 1483bb72c481SPaul Mackerras * task_cpu(p), which is in the thread_info struct. 1484bb72c481SPaul Mackerras */ 1485bb72c481SPaul Mackerras if (cpu < NR_CPUS && cpu_possible(cpu)) { 1486bb72c481SPaul Mackerras stack_page = (unsigned long) hardirq_ctx[cpu]; 1487bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1488bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1489bb72c481SPaul Mackerras return 1; 1490bb72c481SPaul Mackerras 1491bb72c481SPaul Mackerras stack_page = (unsigned long) softirq_ctx[cpu]; 1492bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1493bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1494bb72c481SPaul Mackerras return 1; 1495bb72c481SPaul Mackerras } 1496bb72c481SPaul Mackerras return 0; 1497bb72c481SPaul Mackerras } 1498bb72c481SPaul Mackerras 14992f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 150014cf11afSPaul Mackerras unsigned long nbytes) 150114cf11afSPaul Mackerras { 15020cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 150314cf11afSPaul Mackerras 150414cf11afSPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 150514cf11afSPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 150614cf11afSPaul Mackerras return 1; 150714cf11afSPaul Mackerras 1508bb72c481SPaul Mackerras return valid_irq_stack(sp, p, nbytes); 150914cf11afSPaul Mackerras } 151014cf11afSPaul Mackerras 15112f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 15122f25194dSAnton Blanchard 151306d67d54SPaul Mackerras unsigned long get_wchan(struct task_struct *p) 151406d67d54SPaul Mackerras { 151506d67d54SPaul Mackerras unsigned long ip, sp; 151606d67d54SPaul Mackerras int count = 0; 151706d67d54SPaul Mackerras 151806d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 151906d67d54SPaul Mackerras return 0; 152006d67d54SPaul Mackerras 152106d67d54SPaul Mackerras sp = p->thread.ksp; 1522ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 152306d67d54SPaul Mackerras return 0; 152406d67d54SPaul Mackerras 152506d67d54SPaul Mackerras do { 152606d67d54SPaul Mackerras sp = *(unsigned long *)sp; 1527ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 152806d67d54SPaul Mackerras return 0; 152906d67d54SPaul Mackerras if (count > 0) { 1530ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 153106d67d54SPaul Mackerras if (!in_sched_functions(ip)) 153206d67d54SPaul Mackerras return ip; 153306d67d54SPaul Mackerras } 153406d67d54SPaul Mackerras } while (count++ < 16); 153506d67d54SPaul Mackerras return 0; 153606d67d54SPaul Mackerras } 153706d67d54SPaul Mackerras 1538c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 153914cf11afSPaul Mackerras 154014cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 154114cf11afSPaul Mackerras { 154206d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 154314cf11afSPaul Mackerras int count = 0; 154406d67d54SPaul Mackerras int firstframe = 1; 15456794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 15466794c782SSteven Rostedt int curr_frame = current->curr_ret_stack; 15476794c782SSteven Rostedt extern void return_to_handler(void); 15489135c3ccSSteven Rostedt unsigned long rth = (unsigned long)return_to_handler; 15496794c782SSteven Rostedt #endif 155014cf11afSPaul Mackerras 155114cf11afSPaul Mackerras sp = (unsigned long) stack; 155214cf11afSPaul Mackerras if (tsk == NULL) 155314cf11afSPaul Mackerras tsk = current; 155414cf11afSPaul Mackerras if (sp == 0) { 155514cf11afSPaul Mackerras if (tsk == current) 1556acf620ecSAnton Blanchard sp = current_stack_pointer(); 155714cf11afSPaul Mackerras else 155814cf11afSPaul Mackerras sp = tsk->thread.ksp; 155914cf11afSPaul Mackerras } 156014cf11afSPaul Mackerras 156106d67d54SPaul Mackerras lr = 0; 156206d67d54SPaul Mackerras printk("Call Trace:\n"); 156314cf11afSPaul Mackerras do { 1564ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 156506d67d54SPaul Mackerras return; 156606d67d54SPaul Mackerras 156706d67d54SPaul Mackerras stack = (unsigned long *) sp; 156806d67d54SPaul Mackerras newsp = stack[0]; 1569ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 157006d67d54SPaul Mackerras if (!firstframe || ip != lr) { 1571058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 15726794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 15737d56c65aSAnton Blanchard if ((ip == rth) && curr_frame >= 0) { 15746794c782SSteven Rostedt printk(" (%pS)", 15756794c782SSteven Rostedt (void *)current->ret_stack[curr_frame].ret); 15766794c782SSteven Rostedt curr_frame--; 15776794c782SSteven Rostedt } 15786794c782SSteven Rostedt #endif 157906d67d54SPaul Mackerras if (firstframe) 158006d67d54SPaul Mackerras printk(" (unreliable)"); 158106d67d54SPaul Mackerras printk("\n"); 158214cf11afSPaul Mackerras } 158306d67d54SPaul Mackerras firstframe = 0; 158406d67d54SPaul Mackerras 158506d67d54SPaul Mackerras /* 158606d67d54SPaul Mackerras * See if this is an exception frame. 158706d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 158806d67d54SPaul Mackerras */ 1589ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1590ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 159106d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 159206d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 159306d67d54SPaul Mackerras lr = regs->link; 15949be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 1595058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 159606d67d54SPaul Mackerras firstframe = 1; 159714cf11afSPaul Mackerras } 159806d67d54SPaul Mackerras 159906d67d54SPaul Mackerras sp = newsp; 160006d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 160106d67d54SPaul Mackerras } 160206d67d54SPaul Mackerras 1603cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 1604fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 16050e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 1606cb2c9b27SAnton Blanchard { 1607fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1608cb2c9b27SAnton Blanchard unsigned long ctrl; 1609cb2c9b27SAnton Blanchard 1610cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1611cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 1612cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1613cb2c9b27SAnton Blanchard 1614fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 1615cb2c9b27SAnton Blanchard } 1616cb2c9b27SAnton Blanchard 1617fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 16180e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 1619cb2c9b27SAnton Blanchard { 1620fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1621cb2c9b27SAnton Blanchard unsigned long ctrl; 1622cb2c9b27SAnton Blanchard 1623fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 1624cb2c9b27SAnton Blanchard 1625cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1626cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 1627cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1628cb2c9b27SAnton Blanchard } 1629fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 1630f6a61680SBenjamin Herrenschmidt 1631d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 1632d839088cSAnton Blanchard { 1633d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1634d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 1635d839088cSAnton Blanchard return sp & ~0xf; 1636d839088cSAnton Blanchard } 1637912f9ee2SAnton Blanchard 1638912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 1639912f9ee2SAnton Blanchard { 1640912f9ee2SAnton Blanchard unsigned long rnd = 0; 1641912f9ee2SAnton Blanchard 1642912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 1643912f9ee2SAnton Blanchard if (is_32bit_task()) 1644912f9ee2SAnton Blanchard rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT))); 1645912f9ee2SAnton Blanchard else 1646912f9ee2SAnton Blanchard rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT))); 1647912f9ee2SAnton Blanchard 1648912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 1649912f9ee2SAnton Blanchard } 1650912f9ee2SAnton Blanchard 1651912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 1652912f9ee2SAnton Blanchard { 16538bbde7a7SAnton Blanchard unsigned long base = mm->brk; 16548bbde7a7SAnton Blanchard unsigned long ret; 16558bbde7a7SAnton Blanchard 1656ce7a35c7SKumar Gala #ifdef CONFIG_PPC_STD_MMU_64 16578bbde7a7SAnton Blanchard /* 16588bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 16598bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 16608bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 16618bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 16628bbde7a7SAnton Blanchard * performance penalty. 16638bbde7a7SAnton Blanchard */ 16648bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 16658bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 16668bbde7a7SAnton Blanchard #endif 16678bbde7a7SAnton Blanchard 16688bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 1669912f9ee2SAnton Blanchard 1670912f9ee2SAnton Blanchard if (ret < mm->brk) 1671912f9ee2SAnton Blanchard return mm->brk; 1672912f9ee2SAnton Blanchard 1673912f9ee2SAnton Blanchard return ret; 1674912f9ee2SAnton Blanchard } 1675501cb16dSAnton Blanchard 1676