12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 214cf11afSPaul Mackerras /* 314cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 414cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 514cf11afSPaul Mackerras * 614cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 714cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 814cf11afSPaul Mackerras * 914cf11afSPaul Mackerras * PowerPC version 1014cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1114cf11afSPaul Mackerras */ 1214cf11afSPaul Mackerras 1314cf11afSPaul Mackerras #include <linux/errno.h> 1414cf11afSPaul Mackerras #include <linux/sched.h> 15b17b0153SIngo Molnar #include <linux/sched/debug.h> 1629930025SIngo Molnar #include <linux/sched/task.h> 1768db0cf1SIngo Molnar #include <linux/sched/task_stack.h> 1814cf11afSPaul Mackerras #include <linux/kernel.h> 1914cf11afSPaul Mackerras #include <linux/mm.h> 2014cf11afSPaul Mackerras #include <linux/smp.h> 2114cf11afSPaul Mackerras #include <linux/stddef.h> 2214cf11afSPaul Mackerras #include <linux/unistd.h> 2314cf11afSPaul Mackerras #include <linux/ptrace.h> 2414cf11afSPaul Mackerras #include <linux/slab.h> 2514cf11afSPaul Mackerras #include <linux/user.h> 2614cf11afSPaul Mackerras #include <linux/elf.h> 2714cf11afSPaul Mackerras #include <linux/prctl.h> 2814cf11afSPaul Mackerras #include <linux/init_task.h> 294b16f8e2SPaul Gortmaker #include <linux/export.h> 3014cf11afSPaul Mackerras #include <linux/kallsyms.h> 3114cf11afSPaul Mackerras #include <linux/mqueue.h> 3214cf11afSPaul Mackerras #include <linux/hardirq.h> 3306d67d54SPaul Mackerras #include <linux/utsname.h> 346794c782SSteven Rostedt #include <linux/ftrace.h> 3579741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 36d839088cSAnton Blanchard #include <linux/personality.h> 37d839088cSAnton Blanchard #include <linux/random.h> 385aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 397b051f66SAnton Blanchard #include <linux/uaccess.h> 407f92bc56SDaniel Axtens #include <linux/elf-randomize.h> 4106bb53b3SRam Pai #include <linux/pkeys.h> 42fb2d9505SChristophe Leroy #include <linux/seq_buf.h> 4314cf11afSPaul Mackerras 4414cf11afSPaul Mackerras #include <asm/pgtable.h> 4514cf11afSPaul Mackerras #include <asm/io.h> 4614cf11afSPaul Mackerras #include <asm/processor.h> 4714cf11afSPaul Mackerras #include <asm/mmu.h> 4814cf11afSPaul Mackerras #include <asm/prom.h> 4976032de8SMichael Ellerman #include <asm/machdep.h> 50c6622f63SPaul Mackerras #include <asm/time.h> 51ae3a197eSDavid Howells #include <asm/runlatch.h> 52a7f31841SArnd Bergmann #include <asm/syscalls.h> 53ae3a197eSDavid Howells #include <asm/switch_to.h> 54fb09692eSMichael Neuling #include <asm/tm.h> 55ae3a197eSDavid Howells #include <asm/debug.h> 5606d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5706d67d54SPaul Mackerras #include <asm/firmware.h> 58c2e480baSMadhavan Srinivasan #include <asm/hw_irq.h> 5906d67d54SPaul Mackerras #endif 607cedd601SAnton Blanchard #include <asm/code-patching.h> 617f92bc56SDaniel Axtens #include <asm/exec.h> 625d31a96eSMichael Ellerman #include <asm/livepatch.h> 63b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 640545d543SDaniel Axtens #include <asm/asm-prototypes.h> 65c9386bfdSChristophe Leroy #include <asm/stacktrace.h> 66c1fe190cSMichael Neuling #include <asm/hw_breakpoint.h> 675d31a96eSMichael Ellerman 68d6a61bfcSLuis Machado #include <linux/kprobes.h> 69d6a61bfcSLuis Machado #include <linux/kdebug.h> 7014cf11afSPaul Mackerras 718b3c34cfSMichael Neuling /* Transactional Memory debug */ 728b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 738b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 748b3c34cfSMichael Neuling #else 758b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 768b3c34cfSMichael Neuling #endif 778b3c34cfSMichael Neuling 7814cf11afSPaul Mackerras extern unsigned long _get_SP(void); 7914cf11afSPaul Mackerras 80d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8154820530SMichael Ellerman /* 8254820530SMichael Ellerman * Are we running in "Suspend disabled" mode? If so we have to block any 8354820530SMichael Ellerman * sigreturn that would get us into suspended state, and we also warn in some 8454820530SMichael Ellerman * other paths that we should never reach with suspend disabled. 8554820530SMichael Ellerman */ 8654820530SMichael Ellerman bool tm_suspend_disabled __ro_after_init = false; 8754820530SMichael Ellerman 88b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 89d31626f7SPaul Mackerras { 90d31626f7SPaul Mackerras /* 91d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 92d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 93d31626f7SPaul Mackerras * bit so that we know to restore the registers before 94d31626f7SPaul Mackerras * returning to userspace. 95d31626f7SPaul Mackerras */ 96d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 97d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 98d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 99829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 100d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 101d31626f7SPaul Mackerras } 102d31626f7SPaul Mackerras } 103dc16b553SCyril Bur 104d31626f7SPaul Mackerras #else 105b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 106d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 107d31626f7SPaul Mackerras 1083eb5d588SAnton Blanchard bool strict_msr_control; 1093eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 1103eb5d588SAnton Blanchard 1113eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 1123eb5d588SAnton Blanchard { 1133eb5d588SAnton Blanchard strict_msr_control = true; 1143eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1153eb5d588SAnton Blanchard 1163eb5d588SAnton Blanchard return 0; 1173eb5d588SAnton Blanchard } 1183eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1193eb5d588SAnton Blanchard 120e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 121e2b36d59SNicholas Piggin unsigned long notrace msr_check_and_set(unsigned long bits) 122a0e72cf1SAnton Blanchard { 123a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 124a0e72cf1SAnton Blanchard unsigned long newmsr; 125a0e72cf1SAnton Blanchard 126a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 127a0e72cf1SAnton Blanchard 128a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 129a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 130a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 131a0e72cf1SAnton Blanchard #endif 132a0e72cf1SAnton Blanchard 133a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 134a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 1353cee070aSCyril Bur 1363cee070aSCyril Bur return newmsr; 137a0e72cf1SAnton Blanchard } 138d1c72112SSimon Guo EXPORT_SYMBOL_GPL(msr_check_and_set); 139a0e72cf1SAnton Blanchard 140e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 141e2b36d59SNicholas Piggin void notrace __msr_check_and_clear(unsigned long bits) 142a0e72cf1SAnton Blanchard { 143a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 144a0e72cf1SAnton Blanchard unsigned long newmsr; 145a0e72cf1SAnton Blanchard 146a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 147a0e72cf1SAnton Blanchard 148a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 149a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 150a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 151a0e72cf1SAnton Blanchard #endif 152a0e72cf1SAnton Blanchard 153a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 154a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 155a0e72cf1SAnton Blanchard } 1563eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 157a0e72cf1SAnton Blanchard 158037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1591cdf039bSMathieu Malaterre static void __giveup_fpu(struct task_struct *tsk) 1608792468dSCyril Bur { 1618eb98037SAnton Blanchard unsigned long msr; 1628eb98037SAnton Blanchard 1638792468dSCyril Bur save_fpu(tsk); 1648eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 165fe1ef6bcSMark Cave-Ayland msr &= ~(MSR_FP|MSR_FE0|MSR_FE1); 1668792468dSCyril Bur #ifdef CONFIG_VSX 1678792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1688eb98037SAnton Blanchard msr &= ~MSR_VSX; 1698792468dSCyril Bur #endif 1708eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 1718792468dSCyril Bur } 1728792468dSCyril Bur 17398da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 17498da581eSAnton Blanchard { 17598da581eSAnton Blanchard check_if_tm_restore_required(tsk); 17698da581eSAnton Blanchard 177a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 17898da581eSAnton Blanchard __giveup_fpu(tsk); 179a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 18098da581eSAnton Blanchard } 18198da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 18298da581eSAnton Blanchard 18314cf11afSPaul Mackerras /* 18414cf11afSPaul Mackerras * Make sure the floating-point register state in the 18514cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 18614cf11afSPaul Mackerras */ 18714cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 18814cf11afSPaul Mackerras { 18914cf11afSPaul Mackerras if (tsk->thread.regs) { 19014cf11afSPaul Mackerras /* 19114cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 19214cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 19314cf11afSPaul Mackerras * test but before we have finished saving the FP registers 19414cf11afSPaul Mackerras * to the thread_struct. That process could take over the 19514cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 19614cf11afSPaul Mackerras * bogus values for the remaining FP registers. 19714cf11afSPaul Mackerras */ 19814cf11afSPaul Mackerras preempt_disable(); 19914cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 20014cf11afSPaul Mackerras /* 20114cf11afSPaul Mackerras * This should only ever be called for current or 20214cf11afSPaul Mackerras * for a stopped child process. Since we save away 203af1bbc3dSAnton Blanchard * the FP register state on context switch, 20414cf11afSPaul Mackerras * there is something wrong if a stopped child appears 20514cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 20614cf11afSPaul Mackerras */ 20714cf11afSPaul Mackerras BUG_ON(tsk != current); 208b86fd2bdSAnton Blanchard giveup_fpu(tsk); 20914cf11afSPaul Mackerras } 21014cf11afSPaul Mackerras preempt_enable(); 21114cf11afSPaul Mackerras } 21214cf11afSPaul Mackerras } 213de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 21414cf11afSPaul Mackerras 21514cf11afSPaul Mackerras void enable_kernel_fp(void) 21614cf11afSPaul Mackerras { 217e909fb83SCyril Bur unsigned long cpumsr; 218e909fb83SCyril Bur 21914cf11afSPaul Mackerras WARN_ON(preemptible()); 22014cf11afSPaul Mackerras 221e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP); 222611b0e5cSAnton Blanchard 223d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 224d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 225e909fb83SCyril Bur /* 226e909fb83SCyril Bur * If a thread has already been reclaimed then the 227e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 228e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 229e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 230e909fb83SCyril Bur * checkpointed structure. 231e909fb83SCyril Bur */ 2325c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2335c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 234e909fb83SCyril Bur return; 235a0e72cf1SAnton Blanchard __giveup_fpu(current); 236b86fd2bdSAnton Blanchard } 237d64d02ceSAnton Blanchard } 23814cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 239d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 24014cf11afSPaul Mackerras 24114cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 2426f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2436f515d84SCyril Bur { 2448eb98037SAnton Blanchard unsigned long msr; 2458eb98037SAnton Blanchard 2466f515d84SCyril Bur save_altivec(tsk); 2478eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2488eb98037SAnton Blanchard msr &= ~MSR_VEC; 2496f515d84SCyril Bur #ifdef CONFIG_VSX 2506f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2518eb98037SAnton Blanchard msr &= ~MSR_VSX; 2526f515d84SCyril Bur #endif 2538eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 2546f515d84SCyril Bur } 2556f515d84SCyril Bur 25698da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 25798da581eSAnton Blanchard { 25898da581eSAnton Blanchard check_if_tm_restore_required(tsk); 25998da581eSAnton Blanchard 260a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 26198da581eSAnton Blanchard __giveup_altivec(tsk); 262a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 26398da581eSAnton Blanchard } 26498da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 26598da581eSAnton Blanchard 26614cf11afSPaul Mackerras void enable_kernel_altivec(void) 26714cf11afSPaul Mackerras { 268e909fb83SCyril Bur unsigned long cpumsr; 269e909fb83SCyril Bur 27014cf11afSPaul Mackerras WARN_ON(preemptible()); 27114cf11afSPaul Mackerras 272e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_VEC); 273611b0e5cSAnton Blanchard 274d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 275d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 276e909fb83SCyril Bur /* 277e909fb83SCyril Bur * If a thread has already been reclaimed then the 278e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 279e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 280e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 281e909fb83SCyril Bur * checkpointed structure. 282e909fb83SCyril Bur */ 2835c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2845c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 285e909fb83SCyril Bur return; 286a0e72cf1SAnton Blanchard __giveup_altivec(current); 287b86fd2bdSAnton Blanchard } 288d64d02ceSAnton Blanchard } 28914cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 29014cf11afSPaul Mackerras 29114cf11afSPaul Mackerras /* 29214cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 29314cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 29414cf11afSPaul Mackerras */ 29514cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 29614cf11afSPaul Mackerras { 29714cf11afSPaul Mackerras if (tsk->thread.regs) { 29814cf11afSPaul Mackerras preempt_disable(); 29914cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 30014cf11afSPaul Mackerras BUG_ON(tsk != current); 301b86fd2bdSAnton Blanchard giveup_altivec(tsk); 30214cf11afSPaul Mackerras } 30314cf11afSPaul Mackerras preempt_enable(); 30414cf11afSPaul Mackerras } 30514cf11afSPaul Mackerras } 306de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 30714cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 30814cf11afSPaul Mackerras 309ce48b210SMichael Neuling #ifdef CONFIG_VSX 310bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 311a7d623d4SAnton Blanchard { 312dc801081SBenjamin Herrenschmidt unsigned long msr = tsk->thread.regs->msr; 313dc801081SBenjamin Herrenschmidt 314dc801081SBenjamin Herrenschmidt /* 315dc801081SBenjamin Herrenschmidt * We should never be ssetting MSR_VSX without also setting 316dc801081SBenjamin Herrenschmidt * MSR_FP and MSR_VEC 317dc801081SBenjamin Herrenschmidt */ 318dc801081SBenjamin Herrenschmidt WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); 319dc801081SBenjamin Herrenschmidt 320dc801081SBenjamin Herrenschmidt /* __giveup_fpu will clear MSR_VSX */ 321dc801081SBenjamin Herrenschmidt if (msr & MSR_FP) 322a7d623d4SAnton Blanchard __giveup_fpu(tsk); 323dc801081SBenjamin Herrenschmidt if (msr & MSR_VEC) 324a7d623d4SAnton Blanchard __giveup_altivec(tsk); 325bf6a4d5bSCyril Bur } 326bf6a4d5bSCyril Bur 327bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 328bf6a4d5bSCyril Bur { 329bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 330bf6a4d5bSCyril Bur 331bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 332a7d623d4SAnton Blanchard __giveup_vsx(tsk); 333a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 334a7d623d4SAnton Blanchard } 335bf6a4d5bSCyril Bur 336ce48b210SMichael Neuling void enable_kernel_vsx(void) 337ce48b210SMichael Neuling { 338e909fb83SCyril Bur unsigned long cpumsr; 339e909fb83SCyril Bur 340ce48b210SMichael Neuling WARN_ON(preemptible()); 341ce48b210SMichael Neuling 342e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 343611b0e5cSAnton Blanchard 3445a69aec9SBenjamin Herrenschmidt if (current->thread.regs && 3455a69aec9SBenjamin Herrenschmidt (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { 346d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 347e909fb83SCyril Bur /* 348e909fb83SCyril Bur * If a thread has already been reclaimed then the 349e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 350e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 351e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 352e909fb83SCyril Bur * checkpointed structure. 353e909fb83SCyril Bur */ 3545c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 3555c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 356e909fb83SCyril Bur return; 357a0e72cf1SAnton Blanchard __giveup_vsx(current); 358611b0e5cSAnton Blanchard } 359ce48b210SMichael Neuling } 360ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 361ce48b210SMichael Neuling 362ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 363ce48b210SMichael Neuling { 364ce48b210SMichael Neuling if (tsk->thread.regs) { 365ce48b210SMichael Neuling preempt_disable(); 3665a69aec9SBenjamin Herrenschmidt if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { 367ce48b210SMichael Neuling BUG_ON(tsk != current); 368ce48b210SMichael Neuling giveup_vsx(tsk); 369ce48b210SMichael Neuling } 370ce48b210SMichael Neuling preempt_enable(); 371ce48b210SMichael Neuling } 372ce48b210SMichael Neuling } 373de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 374ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 375ce48b210SMichael Neuling 37614cf11afSPaul Mackerras #ifdef CONFIG_SPE 37798da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 37898da581eSAnton Blanchard { 37998da581eSAnton Blanchard check_if_tm_restore_required(tsk); 38098da581eSAnton Blanchard 381a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 38298da581eSAnton Blanchard __giveup_spe(tsk); 383a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 38498da581eSAnton Blanchard } 38598da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 38614cf11afSPaul Mackerras 38714cf11afSPaul Mackerras void enable_kernel_spe(void) 38814cf11afSPaul Mackerras { 38914cf11afSPaul Mackerras WARN_ON(preemptible()); 39014cf11afSPaul Mackerras 391a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 392611b0e5cSAnton Blanchard 393d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 394d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 395a0e72cf1SAnton Blanchard __giveup_spe(current); 39614cf11afSPaul Mackerras } 397d64d02ceSAnton Blanchard } 39814cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 39914cf11afSPaul Mackerras 40014cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 40114cf11afSPaul Mackerras { 40214cf11afSPaul Mackerras if (tsk->thread.regs) { 40314cf11afSPaul Mackerras preempt_disable(); 40414cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 40514cf11afSPaul Mackerras BUG_ON(tsk != current); 406685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 4070ee6c15eSKumar Gala giveup_spe(tsk); 40814cf11afSPaul Mackerras } 40914cf11afSPaul Mackerras preempt_enable(); 41014cf11afSPaul Mackerras } 41114cf11afSPaul Mackerras } 41214cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 41314cf11afSPaul Mackerras 414c2085059SAnton Blanchard static unsigned long msr_all_available; 415c2085059SAnton Blanchard 416c2085059SAnton Blanchard static int __init init_msr_all_available(void) 417c2085059SAnton Blanchard { 418c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 419c2085059SAnton Blanchard msr_all_available |= MSR_FP; 420c2085059SAnton Blanchard #endif 421c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 422c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 423c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 424c2085059SAnton Blanchard #endif 425c2085059SAnton Blanchard #ifdef CONFIG_VSX 426c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 427c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 428c2085059SAnton Blanchard #endif 429c2085059SAnton Blanchard #ifdef CONFIG_SPE 430c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 431c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 432c2085059SAnton Blanchard #endif 433c2085059SAnton Blanchard 434c2085059SAnton Blanchard return 0; 435c2085059SAnton Blanchard } 436c2085059SAnton Blanchard early_initcall(init_msr_all_available); 437c2085059SAnton Blanchard 438c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 439c2085059SAnton Blanchard { 440c2085059SAnton Blanchard unsigned long usermsr; 441c2085059SAnton Blanchard 442c2085059SAnton Blanchard if (!tsk->thread.regs) 443c2085059SAnton Blanchard return; 444c2085059SAnton Blanchard 4458205d5d9SGustavo Romero check_if_tm_restore_required(tsk); 4468205d5d9SGustavo Romero 447c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 448c2085059SAnton Blanchard 449c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 450c2085059SAnton Blanchard return; 451c2085059SAnton Blanchard 452c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 453c2085059SAnton Blanchard 45496c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 45596c79b6bSBenjamin Herrenschmidt 456c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 457c2085059SAnton Blanchard if (usermsr & MSR_FP) 458c2085059SAnton Blanchard __giveup_fpu(tsk); 459c2085059SAnton Blanchard #endif 460c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 461c2085059SAnton Blanchard if (usermsr & MSR_VEC) 462c2085059SAnton Blanchard __giveup_altivec(tsk); 463c2085059SAnton Blanchard #endif 464c2085059SAnton Blanchard #ifdef CONFIG_SPE 465c2085059SAnton Blanchard if (usermsr & MSR_SPE) 466c2085059SAnton Blanchard __giveup_spe(tsk); 467c2085059SAnton Blanchard #endif 468c2085059SAnton Blanchard 469c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 470c2085059SAnton Blanchard } 471c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 472c2085059SAnton Blanchard 4736cc0c16dSNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 4746cc0c16dSNicholas Piggin #ifdef CONFIG_PPC_FPU 4756cc0c16dSNicholas Piggin static int restore_fp(struct task_struct *tsk) 4766cc0c16dSNicholas Piggin { 4776cc0c16dSNicholas Piggin if (tsk->thread.load_fp) { 4786cc0c16dSNicholas Piggin load_fp_state(¤t->thread.fp_state); 4796cc0c16dSNicholas Piggin current->thread.load_fp++; 4806cc0c16dSNicholas Piggin return 1; 4816cc0c16dSNicholas Piggin } 4826cc0c16dSNicholas Piggin return 0; 4836cc0c16dSNicholas Piggin } 4846cc0c16dSNicholas Piggin #else 4856cc0c16dSNicholas Piggin static int restore_fp(struct task_struct *tsk) { return 0; } 4866cc0c16dSNicholas Piggin #endif /* CONFIG_PPC_FPU */ 4876cc0c16dSNicholas Piggin 4886cc0c16dSNicholas Piggin #ifdef CONFIG_ALTIVEC 4896cc0c16dSNicholas Piggin #define loadvec(thr) ((thr).load_vec) 4906cc0c16dSNicholas Piggin static int restore_altivec(struct task_struct *tsk) 4916cc0c16dSNicholas Piggin { 4926cc0c16dSNicholas Piggin if (cpu_has_feature(CPU_FTR_ALTIVEC) && (tsk->thread.load_vec)) { 4936cc0c16dSNicholas Piggin load_vr_state(&tsk->thread.vr_state); 4946cc0c16dSNicholas Piggin tsk->thread.used_vr = 1; 4956cc0c16dSNicholas Piggin tsk->thread.load_vec++; 4966cc0c16dSNicholas Piggin 4976cc0c16dSNicholas Piggin return 1; 4986cc0c16dSNicholas Piggin } 4996cc0c16dSNicholas Piggin return 0; 5006cc0c16dSNicholas Piggin } 5016cc0c16dSNicholas Piggin #else 5026cc0c16dSNicholas Piggin #define loadvec(thr) 0 5036cc0c16dSNicholas Piggin static inline int restore_altivec(struct task_struct *tsk) { return 0; } 5046cc0c16dSNicholas Piggin #endif /* CONFIG_ALTIVEC */ 5056cc0c16dSNicholas Piggin 5066cc0c16dSNicholas Piggin #ifdef CONFIG_VSX 5076cc0c16dSNicholas Piggin static int restore_vsx(struct task_struct *tsk) 5086cc0c16dSNicholas Piggin { 5096cc0c16dSNicholas Piggin if (cpu_has_feature(CPU_FTR_VSX)) { 5106cc0c16dSNicholas Piggin tsk->thread.used_vsr = 1; 5116cc0c16dSNicholas Piggin return 1; 5126cc0c16dSNicholas Piggin } 5136cc0c16dSNicholas Piggin 5146cc0c16dSNicholas Piggin return 0; 5156cc0c16dSNicholas Piggin } 5166cc0c16dSNicholas Piggin #else 5176cc0c16dSNicholas Piggin static inline int restore_vsx(struct task_struct *tsk) { return 0; } 5186cc0c16dSNicholas Piggin #endif /* CONFIG_VSX */ 5196cc0c16dSNicholas Piggin 520e2b36d59SNicholas Piggin /* 521e2b36d59SNicholas Piggin * The exception exit path calls restore_math() with interrupts hard disabled 522e2b36d59SNicholas Piggin * but the soft irq state not "reconciled". ftrace code that calls 523e2b36d59SNicholas Piggin * local_irq_save/restore causes warnings. 524e2b36d59SNicholas Piggin * 525e2b36d59SNicholas Piggin * Rather than complicate the exit path, just don't trace restore_math. This 526e2b36d59SNicholas Piggin * could be done by having ftrace entry code check for this un-reconciled 527e2b36d59SNicholas Piggin * condition where MSR[EE]=0 and PACA_IRQ_HARD_DIS is not set, and 528e2b36d59SNicholas Piggin * temporarily fix it up for the duration of the ftrace call. 529e2b36d59SNicholas Piggin */ 530e2b36d59SNicholas Piggin void notrace restore_math(struct pt_regs *regs) 53170fe3d98SCyril Bur { 53270fe3d98SCyril Bur unsigned long msr; 53370fe3d98SCyril Bur 5345c784c84SBreno Leitao if (!MSR_TM_ACTIVE(regs->msr) && 535dc16b553SCyril Bur !current->thread.load_fp && !loadvec(current->thread)) 53670fe3d98SCyril Bur return; 53770fe3d98SCyril Bur 53870fe3d98SCyril Bur msr = regs->msr; 53970fe3d98SCyril Bur msr_check_and_set(msr_all_available); 54070fe3d98SCyril Bur 54170fe3d98SCyril Bur /* 54270fe3d98SCyril Bur * Only reload if the bit is not set in the user MSR, the bit BEING set 54370fe3d98SCyril Bur * indicates that the registers are hot 54470fe3d98SCyril Bur */ 54570fe3d98SCyril Bur if ((!(msr & MSR_FP)) && restore_fp(current)) 54670fe3d98SCyril Bur msr |= MSR_FP | current->thread.fpexc_mode; 54770fe3d98SCyril Bur 54870fe3d98SCyril Bur if ((!(msr & MSR_VEC)) && restore_altivec(current)) 54970fe3d98SCyril Bur msr |= MSR_VEC; 55070fe3d98SCyril Bur 55170fe3d98SCyril Bur if ((msr & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC) && 55270fe3d98SCyril Bur restore_vsx(current)) { 55370fe3d98SCyril Bur msr |= MSR_VSX; 55470fe3d98SCyril Bur } 55570fe3d98SCyril Bur 55670fe3d98SCyril Bur msr_check_and_clear(msr_all_available); 55770fe3d98SCyril Bur 55870fe3d98SCyril Bur regs->msr = msr; 55970fe3d98SCyril Bur } 5606cc0c16dSNicholas Piggin #endif 56170fe3d98SCyril Bur 5621cdf039bSMathieu Malaterre static void save_all(struct task_struct *tsk) 563de2a20aaSCyril Bur { 564de2a20aaSCyril Bur unsigned long usermsr; 565de2a20aaSCyril Bur 566de2a20aaSCyril Bur if (!tsk->thread.regs) 567de2a20aaSCyril Bur return; 568de2a20aaSCyril Bur 569de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 570de2a20aaSCyril Bur 571de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 572de2a20aaSCyril Bur return; 573de2a20aaSCyril Bur 574de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 575de2a20aaSCyril Bur 57696c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 57796c79b6bSBenjamin Herrenschmidt 578de2a20aaSCyril Bur if (usermsr & MSR_FP) 5798792468dSCyril Bur save_fpu(tsk); 580de2a20aaSCyril Bur 581de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5826f515d84SCyril Bur save_altivec(tsk); 583de2a20aaSCyril Bur 584de2a20aaSCyril Bur if (usermsr & MSR_SPE) 585de2a20aaSCyril Bur __giveup_spe(tsk); 586de2a20aaSCyril Bur 587de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 588c76662e8SRam Pai thread_pkey_regs_save(&tsk->thread); 589de2a20aaSCyril Bur } 590de2a20aaSCyril Bur 591579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 592579e633eSAnton Blanchard { 593579e633eSAnton Blanchard if (tsk->thread.regs) { 594579e633eSAnton Blanchard preempt_disable(); 595579e633eSAnton Blanchard BUG_ON(tsk != current); 596579e633eSAnton Blanchard #ifdef CONFIG_SPE 597579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 598579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 599579e633eSAnton Blanchard #endif 600e9013785SFelipe Rechia save_all(tsk); 601579e633eSAnton Blanchard 602579e633eSAnton Blanchard preempt_enable(); 603579e633eSAnton Blanchard } 604579e633eSAnton Blanchard } 605579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 606579e633eSAnton Blanchard 6073bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6083bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 60947355040SEric W. Biederman unsigned long error_code, int breakpt) 6103bffb652SDave Kleikamp { 61147355040SEric W. Biederman current->thread.trap_nr = TRAP_HWBKPT; 6123bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 6133bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 6143bffb652SDave Kleikamp return; 6153bffb652SDave Kleikamp 6163bffb652SDave Kleikamp /* Deliver the signal to userspace */ 617f71dd7dcSEric W. Biederman force_sig_ptrace_errno_trap(breakpt, /* breakpoint or watchpoint id */ 618f71dd7dcSEric W. Biederman (void __user *)address); 6193bffb652SDave Kleikamp } 6203bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 6219422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 622d6a61bfcSLuis Machado unsigned long error_code) 623d6a61bfcSLuis Machado { 62441ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 625d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 626d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 627d6a61bfcSLuis Machado return; 628d6a61bfcSLuis Machado 6299422de3eSMichael Neuling if (debugger_break_match(regs)) 630d6a61bfcSLuis Machado return; 631d6a61bfcSLuis Machado 6329422de3eSMichael Neuling /* Clear the breakpoint */ 6339422de3eSMichael Neuling hw_breakpoint_disable(); 634d6a61bfcSLuis Machado 635d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 6362e1661d2SEric W. Biederman force_sig_fault(SIGTRAP, TRAP_HWBKPT, (void __user *)address); 637d6a61bfcSLuis Machado } 6383bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 639d6a61bfcSLuis Machado 640*4a8a9379SRavi Bangoria static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk[HBP_NUM_MAX]); 641a2ceff5eSMichael Ellerman 6423bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6433bffb652SDave Kleikamp /* 6443bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 6453bffb652SDave Kleikamp */ 6463bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6473bffb652SDave Kleikamp { 64851ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 6493bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 65051ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 6513bffb652SDave Kleikamp #endif 65251ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 6533bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 65451ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 6553bffb652SDave Kleikamp #endif 65651ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 6573bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 6583bffb652SDave Kleikamp /* 6593bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 6603bffb652SDave Kleikamp */ 66151ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 6623bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 6633bffb652SDave Kleikamp /* 6643bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 6653bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 6663bffb652SDave Kleikamp */ 66751ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 6683bffb652SDave Kleikamp #else 66951ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 6703bffb652SDave Kleikamp #endif 6713bffb652SDave Kleikamp } 6723bffb652SDave Kleikamp 673f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 6743bffb652SDave Kleikamp { 6756cecf76bSScott Wood /* 6766cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 6776cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 6786cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 6796cecf76bSScott Wood */ 6806cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 6816cecf76bSScott Wood 682f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 683f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 6843bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 685f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 686f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 6873bffb652SDave Kleikamp #endif 688f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 689f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 6903bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 691f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 692f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 6933bffb652SDave Kleikamp #endif 694f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 695f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 6963bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 697f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 6983bffb652SDave Kleikamp #endif 6993bffb652SDave Kleikamp } 7003bffb652SDave Kleikamp /* 7013bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 7023bffb652SDave Kleikamp * debug registers, set the debug registers from the values 7033bffb652SDave Kleikamp * stored in the new thread. 7043bffb652SDave Kleikamp */ 705f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 7063bffb652SDave Kleikamp { 70751ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 708f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 709f5f97210SScott Wood prime_debug_regs(new_debug); 7103bffb652SDave Kleikamp } 7113743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 7123bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 713e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 714b5ac51d7SChristophe Leroy static void set_breakpoint(struct arch_hw_breakpoint *brk) 715b5ac51d7SChristophe Leroy { 716b5ac51d7SChristophe Leroy preempt_disable(); 717*4a8a9379SRavi Bangoria __set_breakpoint(0, brk); 718b5ac51d7SChristophe Leroy preempt_enable(); 719b5ac51d7SChristophe Leroy } 720b5ac51d7SChristophe Leroy 7213bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 7223bffb652SDave Kleikamp { 7239422de3eSMichael Neuling thread->hw_brk.address = 0; 7249422de3eSMichael Neuling thread->hw_brk.type = 0; 725b57aeab8SRavi Bangoria thread->hw_brk.len = 0; 726b57aeab8SRavi Bangoria thread->hw_brk.hw_len = 0; 727252988cbSNicholas Piggin if (ppc_breakpoint_available()) 728b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 7293bffb652SDave Kleikamp } 730e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 7313bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 7323bffb652SDave Kleikamp 733172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 7349422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7359422de3eSMichael Neuling { 736c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 737221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 738221c185dSDave Kleikamp isync(); 739221c185dSDave Kleikamp #endif 7409422de3eSMichael Neuling return 0; 7419422de3eSMichael Neuling } 742c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 7439422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7449422de3eSMichael Neuling { 745cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 74682a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 7474474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 748cab0af98SMichael Ellerman return 0; 74914cf11afSPaul Mackerras } 7509422de3eSMichael Neuling #else 7519422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7529422de3eSMichael Neuling { 7539422de3eSMichael Neuling return -EINVAL; 7549422de3eSMichael Neuling } 7559422de3eSMichael Neuling #endif 7569422de3eSMichael Neuling 7579422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 7589422de3eSMichael Neuling { 7599422de3eSMichael Neuling unsigned long dabr, dabrx; 7609422de3eSMichael Neuling 7619422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 7629422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 7639422de3eSMichael Neuling 7649422de3eSMichael Neuling if (ppc_md.set_dabr) 7659422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 7669422de3eSMichael Neuling 7679422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 7689422de3eSMichael Neuling } 7699422de3eSMichael Neuling 77039413ae0SChristophe Leroy static inline int set_breakpoint_8xx(struct arch_hw_breakpoint *brk) 77139413ae0SChristophe Leroy { 77239413ae0SChristophe Leroy unsigned long lctrl1 = LCTRL1_CTE_GT | LCTRL1_CTF_LT | LCTRL1_CRWE_RW | 77339413ae0SChristophe Leroy LCTRL1_CRWF_RW; 77439413ae0SChristophe Leroy unsigned long lctrl2 = LCTRL2_LW0EN | LCTRL2_LW0LADC | LCTRL2_SLW0EN; 77539413ae0SChristophe Leroy unsigned long start_addr = brk->address & ~HW_BREAKPOINT_ALIGN; 77639413ae0SChristophe Leroy unsigned long end_addr = (brk->address + brk->len - 1) | HW_BREAKPOINT_ALIGN; 77739413ae0SChristophe Leroy 77839413ae0SChristophe Leroy if (start_addr == 0) 77939413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_F; 78039413ae0SChristophe Leroy else if (end_addr == ~0U) 78139413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_E; 78239413ae0SChristophe Leroy else 78339413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_EandF; 78439413ae0SChristophe Leroy 78539413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, 0); 78639413ae0SChristophe Leroy 78739413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == 0) 78839413ae0SChristophe Leroy return 0; 78939413ae0SChristophe Leroy 79039413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_READ) 79139413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_RO | LCTRL1_CRWF_RO; 79239413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_WRITE) 79339413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_WO | LCTRL1_CRWF_WO; 79439413ae0SChristophe Leroy 79539413ae0SChristophe Leroy mtspr(SPRN_CMPE, start_addr - 1); 79639413ae0SChristophe Leroy mtspr(SPRN_CMPF, end_addr + 1); 79739413ae0SChristophe Leroy mtspr(SPRN_LCTRL1, lctrl1); 79839413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, lctrl2); 79939413ae0SChristophe Leroy 80039413ae0SChristophe Leroy return 0; 80139413ae0SChristophe Leroy } 80239413ae0SChristophe Leroy 803*4a8a9379SRavi Bangoria void __set_breakpoint(int nr, struct arch_hw_breakpoint *brk) 8049422de3eSMichael Neuling { 805*4a8a9379SRavi Bangoria memcpy(this_cpu_ptr(¤t_brk[nr]), brk, sizeof(*brk)); 8069422de3eSMichael Neuling 807c1fe190cSMichael Neuling if (dawr_enabled()) 808252988cbSNicholas Piggin // Power8 or later 809*4a8a9379SRavi Bangoria set_dawr(nr, brk); 81039413ae0SChristophe Leroy else if (IS_ENABLED(CONFIG_PPC_8xx)) 81139413ae0SChristophe Leroy set_breakpoint_8xx(brk); 812252988cbSNicholas Piggin else if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 813252988cbSNicholas Piggin // Power7 or earlier 81404c32a51SPaul Gortmaker set_dabr(brk); 815252988cbSNicholas Piggin else 816252988cbSNicholas Piggin // Shouldn't happen due to higher level checks 817252988cbSNicholas Piggin WARN_ON_ONCE(1); 8189422de3eSMichael Neuling } 81914cf11afSPaul Mackerras 820404b27d6SMichael Neuling /* Check if we have DAWR or DABR hardware */ 821404b27d6SMichael Neuling bool ppc_breakpoint_available(void) 822404b27d6SMichael Neuling { 823c1fe190cSMichael Neuling if (dawr_enabled()) 824c1fe190cSMichael Neuling return true; /* POWER8 DAWR or POWER9 forced DAWR */ 825404b27d6SMichael Neuling if (cpu_has_feature(CPU_FTR_ARCH_207S)) 826404b27d6SMichael Neuling return false; /* POWER9 with DAWR disabled */ 827404b27d6SMichael Neuling /* DABR: Everything but POWER8 and POWER9 */ 828404b27d6SMichael Neuling return true; 829404b27d6SMichael Neuling } 830404b27d6SMichael Neuling EXPORT_SYMBOL_GPL(ppc_breakpoint_available); 831404b27d6SMichael Neuling 8329422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 8339422de3eSMichael Neuling struct arch_hw_breakpoint *b) 8349422de3eSMichael Neuling { 8359422de3eSMichael Neuling if (a->address != b->address) 8369422de3eSMichael Neuling return false; 8379422de3eSMichael Neuling if (a->type != b->type) 8389422de3eSMichael Neuling return false; 8399422de3eSMichael Neuling if (a->len != b->len) 8409422de3eSMichael Neuling return false; 841b57aeab8SRavi Bangoria /* no need to check hw_len. it's calculated from address and len */ 8429422de3eSMichael Neuling return true; 8439422de3eSMichael Neuling } 844d31626f7SPaul Mackerras 845fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8465d176f75SCyril Bur 8475d176f75SCyril Bur static inline bool tm_enabled(struct task_struct *tsk) 8485d176f75SCyril Bur { 8495d176f75SCyril Bur return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); 8505d176f75SCyril Bur } 8515d176f75SCyril Bur 852edd00b83SCyril Bur static void tm_reclaim_thread(struct thread_struct *thr, uint8_t cause) 853d31626f7SPaul Mackerras { 8547f821fc9SMichael Neuling /* 8557f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 8567f821fc9SMichael Neuling * checkpointed state outstanding. 8577f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 8587f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 8597f821fc9SMichael Neuling * This will then directly return to userspace without going 8607f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 8617f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 8627f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 8637f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 8647f821fc9SMichael Neuling * this state. 8657f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 8667f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 867027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 8687f821fc9SMichael Neuling */ 8697f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 8707f821fc9SMichael Neuling return; 8717f821fc9SMichael Neuling 87291381b9cSCyril Bur giveup_all(container_of(thr, struct task_struct, thread)); 87391381b9cSCyril Bur 874eb5c3f1cSCyril Bur tm_reclaim(thr, cause); 875eb5c3f1cSCyril Bur 876f48e91e8SMichael Neuling /* 877f48e91e8SMichael Neuling * If we are in a transaction and FP is off then we can't have 878f48e91e8SMichael Neuling * used FP inside that transaction. Hence the checkpointed 879f48e91e8SMichael Neuling * state is the same as the live state. We need to copy the 880f48e91e8SMichael Neuling * live state to the checkpointed state so that when the 881f48e91e8SMichael Neuling * transaction is restored, the checkpointed state is correct 882f48e91e8SMichael Neuling * and the aborted transaction sees the correct state. We use 883f48e91e8SMichael Neuling * ckpt_regs.msr here as that's what tm_reclaim will use to 884f48e91e8SMichael Neuling * determine if it's going to write the checkpointed state or 885f48e91e8SMichael Neuling * not. So either this will write the checkpointed registers, 886f48e91e8SMichael Neuling * or reclaim will. Similarly for VMX. 887f48e91e8SMichael Neuling */ 888f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_FP) == 0) 889f48e91e8SMichael Neuling memcpy(&thr->ckfp_state, &thr->fp_state, 890f48e91e8SMichael Neuling sizeof(struct thread_fp_state)); 891f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_VEC) == 0) 892f48e91e8SMichael Neuling memcpy(&thr->ckvr_state, &thr->vr_state, 893f48e91e8SMichael Neuling sizeof(struct thread_vr_state)); 894d31626f7SPaul Mackerras } 895d31626f7SPaul Mackerras 896d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 897d31626f7SPaul Mackerras { 898d31626f7SPaul Mackerras tm_enable(); 899edd00b83SCyril Bur tm_reclaim_thread(¤t->thread, cause); 900d31626f7SPaul Mackerras } 901d31626f7SPaul Mackerras 902fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 903fb09692eSMichael Neuling { 904fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 905fb09692eSMichael Neuling * middle of a transaction. 906fb09692eSMichael Neuling * 907fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 908fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 909000ec280SCyril Bur * checkpointed (tbegin) state in ckpt_regs, ckfp_state and 910000ec280SCyril Bur * ckvr_state 911fb09692eSMichael Neuling * 912fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 913fb09692eSMichael Neuling */ 914fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 915fb09692eSMichael Neuling 916fb09692eSMichael Neuling if (!thr->regs) 917fb09692eSMichael Neuling return; 918fb09692eSMichael Neuling 919fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 920fb09692eSMichael Neuling goto out_and_saveregs; 921fb09692eSMichael Neuling 92292fb8690SMichael Neuling WARN_ON(tm_suspend_disabled); 92392fb8690SMichael Neuling 924fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 925fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 926fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 927fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 928fb09692eSMichael Neuling thr->regs->trap); 929fb09692eSMichael Neuling 930edd00b83SCyril Bur tm_reclaim_thread(thr, TM_CAUSE_RESCHED); 931fb09692eSMichael Neuling 932fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 933fb09692eSMichael Neuling tsk->pid); 934fb09692eSMichael Neuling 935fb09692eSMichael Neuling out_and_saveregs: 936fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 937fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 938fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 939fb09692eSMichael Neuling * cannot happen later in _switch(). 940fb09692eSMichael Neuling */ 941fb09692eSMichael Neuling tm_save_sprs(thr); 942fb09692eSMichael Neuling } 943fb09692eSMichael Neuling 944eb5c3f1cSCyril Bur extern void __tm_recheckpoint(struct thread_struct *thread); 945e6b8fd02SMichael Neuling 946eb5c3f1cSCyril Bur void tm_recheckpoint(struct thread_struct *thread) 947e6b8fd02SMichael Neuling { 948e6b8fd02SMichael Neuling unsigned long flags; 949e6b8fd02SMichael Neuling 9505d176f75SCyril Bur if (!(thread->regs->msr & MSR_TM)) 9515d176f75SCyril Bur return; 9525d176f75SCyril Bur 953e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 954e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 955e6b8fd02SMichael Neuling * So let's hard disable over this region. 956e6b8fd02SMichael Neuling */ 957e6b8fd02SMichael Neuling local_irq_save(flags); 958e6b8fd02SMichael Neuling hard_irq_disable(); 959e6b8fd02SMichael Neuling 960e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 961e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 962e6b8fd02SMichael Neuling */ 963e6b8fd02SMichael Neuling tm_restore_sprs(thread); 964e6b8fd02SMichael Neuling 965eb5c3f1cSCyril Bur __tm_recheckpoint(thread); 966e6b8fd02SMichael Neuling 967e6b8fd02SMichael Neuling local_irq_restore(flags); 968e6b8fd02SMichael Neuling } 969e6b8fd02SMichael Neuling 970bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 971fb09692eSMichael Neuling { 972fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 973fb09692eSMichael Neuling return; 974fb09692eSMichael Neuling 975fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 976fb09692eSMichael Neuling * 977fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 978fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 979fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 980dc310669SCyril Bur * unavailable later, we are unable to determine which set of FP regs 981fb09692eSMichael Neuling * need to be restored. 982fb09692eSMichael Neuling */ 9835d176f75SCyril Bur if (!tm_enabled(new)) 984fb09692eSMichael Neuling return; 985fb09692eSMichael Neuling 986e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 987fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 988fb09692eSMichael Neuling return; 989e6b8fd02SMichael Neuling } 990fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 991eb5c3f1cSCyril Bur TM_DEBUG("*** tm_recheckpoint of pid %d (new->msr 0x%lx)\n", 992eb5c3f1cSCyril Bur new->pid, new->thread.regs->msr); 993fb09692eSMichael Neuling 994eb5c3f1cSCyril Bur tm_recheckpoint(&new->thread); 995fb09692eSMichael Neuling 996dc310669SCyril Bur /* 997dc310669SCyril Bur * The checkpointed state has been restored but the live state has 998dc310669SCyril Bur * not, ensure all the math functionality is turned off to trigger 999dc310669SCyril Bur * restore_math() to reload. 1000dc310669SCyril Bur */ 1001dc310669SCyril Bur new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); 1002fb09692eSMichael Neuling 1003fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 1004fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 1005fb09692eSMichael Neuling new->pid, mfmsr()); 1006fb09692eSMichael Neuling } 1007fb09692eSMichael Neuling 1008dc310669SCyril Bur static inline void __switch_to_tm(struct task_struct *prev, 1009dc310669SCyril Bur struct task_struct *new) 1010fb09692eSMichael Neuling { 1011fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 10125d176f75SCyril Bur if (tm_enabled(prev) || tm_enabled(new)) 1013fb09692eSMichael Neuling tm_enable(); 10145d176f75SCyril Bur 10155d176f75SCyril Bur if (tm_enabled(prev)) { 10165d176f75SCyril Bur prev->thread.load_tm++; 1017fb09692eSMichael Neuling tm_reclaim_task(prev); 10185d176f75SCyril Bur if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) 10195d176f75SCyril Bur prev->thread.regs->msr &= ~MSR_TM; 10205d176f75SCyril Bur } 10215d176f75SCyril Bur 1022dc310669SCyril Bur tm_recheckpoint_new_task(new); 1023fb09692eSMichael Neuling } 1024fb09692eSMichael Neuling } 1025d31626f7SPaul Mackerras 1026d31626f7SPaul Mackerras /* 1027d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 1028d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 1029d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 1030d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 1031d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 1032d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 1033d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 1034d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 1035d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 1036d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 1037d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 1038d31626f7SPaul Mackerras * state to use. 1039d31626f7SPaul Mackerras */ 1040d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 1041d31626f7SPaul Mackerras { 1042d31626f7SPaul Mackerras unsigned long msr_diff; 1043d31626f7SPaul Mackerras 1044dc310669SCyril Bur /* 1045dc310669SCyril Bur * This is the only moment we should clear TIF_RESTORE_TM as 1046dc310669SCyril Bur * it is here that ckpt_regs.msr and pt_regs.msr become the same 1047dc310669SCyril Bur * again, anything else could lead to an incorrect ckpt_msr being 1048dc310669SCyril Bur * saved and therefore incorrect signal contexts. 1049dc310669SCyril Bur */ 1050d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 1051d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 1052d31626f7SPaul Mackerras return; 1053d31626f7SPaul Mackerras 1054829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 1055d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 105670fe3d98SCyril Bur 1057dc16b553SCyril Bur /* Ensure that restore_math() will restore */ 1058dc16b553SCyril Bur if (msr_diff & MSR_FP) 1059dc16b553SCyril Bur current->thread.load_fp = 1; 106039715bf9SValentin Rothberg #ifdef CONFIG_ALTIVEC 1061dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC) 1062dc16b553SCyril Bur current->thread.load_vec = 1; 1063dc16b553SCyril Bur #endif 106470fe3d98SCyril Bur restore_math(regs); 106570fe3d98SCyril Bur 1066d31626f7SPaul Mackerras regs->msr |= msr_diff; 1067d31626f7SPaul Mackerras } 1068d31626f7SPaul Mackerras 1069fb09692eSMichael Neuling #else 1070fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 1071dc310669SCyril Bur #define __switch_to_tm(prev, new) 1072fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 10739422de3eSMichael Neuling 1074152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 1075152d523eSAnton Blanchard { 1076152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 107701d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1078152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1079152d523eSAnton Blanchard #endif 1080152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1081152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1082152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1083152d523eSAnton Blanchard 1084152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1085152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1086152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1087152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1088152d523eSAnton Blanchard 1089152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1090152d523eSAnton Blanchard 1091152d523eSAnton Blanchard /* 1092152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1093152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1094152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1095152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1096152d523eSAnton Blanchard */ 1097152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1098152d523eSAnton Blanchard } 1099152d523eSAnton Blanchard #endif 110006bb53b3SRam Pai 110106bb53b3SRam Pai thread_pkey_regs_save(t); 1102152d523eSAnton Blanchard } 1103152d523eSAnton Blanchard 1104152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1105152d523eSAnton Blanchard struct thread_struct *new_thread) 1106152d523eSAnton Blanchard { 1107152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1108152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1109152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1110152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1111152d523eSAnton Blanchard #endif 1112152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1113152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1114152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1115b57bd2deSMichael Neuling if (new_thread->dscr_inherit) 1116152d523eSAnton Blanchard dscr = new_thread->dscr; 1117152d523eSAnton Blanchard 1118152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1119152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1120152d523eSAnton Blanchard } 1121152d523eSAnton Blanchard 1122152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1123152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1124152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1125152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1126152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1127152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1128152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1129152d523eSAnton Blanchard 1130b57bd2deSMichael Neuling if (old_thread->fscr != new_thread->fscr) 1131b57bd2deSMichael Neuling mtspr(SPRN_FSCR, new_thread->fscr); 1132b57bd2deSMichael Neuling 1133152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1134152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1135152d523eSAnton Blanchard } 1136ec233edeSSukadev Bhattiprolu 11373449f191SAlastair D'Silva if (cpu_has_feature(CPU_FTR_P9_TIDR) && 1138ec233edeSSukadev Bhattiprolu old_thread->tidr != new_thread->tidr) 1139ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, new_thread->tidr); 1140152d523eSAnton Blanchard #endif 114106bb53b3SRam Pai 114206bb53b3SRam Pai thread_pkey_regs_restore(new_thread, old_thread); 1143152d523eSAnton Blanchard } 1144152d523eSAnton Blanchard 114514cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 114614cf11afSPaul Mackerras struct task_struct *new) 114714cf11afSPaul Mackerras { 114814cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 114914cf11afSPaul Mackerras struct task_struct *last; 1150d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 1151d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1152d6bf29b4SPeter Zijlstra #endif 115314cf11afSPaul Mackerras 1154152d523eSAnton Blanchard new_thread = &new->thread; 1155152d523eSAnton Blanchard old_thread = ¤t->thread; 1156152d523eSAnton Blanchard 11577ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 11587ba5fef7SMichael Neuling 11594e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 116069111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1161d6bf29b4SPeter Zijlstra if (batch->active) { 1162d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1163d6bf29b4SPeter Zijlstra if (batch->index) 1164d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1165d6bf29b4SPeter Zijlstra batch->active = 0; 1166d6bf29b4SPeter Zijlstra } 11674e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 116806d67d54SPaul Mackerras 1169f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1170f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1171f3d885ccSAnton Blanchard #else 1172f3d885ccSAnton Blanchard /* 1173f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1174f3d885ccSAnton Blanchard * schedule DABR 1175f3d885ccSAnton Blanchard */ 1176f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1177*4a8a9379SRavi Bangoria if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk[0]), &new->thread.hw_brk))) 1178*4a8a9379SRavi Bangoria __set_breakpoint(0, &new->thread.hw_brk); 1179f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1180f3d885ccSAnton Blanchard #endif 1181f3d885ccSAnton Blanchard 1182f3d885ccSAnton Blanchard /* 1183f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1184f3d885ccSAnton Blanchard * change a number of them. 1185f3d885ccSAnton Blanchard */ 1186f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1187f3d885ccSAnton Blanchard 1188f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1189f3d885ccSAnton Blanchard giveup_all(prev); 1190f3d885ccSAnton Blanchard 1191dc310669SCyril Bur __switch_to_tm(prev, new); 1192dc310669SCyril Bur 1193e4c0fc5fSNicholas Piggin if (!radix_enabled()) { 119444387e9fSAnton Blanchard /* 1195e4c0fc5fSNicholas Piggin * We can't take a PMU exception inside _switch() since there 1196e4c0fc5fSNicholas Piggin * is a window where the kernel stack SLB and the kernel stack 1197e4c0fc5fSNicholas Piggin * are out of sync. Hard disable here. 119844387e9fSAnton Blanchard */ 119944387e9fSAnton Blanchard hard_irq_disable(); 1200e4c0fc5fSNicholas Piggin } 1201bc2a9408SMichael Neuling 120220dbe670SAnton Blanchard /* 120320dbe670SAnton Blanchard * Call restore_sprs() before calling _switch(). If we move it after 120420dbe670SAnton Blanchard * _switch() then we miss out on calling it for new tasks. The reason 120520dbe670SAnton Blanchard * for this is we manually create a stack frame for new tasks that 120620dbe670SAnton Blanchard * directly returns through ret_from_fork() or 120720dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 120820dbe670SAnton Blanchard */ 1209f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1210f3d885ccSAnton Blanchard 121120dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 121220dbe670SAnton Blanchard 12134e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1214d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1215d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 121669111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1217d6bf29b4SPeter Zijlstra batch->active = 1; 1218d6bf29b4SPeter Zijlstra } 121970fe3d98SCyril Bur 122005b98791SChristophe Leroy if (current->thread.regs) { 122105b98791SChristophe Leroy restore_math(current->thread.regs); 122207d2a628SNicholas Piggin 122307d2a628SNicholas Piggin /* 122407d2a628SNicholas Piggin * The copy-paste buffer can only store into foreign real 122507d2a628SNicholas Piggin * addresses, so unprivileged processes can not see the 122607d2a628SNicholas Piggin * data or use it in any way unless they have foreign real 12279d2a4d71SSukadev Bhattiprolu * mappings. If the new process has the foreign real address 12289d2a4d71SSukadev Bhattiprolu * mappings, we must issue a cp_abort to clear any state and 12299d2a4d71SSukadev Bhattiprolu * prevent snooping, corruption or a covert channel. 123007d2a628SNicholas Piggin */ 1231c420644cSHaren Myneni if (current->mm && 1232c420644cSHaren Myneni atomic_read(¤t->mm->context.vas_windows)) 12339d2a4d71SSukadev Bhattiprolu asm volatile(PPC_CP_ABORT); 123407d2a628SNicholas Piggin } 12354e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 1236d6bf29b4SPeter Zijlstra 123714cf11afSPaul Mackerras return last; 123814cf11afSPaul Mackerras } 123914cf11afSPaul Mackerras 1240df13102fSChristophe Leroy #define NR_INSN_TO_PRINT 16 124106d67d54SPaul Mackerras 124206d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 124306d67d54SPaul Mackerras { 124406d67d54SPaul Mackerras int i; 1245df13102fSChristophe Leroy unsigned long pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 124606d67d54SPaul Mackerras 124706d67d54SPaul Mackerras printk("Instruction dump:"); 124806d67d54SPaul Mackerras 1249df13102fSChristophe Leroy for (i = 0; i < NR_INSN_TO_PRINT; i++) { 125006d67d54SPaul Mackerras int instr; 125106d67d54SPaul Mackerras 125206d67d54SPaul Mackerras if (!(i % 8)) 12532ffd04deSAndrew Donnellan pr_cont("\n"); 125406d67d54SPaul Mackerras 12550de2d820SScott Wood #if !defined(CONFIG_BOOKE) 12560de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 12570de2d820SScott Wood * than print XXXXXXXX. 12580de2d820SScott Wood */ 12590de2d820SScott Wood if (!(regs->msr & MSR_IR)) 12600de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 12610de2d820SScott Wood #endif 12620de2d820SScott Wood 126300ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 12643b35bd48SChristophe Leroy probe_kernel_address((const void *)pc, instr)) { 12652ffd04deSAndrew Donnellan pr_cont("XXXXXXXX "); 126606d67d54SPaul Mackerras } else { 126706d67d54SPaul Mackerras if (regs->nip == pc) 12682ffd04deSAndrew Donnellan pr_cont("<%08x> ", instr); 126906d67d54SPaul Mackerras else 12702ffd04deSAndrew Donnellan pr_cont("%08x ", instr); 127106d67d54SPaul Mackerras } 127206d67d54SPaul Mackerras 127306d67d54SPaul Mackerras pc += sizeof(int); 127406d67d54SPaul Mackerras } 127506d67d54SPaul Mackerras 12762ffd04deSAndrew Donnellan pr_cont("\n"); 127706d67d54SPaul Mackerras } 127806d67d54SPaul Mackerras 127988b0fe17SMurilo Opsfelder Araujo void show_user_instructions(struct pt_regs *regs) 128088b0fe17SMurilo Opsfelder Araujo { 128188b0fe17SMurilo Opsfelder Araujo unsigned long pc; 1282df13102fSChristophe Leroy int n = NR_INSN_TO_PRINT; 1283fb2d9505SChristophe Leroy struct seq_buf s; 1284fb2d9505SChristophe Leroy char buf[96]; /* enough for 8 times 9 + 2 chars */ 128588b0fe17SMurilo Opsfelder Araujo 1286df13102fSChristophe Leroy pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 128788b0fe17SMurilo Opsfelder Araujo 1288fb2d9505SChristophe Leroy seq_buf_init(&s, buf, sizeof(buf)); 128988b0fe17SMurilo Opsfelder Araujo 1290fb2d9505SChristophe Leroy while (n) { 1291fb2d9505SChristophe Leroy int i; 1292fb2d9505SChristophe Leroy 1293fb2d9505SChristophe Leroy seq_buf_clear(&s); 1294fb2d9505SChristophe Leroy 1295fb2d9505SChristophe Leroy for (i = 0; i < 8 && n; i++, n--, pc += sizeof(int)) { 129688b0fe17SMurilo Opsfelder Araujo int instr; 129788b0fe17SMurilo Opsfelder Araujo 1298def0bfdbSChristophe Leroy if (probe_user_read(&instr, (void __user *)pc, sizeof(instr))) { 1299fb2d9505SChristophe Leroy seq_buf_printf(&s, "XXXXXXXX "); 1300fb2d9505SChristophe Leroy continue; 1301fb2d9505SChristophe Leroy } 1302fb2d9505SChristophe Leroy seq_buf_printf(&s, regs->nip == pc ? "<%08x> " : "%08x ", instr); 130388b0fe17SMurilo Opsfelder Araujo } 130488b0fe17SMurilo Opsfelder Araujo 1305fb2d9505SChristophe Leroy if (!seq_buf_has_overflowed(&s)) 1306fb2d9505SChristophe Leroy pr_info("%s[%d]: code: %s\n", current->comm, 1307fb2d9505SChristophe Leroy current->pid, s.buffer); 130888b0fe17SMurilo Opsfelder Araujo } 130988b0fe17SMurilo Opsfelder Araujo } 131088b0fe17SMurilo Opsfelder Araujo 1311801c0b2cSMichael Neuling struct regbit { 131206d67d54SPaul Mackerras unsigned long bit; 131306d67d54SPaul Mackerras const char *name; 1314801c0b2cSMichael Neuling }; 1315801c0b2cSMichael Neuling 1316801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 13173bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 13183bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 13193bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 13203bfd0c9cSAnton Blanchard #endif 13213bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 13223bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 13233bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 13243bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 13253bfd0c9cSAnton Blanchard #endif 132606d67d54SPaul Mackerras {MSR_EE, "EE"}, 132706d67d54SPaul Mackerras {MSR_PR, "PR"}, 132806d67d54SPaul Mackerras {MSR_FP, "FP"}, 132906d67d54SPaul Mackerras {MSR_ME, "ME"}, 13303bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 13311b98326bSKumar Gala {MSR_DE, "DE"}, 13323bfd0c9cSAnton Blanchard #else 13333bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 13343bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 13353bfd0c9cSAnton Blanchard #endif 133606d67d54SPaul Mackerras {MSR_IR, "IR"}, 133706d67d54SPaul Mackerras {MSR_DR, "DR"}, 13383bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 13393bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 13403bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 13413bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 13423bfd0c9cSAnton Blanchard #endif 134306d67d54SPaul Mackerras {0, NULL} 134406d67d54SPaul Mackerras }; 134506d67d54SPaul Mackerras 1346801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 134706d67d54SPaul Mackerras { 1348801c0b2cSMichael Neuling const char *s = ""; 134906d67d54SPaul Mackerras 135006d67d54SPaul Mackerras for (; bits->bit; ++bits) 135106d67d54SPaul Mackerras if (val & bits->bit) { 1352db5ba5aeSMichael Ellerman pr_cont("%s%s", s, bits->name); 1353801c0b2cSMichael Neuling s = sep; 135406d67d54SPaul Mackerras } 1355801c0b2cSMichael Neuling } 1356801c0b2cSMichael Neuling 1357801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1358801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1359801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1360801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1361801c0b2cSMichael Neuling {MSR_TM, "E"}, 1362801c0b2cSMichael Neuling {0, NULL} 1363801c0b2cSMichael Neuling }; 1364801c0b2cSMichael Neuling 1365801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1366801c0b2cSMichael Neuling { 1367801c0b2cSMichael Neuling /* 1368801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1369801c0b2cSMichael Neuling * Inside the TM[], the output means: 1370801c0b2cSMichael Neuling * E: Enabled (bit 32) 1371801c0b2cSMichael Neuling * S: Suspended (bit 33) 1372801c0b2cSMichael Neuling * T: Transactional (bit 34) 1373801c0b2cSMichael Neuling */ 1374801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1375db5ba5aeSMichael Ellerman pr_cont(",TM["); 1376801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1377db5ba5aeSMichael Ellerman pr_cont("]"); 1378801c0b2cSMichael Neuling } 1379801c0b2cSMichael Neuling } 1380801c0b2cSMichael Neuling #else 1381801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1382801c0b2cSMichael Neuling #endif 1383801c0b2cSMichael Neuling 1384801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1385801c0b2cSMichael Neuling { 1386db5ba5aeSMichael Ellerman pr_cont("<"); 1387801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1388801c0b2cSMichael Neuling print_tm_bits(val); 1389db5ba5aeSMichael Ellerman pr_cont(">"); 139006d67d54SPaul Mackerras } 139106d67d54SPaul Mackerras 139206d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1393f6f7dde3Santon@samba.org #define REG "%016lx" 139406d67d54SPaul Mackerras #define REGS_PER_LINE 4 139506d67d54SPaul Mackerras #define LAST_VOLATILE 13 139606d67d54SPaul Mackerras #else 1397f6f7dde3Santon@samba.org #define REG "%08lx" 139806d67d54SPaul Mackerras #define REGS_PER_LINE 8 139906d67d54SPaul Mackerras #define LAST_VOLATILE 12 140006d67d54SPaul Mackerras #endif 140106d67d54SPaul Mackerras 140214cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 140314cf11afSPaul Mackerras { 140414cf11afSPaul Mackerras int i, trap; 140514cf11afSPaul Mackerras 1406a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1407a43cb95dSTejun Heo 140806d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 140906d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 1410182dc9c7SMichael Ellerman printk("REGS: %px TRAP: %04lx %s (%s)\n", 141196b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 141206d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1413801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1414f6fc73fbSMichael Ellerman pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 141514cf11afSPaul Mackerras trap = TRAP(regs); 1416912237eaSNicholas Piggin if (!trap_is_syscall(regs) && cpu_has_feature(CPU_FTR_CFAR)) 14177dae865fSMichael Ellerman pr_cont("CFAR: "REG" ", regs->orig_gpr3); 1418c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1419ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 14207dae865fSMichael Ellerman pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 142114170789SKumar Gala #else 14227dae865fSMichael Ellerman pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 14239db8bcfdSAnton Blanchard #endif 14249db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 14253130a7bbSNicholas Piggin pr_cont("IRQMASK: %lx ", regs->softe); 14269db8bcfdSAnton Blanchard #endif 14279db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 14286d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 14297dae865fSMichael Ellerman pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 143014170789SKumar Gala #endif 143114cf11afSPaul Mackerras 143214cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 143306d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 14347dae865fSMichael Ellerman pr_cont("\nGPR%02d: ", i); 14357dae865fSMichael Ellerman pr_cont(REG " ", regs->gpr[i]); 143606d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 143714cf11afSPaul Mackerras break; 143814cf11afSPaul Mackerras } 14397dae865fSMichael Ellerman pr_cont("\n"); 144014cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 144114cf11afSPaul Mackerras /* 144214cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 144314cf11afSPaul Mackerras * above info out without failing 144414cf11afSPaul Mackerras */ 1445058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1446058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 144714cf11afSPaul Mackerras #endif 144814cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 144906d67d54SPaul Mackerras if (!user_mode(regs)) 145006d67d54SPaul Mackerras show_instructions(regs); 145114cf11afSPaul Mackerras } 145214cf11afSPaul Mackerras 145314cf11afSPaul Mackerras void flush_thread(void) 145414cf11afSPaul Mackerras { 1455e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 14565aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1457e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 14583bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1459e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 146014cf11afSPaul Mackerras } 146114cf11afSPaul Mackerras 1462425d3314SNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 1463425d3314SNicholas Piggin void arch_setup_new_exec(void) 1464425d3314SNicholas Piggin { 1465425d3314SNicholas Piggin if (radix_enabled()) 1466425d3314SNicholas Piggin return; 1467425d3314SNicholas Piggin hash__setup_new_exec(); 1468425d3314SNicholas Piggin } 1469425d3314SNicholas Piggin #endif 1470425d3314SNicholas Piggin 1471ec233edeSSukadev Bhattiprolu #ifdef CONFIG_PPC64 147271cc64a8SAlastair D'Silva /** 147371cc64a8SAlastair D'Silva * Assign a TIDR (thread ID) for task @t and set it in the thread 1474ec233edeSSukadev Bhattiprolu * structure. For now, we only support setting TIDR for 'current' task. 147571cc64a8SAlastair D'Silva * 147671cc64a8SAlastair D'Silva * Since the TID value is a truncated form of it PID, it is possible 147771cc64a8SAlastair D'Silva * (but unlikely) for 2 threads to have the same TID. In the unlikely event 147871cc64a8SAlastair D'Silva * that 2 threads share the same TID and are waiting, one of the following 147971cc64a8SAlastair D'Silva * cases will happen: 148071cc64a8SAlastair D'Silva * 148171cc64a8SAlastair D'Silva * 1. The correct thread is running, the wrong thread is not 148271cc64a8SAlastair D'Silva * In this situation, the correct thread is woken and proceeds to pass it's 148371cc64a8SAlastair D'Silva * condition check. 148471cc64a8SAlastair D'Silva * 148571cc64a8SAlastair D'Silva * 2. Neither threads are running 148671cc64a8SAlastair D'Silva * In this situation, neither thread will be woken. When scheduled, the waiting 148771cc64a8SAlastair D'Silva * threads will execute either a wait, which will return immediately, followed 148871cc64a8SAlastair D'Silva * by a condition check, which will pass for the correct thread and fail 148971cc64a8SAlastair D'Silva * for the wrong thread, or they will execute the condition check immediately. 149071cc64a8SAlastair D'Silva * 149171cc64a8SAlastair D'Silva * 3. The wrong thread is running, the correct thread is not 149271cc64a8SAlastair D'Silva * The wrong thread will be woken, but will fail it's condition check and 149371cc64a8SAlastair D'Silva * re-execute wait. The correct thread, when scheduled, will execute either 149471cc64a8SAlastair D'Silva * it's condition check (which will pass), or wait, which returns immediately 149571cc64a8SAlastair D'Silva * when called the first time after the thread is scheduled, followed by it's 149671cc64a8SAlastair D'Silva * condition check (which will pass). 149771cc64a8SAlastair D'Silva * 149871cc64a8SAlastair D'Silva * 4. Both threads are running 149971cc64a8SAlastair D'Silva * Both threads will be woken. The wrong thread will fail it's condition check 150071cc64a8SAlastair D'Silva * and execute another wait, while the correct thread will pass it's condition 150171cc64a8SAlastair D'Silva * check. 150271cc64a8SAlastair D'Silva * 150371cc64a8SAlastair D'Silva * @t: the task to set the thread ID for 1504ec233edeSSukadev Bhattiprolu */ 1505ec233edeSSukadev Bhattiprolu int set_thread_tidr(struct task_struct *t) 1506ec233edeSSukadev Bhattiprolu { 15073449f191SAlastair D'Silva if (!cpu_has_feature(CPU_FTR_P9_TIDR)) 1508ec233edeSSukadev Bhattiprolu return -EINVAL; 1509ec233edeSSukadev Bhattiprolu 1510ec233edeSSukadev Bhattiprolu if (t != current) 1511ec233edeSSukadev Bhattiprolu return -EINVAL; 1512ec233edeSSukadev Bhattiprolu 15137e4d4233SVaibhav Jain if (t->thread.tidr) 15147e4d4233SVaibhav Jain return 0; 15157e4d4233SVaibhav Jain 151671cc64a8SAlastair D'Silva t->thread.tidr = (u16)task_pid_nr(t); 1517ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, t->thread.tidr); 1518ec233edeSSukadev Bhattiprolu 1519ec233edeSSukadev Bhattiprolu return 0; 1520ec233edeSSukadev Bhattiprolu } 1521b1db5513SChristophe Lombard EXPORT_SYMBOL_GPL(set_thread_tidr); 1522ec233edeSSukadev Bhattiprolu 1523ec233edeSSukadev Bhattiprolu #endif /* CONFIG_PPC64 */ 1524ec233edeSSukadev Bhattiprolu 152514cf11afSPaul Mackerras void 152614cf11afSPaul Mackerras release_thread(struct task_struct *t) 152714cf11afSPaul Mackerras { 152814cf11afSPaul Mackerras } 152914cf11afSPaul Mackerras 153014cf11afSPaul Mackerras /* 153155ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 153255ccf3feSSuresh Siddha * copy the current task into the new thread. 153314cf11afSPaul Mackerras */ 153455ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 153514cf11afSPaul Mackerras { 1536579e633eSAnton Blanchard flush_all_to_thread(src); 1537621b5060SMichael Neuling /* 1538621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1539621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1540621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1541621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1542621b5060SMichael Neuling * checkpointed state back and the TM mode. 15435d176f75SCyril Bur * 15445d176f75SCyril Bur * Can't pass dst because it isn't ready. Doesn't matter, passing 15455d176f75SCyril Bur * dst is only important for __switch_to() 1546621b5060SMichael Neuling */ 1547dc310669SCyril Bur __switch_to_tm(src, src); 1548330a1eb7SMichael Ellerman 154955ccf3feSSuresh Siddha *dst = *src; 1550330a1eb7SMichael Ellerman 1551330a1eb7SMichael Ellerman clear_task_ebb(dst); 1552330a1eb7SMichael Ellerman 155355ccf3feSSuresh Siddha return 0; 155414cf11afSPaul Mackerras } 155514cf11afSPaul Mackerras 1556cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1557cec15488SMichael Ellerman { 15584e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1559cec15488SMichael Ellerman unsigned long sp_vsid; 1560cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1561cec15488SMichael Ellerman 1562caca285eSAneesh Kumar K.V if (radix_enabled()) 1563caca285eSAneesh Kumar K.V return; 1564caca285eSAneesh Kumar K.V 1565cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1566cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1567cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1568cec15488SMichael Ellerman else 1569cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1570cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1571cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1572cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1573cec15488SMichael Ellerman #endif 1574cec15488SMichael Ellerman } 1575cec15488SMichael Ellerman 157614cf11afSPaul Mackerras /* 157714cf11afSPaul Mackerras * Copy a thread.. 157814cf11afSPaul Mackerras */ 1579efcac658SAlexey Kardashevskiy 15806eca8933SAlex Dowad /* 15816eca8933SAlex Dowad * Copy architecture-specific thread state 15826eca8933SAlex Dowad */ 1583facd04a9SNicholas Piggin int copy_thread_tls(unsigned long clone_flags, unsigned long usp, 1584facd04a9SNicholas Piggin unsigned long kthread_arg, struct task_struct *p, 1585facd04a9SNicholas Piggin unsigned long tls) 158614cf11afSPaul Mackerras { 158714cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 158814cf11afSPaul Mackerras extern void ret_from_fork(void); 158958254e10SAl Viro extern void ret_from_kernel_thread(void); 159058254e10SAl Viro void (*f)(void); 15910cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 15925d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 15935d31a96eSMichael Ellerman 1594ed1cd6deSChristophe Leroy klp_init_thread_info(p); 159514cf11afSPaul Mackerras 159614cf11afSPaul Mackerras /* Copy registers */ 159714cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 159814cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1599ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 16006eca8933SAlex Dowad /* kernel thread */ 160158254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 160214cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 16037cedd601SAnton Blanchard /* function */ 16047cedd601SAnton Blanchard if (usp) 16057cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 160658254e10SAl Viro #ifdef CONFIG_PPC64 1607b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1608c2e480baSMadhavan Srinivasan childregs->softe = IRQS_ENABLED; 160906d67d54SPaul Mackerras #endif 16106eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 161114cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1612138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 161358254e10SAl Viro f = ret_from_kernel_thread; 161414cf11afSPaul Mackerras } else { 16156eca8933SAlex Dowad /* user thread */ 1616afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 161758254e10SAl Viro CHECK_FULL_REGS(regs); 161858254e10SAl Viro *childregs = *regs; 1619ea516b11SAl Viro if (usp) 162014cf11afSPaul Mackerras childregs->gpr[1] = usp; 162114cf11afSPaul Mackerras p->thread.regs = childregs; 162258254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 162306d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 16249904b005SDenis Kirjanov if (!is_32bit_task()) 1625facd04a9SNicholas Piggin childregs->gpr[13] = tls; 162606d67d54SPaul Mackerras else 1627facd04a9SNicholas Piggin childregs->gpr[2] = tls; 162814cf11afSPaul Mackerras } 162958254e10SAl Viro 163058254e10SAl Viro f = ret_from_fork; 163106d67d54SPaul Mackerras } 1632d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 163314cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 163414cf11afSPaul Mackerras 163514cf11afSPaul Mackerras /* 163614cf11afSPaul Mackerras * The way this works is that at some point in the future 163714cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 163814cf11afSPaul Mackerras * That will pop off the stack frame created below and start 163914cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 164014cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 164114cf11afSPaul Mackerras * system call, using the stack frame created above. 164214cf11afSPaul Mackerras */ 1643af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 164414cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 164514cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 164614cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 164714cf11afSPaul Mackerras p->thread.ksp = sp; 1648cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 1649a7916a1dSChristophe Leroy p->thread.ksp_limit = (unsigned long)end_of_stack(p); 1650cbc9565eSBenjamin Herrenschmidt #endif 165128d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 165228d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 165328d170abSOleg Nesterov #endif 165428d170abSOleg Nesterov 165518461960SPaul Mackerras p->thread.fp_save_area = NULL; 165618461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 165718461960SPaul Mackerras p->thread.vr_save_area = NULL; 165818461960SPaul Mackerras #endif 165918461960SPaul Mackerras 1660cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 166106d67d54SPaul Mackerras 1662efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1663efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 16641021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1665db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1666efcac658SAlexey Kardashevskiy } 166792779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 16684c2de74cSNicholas Piggin childregs->ppr = DEFAULT_PPR; 1669ec233edeSSukadev Bhattiprolu 1670ec233edeSSukadev Bhattiprolu p->thread.tidr = 0; 1671efcac658SAlexey Kardashevskiy #endif 16727cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 167314cf11afSPaul Mackerras return 0; 167414cf11afSPaul Mackerras } 167514cf11afSPaul Mackerras 16765434ae74SNicholas Piggin void preload_new_slb_context(unsigned long start, unsigned long sp); 16775434ae74SNicholas Piggin 167814cf11afSPaul Mackerras /* 167914cf11afSPaul Mackerras * Set up a thread for executing a new program 168014cf11afSPaul Mackerras */ 168106d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 168214cf11afSPaul Mackerras { 168390eac727SMichael Ellerman #ifdef CONFIG_PPC64 168490eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 16855434ae74SNicholas Piggin 16865434ae74SNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 1687f89bd8baSAneesh Kumar K.V if (!radix_enabled()) 16885434ae74SNicholas Piggin preload_new_slb_context(start, sp); 16895434ae74SNicholas Piggin #endif 169090eac727SMichael Ellerman #endif 169190eac727SMichael Ellerman 169206d67d54SPaul Mackerras /* 169306d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 169406d67d54SPaul Mackerras * set. Do it now. 169506d67d54SPaul Mackerras */ 169606d67d54SPaul Mackerras if (!current->thread.regs) { 16970cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 16980cec6fd1SAl Viro current->thread.regs = regs - 1; 169906d67d54SPaul Mackerras } 170006d67d54SPaul Mackerras 17018e96a87cSCyril Bur #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 17028e96a87cSCyril Bur /* 17038e96a87cSCyril Bur * Clear any transactional state, we're exec()ing. The cause is 17048e96a87cSCyril Bur * not important as there will never be a recheckpoint so it's not 17058e96a87cSCyril Bur * user visible. 17068e96a87cSCyril Bur */ 17078e96a87cSCyril Bur if (MSR_TM_SUSPENDED(mfmsr())) 17088e96a87cSCyril Bur tm_reclaim_current(0); 17098e96a87cSCyril Bur #endif 17108e96a87cSCyril Bur 171114cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 171214cf11afSPaul Mackerras regs->ctr = 0; 171314cf11afSPaul Mackerras regs->link = 0; 171414cf11afSPaul Mackerras regs->xer = 0; 171514cf11afSPaul Mackerras regs->ccr = 0; 171614cf11afSPaul Mackerras regs->gpr[1] = sp; 171706d67d54SPaul Mackerras 1718474f8196SRoland McGrath /* 1719474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1720474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1721474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1722474f8196SRoland McGrath */ 1723feb9df34SNicholas Piggin SET_FULL_REGS(regs); 1724474f8196SRoland McGrath 172506d67d54SPaul Mackerras #ifdef CONFIG_PPC32 172606d67d54SPaul Mackerras regs->mq = 0; 172706d67d54SPaul Mackerras regs->nip = start; 172814cf11afSPaul Mackerras regs->msr = MSR_USER; 172906d67d54SPaul Mackerras #else 17309904b005SDenis Kirjanov if (!is_32bit_task()) { 173194af3abfSRusty Russell unsigned long entry; 173206d67d54SPaul Mackerras 173394af3abfSRusty Russell if (is_elf2_task()) { 173494af3abfSRusty Russell /* Look ma, no function descriptors! */ 173594af3abfSRusty Russell entry = start; 173694af3abfSRusty Russell 173794af3abfSRusty Russell /* 173894af3abfSRusty Russell * Ulrich says: 173994af3abfSRusty Russell * The latest iteration of the ABI requires that when 174094af3abfSRusty Russell * calling a function (at its global entry point), 174194af3abfSRusty Russell * the caller must ensure r12 holds the entry point 174294af3abfSRusty Russell * address (so that the function can quickly 174394af3abfSRusty Russell * establish addressability). 174494af3abfSRusty Russell */ 174594af3abfSRusty Russell regs->gpr[12] = start; 174694af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 174794af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 174894af3abfSRusty Russell } else { 174994af3abfSRusty Russell unsigned long toc; 175094af3abfSRusty Russell 175194af3abfSRusty Russell /* start is a relocated pointer to the function 175294af3abfSRusty Russell * descriptor for the elf _start routine. The first 175394af3abfSRusty Russell * entry in the function descriptor is the entry 175494af3abfSRusty Russell * address of _start and the second entry is the TOC 175594af3abfSRusty Russell * value we need to use. 175606d67d54SPaul Mackerras */ 175706d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 175806d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 175906d67d54SPaul Mackerras 176006d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 176106d67d54SPaul Mackerras * need to be relocated before we can use them. 176206d67d54SPaul Mackerras */ 176306d67d54SPaul Mackerras if (load_addr != 0) { 176406d67d54SPaul Mackerras entry += load_addr; 176506d67d54SPaul Mackerras toc += load_addr; 176606d67d54SPaul Mackerras } 176706d67d54SPaul Mackerras regs->gpr[2] = toc; 176894af3abfSRusty Russell } 176994af3abfSRusty Russell regs->nip = entry; 177006d67d54SPaul Mackerras regs->msr = MSR_USER64; 1771d4bf9a78SStephen Rothwell } else { 1772d4bf9a78SStephen Rothwell regs->nip = start; 1773d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1774d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 177506d67d54SPaul Mackerras } 177606d67d54SPaul Mackerras #endif 1777ce48b210SMichael Neuling #ifdef CONFIG_VSX 1778ce48b210SMichael Neuling current->thread.used_vsr = 0; 1779ce48b210SMichael Neuling #endif 17805434ae74SNicholas Piggin current->thread.load_slb = 0; 17811195892cSBreno Leitao current->thread.load_fp = 0; 1782de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 178318461960SPaul Mackerras current->thread.fp_save_area = NULL; 178414cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1785de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1786de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 178718461960SPaul Mackerras current->thread.vr_save_area = NULL; 178814cf11afSPaul Mackerras current->thread.vrsave = 0; 178914cf11afSPaul Mackerras current->thread.used_vr = 0; 17901195892cSBreno Leitao current->thread.load_vec = 0; 179114cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 179214cf11afSPaul Mackerras #ifdef CONFIG_SPE 179314cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 179414cf11afSPaul Mackerras current->thread.acc = 0; 179514cf11afSPaul Mackerras current->thread.spefscr = 0; 179614cf11afSPaul Mackerras current->thread.used_spe = 0; 179714cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1798bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1799bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1800bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1801bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 18027f22ced4SBreno Leitao current->thread.load_tm = 0; 1803bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 180406bb53b3SRam Pai 180506bb53b3SRam Pai thread_pkey_regs_init(¤t->thread); 180614cf11afSPaul Mackerras } 1807e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 180814cf11afSPaul Mackerras 180914cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 181014cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 181114cf11afSPaul Mackerras 181214cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 181314cf11afSPaul Mackerras { 181414cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 181514cf11afSPaul Mackerras 181614cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 181714cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 181814cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 181914cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 182014cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 182114cf11afSPaul Mackerras #ifdef CONFIG_SPE 18225e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1823640e9225SJoseph Myers /* 1824640e9225SJoseph Myers * When the sticky exception bits are set 1825640e9225SJoseph Myers * directly by userspace, it must call prctl 1826640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1827640e9225SJoseph Myers * in the existing prctl settings) or 1828640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1829640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1830640e9225SJoseph Myers * saving and restoring the whole 1831640e9225SJoseph Myers * floating-point environment need to do so 1832640e9225SJoseph Myers * anyway to restore the prctl settings from 1833640e9225SJoseph Myers * the saved environment. 1834640e9225SJoseph Myers */ 1835640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 183614cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 183714cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 183806d67d54SPaul Mackerras return 0; 18395e14d21eSKumar Gala } else { 18405e14d21eSKumar Gala return -EINVAL; 18415e14d21eSKumar Gala } 184214cf11afSPaul Mackerras #else 184314cf11afSPaul Mackerras return -EINVAL; 184414cf11afSPaul Mackerras #endif 184506d67d54SPaul Mackerras } 184606d67d54SPaul Mackerras 184714cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 184814cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 184914cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 185014cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 185114cf11afSPaul Mackerras * them does not change anything */ 185214cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 185314cf11afSPaul Mackerras return -EINVAL; 185414cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 185514cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 185614cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 185714cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 185814cf11afSPaul Mackerras return 0; 185914cf11afSPaul Mackerras } 186014cf11afSPaul Mackerras 186114cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 186214cf11afSPaul Mackerras { 186314cf11afSPaul Mackerras unsigned int val; 186414cf11afSPaul Mackerras 186514cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 186614cf11afSPaul Mackerras #ifdef CONFIG_SPE 1867640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1868640e9225SJoseph Myers /* 1869640e9225SJoseph Myers * When the sticky exception bits are set 1870640e9225SJoseph Myers * directly by userspace, it must call prctl 1871640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1872640e9225SJoseph Myers * in the existing prctl settings) or 1873640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1874640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1875640e9225SJoseph Myers * saving and restoring the whole 1876640e9225SJoseph Myers * floating-point environment need to do so 1877640e9225SJoseph Myers * anyway to restore the prctl settings from 1878640e9225SJoseph Myers * the saved environment. 1879640e9225SJoseph Myers */ 1880640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 188114cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1882640e9225SJoseph Myers } else 18835e14d21eSKumar Gala return -EINVAL; 188414cf11afSPaul Mackerras #else 188514cf11afSPaul Mackerras return -EINVAL; 188614cf11afSPaul Mackerras #endif 188714cf11afSPaul Mackerras else 188814cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 188914cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 189014cf11afSPaul Mackerras } 189114cf11afSPaul Mackerras 1892fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1893fab5db97SPaul Mackerras { 1894fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1895fab5db97SPaul Mackerras 1896fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1897fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1898fab5db97SPaul Mackerras return -EINVAL; 1899fab5db97SPaul Mackerras 1900fab5db97SPaul Mackerras if (regs == NULL) 1901fab5db97SPaul Mackerras return -EINVAL; 1902fab5db97SPaul Mackerras 1903fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1904fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1905fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1906fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1907fab5db97SPaul Mackerras else 1908fab5db97SPaul Mackerras return -EINVAL; 1909fab5db97SPaul Mackerras 1910fab5db97SPaul Mackerras return 0; 1911fab5db97SPaul Mackerras } 1912fab5db97SPaul Mackerras 1913fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 1914fab5db97SPaul Mackerras { 1915fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1916fab5db97SPaul Mackerras unsigned int val; 1917fab5db97SPaul Mackerras 1918fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 1919fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 1920fab5db97SPaul Mackerras return -EINVAL; 1921fab5db97SPaul Mackerras 1922fab5db97SPaul Mackerras if (regs == NULL) 1923fab5db97SPaul Mackerras return -EINVAL; 1924fab5db97SPaul Mackerras 1925fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 1926fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 1927fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 1928fab5db97SPaul Mackerras else 1929fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 1930fab5db97SPaul Mackerras } else 1931fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 1932fab5db97SPaul Mackerras 1933fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 1934fab5db97SPaul Mackerras } 1935fab5db97SPaul Mackerras 1936e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 1937e9370ae1SPaul Mackerras { 1938e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 1939e9370ae1SPaul Mackerras return 0; 1940e9370ae1SPaul Mackerras } 1941e9370ae1SPaul Mackerras 1942e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1943e9370ae1SPaul Mackerras { 1944e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1945e9370ae1SPaul Mackerras } 1946e9370ae1SPaul Mackerras 1947bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1948bb72c481SPaul Mackerras unsigned long nbytes) 1949bb72c481SPaul Mackerras { 1950bb72c481SPaul Mackerras unsigned long stack_page; 1951bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 1952bb72c481SPaul Mackerras 1953bb72c481SPaul Mackerras stack_page = (unsigned long)hardirq_ctx[cpu]; 1954a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1955bb72c481SPaul Mackerras return 1; 1956bb72c481SPaul Mackerras 1957bb72c481SPaul Mackerras stack_page = (unsigned long)softirq_ctx[cpu]; 1958a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1959bb72c481SPaul Mackerras return 1; 1960a7916a1dSChristophe Leroy 1961bb72c481SPaul Mackerras return 0; 1962bb72c481SPaul Mackerras } 1963bb72c481SPaul Mackerras 1964a2e36683SNicholas Piggin static inline int valid_emergency_stack(unsigned long sp, struct task_struct *p, 1965a2e36683SNicholas Piggin unsigned long nbytes) 1966a2e36683SNicholas Piggin { 1967a2e36683SNicholas Piggin #ifdef CONFIG_PPC64 1968a2e36683SNicholas Piggin unsigned long stack_page; 1969a2e36683SNicholas Piggin unsigned long cpu = task_cpu(p); 1970a2e36683SNicholas Piggin 1971a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->emergency_sp - THREAD_SIZE; 1972a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1973a2e36683SNicholas Piggin return 1; 1974a2e36683SNicholas Piggin 1975a2e36683SNicholas Piggin # ifdef CONFIG_PPC_BOOK3S_64 1976a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->nmi_emergency_sp - THREAD_SIZE; 1977a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1978a2e36683SNicholas Piggin return 1; 1979a2e36683SNicholas Piggin 1980a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->mc_emergency_sp - THREAD_SIZE; 1981a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 1982a2e36683SNicholas Piggin return 1; 1983a2e36683SNicholas Piggin # endif 1984a2e36683SNicholas Piggin #endif 1985a2e36683SNicholas Piggin 1986a2e36683SNicholas Piggin return 0; 1987a2e36683SNicholas Piggin } 1988a2e36683SNicholas Piggin 1989a2e36683SNicholas Piggin 19902f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 199114cf11afSPaul Mackerras unsigned long nbytes) 199214cf11afSPaul Mackerras { 19930cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 199414cf11afSPaul Mackerras 1995a7916a1dSChristophe Leroy if (sp < THREAD_SIZE) 1996a7916a1dSChristophe Leroy return 0; 1997a7916a1dSChristophe Leroy 1998a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 199914cf11afSPaul Mackerras return 1; 200014cf11afSPaul Mackerras 2001a2e36683SNicholas Piggin if (valid_irq_stack(sp, p, nbytes)) 2002a2e36683SNicholas Piggin return 1; 2003a2e36683SNicholas Piggin 2004a2e36683SNicholas Piggin return valid_emergency_stack(sp, p, nbytes); 200514cf11afSPaul Mackerras } 200614cf11afSPaul Mackerras 20072f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 20082f25194dSAnton Blanchard 2009018cce33SChristophe Leroy static unsigned long __get_wchan(struct task_struct *p) 201006d67d54SPaul Mackerras { 201106d67d54SPaul Mackerras unsigned long ip, sp; 201206d67d54SPaul Mackerras int count = 0; 201306d67d54SPaul Mackerras 201406d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 201506d67d54SPaul Mackerras return 0; 201606d67d54SPaul Mackerras 201706d67d54SPaul Mackerras sp = p->thread.ksp; 2018ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 201906d67d54SPaul Mackerras return 0; 202006d67d54SPaul Mackerras 202106d67d54SPaul Mackerras do { 202206d67d54SPaul Mackerras sp = *(unsigned long *)sp; 20234ca360f3SKautuk Consul if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD) || 20244ca360f3SKautuk Consul p->state == TASK_RUNNING) 202506d67d54SPaul Mackerras return 0; 202606d67d54SPaul Mackerras if (count > 0) { 2027ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 202806d67d54SPaul Mackerras if (!in_sched_functions(ip)) 202906d67d54SPaul Mackerras return ip; 203006d67d54SPaul Mackerras } 203106d67d54SPaul Mackerras } while (count++ < 16); 203206d67d54SPaul Mackerras return 0; 203306d67d54SPaul Mackerras } 203406d67d54SPaul Mackerras 2035018cce33SChristophe Leroy unsigned long get_wchan(struct task_struct *p) 2036018cce33SChristophe Leroy { 2037018cce33SChristophe Leroy unsigned long ret; 2038018cce33SChristophe Leroy 2039018cce33SChristophe Leroy if (!try_get_task_stack(p)) 2040018cce33SChristophe Leroy return 0; 2041018cce33SChristophe Leroy 2042018cce33SChristophe Leroy ret = __get_wchan(p); 2043018cce33SChristophe Leroy 2044018cce33SChristophe Leroy put_task_stack(p); 2045018cce33SChristophe Leroy 2046018cce33SChristophe Leroy return ret; 2047018cce33SChristophe Leroy } 2048018cce33SChristophe Leroy 2049c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 205014cf11afSPaul Mackerras 205114cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 205214cf11afSPaul Mackerras { 205306d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 205414cf11afSPaul Mackerras int count = 0; 205506d67d54SPaul Mackerras int firstframe = 1; 20566794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 20577c1bb6bbSNaveen N. Rao unsigned long ret_addr; 20587c1bb6bbSNaveen N. Rao int ftrace_idx = 0; 20596794c782SSteven Rostedt #endif 206014cf11afSPaul Mackerras 206114cf11afSPaul Mackerras if (tsk == NULL) 206214cf11afSPaul Mackerras tsk = current; 2063018cce33SChristophe Leroy 2064018cce33SChristophe Leroy if (!try_get_task_stack(tsk)) 2065018cce33SChristophe Leroy return; 2066018cce33SChristophe Leroy 2067018cce33SChristophe Leroy sp = (unsigned long) stack; 206814cf11afSPaul Mackerras if (sp == 0) { 206914cf11afSPaul Mackerras if (tsk == current) 20703d13e839SMichael Ellerman sp = current_stack_frame(); 207114cf11afSPaul Mackerras else 207214cf11afSPaul Mackerras sp = tsk->thread.ksp; 207314cf11afSPaul Mackerras } 207414cf11afSPaul Mackerras 207506d67d54SPaul Mackerras lr = 0; 207606d67d54SPaul Mackerras printk("Call Trace:\n"); 207714cf11afSPaul Mackerras do { 2078ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 2079018cce33SChristophe Leroy break; 208006d67d54SPaul Mackerras 208106d67d54SPaul Mackerras stack = (unsigned long *) sp; 208206d67d54SPaul Mackerras newsp = stack[0]; 2083ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 208406d67d54SPaul Mackerras if (!firstframe || ip != lr) { 2085058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 20866794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 20877c1bb6bbSNaveen N. Rao ret_addr = ftrace_graph_ret_addr(current, 20887c1bb6bbSNaveen N. Rao &ftrace_idx, ip, stack); 20897c1bb6bbSNaveen N. Rao if (ret_addr != ip) 20907c1bb6bbSNaveen N. Rao pr_cont(" (%pS)", (void *)ret_addr); 20916794c782SSteven Rostedt #endif 209206d67d54SPaul Mackerras if (firstframe) 20939a1f490fSMichael Ellerman pr_cont(" (unreliable)"); 20949a1f490fSMichael Ellerman pr_cont("\n"); 209514cf11afSPaul Mackerras } 209606d67d54SPaul Mackerras firstframe = 0; 209706d67d54SPaul Mackerras 209806d67d54SPaul Mackerras /* 209906d67d54SPaul Mackerras * See if this is an exception frame. 210006d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 210106d67d54SPaul Mackerras */ 2102ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 2103ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 210406d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 210506d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 210606d67d54SPaul Mackerras lr = regs->link; 21079be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 2108058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 210906d67d54SPaul Mackerras firstframe = 1; 211014cf11afSPaul Mackerras } 211106d67d54SPaul Mackerras 211206d67d54SPaul Mackerras sp = newsp; 211306d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 2114018cce33SChristophe Leroy 2115018cce33SChristophe Leroy put_task_stack(tsk); 211606d67d54SPaul Mackerras } 211706d67d54SPaul Mackerras 2118cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 2119fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 21200e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 2121cb2c9b27SAnton Blanchard { 2122fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2123d1d0d5ffSNicholas Piggin 2124d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2125d1d0d5ffSNicholas Piggin /* 2126d1d0d5ffSNicholas Piggin * Least significant bit (RUN) is the only writable bit of 2127d1d0d5ffSNicholas Piggin * the CTRL register, so we can avoid mfspr. 2.06 is not the 2128d1d0d5ffSNicholas Piggin * earliest ISA where this is the case, but it's convenient. 2129d1d0d5ffSNicholas Piggin */ 2130d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, CTRL_RUNLATCH); 2131d1d0d5ffSNicholas Piggin } else { 2132cb2c9b27SAnton Blanchard unsigned long ctrl; 2133cb2c9b27SAnton Blanchard 2134d1d0d5ffSNicholas Piggin /* 2135d1d0d5ffSNicholas Piggin * Some architectures (e.g., Cell) have writable fields other 2136d1d0d5ffSNicholas Piggin * than RUN, so do the read-modify-write. 2137d1d0d5ffSNicholas Piggin */ 2138cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2139cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 2140cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2141d1d0d5ffSNicholas Piggin } 2142cb2c9b27SAnton Blanchard 2143fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 2144cb2c9b27SAnton Blanchard } 2145cb2c9b27SAnton Blanchard 2146fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 21470e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 2148cb2c9b27SAnton Blanchard { 2149fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2150cb2c9b27SAnton Blanchard 2151fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 2152cb2c9b27SAnton Blanchard 2153d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2154d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, 0); 2155d1d0d5ffSNicholas Piggin } else { 2156d1d0d5ffSNicholas Piggin unsigned long ctrl; 2157d1d0d5ffSNicholas Piggin 2158cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2159cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 2160cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2161cb2c9b27SAnton Blanchard } 2162d1d0d5ffSNicholas Piggin } 2163fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 2164f6a61680SBenjamin Herrenschmidt 2165d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 2166d839088cSAnton Blanchard { 2167d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 2168d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 2169d839088cSAnton Blanchard return sp & ~0xf; 2170d839088cSAnton Blanchard } 2171912f9ee2SAnton Blanchard 2172912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 2173912f9ee2SAnton Blanchard { 2174912f9ee2SAnton Blanchard unsigned long rnd = 0; 2175912f9ee2SAnton Blanchard 2176912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 2177912f9ee2SAnton Blanchard if (is_32bit_task()) 21785ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); 2179912f9ee2SAnton Blanchard else 21805ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); 2181912f9ee2SAnton Blanchard 2182912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 2183912f9ee2SAnton Blanchard } 2184912f9ee2SAnton Blanchard 2185912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 2186912f9ee2SAnton Blanchard { 21878bbde7a7SAnton Blanchard unsigned long base = mm->brk; 21888bbde7a7SAnton Blanchard unsigned long ret; 21898bbde7a7SAnton Blanchard 21904e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 21918bbde7a7SAnton Blanchard /* 21928bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 21938bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 21948bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 21958bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 2196caca285eSAneesh Kumar K.V * performance penalty. We don't need to worry about radix. For 2197caca285eSAneesh Kumar K.V * radix, mmu_highuser_ssize remains unchanged from 256MB. 21988bbde7a7SAnton Blanchard */ 21998bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 22008bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 22018bbde7a7SAnton Blanchard #endif 22028bbde7a7SAnton Blanchard 22038bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 2204912f9ee2SAnton Blanchard 2205912f9ee2SAnton Blanchard if (ret < mm->brk) 2206912f9ee2SAnton Blanchard return mm->brk; 2207912f9ee2SAnton Blanchard 2208912f9ee2SAnton Blanchard return ret; 2209912f9ee2SAnton Blanchard } 2210501cb16dSAnton Blanchard 2211