114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 314cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 614cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 714cf11afSPaul Mackerras * 814cf11afSPaul Mackerras * PowerPC version 914cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1014cf11afSPaul Mackerras * 1114cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 1214cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 1314cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 1414cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 1514cf11afSPaul Mackerras */ 1614cf11afSPaul Mackerras 1714cf11afSPaul Mackerras #include <linux/errno.h> 1814cf11afSPaul Mackerras #include <linux/sched.h> 19b17b0153SIngo Molnar #include <linux/sched/debug.h> 20*29930025SIngo Molnar #include <linux/sched/task.h> 2114cf11afSPaul Mackerras #include <linux/kernel.h> 2214cf11afSPaul Mackerras #include <linux/mm.h> 2314cf11afSPaul Mackerras #include <linux/smp.h> 2414cf11afSPaul Mackerras #include <linux/stddef.h> 2514cf11afSPaul Mackerras #include <linux/unistd.h> 2614cf11afSPaul Mackerras #include <linux/ptrace.h> 2714cf11afSPaul Mackerras #include <linux/slab.h> 2814cf11afSPaul Mackerras #include <linux/user.h> 2914cf11afSPaul Mackerras #include <linux/elf.h> 3014cf11afSPaul Mackerras #include <linux/prctl.h> 3114cf11afSPaul Mackerras #include <linux/init_task.h> 324b16f8e2SPaul Gortmaker #include <linux/export.h> 3314cf11afSPaul Mackerras #include <linux/kallsyms.h> 3414cf11afSPaul Mackerras #include <linux/mqueue.h> 3514cf11afSPaul Mackerras #include <linux/hardirq.h> 3606d67d54SPaul Mackerras #include <linux/utsname.h> 376794c782SSteven Rostedt #include <linux/ftrace.h> 3879741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 39d839088cSAnton Blanchard #include <linux/personality.h> 40d839088cSAnton Blanchard #include <linux/random.h> 415aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 427b051f66SAnton Blanchard #include <linux/uaccess.h> 437f92bc56SDaniel Axtens #include <linux/elf-randomize.h> 4414cf11afSPaul Mackerras 4514cf11afSPaul Mackerras #include <asm/pgtable.h> 4614cf11afSPaul Mackerras #include <asm/io.h> 4714cf11afSPaul Mackerras #include <asm/processor.h> 4814cf11afSPaul Mackerras #include <asm/mmu.h> 4914cf11afSPaul Mackerras #include <asm/prom.h> 5076032de8SMichael Ellerman #include <asm/machdep.h> 51c6622f63SPaul Mackerras #include <asm/time.h> 52ae3a197eSDavid Howells #include <asm/runlatch.h> 53a7f31841SArnd Bergmann #include <asm/syscalls.h> 54ae3a197eSDavid Howells #include <asm/switch_to.h> 55fb09692eSMichael Neuling #include <asm/tm.h> 56ae3a197eSDavid Howells #include <asm/debug.h> 5706d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5806d67d54SPaul Mackerras #include <asm/firmware.h> 5906d67d54SPaul Mackerras #endif 607cedd601SAnton Blanchard #include <asm/code-patching.h> 617f92bc56SDaniel Axtens #include <asm/exec.h> 625d31a96eSMichael Ellerman #include <asm/livepatch.h> 63b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 640545d543SDaniel Axtens #include <asm/asm-prototypes.h> 655d31a96eSMichael Ellerman 66d6a61bfcSLuis Machado #include <linux/kprobes.h> 67d6a61bfcSLuis Machado #include <linux/kdebug.h> 6814cf11afSPaul Mackerras 698b3c34cfSMichael Neuling /* Transactional Memory debug */ 708b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 718b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 728b3c34cfSMichael Neuling #else 738b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 748b3c34cfSMichael Neuling #endif 758b3c34cfSMichael Neuling 7614cf11afSPaul Mackerras extern unsigned long _get_SP(void); 7714cf11afSPaul Mackerras 78d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 79b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 80d31626f7SPaul Mackerras { 81d31626f7SPaul Mackerras /* 82d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 83d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 84d31626f7SPaul Mackerras * bit so that we know to restore the registers before 85d31626f7SPaul Mackerras * returning to userspace. 86d31626f7SPaul Mackerras */ 87d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 88d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 89d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 90829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 91d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 92d31626f7SPaul Mackerras } 93d31626f7SPaul Mackerras } 94dc16b553SCyril Bur 95dc16b553SCyril Bur static inline bool msr_tm_active(unsigned long msr) 96dc16b553SCyril Bur { 97dc16b553SCyril Bur return MSR_TM_ACTIVE(msr); 98dc16b553SCyril Bur } 99d31626f7SPaul Mackerras #else 100dc16b553SCyril Bur static inline bool msr_tm_active(unsigned long msr) { return false; } 101b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 102d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 103d31626f7SPaul Mackerras 1043eb5d588SAnton Blanchard bool strict_msr_control; 1053eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 1063eb5d588SAnton Blanchard 1073eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 1083eb5d588SAnton Blanchard { 1093eb5d588SAnton Blanchard strict_msr_control = true; 1103eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1113eb5d588SAnton Blanchard 1123eb5d588SAnton Blanchard return 0; 1133eb5d588SAnton Blanchard } 1143eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1153eb5d588SAnton Blanchard 1163cee070aSCyril Bur unsigned long msr_check_and_set(unsigned long bits) 117a0e72cf1SAnton Blanchard { 118a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 119a0e72cf1SAnton Blanchard unsigned long newmsr; 120a0e72cf1SAnton Blanchard 121a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 122a0e72cf1SAnton Blanchard 123a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 124a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 125a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 126a0e72cf1SAnton Blanchard #endif 127a0e72cf1SAnton Blanchard 128a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 129a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 1303cee070aSCyril Bur 1313cee070aSCyril Bur return newmsr; 132a0e72cf1SAnton Blanchard } 133a0e72cf1SAnton Blanchard 1343eb5d588SAnton Blanchard void __msr_check_and_clear(unsigned long bits) 135a0e72cf1SAnton Blanchard { 136a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 137a0e72cf1SAnton Blanchard unsigned long newmsr; 138a0e72cf1SAnton Blanchard 139a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 140a0e72cf1SAnton Blanchard 141a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 142a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 143a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 144a0e72cf1SAnton Blanchard #endif 145a0e72cf1SAnton Blanchard 146a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 147a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 148a0e72cf1SAnton Blanchard } 1493eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 150a0e72cf1SAnton Blanchard 151037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1528792468dSCyril Bur void __giveup_fpu(struct task_struct *tsk) 1538792468dSCyril Bur { 1548eb98037SAnton Blanchard unsigned long msr; 1558eb98037SAnton Blanchard 1568792468dSCyril Bur save_fpu(tsk); 1578eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 1588eb98037SAnton Blanchard msr &= ~MSR_FP; 1598792468dSCyril Bur #ifdef CONFIG_VSX 1608792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1618eb98037SAnton Blanchard msr &= ~MSR_VSX; 1628792468dSCyril Bur #endif 1638eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 1648792468dSCyril Bur } 1658792468dSCyril Bur 16698da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 16798da581eSAnton Blanchard { 16898da581eSAnton Blanchard check_if_tm_restore_required(tsk); 16998da581eSAnton Blanchard 170a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 17198da581eSAnton Blanchard __giveup_fpu(tsk); 172a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 17398da581eSAnton Blanchard } 17498da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 17598da581eSAnton Blanchard 17614cf11afSPaul Mackerras /* 17714cf11afSPaul Mackerras * Make sure the floating-point register state in the 17814cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 17914cf11afSPaul Mackerras */ 18014cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 18114cf11afSPaul Mackerras { 18214cf11afSPaul Mackerras if (tsk->thread.regs) { 18314cf11afSPaul Mackerras /* 18414cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 18514cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 18614cf11afSPaul Mackerras * test but before we have finished saving the FP registers 18714cf11afSPaul Mackerras * to the thread_struct. That process could take over the 18814cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 18914cf11afSPaul Mackerras * bogus values for the remaining FP registers. 19014cf11afSPaul Mackerras */ 19114cf11afSPaul Mackerras preempt_disable(); 19214cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 19314cf11afSPaul Mackerras /* 19414cf11afSPaul Mackerras * This should only ever be called for current or 19514cf11afSPaul Mackerras * for a stopped child process. Since we save away 196af1bbc3dSAnton Blanchard * the FP register state on context switch, 19714cf11afSPaul Mackerras * there is something wrong if a stopped child appears 19814cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 19914cf11afSPaul Mackerras */ 20014cf11afSPaul Mackerras BUG_ON(tsk != current); 201b86fd2bdSAnton Blanchard giveup_fpu(tsk); 20214cf11afSPaul Mackerras } 20314cf11afSPaul Mackerras preempt_enable(); 20414cf11afSPaul Mackerras } 20514cf11afSPaul Mackerras } 206de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 20714cf11afSPaul Mackerras 20814cf11afSPaul Mackerras void enable_kernel_fp(void) 20914cf11afSPaul Mackerras { 210e909fb83SCyril Bur unsigned long cpumsr; 211e909fb83SCyril Bur 21214cf11afSPaul Mackerras WARN_ON(preemptible()); 21314cf11afSPaul Mackerras 214e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP); 215611b0e5cSAnton Blanchard 216d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 217d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 218e909fb83SCyril Bur /* 219e909fb83SCyril Bur * If a thread has already been reclaimed then the 220e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 221e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 222e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 223e909fb83SCyril Bur * checkpointed structure. 224e909fb83SCyril Bur */ 225e909fb83SCyril Bur if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr)) 226e909fb83SCyril Bur return; 227a0e72cf1SAnton Blanchard __giveup_fpu(current); 228b86fd2bdSAnton Blanchard } 229d64d02ceSAnton Blanchard } 23014cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 23170fe3d98SCyril Bur 23270fe3d98SCyril Bur static int restore_fp(struct task_struct *tsk) { 233dc16b553SCyril Bur if (tsk->thread.load_fp || msr_tm_active(tsk->thread.regs->msr)) { 23470fe3d98SCyril Bur load_fp_state(¤t->thread.fp_state); 23570fe3d98SCyril Bur current->thread.load_fp++; 23670fe3d98SCyril Bur return 1; 23770fe3d98SCyril Bur } 23870fe3d98SCyril Bur return 0; 23970fe3d98SCyril Bur } 24070fe3d98SCyril Bur #else 24170fe3d98SCyril Bur static int restore_fp(struct task_struct *tsk) { return 0; } 242d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 24314cf11afSPaul Mackerras 24414cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 24570fe3d98SCyril Bur #define loadvec(thr) ((thr).load_vec) 24670fe3d98SCyril Bur 2476f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2486f515d84SCyril Bur { 2498eb98037SAnton Blanchard unsigned long msr; 2508eb98037SAnton Blanchard 2516f515d84SCyril Bur save_altivec(tsk); 2528eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2538eb98037SAnton Blanchard msr &= ~MSR_VEC; 2546f515d84SCyril Bur #ifdef CONFIG_VSX 2556f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2568eb98037SAnton Blanchard msr &= ~MSR_VSX; 2576f515d84SCyril Bur #endif 2588eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 2596f515d84SCyril Bur } 2606f515d84SCyril Bur 26198da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 26298da581eSAnton Blanchard { 26398da581eSAnton Blanchard check_if_tm_restore_required(tsk); 26498da581eSAnton Blanchard 265a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 26698da581eSAnton Blanchard __giveup_altivec(tsk); 267a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 26898da581eSAnton Blanchard } 26998da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 27098da581eSAnton Blanchard 27114cf11afSPaul Mackerras void enable_kernel_altivec(void) 27214cf11afSPaul Mackerras { 273e909fb83SCyril Bur unsigned long cpumsr; 274e909fb83SCyril Bur 27514cf11afSPaul Mackerras WARN_ON(preemptible()); 27614cf11afSPaul Mackerras 277e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_VEC); 278611b0e5cSAnton Blanchard 279d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 280d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 281e909fb83SCyril Bur /* 282e909fb83SCyril Bur * If a thread has already been reclaimed then the 283e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 284e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 285e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 286e909fb83SCyril Bur * checkpointed structure. 287e909fb83SCyril Bur */ 288e909fb83SCyril Bur if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr)) 289e909fb83SCyril Bur return; 290a0e72cf1SAnton Blanchard __giveup_altivec(current); 291b86fd2bdSAnton Blanchard } 292d64d02ceSAnton Blanchard } 29314cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 29414cf11afSPaul Mackerras 29514cf11afSPaul Mackerras /* 29614cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 29714cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 29814cf11afSPaul Mackerras */ 29914cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 30014cf11afSPaul Mackerras { 30114cf11afSPaul Mackerras if (tsk->thread.regs) { 30214cf11afSPaul Mackerras preempt_disable(); 30314cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 30414cf11afSPaul Mackerras BUG_ON(tsk != current); 305b86fd2bdSAnton Blanchard giveup_altivec(tsk); 30614cf11afSPaul Mackerras } 30714cf11afSPaul Mackerras preempt_enable(); 30814cf11afSPaul Mackerras } 30914cf11afSPaul Mackerras } 310de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 31170fe3d98SCyril Bur 31270fe3d98SCyril Bur static int restore_altivec(struct task_struct *tsk) 31370fe3d98SCyril Bur { 314dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && 315dc16b553SCyril Bur (tsk->thread.load_vec || msr_tm_active(tsk->thread.regs->msr))) { 31670fe3d98SCyril Bur load_vr_state(&tsk->thread.vr_state); 31770fe3d98SCyril Bur tsk->thread.used_vr = 1; 31870fe3d98SCyril Bur tsk->thread.load_vec++; 31970fe3d98SCyril Bur 32070fe3d98SCyril Bur return 1; 32170fe3d98SCyril Bur } 32270fe3d98SCyril Bur return 0; 32370fe3d98SCyril Bur } 32470fe3d98SCyril Bur #else 32570fe3d98SCyril Bur #define loadvec(thr) 0 32670fe3d98SCyril Bur static inline int restore_altivec(struct task_struct *tsk) { return 0; } 32714cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 32814cf11afSPaul Mackerras 329ce48b210SMichael Neuling #ifdef CONFIG_VSX 330bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 331a7d623d4SAnton Blanchard { 332a7d623d4SAnton Blanchard if (tsk->thread.regs->msr & MSR_FP) 333a7d623d4SAnton Blanchard __giveup_fpu(tsk); 334a7d623d4SAnton Blanchard if (tsk->thread.regs->msr & MSR_VEC) 335a7d623d4SAnton Blanchard __giveup_altivec(tsk); 336bf6a4d5bSCyril Bur tsk->thread.regs->msr &= ~MSR_VSX; 337bf6a4d5bSCyril Bur } 338bf6a4d5bSCyril Bur 339bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 340bf6a4d5bSCyril Bur { 341bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 342bf6a4d5bSCyril Bur 343bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 344a7d623d4SAnton Blanchard __giveup_vsx(tsk); 345a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 346a7d623d4SAnton Blanchard } 347bf6a4d5bSCyril Bur 348bf6a4d5bSCyril Bur static void save_vsx(struct task_struct *tsk) 349bf6a4d5bSCyril Bur { 350bf6a4d5bSCyril Bur if (tsk->thread.regs->msr & MSR_FP) 351bf6a4d5bSCyril Bur save_fpu(tsk); 352bf6a4d5bSCyril Bur if (tsk->thread.regs->msr & MSR_VEC) 353bf6a4d5bSCyril Bur save_altivec(tsk); 354bf6a4d5bSCyril Bur } 355a7d623d4SAnton Blanchard 356ce48b210SMichael Neuling void enable_kernel_vsx(void) 357ce48b210SMichael Neuling { 358e909fb83SCyril Bur unsigned long cpumsr; 359e909fb83SCyril Bur 360ce48b210SMichael Neuling WARN_ON(preemptible()); 361ce48b210SMichael Neuling 362e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 363611b0e5cSAnton Blanchard 364a0e72cf1SAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) { 365d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 366e909fb83SCyril Bur /* 367e909fb83SCyril Bur * If a thread has already been reclaimed then the 368e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 369e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 370e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 371e909fb83SCyril Bur * checkpointed structure. 372e909fb83SCyril Bur */ 373e909fb83SCyril Bur if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr)) 374e909fb83SCyril Bur return; 375a0e72cf1SAnton Blanchard if (current->thread.regs->msr & MSR_FP) 376a0e72cf1SAnton Blanchard __giveup_fpu(current); 377a0e72cf1SAnton Blanchard if (current->thread.regs->msr & MSR_VEC) 378a0e72cf1SAnton Blanchard __giveup_altivec(current); 379a0e72cf1SAnton Blanchard __giveup_vsx(current); 380611b0e5cSAnton Blanchard } 381ce48b210SMichael Neuling } 382ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 383ce48b210SMichael Neuling 384ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 385ce48b210SMichael Neuling { 386ce48b210SMichael Neuling if (tsk->thread.regs) { 387ce48b210SMichael Neuling preempt_disable(); 388ce48b210SMichael Neuling if (tsk->thread.regs->msr & MSR_VSX) { 389ce48b210SMichael Neuling BUG_ON(tsk != current); 390ce48b210SMichael Neuling giveup_vsx(tsk); 391ce48b210SMichael Neuling } 392ce48b210SMichael Neuling preempt_enable(); 393ce48b210SMichael Neuling } 394ce48b210SMichael Neuling } 395de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 39670fe3d98SCyril Bur 39770fe3d98SCyril Bur static int restore_vsx(struct task_struct *tsk) 39870fe3d98SCyril Bur { 39970fe3d98SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) { 40070fe3d98SCyril Bur tsk->thread.used_vsr = 1; 40170fe3d98SCyril Bur return 1; 40270fe3d98SCyril Bur } 40370fe3d98SCyril Bur 40470fe3d98SCyril Bur return 0; 40570fe3d98SCyril Bur } 40670fe3d98SCyril Bur #else 40770fe3d98SCyril Bur static inline int restore_vsx(struct task_struct *tsk) { return 0; } 408bf6a4d5bSCyril Bur static inline void save_vsx(struct task_struct *tsk) { } 409ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 410ce48b210SMichael Neuling 41114cf11afSPaul Mackerras #ifdef CONFIG_SPE 41298da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 41398da581eSAnton Blanchard { 41498da581eSAnton Blanchard check_if_tm_restore_required(tsk); 41598da581eSAnton Blanchard 416a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 41798da581eSAnton Blanchard __giveup_spe(tsk); 418a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 41998da581eSAnton Blanchard } 42098da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 42114cf11afSPaul Mackerras 42214cf11afSPaul Mackerras void enable_kernel_spe(void) 42314cf11afSPaul Mackerras { 42414cf11afSPaul Mackerras WARN_ON(preemptible()); 42514cf11afSPaul Mackerras 426a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 427611b0e5cSAnton Blanchard 428d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 429d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 430a0e72cf1SAnton Blanchard __giveup_spe(current); 43114cf11afSPaul Mackerras } 432d64d02ceSAnton Blanchard } 43314cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 43414cf11afSPaul Mackerras 43514cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 43614cf11afSPaul Mackerras { 43714cf11afSPaul Mackerras if (tsk->thread.regs) { 43814cf11afSPaul Mackerras preempt_disable(); 43914cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 44014cf11afSPaul Mackerras BUG_ON(tsk != current); 441685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 4420ee6c15eSKumar Gala giveup_spe(tsk); 44314cf11afSPaul Mackerras } 44414cf11afSPaul Mackerras preempt_enable(); 44514cf11afSPaul Mackerras } 44614cf11afSPaul Mackerras } 44714cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 44814cf11afSPaul Mackerras 449c2085059SAnton Blanchard static unsigned long msr_all_available; 450c2085059SAnton Blanchard 451c2085059SAnton Blanchard static int __init init_msr_all_available(void) 452c2085059SAnton Blanchard { 453c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 454c2085059SAnton Blanchard msr_all_available |= MSR_FP; 455c2085059SAnton Blanchard #endif 456c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 457c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 458c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 459c2085059SAnton Blanchard #endif 460c2085059SAnton Blanchard #ifdef CONFIG_VSX 461c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 462c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 463c2085059SAnton Blanchard #endif 464c2085059SAnton Blanchard #ifdef CONFIG_SPE 465c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 466c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 467c2085059SAnton Blanchard #endif 468c2085059SAnton Blanchard 469c2085059SAnton Blanchard return 0; 470c2085059SAnton Blanchard } 471c2085059SAnton Blanchard early_initcall(init_msr_all_available); 472c2085059SAnton Blanchard 473c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 474c2085059SAnton Blanchard { 475c2085059SAnton Blanchard unsigned long usermsr; 476c2085059SAnton Blanchard 477c2085059SAnton Blanchard if (!tsk->thread.regs) 478c2085059SAnton Blanchard return; 479c2085059SAnton Blanchard 480c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 481c2085059SAnton Blanchard 482c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 483c2085059SAnton Blanchard return; 484c2085059SAnton Blanchard 485c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 486b0f16b46SCyril Bur check_if_tm_restore_required(tsk); 487c2085059SAnton Blanchard 488c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 489c2085059SAnton Blanchard if (usermsr & MSR_FP) 490c2085059SAnton Blanchard __giveup_fpu(tsk); 491c2085059SAnton Blanchard #endif 492c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 493c2085059SAnton Blanchard if (usermsr & MSR_VEC) 494c2085059SAnton Blanchard __giveup_altivec(tsk); 495c2085059SAnton Blanchard #endif 496c2085059SAnton Blanchard #ifdef CONFIG_VSX 497c2085059SAnton Blanchard if (usermsr & MSR_VSX) 498c2085059SAnton Blanchard __giveup_vsx(tsk); 499c2085059SAnton Blanchard #endif 500c2085059SAnton Blanchard #ifdef CONFIG_SPE 501c2085059SAnton Blanchard if (usermsr & MSR_SPE) 502c2085059SAnton Blanchard __giveup_spe(tsk); 503c2085059SAnton Blanchard #endif 504c2085059SAnton Blanchard 505c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 506c2085059SAnton Blanchard } 507c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 508c2085059SAnton Blanchard 50970fe3d98SCyril Bur void restore_math(struct pt_regs *regs) 51070fe3d98SCyril Bur { 51170fe3d98SCyril Bur unsigned long msr; 51270fe3d98SCyril Bur 513dc16b553SCyril Bur if (!msr_tm_active(regs->msr) && 514dc16b553SCyril Bur !current->thread.load_fp && !loadvec(current->thread)) 51570fe3d98SCyril Bur return; 51670fe3d98SCyril Bur 51770fe3d98SCyril Bur msr = regs->msr; 51870fe3d98SCyril Bur msr_check_and_set(msr_all_available); 51970fe3d98SCyril Bur 52070fe3d98SCyril Bur /* 52170fe3d98SCyril Bur * Only reload if the bit is not set in the user MSR, the bit BEING set 52270fe3d98SCyril Bur * indicates that the registers are hot 52370fe3d98SCyril Bur */ 52470fe3d98SCyril Bur if ((!(msr & MSR_FP)) && restore_fp(current)) 52570fe3d98SCyril Bur msr |= MSR_FP | current->thread.fpexc_mode; 52670fe3d98SCyril Bur 52770fe3d98SCyril Bur if ((!(msr & MSR_VEC)) && restore_altivec(current)) 52870fe3d98SCyril Bur msr |= MSR_VEC; 52970fe3d98SCyril Bur 53070fe3d98SCyril Bur if ((msr & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC) && 53170fe3d98SCyril Bur restore_vsx(current)) { 53270fe3d98SCyril Bur msr |= MSR_VSX; 53370fe3d98SCyril Bur } 53470fe3d98SCyril Bur 53570fe3d98SCyril Bur msr_check_and_clear(msr_all_available); 53670fe3d98SCyril Bur 53770fe3d98SCyril Bur regs->msr = msr; 53870fe3d98SCyril Bur } 53970fe3d98SCyril Bur 540de2a20aaSCyril Bur void save_all(struct task_struct *tsk) 541de2a20aaSCyril Bur { 542de2a20aaSCyril Bur unsigned long usermsr; 543de2a20aaSCyril Bur 544de2a20aaSCyril Bur if (!tsk->thread.regs) 545de2a20aaSCyril Bur return; 546de2a20aaSCyril Bur 547de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 548de2a20aaSCyril Bur 549de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 550de2a20aaSCyril Bur return; 551de2a20aaSCyril Bur 552de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 553de2a20aaSCyril Bur 554bf6a4d5bSCyril Bur /* 555bf6a4d5bSCyril Bur * Saving the way the register space is in hardware, save_vsx boils 556bf6a4d5bSCyril Bur * down to a save_fpu() and save_altivec() 557bf6a4d5bSCyril Bur */ 558bf6a4d5bSCyril Bur if (usermsr & MSR_VSX) { 559bf6a4d5bSCyril Bur save_vsx(tsk); 560bf6a4d5bSCyril Bur } else { 561de2a20aaSCyril Bur if (usermsr & MSR_FP) 5628792468dSCyril Bur save_fpu(tsk); 563de2a20aaSCyril Bur 564de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5656f515d84SCyril Bur save_altivec(tsk); 566bf6a4d5bSCyril Bur } 567de2a20aaSCyril Bur 568de2a20aaSCyril Bur if (usermsr & MSR_SPE) 569de2a20aaSCyril Bur __giveup_spe(tsk); 570de2a20aaSCyril Bur 571de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 572de2a20aaSCyril Bur } 573de2a20aaSCyril Bur 574579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 575579e633eSAnton Blanchard { 576579e633eSAnton Blanchard if (tsk->thread.regs) { 577579e633eSAnton Blanchard preempt_disable(); 578579e633eSAnton Blanchard BUG_ON(tsk != current); 579de2a20aaSCyril Bur save_all(tsk); 580579e633eSAnton Blanchard 581579e633eSAnton Blanchard #ifdef CONFIG_SPE 582579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 583579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 584579e633eSAnton Blanchard #endif 585579e633eSAnton Blanchard 586579e633eSAnton Blanchard preempt_enable(); 587579e633eSAnton Blanchard } 588579e633eSAnton Blanchard } 589579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 590579e633eSAnton Blanchard 5913bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 5923bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 5933bffb652SDave Kleikamp unsigned long error_code, int signal_code, int breakpt) 5943bffb652SDave Kleikamp { 5953bffb652SDave Kleikamp siginfo_t info; 5963bffb652SDave Kleikamp 59741ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = signal_code; 5983bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 5993bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 6003bffb652SDave Kleikamp return; 6013bffb652SDave Kleikamp 6023bffb652SDave Kleikamp /* Deliver the signal to userspace */ 6033bffb652SDave Kleikamp info.si_signo = SIGTRAP; 6043bffb652SDave Kleikamp info.si_errno = breakpt; /* breakpoint or watchpoint id */ 6053bffb652SDave Kleikamp info.si_code = signal_code; 6063bffb652SDave Kleikamp info.si_addr = (void __user *)address; 6073bffb652SDave Kleikamp force_sig_info(SIGTRAP, &info, current); 6083bffb652SDave Kleikamp } 6093bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 6109422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 611d6a61bfcSLuis Machado unsigned long error_code) 612d6a61bfcSLuis Machado { 613d6a61bfcSLuis Machado siginfo_t info; 614d6a61bfcSLuis Machado 61541ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 616d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 617d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 618d6a61bfcSLuis Machado return; 619d6a61bfcSLuis Machado 6209422de3eSMichael Neuling if (debugger_break_match(regs)) 621d6a61bfcSLuis Machado return; 622d6a61bfcSLuis Machado 6239422de3eSMichael Neuling /* Clear the breakpoint */ 6249422de3eSMichael Neuling hw_breakpoint_disable(); 625d6a61bfcSLuis Machado 626d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 627d6a61bfcSLuis Machado info.si_signo = SIGTRAP; 628d6a61bfcSLuis Machado info.si_errno = 0; 629d6a61bfcSLuis Machado info.si_code = TRAP_HWBKPT; 630d6a61bfcSLuis Machado info.si_addr = (void __user *)address; 631d6a61bfcSLuis Machado force_sig_info(SIGTRAP, &info, current); 632d6a61bfcSLuis Machado } 6333bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 634d6a61bfcSLuis Machado 6359422de3eSMichael Neuling static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk); 636a2ceff5eSMichael Ellerman 6373bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6383bffb652SDave Kleikamp /* 6393bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 6403bffb652SDave Kleikamp */ 6413bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6423bffb652SDave Kleikamp { 64351ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 6443bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 64551ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 6463bffb652SDave Kleikamp #endif 64751ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 6483bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 64951ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 6503bffb652SDave Kleikamp #endif 65151ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 6523bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 6533bffb652SDave Kleikamp /* 6543bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 6553bffb652SDave Kleikamp */ 65651ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 6573bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 6583bffb652SDave Kleikamp /* 6593bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 6603bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 6613bffb652SDave Kleikamp */ 66251ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 6633bffb652SDave Kleikamp #else 66451ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 6653bffb652SDave Kleikamp #endif 6663bffb652SDave Kleikamp } 6673bffb652SDave Kleikamp 668f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 6693bffb652SDave Kleikamp { 6706cecf76bSScott Wood /* 6716cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 6726cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 6736cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 6746cecf76bSScott Wood */ 6756cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 6766cecf76bSScott Wood 677f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 678f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 6793bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 680f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 681f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 6823bffb652SDave Kleikamp #endif 683f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 684f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 6853bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 686f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 687f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 6883bffb652SDave Kleikamp #endif 689f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 690f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 6913bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 692f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 6933bffb652SDave Kleikamp #endif 6943bffb652SDave Kleikamp } 6953bffb652SDave Kleikamp /* 6963bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 6973bffb652SDave Kleikamp * debug registers, set the debug registers from the values 6983bffb652SDave Kleikamp * stored in the new thread. 6993bffb652SDave Kleikamp */ 700f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 7013bffb652SDave Kleikamp { 70251ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 703f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 704f5f97210SScott Wood prime_debug_regs(new_debug); 7053bffb652SDave Kleikamp } 7063743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 7073bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 708e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 7093bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 7103bffb652SDave Kleikamp { 7119422de3eSMichael Neuling thread->hw_brk.address = 0; 7129422de3eSMichael Neuling thread->hw_brk.type = 0; 713b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 7143bffb652SDave Kleikamp } 715e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 7163bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 7173bffb652SDave Kleikamp 718172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 7199422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7209422de3eSMichael Neuling { 721c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 722221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 723221c185dSDave Kleikamp isync(); 724221c185dSDave Kleikamp #endif 7259422de3eSMichael Neuling return 0; 7269422de3eSMichael Neuling } 727c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 7289422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7299422de3eSMichael Neuling { 730cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 73182a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 7324474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 733cab0af98SMichael Ellerman return 0; 73414cf11afSPaul Mackerras } 7354ad8622dSChristophe Leroy #elif defined(CONFIG_PPC_8xx) 7364ad8622dSChristophe Leroy static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7374ad8622dSChristophe Leroy { 7384ad8622dSChristophe Leroy unsigned long addr = dabr & ~HW_BRK_TYPE_DABR; 7394ad8622dSChristophe Leroy unsigned long lctrl1 = 0x90000000; /* compare type: equal on E & F */ 7404ad8622dSChristophe Leroy unsigned long lctrl2 = 0x8e000002; /* watchpoint 1 on cmp E | F */ 7414ad8622dSChristophe Leroy 7424ad8622dSChristophe Leroy if ((dabr & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_READ) 7434ad8622dSChristophe Leroy lctrl1 |= 0xa0000; 7444ad8622dSChristophe Leroy else if ((dabr & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_WRITE) 7454ad8622dSChristophe Leroy lctrl1 |= 0xf0000; 7464ad8622dSChristophe Leroy else if ((dabr & HW_BRK_TYPE_RDWR) == 0) 7474ad8622dSChristophe Leroy lctrl2 = 0; 7484ad8622dSChristophe Leroy 7494ad8622dSChristophe Leroy mtspr(SPRN_LCTRL2, 0); 7504ad8622dSChristophe Leroy mtspr(SPRN_CMPE, addr); 7514ad8622dSChristophe Leroy mtspr(SPRN_CMPF, addr + 4); 7524ad8622dSChristophe Leroy mtspr(SPRN_LCTRL1, lctrl1); 7534ad8622dSChristophe Leroy mtspr(SPRN_LCTRL2, lctrl2); 7544ad8622dSChristophe Leroy 7554ad8622dSChristophe Leroy return 0; 7564ad8622dSChristophe Leroy } 7579422de3eSMichael Neuling #else 7589422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7599422de3eSMichael Neuling { 7609422de3eSMichael Neuling return -EINVAL; 7619422de3eSMichael Neuling } 7629422de3eSMichael Neuling #endif 7639422de3eSMichael Neuling 7649422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 7659422de3eSMichael Neuling { 7669422de3eSMichael Neuling unsigned long dabr, dabrx; 7679422de3eSMichael Neuling 7689422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 7699422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 7709422de3eSMichael Neuling 7719422de3eSMichael Neuling if (ppc_md.set_dabr) 7729422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 7739422de3eSMichael Neuling 7749422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 7759422de3eSMichael Neuling } 7769422de3eSMichael Neuling 777bf99de36SMichael Neuling static inline int set_dawr(struct arch_hw_breakpoint *brk) 778bf99de36SMichael Neuling { 77905d694eaSMichael Neuling unsigned long dawr, dawrx, mrd; 780bf99de36SMichael Neuling 781bf99de36SMichael Neuling dawr = brk->address; 782bf99de36SMichael Neuling 783bf99de36SMichael Neuling dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \ 784bf99de36SMichael Neuling << (63 - 58); //* read/write bits */ 785bf99de36SMichael Neuling dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \ 786bf99de36SMichael Neuling << (63 - 59); //* translate */ 787bf99de36SMichael Neuling dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \ 788bf99de36SMichael Neuling >> 3; //* PRIM bits */ 78905d694eaSMichael Neuling /* dawr length is stored in field MDR bits 48:53. Matches range in 79005d694eaSMichael Neuling doublewords (64 bits) baised by -1 eg. 0b000000=1DW and 79105d694eaSMichael Neuling 0b111111=64DW. 79205d694eaSMichael Neuling brk->len is in bytes. 79305d694eaSMichael Neuling This aligns up to double word size, shifts and does the bias. 79405d694eaSMichael Neuling */ 79505d694eaSMichael Neuling mrd = ((brk->len + 7) >> 3) - 1; 79605d694eaSMichael Neuling dawrx |= (mrd & 0x3f) << (63 - 53); 797bf99de36SMichael Neuling 798bf99de36SMichael Neuling if (ppc_md.set_dawr) 799bf99de36SMichael Neuling return ppc_md.set_dawr(dawr, dawrx); 800bf99de36SMichael Neuling mtspr(SPRN_DAWR, dawr); 801bf99de36SMichael Neuling mtspr(SPRN_DAWRX, dawrx); 802bf99de36SMichael Neuling return 0; 803bf99de36SMichael Neuling } 804bf99de36SMichael Neuling 80521f58507SPaul Gortmaker void __set_breakpoint(struct arch_hw_breakpoint *brk) 8069422de3eSMichael Neuling { 80769111bacSChristoph Lameter memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk)); 8089422de3eSMichael Neuling 809bf99de36SMichael Neuling if (cpu_has_feature(CPU_FTR_DAWR)) 81004c32a51SPaul Gortmaker set_dawr(brk); 81104c32a51SPaul Gortmaker else 81204c32a51SPaul Gortmaker set_dabr(brk); 8139422de3eSMichael Neuling } 81414cf11afSPaul Mackerras 81521f58507SPaul Gortmaker void set_breakpoint(struct arch_hw_breakpoint *brk) 81621f58507SPaul Gortmaker { 81721f58507SPaul Gortmaker preempt_disable(); 81821f58507SPaul Gortmaker __set_breakpoint(brk); 81921f58507SPaul Gortmaker preempt_enable(); 82021f58507SPaul Gortmaker } 82121f58507SPaul Gortmaker 82206d67d54SPaul Mackerras #ifdef CONFIG_PPC64 82306d67d54SPaul Mackerras DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 82406d67d54SPaul Mackerras #endif 82514cf11afSPaul Mackerras 8269422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 8279422de3eSMichael Neuling struct arch_hw_breakpoint *b) 8289422de3eSMichael Neuling { 8299422de3eSMichael Neuling if (a->address != b->address) 8309422de3eSMichael Neuling return false; 8319422de3eSMichael Neuling if (a->type != b->type) 8329422de3eSMichael Neuling return false; 8339422de3eSMichael Neuling if (a->len != b->len) 8349422de3eSMichael Neuling return false; 8359422de3eSMichael Neuling return true; 8369422de3eSMichael Neuling } 837d31626f7SPaul Mackerras 838fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8395d176f75SCyril Bur 8405d176f75SCyril Bur static inline bool tm_enabled(struct task_struct *tsk) 8415d176f75SCyril Bur { 8425d176f75SCyril Bur return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); 8435d176f75SCyril Bur } 8445d176f75SCyril Bur 845d31626f7SPaul Mackerras static void tm_reclaim_thread(struct thread_struct *thr, 846d31626f7SPaul Mackerras struct thread_info *ti, uint8_t cause) 847d31626f7SPaul Mackerras { 8487f821fc9SMichael Neuling /* 8497f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 8507f821fc9SMichael Neuling * checkpointed state outstanding. 8517f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 8527f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 8537f821fc9SMichael Neuling * This will then directly return to userspace without going 8547f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 8557f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 8567f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 8577f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 8587f821fc9SMichael Neuling * this state. 8597f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 8607f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 861027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 8627f821fc9SMichael Neuling */ 8637f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 8647f821fc9SMichael Neuling return; 8657f821fc9SMichael Neuling 866dc310669SCyril Bur giveup_all(container_of(thr, struct task_struct, thread)); 867d31626f7SPaul Mackerras 868dc310669SCyril Bur tm_reclaim(thr, thr->ckpt_regs.msr, cause); 869d31626f7SPaul Mackerras } 870d31626f7SPaul Mackerras 871d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 872d31626f7SPaul Mackerras { 873d31626f7SPaul Mackerras tm_enable(); 874d31626f7SPaul Mackerras tm_reclaim_thread(¤t->thread, current_thread_info(), cause); 875d31626f7SPaul Mackerras } 876d31626f7SPaul Mackerras 877fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 878fb09692eSMichael Neuling { 879fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 880fb09692eSMichael Neuling * middle of a transaction. 881fb09692eSMichael Neuling * 882fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 883fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 884000ec280SCyril Bur * checkpointed (tbegin) state in ckpt_regs, ckfp_state and 885000ec280SCyril Bur * ckvr_state 886fb09692eSMichael Neuling * 887fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 888fb09692eSMichael Neuling */ 889fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 890fb09692eSMichael Neuling 891fb09692eSMichael Neuling if (!thr->regs) 892fb09692eSMichael Neuling return; 893fb09692eSMichael Neuling 894fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 895fb09692eSMichael Neuling goto out_and_saveregs; 896fb09692eSMichael Neuling 897fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 898fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 899fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 900fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 901fb09692eSMichael Neuling thr->regs->trap); 902fb09692eSMichael Neuling 903d31626f7SPaul Mackerras tm_reclaim_thread(thr, task_thread_info(tsk), TM_CAUSE_RESCHED); 904fb09692eSMichael Neuling 905fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 906fb09692eSMichael Neuling tsk->pid); 907fb09692eSMichael Neuling 908fb09692eSMichael Neuling out_and_saveregs: 909fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 910fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 911fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 912fb09692eSMichael Neuling * cannot happen later in _switch(). 913fb09692eSMichael Neuling */ 914fb09692eSMichael Neuling tm_save_sprs(thr); 915fb09692eSMichael Neuling } 916fb09692eSMichael Neuling 917e6b8fd02SMichael Neuling extern void __tm_recheckpoint(struct thread_struct *thread, 918e6b8fd02SMichael Neuling unsigned long orig_msr); 919e6b8fd02SMichael Neuling 920e6b8fd02SMichael Neuling void tm_recheckpoint(struct thread_struct *thread, 921e6b8fd02SMichael Neuling unsigned long orig_msr) 922e6b8fd02SMichael Neuling { 923e6b8fd02SMichael Neuling unsigned long flags; 924e6b8fd02SMichael Neuling 9255d176f75SCyril Bur if (!(thread->regs->msr & MSR_TM)) 9265d176f75SCyril Bur return; 9275d176f75SCyril Bur 928e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 929e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 930e6b8fd02SMichael Neuling * So let's hard disable over this region. 931e6b8fd02SMichael Neuling */ 932e6b8fd02SMichael Neuling local_irq_save(flags); 933e6b8fd02SMichael Neuling hard_irq_disable(); 934e6b8fd02SMichael Neuling 935e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 936e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 937e6b8fd02SMichael Neuling */ 938e6b8fd02SMichael Neuling tm_restore_sprs(thread); 939e6b8fd02SMichael Neuling 940e6b8fd02SMichael Neuling __tm_recheckpoint(thread, orig_msr); 941e6b8fd02SMichael Neuling 942e6b8fd02SMichael Neuling local_irq_restore(flags); 943e6b8fd02SMichael Neuling } 944e6b8fd02SMichael Neuling 945bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 946fb09692eSMichael Neuling { 947fb09692eSMichael Neuling unsigned long msr; 948fb09692eSMichael Neuling 949fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 950fb09692eSMichael Neuling return; 951fb09692eSMichael Neuling 952fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 953fb09692eSMichael Neuling * 954fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 955fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 956fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 957dc310669SCyril Bur * unavailable later, we are unable to determine which set of FP regs 958fb09692eSMichael Neuling * need to be restored. 959fb09692eSMichael Neuling */ 9605d176f75SCyril Bur if (!tm_enabled(new)) 961fb09692eSMichael Neuling return; 962fb09692eSMichael Neuling 963e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 964fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 965fb09692eSMichael Neuling return; 966e6b8fd02SMichael Neuling } 967829023dfSAnshuman Khandual msr = new->thread.ckpt_regs.msr; 968fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 969fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d " 970fb09692eSMichael Neuling "(new->msr 0x%lx, new->origmsr 0x%lx)\n", 971fb09692eSMichael Neuling new->pid, new->thread.regs->msr, msr); 972fb09692eSMichael Neuling 973fb09692eSMichael Neuling tm_recheckpoint(&new->thread, msr); 974fb09692eSMichael Neuling 975dc310669SCyril Bur /* 976dc310669SCyril Bur * The checkpointed state has been restored but the live state has 977dc310669SCyril Bur * not, ensure all the math functionality is turned off to trigger 978dc310669SCyril Bur * restore_math() to reload. 979dc310669SCyril Bur */ 980dc310669SCyril Bur new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); 981fb09692eSMichael Neuling 982fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 983fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 984fb09692eSMichael Neuling new->pid, mfmsr()); 985fb09692eSMichael Neuling } 986fb09692eSMichael Neuling 987dc310669SCyril Bur static inline void __switch_to_tm(struct task_struct *prev, 988dc310669SCyril Bur struct task_struct *new) 989fb09692eSMichael Neuling { 990fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 9915d176f75SCyril Bur if (tm_enabled(prev) || tm_enabled(new)) 992fb09692eSMichael Neuling tm_enable(); 9935d176f75SCyril Bur 9945d176f75SCyril Bur if (tm_enabled(prev)) { 9955d176f75SCyril Bur prev->thread.load_tm++; 996fb09692eSMichael Neuling tm_reclaim_task(prev); 9975d176f75SCyril Bur if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) 9985d176f75SCyril Bur prev->thread.regs->msr &= ~MSR_TM; 9995d176f75SCyril Bur } 10005d176f75SCyril Bur 1001dc310669SCyril Bur tm_recheckpoint_new_task(new); 1002fb09692eSMichael Neuling } 1003fb09692eSMichael Neuling } 1004d31626f7SPaul Mackerras 1005d31626f7SPaul Mackerras /* 1006d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 1007d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 1008d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 1009d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 1010d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 1011d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 1012d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 1013d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 1014d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 1015d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 1016d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 1017d31626f7SPaul Mackerras * state to use. 1018d31626f7SPaul Mackerras */ 1019d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 1020d31626f7SPaul Mackerras { 1021d31626f7SPaul Mackerras unsigned long msr_diff; 1022d31626f7SPaul Mackerras 1023dc310669SCyril Bur /* 1024dc310669SCyril Bur * This is the only moment we should clear TIF_RESTORE_TM as 1025dc310669SCyril Bur * it is here that ckpt_regs.msr and pt_regs.msr become the same 1026dc310669SCyril Bur * again, anything else could lead to an incorrect ckpt_msr being 1027dc310669SCyril Bur * saved and therefore incorrect signal contexts. 1028dc310669SCyril Bur */ 1029d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 1030d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 1031d31626f7SPaul Mackerras return; 1032d31626f7SPaul Mackerras 1033829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 1034d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 103570fe3d98SCyril Bur 1036dc16b553SCyril Bur /* Ensure that restore_math() will restore */ 1037dc16b553SCyril Bur if (msr_diff & MSR_FP) 1038dc16b553SCyril Bur current->thread.load_fp = 1; 103939715bf9SValentin Rothberg #ifdef CONFIG_ALTIVEC 1040dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC) 1041dc16b553SCyril Bur current->thread.load_vec = 1; 1042dc16b553SCyril Bur #endif 104370fe3d98SCyril Bur restore_math(regs); 104470fe3d98SCyril Bur 1045d31626f7SPaul Mackerras regs->msr |= msr_diff; 1046d31626f7SPaul Mackerras } 1047d31626f7SPaul Mackerras 1048fb09692eSMichael Neuling #else 1049fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 1050dc310669SCyril Bur #define __switch_to_tm(prev, new) 1051fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 10529422de3eSMichael Neuling 1053152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 1054152d523eSAnton Blanchard { 1055152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 105601d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1057152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1058152d523eSAnton Blanchard #endif 1059152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1060152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1061152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1062152d523eSAnton Blanchard 1063152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1064152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1065152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1066152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1067152d523eSAnton Blanchard 1068152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1069152d523eSAnton Blanchard 1070152d523eSAnton Blanchard /* 1071152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1072152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1073152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1074152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1075152d523eSAnton Blanchard */ 1076152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1077152d523eSAnton Blanchard } 1078152d523eSAnton Blanchard #endif 1079152d523eSAnton Blanchard } 1080152d523eSAnton Blanchard 1081152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1082152d523eSAnton Blanchard struct thread_struct *new_thread) 1083152d523eSAnton Blanchard { 1084152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1085152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1086152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1087152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1088152d523eSAnton Blanchard #endif 1089152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1090152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1091152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1092b57bd2deSMichael Neuling if (new_thread->dscr_inherit) 1093152d523eSAnton Blanchard dscr = new_thread->dscr; 1094152d523eSAnton Blanchard 1095152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1096152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1097152d523eSAnton Blanchard } 1098152d523eSAnton Blanchard 1099152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1100152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1101152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1102152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1103152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1104152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1105152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1106152d523eSAnton Blanchard 1107b57bd2deSMichael Neuling if (old_thread->fscr != new_thread->fscr) 1108b57bd2deSMichael Neuling mtspr(SPRN_FSCR, new_thread->fscr); 1109b57bd2deSMichael Neuling 1110152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1111152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1112152d523eSAnton Blanchard } 1113152d523eSAnton Blanchard #endif 1114152d523eSAnton Blanchard } 1115152d523eSAnton Blanchard 111614cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 111714cf11afSPaul Mackerras struct task_struct *new) 111814cf11afSPaul Mackerras { 111914cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 112014cf11afSPaul Mackerras struct task_struct *last; 1121d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 1122d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1123d6bf29b4SPeter Zijlstra #endif 112414cf11afSPaul Mackerras 1125152d523eSAnton Blanchard new_thread = &new->thread; 1126152d523eSAnton Blanchard old_thread = ¤t->thread; 1127152d523eSAnton Blanchard 11287ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 11297ba5fef7SMichael Neuling 113006d67d54SPaul Mackerras #ifdef CONFIG_PPC64 113106d67d54SPaul Mackerras /* 113206d67d54SPaul Mackerras * Collect processor utilization data per process 113306d67d54SPaul Mackerras */ 113406d67d54SPaul Mackerras if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 113569111bacSChristoph Lameter struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array); 113606d67d54SPaul Mackerras long unsigned start_tb, current_tb; 113706d67d54SPaul Mackerras start_tb = old_thread->start_tb; 113806d67d54SPaul Mackerras cu->current_tb = current_tb = mfspr(SPRN_PURR); 113906d67d54SPaul Mackerras old_thread->accum_tb += (current_tb - start_tb); 114006d67d54SPaul Mackerras new_thread->start_tb = current_tb; 114106d67d54SPaul Mackerras } 1142d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC64 */ 1143d6bf29b4SPeter Zijlstra 1144caca285eSAneesh Kumar K.V #ifdef CONFIG_PPC_STD_MMU_64 114569111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1146d6bf29b4SPeter Zijlstra if (batch->active) { 1147d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1148d6bf29b4SPeter Zijlstra if (batch->index) 1149d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1150d6bf29b4SPeter Zijlstra batch->active = 0; 1151d6bf29b4SPeter Zijlstra } 1152caca285eSAneesh Kumar K.V #endif /* CONFIG_PPC_STD_MMU_64 */ 115306d67d54SPaul Mackerras 1154f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1155f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1156f3d885ccSAnton Blanchard #else 1157f3d885ccSAnton Blanchard /* 1158f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1159f3d885ccSAnton Blanchard * schedule DABR 1160f3d885ccSAnton Blanchard */ 1161f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1162f3d885ccSAnton Blanchard if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk))) 1163f3d885ccSAnton Blanchard __set_breakpoint(&new->thread.hw_brk); 1164f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1165f3d885ccSAnton Blanchard #endif 1166f3d885ccSAnton Blanchard 1167f3d885ccSAnton Blanchard /* 1168f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1169f3d885ccSAnton Blanchard * change a number of them. 1170f3d885ccSAnton Blanchard */ 1171f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1172f3d885ccSAnton Blanchard 1173f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1174f3d885ccSAnton Blanchard giveup_all(prev); 1175f3d885ccSAnton Blanchard 1176dc310669SCyril Bur __switch_to_tm(prev, new); 1177dc310669SCyril Bur 117844387e9fSAnton Blanchard /* 117944387e9fSAnton Blanchard * We can't take a PMU exception inside _switch() since there is a 118044387e9fSAnton Blanchard * window where the kernel stack SLB and the kernel stack are out 118144387e9fSAnton Blanchard * of sync. Hard disable here. 118244387e9fSAnton Blanchard */ 118344387e9fSAnton Blanchard hard_irq_disable(); 1184bc2a9408SMichael Neuling 118520dbe670SAnton Blanchard /* 118620dbe670SAnton Blanchard * Call restore_sprs() before calling _switch(). If we move it after 118720dbe670SAnton Blanchard * _switch() then we miss out on calling it for new tasks. The reason 118820dbe670SAnton Blanchard * for this is we manually create a stack frame for new tasks that 118920dbe670SAnton Blanchard * directly returns through ret_from_fork() or 119020dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 119120dbe670SAnton Blanchard */ 1192f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1193f3d885ccSAnton Blanchard 119420dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 119520dbe670SAnton Blanchard 1196caca285eSAneesh Kumar K.V #ifdef CONFIG_PPC_STD_MMU_64 1197d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1198d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 119969111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1200d6bf29b4SPeter Zijlstra batch->active = 1; 1201d6bf29b4SPeter Zijlstra } 120270fe3d98SCyril Bur 120370fe3d98SCyril Bur if (current_thread_info()->task->thread.regs) 120470fe3d98SCyril Bur restore_math(current_thread_info()->task->thread.regs); 1205caca285eSAneesh Kumar K.V #endif /* CONFIG_PPC_STD_MMU_64 */ 1206d6bf29b4SPeter Zijlstra 120714cf11afSPaul Mackerras return last; 120814cf11afSPaul Mackerras } 120914cf11afSPaul Mackerras 121006d67d54SPaul Mackerras static int instructions_to_print = 16; 121106d67d54SPaul Mackerras 121206d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 121306d67d54SPaul Mackerras { 121406d67d54SPaul Mackerras int i; 121506d67d54SPaul Mackerras unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 121606d67d54SPaul Mackerras sizeof(int)); 121706d67d54SPaul Mackerras 121806d67d54SPaul Mackerras printk("Instruction dump:"); 121906d67d54SPaul Mackerras 122006d67d54SPaul Mackerras for (i = 0; i < instructions_to_print; i++) { 122106d67d54SPaul Mackerras int instr; 122206d67d54SPaul Mackerras 122306d67d54SPaul Mackerras if (!(i % 8)) 12242ffd04deSAndrew Donnellan pr_cont("\n"); 122506d67d54SPaul Mackerras 12260de2d820SScott Wood #if !defined(CONFIG_BOOKE) 12270de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 12280de2d820SScott Wood * than print XXXXXXXX. 12290de2d820SScott Wood */ 12300de2d820SScott Wood if (!(regs->msr & MSR_IR)) 12310de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 12320de2d820SScott Wood #endif 12330de2d820SScott Wood 123400ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 12357b051f66SAnton Blanchard probe_kernel_address((unsigned int __user *)pc, instr)) { 12362ffd04deSAndrew Donnellan pr_cont("XXXXXXXX "); 123706d67d54SPaul Mackerras } else { 123806d67d54SPaul Mackerras if (regs->nip == pc) 12392ffd04deSAndrew Donnellan pr_cont("<%08x> ", instr); 124006d67d54SPaul Mackerras else 12412ffd04deSAndrew Donnellan pr_cont("%08x ", instr); 124206d67d54SPaul Mackerras } 124306d67d54SPaul Mackerras 124406d67d54SPaul Mackerras pc += sizeof(int); 124506d67d54SPaul Mackerras } 124606d67d54SPaul Mackerras 12472ffd04deSAndrew Donnellan pr_cont("\n"); 124806d67d54SPaul Mackerras } 124906d67d54SPaul Mackerras 1250801c0b2cSMichael Neuling struct regbit { 125106d67d54SPaul Mackerras unsigned long bit; 125206d67d54SPaul Mackerras const char *name; 1253801c0b2cSMichael Neuling }; 1254801c0b2cSMichael Neuling 1255801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 12563bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 12573bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 12583bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 12593bfd0c9cSAnton Blanchard #endif 12603bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 12613bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 12623bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 12633bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 12643bfd0c9cSAnton Blanchard #endif 126506d67d54SPaul Mackerras {MSR_EE, "EE"}, 126606d67d54SPaul Mackerras {MSR_PR, "PR"}, 126706d67d54SPaul Mackerras {MSR_FP, "FP"}, 126806d67d54SPaul Mackerras {MSR_ME, "ME"}, 12693bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 12701b98326bSKumar Gala {MSR_DE, "DE"}, 12713bfd0c9cSAnton Blanchard #else 12723bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 12733bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 12743bfd0c9cSAnton Blanchard #endif 127506d67d54SPaul Mackerras {MSR_IR, "IR"}, 127606d67d54SPaul Mackerras {MSR_DR, "DR"}, 12773bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 12783bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 12793bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 12803bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 12813bfd0c9cSAnton Blanchard #endif 128206d67d54SPaul Mackerras {0, NULL} 128306d67d54SPaul Mackerras }; 128406d67d54SPaul Mackerras 1285801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 128606d67d54SPaul Mackerras { 1287801c0b2cSMichael Neuling const char *s = ""; 128806d67d54SPaul Mackerras 128906d67d54SPaul Mackerras for (; bits->bit; ++bits) 129006d67d54SPaul Mackerras if (val & bits->bit) { 1291db5ba5aeSMichael Ellerman pr_cont("%s%s", s, bits->name); 1292801c0b2cSMichael Neuling s = sep; 129306d67d54SPaul Mackerras } 1294801c0b2cSMichael Neuling } 1295801c0b2cSMichael Neuling 1296801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1297801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1298801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1299801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1300801c0b2cSMichael Neuling {MSR_TM, "E"}, 1301801c0b2cSMichael Neuling {0, NULL} 1302801c0b2cSMichael Neuling }; 1303801c0b2cSMichael Neuling 1304801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1305801c0b2cSMichael Neuling { 1306801c0b2cSMichael Neuling /* 1307801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1308801c0b2cSMichael Neuling * Inside the TM[], the output means: 1309801c0b2cSMichael Neuling * E: Enabled (bit 32) 1310801c0b2cSMichael Neuling * S: Suspended (bit 33) 1311801c0b2cSMichael Neuling * T: Transactional (bit 34) 1312801c0b2cSMichael Neuling */ 1313801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1314db5ba5aeSMichael Ellerman pr_cont(",TM["); 1315801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1316db5ba5aeSMichael Ellerman pr_cont("]"); 1317801c0b2cSMichael Neuling } 1318801c0b2cSMichael Neuling } 1319801c0b2cSMichael Neuling #else 1320801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1321801c0b2cSMichael Neuling #endif 1322801c0b2cSMichael Neuling 1323801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1324801c0b2cSMichael Neuling { 1325db5ba5aeSMichael Ellerman pr_cont("<"); 1326801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1327801c0b2cSMichael Neuling print_tm_bits(val); 1328db5ba5aeSMichael Ellerman pr_cont(">"); 132906d67d54SPaul Mackerras } 133006d67d54SPaul Mackerras 133106d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1332f6f7dde3Santon@samba.org #define REG "%016lx" 133306d67d54SPaul Mackerras #define REGS_PER_LINE 4 133406d67d54SPaul Mackerras #define LAST_VOLATILE 13 133506d67d54SPaul Mackerras #else 1336f6f7dde3Santon@samba.org #define REG "%08lx" 133706d67d54SPaul Mackerras #define REGS_PER_LINE 8 133806d67d54SPaul Mackerras #define LAST_VOLATILE 12 133906d67d54SPaul Mackerras #endif 134006d67d54SPaul Mackerras 134114cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 134214cf11afSPaul Mackerras { 134314cf11afSPaul Mackerras int i, trap; 134414cf11afSPaul Mackerras 1345a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1346a43cb95dSTejun Heo 134706d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 134806d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 134906d67d54SPaul Mackerras printk("REGS: %p TRAP: %04lx %s (%s)\n", 135096b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 135106d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1352801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1353f6f7dde3Santon@samba.org printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 135414cf11afSPaul Mackerras trap = TRAP(regs); 13555115a026SMichael Neuling if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 13567dae865fSMichael Ellerman pr_cont("CFAR: "REG" ", regs->orig_gpr3); 1357c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1358ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 13597dae865fSMichael Ellerman pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 136014170789SKumar Gala #else 13617dae865fSMichael Ellerman pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 13629db8bcfdSAnton Blanchard #endif 13639db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 13647dae865fSMichael Ellerman pr_cont("SOFTE: %ld ", regs->softe); 13659db8bcfdSAnton Blanchard #endif 13669db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 13676d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 13687dae865fSMichael Ellerman pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 136914170789SKumar Gala #endif 137014cf11afSPaul Mackerras 137114cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 137206d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 13737dae865fSMichael Ellerman pr_cont("\nGPR%02d: ", i); 13747dae865fSMichael Ellerman pr_cont(REG " ", regs->gpr[i]); 137506d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 137614cf11afSPaul Mackerras break; 137714cf11afSPaul Mackerras } 13787dae865fSMichael Ellerman pr_cont("\n"); 137914cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 138014cf11afSPaul Mackerras /* 138114cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 138214cf11afSPaul Mackerras * above info out without failing 138314cf11afSPaul Mackerras */ 1384058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1385058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 138614cf11afSPaul Mackerras #endif 138714cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 138806d67d54SPaul Mackerras if (!user_mode(regs)) 138906d67d54SPaul Mackerras show_instructions(regs); 139014cf11afSPaul Mackerras } 139114cf11afSPaul Mackerras 139214cf11afSPaul Mackerras void flush_thread(void) 139314cf11afSPaul Mackerras { 1394e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 13955aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1396e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 13973bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1398e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 139914cf11afSPaul Mackerras } 140014cf11afSPaul Mackerras 140114cf11afSPaul Mackerras void 140214cf11afSPaul Mackerras release_thread(struct task_struct *t) 140314cf11afSPaul Mackerras { 140414cf11afSPaul Mackerras } 140514cf11afSPaul Mackerras 140614cf11afSPaul Mackerras /* 140755ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 140855ccf3feSSuresh Siddha * copy the current task into the new thread. 140914cf11afSPaul Mackerras */ 141055ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 141114cf11afSPaul Mackerras { 1412579e633eSAnton Blanchard flush_all_to_thread(src); 1413621b5060SMichael Neuling /* 1414621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1415621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1416621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1417621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1418621b5060SMichael Neuling * checkpointed state back and the TM mode. 14195d176f75SCyril Bur * 14205d176f75SCyril Bur * Can't pass dst because it isn't ready. Doesn't matter, passing 14215d176f75SCyril Bur * dst is only important for __switch_to() 1422621b5060SMichael Neuling */ 1423dc310669SCyril Bur __switch_to_tm(src, src); 1424330a1eb7SMichael Ellerman 142555ccf3feSSuresh Siddha *dst = *src; 1426330a1eb7SMichael Ellerman 1427330a1eb7SMichael Ellerman clear_task_ebb(dst); 1428330a1eb7SMichael Ellerman 142955ccf3feSSuresh Siddha return 0; 143014cf11afSPaul Mackerras } 143114cf11afSPaul Mackerras 1432cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1433cec15488SMichael Ellerman { 1434cec15488SMichael Ellerman #ifdef CONFIG_PPC_STD_MMU_64 1435cec15488SMichael Ellerman unsigned long sp_vsid; 1436cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1437cec15488SMichael Ellerman 1438caca285eSAneesh Kumar K.V if (radix_enabled()) 1439caca285eSAneesh Kumar K.V return; 1440caca285eSAneesh Kumar K.V 1441cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1442cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1443cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1444cec15488SMichael Ellerman else 1445cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1446cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1447cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1448cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1449cec15488SMichael Ellerman #endif 1450cec15488SMichael Ellerman } 1451cec15488SMichael Ellerman 145214cf11afSPaul Mackerras /* 145314cf11afSPaul Mackerras * Copy a thread.. 145414cf11afSPaul Mackerras */ 1455efcac658SAlexey Kardashevskiy 14566eca8933SAlex Dowad /* 14576eca8933SAlex Dowad * Copy architecture-specific thread state 14586eca8933SAlex Dowad */ 14596f2c55b8SAlexey Dobriyan int copy_thread(unsigned long clone_flags, unsigned long usp, 14606eca8933SAlex Dowad unsigned long kthread_arg, struct task_struct *p) 146114cf11afSPaul Mackerras { 146214cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 146314cf11afSPaul Mackerras extern void ret_from_fork(void); 146458254e10SAl Viro extern void ret_from_kernel_thread(void); 146558254e10SAl Viro void (*f)(void); 14660cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 14675d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 14685d31a96eSMichael Ellerman 14695d31a96eSMichael Ellerman klp_init_thread_info(ti); 147014cf11afSPaul Mackerras 147114cf11afSPaul Mackerras /* Copy registers */ 147214cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 147314cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1474ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 14756eca8933SAlex Dowad /* kernel thread */ 147658254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 147714cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 14787cedd601SAnton Blanchard /* function */ 14797cedd601SAnton Blanchard if (usp) 14807cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 148158254e10SAl Viro #ifdef CONFIG_PPC64 1482b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1483138d1ce8SAl Viro childregs->softe = 1; 148406d67d54SPaul Mackerras #endif 14856eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 148614cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1487138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 148858254e10SAl Viro f = ret_from_kernel_thread; 148914cf11afSPaul Mackerras } else { 14906eca8933SAlex Dowad /* user thread */ 1491afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 149258254e10SAl Viro CHECK_FULL_REGS(regs); 149358254e10SAl Viro *childregs = *regs; 1494ea516b11SAl Viro if (usp) 149514cf11afSPaul Mackerras childregs->gpr[1] = usp; 149614cf11afSPaul Mackerras p->thread.regs = childregs; 149758254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 149806d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 149906d67d54SPaul Mackerras #ifdef CONFIG_PPC64 15009904b005SDenis Kirjanov if (!is_32bit_task()) 150106d67d54SPaul Mackerras childregs->gpr[13] = childregs->gpr[6]; 150206d67d54SPaul Mackerras else 150306d67d54SPaul Mackerras #endif 150414cf11afSPaul Mackerras childregs->gpr[2] = childregs->gpr[6]; 150514cf11afSPaul Mackerras } 150658254e10SAl Viro 150758254e10SAl Viro f = ret_from_fork; 150806d67d54SPaul Mackerras } 1509d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 151014cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 151114cf11afSPaul Mackerras 151214cf11afSPaul Mackerras /* 151314cf11afSPaul Mackerras * The way this works is that at some point in the future 151414cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 151514cf11afSPaul Mackerras * That will pop off the stack frame created below and start 151614cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 151714cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 151814cf11afSPaul Mackerras * system call, using the stack frame created above. 151914cf11afSPaul Mackerras */ 1520af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 152114cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 152214cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 152314cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 152414cf11afSPaul Mackerras p->thread.ksp = sp; 1525cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 152685218827SKumar Gala p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 152785218827SKumar Gala _ALIGN_UP(sizeof(struct thread_info), 16); 1528cbc9565eSBenjamin Herrenschmidt #endif 152928d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 153028d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 153128d170abSOleg Nesterov #endif 153228d170abSOleg Nesterov 153318461960SPaul Mackerras p->thread.fp_save_area = NULL; 153418461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 153518461960SPaul Mackerras p->thread.vr_save_area = NULL; 153618461960SPaul Mackerras #endif 153718461960SPaul Mackerras 1538cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 153906d67d54SPaul Mackerras 1540efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1541efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 15421021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1543db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1544efcac658SAlexey Kardashevskiy } 154592779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 154692779245SHaren Myneni p->thread.ppr = INIT_PPR; 1547efcac658SAlexey Kardashevskiy #endif 15487cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 154914cf11afSPaul Mackerras return 0; 155014cf11afSPaul Mackerras } 155114cf11afSPaul Mackerras 155214cf11afSPaul Mackerras /* 155314cf11afSPaul Mackerras * Set up a thread for executing a new program 155414cf11afSPaul Mackerras */ 155506d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 155614cf11afSPaul Mackerras { 155790eac727SMichael Ellerman #ifdef CONFIG_PPC64 155890eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 155990eac727SMichael Ellerman #endif 156090eac727SMichael Ellerman 156106d67d54SPaul Mackerras /* 156206d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 156306d67d54SPaul Mackerras * set. Do it now. 156406d67d54SPaul Mackerras */ 156506d67d54SPaul Mackerras if (!current->thread.regs) { 15660cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 15670cec6fd1SAl Viro current->thread.regs = regs - 1; 156806d67d54SPaul Mackerras } 156906d67d54SPaul Mackerras 15708e96a87cSCyril Bur #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 15718e96a87cSCyril Bur /* 15728e96a87cSCyril Bur * Clear any transactional state, we're exec()ing. The cause is 15738e96a87cSCyril Bur * not important as there will never be a recheckpoint so it's not 15748e96a87cSCyril Bur * user visible. 15758e96a87cSCyril Bur */ 15768e96a87cSCyril Bur if (MSR_TM_SUSPENDED(mfmsr())) 15778e96a87cSCyril Bur tm_reclaim_current(0); 15788e96a87cSCyril Bur #endif 15798e96a87cSCyril Bur 158014cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 158114cf11afSPaul Mackerras regs->ctr = 0; 158214cf11afSPaul Mackerras regs->link = 0; 158314cf11afSPaul Mackerras regs->xer = 0; 158414cf11afSPaul Mackerras regs->ccr = 0; 158514cf11afSPaul Mackerras regs->gpr[1] = sp; 158606d67d54SPaul Mackerras 1587474f8196SRoland McGrath /* 1588474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1589474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1590474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1591474f8196SRoland McGrath */ 1592474f8196SRoland McGrath regs->trap &= ~1UL; 1593474f8196SRoland McGrath 159406d67d54SPaul Mackerras #ifdef CONFIG_PPC32 159506d67d54SPaul Mackerras regs->mq = 0; 159606d67d54SPaul Mackerras regs->nip = start; 159714cf11afSPaul Mackerras regs->msr = MSR_USER; 159806d67d54SPaul Mackerras #else 15999904b005SDenis Kirjanov if (!is_32bit_task()) { 160094af3abfSRusty Russell unsigned long entry; 160106d67d54SPaul Mackerras 160294af3abfSRusty Russell if (is_elf2_task()) { 160394af3abfSRusty Russell /* Look ma, no function descriptors! */ 160494af3abfSRusty Russell entry = start; 160594af3abfSRusty Russell 160694af3abfSRusty Russell /* 160794af3abfSRusty Russell * Ulrich says: 160894af3abfSRusty Russell * The latest iteration of the ABI requires that when 160994af3abfSRusty Russell * calling a function (at its global entry point), 161094af3abfSRusty Russell * the caller must ensure r12 holds the entry point 161194af3abfSRusty Russell * address (so that the function can quickly 161294af3abfSRusty Russell * establish addressability). 161394af3abfSRusty Russell */ 161494af3abfSRusty Russell regs->gpr[12] = start; 161594af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 161694af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 161794af3abfSRusty Russell } else { 161894af3abfSRusty Russell unsigned long toc; 161994af3abfSRusty Russell 162094af3abfSRusty Russell /* start is a relocated pointer to the function 162194af3abfSRusty Russell * descriptor for the elf _start routine. The first 162294af3abfSRusty Russell * entry in the function descriptor is the entry 162394af3abfSRusty Russell * address of _start and the second entry is the TOC 162494af3abfSRusty Russell * value we need to use. 162506d67d54SPaul Mackerras */ 162606d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 162706d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 162806d67d54SPaul Mackerras 162906d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 163006d67d54SPaul Mackerras * need to be relocated before we can use them. 163106d67d54SPaul Mackerras */ 163206d67d54SPaul Mackerras if (load_addr != 0) { 163306d67d54SPaul Mackerras entry += load_addr; 163406d67d54SPaul Mackerras toc += load_addr; 163506d67d54SPaul Mackerras } 163606d67d54SPaul Mackerras regs->gpr[2] = toc; 163794af3abfSRusty Russell } 163894af3abfSRusty Russell regs->nip = entry; 163906d67d54SPaul Mackerras regs->msr = MSR_USER64; 1640d4bf9a78SStephen Rothwell } else { 1641d4bf9a78SStephen Rothwell regs->nip = start; 1642d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1643d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 164406d67d54SPaul Mackerras } 164506d67d54SPaul Mackerras #endif 1646ce48b210SMichael Neuling #ifdef CONFIG_VSX 1647ce48b210SMichael Neuling current->thread.used_vsr = 0; 1648ce48b210SMichael Neuling #endif 1649de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 165018461960SPaul Mackerras current->thread.fp_save_area = NULL; 165114cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1652de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1653de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 165418461960SPaul Mackerras current->thread.vr_save_area = NULL; 165514cf11afSPaul Mackerras current->thread.vrsave = 0; 165614cf11afSPaul Mackerras current->thread.used_vr = 0; 165714cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 165814cf11afSPaul Mackerras #ifdef CONFIG_SPE 165914cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 166014cf11afSPaul Mackerras current->thread.acc = 0; 166114cf11afSPaul Mackerras current->thread.spefscr = 0; 166214cf11afSPaul Mackerras current->thread.used_spe = 0; 166314cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1664bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1665bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1666bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1667bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 1668bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 166914cf11afSPaul Mackerras } 1670e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 167114cf11afSPaul Mackerras 167214cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 167314cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 167414cf11afSPaul Mackerras 167514cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 167614cf11afSPaul Mackerras { 167714cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 167814cf11afSPaul Mackerras 167914cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 168014cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 168114cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 168214cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 168314cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 168414cf11afSPaul Mackerras #ifdef CONFIG_SPE 16855e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1686640e9225SJoseph Myers /* 1687640e9225SJoseph Myers * When the sticky exception bits are set 1688640e9225SJoseph Myers * directly by userspace, it must call prctl 1689640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1690640e9225SJoseph Myers * in the existing prctl settings) or 1691640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1692640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1693640e9225SJoseph Myers * saving and restoring the whole 1694640e9225SJoseph Myers * floating-point environment need to do so 1695640e9225SJoseph Myers * anyway to restore the prctl settings from 1696640e9225SJoseph Myers * the saved environment. 1697640e9225SJoseph Myers */ 1698640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 169914cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 170014cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 170106d67d54SPaul Mackerras return 0; 17025e14d21eSKumar Gala } else { 17035e14d21eSKumar Gala return -EINVAL; 17045e14d21eSKumar Gala } 170514cf11afSPaul Mackerras #else 170614cf11afSPaul Mackerras return -EINVAL; 170714cf11afSPaul Mackerras #endif 170806d67d54SPaul Mackerras } 170906d67d54SPaul Mackerras 171014cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 171114cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 171214cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 171314cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 171414cf11afSPaul Mackerras * them does not change anything */ 171514cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 171614cf11afSPaul Mackerras return -EINVAL; 171714cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 171814cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 171914cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 172014cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 172114cf11afSPaul Mackerras return 0; 172214cf11afSPaul Mackerras } 172314cf11afSPaul Mackerras 172414cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 172514cf11afSPaul Mackerras { 172614cf11afSPaul Mackerras unsigned int val; 172714cf11afSPaul Mackerras 172814cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 172914cf11afSPaul Mackerras #ifdef CONFIG_SPE 1730640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1731640e9225SJoseph Myers /* 1732640e9225SJoseph Myers * When the sticky exception bits are set 1733640e9225SJoseph Myers * directly by userspace, it must call prctl 1734640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1735640e9225SJoseph Myers * in the existing prctl settings) or 1736640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1737640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1738640e9225SJoseph Myers * saving and restoring the whole 1739640e9225SJoseph Myers * floating-point environment need to do so 1740640e9225SJoseph Myers * anyway to restore the prctl settings from 1741640e9225SJoseph Myers * the saved environment. 1742640e9225SJoseph Myers */ 1743640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 174414cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1745640e9225SJoseph Myers } else 17465e14d21eSKumar Gala return -EINVAL; 174714cf11afSPaul Mackerras #else 174814cf11afSPaul Mackerras return -EINVAL; 174914cf11afSPaul Mackerras #endif 175014cf11afSPaul Mackerras else 175114cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 175214cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 175314cf11afSPaul Mackerras } 175414cf11afSPaul Mackerras 1755fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1756fab5db97SPaul Mackerras { 1757fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1758fab5db97SPaul Mackerras 1759fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1760fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1761fab5db97SPaul Mackerras return -EINVAL; 1762fab5db97SPaul Mackerras 1763fab5db97SPaul Mackerras if (regs == NULL) 1764fab5db97SPaul Mackerras return -EINVAL; 1765fab5db97SPaul Mackerras 1766fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1767fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1768fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1769fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1770fab5db97SPaul Mackerras else 1771fab5db97SPaul Mackerras return -EINVAL; 1772fab5db97SPaul Mackerras 1773fab5db97SPaul Mackerras return 0; 1774fab5db97SPaul Mackerras } 1775fab5db97SPaul Mackerras 1776fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 1777fab5db97SPaul Mackerras { 1778fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1779fab5db97SPaul Mackerras unsigned int val; 1780fab5db97SPaul Mackerras 1781fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 1782fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 1783fab5db97SPaul Mackerras return -EINVAL; 1784fab5db97SPaul Mackerras 1785fab5db97SPaul Mackerras if (regs == NULL) 1786fab5db97SPaul Mackerras return -EINVAL; 1787fab5db97SPaul Mackerras 1788fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 1789fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 1790fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 1791fab5db97SPaul Mackerras else 1792fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 1793fab5db97SPaul Mackerras } else 1794fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 1795fab5db97SPaul Mackerras 1796fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 1797fab5db97SPaul Mackerras } 1798fab5db97SPaul Mackerras 1799e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 1800e9370ae1SPaul Mackerras { 1801e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 1802e9370ae1SPaul Mackerras return 0; 1803e9370ae1SPaul Mackerras } 1804e9370ae1SPaul Mackerras 1805e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1806e9370ae1SPaul Mackerras { 1807e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1808e9370ae1SPaul Mackerras } 1809e9370ae1SPaul Mackerras 1810bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1811bb72c481SPaul Mackerras unsigned long nbytes) 1812bb72c481SPaul Mackerras { 1813bb72c481SPaul Mackerras unsigned long stack_page; 1814bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 1815bb72c481SPaul Mackerras 1816bb72c481SPaul Mackerras /* 1817bb72c481SPaul Mackerras * Avoid crashing if the stack has overflowed and corrupted 1818bb72c481SPaul Mackerras * task_cpu(p), which is in the thread_info struct. 1819bb72c481SPaul Mackerras */ 1820bb72c481SPaul Mackerras if (cpu < NR_CPUS && cpu_possible(cpu)) { 1821bb72c481SPaul Mackerras stack_page = (unsigned long) hardirq_ctx[cpu]; 1822bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1823bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1824bb72c481SPaul Mackerras return 1; 1825bb72c481SPaul Mackerras 1826bb72c481SPaul Mackerras stack_page = (unsigned long) softirq_ctx[cpu]; 1827bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1828bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1829bb72c481SPaul Mackerras return 1; 1830bb72c481SPaul Mackerras } 1831bb72c481SPaul Mackerras return 0; 1832bb72c481SPaul Mackerras } 1833bb72c481SPaul Mackerras 18342f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 183514cf11afSPaul Mackerras unsigned long nbytes) 183614cf11afSPaul Mackerras { 18370cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 183814cf11afSPaul Mackerras 183914cf11afSPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 184014cf11afSPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 184114cf11afSPaul Mackerras return 1; 184214cf11afSPaul Mackerras 1843bb72c481SPaul Mackerras return valid_irq_stack(sp, p, nbytes); 184414cf11afSPaul Mackerras } 184514cf11afSPaul Mackerras 18462f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 18472f25194dSAnton Blanchard 184806d67d54SPaul Mackerras unsigned long get_wchan(struct task_struct *p) 184906d67d54SPaul Mackerras { 185006d67d54SPaul Mackerras unsigned long ip, sp; 185106d67d54SPaul Mackerras int count = 0; 185206d67d54SPaul Mackerras 185306d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 185406d67d54SPaul Mackerras return 0; 185506d67d54SPaul Mackerras 185606d67d54SPaul Mackerras sp = p->thread.ksp; 1857ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 185806d67d54SPaul Mackerras return 0; 185906d67d54SPaul Mackerras 186006d67d54SPaul Mackerras do { 186106d67d54SPaul Mackerras sp = *(unsigned long *)sp; 1862ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 186306d67d54SPaul Mackerras return 0; 186406d67d54SPaul Mackerras if (count > 0) { 1865ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 186606d67d54SPaul Mackerras if (!in_sched_functions(ip)) 186706d67d54SPaul Mackerras return ip; 186806d67d54SPaul Mackerras } 186906d67d54SPaul Mackerras } while (count++ < 16); 187006d67d54SPaul Mackerras return 0; 187106d67d54SPaul Mackerras } 187206d67d54SPaul Mackerras 1873c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 187414cf11afSPaul Mackerras 187514cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 187614cf11afSPaul Mackerras { 187706d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 187814cf11afSPaul Mackerras int count = 0; 187906d67d54SPaul Mackerras int firstframe = 1; 18806794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 18816794c782SSteven Rostedt int curr_frame = current->curr_ret_stack; 18826794c782SSteven Rostedt extern void return_to_handler(void); 18839135c3ccSSteven Rostedt unsigned long rth = (unsigned long)return_to_handler; 18846794c782SSteven Rostedt #endif 188514cf11afSPaul Mackerras 188614cf11afSPaul Mackerras sp = (unsigned long) stack; 188714cf11afSPaul Mackerras if (tsk == NULL) 188814cf11afSPaul Mackerras tsk = current; 188914cf11afSPaul Mackerras if (sp == 0) { 189014cf11afSPaul Mackerras if (tsk == current) 1891acf620ecSAnton Blanchard sp = current_stack_pointer(); 189214cf11afSPaul Mackerras else 189314cf11afSPaul Mackerras sp = tsk->thread.ksp; 189414cf11afSPaul Mackerras } 189514cf11afSPaul Mackerras 189606d67d54SPaul Mackerras lr = 0; 189706d67d54SPaul Mackerras printk("Call Trace:\n"); 189814cf11afSPaul Mackerras do { 1899ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 190006d67d54SPaul Mackerras return; 190106d67d54SPaul Mackerras 190206d67d54SPaul Mackerras stack = (unsigned long *) sp; 190306d67d54SPaul Mackerras newsp = stack[0]; 1904ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 190506d67d54SPaul Mackerras if (!firstframe || ip != lr) { 1906058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 19076794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 19087d56c65aSAnton Blanchard if ((ip == rth) && curr_frame >= 0) { 19099a1f490fSMichael Ellerman pr_cont(" (%pS)", 19106794c782SSteven Rostedt (void *)current->ret_stack[curr_frame].ret); 19116794c782SSteven Rostedt curr_frame--; 19126794c782SSteven Rostedt } 19136794c782SSteven Rostedt #endif 191406d67d54SPaul Mackerras if (firstframe) 19159a1f490fSMichael Ellerman pr_cont(" (unreliable)"); 19169a1f490fSMichael Ellerman pr_cont("\n"); 191714cf11afSPaul Mackerras } 191806d67d54SPaul Mackerras firstframe = 0; 191906d67d54SPaul Mackerras 192006d67d54SPaul Mackerras /* 192106d67d54SPaul Mackerras * See if this is an exception frame. 192206d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 192306d67d54SPaul Mackerras */ 1924ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1925ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 192606d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 192706d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 192806d67d54SPaul Mackerras lr = regs->link; 19299be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 1930058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 193106d67d54SPaul Mackerras firstframe = 1; 193214cf11afSPaul Mackerras } 193306d67d54SPaul Mackerras 193406d67d54SPaul Mackerras sp = newsp; 193506d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 193606d67d54SPaul Mackerras } 193706d67d54SPaul Mackerras 1938cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 1939fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 19400e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 1941cb2c9b27SAnton Blanchard { 1942fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1943cb2c9b27SAnton Blanchard unsigned long ctrl; 1944cb2c9b27SAnton Blanchard 1945cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1946cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 1947cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1948cb2c9b27SAnton Blanchard 1949fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 1950cb2c9b27SAnton Blanchard } 1951cb2c9b27SAnton Blanchard 1952fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 19530e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 1954cb2c9b27SAnton Blanchard { 1955fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1956cb2c9b27SAnton Blanchard unsigned long ctrl; 1957cb2c9b27SAnton Blanchard 1958fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 1959cb2c9b27SAnton Blanchard 1960cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1961cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 1962cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1963cb2c9b27SAnton Blanchard } 1964fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 1965f6a61680SBenjamin Herrenschmidt 1966d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 1967d839088cSAnton Blanchard { 1968d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1969d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 1970d839088cSAnton Blanchard return sp & ~0xf; 1971d839088cSAnton Blanchard } 1972912f9ee2SAnton Blanchard 1973912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 1974912f9ee2SAnton Blanchard { 1975912f9ee2SAnton Blanchard unsigned long rnd = 0; 1976912f9ee2SAnton Blanchard 1977912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 1978912f9ee2SAnton Blanchard if (is_32bit_task()) 19795ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); 1980912f9ee2SAnton Blanchard else 19815ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); 1982912f9ee2SAnton Blanchard 1983912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 1984912f9ee2SAnton Blanchard } 1985912f9ee2SAnton Blanchard 1986912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 1987912f9ee2SAnton Blanchard { 19888bbde7a7SAnton Blanchard unsigned long base = mm->brk; 19898bbde7a7SAnton Blanchard unsigned long ret; 19908bbde7a7SAnton Blanchard 1991ce7a35c7SKumar Gala #ifdef CONFIG_PPC_STD_MMU_64 19928bbde7a7SAnton Blanchard /* 19938bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 19948bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 19958bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 19968bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 1997caca285eSAneesh Kumar K.V * performance penalty. We don't need to worry about radix. For 1998caca285eSAneesh Kumar K.V * radix, mmu_highuser_ssize remains unchanged from 256MB. 19998bbde7a7SAnton Blanchard */ 20008bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 20018bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 20028bbde7a7SAnton Blanchard #endif 20038bbde7a7SAnton Blanchard 20048bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 2005912f9ee2SAnton Blanchard 2006912f9ee2SAnton Blanchard if (ret < mm->brk) 2007912f9ee2SAnton Blanchard return mm->brk; 2008912f9ee2SAnton Blanchard 2009912f9ee2SAnton Blanchard return ret; 2010912f9ee2SAnton Blanchard } 2011501cb16dSAnton Blanchard 2012