114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 314cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 614cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 714cf11afSPaul Mackerras * 814cf11afSPaul Mackerras * PowerPC version 914cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1014cf11afSPaul Mackerras * 1114cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 1214cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 1314cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 1414cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 1514cf11afSPaul Mackerras */ 1614cf11afSPaul Mackerras 1714cf11afSPaul Mackerras #include <linux/errno.h> 1814cf11afSPaul Mackerras #include <linux/sched.h> 19b17b0153SIngo Molnar #include <linux/sched/debug.h> 2029930025SIngo Molnar #include <linux/sched/task.h> 2168db0cf1SIngo Molnar #include <linux/sched/task_stack.h> 2214cf11afSPaul Mackerras #include <linux/kernel.h> 2314cf11afSPaul Mackerras #include <linux/mm.h> 2414cf11afSPaul Mackerras #include <linux/smp.h> 2514cf11afSPaul Mackerras #include <linux/stddef.h> 2614cf11afSPaul Mackerras #include <linux/unistd.h> 2714cf11afSPaul Mackerras #include <linux/ptrace.h> 2814cf11afSPaul Mackerras #include <linux/slab.h> 2914cf11afSPaul Mackerras #include <linux/user.h> 3014cf11afSPaul Mackerras #include <linux/elf.h> 3114cf11afSPaul Mackerras #include <linux/prctl.h> 3214cf11afSPaul Mackerras #include <linux/init_task.h> 334b16f8e2SPaul Gortmaker #include <linux/export.h> 3414cf11afSPaul Mackerras #include <linux/kallsyms.h> 3514cf11afSPaul Mackerras #include <linux/mqueue.h> 3614cf11afSPaul Mackerras #include <linux/hardirq.h> 3706d67d54SPaul Mackerras #include <linux/utsname.h> 386794c782SSteven Rostedt #include <linux/ftrace.h> 3979741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 40d839088cSAnton Blanchard #include <linux/personality.h> 41d839088cSAnton Blanchard #include <linux/random.h> 425aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 437b051f66SAnton Blanchard #include <linux/uaccess.h> 447f92bc56SDaniel Axtens #include <linux/elf-randomize.h> 4506bb53b3SRam Pai #include <linux/pkeys.h> 4614cf11afSPaul Mackerras 4714cf11afSPaul Mackerras #include <asm/pgtable.h> 4814cf11afSPaul Mackerras #include <asm/io.h> 4914cf11afSPaul Mackerras #include <asm/processor.h> 5014cf11afSPaul Mackerras #include <asm/mmu.h> 5114cf11afSPaul Mackerras #include <asm/prom.h> 5276032de8SMichael Ellerman #include <asm/machdep.h> 53c6622f63SPaul Mackerras #include <asm/time.h> 54ae3a197eSDavid Howells #include <asm/runlatch.h> 55a7f31841SArnd Bergmann #include <asm/syscalls.h> 56ae3a197eSDavid Howells #include <asm/switch_to.h> 57fb09692eSMichael Neuling #include <asm/tm.h> 58ae3a197eSDavid Howells #include <asm/debug.h> 5906d67d54SPaul Mackerras #ifdef CONFIG_PPC64 6006d67d54SPaul Mackerras #include <asm/firmware.h> 61c2e480baSMadhavan Srinivasan #include <asm/hw_irq.h> 6206d67d54SPaul Mackerras #endif 637cedd601SAnton Blanchard #include <asm/code-patching.h> 647f92bc56SDaniel Axtens #include <asm/exec.h> 655d31a96eSMichael Ellerman #include <asm/livepatch.h> 66b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 670545d543SDaniel Axtens #include <asm/asm-prototypes.h> 685d31a96eSMichael Ellerman 69d6a61bfcSLuis Machado #include <linux/kprobes.h> 70d6a61bfcSLuis Machado #include <linux/kdebug.h> 7114cf11afSPaul Mackerras 728b3c34cfSMichael Neuling /* Transactional Memory debug */ 738b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 748b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 758b3c34cfSMichael Neuling #else 768b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 778b3c34cfSMichael Neuling #endif 788b3c34cfSMichael Neuling 7914cf11afSPaul Mackerras extern unsigned long _get_SP(void); 8014cf11afSPaul Mackerras 81d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8254820530SMichael Ellerman /* 8354820530SMichael Ellerman * Are we running in "Suspend disabled" mode? If so we have to block any 8454820530SMichael Ellerman * sigreturn that would get us into suspended state, and we also warn in some 8554820530SMichael Ellerman * other paths that we should never reach with suspend disabled. 8654820530SMichael Ellerman */ 8754820530SMichael Ellerman bool tm_suspend_disabled __ro_after_init = false; 8854820530SMichael Ellerman 89b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 90d31626f7SPaul Mackerras { 91d31626f7SPaul Mackerras /* 92d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 93d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 94d31626f7SPaul Mackerras * bit so that we know to restore the registers before 95d31626f7SPaul Mackerras * returning to userspace. 96d31626f7SPaul Mackerras */ 97d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 98d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 99d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 100829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 101d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 102d31626f7SPaul Mackerras } 103d31626f7SPaul Mackerras } 104dc16b553SCyril Bur 105dc16b553SCyril Bur static inline bool msr_tm_active(unsigned long msr) 106dc16b553SCyril Bur { 107dc16b553SCyril Bur return MSR_TM_ACTIVE(msr); 108dc16b553SCyril Bur } 109a7771176SCyril Bur 110a7771176SCyril Bur static bool tm_active_with_fp(struct task_struct *tsk) 111a7771176SCyril Bur { 112a7771176SCyril Bur return msr_tm_active(tsk->thread.regs->msr) && 113a7771176SCyril Bur (tsk->thread.ckpt_regs.msr & MSR_FP); 114a7771176SCyril Bur } 115a7771176SCyril Bur 116a7771176SCyril Bur static bool tm_active_with_altivec(struct task_struct *tsk) 117a7771176SCyril Bur { 118a7771176SCyril Bur return msr_tm_active(tsk->thread.regs->msr) && 119a7771176SCyril Bur (tsk->thread.ckpt_regs.msr & MSR_VEC); 120a7771176SCyril Bur } 121d31626f7SPaul Mackerras #else 122dc16b553SCyril Bur static inline bool msr_tm_active(unsigned long msr) { return false; } 123b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 124a7771176SCyril Bur static inline bool tm_active_with_fp(struct task_struct *tsk) { return false; } 125a7771176SCyril Bur static inline bool tm_active_with_altivec(struct task_struct *tsk) { return false; } 126d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 127d31626f7SPaul Mackerras 1283eb5d588SAnton Blanchard bool strict_msr_control; 1293eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 1303eb5d588SAnton Blanchard 1313eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 1323eb5d588SAnton Blanchard { 1333eb5d588SAnton Blanchard strict_msr_control = true; 1343eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1353eb5d588SAnton Blanchard 1363eb5d588SAnton Blanchard return 0; 1373eb5d588SAnton Blanchard } 1383eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1393eb5d588SAnton Blanchard 1403cee070aSCyril Bur unsigned long msr_check_and_set(unsigned long bits) 141a0e72cf1SAnton Blanchard { 142a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 143a0e72cf1SAnton Blanchard unsigned long newmsr; 144a0e72cf1SAnton Blanchard 145a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 146a0e72cf1SAnton Blanchard 147a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 148a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 149a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 150a0e72cf1SAnton Blanchard #endif 151a0e72cf1SAnton Blanchard 152a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 153a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 1543cee070aSCyril Bur 1553cee070aSCyril Bur return newmsr; 156a0e72cf1SAnton Blanchard } 157a0e72cf1SAnton Blanchard 1583eb5d588SAnton Blanchard void __msr_check_and_clear(unsigned long bits) 159a0e72cf1SAnton Blanchard { 160a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 161a0e72cf1SAnton Blanchard unsigned long newmsr; 162a0e72cf1SAnton Blanchard 163a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 164a0e72cf1SAnton Blanchard 165a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 166a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 167a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 168a0e72cf1SAnton Blanchard #endif 169a0e72cf1SAnton Blanchard 170a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 171a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 172a0e72cf1SAnton Blanchard } 1733eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 174a0e72cf1SAnton Blanchard 175037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1761cdf039bSMathieu Malaterre static void __giveup_fpu(struct task_struct *tsk) 1778792468dSCyril Bur { 1788eb98037SAnton Blanchard unsigned long msr; 1798eb98037SAnton Blanchard 1808792468dSCyril Bur save_fpu(tsk); 1818eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 1828eb98037SAnton Blanchard msr &= ~MSR_FP; 1838792468dSCyril Bur #ifdef CONFIG_VSX 1848792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1858eb98037SAnton Blanchard msr &= ~MSR_VSX; 1868792468dSCyril Bur #endif 1878eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 1888792468dSCyril Bur } 1898792468dSCyril Bur 19098da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 19198da581eSAnton Blanchard { 19298da581eSAnton Blanchard check_if_tm_restore_required(tsk); 19398da581eSAnton Blanchard 194a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 19598da581eSAnton Blanchard __giveup_fpu(tsk); 196a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 19798da581eSAnton Blanchard } 19898da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 19998da581eSAnton Blanchard 20014cf11afSPaul Mackerras /* 20114cf11afSPaul Mackerras * Make sure the floating-point register state in the 20214cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 20314cf11afSPaul Mackerras */ 20414cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 20514cf11afSPaul Mackerras { 20614cf11afSPaul Mackerras if (tsk->thread.regs) { 20714cf11afSPaul Mackerras /* 20814cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 20914cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 21014cf11afSPaul Mackerras * test but before we have finished saving the FP registers 21114cf11afSPaul Mackerras * to the thread_struct. That process could take over the 21214cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 21314cf11afSPaul Mackerras * bogus values for the remaining FP registers. 21414cf11afSPaul Mackerras */ 21514cf11afSPaul Mackerras preempt_disable(); 21614cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 21714cf11afSPaul Mackerras /* 21814cf11afSPaul Mackerras * This should only ever be called for current or 21914cf11afSPaul Mackerras * for a stopped child process. Since we save away 220af1bbc3dSAnton Blanchard * the FP register state on context switch, 22114cf11afSPaul Mackerras * there is something wrong if a stopped child appears 22214cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 22314cf11afSPaul Mackerras */ 22414cf11afSPaul Mackerras BUG_ON(tsk != current); 225b86fd2bdSAnton Blanchard giveup_fpu(tsk); 22614cf11afSPaul Mackerras } 22714cf11afSPaul Mackerras preempt_enable(); 22814cf11afSPaul Mackerras } 22914cf11afSPaul Mackerras } 230de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 23114cf11afSPaul Mackerras 23214cf11afSPaul Mackerras void enable_kernel_fp(void) 23314cf11afSPaul Mackerras { 234e909fb83SCyril Bur unsigned long cpumsr; 235e909fb83SCyril Bur 23614cf11afSPaul Mackerras WARN_ON(preemptible()); 23714cf11afSPaul Mackerras 238e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP); 239611b0e5cSAnton Blanchard 240d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 241d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 242e909fb83SCyril Bur /* 243e909fb83SCyril Bur * If a thread has already been reclaimed then the 244e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 245e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 246e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 247e909fb83SCyril Bur * checkpointed structure. 248e909fb83SCyril Bur */ 249e909fb83SCyril Bur if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr)) 250e909fb83SCyril Bur return; 251a0e72cf1SAnton Blanchard __giveup_fpu(current); 252b86fd2bdSAnton Blanchard } 253d64d02ceSAnton Blanchard } 25414cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 25570fe3d98SCyril Bur 2566a303833SBenjamin Herrenschmidt static int restore_fp(struct task_struct *tsk) 2576a303833SBenjamin Herrenschmidt { 258a7771176SCyril Bur if (tsk->thread.load_fp || tm_active_with_fp(tsk)) { 25970fe3d98SCyril Bur load_fp_state(¤t->thread.fp_state); 26070fe3d98SCyril Bur current->thread.load_fp++; 26170fe3d98SCyril Bur return 1; 26270fe3d98SCyril Bur } 26370fe3d98SCyril Bur return 0; 26470fe3d98SCyril Bur } 26570fe3d98SCyril Bur #else 26670fe3d98SCyril Bur static int restore_fp(struct task_struct *tsk) { return 0; } 267d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 26814cf11afSPaul Mackerras 26914cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 27070fe3d98SCyril Bur #define loadvec(thr) ((thr).load_vec) 27170fe3d98SCyril Bur 2726f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2736f515d84SCyril Bur { 2748eb98037SAnton Blanchard unsigned long msr; 2758eb98037SAnton Blanchard 2766f515d84SCyril Bur save_altivec(tsk); 2778eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2788eb98037SAnton Blanchard msr &= ~MSR_VEC; 2796f515d84SCyril Bur #ifdef CONFIG_VSX 2806f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2818eb98037SAnton Blanchard msr &= ~MSR_VSX; 2826f515d84SCyril Bur #endif 2838eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 2846f515d84SCyril Bur } 2856f515d84SCyril Bur 28698da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 28798da581eSAnton Blanchard { 28898da581eSAnton Blanchard check_if_tm_restore_required(tsk); 28998da581eSAnton Blanchard 290a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 29198da581eSAnton Blanchard __giveup_altivec(tsk); 292a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 29398da581eSAnton Blanchard } 29498da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 29598da581eSAnton Blanchard 29614cf11afSPaul Mackerras void enable_kernel_altivec(void) 29714cf11afSPaul Mackerras { 298e909fb83SCyril Bur unsigned long cpumsr; 299e909fb83SCyril Bur 30014cf11afSPaul Mackerras WARN_ON(preemptible()); 30114cf11afSPaul Mackerras 302e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_VEC); 303611b0e5cSAnton Blanchard 304d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 305d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 306e909fb83SCyril Bur /* 307e909fb83SCyril Bur * If a thread has already been reclaimed then the 308e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 309e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 310e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 311e909fb83SCyril Bur * checkpointed structure. 312e909fb83SCyril Bur */ 313e909fb83SCyril Bur if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr)) 314e909fb83SCyril Bur return; 315a0e72cf1SAnton Blanchard __giveup_altivec(current); 316b86fd2bdSAnton Blanchard } 317d64d02ceSAnton Blanchard } 31814cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 31914cf11afSPaul Mackerras 32014cf11afSPaul Mackerras /* 32114cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 32214cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 32314cf11afSPaul Mackerras */ 32414cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 32514cf11afSPaul Mackerras { 32614cf11afSPaul Mackerras if (tsk->thread.regs) { 32714cf11afSPaul Mackerras preempt_disable(); 32814cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 32914cf11afSPaul Mackerras BUG_ON(tsk != current); 330b86fd2bdSAnton Blanchard giveup_altivec(tsk); 33114cf11afSPaul Mackerras } 33214cf11afSPaul Mackerras preempt_enable(); 33314cf11afSPaul Mackerras } 33414cf11afSPaul Mackerras } 335de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 33670fe3d98SCyril Bur 33770fe3d98SCyril Bur static int restore_altivec(struct task_struct *tsk) 33870fe3d98SCyril Bur { 339dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && 340a7771176SCyril Bur (tsk->thread.load_vec || tm_active_with_altivec(tsk))) { 34170fe3d98SCyril Bur load_vr_state(&tsk->thread.vr_state); 34270fe3d98SCyril Bur tsk->thread.used_vr = 1; 34370fe3d98SCyril Bur tsk->thread.load_vec++; 34470fe3d98SCyril Bur 34570fe3d98SCyril Bur return 1; 34670fe3d98SCyril Bur } 34770fe3d98SCyril Bur return 0; 34870fe3d98SCyril Bur } 34970fe3d98SCyril Bur #else 35070fe3d98SCyril Bur #define loadvec(thr) 0 35170fe3d98SCyril Bur static inline int restore_altivec(struct task_struct *tsk) { return 0; } 35214cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 35314cf11afSPaul Mackerras 354ce48b210SMichael Neuling #ifdef CONFIG_VSX 355bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 356a7d623d4SAnton Blanchard { 357dc801081SBenjamin Herrenschmidt unsigned long msr = tsk->thread.regs->msr; 358dc801081SBenjamin Herrenschmidt 359dc801081SBenjamin Herrenschmidt /* 360dc801081SBenjamin Herrenschmidt * We should never be ssetting MSR_VSX without also setting 361dc801081SBenjamin Herrenschmidt * MSR_FP and MSR_VEC 362dc801081SBenjamin Herrenschmidt */ 363dc801081SBenjamin Herrenschmidt WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); 364dc801081SBenjamin Herrenschmidt 365dc801081SBenjamin Herrenschmidt /* __giveup_fpu will clear MSR_VSX */ 366dc801081SBenjamin Herrenschmidt if (msr & MSR_FP) 367a7d623d4SAnton Blanchard __giveup_fpu(tsk); 368dc801081SBenjamin Herrenschmidt if (msr & MSR_VEC) 369a7d623d4SAnton Blanchard __giveup_altivec(tsk); 370bf6a4d5bSCyril Bur } 371bf6a4d5bSCyril Bur 372bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 373bf6a4d5bSCyril Bur { 374bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 375bf6a4d5bSCyril Bur 376bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 377a7d623d4SAnton Blanchard __giveup_vsx(tsk); 378a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 379a7d623d4SAnton Blanchard } 380bf6a4d5bSCyril Bur 381ce48b210SMichael Neuling void enable_kernel_vsx(void) 382ce48b210SMichael Neuling { 383e909fb83SCyril Bur unsigned long cpumsr; 384e909fb83SCyril Bur 385ce48b210SMichael Neuling WARN_ON(preemptible()); 386ce48b210SMichael Neuling 387e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 388611b0e5cSAnton Blanchard 3895a69aec9SBenjamin Herrenschmidt if (current->thread.regs && 3905a69aec9SBenjamin Herrenschmidt (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { 391d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 392e909fb83SCyril Bur /* 393e909fb83SCyril Bur * If a thread has already been reclaimed then the 394e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 395e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 396e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 397e909fb83SCyril Bur * checkpointed structure. 398e909fb83SCyril Bur */ 399e909fb83SCyril Bur if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr)) 400e909fb83SCyril Bur return; 401a0e72cf1SAnton Blanchard __giveup_vsx(current); 402611b0e5cSAnton Blanchard } 403ce48b210SMichael Neuling } 404ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 405ce48b210SMichael Neuling 406ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 407ce48b210SMichael Neuling { 408ce48b210SMichael Neuling if (tsk->thread.regs) { 409ce48b210SMichael Neuling preempt_disable(); 4105a69aec9SBenjamin Herrenschmidt if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { 411ce48b210SMichael Neuling BUG_ON(tsk != current); 412ce48b210SMichael Neuling giveup_vsx(tsk); 413ce48b210SMichael Neuling } 414ce48b210SMichael Neuling preempt_enable(); 415ce48b210SMichael Neuling } 416ce48b210SMichael Neuling } 417de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 41870fe3d98SCyril Bur 41970fe3d98SCyril Bur static int restore_vsx(struct task_struct *tsk) 42070fe3d98SCyril Bur { 42170fe3d98SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) { 42270fe3d98SCyril Bur tsk->thread.used_vsr = 1; 42370fe3d98SCyril Bur return 1; 42470fe3d98SCyril Bur } 42570fe3d98SCyril Bur 42670fe3d98SCyril Bur return 0; 42770fe3d98SCyril Bur } 42870fe3d98SCyril Bur #else 42970fe3d98SCyril Bur static inline int restore_vsx(struct task_struct *tsk) { return 0; } 430ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 431ce48b210SMichael Neuling 43214cf11afSPaul Mackerras #ifdef CONFIG_SPE 43398da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 43498da581eSAnton Blanchard { 43598da581eSAnton Blanchard check_if_tm_restore_required(tsk); 43698da581eSAnton Blanchard 437a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 43898da581eSAnton Blanchard __giveup_spe(tsk); 439a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 44098da581eSAnton Blanchard } 44198da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 44214cf11afSPaul Mackerras 44314cf11afSPaul Mackerras void enable_kernel_spe(void) 44414cf11afSPaul Mackerras { 44514cf11afSPaul Mackerras WARN_ON(preemptible()); 44614cf11afSPaul Mackerras 447a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 448611b0e5cSAnton Blanchard 449d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 450d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 451a0e72cf1SAnton Blanchard __giveup_spe(current); 45214cf11afSPaul Mackerras } 453d64d02ceSAnton Blanchard } 45414cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 45514cf11afSPaul Mackerras 45614cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 45714cf11afSPaul Mackerras { 45814cf11afSPaul Mackerras if (tsk->thread.regs) { 45914cf11afSPaul Mackerras preempt_disable(); 46014cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 46114cf11afSPaul Mackerras BUG_ON(tsk != current); 462685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 4630ee6c15eSKumar Gala giveup_spe(tsk); 46414cf11afSPaul Mackerras } 46514cf11afSPaul Mackerras preempt_enable(); 46614cf11afSPaul Mackerras } 46714cf11afSPaul Mackerras } 46814cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 46914cf11afSPaul Mackerras 470c2085059SAnton Blanchard static unsigned long msr_all_available; 471c2085059SAnton Blanchard 472c2085059SAnton Blanchard static int __init init_msr_all_available(void) 473c2085059SAnton Blanchard { 474c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 475c2085059SAnton Blanchard msr_all_available |= MSR_FP; 476c2085059SAnton Blanchard #endif 477c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 478c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 479c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 480c2085059SAnton Blanchard #endif 481c2085059SAnton Blanchard #ifdef CONFIG_VSX 482c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 483c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 484c2085059SAnton Blanchard #endif 485c2085059SAnton Blanchard #ifdef CONFIG_SPE 486c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 487c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 488c2085059SAnton Blanchard #endif 489c2085059SAnton Blanchard 490c2085059SAnton Blanchard return 0; 491c2085059SAnton Blanchard } 492c2085059SAnton Blanchard early_initcall(init_msr_all_available); 493c2085059SAnton Blanchard 494c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 495c2085059SAnton Blanchard { 496c2085059SAnton Blanchard unsigned long usermsr; 497c2085059SAnton Blanchard 498c2085059SAnton Blanchard if (!tsk->thread.regs) 499c2085059SAnton Blanchard return; 500c2085059SAnton Blanchard 501c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 502c2085059SAnton Blanchard 503c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 504c2085059SAnton Blanchard return; 505c2085059SAnton Blanchard 506c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 507b0f16b46SCyril Bur check_if_tm_restore_required(tsk); 508c2085059SAnton Blanchard 50996c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 51096c79b6bSBenjamin Herrenschmidt 511c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 512c2085059SAnton Blanchard if (usermsr & MSR_FP) 513c2085059SAnton Blanchard __giveup_fpu(tsk); 514c2085059SAnton Blanchard #endif 515c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 516c2085059SAnton Blanchard if (usermsr & MSR_VEC) 517c2085059SAnton Blanchard __giveup_altivec(tsk); 518c2085059SAnton Blanchard #endif 519c2085059SAnton Blanchard #ifdef CONFIG_SPE 520c2085059SAnton Blanchard if (usermsr & MSR_SPE) 521c2085059SAnton Blanchard __giveup_spe(tsk); 522c2085059SAnton Blanchard #endif 523c2085059SAnton Blanchard 524c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 525c2085059SAnton Blanchard } 526c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 527c2085059SAnton Blanchard 52870fe3d98SCyril Bur void restore_math(struct pt_regs *regs) 52970fe3d98SCyril Bur { 53070fe3d98SCyril Bur unsigned long msr; 53170fe3d98SCyril Bur 532dc16b553SCyril Bur if (!msr_tm_active(regs->msr) && 533dc16b553SCyril Bur !current->thread.load_fp && !loadvec(current->thread)) 53470fe3d98SCyril Bur return; 53570fe3d98SCyril Bur 53670fe3d98SCyril Bur msr = regs->msr; 53770fe3d98SCyril Bur msr_check_and_set(msr_all_available); 53870fe3d98SCyril Bur 53970fe3d98SCyril Bur /* 54070fe3d98SCyril Bur * Only reload if the bit is not set in the user MSR, the bit BEING set 54170fe3d98SCyril Bur * indicates that the registers are hot 54270fe3d98SCyril Bur */ 54370fe3d98SCyril Bur if ((!(msr & MSR_FP)) && restore_fp(current)) 54470fe3d98SCyril Bur msr |= MSR_FP | current->thread.fpexc_mode; 54570fe3d98SCyril Bur 54670fe3d98SCyril Bur if ((!(msr & MSR_VEC)) && restore_altivec(current)) 54770fe3d98SCyril Bur msr |= MSR_VEC; 54870fe3d98SCyril Bur 54970fe3d98SCyril Bur if ((msr & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC) && 55070fe3d98SCyril Bur restore_vsx(current)) { 55170fe3d98SCyril Bur msr |= MSR_VSX; 55270fe3d98SCyril Bur } 55370fe3d98SCyril Bur 55470fe3d98SCyril Bur msr_check_and_clear(msr_all_available); 55570fe3d98SCyril Bur 55670fe3d98SCyril Bur regs->msr = msr; 55770fe3d98SCyril Bur } 55870fe3d98SCyril Bur 5591cdf039bSMathieu Malaterre static void save_all(struct task_struct *tsk) 560de2a20aaSCyril Bur { 561de2a20aaSCyril Bur unsigned long usermsr; 562de2a20aaSCyril Bur 563de2a20aaSCyril Bur if (!tsk->thread.regs) 564de2a20aaSCyril Bur return; 565de2a20aaSCyril Bur 566de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 567de2a20aaSCyril Bur 568de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 569de2a20aaSCyril Bur return; 570de2a20aaSCyril Bur 571de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 572de2a20aaSCyril Bur 57396c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 57496c79b6bSBenjamin Herrenschmidt 575de2a20aaSCyril Bur if (usermsr & MSR_FP) 5768792468dSCyril Bur save_fpu(tsk); 577de2a20aaSCyril Bur 578de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5796f515d84SCyril Bur save_altivec(tsk); 580de2a20aaSCyril Bur 581de2a20aaSCyril Bur if (usermsr & MSR_SPE) 582de2a20aaSCyril Bur __giveup_spe(tsk); 583de2a20aaSCyril Bur 584de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 585de2a20aaSCyril Bur } 586de2a20aaSCyril Bur 587579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 588579e633eSAnton Blanchard { 589579e633eSAnton Blanchard if (tsk->thread.regs) { 590579e633eSAnton Blanchard preempt_disable(); 591579e633eSAnton Blanchard BUG_ON(tsk != current); 592de2a20aaSCyril Bur save_all(tsk); 593579e633eSAnton Blanchard 594579e633eSAnton Blanchard #ifdef CONFIG_SPE 595579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 596579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 597579e633eSAnton Blanchard #endif 598579e633eSAnton Blanchard 599579e633eSAnton Blanchard preempt_enable(); 600579e633eSAnton Blanchard } 601579e633eSAnton Blanchard } 602579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 603579e633eSAnton Blanchard 6043bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6053bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 60647355040SEric W. Biederman unsigned long error_code, int breakpt) 6073bffb652SDave Kleikamp { 60847355040SEric W. Biederman current->thread.trap_nr = TRAP_HWBKPT; 6093bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 6103bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 6113bffb652SDave Kleikamp return; 6123bffb652SDave Kleikamp 6133bffb652SDave Kleikamp /* Deliver the signal to userspace */ 614f71dd7dcSEric W. Biederman force_sig_ptrace_errno_trap(breakpt, /* breakpoint or watchpoint id */ 615f71dd7dcSEric W. Biederman (void __user *)address); 6163bffb652SDave Kleikamp } 6173bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 6189422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 619d6a61bfcSLuis Machado unsigned long error_code) 620d6a61bfcSLuis Machado { 621d6a61bfcSLuis Machado siginfo_t info; 622d6a61bfcSLuis Machado 62341ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 624d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 625d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 626d6a61bfcSLuis Machado return; 627d6a61bfcSLuis Machado 6289422de3eSMichael Neuling if (debugger_break_match(regs)) 629d6a61bfcSLuis Machado return; 630d6a61bfcSLuis Machado 6319422de3eSMichael Neuling /* Clear the breakpoint */ 6329422de3eSMichael Neuling hw_breakpoint_disable(); 633d6a61bfcSLuis Machado 634d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 635d6a61bfcSLuis Machado info.si_signo = SIGTRAP; 636d6a61bfcSLuis Machado info.si_errno = 0; 637d6a61bfcSLuis Machado info.si_code = TRAP_HWBKPT; 638d6a61bfcSLuis Machado info.si_addr = (void __user *)address; 639d6a61bfcSLuis Machado force_sig_info(SIGTRAP, &info, current); 640d6a61bfcSLuis Machado } 6413bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 642d6a61bfcSLuis Machado 6439422de3eSMichael Neuling static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk); 644a2ceff5eSMichael Ellerman 6453bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6463bffb652SDave Kleikamp /* 6473bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 6483bffb652SDave Kleikamp */ 6493bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6503bffb652SDave Kleikamp { 65151ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 6523bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 65351ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 6543bffb652SDave Kleikamp #endif 65551ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 6563bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 65751ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 6583bffb652SDave Kleikamp #endif 65951ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 6603bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 6613bffb652SDave Kleikamp /* 6623bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 6633bffb652SDave Kleikamp */ 66451ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 6653bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 6663bffb652SDave Kleikamp /* 6673bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 6683bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 6693bffb652SDave Kleikamp */ 67051ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 6713bffb652SDave Kleikamp #else 67251ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 6733bffb652SDave Kleikamp #endif 6743bffb652SDave Kleikamp } 6753bffb652SDave Kleikamp 676f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 6773bffb652SDave Kleikamp { 6786cecf76bSScott Wood /* 6796cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 6806cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 6816cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 6826cecf76bSScott Wood */ 6836cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 6846cecf76bSScott Wood 685f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 686f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 6873bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 688f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 689f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 6903bffb652SDave Kleikamp #endif 691f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 692f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 6933bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 694f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 695f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 6963bffb652SDave Kleikamp #endif 697f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 698f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 6993bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 700f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 7013bffb652SDave Kleikamp #endif 7023bffb652SDave Kleikamp } 7033bffb652SDave Kleikamp /* 7043bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 7053bffb652SDave Kleikamp * debug registers, set the debug registers from the values 7063bffb652SDave Kleikamp * stored in the new thread. 7073bffb652SDave Kleikamp */ 708f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 7093bffb652SDave Kleikamp { 71051ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 711f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 712f5f97210SScott Wood prime_debug_regs(new_debug); 7133bffb652SDave Kleikamp } 7143743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 7153bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 716e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 7173bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 7183bffb652SDave Kleikamp { 7199422de3eSMichael Neuling thread->hw_brk.address = 0; 7209422de3eSMichael Neuling thread->hw_brk.type = 0; 721*252988cbSNicholas Piggin if (ppc_breakpoint_available()) 722b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 7233bffb652SDave Kleikamp } 724e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 7253bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 7263bffb652SDave Kleikamp 727172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 7289422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7299422de3eSMichael Neuling { 730c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 731221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 732221c185dSDave Kleikamp isync(); 733221c185dSDave Kleikamp #endif 7349422de3eSMichael Neuling return 0; 7359422de3eSMichael Neuling } 736c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 7379422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7389422de3eSMichael Neuling { 739cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 74082a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 7414474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 742cab0af98SMichael Ellerman return 0; 74314cf11afSPaul Mackerras } 7444ad8622dSChristophe Leroy #elif defined(CONFIG_PPC_8xx) 7454ad8622dSChristophe Leroy static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7464ad8622dSChristophe Leroy { 7474ad8622dSChristophe Leroy unsigned long addr = dabr & ~HW_BRK_TYPE_DABR; 7484ad8622dSChristophe Leroy unsigned long lctrl1 = 0x90000000; /* compare type: equal on E & F */ 7494ad8622dSChristophe Leroy unsigned long lctrl2 = 0x8e000002; /* watchpoint 1 on cmp E | F */ 7504ad8622dSChristophe Leroy 7514ad8622dSChristophe Leroy if ((dabr & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_READ) 7524ad8622dSChristophe Leroy lctrl1 |= 0xa0000; 7534ad8622dSChristophe Leroy else if ((dabr & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_WRITE) 7544ad8622dSChristophe Leroy lctrl1 |= 0xf0000; 7554ad8622dSChristophe Leroy else if ((dabr & HW_BRK_TYPE_RDWR) == 0) 7564ad8622dSChristophe Leroy lctrl2 = 0; 7574ad8622dSChristophe Leroy 7584ad8622dSChristophe Leroy mtspr(SPRN_LCTRL2, 0); 7594ad8622dSChristophe Leroy mtspr(SPRN_CMPE, addr); 7604ad8622dSChristophe Leroy mtspr(SPRN_CMPF, addr + 4); 7614ad8622dSChristophe Leroy mtspr(SPRN_LCTRL1, lctrl1); 7624ad8622dSChristophe Leroy mtspr(SPRN_LCTRL2, lctrl2); 7634ad8622dSChristophe Leroy 7644ad8622dSChristophe Leroy return 0; 7654ad8622dSChristophe Leroy } 7669422de3eSMichael Neuling #else 7679422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 7689422de3eSMichael Neuling { 7699422de3eSMichael Neuling return -EINVAL; 7709422de3eSMichael Neuling } 7719422de3eSMichael Neuling #endif 7729422de3eSMichael Neuling 7739422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 7749422de3eSMichael Neuling { 7759422de3eSMichael Neuling unsigned long dabr, dabrx; 7769422de3eSMichael Neuling 7779422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 7789422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 7799422de3eSMichael Neuling 7809422de3eSMichael Neuling if (ppc_md.set_dabr) 7819422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 7829422de3eSMichael Neuling 7839422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 7849422de3eSMichael Neuling } 7859422de3eSMichael Neuling 786bf99de36SMichael Neuling static inline int set_dawr(struct arch_hw_breakpoint *brk) 787bf99de36SMichael Neuling { 78805d694eaSMichael Neuling unsigned long dawr, dawrx, mrd; 789bf99de36SMichael Neuling 790bf99de36SMichael Neuling dawr = brk->address; 791bf99de36SMichael Neuling 792bf99de36SMichael Neuling dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \ 793bf99de36SMichael Neuling << (63 - 58); //* read/write bits */ 794bf99de36SMichael Neuling dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \ 795bf99de36SMichael Neuling << (63 - 59); //* translate */ 796bf99de36SMichael Neuling dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \ 797bf99de36SMichael Neuling >> 3; //* PRIM bits */ 79805d694eaSMichael Neuling /* dawr length is stored in field MDR bits 48:53. Matches range in 79905d694eaSMichael Neuling doublewords (64 bits) baised by -1 eg. 0b000000=1DW and 80005d694eaSMichael Neuling 0b111111=64DW. 80105d694eaSMichael Neuling brk->len is in bytes. 80205d694eaSMichael Neuling This aligns up to double word size, shifts and does the bias. 80305d694eaSMichael Neuling */ 80405d694eaSMichael Neuling mrd = ((brk->len + 7) >> 3) - 1; 80505d694eaSMichael Neuling dawrx |= (mrd & 0x3f) << (63 - 53); 806bf99de36SMichael Neuling 807bf99de36SMichael Neuling if (ppc_md.set_dawr) 808bf99de36SMichael Neuling return ppc_md.set_dawr(dawr, dawrx); 809bf99de36SMichael Neuling mtspr(SPRN_DAWR, dawr); 810bf99de36SMichael Neuling mtspr(SPRN_DAWRX, dawrx); 811bf99de36SMichael Neuling return 0; 812bf99de36SMichael Neuling } 813bf99de36SMichael Neuling 81421f58507SPaul Gortmaker void __set_breakpoint(struct arch_hw_breakpoint *brk) 8159422de3eSMichael Neuling { 81669111bacSChristoph Lameter memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk)); 8179422de3eSMichael Neuling 818bf99de36SMichael Neuling if (cpu_has_feature(CPU_FTR_DAWR)) 819*252988cbSNicholas Piggin // Power8 or later 82004c32a51SPaul Gortmaker set_dawr(brk); 821*252988cbSNicholas Piggin else if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 822*252988cbSNicholas Piggin // Power7 or earlier 82304c32a51SPaul Gortmaker set_dabr(brk); 824*252988cbSNicholas Piggin else 825*252988cbSNicholas Piggin // Shouldn't happen due to higher level checks 826*252988cbSNicholas Piggin WARN_ON_ONCE(1); 8279422de3eSMichael Neuling } 82814cf11afSPaul Mackerras 82921f58507SPaul Gortmaker void set_breakpoint(struct arch_hw_breakpoint *brk) 83021f58507SPaul Gortmaker { 83121f58507SPaul Gortmaker preempt_disable(); 83221f58507SPaul Gortmaker __set_breakpoint(brk); 83321f58507SPaul Gortmaker preempt_enable(); 83421f58507SPaul Gortmaker } 83521f58507SPaul Gortmaker 836404b27d6SMichael Neuling /* Check if we have DAWR or DABR hardware */ 837404b27d6SMichael Neuling bool ppc_breakpoint_available(void) 838404b27d6SMichael Neuling { 839404b27d6SMichael Neuling if (cpu_has_feature(CPU_FTR_DAWR)) 840404b27d6SMichael Neuling return true; /* POWER8 DAWR */ 841404b27d6SMichael Neuling if (cpu_has_feature(CPU_FTR_ARCH_207S)) 842404b27d6SMichael Neuling return false; /* POWER9 with DAWR disabled */ 843404b27d6SMichael Neuling /* DABR: Everything but POWER8 and POWER9 */ 844404b27d6SMichael Neuling return true; 845404b27d6SMichael Neuling } 846404b27d6SMichael Neuling EXPORT_SYMBOL_GPL(ppc_breakpoint_available); 847404b27d6SMichael Neuling 84806d67d54SPaul Mackerras #ifdef CONFIG_PPC64 84906d67d54SPaul Mackerras DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 85006d67d54SPaul Mackerras #endif 85114cf11afSPaul Mackerras 8529422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 8539422de3eSMichael Neuling struct arch_hw_breakpoint *b) 8549422de3eSMichael Neuling { 8559422de3eSMichael Neuling if (a->address != b->address) 8569422de3eSMichael Neuling return false; 8579422de3eSMichael Neuling if (a->type != b->type) 8589422de3eSMichael Neuling return false; 8599422de3eSMichael Neuling if (a->len != b->len) 8609422de3eSMichael Neuling return false; 8619422de3eSMichael Neuling return true; 8629422de3eSMichael Neuling } 863d31626f7SPaul Mackerras 864fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 8655d176f75SCyril Bur 8665d176f75SCyril Bur static inline bool tm_enabled(struct task_struct *tsk) 8675d176f75SCyril Bur { 8685d176f75SCyril Bur return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); 8695d176f75SCyril Bur } 8705d176f75SCyril Bur 871d31626f7SPaul Mackerras static void tm_reclaim_thread(struct thread_struct *thr, 872d31626f7SPaul Mackerras struct thread_info *ti, uint8_t cause) 873d31626f7SPaul Mackerras { 8747f821fc9SMichael Neuling /* 8757f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 8767f821fc9SMichael Neuling * checkpointed state outstanding. 8777f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 8787f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 8797f821fc9SMichael Neuling * This will then directly return to userspace without going 8807f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 8817f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 8827f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 8837f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 8847f821fc9SMichael Neuling * this state. 8857f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 8867f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 887027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 8887f821fc9SMichael Neuling */ 8897f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 8907f821fc9SMichael Neuling return; 8917f821fc9SMichael Neuling 89291381b9cSCyril Bur giveup_all(container_of(thr, struct task_struct, thread)); 89391381b9cSCyril Bur 894eb5c3f1cSCyril Bur tm_reclaim(thr, cause); 895eb5c3f1cSCyril Bur 896f48e91e8SMichael Neuling /* 897f48e91e8SMichael Neuling * If we are in a transaction and FP is off then we can't have 898f48e91e8SMichael Neuling * used FP inside that transaction. Hence the checkpointed 899f48e91e8SMichael Neuling * state is the same as the live state. We need to copy the 900f48e91e8SMichael Neuling * live state to the checkpointed state so that when the 901f48e91e8SMichael Neuling * transaction is restored, the checkpointed state is correct 902f48e91e8SMichael Neuling * and the aborted transaction sees the correct state. We use 903f48e91e8SMichael Neuling * ckpt_regs.msr here as that's what tm_reclaim will use to 904f48e91e8SMichael Neuling * determine if it's going to write the checkpointed state or 905f48e91e8SMichael Neuling * not. So either this will write the checkpointed registers, 906f48e91e8SMichael Neuling * or reclaim will. Similarly for VMX. 907f48e91e8SMichael Neuling */ 908f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_FP) == 0) 909f48e91e8SMichael Neuling memcpy(&thr->ckfp_state, &thr->fp_state, 910f48e91e8SMichael Neuling sizeof(struct thread_fp_state)); 911f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_VEC) == 0) 912f48e91e8SMichael Neuling memcpy(&thr->ckvr_state, &thr->vr_state, 913f48e91e8SMichael Neuling sizeof(struct thread_vr_state)); 914d31626f7SPaul Mackerras } 915d31626f7SPaul Mackerras 916d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 917d31626f7SPaul Mackerras { 918d31626f7SPaul Mackerras tm_enable(); 919d31626f7SPaul Mackerras tm_reclaim_thread(¤t->thread, current_thread_info(), cause); 920d31626f7SPaul Mackerras } 921d31626f7SPaul Mackerras 922fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 923fb09692eSMichael Neuling { 924fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 925fb09692eSMichael Neuling * middle of a transaction. 926fb09692eSMichael Neuling * 927fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 928fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 929000ec280SCyril Bur * checkpointed (tbegin) state in ckpt_regs, ckfp_state and 930000ec280SCyril Bur * ckvr_state 931fb09692eSMichael Neuling * 932fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 933fb09692eSMichael Neuling */ 934fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 935fb09692eSMichael Neuling 936fb09692eSMichael Neuling if (!thr->regs) 937fb09692eSMichael Neuling return; 938fb09692eSMichael Neuling 939fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 940fb09692eSMichael Neuling goto out_and_saveregs; 941fb09692eSMichael Neuling 94292fb8690SMichael Neuling WARN_ON(tm_suspend_disabled); 94392fb8690SMichael Neuling 944fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 945fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 946fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 947fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 948fb09692eSMichael Neuling thr->regs->trap); 949fb09692eSMichael Neuling 950d31626f7SPaul Mackerras tm_reclaim_thread(thr, task_thread_info(tsk), TM_CAUSE_RESCHED); 951fb09692eSMichael Neuling 952fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 953fb09692eSMichael Neuling tsk->pid); 954fb09692eSMichael Neuling 955fb09692eSMichael Neuling out_and_saveregs: 956fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 957fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 958fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 959fb09692eSMichael Neuling * cannot happen later in _switch(). 960fb09692eSMichael Neuling */ 961fb09692eSMichael Neuling tm_save_sprs(thr); 962fb09692eSMichael Neuling } 963fb09692eSMichael Neuling 964eb5c3f1cSCyril Bur extern void __tm_recheckpoint(struct thread_struct *thread); 965e6b8fd02SMichael Neuling 966eb5c3f1cSCyril Bur void tm_recheckpoint(struct thread_struct *thread) 967e6b8fd02SMichael Neuling { 968e6b8fd02SMichael Neuling unsigned long flags; 969e6b8fd02SMichael Neuling 9705d176f75SCyril Bur if (!(thread->regs->msr & MSR_TM)) 9715d176f75SCyril Bur return; 9725d176f75SCyril Bur 973e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 974e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 975e6b8fd02SMichael Neuling * So let's hard disable over this region. 976e6b8fd02SMichael Neuling */ 977e6b8fd02SMichael Neuling local_irq_save(flags); 978e6b8fd02SMichael Neuling hard_irq_disable(); 979e6b8fd02SMichael Neuling 980e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 981e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 982e6b8fd02SMichael Neuling */ 983e6b8fd02SMichael Neuling tm_restore_sprs(thread); 984e6b8fd02SMichael Neuling 985eb5c3f1cSCyril Bur __tm_recheckpoint(thread); 986e6b8fd02SMichael Neuling 987e6b8fd02SMichael Neuling local_irq_restore(flags); 988e6b8fd02SMichael Neuling } 989e6b8fd02SMichael Neuling 990bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 991fb09692eSMichael Neuling { 992fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 993fb09692eSMichael Neuling return; 994fb09692eSMichael Neuling 995fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 996fb09692eSMichael Neuling * 997fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 998fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 999fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 1000dc310669SCyril Bur * unavailable later, we are unable to determine which set of FP regs 1001fb09692eSMichael Neuling * need to be restored. 1002fb09692eSMichael Neuling */ 10035d176f75SCyril Bur if (!tm_enabled(new)) 1004fb09692eSMichael Neuling return; 1005fb09692eSMichael Neuling 1006e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 1007fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 1008fb09692eSMichael Neuling return; 1009e6b8fd02SMichael Neuling } 1010fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 1011eb5c3f1cSCyril Bur TM_DEBUG("*** tm_recheckpoint of pid %d (new->msr 0x%lx)\n", 1012eb5c3f1cSCyril Bur new->pid, new->thread.regs->msr); 1013fb09692eSMichael Neuling 1014eb5c3f1cSCyril Bur tm_recheckpoint(&new->thread); 1015fb09692eSMichael Neuling 1016dc310669SCyril Bur /* 1017dc310669SCyril Bur * The checkpointed state has been restored but the live state has 1018dc310669SCyril Bur * not, ensure all the math functionality is turned off to trigger 1019dc310669SCyril Bur * restore_math() to reload. 1020dc310669SCyril Bur */ 1021dc310669SCyril Bur new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); 1022fb09692eSMichael Neuling 1023fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 1024fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 1025fb09692eSMichael Neuling new->pid, mfmsr()); 1026fb09692eSMichael Neuling } 1027fb09692eSMichael Neuling 1028dc310669SCyril Bur static inline void __switch_to_tm(struct task_struct *prev, 1029dc310669SCyril Bur struct task_struct *new) 1030fb09692eSMichael Neuling { 1031fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 10325d176f75SCyril Bur if (tm_enabled(prev) || tm_enabled(new)) 1033fb09692eSMichael Neuling tm_enable(); 10345d176f75SCyril Bur 10355d176f75SCyril Bur if (tm_enabled(prev)) { 10365d176f75SCyril Bur prev->thread.load_tm++; 1037fb09692eSMichael Neuling tm_reclaim_task(prev); 10385d176f75SCyril Bur if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) 10395d176f75SCyril Bur prev->thread.regs->msr &= ~MSR_TM; 10405d176f75SCyril Bur } 10415d176f75SCyril Bur 1042dc310669SCyril Bur tm_recheckpoint_new_task(new); 1043fb09692eSMichael Neuling } 1044fb09692eSMichael Neuling } 1045d31626f7SPaul Mackerras 1046d31626f7SPaul Mackerras /* 1047d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 1048d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 1049d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 1050d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 1051d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 1052d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 1053d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 1054d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 1055d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 1056d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 1057d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 1058d31626f7SPaul Mackerras * state to use. 1059d31626f7SPaul Mackerras */ 1060d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 1061d31626f7SPaul Mackerras { 1062d31626f7SPaul Mackerras unsigned long msr_diff; 1063d31626f7SPaul Mackerras 1064dc310669SCyril Bur /* 1065dc310669SCyril Bur * This is the only moment we should clear TIF_RESTORE_TM as 1066dc310669SCyril Bur * it is here that ckpt_regs.msr and pt_regs.msr become the same 1067dc310669SCyril Bur * again, anything else could lead to an incorrect ckpt_msr being 1068dc310669SCyril Bur * saved and therefore incorrect signal contexts. 1069dc310669SCyril Bur */ 1070d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 1071d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 1072d31626f7SPaul Mackerras return; 1073d31626f7SPaul Mackerras 1074829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 1075d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 107670fe3d98SCyril Bur 1077dc16b553SCyril Bur /* Ensure that restore_math() will restore */ 1078dc16b553SCyril Bur if (msr_diff & MSR_FP) 1079dc16b553SCyril Bur current->thread.load_fp = 1; 108039715bf9SValentin Rothberg #ifdef CONFIG_ALTIVEC 1081dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC) 1082dc16b553SCyril Bur current->thread.load_vec = 1; 1083dc16b553SCyril Bur #endif 108470fe3d98SCyril Bur restore_math(regs); 108570fe3d98SCyril Bur 1086d31626f7SPaul Mackerras regs->msr |= msr_diff; 1087d31626f7SPaul Mackerras } 1088d31626f7SPaul Mackerras 1089fb09692eSMichael Neuling #else 1090fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 1091dc310669SCyril Bur #define __switch_to_tm(prev, new) 1092fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 10939422de3eSMichael Neuling 1094152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 1095152d523eSAnton Blanchard { 1096152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 109701d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1098152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1099152d523eSAnton Blanchard #endif 1100152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1101152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1102152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1103152d523eSAnton Blanchard 1104152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1105152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1106152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1107152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1108152d523eSAnton Blanchard 1109152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1110152d523eSAnton Blanchard 1111152d523eSAnton Blanchard /* 1112152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1113152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1114152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1115152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1116152d523eSAnton Blanchard */ 1117152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1118152d523eSAnton Blanchard } 1119152d523eSAnton Blanchard #endif 112006bb53b3SRam Pai 112106bb53b3SRam Pai thread_pkey_regs_save(t); 1122152d523eSAnton Blanchard } 1123152d523eSAnton Blanchard 1124152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1125152d523eSAnton Blanchard struct thread_struct *new_thread) 1126152d523eSAnton Blanchard { 1127152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1128152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1129152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1130152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1131152d523eSAnton Blanchard #endif 1132152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1133152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1134152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1135b57bd2deSMichael Neuling if (new_thread->dscr_inherit) 1136152d523eSAnton Blanchard dscr = new_thread->dscr; 1137152d523eSAnton Blanchard 1138152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1139152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1140152d523eSAnton Blanchard } 1141152d523eSAnton Blanchard 1142152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1143152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1144152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1145152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1146152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1147152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1148152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1149152d523eSAnton Blanchard 1150b57bd2deSMichael Neuling if (old_thread->fscr != new_thread->fscr) 1151b57bd2deSMichael Neuling mtspr(SPRN_FSCR, new_thread->fscr); 1152b57bd2deSMichael Neuling 1153152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1154152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1155152d523eSAnton Blanchard } 1156ec233edeSSukadev Bhattiprolu 1157ec233edeSSukadev Bhattiprolu if (cpu_has_feature(CPU_FTR_ARCH_300) && 1158ec233edeSSukadev Bhattiprolu old_thread->tidr != new_thread->tidr) 1159ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, new_thread->tidr); 1160152d523eSAnton Blanchard #endif 116106bb53b3SRam Pai 116206bb53b3SRam Pai thread_pkey_regs_restore(new_thread, old_thread); 1163152d523eSAnton Blanchard } 1164152d523eSAnton Blanchard 116507d2a628SNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 116607d2a628SNicholas Piggin #define CP_SIZE 128 116707d2a628SNicholas Piggin static const u8 dummy_copy_buffer[CP_SIZE] __attribute__((aligned(CP_SIZE))); 116807d2a628SNicholas Piggin #endif 116907d2a628SNicholas Piggin 117014cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 117114cf11afSPaul Mackerras struct task_struct *new) 117214cf11afSPaul Mackerras { 117314cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 117414cf11afSPaul Mackerras struct task_struct *last; 1175d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 1176d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1177d6bf29b4SPeter Zijlstra #endif 117814cf11afSPaul Mackerras 1179152d523eSAnton Blanchard new_thread = &new->thread; 1180152d523eSAnton Blanchard old_thread = ¤t->thread; 1181152d523eSAnton Blanchard 11827ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 11837ba5fef7SMichael Neuling 118406d67d54SPaul Mackerras #ifdef CONFIG_PPC64 118506d67d54SPaul Mackerras /* 118606d67d54SPaul Mackerras * Collect processor utilization data per process 118706d67d54SPaul Mackerras */ 118806d67d54SPaul Mackerras if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 118969111bacSChristoph Lameter struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array); 119006d67d54SPaul Mackerras long unsigned start_tb, current_tb; 119106d67d54SPaul Mackerras start_tb = old_thread->start_tb; 119206d67d54SPaul Mackerras cu->current_tb = current_tb = mfspr(SPRN_PURR); 119306d67d54SPaul Mackerras old_thread->accum_tb += (current_tb - start_tb); 119406d67d54SPaul Mackerras new_thread->start_tb = current_tb; 119506d67d54SPaul Mackerras } 1196d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC64 */ 1197d6bf29b4SPeter Zijlstra 11984e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 119969111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1200d6bf29b4SPeter Zijlstra if (batch->active) { 1201d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1202d6bf29b4SPeter Zijlstra if (batch->index) 1203d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1204d6bf29b4SPeter Zijlstra batch->active = 0; 1205d6bf29b4SPeter Zijlstra } 12064e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 120706d67d54SPaul Mackerras 1208f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1209f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1210f3d885ccSAnton Blanchard #else 1211f3d885ccSAnton Blanchard /* 1212f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1213f3d885ccSAnton Blanchard * schedule DABR 1214f3d885ccSAnton Blanchard */ 1215f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1216f3d885ccSAnton Blanchard if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk))) 1217f3d885ccSAnton Blanchard __set_breakpoint(&new->thread.hw_brk); 1218f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1219f3d885ccSAnton Blanchard #endif 1220f3d885ccSAnton Blanchard 1221f3d885ccSAnton Blanchard /* 1222f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1223f3d885ccSAnton Blanchard * change a number of them. 1224f3d885ccSAnton Blanchard */ 1225f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1226f3d885ccSAnton Blanchard 1227f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1228f3d885ccSAnton Blanchard giveup_all(prev); 1229f3d885ccSAnton Blanchard 1230dc310669SCyril Bur __switch_to_tm(prev, new); 1231dc310669SCyril Bur 1232e4c0fc5fSNicholas Piggin if (!radix_enabled()) { 123344387e9fSAnton Blanchard /* 1234e4c0fc5fSNicholas Piggin * We can't take a PMU exception inside _switch() since there 1235e4c0fc5fSNicholas Piggin * is a window where the kernel stack SLB and the kernel stack 1236e4c0fc5fSNicholas Piggin * are out of sync. Hard disable here. 123744387e9fSAnton Blanchard */ 123844387e9fSAnton Blanchard hard_irq_disable(); 1239e4c0fc5fSNicholas Piggin } 1240bc2a9408SMichael Neuling 124120dbe670SAnton Blanchard /* 124220dbe670SAnton Blanchard * Call restore_sprs() before calling _switch(). If we move it after 124320dbe670SAnton Blanchard * _switch() then we miss out on calling it for new tasks. The reason 124420dbe670SAnton Blanchard * for this is we manually create a stack frame for new tasks that 124520dbe670SAnton Blanchard * directly returns through ret_from_fork() or 124620dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 124720dbe670SAnton Blanchard */ 1248f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1249f3d885ccSAnton Blanchard 125020dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 125120dbe670SAnton Blanchard 12524e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1253d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1254d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 125569111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1256d6bf29b4SPeter Zijlstra batch->active = 1; 1257d6bf29b4SPeter Zijlstra } 125870fe3d98SCyril Bur 125907d2a628SNicholas Piggin if (current_thread_info()->task->thread.regs) { 126070fe3d98SCyril Bur restore_math(current_thread_info()->task->thread.regs); 126107d2a628SNicholas Piggin 126207d2a628SNicholas Piggin /* 126307d2a628SNicholas Piggin * The copy-paste buffer can only store into foreign real 126407d2a628SNicholas Piggin * addresses, so unprivileged processes can not see the 126507d2a628SNicholas Piggin * data or use it in any way unless they have foreign real 12669d2a4d71SSukadev Bhattiprolu * mappings. If the new process has the foreign real address 12679d2a4d71SSukadev Bhattiprolu * mappings, we must issue a cp_abort to clear any state and 12689d2a4d71SSukadev Bhattiprolu * prevent snooping, corruption or a covert channel. 126907d2a628SNicholas Piggin * 12709d2a4d71SSukadev Bhattiprolu * DD1 allows paste into normal system memory so we do an 12719d2a4d71SSukadev Bhattiprolu * unpaired copy, rather than cp_abort, to clear the buffer, 12729d2a4d71SSukadev Bhattiprolu * since cp_abort is quite expensive. 127307d2a628SNicholas Piggin */ 12749d2a4d71SSukadev Bhattiprolu if (current_thread_info()->task->thread.used_vas) { 12759d2a4d71SSukadev Bhattiprolu asm volatile(PPC_CP_ABORT); 12769d2a4d71SSukadev Bhattiprolu } else if (cpu_has_feature(CPU_FTR_POWER9_DD1)) { 127707d2a628SNicholas Piggin asm volatile(PPC_COPY(%0, %1) 127807d2a628SNicholas Piggin : : "r"(dummy_copy_buffer), "r"(0)); 127907d2a628SNicholas Piggin } 128007d2a628SNicholas Piggin } 12814e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 1282d6bf29b4SPeter Zijlstra 128314cf11afSPaul Mackerras return last; 128414cf11afSPaul Mackerras } 128514cf11afSPaul Mackerras 128606d67d54SPaul Mackerras static int instructions_to_print = 16; 128706d67d54SPaul Mackerras 128806d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 128906d67d54SPaul Mackerras { 129006d67d54SPaul Mackerras int i; 129106d67d54SPaul Mackerras unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 129206d67d54SPaul Mackerras sizeof(int)); 129306d67d54SPaul Mackerras 129406d67d54SPaul Mackerras printk("Instruction dump:"); 129506d67d54SPaul Mackerras 129606d67d54SPaul Mackerras for (i = 0; i < instructions_to_print; i++) { 129706d67d54SPaul Mackerras int instr; 129806d67d54SPaul Mackerras 129906d67d54SPaul Mackerras if (!(i % 8)) 13002ffd04deSAndrew Donnellan pr_cont("\n"); 130106d67d54SPaul Mackerras 13020de2d820SScott Wood #if !defined(CONFIG_BOOKE) 13030de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 13040de2d820SScott Wood * than print XXXXXXXX. 13050de2d820SScott Wood */ 13060de2d820SScott Wood if (!(regs->msr & MSR_IR)) 13070de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 13080de2d820SScott Wood #endif 13090de2d820SScott Wood 131000ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 13117b051f66SAnton Blanchard probe_kernel_address((unsigned int __user *)pc, instr)) { 13122ffd04deSAndrew Donnellan pr_cont("XXXXXXXX "); 131306d67d54SPaul Mackerras } else { 131406d67d54SPaul Mackerras if (regs->nip == pc) 13152ffd04deSAndrew Donnellan pr_cont("<%08x> ", instr); 131606d67d54SPaul Mackerras else 13172ffd04deSAndrew Donnellan pr_cont("%08x ", instr); 131806d67d54SPaul Mackerras } 131906d67d54SPaul Mackerras 132006d67d54SPaul Mackerras pc += sizeof(int); 132106d67d54SPaul Mackerras } 132206d67d54SPaul Mackerras 13232ffd04deSAndrew Donnellan pr_cont("\n"); 132406d67d54SPaul Mackerras } 132506d67d54SPaul Mackerras 1326801c0b2cSMichael Neuling struct regbit { 132706d67d54SPaul Mackerras unsigned long bit; 132806d67d54SPaul Mackerras const char *name; 1329801c0b2cSMichael Neuling }; 1330801c0b2cSMichael Neuling 1331801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 13323bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 13333bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 13343bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 13353bfd0c9cSAnton Blanchard #endif 13363bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 13373bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 13383bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 13393bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 13403bfd0c9cSAnton Blanchard #endif 134106d67d54SPaul Mackerras {MSR_EE, "EE"}, 134206d67d54SPaul Mackerras {MSR_PR, "PR"}, 134306d67d54SPaul Mackerras {MSR_FP, "FP"}, 134406d67d54SPaul Mackerras {MSR_ME, "ME"}, 13453bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 13461b98326bSKumar Gala {MSR_DE, "DE"}, 13473bfd0c9cSAnton Blanchard #else 13483bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 13493bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 13503bfd0c9cSAnton Blanchard #endif 135106d67d54SPaul Mackerras {MSR_IR, "IR"}, 135206d67d54SPaul Mackerras {MSR_DR, "DR"}, 13533bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 13543bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 13553bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 13563bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 13573bfd0c9cSAnton Blanchard #endif 135806d67d54SPaul Mackerras {0, NULL} 135906d67d54SPaul Mackerras }; 136006d67d54SPaul Mackerras 1361801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 136206d67d54SPaul Mackerras { 1363801c0b2cSMichael Neuling const char *s = ""; 136406d67d54SPaul Mackerras 136506d67d54SPaul Mackerras for (; bits->bit; ++bits) 136606d67d54SPaul Mackerras if (val & bits->bit) { 1367db5ba5aeSMichael Ellerman pr_cont("%s%s", s, bits->name); 1368801c0b2cSMichael Neuling s = sep; 136906d67d54SPaul Mackerras } 1370801c0b2cSMichael Neuling } 1371801c0b2cSMichael Neuling 1372801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1373801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1374801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1375801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1376801c0b2cSMichael Neuling {MSR_TM, "E"}, 1377801c0b2cSMichael Neuling {0, NULL} 1378801c0b2cSMichael Neuling }; 1379801c0b2cSMichael Neuling 1380801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1381801c0b2cSMichael Neuling { 1382801c0b2cSMichael Neuling /* 1383801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1384801c0b2cSMichael Neuling * Inside the TM[], the output means: 1385801c0b2cSMichael Neuling * E: Enabled (bit 32) 1386801c0b2cSMichael Neuling * S: Suspended (bit 33) 1387801c0b2cSMichael Neuling * T: Transactional (bit 34) 1388801c0b2cSMichael Neuling */ 1389801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1390db5ba5aeSMichael Ellerman pr_cont(",TM["); 1391801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1392db5ba5aeSMichael Ellerman pr_cont("]"); 1393801c0b2cSMichael Neuling } 1394801c0b2cSMichael Neuling } 1395801c0b2cSMichael Neuling #else 1396801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1397801c0b2cSMichael Neuling #endif 1398801c0b2cSMichael Neuling 1399801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1400801c0b2cSMichael Neuling { 1401db5ba5aeSMichael Ellerman pr_cont("<"); 1402801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1403801c0b2cSMichael Neuling print_tm_bits(val); 1404db5ba5aeSMichael Ellerman pr_cont(">"); 140506d67d54SPaul Mackerras } 140606d67d54SPaul Mackerras 140706d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1408f6f7dde3Santon@samba.org #define REG "%016lx" 140906d67d54SPaul Mackerras #define REGS_PER_LINE 4 141006d67d54SPaul Mackerras #define LAST_VOLATILE 13 141106d67d54SPaul Mackerras #else 1412f6f7dde3Santon@samba.org #define REG "%08lx" 141306d67d54SPaul Mackerras #define REGS_PER_LINE 8 141406d67d54SPaul Mackerras #define LAST_VOLATILE 12 141506d67d54SPaul Mackerras #endif 141606d67d54SPaul Mackerras 141714cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 141814cf11afSPaul Mackerras { 141914cf11afSPaul Mackerras int i, trap; 142014cf11afSPaul Mackerras 1421a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1422a43cb95dSTejun Heo 142306d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 142406d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 1425182dc9c7SMichael Ellerman printk("REGS: %px TRAP: %04lx %s (%s)\n", 142696b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 142706d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1428801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1429f6fc73fbSMichael Ellerman pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 143014cf11afSPaul Mackerras trap = TRAP(regs); 14312271db20SBenjamin Herrenschmidt if ((TRAP(regs) != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 14327dae865fSMichael Ellerman pr_cont("CFAR: "REG" ", regs->orig_gpr3); 1433c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1434ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 14357dae865fSMichael Ellerman pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 143614170789SKumar Gala #else 14377dae865fSMichael Ellerman pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 14389db8bcfdSAnton Blanchard #endif 14399db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 14407dae865fSMichael Ellerman pr_cont("SOFTE: %ld ", regs->softe); 14419db8bcfdSAnton Blanchard #endif 14429db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 14436d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 14447dae865fSMichael Ellerman pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 144514170789SKumar Gala #endif 144614cf11afSPaul Mackerras 144714cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 144806d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 14497dae865fSMichael Ellerman pr_cont("\nGPR%02d: ", i); 14507dae865fSMichael Ellerman pr_cont(REG " ", regs->gpr[i]); 145106d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 145214cf11afSPaul Mackerras break; 145314cf11afSPaul Mackerras } 14547dae865fSMichael Ellerman pr_cont("\n"); 145514cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 145614cf11afSPaul Mackerras /* 145714cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 145814cf11afSPaul Mackerras * above info out without failing 145914cf11afSPaul Mackerras */ 1460058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1461058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 146214cf11afSPaul Mackerras #endif 146314cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 146406d67d54SPaul Mackerras if (!user_mode(regs)) 146506d67d54SPaul Mackerras show_instructions(regs); 146614cf11afSPaul Mackerras } 146714cf11afSPaul Mackerras 146814cf11afSPaul Mackerras void flush_thread(void) 146914cf11afSPaul Mackerras { 1470e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 14715aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1472e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 14733bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1474e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 147514cf11afSPaul Mackerras } 147614cf11afSPaul Mackerras 14779d2a4d71SSukadev Bhattiprolu int set_thread_uses_vas(void) 14789d2a4d71SSukadev Bhattiprolu { 14799d2a4d71SSukadev Bhattiprolu #ifdef CONFIG_PPC_BOOK3S_64 14809d2a4d71SSukadev Bhattiprolu if (!cpu_has_feature(CPU_FTR_ARCH_300)) 14819d2a4d71SSukadev Bhattiprolu return -EINVAL; 14829d2a4d71SSukadev Bhattiprolu 14839d2a4d71SSukadev Bhattiprolu current->thread.used_vas = 1; 14849d2a4d71SSukadev Bhattiprolu 14859d2a4d71SSukadev Bhattiprolu /* 14869d2a4d71SSukadev Bhattiprolu * Even a process that has no foreign real address mapping can use 14879d2a4d71SSukadev Bhattiprolu * an unpaired COPY instruction (to no real effect). Issue CP_ABORT 14889d2a4d71SSukadev Bhattiprolu * to clear any pending COPY and prevent a covert channel. 14899d2a4d71SSukadev Bhattiprolu * 14909d2a4d71SSukadev Bhattiprolu * __switch_to() will issue CP_ABORT on future context switches. 14919d2a4d71SSukadev Bhattiprolu */ 14929d2a4d71SSukadev Bhattiprolu asm volatile(PPC_CP_ABORT); 14939d2a4d71SSukadev Bhattiprolu 14949d2a4d71SSukadev Bhattiprolu #endif /* CONFIG_PPC_BOOK3S_64 */ 14959d2a4d71SSukadev Bhattiprolu return 0; 14969d2a4d71SSukadev Bhattiprolu } 14979d2a4d71SSukadev Bhattiprolu 1498ec233edeSSukadev Bhattiprolu #ifdef CONFIG_PPC64 1499ec233edeSSukadev Bhattiprolu static DEFINE_SPINLOCK(vas_thread_id_lock); 1500ec233edeSSukadev Bhattiprolu static DEFINE_IDA(vas_thread_ida); 1501ec233edeSSukadev Bhattiprolu 1502ec233edeSSukadev Bhattiprolu /* 1503ec233edeSSukadev Bhattiprolu * We need to assign a unique thread id to each thread in a process. 1504ec233edeSSukadev Bhattiprolu * 1505ec233edeSSukadev Bhattiprolu * This thread id, referred to as TIDR, and separate from the Linux's tgid, 1506ec233edeSSukadev Bhattiprolu * is intended to be used to direct an ASB_Notify from the hardware to the 1507ec233edeSSukadev Bhattiprolu * thread, when a suitable event occurs in the system. 1508ec233edeSSukadev Bhattiprolu * 1509ec233edeSSukadev Bhattiprolu * One such event is a "paste" instruction in the context of Fast Thread 1510ec233edeSSukadev Bhattiprolu * Wakeup (aka Core-to-core wake up in the Virtual Accelerator Switchboard 1511ec233edeSSukadev Bhattiprolu * (VAS) in POWER9. 1512ec233edeSSukadev Bhattiprolu * 1513ec233edeSSukadev Bhattiprolu * To get a unique TIDR per process we could simply reuse task_pid_nr() but 1514ec233edeSSukadev Bhattiprolu * the problem is that task_pid_nr() is not yet available copy_thread() is 1515ec233edeSSukadev Bhattiprolu * called. Fixing that would require changing more intrusive arch-neutral 1516ec233edeSSukadev Bhattiprolu * code in code path in copy_process()?. 1517ec233edeSSukadev Bhattiprolu * 1518ec233edeSSukadev Bhattiprolu * Further, to assign unique TIDRs within each process, we need an atomic 1519ec233edeSSukadev Bhattiprolu * field (or an IDR) in task_struct, which again intrudes into the arch- 1520ec233edeSSukadev Bhattiprolu * neutral code. So try to assign globally unique TIDRs for now. 1521ec233edeSSukadev Bhattiprolu * 1522ec233edeSSukadev Bhattiprolu * NOTE: TIDR 0 indicates that the thread does not need a TIDR value. 1523ec233edeSSukadev Bhattiprolu * For now, only threads that expect to be notified by the VAS 1524ec233edeSSukadev Bhattiprolu * hardware need a TIDR value and we assign values > 0 for those. 1525ec233edeSSukadev Bhattiprolu */ 1526ec233edeSSukadev Bhattiprolu #define MAX_THREAD_CONTEXT ((1 << 16) - 1) 1527ec233edeSSukadev Bhattiprolu static int assign_thread_tidr(void) 1528ec233edeSSukadev Bhattiprolu { 1529ec233edeSSukadev Bhattiprolu int index; 1530ec233edeSSukadev Bhattiprolu int err; 1531384dfd62SSukadev Bhattiprolu unsigned long flags; 1532ec233edeSSukadev Bhattiprolu 1533ec233edeSSukadev Bhattiprolu again: 1534ec233edeSSukadev Bhattiprolu if (!ida_pre_get(&vas_thread_ida, GFP_KERNEL)) 1535ec233edeSSukadev Bhattiprolu return -ENOMEM; 1536ec233edeSSukadev Bhattiprolu 1537384dfd62SSukadev Bhattiprolu spin_lock_irqsave(&vas_thread_id_lock, flags); 1538ec233edeSSukadev Bhattiprolu err = ida_get_new_above(&vas_thread_ida, 1, &index); 1539384dfd62SSukadev Bhattiprolu spin_unlock_irqrestore(&vas_thread_id_lock, flags); 1540ec233edeSSukadev Bhattiprolu 1541ec233edeSSukadev Bhattiprolu if (err == -EAGAIN) 1542ec233edeSSukadev Bhattiprolu goto again; 1543ec233edeSSukadev Bhattiprolu else if (err) 1544ec233edeSSukadev Bhattiprolu return err; 1545ec233edeSSukadev Bhattiprolu 1546ec233edeSSukadev Bhattiprolu if (index > MAX_THREAD_CONTEXT) { 1547384dfd62SSukadev Bhattiprolu spin_lock_irqsave(&vas_thread_id_lock, flags); 1548ec233edeSSukadev Bhattiprolu ida_remove(&vas_thread_ida, index); 1549384dfd62SSukadev Bhattiprolu spin_unlock_irqrestore(&vas_thread_id_lock, flags); 1550ec233edeSSukadev Bhattiprolu return -ENOMEM; 1551ec233edeSSukadev Bhattiprolu } 1552ec233edeSSukadev Bhattiprolu 1553ec233edeSSukadev Bhattiprolu return index; 1554ec233edeSSukadev Bhattiprolu } 1555ec233edeSSukadev Bhattiprolu 1556ec233edeSSukadev Bhattiprolu static void free_thread_tidr(int id) 1557ec233edeSSukadev Bhattiprolu { 1558384dfd62SSukadev Bhattiprolu unsigned long flags; 1559384dfd62SSukadev Bhattiprolu 1560384dfd62SSukadev Bhattiprolu spin_lock_irqsave(&vas_thread_id_lock, flags); 1561ec233edeSSukadev Bhattiprolu ida_remove(&vas_thread_ida, id); 1562384dfd62SSukadev Bhattiprolu spin_unlock_irqrestore(&vas_thread_id_lock, flags); 1563ec233edeSSukadev Bhattiprolu } 1564ec233edeSSukadev Bhattiprolu 1565ec233edeSSukadev Bhattiprolu /* 1566ec233edeSSukadev Bhattiprolu * Clear any TIDR value assigned to this thread. 1567ec233edeSSukadev Bhattiprolu */ 1568ec233edeSSukadev Bhattiprolu void clear_thread_tidr(struct task_struct *t) 1569ec233edeSSukadev Bhattiprolu { 1570ec233edeSSukadev Bhattiprolu if (!t->thread.tidr) 1571ec233edeSSukadev Bhattiprolu return; 1572ec233edeSSukadev Bhattiprolu 1573ec233edeSSukadev Bhattiprolu if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 1574ec233edeSSukadev Bhattiprolu WARN_ON_ONCE(1); 1575ec233edeSSukadev Bhattiprolu return; 1576ec233edeSSukadev Bhattiprolu } 1577ec233edeSSukadev Bhattiprolu 1578ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, 0); 1579ec233edeSSukadev Bhattiprolu free_thread_tidr(t->thread.tidr); 1580ec233edeSSukadev Bhattiprolu t->thread.tidr = 0; 1581ec233edeSSukadev Bhattiprolu } 1582ec233edeSSukadev Bhattiprolu 1583ec233edeSSukadev Bhattiprolu void arch_release_task_struct(struct task_struct *t) 1584ec233edeSSukadev Bhattiprolu { 1585ec233edeSSukadev Bhattiprolu clear_thread_tidr(t); 1586ec233edeSSukadev Bhattiprolu } 1587ec233edeSSukadev Bhattiprolu 1588ec233edeSSukadev Bhattiprolu /* 1589ec233edeSSukadev Bhattiprolu * Assign a unique TIDR (thread id) for task @t and set it in the thread 1590ec233edeSSukadev Bhattiprolu * structure. For now, we only support setting TIDR for 'current' task. 1591ec233edeSSukadev Bhattiprolu */ 1592ec233edeSSukadev Bhattiprolu int set_thread_tidr(struct task_struct *t) 1593ec233edeSSukadev Bhattiprolu { 1594aca7573fSVaibhav Jain int rc; 1595aca7573fSVaibhav Jain 1596ec233edeSSukadev Bhattiprolu if (!cpu_has_feature(CPU_FTR_ARCH_300)) 1597ec233edeSSukadev Bhattiprolu return -EINVAL; 1598ec233edeSSukadev Bhattiprolu 1599ec233edeSSukadev Bhattiprolu if (t != current) 1600ec233edeSSukadev Bhattiprolu return -EINVAL; 1601ec233edeSSukadev Bhattiprolu 16027e4d4233SVaibhav Jain if (t->thread.tidr) 16037e4d4233SVaibhav Jain return 0; 16047e4d4233SVaibhav Jain 1605aca7573fSVaibhav Jain rc = assign_thread_tidr(); 1606aca7573fSVaibhav Jain if (rc < 0) 1607aca7573fSVaibhav Jain return rc; 1608ec233edeSSukadev Bhattiprolu 1609aca7573fSVaibhav Jain t->thread.tidr = rc; 1610ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, t->thread.tidr); 1611ec233edeSSukadev Bhattiprolu 1612ec233edeSSukadev Bhattiprolu return 0; 1613ec233edeSSukadev Bhattiprolu } 1614b1db5513SChristophe Lombard EXPORT_SYMBOL_GPL(set_thread_tidr); 1615ec233edeSSukadev Bhattiprolu 1616ec233edeSSukadev Bhattiprolu #endif /* CONFIG_PPC64 */ 1617ec233edeSSukadev Bhattiprolu 161814cf11afSPaul Mackerras void 161914cf11afSPaul Mackerras release_thread(struct task_struct *t) 162014cf11afSPaul Mackerras { 162114cf11afSPaul Mackerras } 162214cf11afSPaul Mackerras 162314cf11afSPaul Mackerras /* 162455ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 162555ccf3feSSuresh Siddha * copy the current task into the new thread. 162614cf11afSPaul Mackerras */ 162755ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 162814cf11afSPaul Mackerras { 1629579e633eSAnton Blanchard flush_all_to_thread(src); 1630621b5060SMichael Neuling /* 1631621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1632621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1633621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1634621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1635621b5060SMichael Neuling * checkpointed state back and the TM mode. 16365d176f75SCyril Bur * 16375d176f75SCyril Bur * Can't pass dst because it isn't ready. Doesn't matter, passing 16385d176f75SCyril Bur * dst is only important for __switch_to() 1639621b5060SMichael Neuling */ 1640dc310669SCyril Bur __switch_to_tm(src, src); 1641330a1eb7SMichael Ellerman 164255ccf3feSSuresh Siddha *dst = *src; 1643330a1eb7SMichael Ellerman 1644330a1eb7SMichael Ellerman clear_task_ebb(dst); 1645330a1eb7SMichael Ellerman 164655ccf3feSSuresh Siddha return 0; 164714cf11afSPaul Mackerras } 164814cf11afSPaul Mackerras 1649cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1650cec15488SMichael Ellerman { 16514e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1652cec15488SMichael Ellerman unsigned long sp_vsid; 1653cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1654cec15488SMichael Ellerman 1655caca285eSAneesh Kumar K.V if (radix_enabled()) 1656caca285eSAneesh Kumar K.V return; 1657caca285eSAneesh Kumar K.V 1658cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1659cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1660cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1661cec15488SMichael Ellerman else 1662cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1663cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1664cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1665cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1666cec15488SMichael Ellerman #endif 1667cec15488SMichael Ellerman } 1668cec15488SMichael Ellerman 166914cf11afSPaul Mackerras /* 167014cf11afSPaul Mackerras * Copy a thread.. 167114cf11afSPaul Mackerras */ 1672efcac658SAlexey Kardashevskiy 16736eca8933SAlex Dowad /* 16746eca8933SAlex Dowad * Copy architecture-specific thread state 16756eca8933SAlex Dowad */ 16766f2c55b8SAlexey Dobriyan int copy_thread(unsigned long clone_flags, unsigned long usp, 16776eca8933SAlex Dowad unsigned long kthread_arg, struct task_struct *p) 167814cf11afSPaul Mackerras { 167914cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 168014cf11afSPaul Mackerras extern void ret_from_fork(void); 168158254e10SAl Viro extern void ret_from_kernel_thread(void); 168258254e10SAl Viro void (*f)(void); 16830cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 16845d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 16855d31a96eSMichael Ellerman 16865d31a96eSMichael Ellerman klp_init_thread_info(ti); 168714cf11afSPaul Mackerras 168814cf11afSPaul Mackerras /* Copy registers */ 168914cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 169014cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1691ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 16926eca8933SAlex Dowad /* kernel thread */ 169358254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 169414cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 16957cedd601SAnton Blanchard /* function */ 16967cedd601SAnton Blanchard if (usp) 16977cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 169858254e10SAl Viro #ifdef CONFIG_PPC64 1699b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1700c2e480baSMadhavan Srinivasan childregs->softe = IRQS_ENABLED; 170106d67d54SPaul Mackerras #endif 17026eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 170314cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1704138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 170558254e10SAl Viro f = ret_from_kernel_thread; 170614cf11afSPaul Mackerras } else { 17076eca8933SAlex Dowad /* user thread */ 1708afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 170958254e10SAl Viro CHECK_FULL_REGS(regs); 171058254e10SAl Viro *childregs = *regs; 1711ea516b11SAl Viro if (usp) 171214cf11afSPaul Mackerras childregs->gpr[1] = usp; 171314cf11afSPaul Mackerras p->thread.regs = childregs; 171458254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 171506d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 171606d67d54SPaul Mackerras #ifdef CONFIG_PPC64 17179904b005SDenis Kirjanov if (!is_32bit_task()) 171806d67d54SPaul Mackerras childregs->gpr[13] = childregs->gpr[6]; 171906d67d54SPaul Mackerras else 172006d67d54SPaul Mackerras #endif 172114cf11afSPaul Mackerras childregs->gpr[2] = childregs->gpr[6]; 172214cf11afSPaul Mackerras } 172358254e10SAl Viro 172458254e10SAl Viro f = ret_from_fork; 172506d67d54SPaul Mackerras } 1726d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 172714cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 172814cf11afSPaul Mackerras 172914cf11afSPaul Mackerras /* 173014cf11afSPaul Mackerras * The way this works is that at some point in the future 173114cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 173214cf11afSPaul Mackerras * That will pop off the stack frame created below and start 173314cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 173414cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 173514cf11afSPaul Mackerras * system call, using the stack frame created above. 173614cf11afSPaul Mackerras */ 1737af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 173814cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 173914cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 174014cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 174114cf11afSPaul Mackerras p->thread.ksp = sp; 1742cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 174385218827SKumar Gala p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 174485218827SKumar Gala _ALIGN_UP(sizeof(struct thread_info), 16); 1745cbc9565eSBenjamin Herrenschmidt #endif 174628d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 174728d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 174828d170abSOleg Nesterov #endif 174928d170abSOleg Nesterov 175018461960SPaul Mackerras p->thread.fp_save_area = NULL; 175118461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 175218461960SPaul Mackerras p->thread.vr_save_area = NULL; 175318461960SPaul Mackerras #endif 175418461960SPaul Mackerras 1755cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 175606d67d54SPaul Mackerras 1757efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1758efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 17591021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1760db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1761efcac658SAlexey Kardashevskiy } 176292779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 176392779245SHaren Myneni p->thread.ppr = INIT_PPR; 1764ec233edeSSukadev Bhattiprolu 1765ec233edeSSukadev Bhattiprolu p->thread.tidr = 0; 1766efcac658SAlexey Kardashevskiy #endif 17677cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 176814cf11afSPaul Mackerras return 0; 176914cf11afSPaul Mackerras } 177014cf11afSPaul Mackerras 177114cf11afSPaul Mackerras /* 177214cf11afSPaul Mackerras * Set up a thread for executing a new program 177314cf11afSPaul Mackerras */ 177406d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 177514cf11afSPaul Mackerras { 177690eac727SMichael Ellerman #ifdef CONFIG_PPC64 177790eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 177890eac727SMichael Ellerman #endif 177990eac727SMichael Ellerman 178006d67d54SPaul Mackerras /* 178106d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 178206d67d54SPaul Mackerras * set. Do it now. 178306d67d54SPaul Mackerras */ 178406d67d54SPaul Mackerras if (!current->thread.regs) { 17850cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 17860cec6fd1SAl Viro current->thread.regs = regs - 1; 178706d67d54SPaul Mackerras } 178806d67d54SPaul Mackerras 17898e96a87cSCyril Bur #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 17908e96a87cSCyril Bur /* 17918e96a87cSCyril Bur * Clear any transactional state, we're exec()ing. The cause is 17928e96a87cSCyril Bur * not important as there will never be a recheckpoint so it's not 17938e96a87cSCyril Bur * user visible. 17948e96a87cSCyril Bur */ 17958e96a87cSCyril Bur if (MSR_TM_SUSPENDED(mfmsr())) 17968e96a87cSCyril Bur tm_reclaim_current(0); 17978e96a87cSCyril Bur #endif 17988e96a87cSCyril Bur 179914cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 180014cf11afSPaul Mackerras regs->ctr = 0; 180114cf11afSPaul Mackerras regs->link = 0; 180214cf11afSPaul Mackerras regs->xer = 0; 180314cf11afSPaul Mackerras regs->ccr = 0; 180414cf11afSPaul Mackerras regs->gpr[1] = sp; 180506d67d54SPaul Mackerras 1806474f8196SRoland McGrath /* 1807474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1808474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1809474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1810474f8196SRoland McGrath */ 1811474f8196SRoland McGrath regs->trap &= ~1UL; 1812474f8196SRoland McGrath 181306d67d54SPaul Mackerras #ifdef CONFIG_PPC32 181406d67d54SPaul Mackerras regs->mq = 0; 181506d67d54SPaul Mackerras regs->nip = start; 181614cf11afSPaul Mackerras regs->msr = MSR_USER; 181706d67d54SPaul Mackerras #else 18189904b005SDenis Kirjanov if (!is_32bit_task()) { 181994af3abfSRusty Russell unsigned long entry; 182006d67d54SPaul Mackerras 182194af3abfSRusty Russell if (is_elf2_task()) { 182294af3abfSRusty Russell /* Look ma, no function descriptors! */ 182394af3abfSRusty Russell entry = start; 182494af3abfSRusty Russell 182594af3abfSRusty Russell /* 182694af3abfSRusty Russell * Ulrich says: 182794af3abfSRusty Russell * The latest iteration of the ABI requires that when 182894af3abfSRusty Russell * calling a function (at its global entry point), 182994af3abfSRusty Russell * the caller must ensure r12 holds the entry point 183094af3abfSRusty Russell * address (so that the function can quickly 183194af3abfSRusty Russell * establish addressability). 183294af3abfSRusty Russell */ 183394af3abfSRusty Russell regs->gpr[12] = start; 183494af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 183594af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 183694af3abfSRusty Russell } else { 183794af3abfSRusty Russell unsigned long toc; 183894af3abfSRusty Russell 183994af3abfSRusty Russell /* start is a relocated pointer to the function 184094af3abfSRusty Russell * descriptor for the elf _start routine. The first 184194af3abfSRusty Russell * entry in the function descriptor is the entry 184294af3abfSRusty Russell * address of _start and the second entry is the TOC 184394af3abfSRusty Russell * value we need to use. 184406d67d54SPaul Mackerras */ 184506d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 184606d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 184706d67d54SPaul Mackerras 184806d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 184906d67d54SPaul Mackerras * need to be relocated before we can use them. 185006d67d54SPaul Mackerras */ 185106d67d54SPaul Mackerras if (load_addr != 0) { 185206d67d54SPaul Mackerras entry += load_addr; 185306d67d54SPaul Mackerras toc += load_addr; 185406d67d54SPaul Mackerras } 185506d67d54SPaul Mackerras regs->gpr[2] = toc; 185694af3abfSRusty Russell } 185794af3abfSRusty Russell regs->nip = entry; 185806d67d54SPaul Mackerras regs->msr = MSR_USER64; 1859d4bf9a78SStephen Rothwell } else { 1860d4bf9a78SStephen Rothwell regs->nip = start; 1861d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1862d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 186306d67d54SPaul Mackerras } 186406d67d54SPaul Mackerras #endif 1865ce48b210SMichael Neuling #ifdef CONFIG_VSX 1866ce48b210SMichael Neuling current->thread.used_vsr = 0; 1867ce48b210SMichael Neuling #endif 18681195892cSBreno Leitao current->thread.load_fp = 0; 1869de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 187018461960SPaul Mackerras current->thread.fp_save_area = NULL; 187114cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1872de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1873de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 187418461960SPaul Mackerras current->thread.vr_save_area = NULL; 187514cf11afSPaul Mackerras current->thread.vrsave = 0; 187614cf11afSPaul Mackerras current->thread.used_vr = 0; 18771195892cSBreno Leitao current->thread.load_vec = 0; 187814cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 187914cf11afSPaul Mackerras #ifdef CONFIG_SPE 188014cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 188114cf11afSPaul Mackerras current->thread.acc = 0; 188214cf11afSPaul Mackerras current->thread.spefscr = 0; 188314cf11afSPaul Mackerras current->thread.used_spe = 0; 188414cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1885bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1886bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1887bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1888bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 18897f22ced4SBreno Leitao current->thread.load_tm = 0; 1890bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 189106bb53b3SRam Pai 189206bb53b3SRam Pai thread_pkey_regs_init(¤t->thread); 189314cf11afSPaul Mackerras } 1894e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 189514cf11afSPaul Mackerras 189614cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 189714cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 189814cf11afSPaul Mackerras 189914cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 190014cf11afSPaul Mackerras { 190114cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 190214cf11afSPaul Mackerras 190314cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 190414cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 190514cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 190614cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 190714cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 190814cf11afSPaul Mackerras #ifdef CONFIG_SPE 19095e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1910640e9225SJoseph Myers /* 1911640e9225SJoseph Myers * When the sticky exception bits are set 1912640e9225SJoseph Myers * directly by userspace, it must call prctl 1913640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1914640e9225SJoseph Myers * in the existing prctl settings) or 1915640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1916640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1917640e9225SJoseph Myers * saving and restoring the whole 1918640e9225SJoseph Myers * floating-point environment need to do so 1919640e9225SJoseph Myers * anyway to restore the prctl settings from 1920640e9225SJoseph Myers * the saved environment. 1921640e9225SJoseph Myers */ 1922640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 192314cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 192414cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 192506d67d54SPaul Mackerras return 0; 19265e14d21eSKumar Gala } else { 19275e14d21eSKumar Gala return -EINVAL; 19285e14d21eSKumar Gala } 192914cf11afSPaul Mackerras #else 193014cf11afSPaul Mackerras return -EINVAL; 193114cf11afSPaul Mackerras #endif 193206d67d54SPaul Mackerras } 193306d67d54SPaul Mackerras 193414cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 193514cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 193614cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 193714cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 193814cf11afSPaul Mackerras * them does not change anything */ 193914cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 194014cf11afSPaul Mackerras return -EINVAL; 194114cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 194214cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 194314cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 194414cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 194514cf11afSPaul Mackerras return 0; 194614cf11afSPaul Mackerras } 194714cf11afSPaul Mackerras 194814cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 194914cf11afSPaul Mackerras { 195014cf11afSPaul Mackerras unsigned int val; 195114cf11afSPaul Mackerras 195214cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 195314cf11afSPaul Mackerras #ifdef CONFIG_SPE 1954640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1955640e9225SJoseph Myers /* 1956640e9225SJoseph Myers * When the sticky exception bits are set 1957640e9225SJoseph Myers * directly by userspace, it must call prctl 1958640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1959640e9225SJoseph Myers * in the existing prctl settings) or 1960640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1961640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1962640e9225SJoseph Myers * saving and restoring the whole 1963640e9225SJoseph Myers * floating-point environment need to do so 1964640e9225SJoseph Myers * anyway to restore the prctl settings from 1965640e9225SJoseph Myers * the saved environment. 1966640e9225SJoseph Myers */ 1967640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 196814cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1969640e9225SJoseph Myers } else 19705e14d21eSKumar Gala return -EINVAL; 197114cf11afSPaul Mackerras #else 197214cf11afSPaul Mackerras return -EINVAL; 197314cf11afSPaul Mackerras #endif 197414cf11afSPaul Mackerras else 197514cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 197614cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 197714cf11afSPaul Mackerras } 197814cf11afSPaul Mackerras 1979fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1980fab5db97SPaul Mackerras { 1981fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1982fab5db97SPaul Mackerras 1983fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1984fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1985fab5db97SPaul Mackerras return -EINVAL; 1986fab5db97SPaul Mackerras 1987fab5db97SPaul Mackerras if (regs == NULL) 1988fab5db97SPaul Mackerras return -EINVAL; 1989fab5db97SPaul Mackerras 1990fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1991fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1992fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1993fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1994fab5db97SPaul Mackerras else 1995fab5db97SPaul Mackerras return -EINVAL; 1996fab5db97SPaul Mackerras 1997fab5db97SPaul Mackerras return 0; 1998fab5db97SPaul Mackerras } 1999fab5db97SPaul Mackerras 2000fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 2001fab5db97SPaul Mackerras { 2002fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 2003fab5db97SPaul Mackerras unsigned int val; 2004fab5db97SPaul Mackerras 2005fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 2006fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 2007fab5db97SPaul Mackerras return -EINVAL; 2008fab5db97SPaul Mackerras 2009fab5db97SPaul Mackerras if (regs == NULL) 2010fab5db97SPaul Mackerras return -EINVAL; 2011fab5db97SPaul Mackerras 2012fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 2013fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 2014fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 2015fab5db97SPaul Mackerras else 2016fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 2017fab5db97SPaul Mackerras } else 2018fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 2019fab5db97SPaul Mackerras 2020fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 2021fab5db97SPaul Mackerras } 2022fab5db97SPaul Mackerras 2023e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 2024e9370ae1SPaul Mackerras { 2025e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 2026e9370ae1SPaul Mackerras return 0; 2027e9370ae1SPaul Mackerras } 2028e9370ae1SPaul Mackerras 2029e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 2030e9370ae1SPaul Mackerras { 2031e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 2032e9370ae1SPaul Mackerras } 2033e9370ae1SPaul Mackerras 2034bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 2035bb72c481SPaul Mackerras unsigned long nbytes) 2036bb72c481SPaul Mackerras { 2037bb72c481SPaul Mackerras unsigned long stack_page; 2038bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 2039bb72c481SPaul Mackerras 2040bb72c481SPaul Mackerras /* 2041bb72c481SPaul Mackerras * Avoid crashing if the stack has overflowed and corrupted 2042bb72c481SPaul Mackerras * task_cpu(p), which is in the thread_info struct. 2043bb72c481SPaul Mackerras */ 2044bb72c481SPaul Mackerras if (cpu < NR_CPUS && cpu_possible(cpu)) { 2045bb72c481SPaul Mackerras stack_page = (unsigned long) hardirq_ctx[cpu]; 2046bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 2047bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 2048bb72c481SPaul Mackerras return 1; 2049bb72c481SPaul Mackerras 2050bb72c481SPaul Mackerras stack_page = (unsigned long) softirq_ctx[cpu]; 2051bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 2052bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 2053bb72c481SPaul Mackerras return 1; 2054bb72c481SPaul Mackerras } 2055bb72c481SPaul Mackerras return 0; 2056bb72c481SPaul Mackerras } 2057bb72c481SPaul Mackerras 20582f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 205914cf11afSPaul Mackerras unsigned long nbytes) 206014cf11afSPaul Mackerras { 20610cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 206214cf11afSPaul Mackerras 206314cf11afSPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 206414cf11afSPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 206514cf11afSPaul Mackerras return 1; 206614cf11afSPaul Mackerras 2067bb72c481SPaul Mackerras return valid_irq_stack(sp, p, nbytes); 206814cf11afSPaul Mackerras } 206914cf11afSPaul Mackerras 20702f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 20712f25194dSAnton Blanchard 207206d67d54SPaul Mackerras unsigned long get_wchan(struct task_struct *p) 207306d67d54SPaul Mackerras { 207406d67d54SPaul Mackerras unsigned long ip, sp; 207506d67d54SPaul Mackerras int count = 0; 207606d67d54SPaul Mackerras 207706d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 207806d67d54SPaul Mackerras return 0; 207906d67d54SPaul Mackerras 208006d67d54SPaul Mackerras sp = p->thread.ksp; 2081ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 208206d67d54SPaul Mackerras return 0; 208306d67d54SPaul Mackerras 208406d67d54SPaul Mackerras do { 208506d67d54SPaul Mackerras sp = *(unsigned long *)sp; 20864ca360f3SKautuk Consul if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD) || 20874ca360f3SKautuk Consul p->state == TASK_RUNNING) 208806d67d54SPaul Mackerras return 0; 208906d67d54SPaul Mackerras if (count > 0) { 2090ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 209106d67d54SPaul Mackerras if (!in_sched_functions(ip)) 209206d67d54SPaul Mackerras return ip; 209306d67d54SPaul Mackerras } 209406d67d54SPaul Mackerras } while (count++ < 16); 209506d67d54SPaul Mackerras return 0; 209606d67d54SPaul Mackerras } 209706d67d54SPaul Mackerras 2098c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 209914cf11afSPaul Mackerras 210014cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 210114cf11afSPaul Mackerras { 210206d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 210314cf11afSPaul Mackerras int count = 0; 210406d67d54SPaul Mackerras int firstframe = 1; 21056794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 21066794c782SSteven Rostedt int curr_frame = current->curr_ret_stack; 21076794c782SSteven Rostedt extern void return_to_handler(void); 21089135c3ccSSteven Rostedt unsigned long rth = (unsigned long)return_to_handler; 21096794c782SSteven Rostedt #endif 211014cf11afSPaul Mackerras 211114cf11afSPaul Mackerras sp = (unsigned long) stack; 211214cf11afSPaul Mackerras if (tsk == NULL) 211314cf11afSPaul Mackerras tsk = current; 211414cf11afSPaul Mackerras if (sp == 0) { 211514cf11afSPaul Mackerras if (tsk == current) 2116acf620ecSAnton Blanchard sp = current_stack_pointer(); 211714cf11afSPaul Mackerras else 211814cf11afSPaul Mackerras sp = tsk->thread.ksp; 211914cf11afSPaul Mackerras } 212014cf11afSPaul Mackerras 212106d67d54SPaul Mackerras lr = 0; 212206d67d54SPaul Mackerras printk("Call Trace:\n"); 212314cf11afSPaul Mackerras do { 2124ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 212506d67d54SPaul Mackerras return; 212606d67d54SPaul Mackerras 212706d67d54SPaul Mackerras stack = (unsigned long *) sp; 212806d67d54SPaul Mackerras newsp = stack[0]; 2129ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 213006d67d54SPaul Mackerras if (!firstframe || ip != lr) { 2131058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 21326794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 21337d56c65aSAnton Blanchard if ((ip == rth) && curr_frame >= 0) { 21349a1f490fSMichael Ellerman pr_cont(" (%pS)", 21356794c782SSteven Rostedt (void *)current->ret_stack[curr_frame].ret); 21366794c782SSteven Rostedt curr_frame--; 21376794c782SSteven Rostedt } 21386794c782SSteven Rostedt #endif 213906d67d54SPaul Mackerras if (firstframe) 21409a1f490fSMichael Ellerman pr_cont(" (unreliable)"); 21419a1f490fSMichael Ellerman pr_cont("\n"); 214214cf11afSPaul Mackerras } 214306d67d54SPaul Mackerras firstframe = 0; 214406d67d54SPaul Mackerras 214506d67d54SPaul Mackerras /* 214606d67d54SPaul Mackerras * See if this is an exception frame. 214706d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 214806d67d54SPaul Mackerras */ 2149ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 2150ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 215106d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 215206d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 215306d67d54SPaul Mackerras lr = regs->link; 21549be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 2155058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 215606d67d54SPaul Mackerras firstframe = 1; 215714cf11afSPaul Mackerras } 215806d67d54SPaul Mackerras 215906d67d54SPaul Mackerras sp = newsp; 216006d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 216106d67d54SPaul Mackerras } 216206d67d54SPaul Mackerras 2163cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 2164fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 21650e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 2166cb2c9b27SAnton Blanchard { 2167fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2168d1d0d5ffSNicholas Piggin 2169d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2170d1d0d5ffSNicholas Piggin /* 2171d1d0d5ffSNicholas Piggin * Least significant bit (RUN) is the only writable bit of 2172d1d0d5ffSNicholas Piggin * the CTRL register, so we can avoid mfspr. 2.06 is not the 2173d1d0d5ffSNicholas Piggin * earliest ISA where this is the case, but it's convenient. 2174d1d0d5ffSNicholas Piggin */ 2175d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, CTRL_RUNLATCH); 2176d1d0d5ffSNicholas Piggin } else { 2177cb2c9b27SAnton Blanchard unsigned long ctrl; 2178cb2c9b27SAnton Blanchard 2179d1d0d5ffSNicholas Piggin /* 2180d1d0d5ffSNicholas Piggin * Some architectures (e.g., Cell) have writable fields other 2181d1d0d5ffSNicholas Piggin * than RUN, so do the read-modify-write. 2182d1d0d5ffSNicholas Piggin */ 2183cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2184cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 2185cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2186d1d0d5ffSNicholas Piggin } 2187cb2c9b27SAnton Blanchard 2188fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 2189cb2c9b27SAnton Blanchard } 2190cb2c9b27SAnton Blanchard 2191fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 21920e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 2193cb2c9b27SAnton Blanchard { 2194fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2195cb2c9b27SAnton Blanchard 2196fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 2197cb2c9b27SAnton Blanchard 2198d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2199d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, 0); 2200d1d0d5ffSNicholas Piggin } else { 2201d1d0d5ffSNicholas Piggin unsigned long ctrl; 2202d1d0d5ffSNicholas Piggin 2203cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2204cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 2205cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2206cb2c9b27SAnton Blanchard } 2207d1d0d5ffSNicholas Piggin } 2208fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 2209f6a61680SBenjamin Herrenschmidt 2210d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 2211d839088cSAnton Blanchard { 2212d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 2213d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 2214d839088cSAnton Blanchard return sp & ~0xf; 2215d839088cSAnton Blanchard } 2216912f9ee2SAnton Blanchard 2217912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 2218912f9ee2SAnton Blanchard { 2219912f9ee2SAnton Blanchard unsigned long rnd = 0; 2220912f9ee2SAnton Blanchard 2221912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 2222912f9ee2SAnton Blanchard if (is_32bit_task()) 22235ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); 2224912f9ee2SAnton Blanchard else 22255ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); 2226912f9ee2SAnton Blanchard 2227912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 2228912f9ee2SAnton Blanchard } 2229912f9ee2SAnton Blanchard 2230912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 2231912f9ee2SAnton Blanchard { 22328bbde7a7SAnton Blanchard unsigned long base = mm->brk; 22338bbde7a7SAnton Blanchard unsigned long ret; 22348bbde7a7SAnton Blanchard 22354e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 22368bbde7a7SAnton Blanchard /* 22378bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 22388bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 22398bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 22408bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 2241caca285eSAneesh Kumar K.V * performance penalty. We don't need to worry about radix. For 2242caca285eSAneesh Kumar K.V * radix, mmu_highuser_ssize remains unchanged from 256MB. 22438bbde7a7SAnton Blanchard */ 22448bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 22458bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 22468bbde7a7SAnton Blanchard #endif 22478bbde7a7SAnton Blanchard 22488bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 2249912f9ee2SAnton Blanchard 2250912f9ee2SAnton Blanchard if (ret < mm->brk) 2251912f9ee2SAnton Blanchard return mm->brk; 2252912f9ee2SAnton Blanchard 2253912f9ee2SAnton Blanchard return ret; 2254912f9ee2SAnton Blanchard } 2255501cb16dSAnton Blanchard 2256