12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 214cf11afSPaul Mackerras /* 314cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 414cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 514cf11afSPaul Mackerras * 614cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 714cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 814cf11afSPaul Mackerras * 914cf11afSPaul Mackerras * PowerPC version 1014cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1114cf11afSPaul Mackerras */ 1214cf11afSPaul Mackerras 1314cf11afSPaul Mackerras #include <linux/errno.h> 1414cf11afSPaul Mackerras #include <linux/sched.h> 15b17b0153SIngo Molnar #include <linux/sched/debug.h> 1629930025SIngo Molnar #include <linux/sched/task.h> 1768db0cf1SIngo Molnar #include <linux/sched/task_stack.h> 1814cf11afSPaul Mackerras #include <linux/kernel.h> 1914cf11afSPaul Mackerras #include <linux/mm.h> 2014cf11afSPaul Mackerras #include <linux/smp.h> 2114cf11afSPaul Mackerras #include <linux/stddef.h> 2214cf11afSPaul Mackerras #include <linux/unistd.h> 2314cf11afSPaul Mackerras #include <linux/ptrace.h> 2414cf11afSPaul Mackerras #include <linux/slab.h> 2514cf11afSPaul Mackerras #include <linux/user.h> 2614cf11afSPaul Mackerras #include <linux/elf.h> 2714cf11afSPaul Mackerras #include <linux/prctl.h> 2814cf11afSPaul Mackerras #include <linux/init_task.h> 294b16f8e2SPaul Gortmaker #include <linux/export.h> 3014cf11afSPaul Mackerras #include <linux/kallsyms.h> 3114cf11afSPaul Mackerras #include <linux/mqueue.h> 3214cf11afSPaul Mackerras #include <linux/hardirq.h> 3306d67d54SPaul Mackerras #include <linux/utsname.h> 346794c782SSteven Rostedt #include <linux/ftrace.h> 3579741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 36d839088cSAnton Blanchard #include <linux/personality.h> 375aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 387b051f66SAnton Blanchard #include <linux/uaccess.h> 3906bb53b3SRam Pai #include <linux/pkeys.h> 40fb2d9505SChristophe Leroy #include <linux/seq_buf.h> 4114cf11afSPaul Mackerras 423a96570fSNicholas Piggin #include <asm/interrupt.h> 4314cf11afSPaul Mackerras #include <asm/io.h> 4414cf11afSPaul Mackerras #include <asm/processor.h> 4514cf11afSPaul Mackerras #include <asm/mmu.h> 4676032de8SMichael Ellerman #include <asm/machdep.h> 47c6622f63SPaul Mackerras #include <asm/time.h> 48ae3a197eSDavid Howells #include <asm/runlatch.h> 49a7f31841SArnd Bergmann #include <asm/syscalls.h> 50ae3a197eSDavid Howells #include <asm/switch_to.h> 51fb09692eSMichael Neuling #include <asm/tm.h> 52ae3a197eSDavid Howells #include <asm/debug.h> 5306d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5406d67d54SPaul Mackerras #include <asm/firmware.h> 55c2e480baSMadhavan Srinivasan #include <asm/hw_irq.h> 5606d67d54SPaul Mackerras #endif 577cedd601SAnton Blanchard #include <asm/code-patching.h> 587f92bc56SDaniel Axtens #include <asm/exec.h> 595d31a96eSMichael Ellerman #include <asm/livepatch.h> 60b92a226eSKevin Hao #include <asm/cpu_has_feature.h> 610545d543SDaniel Axtens #include <asm/asm-prototypes.h> 62c9386bfdSChristophe Leroy #include <asm/stacktrace.h> 63c1fe190cSMichael Neuling #include <asm/hw_breakpoint.h> 645d31a96eSMichael Ellerman 65d6a61bfcSLuis Machado #include <linux/kprobes.h> 66d6a61bfcSLuis Machado #include <linux/kdebug.h> 6714cf11afSPaul Mackerras 688b3c34cfSMichael Neuling /* Transactional Memory debug */ 698b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 708b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 718b3c34cfSMichael Neuling #else 728b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 738b3c34cfSMichael Neuling #endif 748b3c34cfSMichael Neuling 7514cf11afSPaul Mackerras extern unsigned long _get_SP(void); 7614cf11afSPaul Mackerras 77d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 7854820530SMichael Ellerman /* 7954820530SMichael Ellerman * Are we running in "Suspend disabled" mode? If so we have to block any 8054820530SMichael Ellerman * sigreturn that would get us into suspended state, and we also warn in some 8154820530SMichael Ellerman * other paths that we should never reach with suspend disabled. 8254820530SMichael Ellerman */ 8354820530SMichael Ellerman bool tm_suspend_disabled __ro_after_init = false; 8454820530SMichael Ellerman 85b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 86d31626f7SPaul Mackerras { 87d31626f7SPaul Mackerras /* 88d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 89d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 90d31626f7SPaul Mackerras * bit so that we know to restore the registers before 91d31626f7SPaul Mackerras * returning to userspace. 92d31626f7SPaul Mackerras */ 93d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 94d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 95d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 9659dc5bfcSNicholas Piggin regs_set_return_msr(&tsk->thread.ckpt_regs, 9759dc5bfcSNicholas Piggin tsk->thread.regs->msr); 98d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 99d31626f7SPaul Mackerras } 100d31626f7SPaul Mackerras } 101dc16b553SCyril Bur 102d31626f7SPaul Mackerras #else 103b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 104d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 105d31626f7SPaul Mackerras 1063eb5d588SAnton Blanchard bool strict_msr_control; 1073eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 1083eb5d588SAnton Blanchard 1093eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 1103eb5d588SAnton Blanchard { 1113eb5d588SAnton Blanchard strict_msr_control = true; 1123eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1133eb5d588SAnton Blanchard 1143eb5d588SAnton Blanchard return 0; 1153eb5d588SAnton Blanchard } 1163eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1173eb5d588SAnton Blanchard 118e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 119e2b36d59SNicholas Piggin unsigned long notrace msr_check_and_set(unsigned long bits) 120a0e72cf1SAnton Blanchard { 121a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 122a0e72cf1SAnton Blanchard unsigned long newmsr; 123a0e72cf1SAnton Blanchard 124a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 125a0e72cf1SAnton Blanchard 126a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 127a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 128a0e72cf1SAnton Blanchard 129a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 1300fa68318SNicholas Piggin newmsr = mtmsr_isync_irqsafe(newmsr); 1313cee070aSCyril Bur 1323cee070aSCyril Bur return newmsr; 133a0e72cf1SAnton Blanchard } 134d1c72112SSimon Guo EXPORT_SYMBOL_GPL(msr_check_and_set); 135a0e72cf1SAnton Blanchard 136e2b36d59SNicholas Piggin /* notrace because it's called by restore_math */ 137e2b36d59SNicholas Piggin void notrace __msr_check_and_clear(unsigned long bits) 138a0e72cf1SAnton Blanchard { 139a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 140a0e72cf1SAnton Blanchard unsigned long newmsr; 141a0e72cf1SAnton Blanchard 142a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 143a0e72cf1SAnton Blanchard 144a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 145a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 146a0e72cf1SAnton Blanchard 147a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 1480fa68318SNicholas Piggin mtmsr_isync_irqsafe(newmsr); 149a0e72cf1SAnton Blanchard } 1503eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 151a0e72cf1SAnton Blanchard 152037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1531cdf039bSMathieu Malaterre static void __giveup_fpu(struct task_struct *tsk) 1548792468dSCyril Bur { 1558eb98037SAnton Blanchard unsigned long msr; 1568eb98037SAnton Blanchard 1578792468dSCyril Bur save_fpu(tsk); 1588eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 159fe1ef6bcSMark Cave-Ayland msr &= ~(MSR_FP|MSR_FE0|MSR_FE1); 1608792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1618eb98037SAnton Blanchard msr &= ~MSR_VSX; 16259dc5bfcSNicholas Piggin regs_set_return_msr(tsk->thread.regs, msr); 1638792468dSCyril Bur } 1648792468dSCyril Bur 16598da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 16698da581eSAnton Blanchard { 16798da581eSAnton Blanchard check_if_tm_restore_required(tsk); 16898da581eSAnton Blanchard 169a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 17098da581eSAnton Blanchard __giveup_fpu(tsk); 171a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 17298da581eSAnton Blanchard } 17398da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 17498da581eSAnton Blanchard 17514cf11afSPaul Mackerras /* 17614cf11afSPaul Mackerras * Make sure the floating-point register state in the 17714cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 17814cf11afSPaul Mackerras */ 17914cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 18014cf11afSPaul Mackerras { 18114cf11afSPaul Mackerras if (tsk->thread.regs) { 18214cf11afSPaul Mackerras /* 18314cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 18414cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 18514cf11afSPaul Mackerras * test but before we have finished saving the FP registers 18614cf11afSPaul Mackerras * to the thread_struct. That process could take over the 18714cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 18814cf11afSPaul Mackerras * bogus values for the remaining FP registers. 18914cf11afSPaul Mackerras */ 19014cf11afSPaul Mackerras preempt_disable(); 19114cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 19214cf11afSPaul Mackerras /* 19314cf11afSPaul Mackerras * This should only ever be called for current or 19414cf11afSPaul Mackerras * for a stopped child process. Since we save away 195af1bbc3dSAnton Blanchard * the FP register state on context switch, 19614cf11afSPaul Mackerras * there is something wrong if a stopped child appears 19714cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 19814cf11afSPaul Mackerras */ 19914cf11afSPaul Mackerras BUG_ON(tsk != current); 200b86fd2bdSAnton Blanchard giveup_fpu(tsk); 20114cf11afSPaul Mackerras } 20214cf11afSPaul Mackerras preempt_enable(); 20314cf11afSPaul Mackerras } 20414cf11afSPaul Mackerras } 205de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 20614cf11afSPaul Mackerras 20714cf11afSPaul Mackerras void enable_kernel_fp(void) 20814cf11afSPaul Mackerras { 209e909fb83SCyril Bur unsigned long cpumsr; 210e909fb83SCyril Bur 21114cf11afSPaul Mackerras WARN_ON(preemptible()); 21214cf11afSPaul Mackerras 213e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP); 214611b0e5cSAnton Blanchard 215d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 216d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 217e909fb83SCyril Bur /* 218e909fb83SCyril Bur * If a thread has already been reclaimed then the 219e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 220e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 221e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 222e909fb83SCyril Bur * checkpointed structure. 223e909fb83SCyril Bur */ 2245c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2255c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 226e909fb83SCyril Bur return; 227a0e72cf1SAnton Blanchard __giveup_fpu(current); 228b86fd2bdSAnton Blanchard } 229d64d02ceSAnton Blanchard } 23014cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 231c83c192aSChristophe Leroy #else 232c83c192aSChristophe Leroy static inline void __giveup_fpu(struct task_struct *tsk) { } 233d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 23414cf11afSPaul Mackerras 23514cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 2366f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2376f515d84SCyril Bur { 2388eb98037SAnton Blanchard unsigned long msr; 2398eb98037SAnton Blanchard 2406f515d84SCyril Bur save_altivec(tsk); 2418eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2428eb98037SAnton Blanchard msr &= ~MSR_VEC; 2436f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2448eb98037SAnton Blanchard msr &= ~MSR_VSX; 24559dc5bfcSNicholas Piggin regs_set_return_msr(tsk->thread.regs, msr); 2466f515d84SCyril Bur } 2476f515d84SCyril Bur 24898da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 24998da581eSAnton Blanchard { 25098da581eSAnton Blanchard check_if_tm_restore_required(tsk); 25198da581eSAnton Blanchard 252a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 25398da581eSAnton Blanchard __giveup_altivec(tsk); 254a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 25598da581eSAnton Blanchard } 25698da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 25798da581eSAnton Blanchard 25814cf11afSPaul Mackerras void enable_kernel_altivec(void) 25914cf11afSPaul Mackerras { 260e909fb83SCyril Bur unsigned long cpumsr; 261e909fb83SCyril Bur 26214cf11afSPaul Mackerras WARN_ON(preemptible()); 26314cf11afSPaul Mackerras 264e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_VEC); 265611b0e5cSAnton Blanchard 266d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 267d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 268e909fb83SCyril Bur /* 269e909fb83SCyril Bur * If a thread has already been reclaimed then the 270e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 271e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 272e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 273e909fb83SCyril Bur * checkpointed structure. 274e909fb83SCyril Bur */ 2755c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 2765c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 277e909fb83SCyril Bur return; 278a0e72cf1SAnton Blanchard __giveup_altivec(current); 279b86fd2bdSAnton Blanchard } 280d64d02ceSAnton Blanchard } 28114cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 28214cf11afSPaul Mackerras 28314cf11afSPaul Mackerras /* 28414cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 28514cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 28614cf11afSPaul Mackerras */ 28714cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 28814cf11afSPaul Mackerras { 28914cf11afSPaul Mackerras if (tsk->thread.regs) { 29014cf11afSPaul Mackerras preempt_disable(); 29114cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 29214cf11afSPaul Mackerras BUG_ON(tsk != current); 293b86fd2bdSAnton Blanchard giveup_altivec(tsk); 29414cf11afSPaul Mackerras } 29514cf11afSPaul Mackerras preempt_enable(); 29614cf11afSPaul Mackerras } 29714cf11afSPaul Mackerras } 298de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 29914cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 30014cf11afSPaul Mackerras 301ce48b210SMichael Neuling #ifdef CONFIG_VSX 302bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 303a7d623d4SAnton Blanchard { 304dc801081SBenjamin Herrenschmidt unsigned long msr = tsk->thread.regs->msr; 305dc801081SBenjamin Herrenschmidt 306dc801081SBenjamin Herrenschmidt /* 3071fd02f66SJulia Lawall * We should never be setting MSR_VSX without also setting 308dc801081SBenjamin Herrenschmidt * MSR_FP and MSR_VEC 309dc801081SBenjamin Herrenschmidt */ 310dc801081SBenjamin Herrenschmidt WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); 311dc801081SBenjamin Herrenschmidt 312dc801081SBenjamin Herrenschmidt /* __giveup_fpu will clear MSR_VSX */ 313dc801081SBenjamin Herrenschmidt if (msr & MSR_FP) 314a7d623d4SAnton Blanchard __giveup_fpu(tsk); 315dc801081SBenjamin Herrenschmidt if (msr & MSR_VEC) 316a7d623d4SAnton Blanchard __giveup_altivec(tsk); 317bf6a4d5bSCyril Bur } 318bf6a4d5bSCyril Bur 319bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 320bf6a4d5bSCyril Bur { 321bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 322bf6a4d5bSCyril Bur 323bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 324a7d623d4SAnton Blanchard __giveup_vsx(tsk); 325a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 326a7d623d4SAnton Blanchard } 327bf6a4d5bSCyril Bur 328ce48b210SMichael Neuling void enable_kernel_vsx(void) 329ce48b210SMichael Neuling { 330e909fb83SCyril Bur unsigned long cpumsr; 331e909fb83SCyril Bur 332ce48b210SMichael Neuling WARN_ON(preemptible()); 333ce48b210SMichael Neuling 334e909fb83SCyril Bur cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 335611b0e5cSAnton Blanchard 3365a69aec9SBenjamin Herrenschmidt if (current->thread.regs && 3375a69aec9SBenjamin Herrenschmidt (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { 338d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 339e909fb83SCyril Bur /* 340e909fb83SCyril Bur * If a thread has already been reclaimed then the 341e909fb83SCyril Bur * checkpointed registers are on the CPU but have definitely 342e909fb83SCyril Bur * been saved by the reclaim code. Don't need to and *cannot* 343e909fb83SCyril Bur * giveup as this would save to the 'live' structure not the 344e909fb83SCyril Bur * checkpointed structure. 345e909fb83SCyril Bur */ 3465c784c84SBreno Leitao if (!MSR_TM_ACTIVE(cpumsr) && 3475c784c84SBreno Leitao MSR_TM_ACTIVE(current->thread.regs->msr)) 348e909fb83SCyril Bur return; 349a0e72cf1SAnton Blanchard __giveup_vsx(current); 350611b0e5cSAnton Blanchard } 351ce48b210SMichael Neuling } 352ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 353ce48b210SMichael Neuling 354ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 355ce48b210SMichael Neuling { 356ce48b210SMichael Neuling if (tsk->thread.regs) { 357ce48b210SMichael Neuling preempt_disable(); 3585a69aec9SBenjamin Herrenschmidt if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { 359ce48b210SMichael Neuling BUG_ON(tsk != current); 360ce48b210SMichael Neuling giveup_vsx(tsk); 361ce48b210SMichael Neuling } 362ce48b210SMichael Neuling preempt_enable(); 363ce48b210SMichael Neuling } 364ce48b210SMichael Neuling } 365de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 366ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 367ce48b210SMichael Neuling 36814cf11afSPaul Mackerras #ifdef CONFIG_SPE 36998da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 37098da581eSAnton Blanchard { 37198da581eSAnton Blanchard check_if_tm_restore_required(tsk); 37298da581eSAnton Blanchard 373a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 37498da581eSAnton Blanchard __giveup_spe(tsk); 375a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 37698da581eSAnton Blanchard } 37798da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 37814cf11afSPaul Mackerras 37914cf11afSPaul Mackerras void enable_kernel_spe(void) 38014cf11afSPaul Mackerras { 38114cf11afSPaul Mackerras WARN_ON(preemptible()); 38214cf11afSPaul Mackerras 383a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 384611b0e5cSAnton Blanchard 385d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 386d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 387a0e72cf1SAnton Blanchard __giveup_spe(current); 38814cf11afSPaul Mackerras } 389d64d02ceSAnton Blanchard } 39014cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 39114cf11afSPaul Mackerras 39214cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 39314cf11afSPaul Mackerras { 39414cf11afSPaul Mackerras if (tsk->thread.regs) { 39514cf11afSPaul Mackerras preempt_disable(); 39614cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 39714cf11afSPaul Mackerras BUG_ON(tsk != current); 398685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 3990ee6c15eSKumar Gala giveup_spe(tsk); 40014cf11afSPaul Mackerras } 40114cf11afSPaul Mackerras preempt_enable(); 40214cf11afSPaul Mackerras } 40314cf11afSPaul Mackerras } 40414cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 40514cf11afSPaul Mackerras 406c2085059SAnton Blanchard static unsigned long msr_all_available; 407c2085059SAnton Blanchard 408c2085059SAnton Blanchard static int __init init_msr_all_available(void) 409c2085059SAnton Blanchard { 410c83c192aSChristophe Leroy if (IS_ENABLED(CONFIG_PPC_FPU)) 411c2085059SAnton Blanchard msr_all_available |= MSR_FP; 412c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 413c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 414c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 415c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 416c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 417c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 418c2085059SAnton Blanchard 419c2085059SAnton Blanchard return 0; 420c2085059SAnton Blanchard } 421c2085059SAnton Blanchard early_initcall(init_msr_all_available); 422c2085059SAnton Blanchard 423c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 424c2085059SAnton Blanchard { 425c2085059SAnton Blanchard unsigned long usermsr; 426c2085059SAnton Blanchard 427c2085059SAnton Blanchard if (!tsk->thread.regs) 428c2085059SAnton Blanchard return; 429c2085059SAnton Blanchard 4308205d5d9SGustavo Romero check_if_tm_restore_required(tsk); 4318205d5d9SGustavo Romero 432c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 433c2085059SAnton Blanchard 434c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 435c2085059SAnton Blanchard return; 436c2085059SAnton Blanchard 437c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 438c2085059SAnton Blanchard 43996c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 44096c79b6bSBenjamin Herrenschmidt 441c2085059SAnton Blanchard if (usermsr & MSR_FP) 442c2085059SAnton Blanchard __giveup_fpu(tsk); 443c2085059SAnton Blanchard if (usermsr & MSR_VEC) 444c2085059SAnton Blanchard __giveup_altivec(tsk); 445c2085059SAnton Blanchard if (usermsr & MSR_SPE) 446c2085059SAnton Blanchard __giveup_spe(tsk); 447c2085059SAnton Blanchard 448c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 449c2085059SAnton Blanchard } 450c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 451c2085059SAnton Blanchard 4526cc0c16dSNicholas Piggin #ifdef CONFIG_PPC_BOOK3S_64 4536cc0c16dSNicholas Piggin #ifdef CONFIG_PPC_FPU 45401eb0187SNicholas Piggin static bool should_restore_fp(void) 4556cc0c16dSNicholas Piggin { 45601eb0187SNicholas Piggin if (current->thread.load_fp) { 4576cc0c16dSNicholas Piggin current->thread.load_fp++; 45801eb0187SNicholas Piggin return true; 4596cc0c16dSNicholas Piggin } 46001eb0187SNicholas Piggin return false; 46101eb0187SNicholas Piggin } 46201eb0187SNicholas Piggin 46301eb0187SNicholas Piggin static void do_restore_fp(void) 46401eb0187SNicholas Piggin { 46501eb0187SNicholas Piggin load_fp_state(¤t->thread.fp_state); 4666cc0c16dSNicholas Piggin } 4676cc0c16dSNicholas Piggin #else 46801eb0187SNicholas Piggin static bool should_restore_fp(void) { return false; } 46901eb0187SNicholas Piggin static void do_restore_fp(void) { } 4706cc0c16dSNicholas Piggin #endif /* CONFIG_PPC_FPU */ 4716cc0c16dSNicholas Piggin 4726cc0c16dSNicholas Piggin #ifdef CONFIG_ALTIVEC 47301eb0187SNicholas Piggin static bool should_restore_altivec(void) 4746cc0c16dSNicholas Piggin { 47501eb0187SNicholas Piggin if (cpu_has_feature(CPU_FTR_ALTIVEC) && (current->thread.load_vec)) { 47601eb0187SNicholas Piggin current->thread.load_vec++; 47701eb0187SNicholas Piggin return true; 4786cc0c16dSNicholas Piggin } 47901eb0187SNicholas Piggin return false; 48001eb0187SNicholas Piggin } 48101eb0187SNicholas Piggin 48201eb0187SNicholas Piggin static void do_restore_altivec(void) 48301eb0187SNicholas Piggin { 48401eb0187SNicholas Piggin load_vr_state(¤t->thread.vr_state); 48501eb0187SNicholas Piggin current->thread.used_vr = 1; 4866cc0c16dSNicholas Piggin } 4876cc0c16dSNicholas Piggin #else 48801eb0187SNicholas Piggin static bool should_restore_altivec(void) { return false; } 48901eb0187SNicholas Piggin static void do_restore_altivec(void) { } 4906cc0c16dSNicholas Piggin #endif /* CONFIG_ALTIVEC */ 4916cc0c16dSNicholas Piggin 49201eb0187SNicholas Piggin static bool should_restore_vsx(void) 4936cc0c16dSNicholas Piggin { 49401eb0187SNicholas Piggin if (cpu_has_feature(CPU_FTR_VSX)) 49501eb0187SNicholas Piggin return true; 49601eb0187SNicholas Piggin return false; 4976cc0c16dSNicholas Piggin } 49880739c2bSChristophe Leroy #ifdef CONFIG_VSX 49901eb0187SNicholas Piggin static void do_restore_vsx(void) 50001eb0187SNicholas Piggin { 50101eb0187SNicholas Piggin current->thread.used_vsr = 1; 5026cc0c16dSNicholas Piggin } 5036cc0c16dSNicholas Piggin #else 50401eb0187SNicholas Piggin static void do_restore_vsx(void) { } 5056cc0c16dSNicholas Piggin #endif /* CONFIG_VSX */ 5066cc0c16dSNicholas Piggin 507e2b36d59SNicholas Piggin /* 508e2b36d59SNicholas Piggin * The exception exit path calls restore_math() with interrupts hard disabled 509e2b36d59SNicholas Piggin * but the soft irq state not "reconciled". ftrace code that calls 510e2b36d59SNicholas Piggin * local_irq_save/restore causes warnings. 511e2b36d59SNicholas Piggin * 512e2b36d59SNicholas Piggin * Rather than complicate the exit path, just don't trace restore_math. This 513e2b36d59SNicholas Piggin * could be done by having ftrace entry code check for this un-reconciled 514e2b36d59SNicholas Piggin * condition where MSR[EE]=0 and PACA_IRQ_HARD_DIS is not set, and 515e2b36d59SNicholas Piggin * temporarily fix it up for the duration of the ftrace call. 516e2b36d59SNicholas Piggin */ 517e2b36d59SNicholas Piggin void notrace restore_math(struct pt_regs *regs) 51870fe3d98SCyril Bur { 51970fe3d98SCyril Bur unsigned long msr; 52001eb0187SNicholas Piggin unsigned long new_msr = 0; 52170fe3d98SCyril Bur 52270fe3d98SCyril Bur msr = regs->msr; 52370fe3d98SCyril Bur 52470fe3d98SCyril Bur /* 52501eb0187SNicholas Piggin * new_msr tracks the facilities that are to be restored. Only reload 52601eb0187SNicholas Piggin * if the bit is not set in the user MSR (if it is set, the registers 52701eb0187SNicholas Piggin * are live for the user thread). 52870fe3d98SCyril Bur */ 52901eb0187SNicholas Piggin if ((!(msr & MSR_FP)) && should_restore_fp()) 530b91eb518SMichael Ellerman new_msr |= MSR_FP; 53170fe3d98SCyril Bur 53201eb0187SNicholas Piggin if ((!(msr & MSR_VEC)) && should_restore_altivec()) 53301eb0187SNicholas Piggin new_msr |= MSR_VEC; 53470fe3d98SCyril Bur 53501eb0187SNicholas Piggin if ((!(msr & MSR_VSX)) && should_restore_vsx()) { 53601eb0187SNicholas Piggin if (((msr | new_msr) & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC)) 53701eb0187SNicholas Piggin new_msr |= MSR_VSX; 53870fe3d98SCyril Bur } 53970fe3d98SCyril Bur 54001eb0187SNicholas Piggin if (new_msr) { 541b91eb518SMichael Ellerman unsigned long fpexc_mode = 0; 542b91eb518SMichael Ellerman 54301eb0187SNicholas Piggin msr_check_and_set(new_msr); 54470fe3d98SCyril Bur 545b91eb518SMichael Ellerman if (new_msr & MSR_FP) { 54601eb0187SNicholas Piggin do_restore_fp(); 54701eb0187SNicholas Piggin 548b91eb518SMichael Ellerman // This also covers VSX, because VSX implies FP 549b91eb518SMichael Ellerman fpexc_mode = current->thread.fpexc_mode; 550b91eb518SMichael Ellerman } 551b91eb518SMichael Ellerman 55201eb0187SNicholas Piggin if (new_msr & MSR_VEC) 55301eb0187SNicholas Piggin do_restore_altivec(); 55401eb0187SNicholas Piggin 55501eb0187SNicholas Piggin if (new_msr & MSR_VSX) 55601eb0187SNicholas Piggin do_restore_vsx(); 55701eb0187SNicholas Piggin 55801eb0187SNicholas Piggin msr_check_and_clear(new_msr); 55901eb0187SNicholas Piggin 56059dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr | new_msr | fpexc_mode); 56101eb0187SNicholas Piggin } 56270fe3d98SCyril Bur } 56360d62bfdSChristophe Leroy #endif /* CONFIG_PPC_BOOK3S_64 */ 56470fe3d98SCyril Bur 5651cdf039bSMathieu Malaterre static void save_all(struct task_struct *tsk) 566de2a20aaSCyril Bur { 567de2a20aaSCyril Bur unsigned long usermsr; 568de2a20aaSCyril Bur 569de2a20aaSCyril Bur if (!tsk->thread.regs) 570de2a20aaSCyril Bur return; 571de2a20aaSCyril Bur 572de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 573de2a20aaSCyril Bur 574de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 575de2a20aaSCyril Bur return; 576de2a20aaSCyril Bur 577de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 578de2a20aaSCyril Bur 57996c79b6bSBenjamin Herrenschmidt WARN_ON((usermsr & MSR_VSX) && !((usermsr & MSR_FP) && (usermsr & MSR_VEC))); 58096c79b6bSBenjamin Herrenschmidt 581de2a20aaSCyril Bur if (usermsr & MSR_FP) 5828792468dSCyril Bur save_fpu(tsk); 583de2a20aaSCyril Bur 584de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5856f515d84SCyril Bur save_altivec(tsk); 586de2a20aaSCyril Bur 587de2a20aaSCyril Bur if (usermsr & MSR_SPE) 588de2a20aaSCyril Bur __giveup_spe(tsk); 589de2a20aaSCyril Bur 590de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 591de2a20aaSCyril Bur } 592de2a20aaSCyril Bur 593579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 594579e633eSAnton Blanchard { 595579e633eSAnton Blanchard if (tsk->thread.regs) { 596579e633eSAnton Blanchard preempt_disable(); 597579e633eSAnton Blanchard BUG_ON(tsk != current); 598579e633eSAnton Blanchard #ifdef CONFIG_SPE 599579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 600579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 601579e633eSAnton Blanchard #endif 602e9013785SFelipe Rechia save_all(tsk); 603579e633eSAnton Blanchard 604579e633eSAnton Blanchard preempt_enable(); 605579e633eSAnton Blanchard } 606579e633eSAnton Blanchard } 607579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 608579e633eSAnton Blanchard 6093bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6103bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 61147355040SEric W. Biederman unsigned long error_code, int breakpt) 6123bffb652SDave Kleikamp { 61347355040SEric W. Biederman current->thread.trap_nr = TRAP_HWBKPT; 6143bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 6153bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 6163bffb652SDave Kleikamp return; 6173bffb652SDave Kleikamp 6183bffb652SDave Kleikamp /* Deliver the signal to userspace */ 619f71dd7dcSEric W. Biederman force_sig_ptrace_errno_trap(breakpt, /* breakpoint or watchpoint id */ 620f71dd7dcSEric W. Biederman (void __user *)address); 6213bffb652SDave Kleikamp } 6223bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 6235b905d77SRavi Bangoria 6245b905d77SRavi Bangoria static void do_break_handler(struct pt_regs *regs) 6255b905d77SRavi Bangoria { 6265b905d77SRavi Bangoria struct arch_hw_breakpoint null_brk = {0}; 6275b905d77SRavi Bangoria struct arch_hw_breakpoint *info; 628c545b9f0SChristophe Leroy ppc_inst_t instr = ppc_inst(0); 6295b905d77SRavi Bangoria int type = 0; 6305b905d77SRavi Bangoria int size = 0; 6315b905d77SRavi Bangoria unsigned long ea; 6325b905d77SRavi Bangoria int i; 6335b905d77SRavi Bangoria 6345b905d77SRavi Bangoria /* 6355b905d77SRavi Bangoria * If underneath hw supports only one watchpoint, we know it 6365b905d77SRavi Bangoria * caused exception. 8xx also falls into this category. 6375b905d77SRavi Bangoria */ 6385b905d77SRavi Bangoria if (nr_wp_slots() == 1) { 6395b905d77SRavi Bangoria __set_breakpoint(0, &null_brk); 6405b905d77SRavi Bangoria current->thread.hw_brk[0] = null_brk; 6415b905d77SRavi Bangoria current->thread.hw_brk[0].flags |= HW_BRK_FLAG_DISABLED; 6425b905d77SRavi Bangoria return; 6435b905d77SRavi Bangoria } 6445b905d77SRavi Bangoria 6455b905d77SRavi Bangoria /* Otherwise find out which DAWR caused exception and disable it. */ 6465b905d77SRavi Bangoria wp_get_instr_detail(regs, &instr, &type, &size, &ea); 6475b905d77SRavi Bangoria 6485b905d77SRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) { 6495b905d77SRavi Bangoria info = ¤t->thread.hw_brk[i]; 6505b905d77SRavi Bangoria if (!info->address) 6515b905d77SRavi Bangoria continue; 6525b905d77SRavi Bangoria 6535b905d77SRavi Bangoria if (wp_check_constraints(regs, instr, ea, type, size, info)) { 6545b905d77SRavi Bangoria __set_breakpoint(i, &null_brk); 6555b905d77SRavi Bangoria current->thread.hw_brk[i] = null_brk; 6565b905d77SRavi Bangoria current->thread.hw_brk[i].flags |= HW_BRK_FLAG_DISABLED; 6575b905d77SRavi Bangoria } 6585b905d77SRavi Bangoria } 6595b905d77SRavi Bangoria } 6605b905d77SRavi Bangoria 6613a96570fSNicholas Piggin DEFINE_INTERRUPT_HANDLER(do_break) 662d6a61bfcSLuis Machado { 66341ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 66418722ecfSNicholas Piggin if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, regs->dsisr, 665d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 666d6a61bfcSLuis Machado return; 667d6a61bfcSLuis Machado 6689422de3eSMichael Neuling if (debugger_break_match(regs)) 669d6a61bfcSLuis Machado return; 670d6a61bfcSLuis Machado 6715b905d77SRavi Bangoria /* 6725b905d77SRavi Bangoria * We reach here only when watchpoint exception is generated by ptrace 6735b905d77SRavi Bangoria * event (or hw is buggy!). Now if CONFIG_HAVE_HW_BREAKPOINT is set, 6745b905d77SRavi Bangoria * watchpoint is already handled by hw_breakpoint_handler() so we don't 6755b905d77SRavi Bangoria * have to do anything. But when CONFIG_HAVE_HW_BREAKPOINT is not set, 6765b905d77SRavi Bangoria * we need to manually handle the watchpoint here. 6775b905d77SRavi Bangoria */ 6785b905d77SRavi Bangoria if (!IS_ENABLED(CONFIG_HAVE_HW_BREAKPOINT)) 6795b905d77SRavi Bangoria do_break_handler(regs); 6805b905d77SRavi Bangoria 681d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 68218722ecfSNicholas Piggin force_sig_fault(SIGTRAP, TRAP_HWBKPT, (void __user *)regs->dar); 683d6a61bfcSLuis Machado } 6843bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 685d6a61bfcSLuis Machado 6864a8a9379SRavi Bangoria static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk[HBP_NUM_MAX]); 687a2ceff5eSMichael Ellerman 6883bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6893bffb652SDave Kleikamp /* 6903bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 6913bffb652SDave Kleikamp */ 6923bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6933bffb652SDave Kleikamp { 69451ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 6953bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 69651ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 6973bffb652SDave Kleikamp #endif 69851ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 6993bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 70051ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 7013bffb652SDave Kleikamp #endif 70251ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 7033bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 7043bffb652SDave Kleikamp /* 7053bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 7063bffb652SDave Kleikamp */ 70751ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 7083bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 7093bffb652SDave Kleikamp /* 7103bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 7113bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 7123bffb652SDave Kleikamp */ 71351ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 7143bffb652SDave Kleikamp #else 71551ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 7163bffb652SDave Kleikamp #endif 7173bffb652SDave Kleikamp } 7183bffb652SDave Kleikamp 719f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 7203bffb652SDave Kleikamp { 7216cecf76bSScott Wood /* 7226cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 7236cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 7246cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 7256cecf76bSScott Wood */ 7266cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 7276cecf76bSScott Wood 728f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 729f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 7303bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 731f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 732f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 7333bffb652SDave Kleikamp #endif 734f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 735f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 7363bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 737f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 738f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 7393bffb652SDave Kleikamp #endif 740f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 741f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 7423bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 743f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 7443bffb652SDave Kleikamp #endif 7453bffb652SDave Kleikamp } 7463bffb652SDave Kleikamp /* 7473bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 7483bffb652SDave Kleikamp * debug registers, set the debug registers from the values 7493bffb652SDave Kleikamp * stored in the new thread. 7503bffb652SDave Kleikamp */ 751f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 7523bffb652SDave Kleikamp { 75351ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 754f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 755f5f97210SScott Wood prime_debug_regs(new_debug); 7563bffb652SDave Kleikamp } 7573743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 7583bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 759e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 760303e6a9dSRavi Bangoria static void set_breakpoint(int i, struct arch_hw_breakpoint *brk) 761b5ac51d7SChristophe Leroy { 762b5ac51d7SChristophe Leroy preempt_disable(); 763303e6a9dSRavi Bangoria __set_breakpoint(i, brk); 764b5ac51d7SChristophe Leroy preempt_enable(); 765b5ac51d7SChristophe Leroy } 766b5ac51d7SChristophe Leroy 7673bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 7683bffb652SDave Kleikamp { 769303e6a9dSRavi Bangoria int i; 770303e6a9dSRavi Bangoria struct arch_hw_breakpoint null_brk = {0}; 771303e6a9dSRavi Bangoria 772303e6a9dSRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) { 773303e6a9dSRavi Bangoria thread->hw_brk[i] = null_brk; 774252988cbSNicholas Piggin if (ppc_breakpoint_available()) 775303e6a9dSRavi Bangoria set_breakpoint(i, &thread->hw_brk[i]); 776303e6a9dSRavi Bangoria } 777303e6a9dSRavi Bangoria } 778303e6a9dSRavi Bangoria 779303e6a9dSRavi Bangoria static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 780303e6a9dSRavi Bangoria struct arch_hw_breakpoint *b) 781303e6a9dSRavi Bangoria { 782303e6a9dSRavi Bangoria if (a->address != b->address) 783303e6a9dSRavi Bangoria return false; 784303e6a9dSRavi Bangoria if (a->type != b->type) 785303e6a9dSRavi Bangoria return false; 786303e6a9dSRavi Bangoria if (a->len != b->len) 787303e6a9dSRavi Bangoria return false; 788303e6a9dSRavi Bangoria /* no need to check hw_len. it's calculated from address and len */ 789303e6a9dSRavi Bangoria return true; 790303e6a9dSRavi Bangoria } 791303e6a9dSRavi Bangoria 792303e6a9dSRavi Bangoria static void switch_hw_breakpoint(struct task_struct *new) 793303e6a9dSRavi Bangoria { 794303e6a9dSRavi Bangoria int i; 795303e6a9dSRavi Bangoria 796303e6a9dSRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) { 797303e6a9dSRavi Bangoria if (likely(hw_brk_match(this_cpu_ptr(¤t_brk[i]), 798303e6a9dSRavi Bangoria &new->thread.hw_brk[i]))) 799303e6a9dSRavi Bangoria continue; 800303e6a9dSRavi Bangoria 801303e6a9dSRavi Bangoria __set_breakpoint(i, &new->thread.hw_brk[i]); 802303e6a9dSRavi Bangoria } 8033bffb652SDave Kleikamp } 804e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 8053bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 8063bffb652SDave Kleikamp 8079422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 8089422de3eSMichael Neuling { 8099422de3eSMichael Neuling unsigned long dabr, dabrx; 8109422de3eSMichael Neuling 8119422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 8129422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 8139422de3eSMichael Neuling 8149422de3eSMichael Neuling if (ppc_md.set_dabr) 8159422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 8169422de3eSMichael Neuling 817ad3ed15cSChristophe Leroy if (IS_ENABLED(CONFIG_PPC_ADV_DEBUG_REGS)) { 818ad3ed15cSChristophe Leroy mtspr(SPRN_DAC1, dabr); 819ad3ed15cSChristophe Leroy if (IS_ENABLED(CONFIG_PPC_47x)) 820ad3ed15cSChristophe Leroy isync(); 821ad3ed15cSChristophe Leroy return 0; 822ad3ed15cSChristophe Leroy } else if (IS_ENABLED(CONFIG_PPC_BOOK3S)) { 823ad3ed15cSChristophe Leroy mtspr(SPRN_DABR, dabr); 824ad3ed15cSChristophe Leroy if (cpu_has_feature(CPU_FTR_DABRX)) 825ad3ed15cSChristophe Leroy mtspr(SPRN_DABRX, dabrx); 826ad3ed15cSChristophe Leroy return 0; 827ad3ed15cSChristophe Leroy } else { 828ad3ed15cSChristophe Leroy return -EINVAL; 829ad3ed15cSChristophe Leroy } 8309422de3eSMichael Neuling } 8319422de3eSMichael Neuling 83239413ae0SChristophe Leroy static inline int set_breakpoint_8xx(struct arch_hw_breakpoint *brk) 83339413ae0SChristophe Leroy { 83439413ae0SChristophe Leroy unsigned long lctrl1 = LCTRL1_CTE_GT | LCTRL1_CTF_LT | LCTRL1_CRWE_RW | 83539413ae0SChristophe Leroy LCTRL1_CRWF_RW; 83639413ae0SChristophe Leroy unsigned long lctrl2 = LCTRL2_LW0EN | LCTRL2_LW0LADC | LCTRL2_SLW0EN; 837e68ef121SRavi Bangoria unsigned long start_addr = ALIGN_DOWN(brk->address, HW_BREAKPOINT_SIZE); 838e68ef121SRavi Bangoria unsigned long end_addr = ALIGN(brk->address + brk->len, HW_BREAKPOINT_SIZE); 83939413ae0SChristophe Leroy 84039413ae0SChristophe Leroy if (start_addr == 0) 84139413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_F; 842e68ef121SRavi Bangoria else if (end_addr == 0) 84339413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_E; 84439413ae0SChristophe Leroy else 84539413ae0SChristophe Leroy lctrl2 |= LCTRL2_LW0LA_EandF; 84639413ae0SChristophe Leroy 84739413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, 0); 84839413ae0SChristophe Leroy 84939413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == 0) 85039413ae0SChristophe Leroy return 0; 85139413ae0SChristophe Leroy 85239413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_READ) 85339413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_RO | LCTRL1_CRWF_RO; 85439413ae0SChristophe Leroy if ((brk->type & HW_BRK_TYPE_RDWR) == HW_BRK_TYPE_WRITE) 85539413ae0SChristophe Leroy lctrl1 |= LCTRL1_CRWE_WO | LCTRL1_CRWF_WO; 85639413ae0SChristophe Leroy 85739413ae0SChristophe Leroy mtspr(SPRN_CMPE, start_addr - 1); 858e68ef121SRavi Bangoria mtspr(SPRN_CMPF, end_addr); 85939413ae0SChristophe Leroy mtspr(SPRN_LCTRL1, lctrl1); 86039413ae0SChristophe Leroy mtspr(SPRN_LCTRL2, lctrl2); 86139413ae0SChristophe Leroy 86239413ae0SChristophe Leroy return 0; 86339413ae0SChristophe Leroy } 86439413ae0SChristophe Leroy 8653671f4ebSJordan Niethe static void set_hw_breakpoint(int nr, struct arch_hw_breakpoint *brk) 8669422de3eSMichael Neuling { 867c1fe190cSMichael Neuling if (dawr_enabled()) 868252988cbSNicholas Piggin // Power8 or later 8694a8a9379SRavi Bangoria set_dawr(nr, brk); 87039413ae0SChristophe Leroy else if (IS_ENABLED(CONFIG_PPC_8xx)) 87139413ae0SChristophe Leroy set_breakpoint_8xx(brk); 872252988cbSNicholas Piggin else if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 873252988cbSNicholas Piggin // Power7 or earlier 87404c32a51SPaul Gortmaker set_dabr(brk); 875252988cbSNicholas Piggin else 876252988cbSNicholas Piggin // Shouldn't happen due to higher level checks 877252988cbSNicholas Piggin WARN_ON_ONCE(1); 8789422de3eSMichael Neuling } 87914cf11afSPaul Mackerras 8803671f4ebSJordan Niethe void __set_breakpoint(int nr, struct arch_hw_breakpoint *brk) 8813671f4ebSJordan Niethe { 8823671f4ebSJordan Niethe memcpy(this_cpu_ptr(¤t_brk[nr]), brk, sizeof(*brk)); 8833671f4ebSJordan Niethe set_hw_breakpoint(nr, brk); 8843671f4ebSJordan Niethe } 8853671f4ebSJordan Niethe 886404b27d6SMichael Neuling /* Check if we have DAWR or DABR hardware */ 887404b27d6SMichael Neuling bool ppc_breakpoint_available(void) 888404b27d6SMichael Neuling { 889c1fe190cSMichael Neuling if (dawr_enabled()) 890c1fe190cSMichael Neuling return true; /* POWER8 DAWR or POWER9 forced DAWR */ 891404b27d6SMichael Neuling if (cpu_has_feature(CPU_FTR_ARCH_207S)) 892404b27d6SMichael Neuling return false; /* POWER9 with DAWR disabled */ 893404b27d6SMichael Neuling /* DABR: Everything but POWER8 and POWER9 */ 894404b27d6SMichael Neuling return true; 895404b27d6SMichael Neuling } 896404b27d6SMichael Neuling EXPORT_SYMBOL_GPL(ppc_breakpoint_available); 897404b27d6SMichael Neuling 8983671f4ebSJordan Niethe /* Disable the breakpoint in hardware without touching current_brk[] */ 8993671f4ebSJordan Niethe void suspend_breakpoints(void) 9003671f4ebSJordan Niethe { 9013671f4ebSJordan Niethe struct arch_hw_breakpoint brk = {0}; 9023671f4ebSJordan Niethe int i; 9033671f4ebSJordan Niethe 9043671f4ebSJordan Niethe if (!ppc_breakpoint_available()) 9053671f4ebSJordan Niethe return; 9063671f4ebSJordan Niethe 9073671f4ebSJordan Niethe for (i = 0; i < nr_wp_slots(); i++) 9083671f4ebSJordan Niethe set_hw_breakpoint(i, &brk); 9093671f4ebSJordan Niethe } 9103671f4ebSJordan Niethe 9113671f4ebSJordan Niethe /* 9123671f4ebSJordan Niethe * Re-enable breakpoints suspended by suspend_breakpoints() in hardware 9133671f4ebSJordan Niethe * from current_brk[] 9143671f4ebSJordan Niethe */ 9153671f4ebSJordan Niethe void restore_breakpoints(void) 9163671f4ebSJordan Niethe { 9173671f4ebSJordan Niethe int i; 9183671f4ebSJordan Niethe 9193671f4ebSJordan Niethe if (!ppc_breakpoint_available()) 9203671f4ebSJordan Niethe return; 9213671f4ebSJordan Niethe 9223671f4ebSJordan Niethe for (i = 0; i < nr_wp_slots(); i++) 9233671f4ebSJordan Niethe set_hw_breakpoint(i, this_cpu_ptr(¤t_brk[i])); 9243671f4ebSJordan Niethe } 9253671f4ebSJordan Niethe 926fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 9275d176f75SCyril Bur 9285d176f75SCyril Bur static inline bool tm_enabled(struct task_struct *tsk) 9295d176f75SCyril Bur { 9305d176f75SCyril Bur return tsk && tsk->thread.regs && (tsk->thread.regs->msr & MSR_TM); 9315d176f75SCyril Bur } 9325d176f75SCyril Bur 933edd00b83SCyril Bur static void tm_reclaim_thread(struct thread_struct *thr, uint8_t cause) 934d31626f7SPaul Mackerras { 9357f821fc9SMichael Neuling /* 9367f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 9377f821fc9SMichael Neuling * checkpointed state outstanding. 9387f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 9397f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 9407f821fc9SMichael Neuling * This will then directly return to userspace without going 9417f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 9427f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 9437f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 9447f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 9457f821fc9SMichael Neuling * this state. 9467f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 9477f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 948027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 9497f821fc9SMichael Neuling */ 9507f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 9517f821fc9SMichael Neuling return; 9527f821fc9SMichael Neuling 95391381b9cSCyril Bur giveup_all(container_of(thr, struct task_struct, thread)); 95491381b9cSCyril Bur 955eb5c3f1cSCyril Bur tm_reclaim(thr, cause); 956eb5c3f1cSCyril Bur 957f48e91e8SMichael Neuling /* 958f48e91e8SMichael Neuling * If we are in a transaction and FP is off then we can't have 959f48e91e8SMichael Neuling * used FP inside that transaction. Hence the checkpointed 960f48e91e8SMichael Neuling * state is the same as the live state. We need to copy the 961f48e91e8SMichael Neuling * live state to the checkpointed state so that when the 962f48e91e8SMichael Neuling * transaction is restored, the checkpointed state is correct 963f48e91e8SMichael Neuling * and the aborted transaction sees the correct state. We use 964f48e91e8SMichael Neuling * ckpt_regs.msr here as that's what tm_reclaim will use to 965f48e91e8SMichael Neuling * determine if it's going to write the checkpointed state or 966f48e91e8SMichael Neuling * not. So either this will write the checkpointed registers, 967f48e91e8SMichael Neuling * or reclaim will. Similarly for VMX. 968f48e91e8SMichael Neuling */ 969f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_FP) == 0) 970f48e91e8SMichael Neuling memcpy(&thr->ckfp_state, &thr->fp_state, 971f48e91e8SMichael Neuling sizeof(struct thread_fp_state)); 972f48e91e8SMichael Neuling if ((thr->ckpt_regs.msr & MSR_VEC) == 0) 973f48e91e8SMichael Neuling memcpy(&thr->ckvr_state, &thr->vr_state, 974f48e91e8SMichael Neuling sizeof(struct thread_vr_state)); 975d31626f7SPaul Mackerras } 976d31626f7SPaul Mackerras 977d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 978d31626f7SPaul Mackerras { 979d31626f7SPaul Mackerras tm_enable(); 980edd00b83SCyril Bur tm_reclaim_thread(¤t->thread, cause); 981d31626f7SPaul Mackerras } 982d31626f7SPaul Mackerras 983fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 984fb09692eSMichael Neuling { 985fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 986fb09692eSMichael Neuling * middle of a transaction. 987fb09692eSMichael Neuling * 988fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 989fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 990000ec280SCyril Bur * checkpointed (tbegin) state in ckpt_regs, ckfp_state and 991000ec280SCyril Bur * ckvr_state 992fb09692eSMichael Neuling * 993fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 994fb09692eSMichael Neuling */ 995fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 996fb09692eSMichael Neuling 997fb09692eSMichael Neuling if (!thr->regs) 998fb09692eSMichael Neuling return; 999fb09692eSMichael Neuling 1000fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 1001fb09692eSMichael Neuling goto out_and_saveregs; 1002fb09692eSMichael Neuling 100392fb8690SMichael Neuling WARN_ON(tm_suspend_disabled); 100492fb8690SMichael Neuling 1005fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 1006fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 1007fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 1008fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 1009fb09692eSMichael Neuling thr->regs->trap); 1010fb09692eSMichael Neuling 1011edd00b83SCyril Bur tm_reclaim_thread(thr, TM_CAUSE_RESCHED); 1012fb09692eSMichael Neuling 1013fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 1014fb09692eSMichael Neuling tsk->pid); 1015fb09692eSMichael Neuling 1016fb09692eSMichael Neuling out_and_saveregs: 1017fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 1018fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 1019fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 1020fb09692eSMichael Neuling * cannot happen later in _switch(). 1021fb09692eSMichael Neuling */ 1022fb09692eSMichael Neuling tm_save_sprs(thr); 1023fb09692eSMichael Neuling } 1024fb09692eSMichael Neuling 1025eb5c3f1cSCyril Bur extern void __tm_recheckpoint(struct thread_struct *thread); 1026e6b8fd02SMichael Neuling 1027eb5c3f1cSCyril Bur void tm_recheckpoint(struct thread_struct *thread) 1028e6b8fd02SMichael Neuling { 1029e6b8fd02SMichael Neuling unsigned long flags; 1030e6b8fd02SMichael Neuling 10315d176f75SCyril Bur if (!(thread->regs->msr & MSR_TM)) 10325d176f75SCyril Bur return; 10335d176f75SCyril Bur 1034e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 1035e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 1036e6b8fd02SMichael Neuling * So let's hard disable over this region. 1037e6b8fd02SMichael Neuling */ 1038e6b8fd02SMichael Neuling local_irq_save(flags); 1039e6b8fd02SMichael Neuling hard_irq_disable(); 1040e6b8fd02SMichael Neuling 1041e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 1042e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 1043e6b8fd02SMichael Neuling */ 1044e6b8fd02SMichael Neuling tm_restore_sprs(thread); 1045e6b8fd02SMichael Neuling 1046eb5c3f1cSCyril Bur __tm_recheckpoint(thread); 1047e6b8fd02SMichael Neuling 1048e6b8fd02SMichael Neuling local_irq_restore(flags); 1049e6b8fd02SMichael Neuling } 1050e6b8fd02SMichael Neuling 1051bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 1052fb09692eSMichael Neuling { 1053fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 1054fb09692eSMichael Neuling return; 1055fb09692eSMichael Neuling 1056fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 1057fb09692eSMichael Neuling * 1058fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 1059fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 1060fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 1061dc310669SCyril Bur * unavailable later, we are unable to determine which set of FP regs 1062fb09692eSMichael Neuling * need to be restored. 1063fb09692eSMichael Neuling */ 10645d176f75SCyril Bur if (!tm_enabled(new)) 1065fb09692eSMichael Neuling return; 1066fb09692eSMichael Neuling 1067e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 1068fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 1069fb09692eSMichael Neuling return; 1070e6b8fd02SMichael Neuling } 1071fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 1072eb5c3f1cSCyril Bur TM_DEBUG("*** tm_recheckpoint of pid %d (new->msr 0x%lx)\n", 1073eb5c3f1cSCyril Bur new->pid, new->thread.regs->msr); 1074fb09692eSMichael Neuling 1075eb5c3f1cSCyril Bur tm_recheckpoint(&new->thread); 1076fb09692eSMichael Neuling 1077dc310669SCyril Bur /* 1078dc310669SCyril Bur * The checkpointed state has been restored but the live state has 1079dc310669SCyril Bur * not, ensure all the math functionality is turned off to trigger 1080dc310669SCyril Bur * restore_math() to reload. 1081dc310669SCyril Bur */ 1082dc310669SCyril Bur new->thread.regs->msr &= ~(MSR_FP | MSR_VEC | MSR_VSX); 1083fb09692eSMichael Neuling 1084fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 1085fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 1086fb09692eSMichael Neuling new->pid, mfmsr()); 1087fb09692eSMichael Neuling } 1088fb09692eSMichael Neuling 1089dc310669SCyril Bur static inline void __switch_to_tm(struct task_struct *prev, 1090dc310669SCyril Bur struct task_struct *new) 1091fb09692eSMichael Neuling { 1092fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 10935d176f75SCyril Bur if (tm_enabled(prev) || tm_enabled(new)) 1094fb09692eSMichael Neuling tm_enable(); 10955d176f75SCyril Bur 10965d176f75SCyril Bur if (tm_enabled(prev)) { 10975d176f75SCyril Bur prev->thread.load_tm++; 1098fb09692eSMichael Neuling tm_reclaim_task(prev); 10995d176f75SCyril Bur if (!MSR_TM_ACTIVE(prev->thread.regs->msr) && prev->thread.load_tm == 0) 11005d176f75SCyril Bur prev->thread.regs->msr &= ~MSR_TM; 11015d176f75SCyril Bur } 11025d176f75SCyril Bur 1103dc310669SCyril Bur tm_recheckpoint_new_task(new); 1104fb09692eSMichael Neuling } 1105fb09692eSMichael Neuling } 1106d31626f7SPaul Mackerras 1107d31626f7SPaul Mackerras /* 1108d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 1109d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 1110d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 1111d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 1112d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 1113d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 1114d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 1115d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 1116d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 1117d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 1118d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 1119d31626f7SPaul Mackerras * state to use. 1120d31626f7SPaul Mackerras */ 1121d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 1122d31626f7SPaul Mackerras { 1123d31626f7SPaul Mackerras unsigned long msr_diff; 1124d31626f7SPaul Mackerras 1125dc310669SCyril Bur /* 1126dc310669SCyril Bur * This is the only moment we should clear TIF_RESTORE_TM as 1127dc310669SCyril Bur * it is here that ckpt_regs.msr and pt_regs.msr become the same 1128dc310669SCyril Bur * again, anything else could lead to an incorrect ckpt_msr being 1129dc310669SCyril Bur * saved and therefore incorrect signal contexts. 1130dc310669SCyril Bur */ 1131d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 1132d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 1133d31626f7SPaul Mackerras return; 1134d31626f7SPaul Mackerras 1135829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 1136d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 113770fe3d98SCyril Bur 1138dc16b553SCyril Bur /* Ensure that restore_math() will restore */ 1139dc16b553SCyril Bur if (msr_diff & MSR_FP) 1140dc16b553SCyril Bur current->thread.load_fp = 1; 114139715bf9SValentin Rothberg #ifdef CONFIG_ALTIVEC 1142dc16b553SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC) 1143dc16b553SCyril Bur current->thread.load_vec = 1; 1144dc16b553SCyril Bur #endif 114570fe3d98SCyril Bur restore_math(regs); 114670fe3d98SCyril Bur 114759dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr | msr_diff); 1148d31626f7SPaul Mackerras } 1149d31626f7SPaul Mackerras 11502d19630eSChristopher M. Riedl #else /* !CONFIG_PPC_TRANSACTIONAL_MEM */ 1151fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 1152dc310669SCyril Bur #define __switch_to_tm(prev, new) 11532d19630eSChristopher M. Riedl void tm_reclaim_current(uint8_t cause) {} 1154fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 11559422de3eSMichael Neuling 1156152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 1157152d523eSAnton Blanchard { 1158152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 115901d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1160152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1161152d523eSAnton Blanchard #endif 1162359c2ca7SChristophe Leroy #ifdef CONFIG_SPE 1163359c2ca7SChristophe Leroy if (cpu_has_feature(CPU_FTR_SPE)) 1164359c2ca7SChristophe Leroy t->spefscr = mfspr(SPRN_SPEFSCR); 1165359c2ca7SChristophe Leroy #endif 1166152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1167152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1168152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1169152d523eSAnton Blanchard 1170152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1171152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1172152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1173152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1174152d523eSAnton Blanchard 1175152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1176152d523eSAnton Blanchard 1177152d523eSAnton Blanchard /* 1178152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1179152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1180152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1181152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1182152d523eSAnton Blanchard */ 1183152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1184152d523eSAnton Blanchard } 1185152d523eSAnton Blanchard #endif 1186152d523eSAnton Blanchard } 1187152d523eSAnton Blanchard 118834e119c9SNicholas Piggin #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 118934e119c9SNicholas Piggin void kvmppc_save_user_regs(void) 119034e119c9SNicholas Piggin { 119134e119c9SNicholas Piggin unsigned long usermsr; 119234e119c9SNicholas Piggin 119334e119c9SNicholas Piggin if (!current->thread.regs) 119434e119c9SNicholas Piggin return; 119534e119c9SNicholas Piggin 119634e119c9SNicholas Piggin usermsr = current->thread.regs->msr; 119734e119c9SNicholas Piggin 119834e119c9SNicholas Piggin if (usermsr & MSR_FP) 119934e119c9SNicholas Piggin save_fpu(current); 120034e119c9SNicholas Piggin 120134e119c9SNicholas Piggin if (usermsr & MSR_VEC) 120234e119c9SNicholas Piggin save_altivec(current); 120334e119c9SNicholas Piggin 120434e119c9SNicholas Piggin #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 120534e119c9SNicholas Piggin if (usermsr & MSR_TM) { 120634e119c9SNicholas Piggin current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 120734e119c9SNicholas Piggin current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 120834e119c9SNicholas Piggin current->thread.tm_texasr = mfspr(SPRN_TEXASR); 120934e119c9SNicholas Piggin current->thread.regs->msr &= ~MSR_TM; 121034e119c9SNicholas Piggin } 121134e119c9SNicholas Piggin #endif 121234e119c9SNicholas Piggin } 121334e119c9SNicholas Piggin EXPORT_SYMBOL_GPL(kvmppc_save_user_regs); 12145236756dSNicholas Piggin 12155236756dSNicholas Piggin void kvmppc_save_current_sprs(void) 12165236756dSNicholas Piggin { 12175236756dSNicholas Piggin save_sprs(¤t->thread); 12185236756dSNicholas Piggin } 12195236756dSNicholas Piggin EXPORT_SYMBOL_GPL(kvmppc_save_current_sprs); 122034e119c9SNicholas Piggin #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ 122134e119c9SNicholas Piggin 1222152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1223152d523eSAnton Blanchard struct thread_struct *new_thread) 1224152d523eSAnton Blanchard { 1225152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1226152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1227152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1228152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1229152d523eSAnton Blanchard #endif 1230359c2ca7SChristophe Leroy #ifdef CONFIG_SPE 1231359c2ca7SChristophe Leroy if (cpu_has_feature(CPU_FTR_SPE) && 1232359c2ca7SChristophe Leroy old_thread->spefscr != new_thread->spefscr) 1233359c2ca7SChristophe Leroy mtspr(SPRN_SPEFSCR, new_thread->spefscr); 1234359c2ca7SChristophe Leroy #endif 1235152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1236152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1237152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1238b57bd2deSMichael Neuling if (new_thread->dscr_inherit) 1239152d523eSAnton Blanchard dscr = new_thread->dscr; 1240152d523eSAnton Blanchard 1241152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1242152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1243152d523eSAnton Blanchard } 1244152d523eSAnton Blanchard 1245152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1246152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1247152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1248152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1249152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1250152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1251152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1252152d523eSAnton Blanchard 1253b57bd2deSMichael Neuling if (old_thread->fscr != new_thread->fscr) 1254b57bd2deSMichael Neuling mtspr(SPRN_FSCR, new_thread->fscr); 1255b57bd2deSMichael Neuling 1256152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1257152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1258152d523eSAnton Blanchard } 1259ec233edeSSukadev Bhattiprolu 12603449f191SAlastair D'Silva if (cpu_has_feature(CPU_FTR_P9_TIDR) && 1261ec233edeSSukadev Bhattiprolu old_thread->tidr != new_thread->tidr) 1262ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, new_thread->tidr); 1263152d523eSAnton Blanchard #endif 126406bb53b3SRam Pai 1265152d523eSAnton Blanchard } 1266152d523eSAnton Blanchard 126714cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 126814cf11afSPaul Mackerras struct task_struct *new) 126914cf11afSPaul Mackerras { 127014cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 127114cf11afSPaul Mackerras struct task_struct *last; 1272387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 1273d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1274d6bf29b4SPeter Zijlstra #endif 127514cf11afSPaul Mackerras 1276152d523eSAnton Blanchard new_thread = &new->thread; 1277152d523eSAnton Blanchard old_thread = ¤t->thread; 1278152d523eSAnton Blanchard 12797ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 12807ba5fef7SMichael Neuling 1281387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 128269111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1283d6bf29b4SPeter Zijlstra if (batch->active) { 1284d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1285d6bf29b4SPeter Zijlstra if (batch->index) 1286d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1287d6bf29b4SPeter Zijlstra batch->active = 0; 1288d6bf29b4SPeter Zijlstra } 1289f35d2f24SNicholas Piggin 1290f35d2f24SNicholas Piggin /* 1291f35d2f24SNicholas Piggin * On POWER9 the copy-paste buffer can only paste into 1292f35d2f24SNicholas Piggin * foreign real addresses, so unprivileged processes can not 1293f35d2f24SNicholas Piggin * see the data or use it in any way unless they have 1294f35d2f24SNicholas Piggin * foreign real mappings. If the new process has the foreign 1295f35d2f24SNicholas Piggin * real address mappings, we must issue a cp_abort to clear 1296f35d2f24SNicholas Piggin * any state and prevent snooping, corruption or a covert 1297f35d2f24SNicholas Piggin * channel. ISA v3.1 supports paste into local memory. 1298f35d2f24SNicholas Piggin */ 1299f35d2f24SNicholas Piggin if (new->mm && (cpu_has_feature(CPU_FTR_ARCH_31) || 1300f35d2f24SNicholas Piggin atomic_read(&new->mm->context.vas_windows))) 1301f35d2f24SNicholas Piggin asm volatile(PPC_CP_ABORT); 13024e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 130306d67d54SPaul Mackerras 1304f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1305f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1306f3d885ccSAnton Blanchard #else 1307f3d885ccSAnton Blanchard /* 1308f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1309f3d885ccSAnton Blanchard * schedule DABR 1310f3d885ccSAnton Blanchard */ 1311f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1312303e6a9dSRavi Bangoria switch_hw_breakpoint(new); 1313f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1314f3d885ccSAnton Blanchard #endif 1315f3d885ccSAnton Blanchard 1316f3d885ccSAnton Blanchard /* 1317f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1318f3d885ccSAnton Blanchard * change a number of them. 1319f3d885ccSAnton Blanchard */ 1320f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1321f3d885ccSAnton Blanchard 1322f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1323f3d885ccSAnton Blanchard giveup_all(prev); 1324f3d885ccSAnton Blanchard 1325dc310669SCyril Bur __switch_to_tm(prev, new); 1326dc310669SCyril Bur 1327e4c0fc5fSNicholas Piggin if (!radix_enabled()) { 132844387e9fSAnton Blanchard /* 1329e4c0fc5fSNicholas Piggin * We can't take a PMU exception inside _switch() since there 1330e4c0fc5fSNicholas Piggin * is a window where the kernel stack SLB and the kernel stack 1331e4c0fc5fSNicholas Piggin * are out of sync. Hard disable here. 133244387e9fSAnton Blanchard */ 133344387e9fSAnton Blanchard hard_irq_disable(); 1334e4c0fc5fSNicholas Piggin } 1335bc2a9408SMichael Neuling 133620dbe670SAnton Blanchard /* 133759dc5bfcSNicholas Piggin * Call restore_sprs() and set_return_regs_changed() before calling 133859dc5bfcSNicholas Piggin * _switch(). If we move it after _switch() then we miss out on calling 133959dc5bfcSNicholas Piggin * it for new tasks. The reason for this is we manually create a stack 134059dc5bfcSNicholas Piggin * frame for new tasks that directly returns through ret_from_fork() or 134120dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 134220dbe670SAnton Blanchard */ 1343f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1344f3d885ccSAnton Blanchard 134559dc5bfcSNicholas Piggin set_return_regs_changed(); /* _switch changes stack (and regs) */ 134659dc5bfcSNicholas Piggin 134742e03bc5SChristophe Leroy if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64)) 1348c1672883SChristophe Leroy kuap_assert_locked(); 134942e03bc5SChristophe Leroy 135020dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 135120dbe670SAnton Blanchard 1352f35d2f24SNicholas Piggin /* 1353f35d2f24SNicholas Piggin * Nothing after _switch will be run for newly created tasks, 1354f35d2f24SNicholas Piggin * because they switch directly to ret_from_fork/ret_from_kernel_thread 1355f35d2f24SNicholas Piggin * etc. Code added here should have a comment explaining why that is 1356f35d2f24SNicholas Piggin * okay. 1357f35d2f24SNicholas Piggin */ 1358f35d2f24SNicholas Piggin 13594e003747SMichael Ellerman #ifdef CONFIG_PPC_BOOK3S_64 1360387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 1361f35d2f24SNicholas Piggin /* 1362f35d2f24SNicholas Piggin * This applies to a process that was context switched while inside 1363f35d2f24SNicholas Piggin * arch_enter_lazy_mmu_mode(), to re-activate the batch that was 1364f35d2f24SNicholas Piggin * deactivated above, before _switch(). This will never be the case 1365f35d2f24SNicholas Piggin * for new tasks. 1366f35d2f24SNicholas Piggin */ 1367d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1368d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 136969111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1370d6bf29b4SPeter Zijlstra batch->active = 1; 1371d6bf29b4SPeter Zijlstra } 1372387e220aSNicholas Piggin #endif 137370fe3d98SCyril Bur 137407d2a628SNicholas Piggin /* 1375f35d2f24SNicholas Piggin * Math facilities are masked out of the child MSR in copy_thread. 1376f35d2f24SNicholas Piggin * A new task does not need to restore_math because it will 1377f35d2f24SNicholas Piggin * demand fault them. 137807d2a628SNicholas Piggin */ 1379f35d2f24SNicholas Piggin if (current->thread.regs) 1380f35d2f24SNicholas Piggin restore_math(current->thread.regs); 13814e003747SMichael Ellerman #endif /* CONFIG_PPC_BOOK3S_64 */ 1382d6bf29b4SPeter Zijlstra 138314cf11afSPaul Mackerras return last; 138414cf11afSPaul Mackerras } 138514cf11afSPaul Mackerras 1386df13102fSChristophe Leroy #define NR_INSN_TO_PRINT 16 138706d67d54SPaul Mackerras 138806d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 138906d67d54SPaul Mackerras { 139006d67d54SPaul Mackerras int i; 1391a6e2c226SAneesh Kumar K.V unsigned long nip = regs->nip; 1392df13102fSChristophe Leroy unsigned long pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 139306d67d54SPaul Mackerras 13943e654127SMichael Ellerman printk("Code: "); 139506d67d54SPaul Mackerras 1396a6e2c226SAneesh Kumar K.V /* 1397a6e2c226SAneesh Kumar K.V * If we were executing with the MMU off for instructions, adjust pc 1398a6e2c226SAneesh Kumar K.V * rather than printing XXXXXXXX. 1399a6e2c226SAneesh Kumar K.V */ 1400a6e2c226SAneesh Kumar K.V if (!IS_ENABLED(CONFIG_BOOKE) && !(regs->msr & MSR_IR)) { 1401a6e2c226SAneesh Kumar K.V pc = (unsigned long)phys_to_virt(pc); 1402a6e2c226SAneesh Kumar K.V nip = (unsigned long)phys_to_virt(regs->nip); 1403a6e2c226SAneesh Kumar K.V } 1404a6e2c226SAneesh Kumar K.V 1405df13102fSChristophe Leroy for (i = 0; i < NR_INSN_TO_PRINT; i++) { 140606d67d54SPaul Mackerras int instr; 140706d67d54SPaul Mackerras 1408d9ab6da6SChristophe Leroy if (get_kernel_nofault(instr, (const void *)pc)) { 14092ffd04deSAndrew Donnellan pr_cont("XXXXXXXX "); 141006d67d54SPaul Mackerras } else { 1411a6e2c226SAneesh Kumar K.V if (nip == pc) 14122ffd04deSAndrew Donnellan pr_cont("<%08x> ", instr); 141306d67d54SPaul Mackerras else 14142ffd04deSAndrew Donnellan pr_cont("%08x ", instr); 141506d67d54SPaul Mackerras } 141606d67d54SPaul Mackerras 141706d67d54SPaul Mackerras pc += sizeof(int); 141806d67d54SPaul Mackerras } 141906d67d54SPaul Mackerras 14202ffd04deSAndrew Donnellan pr_cont("\n"); 142106d67d54SPaul Mackerras } 142206d67d54SPaul Mackerras 142388b0fe17SMurilo Opsfelder Araujo void show_user_instructions(struct pt_regs *regs) 142488b0fe17SMurilo Opsfelder Araujo { 142588b0fe17SMurilo Opsfelder Araujo unsigned long pc; 1426df13102fSChristophe Leroy int n = NR_INSN_TO_PRINT; 1427fb2d9505SChristophe Leroy struct seq_buf s; 1428fb2d9505SChristophe Leroy char buf[96]; /* enough for 8 times 9 + 2 chars */ 142988b0fe17SMurilo Opsfelder Araujo 1430df13102fSChristophe Leroy pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 143188b0fe17SMurilo Opsfelder Araujo 1432fb2d9505SChristophe Leroy seq_buf_init(&s, buf, sizeof(buf)); 143388b0fe17SMurilo Opsfelder Araujo 1434fb2d9505SChristophe Leroy while (n) { 1435fb2d9505SChristophe Leroy int i; 1436fb2d9505SChristophe Leroy 1437fb2d9505SChristophe Leroy seq_buf_clear(&s); 1438fb2d9505SChristophe Leroy 1439fb2d9505SChristophe Leroy for (i = 0; i < 8 && n; i++, n--, pc += sizeof(int)) { 144088b0fe17SMurilo Opsfelder Araujo int instr; 144188b0fe17SMurilo Opsfelder Araujo 1442c0ee37e8SChristoph Hellwig if (copy_from_user_nofault(&instr, (void __user *)pc, 1443c0ee37e8SChristoph Hellwig sizeof(instr))) { 1444fb2d9505SChristophe Leroy seq_buf_printf(&s, "XXXXXXXX "); 1445fb2d9505SChristophe Leroy continue; 1446fb2d9505SChristophe Leroy } 1447fb2d9505SChristophe Leroy seq_buf_printf(&s, regs->nip == pc ? "<%08x> " : "%08x ", instr); 144888b0fe17SMurilo Opsfelder Araujo } 144988b0fe17SMurilo Opsfelder Araujo 1450fb2d9505SChristophe Leroy if (!seq_buf_has_overflowed(&s)) 1451fb2d9505SChristophe Leroy pr_info("%s[%d]: code: %s\n", current->comm, 1452fb2d9505SChristophe Leroy current->pid, s.buffer); 145388b0fe17SMurilo Opsfelder Araujo } 145488b0fe17SMurilo Opsfelder Araujo } 145588b0fe17SMurilo Opsfelder Araujo 1456801c0b2cSMichael Neuling struct regbit { 145706d67d54SPaul Mackerras unsigned long bit; 145806d67d54SPaul Mackerras const char *name; 1459801c0b2cSMichael Neuling }; 1460801c0b2cSMichael Neuling 1461801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 14623bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 14633bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 14643bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 14653bfd0c9cSAnton Blanchard #endif 14663bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 14673bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 14683bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 14693bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 14703bfd0c9cSAnton Blanchard #endif 147106d67d54SPaul Mackerras {MSR_EE, "EE"}, 147206d67d54SPaul Mackerras {MSR_PR, "PR"}, 147306d67d54SPaul Mackerras {MSR_FP, "FP"}, 147406d67d54SPaul Mackerras {MSR_ME, "ME"}, 14753bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 14761b98326bSKumar Gala {MSR_DE, "DE"}, 14773bfd0c9cSAnton Blanchard #else 14783bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 14793bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 14803bfd0c9cSAnton Blanchard #endif 148106d67d54SPaul Mackerras {MSR_IR, "IR"}, 148206d67d54SPaul Mackerras {MSR_DR, "DR"}, 14833bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 14843bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 14853bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 14863bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 14873bfd0c9cSAnton Blanchard #endif 148806d67d54SPaul Mackerras {0, NULL} 148906d67d54SPaul Mackerras }; 149006d67d54SPaul Mackerras 1491801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 149206d67d54SPaul Mackerras { 1493801c0b2cSMichael Neuling const char *s = ""; 149406d67d54SPaul Mackerras 149506d67d54SPaul Mackerras for (; bits->bit; ++bits) 149606d67d54SPaul Mackerras if (val & bits->bit) { 1497db5ba5aeSMichael Ellerman pr_cont("%s%s", s, bits->name); 1498801c0b2cSMichael Neuling s = sep; 149906d67d54SPaul Mackerras } 1500801c0b2cSMichael Neuling } 1501801c0b2cSMichael Neuling 1502801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1503801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1504801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1505801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1506801c0b2cSMichael Neuling {MSR_TM, "E"}, 1507801c0b2cSMichael Neuling {0, NULL} 1508801c0b2cSMichael Neuling }; 1509801c0b2cSMichael Neuling 1510801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1511801c0b2cSMichael Neuling { 1512801c0b2cSMichael Neuling /* 1513801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1514801c0b2cSMichael Neuling * Inside the TM[], the output means: 1515801c0b2cSMichael Neuling * E: Enabled (bit 32) 1516801c0b2cSMichael Neuling * S: Suspended (bit 33) 1517801c0b2cSMichael Neuling * T: Transactional (bit 34) 1518801c0b2cSMichael Neuling */ 1519801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1520db5ba5aeSMichael Ellerman pr_cont(",TM["); 1521801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1522db5ba5aeSMichael Ellerman pr_cont("]"); 1523801c0b2cSMichael Neuling } 1524801c0b2cSMichael Neuling } 1525801c0b2cSMichael Neuling #else 1526801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1527801c0b2cSMichael Neuling #endif 1528801c0b2cSMichael Neuling 1529801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1530801c0b2cSMichael Neuling { 1531db5ba5aeSMichael Ellerman pr_cont("<"); 1532801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1533801c0b2cSMichael Neuling print_tm_bits(val); 1534db5ba5aeSMichael Ellerman pr_cont(">"); 153506d67d54SPaul Mackerras } 153606d67d54SPaul Mackerras 153706d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1538f6f7dde3Santon@samba.org #define REG "%016lx" 153906d67d54SPaul Mackerras #define REGS_PER_LINE 4 154006d67d54SPaul Mackerras #else 1541f6f7dde3Santon@samba.org #define REG "%08lx" 154206d67d54SPaul Mackerras #define REGS_PER_LINE 8 154306d67d54SPaul Mackerras #endif 154406d67d54SPaul Mackerras 1545bf13718bSNicholas Piggin static void __show_regs(struct pt_regs *regs) 154614cf11afSPaul Mackerras { 154714cf11afSPaul Mackerras int i, trap; 154814cf11afSPaul Mackerras 154906d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 155006d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 1551182dc9c7SMichael Ellerman printk("REGS: %px TRAP: %04lx %s (%s)\n", 155296b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 155306d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1554801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1555f6fc73fbSMichael Ellerman pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 155614cf11afSPaul Mackerras trap = TRAP(regs); 1557912237eaSNicholas Piggin if (!trap_is_syscall(regs) && cpu_has_feature(CPU_FTR_CFAR)) 15587dae865fSMichael Ellerman pr_cont("CFAR: "REG" ", regs->orig_gpr3); 15597153d4bfSXiongwei Song if (trap == INTERRUPT_MACHINE_CHECK || 15607153d4bfSXiongwei Song trap == INTERRUPT_DATA_STORAGE || 15617153d4bfSXiongwei Song trap == INTERRUPT_ALIGNMENT) { 15622ec42996SChristophe Leroy if (IS_ENABLED(CONFIG_4xx) || IS_ENABLED(CONFIG_BOOKE)) 15634872cbd0SXiongwei Song pr_cont("DEAR: "REG" ESR: "REG" ", regs->dear, regs->esr); 15642ec42996SChristophe Leroy else 15657dae865fSMichael Ellerman pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 15662ec42996SChristophe Leroy } 15672ec42996SChristophe Leroy 15689db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 15693130a7bbSNicholas Piggin pr_cont("IRQMASK: %lx ", regs->softe); 15709db8bcfdSAnton Blanchard #endif 15719db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 15726d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 15737dae865fSMichael Ellerman pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 157414170789SKumar Gala #endif 157514cf11afSPaul Mackerras 157614cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 157706d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 15787dae865fSMichael Ellerman pr_cont("\nGPR%02d: ", i); 15797dae865fSMichael Ellerman pr_cont(REG " ", regs->gpr[i]); 158014cf11afSPaul Mackerras } 15817dae865fSMichael Ellerman pr_cont("\n"); 158214cf11afSPaul Mackerras /* 158314cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 158414cf11afSPaul Mackerras * above info out without failing 158514cf11afSPaul Mackerras */ 15868f020c7cSChristophe Leroy if (IS_ENABLED(CONFIG_KALLSYMS)) { 1587058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1588058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 15898f020c7cSChristophe Leroy } 1590bf13718bSNicholas Piggin } 1591bf13718bSNicholas Piggin 1592bf13718bSNicholas Piggin void show_regs(struct pt_regs *regs) 1593bf13718bSNicholas Piggin { 1594bf13718bSNicholas Piggin show_regs_print_info(KERN_DEFAULT); 1595bf13718bSNicholas Piggin __show_regs(regs); 15969cb8f069SDmitry Safonov show_stack(current, (unsigned long *) regs->gpr[1], KERN_DEFAULT); 159706d67d54SPaul Mackerras if (!user_mode(regs)) 159806d67d54SPaul Mackerras show_instructions(regs); 159914cf11afSPaul Mackerras } 160014cf11afSPaul Mackerras 160114cf11afSPaul Mackerras void flush_thread(void) 160214cf11afSPaul Mackerras { 1603e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 16045aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1605e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 16063bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1607e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 160814cf11afSPaul Mackerras } 160914cf11afSPaul Mackerras 1610425d3314SNicholas Piggin void arch_setup_new_exec(void) 1611425d3314SNicholas Piggin { 1612d7df77e8SAneesh Kumar K.V 1613d7df77e8SAneesh Kumar K.V #ifdef CONFIG_PPC_BOOK3S_64 1614d7df77e8SAneesh Kumar K.V if (!radix_enabled()) 1615425d3314SNicholas Piggin hash__setup_new_exec(); 1616425d3314SNicholas Piggin #endif 1617d7df77e8SAneesh Kumar K.V /* 1618d7df77e8SAneesh Kumar K.V * If we exec out of a kernel thread then thread.regs will not be 1619d7df77e8SAneesh Kumar K.V * set. Do it now. 1620d7df77e8SAneesh Kumar K.V */ 1621d7df77e8SAneesh Kumar K.V if (!current->thread.regs) { 1622d7df77e8SAneesh Kumar K.V struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 1623d7df77e8SAneesh Kumar K.V current->thread.regs = regs - 1; 1624d7df77e8SAneesh Kumar K.V } 1625d5fa30e6SAneesh Kumar K.V 1626d5fa30e6SAneesh Kumar K.V #ifdef CONFIG_PPC_MEM_KEYS 1627d5fa30e6SAneesh Kumar K.V current->thread.regs->amr = default_amr; 1628d5fa30e6SAneesh Kumar K.V current->thread.regs->iamr = default_iamr; 1629d5fa30e6SAneesh Kumar K.V #endif 1630d7df77e8SAneesh Kumar K.V } 1631425d3314SNicholas Piggin 1632ec233edeSSukadev Bhattiprolu #ifdef CONFIG_PPC64 163371cc64a8SAlastair D'Silva /** 163471cc64a8SAlastair D'Silva * Assign a TIDR (thread ID) for task @t and set it in the thread 1635ec233edeSSukadev Bhattiprolu * structure. For now, we only support setting TIDR for 'current' task. 163671cc64a8SAlastair D'Silva * 163771cc64a8SAlastair D'Silva * Since the TID value is a truncated form of it PID, it is possible 163871cc64a8SAlastair D'Silva * (but unlikely) for 2 threads to have the same TID. In the unlikely event 163971cc64a8SAlastair D'Silva * that 2 threads share the same TID and are waiting, one of the following 164071cc64a8SAlastair D'Silva * cases will happen: 164171cc64a8SAlastair D'Silva * 164271cc64a8SAlastair D'Silva * 1. The correct thread is running, the wrong thread is not 164371cc64a8SAlastair D'Silva * In this situation, the correct thread is woken and proceeds to pass it's 164471cc64a8SAlastair D'Silva * condition check. 164571cc64a8SAlastair D'Silva * 164671cc64a8SAlastair D'Silva * 2. Neither threads are running 164771cc64a8SAlastair D'Silva * In this situation, neither thread will be woken. When scheduled, the waiting 164871cc64a8SAlastair D'Silva * threads will execute either a wait, which will return immediately, followed 164971cc64a8SAlastair D'Silva * by a condition check, which will pass for the correct thread and fail 165071cc64a8SAlastair D'Silva * for the wrong thread, or they will execute the condition check immediately. 165171cc64a8SAlastair D'Silva * 165271cc64a8SAlastair D'Silva * 3. The wrong thread is running, the correct thread is not 165371cc64a8SAlastair D'Silva * The wrong thread will be woken, but will fail it's condition check and 165471cc64a8SAlastair D'Silva * re-execute wait. The correct thread, when scheduled, will execute either 165571cc64a8SAlastair D'Silva * it's condition check (which will pass), or wait, which returns immediately 165671cc64a8SAlastair D'Silva * when called the first time after the thread is scheduled, followed by it's 165771cc64a8SAlastair D'Silva * condition check (which will pass). 165871cc64a8SAlastair D'Silva * 165971cc64a8SAlastair D'Silva * 4. Both threads are running 166071cc64a8SAlastair D'Silva * Both threads will be woken. The wrong thread will fail it's condition check 166171cc64a8SAlastair D'Silva * and execute another wait, while the correct thread will pass it's condition 166271cc64a8SAlastair D'Silva * check. 166371cc64a8SAlastair D'Silva * 166471cc64a8SAlastair D'Silva * @t: the task to set the thread ID for 1665ec233edeSSukadev Bhattiprolu */ 1666ec233edeSSukadev Bhattiprolu int set_thread_tidr(struct task_struct *t) 1667ec233edeSSukadev Bhattiprolu { 16683449f191SAlastair D'Silva if (!cpu_has_feature(CPU_FTR_P9_TIDR)) 1669ec233edeSSukadev Bhattiprolu return -EINVAL; 1670ec233edeSSukadev Bhattiprolu 1671ec233edeSSukadev Bhattiprolu if (t != current) 1672ec233edeSSukadev Bhattiprolu return -EINVAL; 1673ec233edeSSukadev Bhattiprolu 16747e4d4233SVaibhav Jain if (t->thread.tidr) 16757e4d4233SVaibhav Jain return 0; 16767e4d4233SVaibhav Jain 167771cc64a8SAlastair D'Silva t->thread.tidr = (u16)task_pid_nr(t); 1678ec233edeSSukadev Bhattiprolu mtspr(SPRN_TIDR, t->thread.tidr); 1679ec233edeSSukadev Bhattiprolu 1680ec233edeSSukadev Bhattiprolu return 0; 1681ec233edeSSukadev Bhattiprolu } 1682b1db5513SChristophe Lombard EXPORT_SYMBOL_GPL(set_thread_tidr); 1683ec233edeSSukadev Bhattiprolu 1684ec233edeSSukadev Bhattiprolu #endif /* CONFIG_PPC64 */ 1685ec233edeSSukadev Bhattiprolu 168614cf11afSPaul Mackerras /* 168755ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 168855ccf3feSSuresh Siddha * copy the current task into the new thread. 168914cf11afSPaul Mackerras */ 169055ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 169114cf11afSPaul Mackerras { 1692579e633eSAnton Blanchard flush_all_to_thread(src); 1693621b5060SMichael Neuling /* 1694621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1695621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1696621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1697621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1698621b5060SMichael Neuling * checkpointed state back and the TM mode. 16995d176f75SCyril Bur * 17005d176f75SCyril Bur * Can't pass dst because it isn't ready. Doesn't matter, passing 17015d176f75SCyril Bur * dst is only important for __switch_to() 1702621b5060SMichael Neuling */ 1703dc310669SCyril Bur __switch_to_tm(src, src); 1704330a1eb7SMichael Ellerman 170555ccf3feSSuresh Siddha *dst = *src; 1706330a1eb7SMichael Ellerman 1707330a1eb7SMichael Ellerman clear_task_ebb(dst); 1708330a1eb7SMichael Ellerman 170955ccf3feSSuresh Siddha return 0; 171014cf11afSPaul Mackerras } 171114cf11afSPaul Mackerras 1712cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1713cec15488SMichael Ellerman { 1714387e220aSNicholas Piggin #ifdef CONFIG_PPC_64S_HASH_MMU 1715cec15488SMichael Ellerman unsigned long sp_vsid; 1716cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1717cec15488SMichael Ellerman 1718caca285eSAneesh Kumar K.V if (radix_enabled()) 1719caca285eSAneesh Kumar K.V return; 1720caca285eSAneesh Kumar K.V 1721cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1722cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1723cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1724cec15488SMichael Ellerman else 1725cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1726cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1727cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1728cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1729cec15488SMichael Ellerman #endif 1730cec15488SMichael Ellerman } 1731cec15488SMichael Ellerman 173214cf11afSPaul Mackerras /* 173314cf11afSPaul Mackerras * Copy a thread.. 173414cf11afSPaul Mackerras */ 1735efcac658SAlexey Kardashevskiy 17366eca8933SAlex Dowad /* 17376eca8933SAlex Dowad * Copy architecture-specific thread state 17386eca8933SAlex Dowad */ 1739c5febea0SEric W. Biederman int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) 174014cf11afSPaul Mackerras { 1741c5febea0SEric W. Biederman unsigned long clone_flags = args->flags; 1742c5febea0SEric W. Biederman unsigned long usp = args->stack; 1743c5febea0SEric W. Biederman unsigned long tls = args->tls; 174414cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 174514cf11afSPaul Mackerras extern void ret_from_fork(void); 17467fa95f9aSNicholas Piggin extern void ret_from_fork_scv(void); 174758254e10SAl Viro extern void ret_from_kernel_thread(void); 174858254e10SAl Viro void (*f)(void); 17490cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 17505d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 17516b424efaSRavi Bangoria #ifdef CONFIG_HAVE_HW_BREAKPOINT 17526b424efaSRavi Bangoria int i; 17536b424efaSRavi Bangoria #endif 17545d31a96eSMichael Ellerman 1755ed1cd6deSChristophe Leroy klp_init_thread_info(p); 175614cf11afSPaul Mackerras 1757bc067736SNicholas Piggin /* Create initial stack frame. */ 17581223e5a2SNicholas Piggin sp -= STACK_USER_INT_FRAME_SIZE; 17596895dfc0SNicholas Piggin *(unsigned long *)(sp + STACK_INT_FRAME_MARKER) = STACK_FRAME_REGS_MARKER; 1760bc067736SNicholas Piggin 176114cf11afSPaul Mackerras /* Copy registers */ 17621223e5a2SNicholas Piggin childregs = (struct pt_regs *)(sp + STACK_INT_FRAME_REGS); 17635bd2e97cSEric W. Biederman if (unlikely(args->fn)) { 17646eca8933SAlex Dowad /* kernel thread */ 17656895dfc0SNicholas Piggin ((unsigned long *)sp)[0] = 0; 176658254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 17671223e5a2SNicholas Piggin childregs->gpr[1] = sp + STACK_USER_INT_FRAME_SIZE; 17687cedd601SAnton Blanchard /* function */ 17695bd2e97cSEric W. Biederman if (args->fn) 17705bd2e97cSEric W. Biederman childregs->gpr[14] = ppc_function_entry((void *)args->fn); 177158254e10SAl Viro #ifdef CONFIG_PPC64 1772b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1773c2e480baSMadhavan Srinivasan childregs->softe = IRQS_ENABLED; 177406d67d54SPaul Mackerras #endif 17755bd2e97cSEric W. Biederman childregs->gpr[15] = (unsigned long)args->fn_arg; 177614cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1777138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 177858254e10SAl Viro f = ret_from_kernel_thread; 177914cf11afSPaul Mackerras } else { 17806eca8933SAlex Dowad /* user thread */ 1781afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 178258254e10SAl Viro *childregs = *regs; 1783ea516b11SAl Viro if (usp) 178414cf11afSPaul Mackerras childregs->gpr[1] = usp; 17856895dfc0SNicholas Piggin ((unsigned long *)sp)[0] = childregs->gpr[1]; 178614cf11afSPaul Mackerras p->thread.regs = childregs; 17877fa95f9aSNicholas Piggin /* 64s sets this in ret_from_fork */ 17887fa95f9aSNicholas Piggin if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64)) 178958254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 179006d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 17919904b005SDenis Kirjanov if (!is_32bit_task()) 1792facd04a9SNicholas Piggin childregs->gpr[13] = tls; 179306d67d54SPaul Mackerras else 1794facd04a9SNicholas Piggin childregs->gpr[2] = tls; 179514cf11afSPaul Mackerras } 179658254e10SAl Viro 17977fa95f9aSNicholas Piggin if (trap_is_scv(regs)) 17987fa95f9aSNicholas Piggin f = ret_from_fork_scv; 17997fa95f9aSNicholas Piggin else 180058254e10SAl Viro f = ret_from_fork; 180106d67d54SPaul Mackerras } 1802d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 180314cf11afSPaul Mackerras 180414cf11afSPaul Mackerras /* 180514cf11afSPaul Mackerras * The way this works is that at some point in the future 180614cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 180714cf11afSPaul Mackerras * That will pop off the stack frame created below and start 180814cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 180914cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 181014cf11afSPaul Mackerras * system call, using the stack frame created above. 181114cf11afSPaul Mackerras */ 1812edbd0387SNicholas Piggin ((unsigned long *)sp)[STACK_FRAME_LR_SAVE] = (unsigned long)f; 18136f291a03SNicholas Piggin sp -= STACK_SWITCH_FRAME_SIZE; 1814edbd0387SNicholas Piggin ((unsigned long *)sp)[0] = sp + STACK_SWITCH_FRAME_SIZE; 18156f291a03SNicholas Piggin kregs = (struct pt_regs *)(sp + STACK_SWITCH_FRAME_REGS); 181614cf11afSPaul Mackerras p->thread.ksp = sp; 18176f291a03SNicholas Piggin 181828d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 18196b424efaSRavi Bangoria for (i = 0; i < nr_wp_slots(); i++) 18206b424efaSRavi Bangoria p->thread.ptrace_bps[i] = NULL; 182128d170abSOleg Nesterov #endif 182228d170abSOleg Nesterov 1823b6254cedSChristophe Leroy #ifdef CONFIG_PPC_FPU_REGS 182418461960SPaul Mackerras p->thread.fp_save_area = NULL; 1825b6254cedSChristophe Leroy #endif 182618461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 182718461960SPaul Mackerras p->thread.vr_save_area = NULL; 182818461960SPaul Mackerras #endif 182916132529SChristophe Leroy #if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP) 183016132529SChristophe Leroy p->thread.kuap = KUAP_NONE; 183116132529SChristophe Leroy #endif 183243afcf8fSChristophe Leroy #if defined(CONFIG_BOOKE_OR_40x) && defined(CONFIG_PPC_KUAP) 183343afcf8fSChristophe Leroy p->thread.pid = MMU_NO_CONTEXT; 183443afcf8fSChristophe Leroy #endif 183518461960SPaul Mackerras 1836cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 183706d67d54SPaul Mackerras 1838efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1839efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 18401021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1841db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1842efcac658SAlexey Kardashevskiy } 184392779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 18444c2de74cSNicholas Piggin childregs->ppr = DEFAULT_PPR; 1845ec233edeSSukadev Bhattiprolu 1846ec233edeSSukadev Bhattiprolu p->thread.tidr = 0; 1847efcac658SAlexey Kardashevskiy #endif 1848f643fcabSAneesh Kumar K.V /* 1849f643fcabSAneesh Kumar K.V * Run with the current AMR value of the kernel 1850f643fcabSAneesh Kumar K.V */ 1851f643fcabSAneesh Kumar K.V #ifdef CONFIG_PPC_PKEY 1852f643fcabSAneesh Kumar K.V if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) 1853f643fcabSAneesh Kumar K.V kregs->amr = AMR_KUAP_BLOCKED; 1854f643fcabSAneesh Kumar K.V 1855f643fcabSAneesh Kumar K.V if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) 1856f643fcabSAneesh Kumar K.V kregs->iamr = AMR_KUEP_BLOCKED; 1857f643fcabSAneesh Kumar K.V #endif 18587cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 185914cf11afSPaul Mackerras return 0; 186014cf11afSPaul Mackerras } 186114cf11afSPaul Mackerras 18625434ae74SNicholas Piggin void preload_new_slb_context(unsigned long start, unsigned long sp); 18635434ae74SNicholas Piggin 186414cf11afSPaul Mackerras /* 186514cf11afSPaul Mackerras * Set up a thread for executing a new program 186614cf11afSPaul Mackerras */ 186706d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 186814cf11afSPaul Mackerras { 186990eac727SMichael Ellerman #ifdef CONFIG_PPC64 187090eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 18715434ae74SNicholas Piggin 1872bfac2799SChristophe Leroy if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && !radix_enabled()) 18735434ae74SNicholas Piggin preload_new_slb_context(start, sp); 18745434ae74SNicholas Piggin #endif 187590eac727SMichael Ellerman 18768e96a87cSCyril Bur #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 18778e96a87cSCyril Bur /* 18788e96a87cSCyril Bur * Clear any transactional state, we're exec()ing. The cause is 18798e96a87cSCyril Bur * not important as there will never be a recheckpoint so it's not 18808e96a87cSCyril Bur * user visible. 18818e96a87cSCyril Bur */ 18828e96a87cSCyril Bur if (MSR_TM_SUSPENDED(mfmsr())) 18838e96a87cSCyril Bur tm_reclaim_current(0); 18848e96a87cSCyril Bur #endif 18858e96a87cSCyril Bur 1886ec6d0ddeSNaveen N. Rao memset(®s->gpr[1], 0, sizeof(regs->gpr) - sizeof(regs->gpr[0])); 188714cf11afSPaul Mackerras regs->ctr = 0; 188814cf11afSPaul Mackerras regs->link = 0; 188914cf11afSPaul Mackerras regs->xer = 0; 189014cf11afSPaul Mackerras regs->ccr = 0; 189114cf11afSPaul Mackerras regs->gpr[1] = sp; 189206d67d54SPaul Mackerras 189306d67d54SPaul Mackerras #ifdef CONFIG_PPC32 189406d67d54SPaul Mackerras regs->mq = 0; 189506d67d54SPaul Mackerras regs->nip = start; 189614cf11afSPaul Mackerras regs->msr = MSR_USER; 189706d67d54SPaul Mackerras #else 18989904b005SDenis Kirjanov if (!is_32bit_task()) { 189994af3abfSRusty Russell unsigned long entry; 190006d67d54SPaul Mackerras 190194af3abfSRusty Russell if (is_elf2_task()) { 190294af3abfSRusty Russell /* Look ma, no function descriptors! */ 190394af3abfSRusty Russell entry = start; 190494af3abfSRusty Russell 190594af3abfSRusty Russell /* 190694af3abfSRusty Russell * Ulrich says: 190794af3abfSRusty Russell * The latest iteration of the ABI requires that when 190894af3abfSRusty Russell * calling a function (at its global entry point), 190994af3abfSRusty Russell * the caller must ensure r12 holds the entry point 191094af3abfSRusty Russell * address (so that the function can quickly 191194af3abfSRusty Russell * establish addressability). 191294af3abfSRusty Russell */ 191394af3abfSRusty Russell regs->gpr[12] = start; 191494af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 191594af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 191694af3abfSRusty Russell } else { 191794af3abfSRusty Russell unsigned long toc; 191894af3abfSRusty Russell 191994af3abfSRusty Russell /* start is a relocated pointer to the function 192094af3abfSRusty Russell * descriptor for the elf _start routine. The first 192194af3abfSRusty Russell * entry in the function descriptor is the entry 192294af3abfSRusty Russell * address of _start and the second entry is the TOC 192394af3abfSRusty Russell * value we need to use. 192406d67d54SPaul Mackerras */ 192506d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 192606d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 192706d67d54SPaul Mackerras 192806d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 192906d67d54SPaul Mackerras * need to be relocated before we can use them. 193006d67d54SPaul Mackerras */ 193106d67d54SPaul Mackerras if (load_addr != 0) { 193206d67d54SPaul Mackerras entry += load_addr; 193306d67d54SPaul Mackerras toc += load_addr; 193406d67d54SPaul Mackerras } 193506d67d54SPaul Mackerras regs->gpr[2] = toc; 193694af3abfSRusty Russell } 193759dc5bfcSNicholas Piggin regs_set_return_ip(regs, entry); 193859dc5bfcSNicholas Piggin regs_set_return_msr(regs, MSR_USER64); 1939d4bf9a78SStephen Rothwell } else { 1940d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 194159dc5bfcSNicholas Piggin regs_set_return_ip(regs, start); 194259dc5bfcSNicholas Piggin regs_set_return_msr(regs, MSR_USER32); 194306d67d54SPaul Mackerras } 194459dc5bfcSNicholas Piggin 194506d67d54SPaul Mackerras #endif 1946ce48b210SMichael Neuling #ifdef CONFIG_VSX 1947ce48b210SMichael Neuling current->thread.used_vsr = 0; 1948ce48b210SMichael Neuling #endif 19495434ae74SNicholas Piggin current->thread.load_slb = 0; 19501195892cSBreno Leitao current->thread.load_fp = 0; 1951b6254cedSChristophe Leroy #ifdef CONFIG_PPC_FPU_REGS 1952de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 195318461960SPaul Mackerras current->thread.fp_save_area = NULL; 1954b6254cedSChristophe Leroy #endif 195514cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1956de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1957de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 195818461960SPaul Mackerras current->thread.vr_save_area = NULL; 195914cf11afSPaul Mackerras current->thread.vrsave = 0; 196014cf11afSPaul Mackerras current->thread.used_vr = 0; 19611195892cSBreno Leitao current->thread.load_vec = 0; 196214cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 196314cf11afSPaul Mackerras #ifdef CONFIG_SPE 196414cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 196514cf11afSPaul Mackerras current->thread.acc = 0; 196614cf11afSPaul Mackerras current->thread.spefscr = 0; 196714cf11afSPaul Mackerras current->thread.used_spe = 0; 196814cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1969bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1970bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1971bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1972bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 19737f22ced4SBreno Leitao current->thread.load_tm = 0; 1974bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 197514cf11afSPaul Mackerras } 1976e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 197714cf11afSPaul Mackerras 197814cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 197914cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 198014cf11afSPaul Mackerras 198114cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 198214cf11afSPaul Mackerras { 198314cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 198414cf11afSPaul Mackerras 198514cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 198614cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 198714cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 198814cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 198914cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 19905e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1991640e9225SJoseph Myers /* 1992640e9225SJoseph Myers * When the sticky exception bits are set 1993640e9225SJoseph Myers * directly by userspace, it must call prctl 1994640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1995640e9225SJoseph Myers * in the existing prctl settings) or 1996640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1997640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1998640e9225SJoseph Myers * saving and restoring the whole 1999640e9225SJoseph Myers * floating-point environment need to do so 2000640e9225SJoseph Myers * anyway to restore the prctl settings from 2001640e9225SJoseph Myers * the saved environment. 2002640e9225SJoseph Myers */ 2003532ed190SChristophe Leroy #ifdef CONFIG_SPE 2004640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 200514cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 200614cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 2007532ed190SChristophe Leroy #endif 200806d67d54SPaul Mackerras return 0; 20095e14d21eSKumar Gala } else { 20105e14d21eSKumar Gala return -EINVAL; 20115e14d21eSKumar Gala } 201206d67d54SPaul Mackerras } 201306d67d54SPaul Mackerras 201414cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 201514cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 201614cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 201714cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 201814cf11afSPaul Mackerras * them does not change anything */ 201914cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 202014cf11afSPaul Mackerras return -EINVAL; 202114cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 202259dc5bfcSNicholas Piggin if (regs != NULL && (regs->msr & MSR_FP) != 0) { 202359dc5bfcSNicholas Piggin regs_set_return_msr(regs, (regs->msr & ~(MSR_FE0|MSR_FE1)) 202459dc5bfcSNicholas Piggin | tsk->thread.fpexc_mode); 202559dc5bfcSNicholas Piggin } 202614cf11afSPaul Mackerras return 0; 202714cf11afSPaul Mackerras } 202814cf11afSPaul Mackerras 202914cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 203014cf11afSPaul Mackerras { 2031d208e13cSMichael Ellerman unsigned int val = 0; 203214cf11afSPaul Mackerras 2033532ed190SChristophe Leroy if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) { 2034640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 2035640e9225SJoseph Myers /* 2036640e9225SJoseph Myers * When the sticky exception bits are set 2037640e9225SJoseph Myers * directly by userspace, it must call prctl 2038640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 2039640e9225SJoseph Myers * in the existing prctl settings) or 2040640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 2041640e9225SJoseph Myers * the bits being set). <fenv.h> functions 2042640e9225SJoseph Myers * saving and restoring the whole 2043640e9225SJoseph Myers * floating-point environment need to do so 2044640e9225SJoseph Myers * anyway to restore the prctl settings from 2045640e9225SJoseph Myers * the saved environment. 2046640e9225SJoseph Myers */ 2047532ed190SChristophe Leroy #ifdef CONFIG_SPE 2048640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 204914cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 2050532ed190SChristophe Leroy #endif 2051640e9225SJoseph Myers } else 20525e14d21eSKumar Gala return -EINVAL; 2053532ed190SChristophe Leroy } else { 205414cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 2055532ed190SChristophe Leroy } 205614cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 205714cf11afSPaul Mackerras } 205814cf11afSPaul Mackerras 2059fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 2060fab5db97SPaul Mackerras { 2061fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 2062fab5db97SPaul Mackerras 2063fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 2064fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 2065fab5db97SPaul Mackerras return -EINVAL; 2066fab5db97SPaul Mackerras 2067fab5db97SPaul Mackerras if (regs == NULL) 2068fab5db97SPaul Mackerras return -EINVAL; 2069fab5db97SPaul Mackerras 2070fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 207159dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr & ~MSR_LE); 2072fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 207359dc5bfcSNicholas Piggin regs_set_return_msr(regs, regs->msr | MSR_LE); 2074fab5db97SPaul Mackerras else 2075fab5db97SPaul Mackerras return -EINVAL; 2076fab5db97SPaul Mackerras 2077fab5db97SPaul Mackerras return 0; 2078fab5db97SPaul Mackerras } 2079fab5db97SPaul Mackerras 2080fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 2081fab5db97SPaul Mackerras { 2082fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 2083fab5db97SPaul Mackerras unsigned int val; 2084fab5db97SPaul Mackerras 2085fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 2086fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 2087fab5db97SPaul Mackerras return -EINVAL; 2088fab5db97SPaul Mackerras 2089fab5db97SPaul Mackerras if (regs == NULL) 2090fab5db97SPaul Mackerras return -EINVAL; 2091fab5db97SPaul Mackerras 2092fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 2093fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 2094fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 2095fab5db97SPaul Mackerras else 2096fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 2097fab5db97SPaul Mackerras } else 2098fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 2099fab5db97SPaul Mackerras 2100fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 2101fab5db97SPaul Mackerras } 2102fab5db97SPaul Mackerras 2103e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 2104e9370ae1SPaul Mackerras { 2105e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 2106e9370ae1SPaul Mackerras return 0; 2107e9370ae1SPaul Mackerras } 2108e9370ae1SPaul Mackerras 2109e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 2110e9370ae1SPaul Mackerras { 2111e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 2112e9370ae1SPaul Mackerras } 2113e9370ae1SPaul Mackerras 2114bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 2115bb72c481SPaul Mackerras unsigned long nbytes) 2116bb72c481SPaul Mackerras { 2117bb72c481SPaul Mackerras unsigned long stack_page; 2118bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 2119bb72c481SPaul Mackerras 2120*1ee4e350SNicholas Piggin if (!hardirq_ctx[cpu] || !softirq_ctx[cpu]) 2121*1ee4e350SNicholas Piggin return 0; 2122*1ee4e350SNicholas Piggin 2123bb72c481SPaul Mackerras stack_page = (unsigned long)hardirq_ctx[cpu]; 2124a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2125bb72c481SPaul Mackerras return 1; 2126bb72c481SPaul Mackerras 2127bb72c481SPaul Mackerras stack_page = (unsigned long)softirq_ctx[cpu]; 2128a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2129bb72c481SPaul Mackerras return 1; 2130a7916a1dSChristophe Leroy 2131bb72c481SPaul Mackerras return 0; 2132bb72c481SPaul Mackerras } 2133bb72c481SPaul Mackerras 2134a2e36683SNicholas Piggin static inline int valid_emergency_stack(unsigned long sp, struct task_struct *p, 2135a2e36683SNicholas Piggin unsigned long nbytes) 2136a2e36683SNicholas Piggin { 2137a2e36683SNicholas Piggin #ifdef CONFIG_PPC64 2138a2e36683SNicholas Piggin unsigned long stack_page; 2139a2e36683SNicholas Piggin unsigned long cpu = task_cpu(p); 2140a2e36683SNicholas Piggin 21410ecf6a9eSMichael Ellerman if (!paca_ptrs) 21420ecf6a9eSMichael Ellerman return 0; 21430ecf6a9eSMichael Ellerman 2144*1ee4e350SNicholas Piggin if (!paca_ptrs[cpu]->emergency_sp) 2145*1ee4e350SNicholas Piggin return 0; 2146*1ee4e350SNicholas Piggin 2147*1ee4e350SNicholas Piggin # ifdef CONFIG_PPC_BOOK3S_64 2148*1ee4e350SNicholas Piggin if (!paca_ptrs[cpu]->nmi_emergency_sp || !paca_ptrs[cpu]->mc_emergency_sp) 2149*1ee4e350SNicholas Piggin return 0; 2150*1ee4e350SNicholas Piggin #endif 2151*1ee4e350SNicholas Piggin 2152a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->emergency_sp - THREAD_SIZE; 2153a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2154a2e36683SNicholas Piggin return 1; 2155a2e36683SNicholas Piggin 2156a2e36683SNicholas Piggin # ifdef CONFIG_PPC_BOOK3S_64 2157a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->nmi_emergency_sp - THREAD_SIZE; 2158a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2159a2e36683SNicholas Piggin return 1; 2160a2e36683SNicholas Piggin 2161a2e36683SNicholas Piggin stack_page = (unsigned long)paca_ptrs[cpu]->mc_emergency_sp - THREAD_SIZE; 2162a2e36683SNicholas Piggin if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 2163a2e36683SNicholas Piggin return 1; 2164a2e36683SNicholas Piggin # endif 2165a2e36683SNicholas Piggin #endif 2166a2e36683SNicholas Piggin 2167a2e36683SNicholas Piggin return 0; 2168a2e36683SNicholas Piggin } 2169a2e36683SNicholas Piggin 21704cefb0f6SNicholas Piggin /* 21714cefb0f6SNicholas Piggin * validate the stack frame of a particular minimum size, used for when we are 21724cefb0f6SNicholas Piggin * looking at a certain object in the stack beyond the minimum. 21734cefb0f6SNicholas Piggin */ 21744cefb0f6SNicholas Piggin int validate_sp_size(unsigned long sp, struct task_struct *p, 217514cf11afSPaul Mackerras unsigned long nbytes) 217614cf11afSPaul Mackerras { 21770cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 217814cf11afSPaul Mackerras 2179a7916a1dSChristophe Leroy if (sp < THREAD_SIZE) 2180a7916a1dSChristophe Leroy return 0; 2181a7916a1dSChristophe Leroy 2182a7916a1dSChristophe Leroy if (sp >= stack_page && sp <= stack_page + THREAD_SIZE - nbytes) 218314cf11afSPaul Mackerras return 1; 218414cf11afSPaul Mackerras 2185a2e36683SNicholas Piggin if (valid_irq_stack(sp, p, nbytes)) 2186a2e36683SNicholas Piggin return 1; 2187a2e36683SNicholas Piggin 2188a2e36683SNicholas Piggin return valid_emergency_stack(sp, p, nbytes); 218914cf11afSPaul Mackerras } 219014cf11afSPaul Mackerras 21914cefb0f6SNicholas Piggin int validate_sp(unsigned long sp, struct task_struct *p) 21924cefb0f6SNicholas Piggin { 219390f1b431SNicholas Piggin return validate_sp_size(sp, p, STACK_FRAME_MIN_SIZE); 21944cefb0f6SNicholas Piggin } 21952f25194dSAnton Blanchard 219642a20f86SKees Cook static unsigned long ___get_wchan(struct task_struct *p) 219706d67d54SPaul Mackerras { 219806d67d54SPaul Mackerras unsigned long ip, sp; 219906d67d54SPaul Mackerras int count = 0; 220006d67d54SPaul Mackerras 220106d67d54SPaul Mackerras sp = p->thread.ksp; 22024cefb0f6SNicholas Piggin if (!validate_sp(sp, p)) 220306d67d54SPaul Mackerras return 0; 220406d67d54SPaul Mackerras 220506d67d54SPaul Mackerras do { 2206a1b29ba2SHe Ying sp = READ_ONCE_NOCHECK(*(unsigned long *)sp); 22074cefb0f6SNicholas Piggin if (!validate_sp(sp, p) || task_is_running(p)) 220806d67d54SPaul Mackerras return 0; 220906d67d54SPaul Mackerras if (count > 0) { 2210a1b29ba2SHe Ying ip = READ_ONCE_NOCHECK(((unsigned long *)sp)[STACK_FRAME_LR_SAVE]); 221106d67d54SPaul Mackerras if (!in_sched_functions(ip)) 221206d67d54SPaul Mackerras return ip; 221306d67d54SPaul Mackerras } 221406d67d54SPaul Mackerras } while (count++ < 16); 221506d67d54SPaul Mackerras return 0; 221606d67d54SPaul Mackerras } 221706d67d54SPaul Mackerras 221842a20f86SKees Cook unsigned long __get_wchan(struct task_struct *p) 2219018cce33SChristophe Leroy { 2220018cce33SChristophe Leroy unsigned long ret; 2221018cce33SChristophe Leroy 2222018cce33SChristophe Leroy if (!try_get_task_stack(p)) 2223018cce33SChristophe Leroy return 0; 2224018cce33SChristophe Leroy 222542a20f86SKees Cook ret = ___get_wchan(p); 2226018cce33SChristophe Leroy 2227018cce33SChristophe Leroy put_task_stack(p); 2228018cce33SChristophe Leroy 2229018cce33SChristophe Leroy return ret; 2230018cce33SChristophe Leroy } 2231018cce33SChristophe Leroy 2232c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 223314cf11afSPaul Mackerras 2234b112fb91SDaniel Axtens void __no_sanitize_address show_stack(struct task_struct *tsk, 2235b112fb91SDaniel Axtens unsigned long *stack, 2236b9677a8cSDmitry Safonov const char *loglvl) 223714cf11afSPaul Mackerras { 223806d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 223914cf11afSPaul Mackerras int count = 0; 224006d67d54SPaul Mackerras int firstframe = 1; 22417c1bb6bbSNaveen N. Rao unsigned long ret_addr; 22427c1bb6bbSNaveen N. Rao int ftrace_idx = 0; 224314cf11afSPaul Mackerras 224414cf11afSPaul Mackerras if (tsk == NULL) 224514cf11afSPaul Mackerras tsk = current; 2246018cce33SChristophe Leroy 2247018cce33SChristophe Leroy if (!try_get_task_stack(tsk)) 2248018cce33SChristophe Leroy return; 2249018cce33SChristophe Leroy 2250018cce33SChristophe Leroy sp = (unsigned long) stack; 225114cf11afSPaul Mackerras if (sp == 0) { 225214cf11afSPaul Mackerras if (tsk == current) 22533d13e839SMichael Ellerman sp = current_stack_frame(); 225414cf11afSPaul Mackerras else 225514cf11afSPaul Mackerras sp = tsk->thread.ksp; 225614cf11afSPaul Mackerras } 225714cf11afSPaul Mackerras 225806d67d54SPaul Mackerras lr = 0; 2259b9677a8cSDmitry Safonov printk("%sCall Trace:\n", loglvl); 226014cf11afSPaul Mackerras do { 22614cefb0f6SNicholas Piggin if (!validate_sp(sp, tsk)) 2262018cce33SChristophe Leroy break; 226306d67d54SPaul Mackerras 226406d67d54SPaul Mackerras stack = (unsigned long *) sp; 226506d67d54SPaul Mackerras newsp = stack[0]; 2266ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 226706d67d54SPaul Mackerras if (!firstframe || ip != lr) { 2268b9677a8cSDmitry Safonov printk("%s["REG"] ["REG"] %pS", 2269b9677a8cSDmitry Safonov loglvl, sp, ip, (void *)ip); 22707c1bb6bbSNaveen N. Rao ret_addr = ftrace_graph_ret_addr(current, 22717c1bb6bbSNaveen N. Rao &ftrace_idx, ip, stack); 22727c1bb6bbSNaveen N. Rao if (ret_addr != ip) 22737c1bb6bbSNaveen N. Rao pr_cont(" (%pS)", (void *)ret_addr); 227406d67d54SPaul Mackerras if (firstframe) 22759a1f490fSMichael Ellerman pr_cont(" (unreliable)"); 22769a1f490fSMichael Ellerman pr_cont("\n"); 227714cf11afSPaul Mackerras } 227806d67d54SPaul Mackerras firstframe = 0; 227906d67d54SPaul Mackerras 228006d67d54SPaul Mackerras /* 228106d67d54SPaul Mackerras * See if this is an exception frame. 2282c03be0a3SNicholas Piggin * We look for the "regs" marker in the current frame. 22836f291a03SNicholas Piggin * 22846f291a03SNicholas Piggin * STACK_SWITCH_FRAME_SIZE being the smallest frame that 22856f291a03SNicholas Piggin * could hold a pt_regs, if that does not fit then it can't 22866f291a03SNicholas Piggin * have regs. 228706d67d54SPaul Mackerras */ 22884cefb0f6SNicholas Piggin if (validate_sp_size(sp, tsk, STACK_SWITCH_FRAME_SIZE) 2289e856e336SNicholas Piggin && stack[STACK_INT_FRAME_MARKER_LONGS] == STACK_FRAME_REGS_MARKER) { 229006d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 2291c03be0a3SNicholas Piggin (sp + STACK_INT_FRAME_REGS); 2292bf13718bSNicholas Piggin 229306d67d54SPaul Mackerras lr = regs->link; 2294bf13718bSNicholas Piggin printk("%s--- interrupt: %lx at %pS\n", 2295bf13718bSNicholas Piggin loglvl, regs->trap, (void *)regs->nip); 2296bf13718bSNicholas Piggin __show_regs(regs); 2297bf13718bSNicholas Piggin printk("%s--- interrupt: %lx\n", 2298bf13718bSNicholas Piggin loglvl, regs->trap); 2299bf13718bSNicholas Piggin 230006d67d54SPaul Mackerras firstframe = 1; 230114cf11afSPaul Mackerras } 230206d67d54SPaul Mackerras 230306d67d54SPaul Mackerras sp = newsp; 230406d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 2305018cce33SChristophe Leroy 2306018cce33SChristophe Leroy put_task_stack(tsk); 230706d67d54SPaul Mackerras } 230806d67d54SPaul Mackerras 2309cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 2310fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 23110e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 2312cb2c9b27SAnton Blanchard { 2313fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2314d1d0d5ffSNicholas Piggin 2315d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2316d1d0d5ffSNicholas Piggin /* 2317d1d0d5ffSNicholas Piggin * Least significant bit (RUN) is the only writable bit of 2318d1d0d5ffSNicholas Piggin * the CTRL register, so we can avoid mfspr. 2.06 is not the 2319d1d0d5ffSNicholas Piggin * earliest ISA where this is the case, but it's convenient. 2320d1d0d5ffSNicholas Piggin */ 2321d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, CTRL_RUNLATCH); 2322d1d0d5ffSNicholas Piggin } else { 2323cb2c9b27SAnton Blanchard unsigned long ctrl; 2324cb2c9b27SAnton Blanchard 2325d1d0d5ffSNicholas Piggin /* 2326d1d0d5ffSNicholas Piggin * Some architectures (e.g., Cell) have writable fields other 2327d1d0d5ffSNicholas Piggin * than RUN, so do the read-modify-write. 2328d1d0d5ffSNicholas Piggin */ 2329cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2330cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 2331cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2332d1d0d5ffSNicholas Piggin } 2333cb2c9b27SAnton Blanchard 2334fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 2335cb2c9b27SAnton Blanchard } 2336cb2c9b27SAnton Blanchard 2337fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 23380e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 2339cb2c9b27SAnton Blanchard { 2340fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 2341cb2c9b27SAnton Blanchard 2342fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 2343cb2c9b27SAnton Blanchard 2344d1d0d5ffSNicholas Piggin if (cpu_has_feature(CPU_FTR_ARCH_206)) { 2345d1d0d5ffSNicholas Piggin mtspr(SPRN_CTRLT, 0); 2346d1d0d5ffSNicholas Piggin } else { 2347d1d0d5ffSNicholas Piggin unsigned long ctrl; 2348d1d0d5ffSNicholas Piggin 2349cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 2350cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 2351cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 2352cb2c9b27SAnton Blanchard } 2353d1d0d5ffSNicholas Piggin } 2354fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 2355f6a61680SBenjamin Herrenschmidt 2356d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 2357d839088cSAnton Blanchard { 2358d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 23598032bf12SJason A. Donenfeld sp -= get_random_u32_below(PAGE_SIZE); 2360d839088cSAnton Blanchard return sp & ~0xf; 2361d839088cSAnton Blanchard } 2362