114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Derived from "arch/i386/kernel/process.c" 314cf11afSPaul Mackerras * Copyright (C) 1995 Linus Torvalds 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and 614cf11afSPaul Mackerras * Paul Mackerras (paulus@cs.anu.edu.au) 714cf11afSPaul Mackerras * 814cf11afSPaul Mackerras * PowerPC version 914cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 1014cf11afSPaul Mackerras * 1114cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 1214cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 1314cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 1414cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 1514cf11afSPaul Mackerras */ 1614cf11afSPaul Mackerras 1714cf11afSPaul Mackerras #include <linux/errno.h> 1814cf11afSPaul Mackerras #include <linux/sched.h> 1914cf11afSPaul Mackerras #include <linux/kernel.h> 2014cf11afSPaul Mackerras #include <linux/mm.h> 2114cf11afSPaul Mackerras #include <linux/smp.h> 2214cf11afSPaul Mackerras #include <linux/stddef.h> 2314cf11afSPaul Mackerras #include <linux/unistd.h> 2414cf11afSPaul Mackerras #include <linux/ptrace.h> 2514cf11afSPaul Mackerras #include <linux/slab.h> 2614cf11afSPaul Mackerras #include <linux/user.h> 2714cf11afSPaul Mackerras #include <linux/elf.h> 2814cf11afSPaul Mackerras #include <linux/prctl.h> 2914cf11afSPaul Mackerras #include <linux/init_task.h> 304b16f8e2SPaul Gortmaker #include <linux/export.h> 3114cf11afSPaul Mackerras #include <linux/kallsyms.h> 3214cf11afSPaul Mackerras #include <linux/mqueue.h> 3314cf11afSPaul Mackerras #include <linux/hardirq.h> 3406d67d54SPaul Mackerras #include <linux/utsname.h> 356794c782SSteven Rostedt #include <linux/ftrace.h> 3679741dd3SMartin Schwidefsky #include <linux/kernel_stat.h> 37d839088cSAnton Blanchard #include <linux/personality.h> 38d839088cSAnton Blanchard #include <linux/random.h> 395aae8a53SK.Prasad #include <linux/hw_breakpoint.h> 407b051f66SAnton Blanchard #include <linux/uaccess.h> 417f92bc56SDaniel Axtens #include <linux/elf-randomize.h> 4214cf11afSPaul Mackerras 4314cf11afSPaul Mackerras #include <asm/pgtable.h> 4414cf11afSPaul Mackerras #include <asm/io.h> 4514cf11afSPaul Mackerras #include <asm/processor.h> 4614cf11afSPaul Mackerras #include <asm/mmu.h> 4714cf11afSPaul Mackerras #include <asm/prom.h> 4876032de8SMichael Ellerman #include <asm/machdep.h> 49c6622f63SPaul Mackerras #include <asm/time.h> 50ae3a197eSDavid Howells #include <asm/runlatch.h> 51a7f31841SArnd Bergmann #include <asm/syscalls.h> 52ae3a197eSDavid Howells #include <asm/switch_to.h> 53fb09692eSMichael Neuling #include <asm/tm.h> 54ae3a197eSDavid Howells #include <asm/debug.h> 5506d67d54SPaul Mackerras #ifdef CONFIG_PPC64 5606d67d54SPaul Mackerras #include <asm/firmware.h> 5706d67d54SPaul Mackerras #endif 587cedd601SAnton Blanchard #include <asm/code-patching.h> 597f92bc56SDaniel Axtens #include <asm/exec.h> 605d31a96eSMichael Ellerman #include <asm/livepatch.h> 615d31a96eSMichael Ellerman 62d6a61bfcSLuis Machado #include <linux/kprobes.h> 63d6a61bfcSLuis Machado #include <linux/kdebug.h> 6414cf11afSPaul Mackerras 658b3c34cfSMichael Neuling /* Transactional Memory debug */ 668b3c34cfSMichael Neuling #ifdef TM_DEBUG_SW 678b3c34cfSMichael Neuling #define TM_DEBUG(x...) printk(KERN_INFO x) 688b3c34cfSMichael Neuling #else 698b3c34cfSMichael Neuling #define TM_DEBUG(x...) do { } while(0) 708b3c34cfSMichael Neuling #endif 718b3c34cfSMichael Neuling 7214cf11afSPaul Mackerras extern unsigned long _get_SP(void); 7314cf11afSPaul Mackerras 74d31626f7SPaul Mackerras #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 75b86fd2bdSAnton Blanchard static void check_if_tm_restore_required(struct task_struct *tsk) 76d31626f7SPaul Mackerras { 77d31626f7SPaul Mackerras /* 78d31626f7SPaul Mackerras * If we are saving the current thread's registers, and the 79d31626f7SPaul Mackerras * thread is in a transactional state, set the TIF_RESTORE_TM 80d31626f7SPaul Mackerras * bit so that we know to restore the registers before 81d31626f7SPaul Mackerras * returning to userspace. 82d31626f7SPaul Mackerras */ 83d31626f7SPaul Mackerras if (tsk == current && tsk->thread.regs && 84d31626f7SPaul Mackerras MSR_TM_ACTIVE(tsk->thread.regs->msr) && 85d31626f7SPaul Mackerras !test_thread_flag(TIF_RESTORE_TM)) { 86829023dfSAnshuman Khandual tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr; 87d31626f7SPaul Mackerras set_thread_flag(TIF_RESTORE_TM); 88d31626f7SPaul Mackerras } 89d31626f7SPaul Mackerras } 90d31626f7SPaul Mackerras #else 91b86fd2bdSAnton Blanchard static inline void check_if_tm_restore_required(struct task_struct *tsk) { } 92d31626f7SPaul Mackerras #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 93d31626f7SPaul Mackerras 943eb5d588SAnton Blanchard bool strict_msr_control; 953eb5d588SAnton Blanchard EXPORT_SYMBOL(strict_msr_control); 963eb5d588SAnton Blanchard 973eb5d588SAnton Blanchard static int __init enable_strict_msr_control(char *str) 983eb5d588SAnton Blanchard { 993eb5d588SAnton Blanchard strict_msr_control = true; 1003eb5d588SAnton Blanchard pr_info("Enabling strict facility control\n"); 1013eb5d588SAnton Blanchard 1023eb5d588SAnton Blanchard return 0; 1033eb5d588SAnton Blanchard } 1043eb5d588SAnton Blanchard early_param("ppc_strict_facility_enable", enable_strict_msr_control); 1053eb5d588SAnton Blanchard 1063eb5d588SAnton Blanchard void msr_check_and_set(unsigned long bits) 107a0e72cf1SAnton Blanchard { 108a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 109a0e72cf1SAnton Blanchard unsigned long newmsr; 110a0e72cf1SAnton Blanchard 111a0e72cf1SAnton Blanchard newmsr = oldmsr | bits; 112a0e72cf1SAnton Blanchard 113a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 114a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 115a0e72cf1SAnton Blanchard newmsr |= MSR_VSX; 116a0e72cf1SAnton Blanchard #endif 117a0e72cf1SAnton Blanchard 118a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 119a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 120a0e72cf1SAnton Blanchard } 121a0e72cf1SAnton Blanchard 1223eb5d588SAnton Blanchard void __msr_check_and_clear(unsigned long bits) 123a0e72cf1SAnton Blanchard { 124a0e72cf1SAnton Blanchard unsigned long oldmsr = mfmsr(); 125a0e72cf1SAnton Blanchard unsigned long newmsr; 126a0e72cf1SAnton Blanchard 127a0e72cf1SAnton Blanchard newmsr = oldmsr & ~bits; 128a0e72cf1SAnton Blanchard 129a0e72cf1SAnton Blanchard #ifdef CONFIG_VSX 130a0e72cf1SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP)) 131a0e72cf1SAnton Blanchard newmsr &= ~MSR_VSX; 132a0e72cf1SAnton Blanchard #endif 133a0e72cf1SAnton Blanchard 134a0e72cf1SAnton Blanchard if (oldmsr != newmsr) 135a0e72cf1SAnton Blanchard mtmsr_isync(newmsr); 136a0e72cf1SAnton Blanchard } 1373eb5d588SAnton Blanchard EXPORT_SYMBOL(__msr_check_and_clear); 138a0e72cf1SAnton Blanchard 139037f0eedSKevin Hao #ifdef CONFIG_PPC_FPU 1408792468dSCyril Bur void __giveup_fpu(struct task_struct *tsk) 1418792468dSCyril Bur { 1428eb98037SAnton Blanchard unsigned long msr; 1438eb98037SAnton Blanchard 1448792468dSCyril Bur save_fpu(tsk); 1458eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 1468eb98037SAnton Blanchard msr &= ~MSR_FP; 1478792468dSCyril Bur #ifdef CONFIG_VSX 1488792468dSCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 1498eb98037SAnton Blanchard msr &= ~MSR_VSX; 1508792468dSCyril Bur #endif 1518eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 1528792468dSCyril Bur } 1538792468dSCyril Bur 15498da581eSAnton Blanchard void giveup_fpu(struct task_struct *tsk) 15598da581eSAnton Blanchard { 15698da581eSAnton Blanchard check_if_tm_restore_required(tsk); 15798da581eSAnton Blanchard 158a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 15998da581eSAnton Blanchard __giveup_fpu(tsk); 160a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP); 16198da581eSAnton Blanchard } 16298da581eSAnton Blanchard EXPORT_SYMBOL(giveup_fpu); 16398da581eSAnton Blanchard 16414cf11afSPaul Mackerras /* 16514cf11afSPaul Mackerras * Make sure the floating-point register state in the 16614cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 16714cf11afSPaul Mackerras */ 16814cf11afSPaul Mackerras void flush_fp_to_thread(struct task_struct *tsk) 16914cf11afSPaul Mackerras { 17014cf11afSPaul Mackerras if (tsk->thread.regs) { 17114cf11afSPaul Mackerras /* 17214cf11afSPaul Mackerras * We need to disable preemption here because if we didn't, 17314cf11afSPaul Mackerras * another process could get scheduled after the regs->msr 17414cf11afSPaul Mackerras * test but before we have finished saving the FP registers 17514cf11afSPaul Mackerras * to the thread_struct. That process could take over the 17614cf11afSPaul Mackerras * FPU, and then when we get scheduled again we would store 17714cf11afSPaul Mackerras * bogus values for the remaining FP registers. 17814cf11afSPaul Mackerras */ 17914cf11afSPaul Mackerras preempt_disable(); 18014cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_FP) { 18114cf11afSPaul Mackerras /* 18214cf11afSPaul Mackerras * This should only ever be called for current or 18314cf11afSPaul Mackerras * for a stopped child process. Since we save away 184af1bbc3dSAnton Blanchard * the FP register state on context switch, 18514cf11afSPaul Mackerras * there is something wrong if a stopped child appears 18614cf11afSPaul Mackerras * to still have its FP state in the CPU registers. 18714cf11afSPaul Mackerras */ 18814cf11afSPaul Mackerras BUG_ON(tsk != current); 189b86fd2bdSAnton Blanchard giveup_fpu(tsk); 19014cf11afSPaul Mackerras } 19114cf11afSPaul Mackerras preempt_enable(); 19214cf11afSPaul Mackerras } 19314cf11afSPaul Mackerras } 194de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_fp_to_thread); 19514cf11afSPaul Mackerras 19614cf11afSPaul Mackerras void enable_kernel_fp(void) 19714cf11afSPaul Mackerras { 19814cf11afSPaul Mackerras WARN_ON(preemptible()); 19914cf11afSPaul Mackerras 200a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP); 201611b0e5cSAnton Blanchard 202d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) { 203d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 204a0e72cf1SAnton Blanchard __giveup_fpu(current); 205b86fd2bdSAnton Blanchard } 206d64d02ceSAnton Blanchard } 20714cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_fp); 20870fe3d98SCyril Bur 20970fe3d98SCyril Bur static int restore_fp(struct task_struct *tsk) { 21070fe3d98SCyril Bur if (tsk->thread.load_fp) { 21170fe3d98SCyril Bur load_fp_state(¤t->thread.fp_state); 21270fe3d98SCyril Bur current->thread.load_fp++; 21370fe3d98SCyril Bur return 1; 21470fe3d98SCyril Bur } 21570fe3d98SCyril Bur return 0; 21670fe3d98SCyril Bur } 21770fe3d98SCyril Bur #else 21870fe3d98SCyril Bur static int restore_fp(struct task_struct *tsk) { return 0; } 219d1e1cf2eSAnton Blanchard #endif /* CONFIG_PPC_FPU */ 22014cf11afSPaul Mackerras 22114cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 22270fe3d98SCyril Bur #define loadvec(thr) ((thr).load_vec) 22370fe3d98SCyril Bur 2246f515d84SCyril Bur static void __giveup_altivec(struct task_struct *tsk) 2256f515d84SCyril Bur { 2268eb98037SAnton Blanchard unsigned long msr; 2278eb98037SAnton Blanchard 2286f515d84SCyril Bur save_altivec(tsk); 2298eb98037SAnton Blanchard msr = tsk->thread.regs->msr; 2308eb98037SAnton Blanchard msr &= ~MSR_VEC; 2316f515d84SCyril Bur #ifdef CONFIG_VSX 2326f515d84SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) 2338eb98037SAnton Blanchard msr &= ~MSR_VSX; 2346f515d84SCyril Bur #endif 2358eb98037SAnton Blanchard tsk->thread.regs->msr = msr; 2366f515d84SCyril Bur } 2376f515d84SCyril Bur 23898da581eSAnton Blanchard void giveup_altivec(struct task_struct *tsk) 23998da581eSAnton Blanchard { 24098da581eSAnton Blanchard check_if_tm_restore_required(tsk); 24198da581eSAnton Blanchard 242a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 24398da581eSAnton Blanchard __giveup_altivec(tsk); 244a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_VEC); 24598da581eSAnton Blanchard } 24698da581eSAnton Blanchard EXPORT_SYMBOL(giveup_altivec); 24798da581eSAnton Blanchard 24814cf11afSPaul Mackerras void enable_kernel_altivec(void) 24914cf11afSPaul Mackerras { 25014cf11afSPaul Mackerras WARN_ON(preemptible()); 25114cf11afSPaul Mackerras 252a0e72cf1SAnton Blanchard msr_check_and_set(MSR_VEC); 253611b0e5cSAnton Blanchard 254d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VEC)) { 255d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 256a0e72cf1SAnton Blanchard __giveup_altivec(current); 257b86fd2bdSAnton Blanchard } 258d64d02ceSAnton Blanchard } 25914cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_altivec); 26014cf11afSPaul Mackerras 26114cf11afSPaul Mackerras /* 26214cf11afSPaul Mackerras * Make sure the VMX/Altivec register state in the 26314cf11afSPaul Mackerras * the thread_struct is up to date for task tsk. 26414cf11afSPaul Mackerras */ 26514cf11afSPaul Mackerras void flush_altivec_to_thread(struct task_struct *tsk) 26614cf11afSPaul Mackerras { 26714cf11afSPaul Mackerras if (tsk->thread.regs) { 26814cf11afSPaul Mackerras preempt_disable(); 26914cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_VEC) { 27014cf11afSPaul Mackerras BUG_ON(tsk != current); 271b86fd2bdSAnton Blanchard giveup_altivec(tsk); 27214cf11afSPaul Mackerras } 27314cf11afSPaul Mackerras preempt_enable(); 27414cf11afSPaul Mackerras } 27514cf11afSPaul Mackerras } 276de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_altivec_to_thread); 27770fe3d98SCyril Bur 27870fe3d98SCyril Bur static int restore_altivec(struct task_struct *tsk) 27970fe3d98SCyril Bur { 28070fe3d98SCyril Bur if (cpu_has_feature(CPU_FTR_ALTIVEC) && tsk->thread.load_vec) { 28170fe3d98SCyril Bur load_vr_state(&tsk->thread.vr_state); 28270fe3d98SCyril Bur tsk->thread.used_vr = 1; 28370fe3d98SCyril Bur tsk->thread.load_vec++; 28470fe3d98SCyril Bur 28570fe3d98SCyril Bur return 1; 28670fe3d98SCyril Bur } 28770fe3d98SCyril Bur return 0; 28870fe3d98SCyril Bur } 28970fe3d98SCyril Bur #else 29070fe3d98SCyril Bur #define loadvec(thr) 0 29170fe3d98SCyril Bur static inline int restore_altivec(struct task_struct *tsk) { return 0; } 29214cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 29314cf11afSPaul Mackerras 294ce48b210SMichael Neuling #ifdef CONFIG_VSX 295bf6a4d5bSCyril Bur static void __giveup_vsx(struct task_struct *tsk) 296a7d623d4SAnton Blanchard { 297a7d623d4SAnton Blanchard if (tsk->thread.regs->msr & MSR_FP) 298a7d623d4SAnton Blanchard __giveup_fpu(tsk); 299a7d623d4SAnton Blanchard if (tsk->thread.regs->msr & MSR_VEC) 300a7d623d4SAnton Blanchard __giveup_altivec(tsk); 301bf6a4d5bSCyril Bur tsk->thread.regs->msr &= ~MSR_VSX; 302bf6a4d5bSCyril Bur } 303bf6a4d5bSCyril Bur 304bf6a4d5bSCyril Bur static void giveup_vsx(struct task_struct *tsk) 305bf6a4d5bSCyril Bur { 306bf6a4d5bSCyril Bur check_if_tm_restore_required(tsk); 307bf6a4d5bSCyril Bur 308bf6a4d5bSCyril Bur msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 309a7d623d4SAnton Blanchard __giveup_vsx(tsk); 310a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); 311a7d623d4SAnton Blanchard } 312bf6a4d5bSCyril Bur 313bf6a4d5bSCyril Bur static void save_vsx(struct task_struct *tsk) 314bf6a4d5bSCyril Bur { 315bf6a4d5bSCyril Bur if (tsk->thread.regs->msr & MSR_FP) 316bf6a4d5bSCyril Bur save_fpu(tsk); 317bf6a4d5bSCyril Bur if (tsk->thread.regs->msr & MSR_VEC) 318bf6a4d5bSCyril Bur save_altivec(tsk); 319bf6a4d5bSCyril Bur } 320a7d623d4SAnton Blanchard 321ce48b210SMichael Neuling void enable_kernel_vsx(void) 322ce48b210SMichael Neuling { 323ce48b210SMichael Neuling WARN_ON(preemptible()); 324ce48b210SMichael Neuling 325a0e72cf1SAnton Blanchard msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 326611b0e5cSAnton Blanchard 327a0e72cf1SAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) { 328d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 329a0e72cf1SAnton Blanchard if (current->thread.regs->msr & MSR_FP) 330a0e72cf1SAnton Blanchard __giveup_fpu(current); 331a0e72cf1SAnton Blanchard if (current->thread.regs->msr & MSR_VEC) 332a0e72cf1SAnton Blanchard __giveup_altivec(current); 333a0e72cf1SAnton Blanchard __giveup_vsx(current); 334611b0e5cSAnton Blanchard } 335ce48b210SMichael Neuling } 336ce48b210SMichael Neuling EXPORT_SYMBOL(enable_kernel_vsx); 337ce48b210SMichael Neuling 338ce48b210SMichael Neuling void flush_vsx_to_thread(struct task_struct *tsk) 339ce48b210SMichael Neuling { 340ce48b210SMichael Neuling if (tsk->thread.regs) { 341ce48b210SMichael Neuling preempt_disable(); 342ce48b210SMichael Neuling if (tsk->thread.regs->msr & MSR_VSX) { 343ce48b210SMichael Neuling BUG_ON(tsk != current); 344ce48b210SMichael Neuling giveup_vsx(tsk); 345ce48b210SMichael Neuling } 346ce48b210SMichael Neuling preempt_enable(); 347ce48b210SMichael Neuling } 348ce48b210SMichael Neuling } 349de56a948SPaul Mackerras EXPORT_SYMBOL_GPL(flush_vsx_to_thread); 35070fe3d98SCyril Bur 35170fe3d98SCyril Bur static int restore_vsx(struct task_struct *tsk) 35270fe3d98SCyril Bur { 35370fe3d98SCyril Bur if (cpu_has_feature(CPU_FTR_VSX)) { 35470fe3d98SCyril Bur tsk->thread.used_vsr = 1; 35570fe3d98SCyril Bur return 1; 35670fe3d98SCyril Bur } 35770fe3d98SCyril Bur 35870fe3d98SCyril Bur return 0; 35970fe3d98SCyril Bur } 36070fe3d98SCyril Bur #else 36170fe3d98SCyril Bur static inline int restore_vsx(struct task_struct *tsk) { return 0; } 362bf6a4d5bSCyril Bur static inline void save_vsx(struct task_struct *tsk) { } 363ce48b210SMichael Neuling #endif /* CONFIG_VSX */ 364ce48b210SMichael Neuling 36514cf11afSPaul Mackerras #ifdef CONFIG_SPE 36698da581eSAnton Blanchard void giveup_spe(struct task_struct *tsk) 36798da581eSAnton Blanchard { 36898da581eSAnton Blanchard check_if_tm_restore_required(tsk); 36998da581eSAnton Blanchard 370a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 37198da581eSAnton Blanchard __giveup_spe(tsk); 372a0e72cf1SAnton Blanchard msr_check_and_clear(MSR_SPE); 37398da581eSAnton Blanchard } 37498da581eSAnton Blanchard EXPORT_SYMBOL(giveup_spe); 37514cf11afSPaul Mackerras 37614cf11afSPaul Mackerras void enable_kernel_spe(void) 37714cf11afSPaul Mackerras { 37814cf11afSPaul Mackerras WARN_ON(preemptible()); 37914cf11afSPaul Mackerras 380a0e72cf1SAnton Blanchard msr_check_and_set(MSR_SPE); 381611b0e5cSAnton Blanchard 382d64d02ceSAnton Blanchard if (current->thread.regs && (current->thread.regs->msr & MSR_SPE)) { 383d64d02ceSAnton Blanchard check_if_tm_restore_required(current); 384a0e72cf1SAnton Blanchard __giveup_spe(current); 38514cf11afSPaul Mackerras } 386d64d02ceSAnton Blanchard } 38714cf11afSPaul Mackerras EXPORT_SYMBOL(enable_kernel_spe); 38814cf11afSPaul Mackerras 38914cf11afSPaul Mackerras void flush_spe_to_thread(struct task_struct *tsk) 39014cf11afSPaul Mackerras { 39114cf11afSPaul Mackerras if (tsk->thread.regs) { 39214cf11afSPaul Mackerras preempt_disable(); 39314cf11afSPaul Mackerras if (tsk->thread.regs->msr & MSR_SPE) { 39414cf11afSPaul Mackerras BUG_ON(tsk != current); 395685659eeSyu liu tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 3960ee6c15eSKumar Gala giveup_spe(tsk); 39714cf11afSPaul Mackerras } 39814cf11afSPaul Mackerras preempt_enable(); 39914cf11afSPaul Mackerras } 40014cf11afSPaul Mackerras } 40114cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 40214cf11afSPaul Mackerras 403c2085059SAnton Blanchard static unsigned long msr_all_available; 404c2085059SAnton Blanchard 405c2085059SAnton Blanchard static int __init init_msr_all_available(void) 406c2085059SAnton Blanchard { 407c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 408c2085059SAnton Blanchard msr_all_available |= MSR_FP; 409c2085059SAnton Blanchard #endif 410c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 411c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC)) 412c2085059SAnton Blanchard msr_all_available |= MSR_VEC; 413c2085059SAnton Blanchard #endif 414c2085059SAnton Blanchard #ifdef CONFIG_VSX 415c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_VSX)) 416c2085059SAnton Blanchard msr_all_available |= MSR_VSX; 417c2085059SAnton Blanchard #endif 418c2085059SAnton Blanchard #ifdef CONFIG_SPE 419c2085059SAnton Blanchard if (cpu_has_feature(CPU_FTR_SPE)) 420c2085059SAnton Blanchard msr_all_available |= MSR_SPE; 421c2085059SAnton Blanchard #endif 422c2085059SAnton Blanchard 423c2085059SAnton Blanchard return 0; 424c2085059SAnton Blanchard } 425c2085059SAnton Blanchard early_initcall(init_msr_all_available); 426c2085059SAnton Blanchard 427c2085059SAnton Blanchard void giveup_all(struct task_struct *tsk) 428c2085059SAnton Blanchard { 429c2085059SAnton Blanchard unsigned long usermsr; 430c2085059SAnton Blanchard 431c2085059SAnton Blanchard if (!tsk->thread.regs) 432c2085059SAnton Blanchard return; 433c2085059SAnton Blanchard 434c2085059SAnton Blanchard usermsr = tsk->thread.regs->msr; 435c2085059SAnton Blanchard 436c2085059SAnton Blanchard if ((usermsr & msr_all_available) == 0) 437c2085059SAnton Blanchard return; 438c2085059SAnton Blanchard 439c2085059SAnton Blanchard msr_check_and_set(msr_all_available); 440c2085059SAnton Blanchard 441c2085059SAnton Blanchard #ifdef CONFIG_PPC_FPU 442c2085059SAnton Blanchard if (usermsr & MSR_FP) 443c2085059SAnton Blanchard __giveup_fpu(tsk); 444c2085059SAnton Blanchard #endif 445c2085059SAnton Blanchard #ifdef CONFIG_ALTIVEC 446c2085059SAnton Blanchard if (usermsr & MSR_VEC) 447c2085059SAnton Blanchard __giveup_altivec(tsk); 448c2085059SAnton Blanchard #endif 449c2085059SAnton Blanchard #ifdef CONFIG_VSX 450c2085059SAnton Blanchard if (usermsr & MSR_VSX) 451c2085059SAnton Blanchard __giveup_vsx(tsk); 452c2085059SAnton Blanchard #endif 453c2085059SAnton Blanchard #ifdef CONFIG_SPE 454c2085059SAnton Blanchard if (usermsr & MSR_SPE) 455c2085059SAnton Blanchard __giveup_spe(tsk); 456c2085059SAnton Blanchard #endif 457c2085059SAnton Blanchard 458c2085059SAnton Blanchard msr_check_and_clear(msr_all_available); 459c2085059SAnton Blanchard } 460c2085059SAnton Blanchard EXPORT_SYMBOL(giveup_all); 461c2085059SAnton Blanchard 46270fe3d98SCyril Bur void restore_math(struct pt_regs *regs) 46370fe3d98SCyril Bur { 46470fe3d98SCyril Bur unsigned long msr; 46570fe3d98SCyril Bur 46670fe3d98SCyril Bur if (!current->thread.load_fp && !loadvec(current->thread)) 46770fe3d98SCyril Bur return; 46870fe3d98SCyril Bur 46970fe3d98SCyril Bur msr = regs->msr; 47070fe3d98SCyril Bur msr_check_and_set(msr_all_available); 47170fe3d98SCyril Bur 47270fe3d98SCyril Bur /* 47370fe3d98SCyril Bur * Only reload if the bit is not set in the user MSR, the bit BEING set 47470fe3d98SCyril Bur * indicates that the registers are hot 47570fe3d98SCyril Bur */ 47670fe3d98SCyril Bur if ((!(msr & MSR_FP)) && restore_fp(current)) 47770fe3d98SCyril Bur msr |= MSR_FP | current->thread.fpexc_mode; 47870fe3d98SCyril Bur 47970fe3d98SCyril Bur if ((!(msr & MSR_VEC)) && restore_altivec(current)) 48070fe3d98SCyril Bur msr |= MSR_VEC; 48170fe3d98SCyril Bur 48270fe3d98SCyril Bur if ((msr & (MSR_FP | MSR_VEC)) == (MSR_FP | MSR_VEC) && 48370fe3d98SCyril Bur restore_vsx(current)) { 48470fe3d98SCyril Bur msr |= MSR_VSX; 48570fe3d98SCyril Bur } 48670fe3d98SCyril Bur 48770fe3d98SCyril Bur msr_check_and_clear(msr_all_available); 48870fe3d98SCyril Bur 48970fe3d98SCyril Bur regs->msr = msr; 49070fe3d98SCyril Bur } 49170fe3d98SCyril Bur 492de2a20aaSCyril Bur void save_all(struct task_struct *tsk) 493de2a20aaSCyril Bur { 494de2a20aaSCyril Bur unsigned long usermsr; 495de2a20aaSCyril Bur 496de2a20aaSCyril Bur if (!tsk->thread.regs) 497de2a20aaSCyril Bur return; 498de2a20aaSCyril Bur 499de2a20aaSCyril Bur usermsr = tsk->thread.regs->msr; 500de2a20aaSCyril Bur 501de2a20aaSCyril Bur if ((usermsr & msr_all_available) == 0) 502de2a20aaSCyril Bur return; 503de2a20aaSCyril Bur 504de2a20aaSCyril Bur msr_check_and_set(msr_all_available); 505de2a20aaSCyril Bur 506bf6a4d5bSCyril Bur /* 507bf6a4d5bSCyril Bur * Saving the way the register space is in hardware, save_vsx boils 508bf6a4d5bSCyril Bur * down to a save_fpu() and save_altivec() 509bf6a4d5bSCyril Bur */ 510bf6a4d5bSCyril Bur if (usermsr & MSR_VSX) { 511bf6a4d5bSCyril Bur save_vsx(tsk); 512bf6a4d5bSCyril Bur } else { 513de2a20aaSCyril Bur if (usermsr & MSR_FP) 5148792468dSCyril Bur save_fpu(tsk); 515de2a20aaSCyril Bur 516de2a20aaSCyril Bur if (usermsr & MSR_VEC) 5176f515d84SCyril Bur save_altivec(tsk); 518bf6a4d5bSCyril Bur } 519de2a20aaSCyril Bur 520de2a20aaSCyril Bur if (usermsr & MSR_SPE) 521de2a20aaSCyril Bur __giveup_spe(tsk); 522de2a20aaSCyril Bur 523de2a20aaSCyril Bur msr_check_and_clear(msr_all_available); 524de2a20aaSCyril Bur } 525de2a20aaSCyril Bur 526579e633eSAnton Blanchard void flush_all_to_thread(struct task_struct *tsk) 527579e633eSAnton Blanchard { 528579e633eSAnton Blanchard if (tsk->thread.regs) { 529579e633eSAnton Blanchard preempt_disable(); 530579e633eSAnton Blanchard BUG_ON(tsk != current); 531de2a20aaSCyril Bur save_all(tsk); 532579e633eSAnton Blanchard 533579e633eSAnton Blanchard #ifdef CONFIG_SPE 534579e633eSAnton Blanchard if (tsk->thread.regs->msr & MSR_SPE) 535579e633eSAnton Blanchard tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); 536579e633eSAnton Blanchard #endif 537579e633eSAnton Blanchard 538579e633eSAnton Blanchard preempt_enable(); 539579e633eSAnton Blanchard } 540579e633eSAnton Blanchard } 541579e633eSAnton Blanchard EXPORT_SYMBOL(flush_all_to_thread); 542579e633eSAnton Blanchard 5433bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 5443bffb652SDave Kleikamp void do_send_trap(struct pt_regs *regs, unsigned long address, 5453bffb652SDave Kleikamp unsigned long error_code, int signal_code, int breakpt) 5463bffb652SDave Kleikamp { 5473bffb652SDave Kleikamp siginfo_t info; 5483bffb652SDave Kleikamp 54941ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = signal_code; 5503bffb652SDave Kleikamp if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 5513bffb652SDave Kleikamp 11, SIGSEGV) == NOTIFY_STOP) 5523bffb652SDave Kleikamp return; 5533bffb652SDave Kleikamp 5543bffb652SDave Kleikamp /* Deliver the signal to userspace */ 5553bffb652SDave Kleikamp info.si_signo = SIGTRAP; 5563bffb652SDave Kleikamp info.si_errno = breakpt; /* breakpoint or watchpoint id */ 5573bffb652SDave Kleikamp info.si_code = signal_code; 5583bffb652SDave Kleikamp info.si_addr = (void __user *)address; 5593bffb652SDave Kleikamp force_sig_info(SIGTRAP, &info, current); 5603bffb652SDave Kleikamp } 5613bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 5629422de3eSMichael Neuling void do_break (struct pt_regs *regs, unsigned long address, 563d6a61bfcSLuis Machado unsigned long error_code) 564d6a61bfcSLuis Machado { 565d6a61bfcSLuis Machado siginfo_t info; 566d6a61bfcSLuis Machado 56741ab5266SAnanth N Mavinakayanahalli current->thread.trap_nr = TRAP_HWBKPT; 568d6a61bfcSLuis Machado if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, 569d6a61bfcSLuis Machado 11, SIGSEGV) == NOTIFY_STOP) 570d6a61bfcSLuis Machado return; 571d6a61bfcSLuis Machado 5729422de3eSMichael Neuling if (debugger_break_match(regs)) 573d6a61bfcSLuis Machado return; 574d6a61bfcSLuis Machado 5759422de3eSMichael Neuling /* Clear the breakpoint */ 5769422de3eSMichael Neuling hw_breakpoint_disable(); 577d6a61bfcSLuis Machado 578d6a61bfcSLuis Machado /* Deliver the signal to userspace */ 579d6a61bfcSLuis Machado info.si_signo = SIGTRAP; 580d6a61bfcSLuis Machado info.si_errno = 0; 581d6a61bfcSLuis Machado info.si_code = TRAP_HWBKPT; 582d6a61bfcSLuis Machado info.si_addr = (void __user *)address; 583d6a61bfcSLuis Machado force_sig_info(SIGTRAP, &info, current); 584d6a61bfcSLuis Machado } 5853bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 586d6a61bfcSLuis Machado 5879422de3eSMichael Neuling static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk); 588a2ceff5eSMichael Ellerman 5893bffb652SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 5903bffb652SDave Kleikamp /* 5913bffb652SDave Kleikamp * Set the debug registers back to their default "safe" values. 5923bffb652SDave Kleikamp */ 5933bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 5943bffb652SDave Kleikamp { 59551ae8d4aSBharat Bhushan thread->debug.iac1 = thread->debug.iac2 = 0; 5963bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 59751ae8d4aSBharat Bhushan thread->debug.iac3 = thread->debug.iac4 = 0; 5983bffb652SDave Kleikamp #endif 59951ae8d4aSBharat Bhushan thread->debug.dac1 = thread->debug.dac2 = 0; 6003bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 60151ae8d4aSBharat Bhushan thread->debug.dvc1 = thread->debug.dvc2 = 0; 6023bffb652SDave Kleikamp #endif 60351ae8d4aSBharat Bhushan thread->debug.dbcr0 = 0; 6043bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 6053bffb652SDave Kleikamp /* 6063bffb652SDave Kleikamp * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 6073bffb652SDave Kleikamp */ 60851ae8d4aSBharat Bhushan thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | 6093bffb652SDave Kleikamp DBCR1_IAC3US | DBCR1_IAC4US; 6103bffb652SDave Kleikamp /* 6113bffb652SDave Kleikamp * Force Data Address Compare User/Supervisor bits to be User-only 6123bffb652SDave Kleikamp * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 6133bffb652SDave Kleikamp */ 61451ae8d4aSBharat Bhushan thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 6153bffb652SDave Kleikamp #else 61651ae8d4aSBharat Bhushan thread->debug.dbcr1 = 0; 6173bffb652SDave Kleikamp #endif 6183bffb652SDave Kleikamp } 6193bffb652SDave Kleikamp 620f5f97210SScott Wood static void prime_debug_regs(struct debug_reg *debug) 6213bffb652SDave Kleikamp { 6226cecf76bSScott Wood /* 6236cecf76bSScott Wood * We could have inherited MSR_DE from userspace, since 6246cecf76bSScott Wood * it doesn't get cleared on exception entry. Make sure 6256cecf76bSScott Wood * MSR_DE is clear before we enable any debug events. 6266cecf76bSScott Wood */ 6276cecf76bSScott Wood mtmsr(mfmsr() & ~MSR_DE); 6286cecf76bSScott Wood 629f5f97210SScott Wood mtspr(SPRN_IAC1, debug->iac1); 630f5f97210SScott Wood mtspr(SPRN_IAC2, debug->iac2); 6313bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_IACS > 2 632f5f97210SScott Wood mtspr(SPRN_IAC3, debug->iac3); 633f5f97210SScott Wood mtspr(SPRN_IAC4, debug->iac4); 6343bffb652SDave Kleikamp #endif 635f5f97210SScott Wood mtspr(SPRN_DAC1, debug->dac1); 636f5f97210SScott Wood mtspr(SPRN_DAC2, debug->dac2); 6373bffb652SDave Kleikamp #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 638f5f97210SScott Wood mtspr(SPRN_DVC1, debug->dvc1); 639f5f97210SScott Wood mtspr(SPRN_DVC2, debug->dvc2); 6403bffb652SDave Kleikamp #endif 641f5f97210SScott Wood mtspr(SPRN_DBCR0, debug->dbcr0); 642f5f97210SScott Wood mtspr(SPRN_DBCR1, debug->dbcr1); 6433bffb652SDave Kleikamp #ifdef CONFIG_BOOKE 644f5f97210SScott Wood mtspr(SPRN_DBCR2, debug->dbcr2); 6453bffb652SDave Kleikamp #endif 6463bffb652SDave Kleikamp } 6473bffb652SDave Kleikamp /* 6483bffb652SDave Kleikamp * Unless neither the old or new thread are making use of the 6493bffb652SDave Kleikamp * debug registers, set the debug registers from the values 6503bffb652SDave Kleikamp * stored in the new thread. 6513bffb652SDave Kleikamp */ 652f5f97210SScott Wood void switch_booke_debug_regs(struct debug_reg *new_debug) 6533bffb652SDave Kleikamp { 65451ae8d4aSBharat Bhushan if ((current->thread.debug.dbcr0 & DBCR0_IDM) 655f5f97210SScott Wood || (new_debug->dbcr0 & DBCR0_IDM)) 656f5f97210SScott Wood prime_debug_regs(new_debug); 6573bffb652SDave Kleikamp } 6583743c9b8SBharat Bhushan EXPORT_SYMBOL_GPL(switch_booke_debug_regs); 6593bffb652SDave Kleikamp #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 660e0780b72SK.Prasad #ifndef CONFIG_HAVE_HW_BREAKPOINT 6613bffb652SDave Kleikamp static void set_debug_reg_defaults(struct thread_struct *thread) 6623bffb652SDave Kleikamp { 6639422de3eSMichael Neuling thread->hw_brk.address = 0; 6649422de3eSMichael Neuling thread->hw_brk.type = 0; 665b9818c33SMichael Neuling set_breakpoint(&thread->hw_brk); 6663bffb652SDave Kleikamp } 667e0780b72SK.Prasad #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ 6683bffb652SDave Kleikamp #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ 6693bffb652SDave Kleikamp 670172ae2e7SDave Kleikamp #ifdef CONFIG_PPC_ADV_DEBUG_REGS 6719422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 6729422de3eSMichael Neuling { 673c6c9eaceSBenjamin Herrenschmidt mtspr(SPRN_DAC1, dabr); 674221c185dSDave Kleikamp #ifdef CONFIG_PPC_47x 675221c185dSDave Kleikamp isync(); 676221c185dSDave Kleikamp #endif 6779422de3eSMichael Neuling return 0; 6789422de3eSMichael Neuling } 679c6c9eaceSBenjamin Herrenschmidt #elif defined(CONFIG_PPC_BOOK3S) 6809422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 6819422de3eSMichael Neuling { 682cab0af98SMichael Ellerman mtspr(SPRN_DABR, dabr); 68382a9f16aSMichael Neuling if (cpu_has_feature(CPU_FTR_DABRX)) 6844474ef05SMichael Neuling mtspr(SPRN_DABRX, dabrx); 685cab0af98SMichael Ellerman return 0; 68614cf11afSPaul Mackerras } 6879422de3eSMichael Neuling #else 6889422de3eSMichael Neuling static inline int __set_dabr(unsigned long dabr, unsigned long dabrx) 6899422de3eSMichael Neuling { 6909422de3eSMichael Neuling return -EINVAL; 6919422de3eSMichael Neuling } 6929422de3eSMichael Neuling #endif 6939422de3eSMichael Neuling 6949422de3eSMichael Neuling static inline int set_dabr(struct arch_hw_breakpoint *brk) 6959422de3eSMichael Neuling { 6969422de3eSMichael Neuling unsigned long dabr, dabrx; 6979422de3eSMichael Neuling 6989422de3eSMichael Neuling dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR); 6999422de3eSMichael Neuling dabrx = ((brk->type >> 3) & 0x7); 7009422de3eSMichael Neuling 7019422de3eSMichael Neuling if (ppc_md.set_dabr) 7029422de3eSMichael Neuling return ppc_md.set_dabr(dabr, dabrx); 7039422de3eSMichael Neuling 7049422de3eSMichael Neuling return __set_dabr(dabr, dabrx); 7059422de3eSMichael Neuling } 7069422de3eSMichael Neuling 707bf99de36SMichael Neuling static inline int set_dawr(struct arch_hw_breakpoint *brk) 708bf99de36SMichael Neuling { 70905d694eaSMichael Neuling unsigned long dawr, dawrx, mrd; 710bf99de36SMichael Neuling 711bf99de36SMichael Neuling dawr = brk->address; 712bf99de36SMichael Neuling 713bf99de36SMichael Neuling dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \ 714bf99de36SMichael Neuling << (63 - 58); //* read/write bits */ 715bf99de36SMichael Neuling dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \ 716bf99de36SMichael Neuling << (63 - 59); //* translate */ 717bf99de36SMichael Neuling dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \ 718bf99de36SMichael Neuling >> 3; //* PRIM bits */ 71905d694eaSMichael Neuling /* dawr length is stored in field MDR bits 48:53. Matches range in 72005d694eaSMichael Neuling doublewords (64 bits) baised by -1 eg. 0b000000=1DW and 72105d694eaSMichael Neuling 0b111111=64DW. 72205d694eaSMichael Neuling brk->len is in bytes. 72305d694eaSMichael Neuling This aligns up to double word size, shifts and does the bias. 72405d694eaSMichael Neuling */ 72505d694eaSMichael Neuling mrd = ((brk->len + 7) >> 3) - 1; 72605d694eaSMichael Neuling dawrx |= (mrd & 0x3f) << (63 - 53); 727bf99de36SMichael Neuling 728bf99de36SMichael Neuling if (ppc_md.set_dawr) 729bf99de36SMichael Neuling return ppc_md.set_dawr(dawr, dawrx); 730bf99de36SMichael Neuling mtspr(SPRN_DAWR, dawr); 731bf99de36SMichael Neuling mtspr(SPRN_DAWRX, dawrx); 732bf99de36SMichael Neuling return 0; 733bf99de36SMichael Neuling } 734bf99de36SMichael Neuling 73521f58507SPaul Gortmaker void __set_breakpoint(struct arch_hw_breakpoint *brk) 7369422de3eSMichael Neuling { 73769111bacSChristoph Lameter memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk)); 7389422de3eSMichael Neuling 739bf99de36SMichael Neuling if (cpu_has_feature(CPU_FTR_DAWR)) 74004c32a51SPaul Gortmaker set_dawr(brk); 74104c32a51SPaul Gortmaker else 74204c32a51SPaul Gortmaker set_dabr(brk); 7439422de3eSMichael Neuling } 74414cf11afSPaul Mackerras 74521f58507SPaul Gortmaker void set_breakpoint(struct arch_hw_breakpoint *brk) 74621f58507SPaul Gortmaker { 74721f58507SPaul Gortmaker preempt_disable(); 74821f58507SPaul Gortmaker __set_breakpoint(brk); 74921f58507SPaul Gortmaker preempt_enable(); 75021f58507SPaul Gortmaker } 75121f58507SPaul Gortmaker 75206d67d54SPaul Mackerras #ifdef CONFIG_PPC64 75306d67d54SPaul Mackerras DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array); 75406d67d54SPaul Mackerras #endif 75514cf11afSPaul Mackerras 7569422de3eSMichael Neuling static inline bool hw_brk_match(struct arch_hw_breakpoint *a, 7579422de3eSMichael Neuling struct arch_hw_breakpoint *b) 7589422de3eSMichael Neuling { 7599422de3eSMichael Neuling if (a->address != b->address) 7609422de3eSMichael Neuling return false; 7619422de3eSMichael Neuling if (a->type != b->type) 7629422de3eSMichael Neuling return false; 7639422de3eSMichael Neuling if (a->len != b->len) 7649422de3eSMichael Neuling return false; 7659422de3eSMichael Neuling return true; 7669422de3eSMichael Neuling } 767d31626f7SPaul Mackerras 768fb09692eSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 769d31626f7SPaul Mackerras static void tm_reclaim_thread(struct thread_struct *thr, 770d31626f7SPaul Mackerras struct thread_info *ti, uint8_t cause) 771d31626f7SPaul Mackerras { 772d31626f7SPaul Mackerras unsigned long msr_diff = 0; 773d31626f7SPaul Mackerras 774d31626f7SPaul Mackerras /* 775d31626f7SPaul Mackerras * If FP/VSX registers have been already saved to the 776d31626f7SPaul Mackerras * thread_struct, move them to the transact_fp array. 777d31626f7SPaul Mackerras * We clear the TIF_RESTORE_TM bit since after the reclaim 778d31626f7SPaul Mackerras * the thread will no longer be transactional. 779d31626f7SPaul Mackerras */ 780d31626f7SPaul Mackerras if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) { 781829023dfSAnshuman Khandual msr_diff = thr->ckpt_regs.msr & ~thr->regs->msr; 782d31626f7SPaul Mackerras if (msr_diff & MSR_FP) 783d31626f7SPaul Mackerras memcpy(&thr->transact_fp, &thr->fp_state, 784d31626f7SPaul Mackerras sizeof(struct thread_fp_state)); 785d31626f7SPaul Mackerras if (msr_diff & MSR_VEC) 786d31626f7SPaul Mackerras memcpy(&thr->transact_vr, &thr->vr_state, 787d31626f7SPaul Mackerras sizeof(struct thread_vr_state)); 788d31626f7SPaul Mackerras clear_ti_thread_flag(ti, TIF_RESTORE_TM); 789d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX | MSR_FE0 | MSR_FE1; 790d31626f7SPaul Mackerras } 791d31626f7SPaul Mackerras 7927f821fc9SMichael Neuling /* 7937f821fc9SMichael Neuling * Use the current MSR TM suspended bit to track if we have 7947f821fc9SMichael Neuling * checkpointed state outstanding. 7957f821fc9SMichael Neuling * On signal delivery, we'd normally reclaim the checkpointed 7967f821fc9SMichael Neuling * state to obtain stack pointer (see:get_tm_stackpointer()). 7977f821fc9SMichael Neuling * This will then directly return to userspace without going 7987f821fc9SMichael Neuling * through __switch_to(). However, if the stack frame is bad, 7997f821fc9SMichael Neuling * we need to exit this thread which calls __switch_to() which 8007f821fc9SMichael Neuling * will again attempt to reclaim the already saved tm state. 8017f821fc9SMichael Neuling * Hence we need to check that we've not already reclaimed 8027f821fc9SMichael Neuling * this state. 8037f821fc9SMichael Neuling * We do this using the current MSR, rather tracking it in 8047f821fc9SMichael Neuling * some specific thread_struct bit, as it has the additional 805*027dfac6SMichael Ellerman * benefit of checking for a potential TM bad thing exception. 8067f821fc9SMichael Neuling */ 8077f821fc9SMichael Neuling if (!MSR_TM_SUSPENDED(mfmsr())) 8087f821fc9SMichael Neuling return; 8097f821fc9SMichael Neuling 810d31626f7SPaul Mackerras tm_reclaim(thr, thr->regs->msr, cause); 811d31626f7SPaul Mackerras 812d31626f7SPaul Mackerras /* Having done the reclaim, we now have the checkpointed 813d31626f7SPaul Mackerras * FP/VSX values in the registers. These might be valid 814d31626f7SPaul Mackerras * even if we have previously called enable_kernel_fp() or 815d31626f7SPaul Mackerras * flush_fp_to_thread(), so update thr->regs->msr to 816d31626f7SPaul Mackerras * indicate their current validity. 817d31626f7SPaul Mackerras */ 818d31626f7SPaul Mackerras thr->regs->msr |= msr_diff; 819d31626f7SPaul Mackerras } 820d31626f7SPaul Mackerras 821d31626f7SPaul Mackerras void tm_reclaim_current(uint8_t cause) 822d31626f7SPaul Mackerras { 823d31626f7SPaul Mackerras tm_enable(); 824d31626f7SPaul Mackerras tm_reclaim_thread(¤t->thread, current_thread_info(), cause); 825d31626f7SPaul Mackerras } 826d31626f7SPaul Mackerras 827fb09692eSMichael Neuling static inline void tm_reclaim_task(struct task_struct *tsk) 828fb09692eSMichael Neuling { 829fb09692eSMichael Neuling /* We have to work out if we're switching from/to a task that's in the 830fb09692eSMichael Neuling * middle of a transaction. 831fb09692eSMichael Neuling * 832fb09692eSMichael Neuling * In switching we need to maintain a 2nd register state as 833fb09692eSMichael Neuling * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the 834fb09692eSMichael Neuling * checkpointed (tbegin) state in ckpt_regs and saves the transactional 835fb09692eSMichael Neuling * (current) FPRs into oldtask->thread.transact_fpr[]. 836fb09692eSMichael Neuling * 837fb09692eSMichael Neuling * We also context switch (save) TFHAR/TEXASR/TFIAR in here. 838fb09692eSMichael Neuling */ 839fb09692eSMichael Neuling struct thread_struct *thr = &tsk->thread; 840fb09692eSMichael Neuling 841fb09692eSMichael Neuling if (!thr->regs) 842fb09692eSMichael Neuling return; 843fb09692eSMichael Neuling 844fb09692eSMichael Neuling if (!MSR_TM_ACTIVE(thr->regs->msr)) 845fb09692eSMichael Neuling goto out_and_saveregs; 846fb09692eSMichael Neuling 847fb09692eSMichael Neuling /* Stash the original thread MSR, as giveup_fpu et al will 848fb09692eSMichael Neuling * modify it. We hold onto it to see whether the task used 849d31626f7SPaul Mackerras * FP & vector regs. If the TIF_RESTORE_TM flag is set, 850829023dfSAnshuman Khandual * ckpt_regs.msr is already set. 851fb09692eSMichael Neuling */ 852d31626f7SPaul Mackerras if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM)) 853829023dfSAnshuman Khandual thr->ckpt_regs.msr = thr->regs->msr; 854fb09692eSMichael Neuling 855fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, " 856fb09692eSMichael Neuling "ccr=%lx, msr=%lx, trap=%lx)\n", 857fb09692eSMichael Neuling tsk->pid, thr->regs->nip, 858fb09692eSMichael Neuling thr->regs->ccr, thr->regs->msr, 859fb09692eSMichael Neuling thr->regs->trap); 860fb09692eSMichael Neuling 861d31626f7SPaul Mackerras tm_reclaim_thread(thr, task_thread_info(tsk), TM_CAUSE_RESCHED); 862fb09692eSMichael Neuling 863fb09692eSMichael Neuling TM_DEBUG("--- tm_reclaim on pid %d complete\n", 864fb09692eSMichael Neuling tsk->pid); 865fb09692eSMichael Neuling 866fb09692eSMichael Neuling out_and_saveregs: 867fb09692eSMichael Neuling /* Always save the regs here, even if a transaction's not active. 868fb09692eSMichael Neuling * This context-switches a thread's TM info SPRs. We do it here to 869fb09692eSMichael Neuling * be consistent with the restore path (in recheckpoint) which 870fb09692eSMichael Neuling * cannot happen later in _switch(). 871fb09692eSMichael Neuling */ 872fb09692eSMichael Neuling tm_save_sprs(thr); 873fb09692eSMichael Neuling } 874fb09692eSMichael Neuling 875e6b8fd02SMichael Neuling extern void __tm_recheckpoint(struct thread_struct *thread, 876e6b8fd02SMichael Neuling unsigned long orig_msr); 877e6b8fd02SMichael Neuling 878e6b8fd02SMichael Neuling void tm_recheckpoint(struct thread_struct *thread, 879e6b8fd02SMichael Neuling unsigned long orig_msr) 880e6b8fd02SMichael Neuling { 881e6b8fd02SMichael Neuling unsigned long flags; 882e6b8fd02SMichael Neuling 883e6b8fd02SMichael Neuling /* We really can't be interrupted here as the TEXASR registers can't 884e6b8fd02SMichael Neuling * change and later in the trecheckpoint code, we have a userspace R1. 885e6b8fd02SMichael Neuling * So let's hard disable over this region. 886e6b8fd02SMichael Neuling */ 887e6b8fd02SMichael Neuling local_irq_save(flags); 888e6b8fd02SMichael Neuling hard_irq_disable(); 889e6b8fd02SMichael Neuling 890e6b8fd02SMichael Neuling /* The TM SPRs are restored here, so that TEXASR.FS can be set 891e6b8fd02SMichael Neuling * before the trecheckpoint and no explosion occurs. 892e6b8fd02SMichael Neuling */ 893e6b8fd02SMichael Neuling tm_restore_sprs(thread); 894e6b8fd02SMichael Neuling 895e6b8fd02SMichael Neuling __tm_recheckpoint(thread, orig_msr); 896e6b8fd02SMichael Neuling 897e6b8fd02SMichael Neuling local_irq_restore(flags); 898e6b8fd02SMichael Neuling } 899e6b8fd02SMichael Neuling 900bc2a9408SMichael Neuling static inline void tm_recheckpoint_new_task(struct task_struct *new) 901fb09692eSMichael Neuling { 902fb09692eSMichael Neuling unsigned long msr; 903fb09692eSMichael Neuling 904fb09692eSMichael Neuling if (!cpu_has_feature(CPU_FTR_TM)) 905fb09692eSMichael Neuling return; 906fb09692eSMichael Neuling 907fb09692eSMichael Neuling /* Recheckpoint the registers of the thread we're about to switch to. 908fb09692eSMichael Neuling * 909fb09692eSMichael Neuling * If the task was using FP, we non-lazily reload both the original and 910fb09692eSMichael Neuling * the speculative FP register states. This is because the kernel 911fb09692eSMichael Neuling * doesn't see if/when a TM rollback occurs, so if we take an FP 912fb09692eSMichael Neuling * unavoidable later, we are unable to determine which set of FP regs 913fb09692eSMichael Neuling * need to be restored. 914fb09692eSMichael Neuling */ 915fb09692eSMichael Neuling if (!new->thread.regs) 916fb09692eSMichael Neuling return; 917fb09692eSMichael Neuling 918e6b8fd02SMichael Neuling if (!MSR_TM_ACTIVE(new->thread.regs->msr)){ 919fb09692eSMichael Neuling tm_restore_sprs(&new->thread); 920fb09692eSMichael Neuling return; 921e6b8fd02SMichael Neuling } 922829023dfSAnshuman Khandual msr = new->thread.ckpt_regs.msr; 923fb09692eSMichael Neuling /* Recheckpoint to restore original checkpointed register state. */ 924fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d " 925fb09692eSMichael Neuling "(new->msr 0x%lx, new->origmsr 0x%lx)\n", 926fb09692eSMichael Neuling new->pid, new->thread.regs->msr, msr); 927fb09692eSMichael Neuling 928fb09692eSMichael Neuling /* This loads the checkpointed FP/VEC state, if used */ 929fb09692eSMichael Neuling tm_recheckpoint(&new->thread, msr); 930fb09692eSMichael Neuling 931fb09692eSMichael Neuling /* This loads the speculative FP/VEC state, if used */ 932fb09692eSMichael Neuling if (msr & MSR_FP) { 933fb09692eSMichael Neuling do_load_up_transact_fpu(&new->thread); 934fb09692eSMichael Neuling new->thread.regs->msr |= 935fb09692eSMichael Neuling (MSR_FP | new->thread.fpexc_mode); 936fb09692eSMichael Neuling } 937f110c0c1SMichael Neuling #ifdef CONFIG_ALTIVEC 938fb09692eSMichael Neuling if (msr & MSR_VEC) { 939fb09692eSMichael Neuling do_load_up_transact_altivec(&new->thread); 940fb09692eSMichael Neuling new->thread.regs->msr |= MSR_VEC; 941fb09692eSMichael Neuling } 942f110c0c1SMichael Neuling #endif 943fb09692eSMichael Neuling /* We may as well turn on VSX too since all the state is restored now */ 944fb09692eSMichael Neuling if (msr & MSR_VSX) 945fb09692eSMichael Neuling new->thread.regs->msr |= MSR_VSX; 946fb09692eSMichael Neuling 947fb09692eSMichael Neuling TM_DEBUG("*** tm_recheckpoint of pid %d complete " 948fb09692eSMichael Neuling "(kernel msr 0x%lx)\n", 949fb09692eSMichael Neuling new->pid, mfmsr()); 950fb09692eSMichael Neuling } 951fb09692eSMichael Neuling 952fb09692eSMichael Neuling static inline void __switch_to_tm(struct task_struct *prev) 953fb09692eSMichael Neuling { 954fb09692eSMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) { 955fb09692eSMichael Neuling tm_enable(); 956fb09692eSMichael Neuling tm_reclaim_task(prev); 957fb09692eSMichael Neuling } 958fb09692eSMichael Neuling } 959d31626f7SPaul Mackerras 960d31626f7SPaul Mackerras /* 961d31626f7SPaul Mackerras * This is called if we are on the way out to userspace and the 962d31626f7SPaul Mackerras * TIF_RESTORE_TM flag is set. It checks if we need to reload 963d31626f7SPaul Mackerras * FP and/or vector state and does so if necessary. 964d31626f7SPaul Mackerras * If userspace is inside a transaction (whether active or 965d31626f7SPaul Mackerras * suspended) and FP/VMX/VSX instructions have ever been enabled 966d31626f7SPaul Mackerras * inside that transaction, then we have to keep them enabled 967d31626f7SPaul Mackerras * and keep the FP/VMX/VSX state loaded while ever the transaction 968d31626f7SPaul Mackerras * continues. The reason is that if we didn't, and subsequently 969d31626f7SPaul Mackerras * got a FP/VMX/VSX unavailable interrupt inside a transaction, 970d31626f7SPaul Mackerras * we don't know whether it's the same transaction, and thus we 971d31626f7SPaul Mackerras * don't know which of the checkpointed state and the transactional 972d31626f7SPaul Mackerras * state to use. 973d31626f7SPaul Mackerras */ 974d31626f7SPaul Mackerras void restore_tm_state(struct pt_regs *regs) 975d31626f7SPaul Mackerras { 976d31626f7SPaul Mackerras unsigned long msr_diff; 977d31626f7SPaul Mackerras 978d31626f7SPaul Mackerras clear_thread_flag(TIF_RESTORE_TM); 979d31626f7SPaul Mackerras if (!MSR_TM_ACTIVE(regs->msr)) 980d31626f7SPaul Mackerras return; 981d31626f7SPaul Mackerras 982829023dfSAnshuman Khandual msr_diff = current->thread.ckpt_regs.msr & ~regs->msr; 983d31626f7SPaul Mackerras msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; 98470fe3d98SCyril Bur 98570fe3d98SCyril Bur restore_math(regs); 98670fe3d98SCyril Bur 987d31626f7SPaul Mackerras regs->msr |= msr_diff; 988d31626f7SPaul Mackerras } 989d31626f7SPaul Mackerras 990fb09692eSMichael Neuling #else 991fb09692eSMichael Neuling #define tm_recheckpoint_new_task(new) 992fb09692eSMichael Neuling #define __switch_to_tm(prev) 993fb09692eSMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 9949422de3eSMichael Neuling 995152d523eSAnton Blanchard static inline void save_sprs(struct thread_struct *t) 996152d523eSAnton Blanchard { 997152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 99801d7c2a2SOliver O'Halloran if (cpu_has_feature(CPU_FTR_ALTIVEC)) 999152d523eSAnton Blanchard t->vrsave = mfspr(SPRN_VRSAVE); 1000152d523eSAnton Blanchard #endif 1001152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1002152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) 1003152d523eSAnton Blanchard t->dscr = mfspr(SPRN_DSCR); 1004152d523eSAnton Blanchard 1005152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1006152d523eSAnton Blanchard t->bescr = mfspr(SPRN_BESCR); 1007152d523eSAnton Blanchard t->ebbhr = mfspr(SPRN_EBBHR); 1008152d523eSAnton Blanchard t->ebbrr = mfspr(SPRN_EBBRR); 1009152d523eSAnton Blanchard 1010152d523eSAnton Blanchard t->fscr = mfspr(SPRN_FSCR); 1011152d523eSAnton Blanchard 1012152d523eSAnton Blanchard /* 1013152d523eSAnton Blanchard * Note that the TAR is not available for use in the kernel. 1014152d523eSAnton Blanchard * (To provide this, the TAR should be backed up/restored on 1015152d523eSAnton Blanchard * exception entry/exit instead, and be in pt_regs. FIXME, 1016152d523eSAnton Blanchard * this should be in pt_regs anyway (for debug).) 1017152d523eSAnton Blanchard */ 1018152d523eSAnton Blanchard t->tar = mfspr(SPRN_TAR); 1019152d523eSAnton Blanchard } 1020152d523eSAnton Blanchard #endif 1021152d523eSAnton Blanchard } 1022152d523eSAnton Blanchard 1023152d523eSAnton Blanchard static inline void restore_sprs(struct thread_struct *old_thread, 1024152d523eSAnton Blanchard struct thread_struct *new_thread) 1025152d523eSAnton Blanchard { 1026152d523eSAnton Blanchard #ifdef CONFIG_ALTIVEC 1027152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ALTIVEC) && 1028152d523eSAnton Blanchard old_thread->vrsave != new_thread->vrsave) 1029152d523eSAnton Blanchard mtspr(SPRN_VRSAVE, new_thread->vrsave); 1030152d523eSAnton Blanchard #endif 1031152d523eSAnton Blanchard #ifdef CONFIG_PPC_BOOK3S_64 1032152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_DSCR)) { 1033152d523eSAnton Blanchard u64 dscr = get_paca()->dscr_default; 1034152d523eSAnton Blanchard u64 fscr = old_thread->fscr & ~FSCR_DSCR; 1035152d523eSAnton Blanchard 1036152d523eSAnton Blanchard if (new_thread->dscr_inherit) { 1037152d523eSAnton Blanchard dscr = new_thread->dscr; 1038152d523eSAnton Blanchard fscr |= FSCR_DSCR; 1039152d523eSAnton Blanchard } 1040152d523eSAnton Blanchard 1041152d523eSAnton Blanchard if (old_thread->dscr != dscr) 1042152d523eSAnton Blanchard mtspr(SPRN_DSCR, dscr); 1043152d523eSAnton Blanchard 1044152d523eSAnton Blanchard if (old_thread->fscr != fscr) 1045152d523eSAnton Blanchard mtspr(SPRN_FSCR, fscr); 1046152d523eSAnton Blanchard } 1047152d523eSAnton Blanchard 1048152d523eSAnton Blanchard if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 1049152d523eSAnton Blanchard if (old_thread->bescr != new_thread->bescr) 1050152d523eSAnton Blanchard mtspr(SPRN_BESCR, new_thread->bescr); 1051152d523eSAnton Blanchard if (old_thread->ebbhr != new_thread->ebbhr) 1052152d523eSAnton Blanchard mtspr(SPRN_EBBHR, new_thread->ebbhr); 1053152d523eSAnton Blanchard if (old_thread->ebbrr != new_thread->ebbrr) 1054152d523eSAnton Blanchard mtspr(SPRN_EBBRR, new_thread->ebbrr); 1055152d523eSAnton Blanchard 1056152d523eSAnton Blanchard if (old_thread->tar != new_thread->tar) 1057152d523eSAnton Blanchard mtspr(SPRN_TAR, new_thread->tar); 1058152d523eSAnton Blanchard } 1059152d523eSAnton Blanchard #endif 1060152d523eSAnton Blanchard } 1061152d523eSAnton Blanchard 106214cf11afSPaul Mackerras struct task_struct *__switch_to(struct task_struct *prev, 106314cf11afSPaul Mackerras struct task_struct *new) 106414cf11afSPaul Mackerras { 106514cf11afSPaul Mackerras struct thread_struct *new_thread, *old_thread; 106614cf11afSPaul Mackerras struct task_struct *last; 1067d6bf29b4SPeter Zijlstra #ifdef CONFIG_PPC_BOOK3S_64 1068d6bf29b4SPeter Zijlstra struct ppc64_tlb_batch *batch; 1069d6bf29b4SPeter Zijlstra #endif 107014cf11afSPaul Mackerras 1071152d523eSAnton Blanchard new_thread = &new->thread; 1072152d523eSAnton Blanchard old_thread = ¤t->thread; 1073152d523eSAnton Blanchard 10747ba5fef7SMichael Neuling WARN_ON(!irqs_disabled()); 10757ba5fef7SMichael Neuling 107606d67d54SPaul Mackerras #ifdef CONFIG_PPC64 107706d67d54SPaul Mackerras /* 107806d67d54SPaul Mackerras * Collect processor utilization data per process 107906d67d54SPaul Mackerras */ 108006d67d54SPaul Mackerras if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 108169111bacSChristoph Lameter struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array); 108206d67d54SPaul Mackerras long unsigned start_tb, current_tb; 108306d67d54SPaul Mackerras start_tb = old_thread->start_tb; 108406d67d54SPaul Mackerras cu->current_tb = current_tb = mfspr(SPRN_PURR); 108506d67d54SPaul Mackerras old_thread->accum_tb += (current_tb - start_tb); 108606d67d54SPaul Mackerras new_thread->start_tb = current_tb; 108706d67d54SPaul Mackerras } 1088d6bf29b4SPeter Zijlstra #endif /* CONFIG_PPC64 */ 1089d6bf29b4SPeter Zijlstra 1090caca285eSAneesh Kumar K.V #ifdef CONFIG_PPC_STD_MMU_64 109169111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1092d6bf29b4SPeter Zijlstra if (batch->active) { 1093d6bf29b4SPeter Zijlstra current_thread_info()->local_flags |= _TLF_LAZY_MMU; 1094d6bf29b4SPeter Zijlstra if (batch->index) 1095d6bf29b4SPeter Zijlstra __flush_tlb_pending(batch); 1096d6bf29b4SPeter Zijlstra batch->active = 0; 1097d6bf29b4SPeter Zijlstra } 1098caca285eSAneesh Kumar K.V #endif /* CONFIG_PPC_STD_MMU_64 */ 109906d67d54SPaul Mackerras 1100f3d885ccSAnton Blanchard #ifdef CONFIG_PPC_ADV_DEBUG_REGS 1101f3d885ccSAnton Blanchard switch_booke_debug_regs(&new->thread.debug); 1102f3d885ccSAnton Blanchard #else 1103f3d885ccSAnton Blanchard /* 1104f3d885ccSAnton Blanchard * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would 1105f3d885ccSAnton Blanchard * schedule DABR 1106f3d885ccSAnton Blanchard */ 1107f3d885ccSAnton Blanchard #ifndef CONFIG_HAVE_HW_BREAKPOINT 1108f3d885ccSAnton Blanchard if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk))) 1109f3d885ccSAnton Blanchard __set_breakpoint(&new->thread.hw_brk); 1110f3d885ccSAnton Blanchard #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1111f3d885ccSAnton Blanchard #endif 1112f3d885ccSAnton Blanchard 1113f3d885ccSAnton Blanchard /* 1114f3d885ccSAnton Blanchard * We need to save SPRs before treclaim/trecheckpoint as these will 1115f3d885ccSAnton Blanchard * change a number of them. 1116f3d885ccSAnton Blanchard */ 1117f3d885ccSAnton Blanchard save_sprs(&prev->thread); 1118f3d885ccSAnton Blanchard 1119f3d885ccSAnton Blanchard __switch_to_tm(prev); 1120f3d885ccSAnton Blanchard 1121f3d885ccSAnton Blanchard /* Save FPU, Altivec, VSX and SPE state */ 1122f3d885ccSAnton Blanchard giveup_all(prev); 1123f3d885ccSAnton Blanchard 112444387e9fSAnton Blanchard /* 112544387e9fSAnton Blanchard * We can't take a PMU exception inside _switch() since there is a 112644387e9fSAnton Blanchard * window where the kernel stack SLB and the kernel stack are out 112744387e9fSAnton Blanchard * of sync. Hard disable here. 112844387e9fSAnton Blanchard */ 112944387e9fSAnton Blanchard hard_irq_disable(); 1130bc2a9408SMichael Neuling 1131bc2a9408SMichael Neuling tm_recheckpoint_new_task(new); 1132bc2a9408SMichael Neuling 113320dbe670SAnton Blanchard /* 113420dbe670SAnton Blanchard * Call restore_sprs() before calling _switch(). If we move it after 113520dbe670SAnton Blanchard * _switch() then we miss out on calling it for new tasks. The reason 113620dbe670SAnton Blanchard * for this is we manually create a stack frame for new tasks that 113720dbe670SAnton Blanchard * directly returns through ret_from_fork() or 113820dbe670SAnton Blanchard * ret_from_kernel_thread(). See copy_thread() for details. 113920dbe670SAnton Blanchard */ 1140f3d885ccSAnton Blanchard restore_sprs(old_thread, new_thread); 1141f3d885ccSAnton Blanchard 114220dbe670SAnton Blanchard last = _switch(old_thread, new_thread); 114320dbe670SAnton Blanchard 1144caca285eSAneesh Kumar K.V #ifdef CONFIG_PPC_STD_MMU_64 1145d6bf29b4SPeter Zijlstra if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 1146d6bf29b4SPeter Zijlstra current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 114769111bacSChristoph Lameter batch = this_cpu_ptr(&ppc64_tlb_batch); 1148d6bf29b4SPeter Zijlstra batch->active = 1; 1149d6bf29b4SPeter Zijlstra } 115070fe3d98SCyril Bur 115170fe3d98SCyril Bur if (current_thread_info()->task->thread.regs) 115270fe3d98SCyril Bur restore_math(current_thread_info()->task->thread.regs); 1153caca285eSAneesh Kumar K.V #endif /* CONFIG_PPC_STD_MMU_64 */ 1154d6bf29b4SPeter Zijlstra 115514cf11afSPaul Mackerras return last; 115614cf11afSPaul Mackerras } 115714cf11afSPaul Mackerras 115806d67d54SPaul Mackerras static int instructions_to_print = 16; 115906d67d54SPaul Mackerras 116006d67d54SPaul Mackerras static void show_instructions(struct pt_regs *regs) 116106d67d54SPaul Mackerras { 116206d67d54SPaul Mackerras int i; 116306d67d54SPaul Mackerras unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 * 116406d67d54SPaul Mackerras sizeof(int)); 116506d67d54SPaul Mackerras 116606d67d54SPaul Mackerras printk("Instruction dump:"); 116706d67d54SPaul Mackerras 116806d67d54SPaul Mackerras for (i = 0; i < instructions_to_print; i++) { 116906d67d54SPaul Mackerras int instr; 117006d67d54SPaul Mackerras 117106d67d54SPaul Mackerras if (!(i % 8)) 117206d67d54SPaul Mackerras printk("\n"); 117306d67d54SPaul Mackerras 11740de2d820SScott Wood #if !defined(CONFIG_BOOKE) 11750de2d820SScott Wood /* If executing with the IMMU off, adjust pc rather 11760de2d820SScott Wood * than print XXXXXXXX. 11770de2d820SScott Wood */ 11780de2d820SScott Wood if (!(regs->msr & MSR_IR)) 11790de2d820SScott Wood pc = (unsigned long)phys_to_virt(pc); 11800de2d820SScott Wood #endif 11810de2d820SScott Wood 118200ae36deSAnton Blanchard if (!__kernel_text_address(pc) || 11837b051f66SAnton Blanchard probe_kernel_address((unsigned int __user *)pc, instr)) { 118440c8cefaSIra Snyder printk(KERN_CONT "XXXXXXXX "); 118506d67d54SPaul Mackerras } else { 118606d67d54SPaul Mackerras if (regs->nip == pc) 118740c8cefaSIra Snyder printk(KERN_CONT "<%08x> ", instr); 118806d67d54SPaul Mackerras else 118940c8cefaSIra Snyder printk(KERN_CONT "%08x ", instr); 119006d67d54SPaul Mackerras } 119106d67d54SPaul Mackerras 119206d67d54SPaul Mackerras pc += sizeof(int); 119306d67d54SPaul Mackerras } 119406d67d54SPaul Mackerras 119506d67d54SPaul Mackerras printk("\n"); 119606d67d54SPaul Mackerras } 119706d67d54SPaul Mackerras 1198801c0b2cSMichael Neuling struct regbit { 119906d67d54SPaul Mackerras unsigned long bit; 120006d67d54SPaul Mackerras const char *name; 1201801c0b2cSMichael Neuling }; 1202801c0b2cSMichael Neuling 1203801c0b2cSMichael Neuling static struct regbit msr_bits[] = { 12043bfd0c9cSAnton Blanchard #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) 12053bfd0c9cSAnton Blanchard {MSR_SF, "SF"}, 12063bfd0c9cSAnton Blanchard {MSR_HV, "HV"}, 12073bfd0c9cSAnton Blanchard #endif 12083bfd0c9cSAnton Blanchard {MSR_VEC, "VEC"}, 12093bfd0c9cSAnton Blanchard {MSR_VSX, "VSX"}, 12103bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 12113bfd0c9cSAnton Blanchard {MSR_CE, "CE"}, 12123bfd0c9cSAnton Blanchard #endif 121306d67d54SPaul Mackerras {MSR_EE, "EE"}, 121406d67d54SPaul Mackerras {MSR_PR, "PR"}, 121506d67d54SPaul Mackerras {MSR_FP, "FP"}, 121606d67d54SPaul Mackerras {MSR_ME, "ME"}, 12173bfd0c9cSAnton Blanchard #ifdef CONFIG_BOOKE 12181b98326bSKumar Gala {MSR_DE, "DE"}, 12193bfd0c9cSAnton Blanchard #else 12203bfd0c9cSAnton Blanchard {MSR_SE, "SE"}, 12213bfd0c9cSAnton Blanchard {MSR_BE, "BE"}, 12223bfd0c9cSAnton Blanchard #endif 122306d67d54SPaul Mackerras {MSR_IR, "IR"}, 122406d67d54SPaul Mackerras {MSR_DR, "DR"}, 12253bfd0c9cSAnton Blanchard {MSR_PMM, "PMM"}, 12263bfd0c9cSAnton Blanchard #ifndef CONFIG_BOOKE 12273bfd0c9cSAnton Blanchard {MSR_RI, "RI"}, 12283bfd0c9cSAnton Blanchard {MSR_LE, "LE"}, 12293bfd0c9cSAnton Blanchard #endif 123006d67d54SPaul Mackerras {0, NULL} 123106d67d54SPaul Mackerras }; 123206d67d54SPaul Mackerras 1233801c0b2cSMichael Neuling static void print_bits(unsigned long val, struct regbit *bits, const char *sep) 123406d67d54SPaul Mackerras { 1235801c0b2cSMichael Neuling const char *s = ""; 123606d67d54SPaul Mackerras 123706d67d54SPaul Mackerras for (; bits->bit; ++bits) 123806d67d54SPaul Mackerras if (val & bits->bit) { 1239801c0b2cSMichael Neuling printk("%s%s", s, bits->name); 1240801c0b2cSMichael Neuling s = sep; 124106d67d54SPaul Mackerras } 1242801c0b2cSMichael Neuling } 1243801c0b2cSMichael Neuling 1244801c0b2cSMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1245801c0b2cSMichael Neuling static struct regbit msr_tm_bits[] = { 1246801c0b2cSMichael Neuling {MSR_TS_T, "T"}, 1247801c0b2cSMichael Neuling {MSR_TS_S, "S"}, 1248801c0b2cSMichael Neuling {MSR_TM, "E"}, 1249801c0b2cSMichael Neuling {0, NULL} 1250801c0b2cSMichael Neuling }; 1251801c0b2cSMichael Neuling 1252801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) 1253801c0b2cSMichael Neuling { 1254801c0b2cSMichael Neuling /* 1255801c0b2cSMichael Neuling * This only prints something if at least one of the TM bit is set. 1256801c0b2cSMichael Neuling * Inside the TM[], the output means: 1257801c0b2cSMichael Neuling * E: Enabled (bit 32) 1258801c0b2cSMichael Neuling * S: Suspended (bit 33) 1259801c0b2cSMichael Neuling * T: Transactional (bit 34) 1260801c0b2cSMichael Neuling */ 1261801c0b2cSMichael Neuling if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { 1262801c0b2cSMichael Neuling printk(",TM["); 1263801c0b2cSMichael Neuling print_bits(val, msr_tm_bits, ""); 1264801c0b2cSMichael Neuling printk("]"); 1265801c0b2cSMichael Neuling } 1266801c0b2cSMichael Neuling } 1267801c0b2cSMichael Neuling #else 1268801c0b2cSMichael Neuling static void print_tm_bits(unsigned long val) {} 1269801c0b2cSMichael Neuling #endif 1270801c0b2cSMichael Neuling 1271801c0b2cSMichael Neuling static void print_msr_bits(unsigned long val) 1272801c0b2cSMichael Neuling { 1273801c0b2cSMichael Neuling printk("<"); 1274801c0b2cSMichael Neuling print_bits(val, msr_bits, ","); 1275801c0b2cSMichael Neuling print_tm_bits(val); 127606d67d54SPaul Mackerras printk(">"); 127706d67d54SPaul Mackerras } 127806d67d54SPaul Mackerras 127906d67d54SPaul Mackerras #ifdef CONFIG_PPC64 1280f6f7dde3Santon@samba.org #define REG "%016lx" 128106d67d54SPaul Mackerras #define REGS_PER_LINE 4 128206d67d54SPaul Mackerras #define LAST_VOLATILE 13 128306d67d54SPaul Mackerras #else 1284f6f7dde3Santon@samba.org #define REG "%08lx" 128506d67d54SPaul Mackerras #define REGS_PER_LINE 8 128606d67d54SPaul Mackerras #define LAST_VOLATILE 12 128706d67d54SPaul Mackerras #endif 128806d67d54SPaul Mackerras 128914cf11afSPaul Mackerras void show_regs(struct pt_regs * regs) 129014cf11afSPaul Mackerras { 129114cf11afSPaul Mackerras int i, trap; 129214cf11afSPaul Mackerras 1293a43cb95dSTejun Heo show_regs_print_info(KERN_DEFAULT); 1294a43cb95dSTejun Heo 129506d67d54SPaul Mackerras printk("NIP: "REG" LR: "REG" CTR: "REG"\n", 129606d67d54SPaul Mackerras regs->nip, regs->link, regs->ctr); 129706d67d54SPaul Mackerras printk("REGS: %p TRAP: %04lx %s (%s)\n", 129896b644bdSSerge E. Hallyn regs, regs->trap, print_tainted(), init_utsname()->release); 129906d67d54SPaul Mackerras printk("MSR: "REG" ", regs->msr); 1300801c0b2cSMichael Neuling print_msr_bits(regs->msr); 1301f6f7dde3Santon@samba.org printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 130214cf11afSPaul Mackerras trap = TRAP(regs); 13035115a026SMichael Neuling if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) 13049db8bcfdSAnton Blanchard printk("CFAR: "REG" ", regs->orig_gpr3); 1305c5400649SAnton Blanchard if (trap == 0x200 || trap == 0x300 || trap == 0x600) 1306ba28c9aaSKumar Gala #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 13079db8bcfdSAnton Blanchard printk("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); 130814170789SKumar Gala #else 13099db8bcfdSAnton Blanchard printk("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); 13109db8bcfdSAnton Blanchard #endif 13119db8bcfdSAnton Blanchard #ifdef CONFIG_PPC64 13129db8bcfdSAnton Blanchard printk("SOFTE: %ld ", regs->softe); 13139db8bcfdSAnton Blanchard #endif 13149db8bcfdSAnton Blanchard #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 13156d888d1aSAnton Blanchard if (MSR_TM_ACTIVE(regs->msr)) 13169db8bcfdSAnton Blanchard printk("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); 131714170789SKumar Gala #endif 131814cf11afSPaul Mackerras 131914cf11afSPaul Mackerras for (i = 0; i < 32; i++) { 132006d67d54SPaul Mackerras if ((i % REGS_PER_LINE) == 0) 1321a2367194SKumar Gala printk("\nGPR%02d: ", i); 132206d67d54SPaul Mackerras printk(REG " ", regs->gpr[i]); 132306d67d54SPaul Mackerras if (i == LAST_VOLATILE && !FULL_REGS(regs)) 132414cf11afSPaul Mackerras break; 132514cf11afSPaul Mackerras } 132614cf11afSPaul Mackerras printk("\n"); 132714cf11afSPaul Mackerras #ifdef CONFIG_KALLSYMS 132814cf11afSPaul Mackerras /* 132914cf11afSPaul Mackerras * Lookup NIP late so we have the best change of getting the 133014cf11afSPaul Mackerras * above info out without failing 133114cf11afSPaul Mackerras */ 1332058c78f4SBenjamin Herrenschmidt printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); 1333058c78f4SBenjamin Herrenschmidt printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); 133414cf11afSPaul Mackerras #endif 133514cf11afSPaul Mackerras show_stack(current, (unsigned long *) regs->gpr[1]); 133606d67d54SPaul Mackerras if (!user_mode(regs)) 133706d67d54SPaul Mackerras show_instructions(regs); 133814cf11afSPaul Mackerras } 133914cf11afSPaul Mackerras 134014cf11afSPaul Mackerras void flush_thread(void) 134114cf11afSPaul Mackerras { 1342e0780b72SK.Prasad #ifdef CONFIG_HAVE_HW_BREAKPOINT 13435aae8a53SK.Prasad flush_ptrace_hw_breakpoint(current); 1344e0780b72SK.Prasad #else /* CONFIG_HAVE_HW_BREAKPOINT */ 13453bffb652SDave Kleikamp set_debug_reg_defaults(¤t->thread); 1346e0780b72SK.Prasad #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 134714cf11afSPaul Mackerras } 134814cf11afSPaul Mackerras 134914cf11afSPaul Mackerras void 135014cf11afSPaul Mackerras release_thread(struct task_struct *t) 135114cf11afSPaul Mackerras { 135214cf11afSPaul Mackerras } 135314cf11afSPaul Mackerras 135414cf11afSPaul Mackerras /* 135555ccf3feSSuresh Siddha * this gets called so that we can store coprocessor state into memory and 135655ccf3feSSuresh Siddha * copy the current task into the new thread. 135714cf11afSPaul Mackerras */ 135855ccf3feSSuresh Siddha int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 135914cf11afSPaul Mackerras { 1360579e633eSAnton Blanchard flush_all_to_thread(src); 1361621b5060SMichael Neuling /* 1362621b5060SMichael Neuling * Flush TM state out so we can copy it. __switch_to_tm() does this 1363621b5060SMichael Neuling * flush but it removes the checkpointed state from the current CPU and 1364621b5060SMichael Neuling * transitions the CPU out of TM mode. Hence we need to call 1365621b5060SMichael Neuling * tm_recheckpoint_new_task() (on the same task) to restore the 1366621b5060SMichael Neuling * checkpointed state back and the TM mode. 1367621b5060SMichael Neuling */ 1368621b5060SMichael Neuling __switch_to_tm(src); 1369621b5060SMichael Neuling tm_recheckpoint_new_task(src); 1370330a1eb7SMichael Ellerman 137155ccf3feSSuresh Siddha *dst = *src; 1372330a1eb7SMichael Ellerman 1373330a1eb7SMichael Ellerman clear_task_ebb(dst); 1374330a1eb7SMichael Ellerman 137555ccf3feSSuresh Siddha return 0; 137614cf11afSPaul Mackerras } 137714cf11afSPaul Mackerras 1378cec15488SMichael Ellerman static void setup_ksp_vsid(struct task_struct *p, unsigned long sp) 1379cec15488SMichael Ellerman { 1380cec15488SMichael Ellerman #ifdef CONFIG_PPC_STD_MMU_64 1381cec15488SMichael Ellerman unsigned long sp_vsid; 1382cec15488SMichael Ellerman unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp; 1383cec15488SMichael Ellerman 1384caca285eSAneesh Kumar K.V if (radix_enabled()) 1385caca285eSAneesh Kumar K.V return; 1386caca285eSAneesh Kumar K.V 1387cec15488SMichael Ellerman if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) 1388cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T) 1389cec15488SMichael Ellerman << SLB_VSID_SHIFT_1T; 1390cec15488SMichael Ellerman else 1391cec15488SMichael Ellerman sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M) 1392cec15488SMichael Ellerman << SLB_VSID_SHIFT; 1393cec15488SMichael Ellerman sp_vsid |= SLB_VSID_KERNEL | llp; 1394cec15488SMichael Ellerman p->thread.ksp_vsid = sp_vsid; 1395cec15488SMichael Ellerman #endif 1396cec15488SMichael Ellerman } 1397cec15488SMichael Ellerman 139814cf11afSPaul Mackerras /* 139914cf11afSPaul Mackerras * Copy a thread.. 140014cf11afSPaul Mackerras */ 1401efcac658SAlexey Kardashevskiy 14026eca8933SAlex Dowad /* 14036eca8933SAlex Dowad * Copy architecture-specific thread state 14046eca8933SAlex Dowad */ 14056f2c55b8SAlexey Dobriyan int copy_thread(unsigned long clone_flags, unsigned long usp, 14066eca8933SAlex Dowad unsigned long kthread_arg, struct task_struct *p) 140714cf11afSPaul Mackerras { 140814cf11afSPaul Mackerras struct pt_regs *childregs, *kregs; 140914cf11afSPaul Mackerras extern void ret_from_fork(void); 141058254e10SAl Viro extern void ret_from_kernel_thread(void); 141158254e10SAl Viro void (*f)(void); 14120cec6fd1SAl Viro unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE; 14135d31a96eSMichael Ellerman struct thread_info *ti = task_thread_info(p); 14145d31a96eSMichael Ellerman 14155d31a96eSMichael Ellerman klp_init_thread_info(ti); 141614cf11afSPaul Mackerras 141714cf11afSPaul Mackerras /* Copy registers */ 141814cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 141914cf11afSPaul Mackerras childregs = (struct pt_regs *) sp; 1420ab75819dSAl Viro if (unlikely(p->flags & PF_KTHREAD)) { 14216eca8933SAlex Dowad /* kernel thread */ 142258254e10SAl Viro memset(childregs, 0, sizeof(struct pt_regs)); 142314cf11afSPaul Mackerras childregs->gpr[1] = sp + sizeof(struct pt_regs); 14247cedd601SAnton Blanchard /* function */ 14257cedd601SAnton Blanchard if (usp) 14267cedd601SAnton Blanchard childregs->gpr[14] = ppc_function_entry((void *)usp); 142758254e10SAl Viro #ifdef CONFIG_PPC64 1428b5e2fc1cSAl Viro clear_tsk_thread_flag(p, TIF_32BIT); 1429138d1ce8SAl Viro childregs->softe = 1; 143006d67d54SPaul Mackerras #endif 14316eca8933SAlex Dowad childregs->gpr[15] = kthread_arg; 143214cf11afSPaul Mackerras p->thread.regs = NULL; /* no user register state */ 1433138d1ce8SAl Viro ti->flags |= _TIF_RESTOREALL; 143458254e10SAl Viro f = ret_from_kernel_thread; 143514cf11afSPaul Mackerras } else { 14366eca8933SAlex Dowad /* user thread */ 1437afa86fc4SAl Viro struct pt_regs *regs = current_pt_regs(); 143858254e10SAl Viro CHECK_FULL_REGS(regs); 143958254e10SAl Viro *childregs = *regs; 1440ea516b11SAl Viro if (usp) 144114cf11afSPaul Mackerras childregs->gpr[1] = usp; 144214cf11afSPaul Mackerras p->thread.regs = childregs; 144358254e10SAl Viro childregs->gpr[3] = 0; /* Result from fork() */ 144406d67d54SPaul Mackerras if (clone_flags & CLONE_SETTLS) { 144506d67d54SPaul Mackerras #ifdef CONFIG_PPC64 14469904b005SDenis Kirjanov if (!is_32bit_task()) 144706d67d54SPaul Mackerras childregs->gpr[13] = childregs->gpr[6]; 144806d67d54SPaul Mackerras else 144906d67d54SPaul Mackerras #endif 145014cf11afSPaul Mackerras childregs->gpr[2] = childregs->gpr[6]; 145114cf11afSPaul Mackerras } 145258254e10SAl Viro 145358254e10SAl Viro f = ret_from_fork; 145406d67d54SPaul Mackerras } 1455d272f667SCyril Bur childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 145614cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 145714cf11afSPaul Mackerras 145814cf11afSPaul Mackerras /* 145914cf11afSPaul Mackerras * The way this works is that at some point in the future 146014cf11afSPaul Mackerras * some task will call _switch to switch to the new task. 146114cf11afSPaul Mackerras * That will pop off the stack frame created below and start 146214cf11afSPaul Mackerras * the new task running at ret_from_fork. The new task will 146314cf11afSPaul Mackerras * do some house keeping and then return from the fork or clone 146414cf11afSPaul Mackerras * system call, using the stack frame created above. 146514cf11afSPaul Mackerras */ 1466af945cf4SLi Zhong ((unsigned long *)sp)[0] = 0; 146714cf11afSPaul Mackerras sp -= sizeof(struct pt_regs); 146814cf11afSPaul Mackerras kregs = (struct pt_regs *) sp; 146914cf11afSPaul Mackerras sp -= STACK_FRAME_OVERHEAD; 147014cf11afSPaul Mackerras p->thread.ksp = sp; 1471cbc9565eSBenjamin Herrenschmidt #ifdef CONFIG_PPC32 147285218827SKumar Gala p->thread.ksp_limit = (unsigned long)task_stack_page(p) + 147385218827SKumar Gala _ALIGN_UP(sizeof(struct thread_info), 16); 1474cbc9565eSBenjamin Herrenschmidt #endif 147528d170abSOleg Nesterov #ifdef CONFIG_HAVE_HW_BREAKPOINT 147628d170abSOleg Nesterov p->thread.ptrace_bps[0] = NULL; 147728d170abSOleg Nesterov #endif 147828d170abSOleg Nesterov 147918461960SPaul Mackerras p->thread.fp_save_area = NULL; 148018461960SPaul Mackerras #ifdef CONFIG_ALTIVEC 148118461960SPaul Mackerras p->thread.vr_save_area = NULL; 148218461960SPaul Mackerras #endif 148318461960SPaul Mackerras 1484cec15488SMichael Ellerman setup_ksp_vsid(p, sp); 148506d67d54SPaul Mackerras 1486efcac658SAlexey Kardashevskiy #ifdef CONFIG_PPC64 1487efcac658SAlexey Kardashevskiy if (cpu_has_feature(CPU_FTR_DSCR)) { 14881021cb26SAnton Blanchard p->thread.dscr_inherit = current->thread.dscr_inherit; 1489db1231dcSAnton Blanchard p->thread.dscr = mfspr(SPRN_DSCR); 1490efcac658SAlexey Kardashevskiy } 149192779245SHaren Myneni if (cpu_has_feature(CPU_FTR_HAS_PPR)) 149292779245SHaren Myneni p->thread.ppr = INIT_PPR; 1493efcac658SAlexey Kardashevskiy #endif 14947cedd601SAnton Blanchard kregs->nip = ppc_function_entry(f); 149514cf11afSPaul Mackerras return 0; 149614cf11afSPaul Mackerras } 149714cf11afSPaul Mackerras 149814cf11afSPaul Mackerras /* 149914cf11afSPaul Mackerras * Set up a thread for executing a new program 150014cf11afSPaul Mackerras */ 150106d67d54SPaul Mackerras void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) 150214cf11afSPaul Mackerras { 150390eac727SMichael Ellerman #ifdef CONFIG_PPC64 150490eac727SMichael Ellerman unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */ 150590eac727SMichael Ellerman #endif 150690eac727SMichael Ellerman 150706d67d54SPaul Mackerras /* 150806d67d54SPaul Mackerras * If we exec out of a kernel thread then thread.regs will not be 150906d67d54SPaul Mackerras * set. Do it now. 151006d67d54SPaul Mackerras */ 151106d67d54SPaul Mackerras if (!current->thread.regs) { 15120cec6fd1SAl Viro struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE; 15130cec6fd1SAl Viro current->thread.regs = regs - 1; 151406d67d54SPaul Mackerras } 151506d67d54SPaul Mackerras 151614cf11afSPaul Mackerras memset(regs->gpr, 0, sizeof(regs->gpr)); 151714cf11afSPaul Mackerras regs->ctr = 0; 151814cf11afSPaul Mackerras regs->link = 0; 151914cf11afSPaul Mackerras regs->xer = 0; 152014cf11afSPaul Mackerras regs->ccr = 0; 152114cf11afSPaul Mackerras regs->gpr[1] = sp; 152206d67d54SPaul Mackerras 1523474f8196SRoland McGrath /* 1524474f8196SRoland McGrath * We have just cleared all the nonvolatile GPRs, so make 1525474f8196SRoland McGrath * FULL_REGS(regs) return true. This is necessary to allow 1526474f8196SRoland McGrath * ptrace to examine the thread immediately after exec. 1527474f8196SRoland McGrath */ 1528474f8196SRoland McGrath regs->trap &= ~1UL; 1529474f8196SRoland McGrath 153006d67d54SPaul Mackerras #ifdef CONFIG_PPC32 153106d67d54SPaul Mackerras regs->mq = 0; 153206d67d54SPaul Mackerras regs->nip = start; 153314cf11afSPaul Mackerras regs->msr = MSR_USER; 153406d67d54SPaul Mackerras #else 15359904b005SDenis Kirjanov if (!is_32bit_task()) { 153694af3abfSRusty Russell unsigned long entry; 153706d67d54SPaul Mackerras 153894af3abfSRusty Russell if (is_elf2_task()) { 153994af3abfSRusty Russell /* Look ma, no function descriptors! */ 154094af3abfSRusty Russell entry = start; 154194af3abfSRusty Russell 154294af3abfSRusty Russell /* 154394af3abfSRusty Russell * Ulrich says: 154494af3abfSRusty Russell * The latest iteration of the ABI requires that when 154594af3abfSRusty Russell * calling a function (at its global entry point), 154694af3abfSRusty Russell * the caller must ensure r12 holds the entry point 154794af3abfSRusty Russell * address (so that the function can quickly 154894af3abfSRusty Russell * establish addressability). 154994af3abfSRusty Russell */ 155094af3abfSRusty Russell regs->gpr[12] = start; 155194af3abfSRusty Russell /* Make sure that's restored on entry to userspace. */ 155294af3abfSRusty Russell set_thread_flag(TIF_RESTOREALL); 155394af3abfSRusty Russell } else { 155494af3abfSRusty Russell unsigned long toc; 155594af3abfSRusty Russell 155694af3abfSRusty Russell /* start is a relocated pointer to the function 155794af3abfSRusty Russell * descriptor for the elf _start routine. The first 155894af3abfSRusty Russell * entry in the function descriptor is the entry 155994af3abfSRusty Russell * address of _start and the second entry is the TOC 156094af3abfSRusty Russell * value we need to use. 156106d67d54SPaul Mackerras */ 156206d67d54SPaul Mackerras __get_user(entry, (unsigned long __user *)start); 156306d67d54SPaul Mackerras __get_user(toc, (unsigned long __user *)start+1); 156406d67d54SPaul Mackerras 156506d67d54SPaul Mackerras /* Check whether the e_entry function descriptor entries 156606d67d54SPaul Mackerras * need to be relocated before we can use them. 156706d67d54SPaul Mackerras */ 156806d67d54SPaul Mackerras if (load_addr != 0) { 156906d67d54SPaul Mackerras entry += load_addr; 157006d67d54SPaul Mackerras toc += load_addr; 157106d67d54SPaul Mackerras } 157206d67d54SPaul Mackerras regs->gpr[2] = toc; 157394af3abfSRusty Russell } 157494af3abfSRusty Russell regs->nip = entry; 157506d67d54SPaul Mackerras regs->msr = MSR_USER64; 1576d4bf9a78SStephen Rothwell } else { 1577d4bf9a78SStephen Rothwell regs->nip = start; 1578d4bf9a78SStephen Rothwell regs->gpr[2] = 0; 1579d4bf9a78SStephen Rothwell regs->msr = MSR_USER32; 158006d67d54SPaul Mackerras } 158106d67d54SPaul Mackerras #endif 1582ce48b210SMichael Neuling #ifdef CONFIG_VSX 1583ce48b210SMichael Neuling current->thread.used_vsr = 0; 1584ce48b210SMichael Neuling #endif 1585de79f7b9SPaul Mackerras memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); 158618461960SPaul Mackerras current->thread.fp_save_area = NULL; 158714cf11afSPaul Mackerras #ifdef CONFIG_ALTIVEC 1588de79f7b9SPaul Mackerras memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state)); 1589de79f7b9SPaul Mackerras current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */ 159018461960SPaul Mackerras current->thread.vr_save_area = NULL; 159114cf11afSPaul Mackerras current->thread.vrsave = 0; 159214cf11afSPaul Mackerras current->thread.used_vr = 0; 159314cf11afSPaul Mackerras #endif /* CONFIG_ALTIVEC */ 159414cf11afSPaul Mackerras #ifdef CONFIG_SPE 159514cf11afSPaul Mackerras memset(current->thread.evr, 0, sizeof(current->thread.evr)); 159614cf11afSPaul Mackerras current->thread.acc = 0; 159714cf11afSPaul Mackerras current->thread.spefscr = 0; 159814cf11afSPaul Mackerras current->thread.used_spe = 0; 159914cf11afSPaul Mackerras #endif /* CONFIG_SPE */ 1600bc2a9408SMichael Neuling #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1601bc2a9408SMichael Neuling if (cpu_has_feature(CPU_FTR_TM)) 1602bc2a9408SMichael Neuling regs->msr |= MSR_TM; 1603bc2a9408SMichael Neuling current->thread.tm_tfhar = 0; 1604bc2a9408SMichael Neuling current->thread.tm_texasr = 0; 1605bc2a9408SMichael Neuling current->thread.tm_tfiar = 0; 1606bc2a9408SMichael Neuling #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 160714cf11afSPaul Mackerras } 1608e1802b06SAnton Blanchard EXPORT_SYMBOL(start_thread); 160914cf11afSPaul Mackerras 161014cf11afSPaul Mackerras #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \ 161114cf11afSPaul Mackerras | PR_FP_EXC_RES | PR_FP_EXC_INV) 161214cf11afSPaul Mackerras 161314cf11afSPaul Mackerras int set_fpexc_mode(struct task_struct *tsk, unsigned int val) 161414cf11afSPaul Mackerras { 161514cf11afSPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 161614cf11afSPaul Mackerras 161714cf11afSPaul Mackerras /* This is a bit hairy. If we are an SPE enabled processor 161814cf11afSPaul Mackerras * (have embedded fp) we store the IEEE exception enable flags in 161914cf11afSPaul Mackerras * fpexc_mode. fpexc_mode is also used for setting FP exception 162014cf11afSPaul Mackerras * mode (asyn, precise, disabled) for 'Classic' FP. */ 162114cf11afSPaul Mackerras if (val & PR_FP_EXC_SW_ENABLE) { 162214cf11afSPaul Mackerras #ifdef CONFIG_SPE 16235e14d21eSKumar Gala if (cpu_has_feature(CPU_FTR_SPE)) { 1624640e9225SJoseph Myers /* 1625640e9225SJoseph Myers * When the sticky exception bits are set 1626640e9225SJoseph Myers * directly by userspace, it must call prctl 1627640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1628640e9225SJoseph Myers * in the existing prctl settings) or 1629640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1630640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1631640e9225SJoseph Myers * saving and restoring the whole 1632640e9225SJoseph Myers * floating-point environment need to do so 1633640e9225SJoseph Myers * anyway to restore the prctl settings from 1634640e9225SJoseph Myers * the saved environment. 1635640e9225SJoseph Myers */ 1636640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 163714cf11afSPaul Mackerras tsk->thread.fpexc_mode = val & 163814cf11afSPaul Mackerras (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT); 163906d67d54SPaul Mackerras return 0; 16405e14d21eSKumar Gala } else { 16415e14d21eSKumar Gala return -EINVAL; 16425e14d21eSKumar Gala } 164314cf11afSPaul Mackerras #else 164414cf11afSPaul Mackerras return -EINVAL; 164514cf11afSPaul Mackerras #endif 164606d67d54SPaul Mackerras } 164706d67d54SPaul Mackerras 164814cf11afSPaul Mackerras /* on a CONFIG_SPE this does not hurt us. The bits that 164914cf11afSPaul Mackerras * __pack_fe01 use do not overlap with bits used for 165014cf11afSPaul Mackerras * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits 165114cf11afSPaul Mackerras * on CONFIG_SPE implementations are reserved so writing to 165214cf11afSPaul Mackerras * them does not change anything */ 165314cf11afSPaul Mackerras if (val > PR_FP_EXC_PRECISE) 165414cf11afSPaul Mackerras return -EINVAL; 165514cf11afSPaul Mackerras tsk->thread.fpexc_mode = __pack_fe01(val); 165614cf11afSPaul Mackerras if (regs != NULL && (regs->msr & MSR_FP) != 0) 165714cf11afSPaul Mackerras regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) 165814cf11afSPaul Mackerras | tsk->thread.fpexc_mode; 165914cf11afSPaul Mackerras return 0; 166014cf11afSPaul Mackerras } 166114cf11afSPaul Mackerras 166214cf11afSPaul Mackerras int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) 166314cf11afSPaul Mackerras { 166414cf11afSPaul Mackerras unsigned int val; 166514cf11afSPaul Mackerras 166614cf11afSPaul Mackerras if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE) 166714cf11afSPaul Mackerras #ifdef CONFIG_SPE 1668640e9225SJoseph Myers if (cpu_has_feature(CPU_FTR_SPE)) { 1669640e9225SJoseph Myers /* 1670640e9225SJoseph Myers * When the sticky exception bits are set 1671640e9225SJoseph Myers * directly by userspace, it must call prctl 1672640e9225SJoseph Myers * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE 1673640e9225SJoseph Myers * in the existing prctl settings) or 1674640e9225SJoseph Myers * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in 1675640e9225SJoseph Myers * the bits being set). <fenv.h> functions 1676640e9225SJoseph Myers * saving and restoring the whole 1677640e9225SJoseph Myers * floating-point environment need to do so 1678640e9225SJoseph Myers * anyway to restore the prctl settings from 1679640e9225SJoseph Myers * the saved environment. 1680640e9225SJoseph Myers */ 1681640e9225SJoseph Myers tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR); 168214cf11afSPaul Mackerras val = tsk->thread.fpexc_mode; 1683640e9225SJoseph Myers } else 16845e14d21eSKumar Gala return -EINVAL; 168514cf11afSPaul Mackerras #else 168614cf11afSPaul Mackerras return -EINVAL; 168714cf11afSPaul Mackerras #endif 168814cf11afSPaul Mackerras else 168914cf11afSPaul Mackerras val = __unpack_fe01(tsk->thread.fpexc_mode); 169014cf11afSPaul Mackerras return put_user(val, (unsigned int __user *) adr); 169114cf11afSPaul Mackerras } 169214cf11afSPaul Mackerras 1693fab5db97SPaul Mackerras int set_endian(struct task_struct *tsk, unsigned int val) 1694fab5db97SPaul Mackerras { 1695fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1696fab5db97SPaul Mackerras 1697fab5db97SPaul Mackerras if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) || 1698fab5db97SPaul Mackerras (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE))) 1699fab5db97SPaul Mackerras return -EINVAL; 1700fab5db97SPaul Mackerras 1701fab5db97SPaul Mackerras if (regs == NULL) 1702fab5db97SPaul Mackerras return -EINVAL; 1703fab5db97SPaul Mackerras 1704fab5db97SPaul Mackerras if (val == PR_ENDIAN_BIG) 1705fab5db97SPaul Mackerras regs->msr &= ~MSR_LE; 1706fab5db97SPaul Mackerras else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE) 1707fab5db97SPaul Mackerras regs->msr |= MSR_LE; 1708fab5db97SPaul Mackerras else 1709fab5db97SPaul Mackerras return -EINVAL; 1710fab5db97SPaul Mackerras 1711fab5db97SPaul Mackerras return 0; 1712fab5db97SPaul Mackerras } 1713fab5db97SPaul Mackerras 1714fab5db97SPaul Mackerras int get_endian(struct task_struct *tsk, unsigned long adr) 1715fab5db97SPaul Mackerras { 1716fab5db97SPaul Mackerras struct pt_regs *regs = tsk->thread.regs; 1717fab5db97SPaul Mackerras unsigned int val; 1718fab5db97SPaul Mackerras 1719fab5db97SPaul Mackerras if (!cpu_has_feature(CPU_FTR_PPC_LE) && 1720fab5db97SPaul Mackerras !cpu_has_feature(CPU_FTR_REAL_LE)) 1721fab5db97SPaul Mackerras return -EINVAL; 1722fab5db97SPaul Mackerras 1723fab5db97SPaul Mackerras if (regs == NULL) 1724fab5db97SPaul Mackerras return -EINVAL; 1725fab5db97SPaul Mackerras 1726fab5db97SPaul Mackerras if (regs->msr & MSR_LE) { 1727fab5db97SPaul Mackerras if (cpu_has_feature(CPU_FTR_REAL_LE)) 1728fab5db97SPaul Mackerras val = PR_ENDIAN_LITTLE; 1729fab5db97SPaul Mackerras else 1730fab5db97SPaul Mackerras val = PR_ENDIAN_PPC_LITTLE; 1731fab5db97SPaul Mackerras } else 1732fab5db97SPaul Mackerras val = PR_ENDIAN_BIG; 1733fab5db97SPaul Mackerras 1734fab5db97SPaul Mackerras return put_user(val, (unsigned int __user *)adr); 1735fab5db97SPaul Mackerras } 1736fab5db97SPaul Mackerras 1737e9370ae1SPaul Mackerras int set_unalign_ctl(struct task_struct *tsk, unsigned int val) 1738e9370ae1SPaul Mackerras { 1739e9370ae1SPaul Mackerras tsk->thread.align_ctl = val; 1740e9370ae1SPaul Mackerras return 0; 1741e9370ae1SPaul Mackerras } 1742e9370ae1SPaul Mackerras 1743e9370ae1SPaul Mackerras int get_unalign_ctl(struct task_struct *tsk, unsigned long adr) 1744e9370ae1SPaul Mackerras { 1745e9370ae1SPaul Mackerras return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr); 1746e9370ae1SPaul Mackerras } 1747e9370ae1SPaul Mackerras 1748bb72c481SPaul Mackerras static inline int valid_irq_stack(unsigned long sp, struct task_struct *p, 1749bb72c481SPaul Mackerras unsigned long nbytes) 1750bb72c481SPaul Mackerras { 1751bb72c481SPaul Mackerras unsigned long stack_page; 1752bb72c481SPaul Mackerras unsigned long cpu = task_cpu(p); 1753bb72c481SPaul Mackerras 1754bb72c481SPaul Mackerras /* 1755bb72c481SPaul Mackerras * Avoid crashing if the stack has overflowed and corrupted 1756bb72c481SPaul Mackerras * task_cpu(p), which is in the thread_info struct. 1757bb72c481SPaul Mackerras */ 1758bb72c481SPaul Mackerras if (cpu < NR_CPUS && cpu_possible(cpu)) { 1759bb72c481SPaul Mackerras stack_page = (unsigned long) hardirq_ctx[cpu]; 1760bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1761bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1762bb72c481SPaul Mackerras return 1; 1763bb72c481SPaul Mackerras 1764bb72c481SPaul Mackerras stack_page = (unsigned long) softirq_ctx[cpu]; 1765bb72c481SPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 1766bb72c481SPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 1767bb72c481SPaul Mackerras return 1; 1768bb72c481SPaul Mackerras } 1769bb72c481SPaul Mackerras return 0; 1770bb72c481SPaul Mackerras } 1771bb72c481SPaul Mackerras 17722f25194dSAnton Blanchard int validate_sp(unsigned long sp, struct task_struct *p, 177314cf11afSPaul Mackerras unsigned long nbytes) 177414cf11afSPaul Mackerras { 17750cec6fd1SAl Viro unsigned long stack_page = (unsigned long)task_stack_page(p); 177614cf11afSPaul Mackerras 177714cf11afSPaul Mackerras if (sp >= stack_page + sizeof(struct thread_struct) 177814cf11afSPaul Mackerras && sp <= stack_page + THREAD_SIZE - nbytes) 177914cf11afSPaul Mackerras return 1; 178014cf11afSPaul Mackerras 1781bb72c481SPaul Mackerras return valid_irq_stack(sp, p, nbytes); 178214cf11afSPaul Mackerras } 178314cf11afSPaul Mackerras 17842f25194dSAnton Blanchard EXPORT_SYMBOL(validate_sp); 17852f25194dSAnton Blanchard 178606d67d54SPaul Mackerras unsigned long get_wchan(struct task_struct *p) 178706d67d54SPaul Mackerras { 178806d67d54SPaul Mackerras unsigned long ip, sp; 178906d67d54SPaul Mackerras int count = 0; 179006d67d54SPaul Mackerras 179106d67d54SPaul Mackerras if (!p || p == current || p->state == TASK_RUNNING) 179206d67d54SPaul Mackerras return 0; 179306d67d54SPaul Mackerras 179406d67d54SPaul Mackerras sp = p->thread.ksp; 1795ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 179606d67d54SPaul Mackerras return 0; 179706d67d54SPaul Mackerras 179806d67d54SPaul Mackerras do { 179906d67d54SPaul Mackerras sp = *(unsigned long *)sp; 1800ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 180106d67d54SPaul Mackerras return 0; 180206d67d54SPaul Mackerras if (count > 0) { 1803ec2b36b9SBenjamin Herrenschmidt ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE]; 180406d67d54SPaul Mackerras if (!in_sched_functions(ip)) 180506d67d54SPaul Mackerras return ip; 180606d67d54SPaul Mackerras } 180706d67d54SPaul Mackerras } while (count++ < 16); 180806d67d54SPaul Mackerras return 0; 180906d67d54SPaul Mackerras } 181006d67d54SPaul Mackerras 1811c4d04be1SJohannes Berg static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH; 181214cf11afSPaul Mackerras 181314cf11afSPaul Mackerras void show_stack(struct task_struct *tsk, unsigned long *stack) 181414cf11afSPaul Mackerras { 181506d67d54SPaul Mackerras unsigned long sp, ip, lr, newsp; 181614cf11afSPaul Mackerras int count = 0; 181706d67d54SPaul Mackerras int firstframe = 1; 18186794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 18196794c782SSteven Rostedt int curr_frame = current->curr_ret_stack; 18206794c782SSteven Rostedt extern void return_to_handler(void); 18219135c3ccSSteven Rostedt unsigned long rth = (unsigned long)return_to_handler; 18226794c782SSteven Rostedt #endif 182314cf11afSPaul Mackerras 182414cf11afSPaul Mackerras sp = (unsigned long) stack; 182514cf11afSPaul Mackerras if (tsk == NULL) 182614cf11afSPaul Mackerras tsk = current; 182714cf11afSPaul Mackerras if (sp == 0) { 182814cf11afSPaul Mackerras if (tsk == current) 1829acf620ecSAnton Blanchard sp = current_stack_pointer(); 183014cf11afSPaul Mackerras else 183114cf11afSPaul Mackerras sp = tsk->thread.ksp; 183214cf11afSPaul Mackerras } 183314cf11afSPaul Mackerras 183406d67d54SPaul Mackerras lr = 0; 183506d67d54SPaul Mackerras printk("Call Trace:\n"); 183614cf11afSPaul Mackerras do { 1837ec2b36b9SBenjamin Herrenschmidt if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 183806d67d54SPaul Mackerras return; 183906d67d54SPaul Mackerras 184006d67d54SPaul Mackerras stack = (unsigned long *) sp; 184106d67d54SPaul Mackerras newsp = stack[0]; 1842ec2b36b9SBenjamin Herrenschmidt ip = stack[STACK_FRAME_LR_SAVE]; 184306d67d54SPaul Mackerras if (!firstframe || ip != lr) { 1844058c78f4SBenjamin Herrenschmidt printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 18456794c782SSteven Rostedt #ifdef CONFIG_FUNCTION_GRAPH_TRACER 18467d56c65aSAnton Blanchard if ((ip == rth) && curr_frame >= 0) { 18476794c782SSteven Rostedt printk(" (%pS)", 18486794c782SSteven Rostedt (void *)current->ret_stack[curr_frame].ret); 18496794c782SSteven Rostedt curr_frame--; 18506794c782SSteven Rostedt } 18516794c782SSteven Rostedt #endif 185206d67d54SPaul Mackerras if (firstframe) 185306d67d54SPaul Mackerras printk(" (unreliable)"); 185406d67d54SPaul Mackerras printk("\n"); 185514cf11afSPaul Mackerras } 185606d67d54SPaul Mackerras firstframe = 0; 185706d67d54SPaul Mackerras 185806d67d54SPaul Mackerras /* 185906d67d54SPaul Mackerras * See if this is an exception frame. 186006d67d54SPaul Mackerras * We look for the "regshere" marker in the current frame. 186106d67d54SPaul Mackerras */ 1862ec2b36b9SBenjamin Herrenschmidt if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE) 1863ec2b36b9SBenjamin Herrenschmidt && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 186406d67d54SPaul Mackerras struct pt_regs *regs = (struct pt_regs *) 186506d67d54SPaul Mackerras (sp + STACK_FRAME_OVERHEAD); 186606d67d54SPaul Mackerras lr = regs->link; 18679be9be2eSPaul Mackerras printk("--- interrupt: %lx at %pS\n LR = %pS\n", 1868058c78f4SBenjamin Herrenschmidt regs->trap, (void *)regs->nip, (void *)lr); 186906d67d54SPaul Mackerras firstframe = 1; 187014cf11afSPaul Mackerras } 187106d67d54SPaul Mackerras 187206d67d54SPaul Mackerras sp = newsp; 187306d67d54SPaul Mackerras } while (count++ < kstack_depth_to_print); 187406d67d54SPaul Mackerras } 187506d67d54SPaul Mackerras 1876cb2c9b27SAnton Blanchard #ifdef CONFIG_PPC64 1877fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 18780e37739bSMichael Ellerman void notrace __ppc64_runlatch_on(void) 1879cb2c9b27SAnton Blanchard { 1880fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1881cb2c9b27SAnton Blanchard unsigned long ctrl; 1882cb2c9b27SAnton Blanchard 1883cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1884cb2c9b27SAnton Blanchard ctrl |= CTRL_RUNLATCH; 1885cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1886cb2c9b27SAnton Blanchard 1887fae2e0fbSBenjamin Herrenschmidt ti->local_flags |= _TLF_RUNLATCH; 1888cb2c9b27SAnton Blanchard } 1889cb2c9b27SAnton Blanchard 1890fe1952fcSBenjamin Herrenschmidt /* Called with hard IRQs off */ 18910e37739bSMichael Ellerman void notrace __ppc64_runlatch_off(void) 1892cb2c9b27SAnton Blanchard { 1893fe1952fcSBenjamin Herrenschmidt struct thread_info *ti = current_thread_info(); 1894cb2c9b27SAnton Blanchard unsigned long ctrl; 1895cb2c9b27SAnton Blanchard 1896fae2e0fbSBenjamin Herrenschmidt ti->local_flags &= ~_TLF_RUNLATCH; 1897cb2c9b27SAnton Blanchard 1898cb2c9b27SAnton Blanchard ctrl = mfspr(SPRN_CTRLF); 1899cb2c9b27SAnton Blanchard ctrl &= ~CTRL_RUNLATCH; 1900cb2c9b27SAnton Blanchard mtspr(SPRN_CTRLT, ctrl); 1901cb2c9b27SAnton Blanchard } 1902fe1952fcSBenjamin Herrenschmidt #endif /* CONFIG_PPC64 */ 1903f6a61680SBenjamin Herrenschmidt 1904d839088cSAnton Blanchard unsigned long arch_align_stack(unsigned long sp) 1905d839088cSAnton Blanchard { 1906d839088cSAnton Blanchard if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 1907d839088cSAnton Blanchard sp -= get_random_int() & ~PAGE_MASK; 1908d839088cSAnton Blanchard return sp & ~0xf; 1909d839088cSAnton Blanchard } 1910912f9ee2SAnton Blanchard 1911912f9ee2SAnton Blanchard static inline unsigned long brk_rnd(void) 1912912f9ee2SAnton Blanchard { 1913912f9ee2SAnton Blanchard unsigned long rnd = 0; 1914912f9ee2SAnton Blanchard 1915912f9ee2SAnton Blanchard /* 8MB for 32bit, 1GB for 64bit */ 1916912f9ee2SAnton Blanchard if (is_32bit_task()) 19175ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); 1918912f9ee2SAnton Blanchard else 19195ef11c35SDaniel Cashman rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); 1920912f9ee2SAnton Blanchard 1921912f9ee2SAnton Blanchard return rnd << PAGE_SHIFT; 1922912f9ee2SAnton Blanchard } 1923912f9ee2SAnton Blanchard 1924912f9ee2SAnton Blanchard unsigned long arch_randomize_brk(struct mm_struct *mm) 1925912f9ee2SAnton Blanchard { 19268bbde7a7SAnton Blanchard unsigned long base = mm->brk; 19278bbde7a7SAnton Blanchard unsigned long ret; 19288bbde7a7SAnton Blanchard 1929ce7a35c7SKumar Gala #ifdef CONFIG_PPC_STD_MMU_64 19308bbde7a7SAnton Blanchard /* 19318bbde7a7SAnton Blanchard * If we are using 1TB segments and we are allowed to randomise 19328bbde7a7SAnton Blanchard * the heap, we can put it above 1TB so it is backed by a 1TB 19338bbde7a7SAnton Blanchard * segment. Otherwise the heap will be in the bottom 1TB 19348bbde7a7SAnton Blanchard * which always uses 256MB segments and this may result in a 1935caca285eSAneesh Kumar K.V * performance penalty. We don't need to worry about radix. For 1936caca285eSAneesh Kumar K.V * radix, mmu_highuser_ssize remains unchanged from 256MB. 19378bbde7a7SAnton Blanchard */ 19388bbde7a7SAnton Blanchard if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) 19398bbde7a7SAnton Blanchard base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); 19408bbde7a7SAnton Blanchard #endif 19418bbde7a7SAnton Blanchard 19428bbde7a7SAnton Blanchard ret = PAGE_ALIGN(base + brk_rnd()); 1943912f9ee2SAnton Blanchard 1944912f9ee2SAnton Blanchard if (ret < mm->brk) 1945912f9ee2SAnton Blanchard return mm->brk; 1946912f9ee2SAnton Blanchard 1947912f9ee2SAnton Blanchard return ret; 1948912f9ee2SAnton Blanchard } 1949501cb16dSAnton Blanchard 1950