xref: /linux/arch/powerpc/kernel/pmc.c (revision 858259cf7d1c443c836a2022b78cb281f0a9b95e)
1 /*
2  *  arch/powerpc/kernel/pmc.c
3  *
4  *  Copyright (C) 2004 David Gibson, IBM Corporation.
5  *  Includes code formerly from arch/ppc/kernel/perfmon.c:
6  *    Author: Andy Fleming
7  *    Copyright (c) 2004 Freescale Semiconductor, Inc
8  *
9  *  This program is free software; you can redistribute it and/or
10  *  modify it under the terms of the GNU General Public License
11  *  as published by the Free Software Foundation; either version
12  *  2 of the License, or (at your option) any later version.
13  */
14 
15 #include <linux/config.h>
16 #include <linux/errno.h>
17 #include <linux/spinlock.h>
18 #include <linux/module.h>
19 
20 #include <asm/processor.h>
21 #include <asm/pmc.h>
22 
23 #if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
24 static void dummy_perf(struct pt_regs *regs)
25 {
26 	unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
27 
28 	pmgc0 &= ~PMGC0_PMIE;
29 	mtpmr(PMRN_PMGC0, pmgc0);
30 }
31 #elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
32 
33 #ifndef MMCR0_PMAO
34 #define MMCR0_PMAO	0
35 #endif
36 
37 /* Ensure exceptions are disabled */
38 static void dummy_perf(struct pt_regs *regs)
39 {
40 	unsigned int mmcr0 = mfspr(SPRN_MMCR0);
41 
42 	mmcr0 &= ~(MMCR0_PMXE|MMCR0_PMAO);
43 	mtspr(SPRN_MMCR0, mmcr0);
44 }
45 #else
46 static void dummy_perf(struct pt_regs *regs)
47 {
48 }
49 #endif
50 
51 static DEFINE_SPINLOCK(pmc_owner_lock);
52 static void *pmc_owner_caller; /* mostly for debugging */
53 perf_irq_t perf_irq = dummy_perf;
54 
55 int reserve_pmc_hardware(perf_irq_t new_perf_irq)
56 {
57 	int err = 0;
58 
59 	spin_lock(&pmc_owner_lock);
60 
61 	if (pmc_owner_caller) {
62 		printk(KERN_WARNING "reserve_pmc_hardware: "
63 		       "PMC hardware busy (reserved by caller %p)\n",
64 		       pmc_owner_caller);
65 		err = -EBUSY;
66 		goto out;
67 	}
68 
69 	pmc_owner_caller = __builtin_return_address(0);
70 	perf_irq = new_perf_irq ? : dummy_perf;
71 
72  out:
73 	spin_unlock(&pmc_owner_lock);
74 	return err;
75 }
76 EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
77 
78 void release_pmc_hardware(void)
79 {
80 	spin_lock(&pmc_owner_lock);
81 
82 	WARN_ON(! pmc_owner_caller);
83 
84 	pmc_owner_caller = NULL;
85 	perf_irq = dummy_perf;
86 
87 	spin_unlock(&pmc_owner_lock);
88 }
89 EXPORT_SYMBOL_GPL(release_pmc_hardware);
90 
91 #ifdef CONFIG_PPC64
92 void power4_enable_pmcs(void)
93 {
94 	unsigned long hid0;
95 
96 	hid0 = mfspr(SPRN_HID0);
97 	hid0 |= 1UL << (63 - 20);
98 
99 	/* POWER4 requires the following sequence */
100 	asm volatile(
101 		"sync\n"
102 		"mtspr     %1, %0\n"
103 		"mfspr     %0, %1\n"
104 		"mfspr     %0, %1\n"
105 		"mfspr     %0, %1\n"
106 		"mfspr     %0, %1\n"
107 		"mfspr     %0, %1\n"
108 		"mfspr     %0, %1\n"
109 		"isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
110 		"memory");
111 }
112 #endif /* CONFIG_PPC64 */
113