xref: /linux/arch/powerpc/kernel/irq.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84) 
1 /*
2  *  Derived from arch/i386/kernel/irq.c
3  *    Copyright (C) 1992 Linus Torvalds
4  *  Adapted from arch/i386 by Gary Thomas
5  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6  *  Updated and modified by Cort Dougan <cort@fsmlabs.com>
7  *    Copyright (C) 1996-2001 Cort Dougan
8  *  Adapted for Power Macintosh by Paul Mackerras
9  *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10  *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License
14  * as published by the Free Software Foundation; either version
15  * 2 of the License, or (at your option) any later version.
16  *
17  * This file contains the code used by various IRQ handling routines:
18  * asking for different IRQ's should be done through these routines
19  * instead of just grabbing them. Thus setups with different IRQ numbers
20  * shouldn't result in any weird surprises, and installing new handlers
21  * should be easier.
22  *
23  * The MPC8xx has an interrupt mask in the SIU.  If a bit is set, the
24  * interrupt is _enabled_.  As expected, IRQ0 is bit 0 in the 32-bit
25  * mask register (of which only 16 are defined), hence the weird shifting
26  * and complement of the cached_irq_mask.  I want to be able to stuff
27  * this right into the SIU SMASK register.
28  * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
29  * to reduce code space and undefined function references.
30  */
31 
32 #include <linux/module.h>
33 #include <linux/threads.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/signal.h>
36 #include <linux/sched.h>
37 #include <linux/ptrace.h>
38 #include <linux/ioport.h>
39 #include <linux/interrupt.h>
40 #include <linux/timex.h>
41 #include <linux/config.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/delay.h>
45 #include <linux/irq.h>
46 #include <linux/seq_file.h>
47 #include <linux/cpumask.h>
48 #include <linux/profile.h>
49 #include <linux/bitops.h>
50 #include <linux/pci.h>
51 
52 #include <asm/uaccess.h>
53 #include <asm/system.h>
54 #include <asm/io.h>
55 #include <asm/pgtable.h>
56 #include <asm/irq.h>
57 #include <asm/cache.h>
58 #include <asm/prom.h>
59 #include <asm/ptrace.h>
60 #include <asm/machdep.h>
61 #ifdef CONFIG_PPC_ISERIES
62 #include <asm/paca.h>
63 #endif
64 
65 int __irq_offset_value;
66 #ifdef CONFIG_PPC32
67 EXPORT_SYMBOL(__irq_offset_value);
68 #endif
69 
70 static int ppc_spurious_interrupts;
71 
72 #ifdef CONFIG_PPC32
73 #define NR_MASK_WORDS	((NR_IRQS + 31) / 32)
74 
75 unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
76 atomic_t ppc_n_lost_interrupts;
77 
78 #ifdef CONFIG_TAU_INT
79 extern int tau_initialized;
80 extern int tau_interrupts(int);
81 #endif
82 
83 #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
84 extern atomic_t ipi_recv;
85 extern atomic_t ipi_sent;
86 #endif
87 #endif /* CONFIG_PPC32 */
88 
89 #ifdef CONFIG_PPC64
90 EXPORT_SYMBOL(irq_desc);
91 
92 int distribute_irqs = 1;
93 u64 ppc64_interrupt_controller;
94 #endif /* CONFIG_PPC64 */
95 
96 int show_interrupts(struct seq_file *p, void *v)
97 {
98 	int i = *(loff_t *)v, j;
99 	struct irqaction *action;
100 	irq_desc_t *desc;
101 	unsigned long flags;
102 
103 	if (i == 0) {
104 		seq_puts(p, "           ");
105 		for_each_online_cpu(j)
106 			seq_printf(p, "CPU%d       ", j);
107 		seq_putc(p, '\n');
108 	}
109 
110 	if (i < NR_IRQS) {
111 		desc = get_irq_desc(i);
112 		spin_lock_irqsave(&desc->lock, flags);
113 		action = desc->action;
114 		if (!action || !action->handler)
115 			goto skip;
116 		seq_printf(p, "%3d: ", i);
117 #ifdef CONFIG_SMP
118 		for_each_online_cpu(j)
119 			seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
120 #else
121 		seq_printf(p, "%10u ", kstat_irqs(i));
122 #endif /* CONFIG_SMP */
123 		if (desc->chip)
124 			seq_printf(p, " %s ", desc->chip->typename);
125 		else
126 			seq_puts(p, "  None      ");
127 		seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge  ");
128 		seq_printf(p, "    %s", action->name);
129 		for (action = action->next; action; action = action->next)
130 			seq_printf(p, ", %s", action->name);
131 		seq_putc(p, '\n');
132 skip:
133 		spin_unlock_irqrestore(&desc->lock, flags);
134 	} else if (i == NR_IRQS) {
135 #ifdef CONFIG_PPC32
136 #ifdef CONFIG_TAU_INT
137 		if (tau_initialized){
138 			seq_puts(p, "TAU: ");
139 			for_each_online_cpu(j)
140 				seq_printf(p, "%10u ", tau_interrupts(j));
141 			seq_puts(p, "  PowerPC             Thermal Assist (cpu temp)\n");
142 		}
143 #endif
144 #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
145 		/* should this be per processor send/receive? */
146 		seq_printf(p, "IPI (recv/sent): %10u/%u\n",
147 				atomic_read(&ipi_recv), atomic_read(&ipi_sent));
148 #endif
149 #endif /* CONFIG_PPC32 */
150 		seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
151 	}
152 	return 0;
153 }
154 
155 #ifdef CONFIG_HOTPLUG_CPU
156 void fixup_irqs(cpumask_t map)
157 {
158 	unsigned int irq;
159 	static int warned;
160 
161 	for_each_irq(irq) {
162 		cpumask_t mask;
163 
164 		if (irq_desc[irq].status & IRQ_PER_CPU)
165 			continue;
166 
167 		cpus_and(mask, irq_desc[irq].affinity, map);
168 		if (any_online_cpu(mask) == NR_CPUS) {
169 			printk("Breaking affinity for irq %i\n", irq);
170 			mask = map;
171 		}
172 		if (irq_desc[irq].chip->set_affinity)
173 			irq_desc[irq].chip->set_affinity(irq, mask);
174 		else if (irq_desc[irq].action && !(warned++))
175 			printk("Cannot set affinity for irq %i\n", irq);
176 	}
177 
178 	local_irq_enable();
179 	mdelay(1);
180 	local_irq_disable();
181 }
182 #endif
183 
184 void do_IRQ(struct pt_regs *regs)
185 {
186 	int irq;
187 #ifdef CONFIG_IRQSTACKS
188 	struct thread_info *curtp, *irqtp;
189 #endif
190 
191         irq_enter();
192 
193 #ifdef CONFIG_DEBUG_STACKOVERFLOW
194 	/* Debugging check for stack overflow: is there less than 2KB free? */
195 	{
196 		long sp;
197 
198 		sp = __get_SP() & (THREAD_SIZE-1);
199 
200 		if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
201 			printk("do_IRQ: stack overflow: %ld\n",
202 				sp - sizeof(struct thread_info));
203 			dump_stack();
204 		}
205 	}
206 #endif
207 
208 	/*
209 	 * Every platform is required to implement ppc_md.get_irq.
210 	 * This function will either return an irq number or -1 to
211 	 * indicate there are no more pending.
212 	 * The value -2 is for buggy hardware and means that this IRQ
213 	 * has already been handled. -- Tom
214 	 */
215 	irq = ppc_md.get_irq(regs);
216 
217 	if (irq >= 0) {
218 #ifdef CONFIG_IRQSTACKS
219 		/* Switch to the irq stack to handle this */
220 		curtp = current_thread_info();
221 		irqtp = hardirq_ctx[smp_processor_id()];
222 		if (curtp != irqtp) {
223 			irqtp->task = curtp->task;
224 			irqtp->flags = 0;
225 			call___do_IRQ(irq, regs, irqtp);
226 			irqtp->task = NULL;
227 			if (irqtp->flags)
228 				set_bits(irqtp->flags, &curtp->flags);
229 		} else
230 #endif
231 			__do_IRQ(irq, regs);
232 	} else if (irq != -2)
233 		/* That's not SMP safe ... but who cares ? */
234 		ppc_spurious_interrupts++;
235 
236         irq_exit();
237 
238 #ifdef CONFIG_PPC_ISERIES
239 	if (get_lppaca()->int_dword.fields.decr_int) {
240 		get_lppaca()->int_dword.fields.decr_int = 0;
241 		/* Signal a fake decrementer interrupt */
242 		timer_interrupt(regs);
243 	}
244 #endif
245 }
246 
247 void __init init_IRQ(void)
248 {
249 #ifdef CONFIG_PPC64
250 	static int once = 0;
251 
252 	if (once)
253 		return;
254 
255 	once++;
256 
257 #endif
258 	ppc_md.init_IRQ();
259 #ifdef CONFIG_PPC64
260 	irq_ctx_init();
261 #endif
262 }
263 
264 #ifdef CONFIG_PPC64
265 /*
266  * Virtual IRQ mapping code, used on systems with XICS interrupt controllers.
267  */
268 
269 #define UNDEFINED_IRQ 0xffffffff
270 unsigned int virt_irq_to_real_map[NR_IRQS];
271 
272 /*
273  * Don't use virtual irqs 0, 1, 2 for devices.
274  * The pcnet32 driver considers interrupt numbers < 2 to be invalid,
275  * and 2 is the XICS IPI interrupt.
276  * We limit virtual irqs to __irq_offet_value less than virt_irq_max so
277  * that when we offset them we don't end up with an interrupt
278  * number >= virt_irq_max.
279  */
280 #define MIN_VIRT_IRQ	3
281 
282 unsigned int virt_irq_max;
283 static unsigned int max_virt_irq;
284 static unsigned int nr_virt_irqs;
285 
286 void
287 virt_irq_init(void)
288 {
289 	int i;
290 
291 	if ((virt_irq_max == 0) || (virt_irq_max > (NR_IRQS - 1)))
292 		virt_irq_max = NR_IRQS - 1;
293 	max_virt_irq = virt_irq_max - __irq_offset_value;
294 	nr_virt_irqs = max_virt_irq - MIN_VIRT_IRQ + 1;
295 
296 	for (i = 0; i < NR_IRQS; i++)
297 		virt_irq_to_real_map[i] = UNDEFINED_IRQ;
298 }
299 
300 /* Create a mapping for a real_irq if it doesn't already exist.
301  * Return the virtual irq as a convenience.
302  */
303 int virt_irq_create_mapping(unsigned int real_irq)
304 {
305 	unsigned int virq, first_virq;
306 	static int warned;
307 
308 	if (ppc64_interrupt_controller == IC_OPEN_PIC)
309 		return real_irq;	/* no mapping for openpic (for now) */
310 
311 	if (ppc64_interrupt_controller == IC_CELL_PIC)
312 		return real_irq;	/* no mapping for iic either */
313 
314 	/* don't map interrupts < MIN_VIRT_IRQ */
315 	if (real_irq < MIN_VIRT_IRQ) {
316 		virt_irq_to_real_map[real_irq] = real_irq;
317 		return real_irq;
318 	}
319 
320 	/* map to a number between MIN_VIRT_IRQ and max_virt_irq */
321 	virq = real_irq;
322 	if (virq > max_virt_irq)
323 		virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ;
324 
325 	/* search for this number or a free slot */
326 	first_virq = virq;
327 	while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) {
328 		if (virt_irq_to_real_map[virq] == real_irq)
329 			return virq;
330 		if (++virq > max_virt_irq)
331 			virq = MIN_VIRT_IRQ;
332 		if (virq == first_virq)
333 			goto nospace;	/* oops, no free slots */
334 	}
335 
336 	virt_irq_to_real_map[virq] = real_irq;
337 	return virq;
338 
339  nospace:
340 	if (!warned) {
341 		printk(KERN_CRIT "Interrupt table is full\n");
342 		printk(KERN_CRIT "Increase virt_irq_max (currently %d) "
343 		       "in your kernel sources and rebuild.\n", virt_irq_max);
344 		warned = 1;
345 	}
346 	return NO_IRQ;
347 }
348 
349 /*
350  * In most cases will get a hit on the very first slot checked in the
351  * virt_irq_to_real_map.  Only when there are a large number of
352  * IRQs will this be expensive.
353  */
354 unsigned int real_irq_to_virt_slowpath(unsigned int real_irq)
355 {
356 	unsigned int virq;
357 	unsigned int first_virq;
358 
359 	virq = real_irq;
360 
361 	if (virq > max_virt_irq)
362 		virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ;
363 
364 	first_virq = virq;
365 
366 	do {
367 		if (virt_irq_to_real_map[virq] == real_irq)
368 			return virq;
369 
370 		virq++;
371 
372 		if (virq >= max_virt_irq)
373 			virq = 0;
374 
375 	} while (first_virq != virq);
376 
377 	return NO_IRQ;
378 
379 }
380 #endif /* CONFIG_PPC64 */
381 
382 #ifdef CONFIG_IRQSTACKS
383 struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
384 struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
385 
386 void irq_ctx_init(void)
387 {
388 	struct thread_info *tp;
389 	int i;
390 
391 	for_each_possible_cpu(i) {
392 		memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
393 		tp = softirq_ctx[i];
394 		tp->cpu = i;
395 		tp->preempt_count = SOFTIRQ_OFFSET;
396 
397 		memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
398 		tp = hardirq_ctx[i];
399 		tp->cpu = i;
400 		tp->preempt_count = HARDIRQ_OFFSET;
401 	}
402 }
403 
404 static inline void do_softirq_onstack(void)
405 {
406 	struct thread_info *curtp, *irqtp;
407 
408 	curtp = current_thread_info();
409 	irqtp = softirq_ctx[smp_processor_id()];
410 	irqtp->task = curtp->task;
411 	call_do_softirq(irqtp);
412 	irqtp->task = NULL;
413 }
414 
415 #else
416 #define do_softirq_onstack()	__do_softirq()
417 #endif /* CONFIG_IRQSTACKS */
418 
419 void do_softirq(void)
420 {
421 	unsigned long flags;
422 
423 	if (in_interrupt())
424 		return;
425 
426 	local_irq_save(flags);
427 
428 	if (local_softirq_pending()) {
429 		account_system_vtime(current);
430 		local_bh_disable();
431 		do_softirq_onstack();
432 		account_system_vtime(current);
433 		__local_bh_enable();
434 	}
435 
436 	local_irq_restore(flags);
437 }
438 EXPORT_SYMBOL(do_softirq);
439 
440 #ifdef CONFIG_PCI_MSI
441 int pci_enable_msi(struct pci_dev * pdev)
442 {
443 	if (ppc_md.enable_msi)
444 		return ppc_md.enable_msi(pdev);
445 	else
446 		return -1;
447 }
448 
449 void pci_disable_msi(struct pci_dev * pdev)
450 {
451 	if (ppc_md.disable_msi)
452 		ppc_md.disable_msi(pdev);
453 }
454 
455 void pci_scan_msi_device(struct pci_dev *dev) {}
456 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
457 void pci_disable_msix(struct pci_dev *dev) {}
458 void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
459 void disable_msi_mode(struct pci_dev *dev, int pos, int type) {}
460 void pci_no_msi(void) {}
461 
462 #endif
463 
464 #ifdef CONFIG_PPC64
465 static int __init setup_noirqdistrib(char *str)
466 {
467 	distribute_irqs = 0;
468 	return 1;
469 }
470 
471 __setup("noirqdistrib", setup_noirqdistrib);
472 #endif /* CONFIG_PPC64 */
473