xref: /linux/arch/powerpc/kernel/hw_breakpoint.c (revision 5aae8a53708025d4e718f0d2e7c2f766779ddc71)
1*5aae8a53SK.Prasad /*
2*5aae8a53SK.Prasad  * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
3*5aae8a53SK.Prasad  * using the CPU's debug registers. Derived from
4*5aae8a53SK.Prasad  * "arch/x86/kernel/hw_breakpoint.c"
5*5aae8a53SK.Prasad  *
6*5aae8a53SK.Prasad  * This program is free software; you can redistribute it and/or modify
7*5aae8a53SK.Prasad  * it under the terms of the GNU General Public License as published by
8*5aae8a53SK.Prasad  * the Free Software Foundation; either version 2 of the License, or
9*5aae8a53SK.Prasad  * (at your option) any later version.
10*5aae8a53SK.Prasad  *
11*5aae8a53SK.Prasad  * This program is distributed in the hope that it will be useful,
12*5aae8a53SK.Prasad  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*5aae8a53SK.Prasad  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*5aae8a53SK.Prasad  * GNU General Public License for more details.
15*5aae8a53SK.Prasad  *
16*5aae8a53SK.Prasad  * You should have received a copy of the GNU General Public License
17*5aae8a53SK.Prasad  * along with this program; if not, write to the Free Software
18*5aae8a53SK.Prasad  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19*5aae8a53SK.Prasad  *
20*5aae8a53SK.Prasad  * Copyright 2010 IBM Corporation
21*5aae8a53SK.Prasad  * Author: K.Prasad <prasad@linux.vnet.ibm.com>
22*5aae8a53SK.Prasad  *
23*5aae8a53SK.Prasad  */
24*5aae8a53SK.Prasad 
25*5aae8a53SK.Prasad #include <linux/hw_breakpoint.h>
26*5aae8a53SK.Prasad #include <linux/notifier.h>
27*5aae8a53SK.Prasad #include <linux/kprobes.h>
28*5aae8a53SK.Prasad #include <linux/percpu.h>
29*5aae8a53SK.Prasad #include <linux/kernel.h>
30*5aae8a53SK.Prasad #include <linux/module.h>
31*5aae8a53SK.Prasad #include <linux/sched.h>
32*5aae8a53SK.Prasad #include <linux/init.h>
33*5aae8a53SK.Prasad #include <linux/smp.h>
34*5aae8a53SK.Prasad 
35*5aae8a53SK.Prasad #include <asm/hw_breakpoint.h>
36*5aae8a53SK.Prasad #include <asm/processor.h>
37*5aae8a53SK.Prasad #include <asm/sstep.h>
38*5aae8a53SK.Prasad #include <asm/uaccess.h>
39*5aae8a53SK.Prasad 
40*5aae8a53SK.Prasad /*
41*5aae8a53SK.Prasad  * Stores the breakpoints currently in use on each breakpoint address
42*5aae8a53SK.Prasad  * register for every cpu
43*5aae8a53SK.Prasad  */
44*5aae8a53SK.Prasad static DEFINE_PER_CPU(struct perf_event *, bp_per_reg);
45*5aae8a53SK.Prasad 
46*5aae8a53SK.Prasad /*
47*5aae8a53SK.Prasad  * Install a perf counter breakpoint.
48*5aae8a53SK.Prasad  *
49*5aae8a53SK.Prasad  * We seek a free debug address register and use it for this
50*5aae8a53SK.Prasad  * breakpoint.
51*5aae8a53SK.Prasad  *
52*5aae8a53SK.Prasad  * Atomic: we hold the counter->ctx->lock and we only handle variables
53*5aae8a53SK.Prasad  * and registers local to this cpu.
54*5aae8a53SK.Prasad  */
55*5aae8a53SK.Prasad int arch_install_hw_breakpoint(struct perf_event *bp)
56*5aae8a53SK.Prasad {
57*5aae8a53SK.Prasad 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
58*5aae8a53SK.Prasad 	struct perf_event **slot = &__get_cpu_var(bp_per_reg);
59*5aae8a53SK.Prasad 
60*5aae8a53SK.Prasad 	*slot = bp;
61*5aae8a53SK.Prasad 
62*5aae8a53SK.Prasad 	/*
63*5aae8a53SK.Prasad 	 * Do not install DABR values if the instruction must be single-stepped.
64*5aae8a53SK.Prasad 	 * If so, DABR will be populated in single_step_dabr_instruction().
65*5aae8a53SK.Prasad 	 */
66*5aae8a53SK.Prasad 	if (current->thread.last_hit_ubp != bp)
67*5aae8a53SK.Prasad 		set_dabr(info->address | info->type | DABR_TRANSLATION);
68*5aae8a53SK.Prasad 
69*5aae8a53SK.Prasad 	return 0;
70*5aae8a53SK.Prasad }
71*5aae8a53SK.Prasad 
72*5aae8a53SK.Prasad /*
73*5aae8a53SK.Prasad  * Uninstall the breakpoint contained in the given counter.
74*5aae8a53SK.Prasad  *
75*5aae8a53SK.Prasad  * First we search the debug address register it uses and then we disable
76*5aae8a53SK.Prasad  * it.
77*5aae8a53SK.Prasad  *
78*5aae8a53SK.Prasad  * Atomic: we hold the counter->ctx->lock and we only handle variables
79*5aae8a53SK.Prasad  * and registers local to this cpu.
80*5aae8a53SK.Prasad  */
81*5aae8a53SK.Prasad void arch_uninstall_hw_breakpoint(struct perf_event *bp)
82*5aae8a53SK.Prasad {
83*5aae8a53SK.Prasad 	struct perf_event **slot = &__get_cpu_var(bp_per_reg);
84*5aae8a53SK.Prasad 
85*5aae8a53SK.Prasad 	if (*slot != bp) {
86*5aae8a53SK.Prasad 		WARN_ONCE(1, "Can't find the breakpoint");
87*5aae8a53SK.Prasad 		return;
88*5aae8a53SK.Prasad 	}
89*5aae8a53SK.Prasad 
90*5aae8a53SK.Prasad 	*slot = NULL;
91*5aae8a53SK.Prasad 	set_dabr(0);
92*5aae8a53SK.Prasad }
93*5aae8a53SK.Prasad 
94*5aae8a53SK.Prasad /*
95*5aae8a53SK.Prasad  * Perform cleanup of arch-specific counters during unregistration
96*5aae8a53SK.Prasad  * of the perf-event
97*5aae8a53SK.Prasad  */
98*5aae8a53SK.Prasad void arch_unregister_hw_breakpoint(struct perf_event *bp)
99*5aae8a53SK.Prasad {
100*5aae8a53SK.Prasad 	/*
101*5aae8a53SK.Prasad 	 * If the breakpoint is unregistered between a hw_breakpoint_handler()
102*5aae8a53SK.Prasad 	 * and the single_step_dabr_instruction(), then cleanup the breakpoint
103*5aae8a53SK.Prasad 	 * restoration variables to prevent dangling pointers.
104*5aae8a53SK.Prasad 	 */
105*5aae8a53SK.Prasad 	if (bp->ctx->task)
106*5aae8a53SK.Prasad 		bp->ctx->task->thread.last_hit_ubp = NULL;
107*5aae8a53SK.Prasad }
108*5aae8a53SK.Prasad 
109*5aae8a53SK.Prasad /*
110*5aae8a53SK.Prasad  * Check for virtual address in kernel space.
111*5aae8a53SK.Prasad  */
112*5aae8a53SK.Prasad int arch_check_bp_in_kernelspace(struct perf_event *bp)
113*5aae8a53SK.Prasad {
114*5aae8a53SK.Prasad 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
115*5aae8a53SK.Prasad 
116*5aae8a53SK.Prasad 	return is_kernel_addr(info->address);
117*5aae8a53SK.Prasad }
118*5aae8a53SK.Prasad 
119*5aae8a53SK.Prasad int arch_bp_generic_fields(int type, int *gen_bp_type)
120*5aae8a53SK.Prasad {
121*5aae8a53SK.Prasad 	switch (type) {
122*5aae8a53SK.Prasad 	case DABR_DATA_READ:
123*5aae8a53SK.Prasad 		*gen_bp_type = HW_BREAKPOINT_R;
124*5aae8a53SK.Prasad 		break;
125*5aae8a53SK.Prasad 	case DABR_DATA_WRITE:
126*5aae8a53SK.Prasad 		*gen_bp_type = HW_BREAKPOINT_W;
127*5aae8a53SK.Prasad 		break;
128*5aae8a53SK.Prasad 	case (DABR_DATA_WRITE | DABR_DATA_READ):
129*5aae8a53SK.Prasad 		*gen_bp_type = (HW_BREAKPOINT_W | HW_BREAKPOINT_R);
130*5aae8a53SK.Prasad 		break;
131*5aae8a53SK.Prasad 	default:
132*5aae8a53SK.Prasad 		return -EINVAL;
133*5aae8a53SK.Prasad 	}
134*5aae8a53SK.Prasad 	return 0;
135*5aae8a53SK.Prasad }
136*5aae8a53SK.Prasad 
137*5aae8a53SK.Prasad /*
138*5aae8a53SK.Prasad  * Validate the arch-specific HW Breakpoint register settings
139*5aae8a53SK.Prasad  */
140*5aae8a53SK.Prasad int arch_validate_hwbkpt_settings(struct perf_event *bp)
141*5aae8a53SK.Prasad {
142*5aae8a53SK.Prasad 	int ret = -EINVAL;
143*5aae8a53SK.Prasad 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
144*5aae8a53SK.Prasad 
145*5aae8a53SK.Prasad 	if (!bp)
146*5aae8a53SK.Prasad 		return ret;
147*5aae8a53SK.Prasad 
148*5aae8a53SK.Prasad 	switch (bp->attr.bp_type) {
149*5aae8a53SK.Prasad 	case HW_BREAKPOINT_R:
150*5aae8a53SK.Prasad 		info->type = DABR_DATA_READ;
151*5aae8a53SK.Prasad 		break;
152*5aae8a53SK.Prasad 	case HW_BREAKPOINT_W:
153*5aae8a53SK.Prasad 		info->type = DABR_DATA_WRITE;
154*5aae8a53SK.Prasad 		break;
155*5aae8a53SK.Prasad 	case HW_BREAKPOINT_R | HW_BREAKPOINT_W:
156*5aae8a53SK.Prasad 		info->type = (DABR_DATA_READ | DABR_DATA_WRITE);
157*5aae8a53SK.Prasad 		break;
158*5aae8a53SK.Prasad 	default:
159*5aae8a53SK.Prasad 		return ret;
160*5aae8a53SK.Prasad 	}
161*5aae8a53SK.Prasad 
162*5aae8a53SK.Prasad 	info->address = bp->attr.bp_addr;
163*5aae8a53SK.Prasad 	info->len = bp->attr.bp_len;
164*5aae8a53SK.Prasad 
165*5aae8a53SK.Prasad 	/*
166*5aae8a53SK.Prasad 	 * Since breakpoint length can be a maximum of HW_BREAKPOINT_LEN(8)
167*5aae8a53SK.Prasad 	 * and breakpoint addresses are aligned to nearest double-word
168*5aae8a53SK.Prasad 	 * HW_BREAKPOINT_ALIGN by rounding off to the lower address, the
169*5aae8a53SK.Prasad 	 * 'symbolsize' should satisfy the check below.
170*5aae8a53SK.Prasad 	 */
171*5aae8a53SK.Prasad 	if (info->len >
172*5aae8a53SK.Prasad 	    (HW_BREAKPOINT_LEN - (info->address & HW_BREAKPOINT_ALIGN)))
173*5aae8a53SK.Prasad 		return -EINVAL;
174*5aae8a53SK.Prasad 	return 0;
175*5aae8a53SK.Prasad }
176*5aae8a53SK.Prasad 
177*5aae8a53SK.Prasad /*
178*5aae8a53SK.Prasad  * Handle debug exception notifications.
179*5aae8a53SK.Prasad  */
180*5aae8a53SK.Prasad int __kprobes hw_breakpoint_handler(struct die_args *args)
181*5aae8a53SK.Prasad {
182*5aae8a53SK.Prasad 	bool is_ptrace_bp = false;
183*5aae8a53SK.Prasad 	int rc = NOTIFY_STOP;
184*5aae8a53SK.Prasad 	struct perf_event *bp;
185*5aae8a53SK.Prasad 	struct pt_regs *regs = args->regs;
186*5aae8a53SK.Prasad 	int stepped = 1;
187*5aae8a53SK.Prasad 	struct arch_hw_breakpoint *info;
188*5aae8a53SK.Prasad 	unsigned int instr;
189*5aae8a53SK.Prasad 
190*5aae8a53SK.Prasad 	/* Disable breakpoints during exception handling */
191*5aae8a53SK.Prasad 	set_dabr(0);
192*5aae8a53SK.Prasad 	/*
193*5aae8a53SK.Prasad 	 * The counter may be concurrently released but that can only
194*5aae8a53SK.Prasad 	 * occur from a call_rcu() path. We can then safely fetch
195*5aae8a53SK.Prasad 	 * the breakpoint, use its callback, touch its counter
196*5aae8a53SK.Prasad 	 * while we are in an rcu_read_lock() path.
197*5aae8a53SK.Prasad 	 */
198*5aae8a53SK.Prasad 	rcu_read_lock();
199*5aae8a53SK.Prasad 
200*5aae8a53SK.Prasad 	bp = __get_cpu_var(bp_per_reg);
201*5aae8a53SK.Prasad 	if (!bp)
202*5aae8a53SK.Prasad 		goto out;
203*5aae8a53SK.Prasad 	info = counter_arch_bp(bp);
204*5aae8a53SK.Prasad 	is_ptrace_bp = (bp->overflow_handler == ptrace_triggered) ?
205*5aae8a53SK.Prasad 			true : false;
206*5aae8a53SK.Prasad 
207*5aae8a53SK.Prasad 	/*
208*5aae8a53SK.Prasad 	 * Return early after invoking user-callback function without restoring
209*5aae8a53SK.Prasad 	 * DABR if the breakpoint is from ptrace which always operates in
210*5aae8a53SK.Prasad 	 * one-shot mode. The ptrace-ed process will receive the SIGTRAP signal
211*5aae8a53SK.Prasad 	 * generated in do_dabr().
212*5aae8a53SK.Prasad 	 */
213*5aae8a53SK.Prasad 	if (is_ptrace_bp) {
214*5aae8a53SK.Prasad 		perf_bp_event(bp, regs);
215*5aae8a53SK.Prasad 		rc = NOTIFY_DONE;
216*5aae8a53SK.Prasad 		goto out;
217*5aae8a53SK.Prasad 	}
218*5aae8a53SK.Prasad 
219*5aae8a53SK.Prasad 	/* Do not emulate user-space instructions, instead single-step them */
220*5aae8a53SK.Prasad 	if (user_mode(regs)) {
221*5aae8a53SK.Prasad 		bp->ctx->task->thread.last_hit_ubp = bp;
222*5aae8a53SK.Prasad 		regs->msr |= MSR_SE;
223*5aae8a53SK.Prasad 		goto out;
224*5aae8a53SK.Prasad 	}
225*5aae8a53SK.Prasad 
226*5aae8a53SK.Prasad 	stepped = 0;
227*5aae8a53SK.Prasad 	instr = 0;
228*5aae8a53SK.Prasad 	if (!__get_user_inatomic(instr, (unsigned int *) regs->nip))
229*5aae8a53SK.Prasad 		stepped = emulate_step(regs, instr);
230*5aae8a53SK.Prasad 
231*5aae8a53SK.Prasad 	/*
232*5aae8a53SK.Prasad 	 * emulate_step() could not execute it. We've failed in reliably
233*5aae8a53SK.Prasad 	 * handling the hw-breakpoint. Unregister it and throw a warning
234*5aae8a53SK.Prasad 	 * message to let the user know about it.
235*5aae8a53SK.Prasad 	 */
236*5aae8a53SK.Prasad 	if (!stepped) {
237*5aae8a53SK.Prasad 		WARN(1, "Unable to handle hardware breakpoint. Breakpoint at "
238*5aae8a53SK.Prasad 			"0x%lx will be disabled.", info->address);
239*5aae8a53SK.Prasad 		perf_event_disable(bp);
240*5aae8a53SK.Prasad 		goto out;
241*5aae8a53SK.Prasad 	}
242*5aae8a53SK.Prasad 	/*
243*5aae8a53SK.Prasad 	 * As a policy, the callback is invoked in a 'trigger-after-execute'
244*5aae8a53SK.Prasad 	 * fashion
245*5aae8a53SK.Prasad 	 */
246*5aae8a53SK.Prasad 	perf_bp_event(bp, regs);
247*5aae8a53SK.Prasad 
248*5aae8a53SK.Prasad 	set_dabr(info->address | info->type | DABR_TRANSLATION);
249*5aae8a53SK.Prasad out:
250*5aae8a53SK.Prasad 	rcu_read_unlock();
251*5aae8a53SK.Prasad 	return rc;
252*5aae8a53SK.Prasad }
253*5aae8a53SK.Prasad 
254*5aae8a53SK.Prasad /*
255*5aae8a53SK.Prasad  * Handle single-step exceptions following a DABR hit.
256*5aae8a53SK.Prasad  */
257*5aae8a53SK.Prasad int __kprobes single_step_dabr_instruction(struct die_args *args)
258*5aae8a53SK.Prasad {
259*5aae8a53SK.Prasad 	struct pt_regs *regs = args->regs;
260*5aae8a53SK.Prasad 	struct perf_event *bp = NULL;
261*5aae8a53SK.Prasad 	struct arch_hw_breakpoint *bp_info;
262*5aae8a53SK.Prasad 
263*5aae8a53SK.Prasad 	bp = current->thread.last_hit_ubp;
264*5aae8a53SK.Prasad 	/*
265*5aae8a53SK.Prasad 	 * Check if we are single-stepping as a result of a
266*5aae8a53SK.Prasad 	 * previous HW Breakpoint exception
267*5aae8a53SK.Prasad 	 */
268*5aae8a53SK.Prasad 	if (!bp)
269*5aae8a53SK.Prasad 		return NOTIFY_DONE;
270*5aae8a53SK.Prasad 
271*5aae8a53SK.Prasad 	bp_info = counter_arch_bp(bp);
272*5aae8a53SK.Prasad 
273*5aae8a53SK.Prasad 	/*
274*5aae8a53SK.Prasad 	 * We shall invoke the user-defined callback function in the single
275*5aae8a53SK.Prasad 	 * stepping handler to confirm to 'trigger-after-execute' semantics
276*5aae8a53SK.Prasad 	 */
277*5aae8a53SK.Prasad 	perf_bp_event(bp, regs);
278*5aae8a53SK.Prasad 
279*5aae8a53SK.Prasad 	/*
280*5aae8a53SK.Prasad 	 * Do not disable MSR_SE if the process was already in
281*5aae8a53SK.Prasad 	 * single-stepping mode.
282*5aae8a53SK.Prasad 	 */
283*5aae8a53SK.Prasad 	if (!test_thread_flag(TIF_SINGLESTEP))
284*5aae8a53SK.Prasad 		regs->msr &= ~MSR_SE;
285*5aae8a53SK.Prasad 
286*5aae8a53SK.Prasad 	set_dabr(bp_info->address | bp_info->type | DABR_TRANSLATION);
287*5aae8a53SK.Prasad 	current->thread.last_hit_ubp = NULL;
288*5aae8a53SK.Prasad 	return NOTIFY_STOP;
289*5aae8a53SK.Prasad }
290*5aae8a53SK.Prasad 
291*5aae8a53SK.Prasad /*
292*5aae8a53SK.Prasad  * Handle debug exception notifications.
293*5aae8a53SK.Prasad  */
294*5aae8a53SK.Prasad int __kprobes hw_breakpoint_exceptions_notify(
295*5aae8a53SK.Prasad 		struct notifier_block *unused, unsigned long val, void *data)
296*5aae8a53SK.Prasad {
297*5aae8a53SK.Prasad 	int ret = NOTIFY_DONE;
298*5aae8a53SK.Prasad 
299*5aae8a53SK.Prasad 	switch (val) {
300*5aae8a53SK.Prasad 	case DIE_DABR_MATCH:
301*5aae8a53SK.Prasad 		ret = hw_breakpoint_handler(data);
302*5aae8a53SK.Prasad 		break;
303*5aae8a53SK.Prasad 	case DIE_SSTEP:
304*5aae8a53SK.Prasad 		ret = single_step_dabr_instruction(data);
305*5aae8a53SK.Prasad 		break;
306*5aae8a53SK.Prasad 	}
307*5aae8a53SK.Prasad 
308*5aae8a53SK.Prasad 	return ret;
309*5aae8a53SK.Prasad }
310*5aae8a53SK.Prasad 
311*5aae8a53SK.Prasad /*
312*5aae8a53SK.Prasad  * Release the user breakpoints used by ptrace
313*5aae8a53SK.Prasad  */
314*5aae8a53SK.Prasad void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
315*5aae8a53SK.Prasad {
316*5aae8a53SK.Prasad 	struct thread_struct *t = &tsk->thread;
317*5aae8a53SK.Prasad 
318*5aae8a53SK.Prasad 	unregister_hw_breakpoint(t->ptrace_bps[0]);
319*5aae8a53SK.Prasad 	t->ptrace_bps[0] = NULL;
320*5aae8a53SK.Prasad }
321*5aae8a53SK.Prasad 
322*5aae8a53SK.Prasad void hw_breakpoint_pmu_read(struct perf_event *bp)
323*5aae8a53SK.Prasad {
324*5aae8a53SK.Prasad 	/* TODO */
325*5aae8a53SK.Prasad }
326