1/* 2 * PowerPC version 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 4 * 5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 7 * Adapted for Power Macintosh by Paul Mackerras. 8 * Low-level exception handlers and MMU support 9 * rewritten by Paul Mackerras. 10 * Copyright (C) 1996 Paul Mackerras. 11 * 12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 14 * 15 * This file contains the entry point for the 64-bit kernel along 16 * with some early initialization code common to all 64-bit powerpc 17 * variants. 18 * 19 * This program is free software; you can redistribute it and/or 20 * modify it under the terms of the GNU General Public License 21 * as published by the Free Software Foundation; either version 22 * 2 of the License, or (at your option) any later version. 23 */ 24 25#include <linux/threads.h> 26#include <asm/reg.h> 27#include <asm/page.h> 28#include <asm/mmu.h> 29#include <asm/ppc_asm.h> 30#include <asm/asm-offsets.h> 31#include <asm/bug.h> 32#include <asm/cputable.h> 33#include <asm/setup.h> 34#include <asm/hvcall.h> 35#include <asm/iseries/lpar_map.h> 36#include <asm/thread_info.h> 37#include <asm/firmware.h> 38#include <asm/page_64.h> 39#include <asm/irqflags.h> 40#include <asm/kvm_book3s_asm.h> 41 42/* The physical memory is layed out such that the secondary processor 43 * spin code sits at 0x0000...0x00ff. On server, the vectors follow 44 * using the layout described in exceptions-64s.S 45 */ 46 47/* 48 * Entering into this code we make the following assumptions: 49 * 50 * For pSeries or server processors: 51 * 1. The MMU is off & open firmware is running in real mode. 52 * 2. The kernel is entered at __start 53 * 54 * For iSeries: 55 * 1. The MMU is on (as it always is for iSeries) 56 * 2. The kernel is entered at system_reset_iSeries 57 * 58 * For Book3E processors: 59 * 1. The MMU is on running in AS0 in a state defined in ePAPR 60 * 2. The kernel is entered at __start 61 */ 62 63 .text 64 .globl _stext 65_stext: 66_GLOBAL(__start) 67 /* NOP this out unconditionally */ 68BEGIN_FTR_SECTION 69 b .__start_initialization_multiplatform 70END_FTR_SECTION(0, 1) 71 72 /* Catch branch to 0 in real mode */ 73 trap 74 75 /* Secondary processors spin on this value until it becomes nonzero. 76 * When it does it contains the real address of the descriptor 77 * of the function that the cpu should jump to to continue 78 * initialization. 79 */ 80 .globl __secondary_hold_spinloop 81__secondary_hold_spinloop: 82 .llong 0x0 83 84 /* Secondary processors write this value with their cpu # */ 85 /* after they enter the spin loop immediately below. */ 86 .globl __secondary_hold_acknowledge 87__secondary_hold_acknowledge: 88 .llong 0x0 89 90#ifdef CONFIG_PPC_ISERIES 91 /* 92 * At offset 0x20, there is a pointer to iSeries LPAR data. 93 * This is required by the hypervisor 94 */ 95 . = 0x20 96 .llong hvReleaseData-KERNELBASE 97#endif /* CONFIG_PPC_ISERIES */ 98 99#ifdef CONFIG_CRASH_DUMP 100 /* This flag is set to 1 by a loader if the kernel should run 101 * at the loaded address instead of the linked address. This 102 * is used by kexec-tools to keep the the kdump kernel in the 103 * crash_kernel region. The loader is responsible for 104 * observing the alignment requirement. 105 */ 106 /* Do not move this variable as kexec-tools knows about it. */ 107 . = 0x5c 108 .globl __run_at_load 109__run_at_load: 110 .long 0x72756e30 /* "run0" -- relocate to 0 by default */ 111#endif 112 113 . = 0x60 114/* 115 * The following code is used to hold secondary processors 116 * in a spin loop after they have entered the kernel, but 117 * before the bulk of the kernel has been relocated. This code 118 * is relocated to physical address 0x60 before prom_init is run. 119 * All of it must fit below the first exception vector at 0x100. 120 * Use .globl here not _GLOBAL because we want __secondary_hold 121 * to be the actual text address, not a descriptor. 122 */ 123 .globl __secondary_hold 124__secondary_hold: 125#ifndef CONFIG_PPC_BOOK3E 126 mfmsr r24 127 ori r24,r24,MSR_RI 128 mtmsrd r24 /* RI on */ 129#endif 130 /* Grab our physical cpu number */ 131 mr r24,r3 132 133 /* Tell the master cpu we're here */ 134 /* Relocation is off & we are located at an address less */ 135 /* than 0x100, so only need to grab low order offset. */ 136 std r24,__secondary_hold_acknowledge-_stext(0) 137 sync 138 139 /* All secondary cpus wait here until told to start. */ 140100: ld r4,__secondary_hold_spinloop-_stext(0) 141 cmpdi 0,r4,0 142 beq 100b 143 144#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 145 ld r4,0(r4) /* deref function descriptor */ 146 mtctr r4 147 mr r3,r24 148 li r4,0 149 bctr 150#else 151 BUG_OPCODE 152#endif 153 154/* This value is used to mark exception frames on the stack. */ 155 .section ".toc","aw" 156exception_marker: 157 .tc ID_72656773_68657265[TC],0x7265677368657265 158 .text 159 160/* 161 * On server, we include the exception vectors code here as it 162 * relies on absolute addressing which is only possible within 163 * this compilation unit 164 */ 165#ifdef CONFIG_PPC_BOOK3S 166#include "exceptions-64s.S" 167#endif 168 169_GLOBAL(generic_secondary_thread_init) 170 mr r24,r3 171 172 /* turn on 64-bit mode */ 173 bl .enable_64b_mode 174 175 /* get a valid TOC pointer, wherever we're mapped at */ 176 bl .relative_toc 177 178#ifdef CONFIG_PPC_BOOK3E 179 /* Book3E initialization */ 180 mr r3,r24 181 bl .book3e_secondary_thread_init 182#endif 183 b generic_secondary_common_init 184 185/* 186 * On pSeries and most other platforms, secondary processors spin 187 * in the following code. 188 * At entry, r3 = this processor's number (physical cpu id) 189 * 190 * On Book3E, r4 = 1 to indicate that the initial TLB entry for 191 * this core already exists (setup via some other mechanism such 192 * as SCOM before entry). 193 */ 194_GLOBAL(generic_secondary_smp_init) 195 mr r24,r3 196 mr r25,r4 197 198 /* turn on 64-bit mode */ 199 bl .enable_64b_mode 200 201 /* get a valid TOC pointer, wherever we're mapped at */ 202 bl .relative_toc 203 204#ifdef CONFIG_PPC_BOOK3E 205 /* Book3E initialization */ 206 mr r3,r24 207 mr r4,r25 208 bl .book3e_secondary_core_init 209#endif 210 211generic_secondary_common_init: 212 /* Set up a paca value for this processor. Since we have the 213 * physical cpu id in r24, we need to search the pacas to find 214 * which logical id maps to our physical one. 215 */ 216 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */ 217 ld r13,0(r13) /* Get base vaddr of paca array */ 218 li r5,0 /* logical cpu id */ 2191: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 220 cmpw r6,r24 /* Compare to our id */ 221 beq 2f 222 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */ 223 addi r5,r5,1 224 cmpwi r5,NR_CPUS 225 blt 1b 226 227 mr r3,r24 /* not found, copy phys to r3 */ 228 b .kexec_wait /* next kernel might do better */ 229 2302: mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG */ 231#ifdef CONFIG_PPC_BOOK3E 232 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */ 233 mtspr SPRN_SPRG_TLB_EXFRAME,r12 234#endif 235 236 /* From now on, r24 is expected to be logical cpuid */ 237 mr r24,r5 2383: HMT_LOW 239 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ 240 /* start. */ 241 242#ifndef CONFIG_SMP 243 b 3b /* Never go on non-SMP */ 244#else 245 cmpwi 0,r23,0 246 beq 3b /* Loop until told to go */ 247 248 sync /* order paca.run and cur_cpu_spec */ 249 250 /* See if we need to call a cpu state restore handler */ 251 LOAD_REG_ADDR(r23, cur_cpu_spec) 252 ld r23,0(r23) 253 ld r23,CPU_SPEC_RESTORE(r23) 254 cmpdi 0,r23,0 255 beq 4f 256 ld r23,0(r23) 257 mtctr r23 258 bctrl 259 2604: /* Create a temp kernel stack for use before relocation is on. */ 261 ld r1,PACAEMERGSP(r13) 262 subi r1,r1,STACK_FRAME_OVERHEAD 263 264 b __secondary_start 265#endif 266 267/* 268 * Turn the MMU off. 269 * Assumes we're mapped EA == RA if the MMU is on. 270 */ 271#ifdef CONFIG_PPC_BOOK3S 272_STATIC(__mmu_off) 273 mfmsr r3 274 andi. r0,r3,MSR_IR|MSR_DR 275 beqlr 276 mflr r4 277 andc r3,r3,r0 278 mtspr SPRN_SRR0,r4 279 mtspr SPRN_SRR1,r3 280 sync 281 rfid 282 b . /* prevent speculative execution */ 283#endif 284 285 286/* 287 * Here is our main kernel entry point. We support currently 2 kind of entries 288 * depending on the value of r5. 289 * 290 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content 291 * in r3...r7 292 * 293 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the 294 * DT block, r4 is a physical pointer to the kernel itself 295 * 296 */ 297_GLOBAL(__start_initialization_multiplatform) 298 /* Make sure we are running in 64 bits mode */ 299 bl .enable_64b_mode 300 301 /* Get TOC pointer (current runtime address) */ 302 bl .relative_toc 303 304 /* find out where we are now */ 305 bcl 20,31,$+4 3060: mflr r26 /* r26 = runtime addr here */ 307 addis r26,r26,(_stext - 0b)@ha 308 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */ 309 310 /* 311 * Are we booted from a PROM Of-type client-interface ? 312 */ 313 cmpldi cr0,r5,0 314 beq 1f 315 b .__boot_from_prom /* yes -> prom */ 3161: 317 /* Save parameters */ 318 mr r31,r3 319 mr r30,r4 320 321#ifdef CONFIG_PPC_BOOK3E 322 bl .start_initialization_book3e 323 b .__after_prom_start 324#else 325 /* Setup some critical 970 SPRs before switching MMU off */ 326 mfspr r0,SPRN_PVR 327 srwi r0,r0,16 328 cmpwi r0,0x39 /* 970 */ 329 beq 1f 330 cmpwi r0,0x3c /* 970FX */ 331 beq 1f 332 cmpwi r0,0x44 /* 970MP */ 333 beq 1f 334 cmpwi r0,0x45 /* 970GX */ 335 bne 2f 3361: bl .__cpu_preinit_ppc970 3372: 338 339 /* Switch off MMU if not already off */ 340 bl .__mmu_off 341 b .__after_prom_start 342#endif /* CONFIG_PPC_BOOK3E */ 343 344_INIT_STATIC(__boot_from_prom) 345#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE 346 /* Save parameters */ 347 mr r31,r3 348 mr r30,r4 349 mr r29,r5 350 mr r28,r6 351 mr r27,r7 352 353 /* 354 * Align the stack to 16-byte boundary 355 * Depending on the size and layout of the ELF sections in the initial 356 * boot binary, the stack pointer may be unaligned on PowerMac 357 */ 358 rldicr r1,r1,0,59 359 360#ifdef CONFIG_RELOCATABLE 361 /* Relocate code for where we are now */ 362 mr r3,r26 363 bl .relocate 364#endif 365 366 /* Restore parameters */ 367 mr r3,r31 368 mr r4,r30 369 mr r5,r29 370 mr r6,r28 371 mr r7,r27 372 373 /* Do all of the interaction with OF client interface */ 374 mr r8,r26 375 bl .prom_init 376#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */ 377 378 /* We never return. We also hit that trap if trying to boot 379 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */ 380 trap 381 382_STATIC(__after_prom_start) 383#ifdef CONFIG_RELOCATABLE 384 /* process relocations for the final address of the kernel */ 385 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */ 386 sldi r25,r25,32 387#ifdef CONFIG_CRASH_DUMP 388 lwz r7,__run_at_load-_stext(r26) 389 cmplwi cr0,r7,1 /* kdump kernel ? - stay where we are */ 390 bne 1f 391 add r25,r25,r26 392#endif 3931: mr r3,r25 394 bl .relocate 395#endif 396 397/* 398 * We need to run with _stext at physical address PHYSICAL_START. 399 * This will leave some code in the first 256B of 400 * real memory, which are reserved for software use. 401 * 402 * Note: This process overwrites the OF exception vectors. 403 */ 404 li r3,0 /* target addr */ 405#ifdef CONFIG_PPC_BOOK3E 406 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */ 407#endif 408 mr. r4,r26 /* In some cases the loader may */ 409 beq 9f /* have already put us at zero */ 410 li r6,0x100 /* Start offset, the first 0x100 */ 411 /* bytes were copied earlier. */ 412#ifdef CONFIG_PPC_BOOK3E 413 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */ 414#endif 415 416#ifdef CONFIG_CRASH_DUMP 417/* 418 * Check if the kernel has to be running as relocatable kernel based on the 419 * variable __run_at_load, if it is set the kernel is treated as relocatable 420 * kernel, otherwise it will be moved to PHYSICAL_START 421 */ 422 lwz r7,__run_at_load-_stext(r26) 423 cmplwi cr0,r7,1 424 bne 3f 425 426 li r5,__end_interrupts - _stext /* just copy interrupts */ 427 b 5f 4283: 429#endif 430 lis r5,(copy_to_here - _stext)@ha 431 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */ 432 433 bl .copy_and_flush /* copy the first n bytes */ 434 /* this includes the code being */ 435 /* executed here. */ 436 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */ 437 addi r8,r8,(4f - _stext)@l /* that we just made */ 438 mtctr r8 439 bctr 440 441p_end: .llong _end - _stext 442 4434: /* Now copy the rest of the kernel up to _end */ 444 addis r5,r26,(p_end - _stext)@ha 445 ld r5,(p_end - _stext)@l(r5) /* get _end */ 4465: bl .copy_and_flush /* copy the rest */ 447 4489: b .start_here_multiplatform 449 450/* 451 * Copy routine used to copy the kernel to start at physical address 0 452 * and flush and invalidate the caches as needed. 453 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset 454 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5. 455 * 456 * Note: this routine *only* clobbers r0, r6 and lr 457 */ 458_GLOBAL(copy_and_flush) 459 addi r5,r5,-8 460 addi r6,r6,-8 4614: li r0,8 /* Use the smallest common */ 462 /* denominator cache line */ 463 /* size. This results in */ 464 /* extra cache line flushes */ 465 /* but operation is correct. */ 466 /* Can't get cache line size */ 467 /* from NACA as it is being */ 468 /* moved too. */ 469 470 mtctr r0 /* put # words/line in ctr */ 4713: addi r6,r6,8 /* copy a cache line */ 472 ldx r0,r6,r4 473 stdx r0,r6,r3 474 bdnz 3b 475 dcbst r6,r3 /* write it to memory */ 476 sync 477 icbi r6,r3 /* flush the icache line */ 478 cmpld 0,r6,r5 479 blt 4b 480 sync 481 addi r5,r5,8 482 addi r6,r6,8 483 blr 484 485.align 8 486copy_to_here: 487 488#ifdef CONFIG_SMP 489#ifdef CONFIG_PPC_PMAC 490/* 491 * On PowerMac, secondary processors starts from the reset vector, which 492 * is temporarily turned into a call to one of the functions below. 493 */ 494 .section ".text"; 495 .align 2 ; 496 497 .globl __secondary_start_pmac_0 498__secondary_start_pmac_0: 499 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ 500 li r24,0 501 b 1f 502 li r24,1 503 b 1f 504 li r24,2 505 b 1f 506 li r24,3 5071: 508 509_GLOBAL(pmac_secondary_start) 510 /* turn on 64-bit mode */ 511 bl .enable_64b_mode 512 513 li r0,0 514 mfspr r3,SPRN_HID4 515 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */ 516 sync 517 mtspr SPRN_HID4,r3 518 isync 519 sync 520 slbia 521 522 /* get TOC pointer (real address) */ 523 bl .relative_toc 524 525 /* Copy some CPU settings from CPU 0 */ 526 bl .__restore_cpu_ppc970 527 528 /* pSeries do that early though I don't think we really need it */ 529 mfmsr r3 530 ori r3,r3,MSR_RI 531 mtmsrd r3 /* RI on */ 532 533 /* Set up a paca value for this processor. */ 534 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */ 535 ld r4,0(r4) /* Get base vaddr of paca array */ 536 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */ 537 add r13,r13,r4 /* for this processor. */ 538 mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG*/ 539 540 /* Create a temp kernel stack for use before relocation is on. */ 541 ld r1,PACAEMERGSP(r13) 542 subi r1,r1,STACK_FRAME_OVERHEAD 543 544 b __secondary_start 545 546#endif /* CONFIG_PPC_PMAC */ 547 548/* 549 * This function is called after the master CPU has released the 550 * secondary processors. The execution environment is relocation off. 551 * The paca for this processor has the following fields initialized at 552 * this point: 553 * 1. Processor number 554 * 2. Segment table pointer (virtual address) 555 * On entry the following are set: 556 * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries 557 * r24 = cpu# (in Linux terms) 558 * r13 = paca virtual address 559 * SPRG_PACA = paca virtual address 560 */ 561 .section ".text"; 562 .align 2 ; 563 564 .globl __secondary_start 565__secondary_start: 566 /* Set thread priority to MEDIUM */ 567 HMT_MEDIUM 568 569 /* Initialize the kernel stack. Just a repeat for iSeries. */ 570 LOAD_REG_ADDR(r3, current_set) 571 sldi r28,r24,3 /* get current_set[cpu#] */ 572 ldx r14,r3,r28 573 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD 574 std r14,PACAKSAVE(r13) 575 576 /* Do early setup for that CPU (stab, slb, hash table pointer) */ 577 bl .early_setup_secondary 578 579 /* 580 * setup the new stack pointer, but *don't* use this until 581 * translation is on. 582 */ 583 mr r1, r14 584 585 /* Clear backchain so we get nice backtraces */ 586 li r7,0 587 mtlr r7 588 589 /* enable MMU and jump to start_secondary */ 590 LOAD_REG_ADDR(r3, .start_secondary_prolog) 591 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) 592#ifdef CONFIG_PPC_ISERIES 593BEGIN_FW_FTR_SECTION 594 ori r4,r4,MSR_EE 595 li r8,1 596 stb r8,PACAHARDIRQEN(r13) 597END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) 598#endif 599BEGIN_FW_FTR_SECTION 600 stb r7,PACAHARDIRQEN(r13) 601END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) 602 stb r7,PACASOFTIRQEN(r13) 603 604 mtspr SPRN_SRR0,r3 605 mtspr SPRN_SRR1,r4 606 RFI 607 b . /* prevent speculative execution */ 608 609/* 610 * Running with relocation on at this point. All we want to do is 611 * zero the stack back-chain pointer and get the TOC virtual address 612 * before going into C code. 613 */ 614_GLOBAL(start_secondary_prolog) 615 ld r2,PACATOC(r13) 616 li r3,0 617 std r3,0(r1) /* Zero the stack frame pointer */ 618 bl .start_secondary 619 b . 620/* 621 * Reset stack pointer and call start_secondary 622 * to continue with online operation when woken up 623 * from cede in cpu offline. 624 */ 625_GLOBAL(start_secondary_resume) 626 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */ 627 li r3,0 628 std r3,0(r1) /* Zero the stack frame pointer */ 629 bl .start_secondary 630 b . 631#endif 632 633/* 634 * This subroutine clobbers r11 and r12 635 */ 636_GLOBAL(enable_64b_mode) 637 mfmsr r11 /* grab the current MSR */ 638#ifdef CONFIG_PPC_BOOK3E 639 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */ 640 mtmsr r11 641#else /* CONFIG_PPC_BOOK3E */ 642 li r12,(MSR_SF | MSR_ISF)@highest 643 sldi r12,r12,48 644 or r11,r11,r12 645 mtmsrd r11 646 isync 647#endif 648 blr 649 650/* 651 * This puts the TOC pointer into r2, offset by 0x8000 (as expected 652 * by the toolchain). It computes the correct value for wherever we 653 * are running at the moment, using position-independent code. 654 */ 655_GLOBAL(relative_toc) 656 mflr r0 657 bcl 20,31,$+4 6580: mflr r9 659 ld r2,(p_toc - 0b)(r9) 660 add r2,r2,r9 661 mtlr r0 662 blr 663 664p_toc: .llong __toc_start + 0x8000 - 0b 665 666/* 667 * This is where the main kernel code starts. 668 */ 669_INIT_STATIC(start_here_multiplatform) 670 /* set up the TOC (real address) */ 671 bl .relative_toc 672 673 /* Clear out the BSS. It may have been done in prom_init, 674 * already but that's irrelevant since prom_init will soon 675 * be detached from the kernel completely. Besides, we need 676 * to clear it now for kexec-style entry. 677 */ 678 LOAD_REG_ADDR(r11,__bss_stop) 679 LOAD_REG_ADDR(r8,__bss_start) 680 sub r11,r11,r8 /* bss size */ 681 addi r11,r11,7 /* round up to an even double word */ 682 srdi. r11,r11,3 /* shift right by 3 */ 683 beq 4f 684 addi r8,r8,-8 685 li r0,0 686 mtctr r11 /* zero this many doublewords */ 6873: stdu r0,8(r8) 688 bdnz 3b 6894: 690 691#ifndef CONFIG_PPC_BOOK3E 692 mfmsr r6 693 ori r6,r6,MSR_RI 694 mtmsrd r6 /* RI on */ 695#endif 696 697#ifdef CONFIG_RELOCATABLE 698 /* Save the physical address we're running at in kernstart_addr */ 699 LOAD_REG_ADDR(r4, kernstart_addr) 700 clrldi r0,r25,2 701 std r0,0(r4) 702#endif 703 704 /* The following gets the stack set up with the regs */ 705 /* pointing to the real addr of the kernel stack. This is */ 706 /* all done to support the C function call below which sets */ 707 /* up the htab. This is done because we have relocated the */ 708 /* kernel but are still running in real mode. */ 709 710 LOAD_REG_ADDR(r3,init_thread_union) 711 712 /* set up a stack pointer */ 713 addi r1,r3,THREAD_SIZE 714 li r0,0 715 stdu r0,-STACK_FRAME_OVERHEAD(r1) 716 717 /* Do very early kernel initializations, including initial hash table, 718 * stab and slb setup before we turn on relocation. */ 719 720 /* Restore parameters passed from prom_init/kexec */ 721 mr r3,r31 722 bl .early_setup /* also sets r13 and SPRG_PACA */ 723 724 LOAD_REG_ADDR(r3, .start_here_common) 725 ld r4,PACAKMSR(r13) 726 mtspr SPRN_SRR0,r3 727 mtspr SPRN_SRR1,r4 728 RFI 729 b . /* prevent speculative execution */ 730 731 /* This is where all platforms converge execution */ 732_INIT_GLOBAL(start_here_common) 733 /* relocation is on at this point */ 734 std r1,PACAKSAVE(r13) 735 736 /* Load the TOC (virtual address) */ 737 ld r2,PACATOC(r13) 738 739 bl .setup_system 740 741 /* Load up the kernel context */ 7425: 743 li r5,0 744 stb r5,PACASOFTIRQEN(r13) /* Soft Disabled */ 745#ifdef CONFIG_PPC_ISERIES 746BEGIN_FW_FTR_SECTION 747 mfmsr r5 748 ori r5,r5,MSR_EE /* Hard Enabled on iSeries*/ 749 mtmsrd r5 750 li r5,1 751END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) 752#endif 753 stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */ 754 755 bl .start_kernel 756 757 /* Not reached */ 758 BUG_OPCODE 759 760/* 761 * We put a few things here that have to be page-aligned. 762 * This stuff goes at the beginning of the bss, which is page-aligned. 763 */ 764 .section ".bss" 765 766 .align PAGE_SHIFT 767 768 .globl empty_zero_page 769empty_zero_page: 770 .space PAGE_SIZE 771 772 .globl swapper_pg_dir 773swapper_pg_dir: 774 .space PGD_TABLE_SIZE 775