1/* 2 * This file contains the 64-bit "server" PowerPC variant 3 * of the low level exception handling including exception 4 * vectors, exception return, part of the slb and stab 5 * handling and other fixed offset specific things. 6 * 7 * This file is meant to be #included from head_64.S due to 8 * position dependent assembly. 9 * 10 * Most of this originates from head_64.S and thus has the same 11 * copyright history. 12 * 13 */ 14 15#include <asm/hw_irq.h> 16#include <asm/exception-64s.h> 17#include <asm/ptrace.h> 18 19/* 20 * We layout physical memory as follows: 21 * 0x0000 - 0x00ff : Secondary processor spin code 22 * 0x0100 - 0x17ff : pSeries Interrupt prologs 23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs 24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 26 * 0x7000 - 0x7fff : FWNMI data area 27 * 0x8000 - 0x8fff : Initial (CPU0) segment table 28 * 0x9000 - : Early init and support code 29 */ 30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */ 31#define SYSCALL_PSERIES_1 \ 32BEGIN_FTR_SECTION \ 33 cmpdi r0,0x1ebe ; \ 34 beq- 1f ; \ 35END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ 36 mr r9,r13 ; \ 37 GET_PACA(r13) ; \ 38 mfspr r11,SPRN_SRR0 ; \ 390: 40 41#define SYSCALL_PSERIES_2_RFID \ 42 mfspr r12,SPRN_SRR1 ; \ 43 ld r10,PACAKBASE(r13) ; \ 44 LOAD_HANDLER(r10, system_call_entry) ; \ 45 mtspr SPRN_SRR0,r10 ; \ 46 ld r10,PACAKMSR(r13) ; \ 47 mtspr SPRN_SRR1,r10 ; \ 48 rfid ; \ 49 b . ; /* prevent speculative execution */ 50 51#define SYSCALL_PSERIES_3 \ 52 /* Fast LE/BE switch system call */ \ 531: mfspr r12,SPRN_SRR1 ; \ 54 xori r12,r12,MSR_LE ; \ 55 mtspr SPRN_SRR1,r12 ; \ 56 rfid ; /* return to userspace */ \ 57 b . ; /* prevent speculative execution */ 58 59#if defined(CONFIG_RELOCATABLE) 60 /* 61 * We can't branch directly; in the direct case we use LR 62 * and system_call_entry restores LR. (We thus need to move 63 * LR to r10 in the RFID case too.) 64 */ 65#define SYSCALL_PSERIES_2_DIRECT \ 66 mflr r10 ; \ 67 ld r12,PACAKBASE(r13) ; \ 68 LOAD_HANDLER(r12, system_call_entry_direct) ; \ 69 mtctr r12 ; \ 70 mfspr r12,SPRN_SRR1 ; \ 71 /* Re-use of r13... No spare regs to do this */ \ 72 li r13,MSR_RI ; \ 73 mtmsrd r13,1 ; \ 74 GET_PACA(r13) ; /* get r13 back */ \ 75 bctr ; 76#else 77 /* We can branch directly */ 78#define SYSCALL_PSERIES_2_DIRECT \ 79 mfspr r12,SPRN_SRR1 ; \ 80 li r10,MSR_RI ; \ 81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \ 82 b system_call_entry_direct ; 83#endif 84 85/* 86 * This is the start of the interrupt handlers for pSeries 87 * This code runs with relocation off. 88 * Code from here to __end_interrupts gets copied down to real 89 * address 0x100 when we are running a relocatable kernel. 90 * Therefore any relative branches in this section must only 91 * branch to labels in this section. 92 */ 93 . = 0x100 94 .globl __start_interrupts 95__start_interrupts: 96 97 .globl system_reset_pSeries; 98system_reset_pSeries: 99 HMT_MEDIUM_PPR_DISCARD 100 SET_SCRATCH0(r13) 101#ifdef CONFIG_PPC_P7_NAP 102BEGIN_FTR_SECTION 103 /* Running native on arch 2.06 or later, check if we are 104 * waking up from nap. We only handle no state loss and 105 * supervisor state loss. We do -not- handle hypervisor 106 * state loss at this time. 107 */ 108 mfspr r13,SPRN_SRR1 109 rlwinm. r13,r13,47-31,30,31 110 beq 9f 111 112 /* waking up from powersave (nap) state */ 113 cmpwi cr1,r13,2 114 /* Total loss of HV state is fatal, we could try to use the 115 * PIR to locate a PACA, then use an emergency stack etc... 116 * OPAL v3 based powernv platforms have new idle states 117 * which fall in this catagory. 118 */ 119 bgt cr1,8f 120 GET_PACA(r13) 121 122#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 123 li r0,KVM_HWTHREAD_IN_KERNEL 124 stb r0,HSTATE_HWTHREAD_STATE(r13) 125 /* Order setting hwthread_state vs. testing hwthread_req */ 126 sync 127 lbz r0,HSTATE_HWTHREAD_REQ(r13) 128 cmpwi r0,0 129 beq 1f 130 b kvm_start_guest 1311: 132#endif 133 134 beq cr1,2f 135 b power7_wakeup_noloss 1362: b power7_wakeup_loss 137 138 /* Fast Sleep wakeup on PowerNV */ 1398: GET_PACA(r13) 140 b power7_wakeup_tb_loss 141 1429: 143END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 144#endif /* CONFIG_PPC_P7_NAP */ 145 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 146 NOTEST, 0x100) 147 148 . = 0x200 149machine_check_pSeries_1: 150 /* This is moved out of line as it can be patched by FW, but 151 * some code path might still want to branch into the original 152 * vector 153 */ 154 HMT_MEDIUM_PPR_DISCARD 155 SET_SCRATCH0(r13) /* save r13 */ 156#ifdef CONFIG_PPC_P7_NAP 157BEGIN_FTR_SECTION 158 /* Running native on arch 2.06 or later, check if we are 159 * waking up from nap. We only handle no state loss and 160 * supervisor state loss. We do -not- handle hypervisor 161 * state loss at this time. 162 */ 163 mfspr r13,SPRN_SRR1 164 rlwinm. r13,r13,47-31,30,31 165 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 166 beq 9f 167 168 mfspr r13,SPRN_SRR1 169 rlwinm. r13,r13,47-31,30,31 170 /* waking up from powersave (nap) state */ 171 cmpwi cr1,r13,2 172 /* Total loss of HV state is fatal. let's just stay stuck here */ 173 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 174 bgt cr1,. 1759: 176 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 177END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 178#endif /* CONFIG_PPC_P7_NAP */ 179 EXCEPTION_PROLOG_0(PACA_EXMC) 180BEGIN_FTR_SECTION 181 b machine_check_pSeries_early 182FTR_SECTION_ELSE 183 b machine_check_pSeries_0 184ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 185 186 . = 0x300 187 .globl data_access_pSeries 188data_access_pSeries: 189 HMT_MEDIUM_PPR_DISCARD 190 SET_SCRATCH0(r13) 191 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, 192 KVMTEST, 0x300) 193 194 . = 0x380 195 .globl data_access_slb_pSeries 196data_access_slb_pSeries: 197 HMT_MEDIUM_PPR_DISCARD 198 SET_SCRATCH0(r13) 199 EXCEPTION_PROLOG_0(PACA_EXSLB) 200 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) 201 std r3,PACA_EXSLB+EX_R3(r13) 202 mfspr r3,SPRN_DAR 203#ifdef __DISABLED__ 204 /* Keep that around for when we re-implement dynamic VSIDs */ 205 cmpdi r3,0 206 bge slb_miss_user_pseries 207#endif /* __DISABLED__ */ 208 mfspr r12,SPRN_SRR1 209#ifndef CONFIG_RELOCATABLE 210 b slb_miss_realmode 211#else 212 /* 213 * We can't just use a direct branch to slb_miss_realmode 214 * because the distance from here to there depends on where 215 * the kernel ends up being put. 216 */ 217 mfctr r11 218 ld r10,PACAKBASE(r13) 219 LOAD_HANDLER(r10, slb_miss_realmode) 220 mtctr r10 221 bctr 222#endif 223 224 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access) 225 226 . = 0x480 227 .globl instruction_access_slb_pSeries 228instruction_access_slb_pSeries: 229 HMT_MEDIUM_PPR_DISCARD 230 SET_SCRATCH0(r13) 231 EXCEPTION_PROLOG_0(PACA_EXSLB) 232 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480) 233 std r3,PACA_EXSLB+EX_R3(r13) 234 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 235#ifdef __DISABLED__ 236 /* Keep that around for when we re-implement dynamic VSIDs */ 237 cmpdi r3,0 238 bge slb_miss_user_pseries 239#endif /* __DISABLED__ */ 240 mfspr r12,SPRN_SRR1 241#ifndef CONFIG_RELOCATABLE 242 b slb_miss_realmode 243#else 244 mfctr r11 245 ld r10,PACAKBASE(r13) 246 LOAD_HANDLER(r10, slb_miss_realmode) 247 mtctr r10 248 bctr 249#endif 250 251 /* We open code these as we can't have a ". = x" (even with 252 * x = "." within a feature section 253 */ 254 . = 0x500; 255 .globl hardware_interrupt_pSeries; 256 .globl hardware_interrupt_hv; 257hardware_interrupt_pSeries: 258hardware_interrupt_hv: 259 HMT_MEDIUM_PPR_DISCARD 260 BEGIN_FTR_SECTION 261 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, 262 EXC_HV, SOFTEN_TEST_HV) 263 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) 264 FTR_SECTION_ELSE 265 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, 266 EXC_STD, SOFTEN_TEST_HV_201) 267 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) 268 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 269 270 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment) 271 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600) 272 273 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check) 274 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700) 275 276 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable) 277 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800) 278 279 . = 0x900 280 .globl decrementer_pSeries 281decrementer_pSeries: 282 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) 283 284 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) 285 286 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) 287 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00) 288 289 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b) 290 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00) 291 292 . = 0xc00 293 .globl system_call_pSeries 294system_call_pSeries: 295 HMT_MEDIUM 296#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 297 SET_SCRATCH0(r13) 298 GET_PACA(r13) 299 std r9,PACA_EXGEN+EX_R9(r13) 300 std r10,PACA_EXGEN+EX_R10(r13) 301 mfcr r9 302 KVMTEST(0xc00) 303 GET_SCRATCH0(r13) 304#endif 305 SYSCALL_PSERIES_1 306 SYSCALL_PSERIES_2_RFID 307 SYSCALL_PSERIES_3 308 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) 309 310 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step) 311 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00) 312 313 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch 314 * out of line to handle them 315 */ 316 . = 0xe00 317hv_data_storage_trampoline: 318 SET_SCRATCH0(r13) 319 EXCEPTION_PROLOG_0(PACA_EXGEN) 320 b h_data_storage_hv 321 322 . = 0xe20 323hv_instr_storage_trampoline: 324 SET_SCRATCH0(r13) 325 EXCEPTION_PROLOG_0(PACA_EXGEN) 326 b h_instr_storage_hv 327 328 . = 0xe40 329emulation_assist_trampoline: 330 SET_SCRATCH0(r13) 331 EXCEPTION_PROLOG_0(PACA_EXGEN) 332 b emulation_assist_hv 333 334 . = 0xe60 335hv_exception_trampoline: 336 SET_SCRATCH0(r13) 337 EXCEPTION_PROLOG_0(PACA_EXGEN) 338 b hmi_exception_early 339 340 . = 0xe80 341hv_doorbell_trampoline: 342 SET_SCRATCH0(r13) 343 EXCEPTION_PROLOG_0(PACA_EXGEN) 344 b h_doorbell_hv 345 346 /* We need to deal with the Altivec unavailable exception 347 * here which is at 0xf20, thus in the middle of the 348 * prolog code of the PerformanceMonitor one. A little 349 * trickery is thus necessary 350 */ 351 . = 0xf00 352performance_monitor_pseries_trampoline: 353 SET_SCRATCH0(r13) 354 EXCEPTION_PROLOG_0(PACA_EXGEN) 355 b performance_monitor_pSeries 356 357 . = 0xf20 358altivec_unavailable_pseries_trampoline: 359 SET_SCRATCH0(r13) 360 EXCEPTION_PROLOG_0(PACA_EXGEN) 361 b altivec_unavailable_pSeries 362 363 . = 0xf40 364vsx_unavailable_pseries_trampoline: 365 SET_SCRATCH0(r13) 366 EXCEPTION_PROLOG_0(PACA_EXGEN) 367 b vsx_unavailable_pSeries 368 369 . = 0xf60 370facility_unavailable_trampoline: 371 SET_SCRATCH0(r13) 372 EXCEPTION_PROLOG_0(PACA_EXGEN) 373 b facility_unavailable_pSeries 374 375 . = 0xf80 376hv_facility_unavailable_trampoline: 377 SET_SCRATCH0(r13) 378 EXCEPTION_PROLOG_0(PACA_EXGEN) 379 b facility_unavailable_hv 380 381#ifdef CONFIG_CBE_RAS 382 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) 383 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) 384#endif /* CONFIG_CBE_RAS */ 385 386 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint) 387 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300) 388 389 . = 0x1500 390 .global denorm_exception_hv 391denorm_exception_hv: 392 HMT_MEDIUM_PPR_DISCARD 393 mtspr SPRN_SPRG_HSCRATCH0,r13 394 EXCEPTION_PROLOG_0(PACA_EXGEN) 395 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) 396 397#ifdef CONFIG_PPC_DENORMALISATION 398 mfspr r10,SPRN_HSRR1 399 mfspr r11,SPRN_HSRR0 /* save HSRR0 */ 400 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ 401 addi r11,r11,-4 /* HSRR0 is next instruction */ 402 bne+ denorm_assist 403#endif 404 405 KVMTEST(0x1500) 406 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) 407 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) 408 409#ifdef CONFIG_CBE_RAS 410 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) 411 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) 412#endif /* CONFIG_CBE_RAS */ 413 414 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist) 415 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700) 416 417#ifdef CONFIG_CBE_RAS 418 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) 419 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) 420#else 421 . = 0x1800 422#endif /* CONFIG_CBE_RAS */ 423 424 425/*** Out of line interrupts support ***/ 426 427 .align 7 428 /* moved from 0x200 */ 429machine_check_pSeries_early: 430BEGIN_FTR_SECTION 431 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) 432 /* 433 * Register contents: 434 * R13 = PACA 435 * R9 = CR 436 * Original R9 to R13 is saved on PACA_EXMC 437 * 438 * Switch to mc_emergency stack and handle re-entrancy (we limit 439 * the nested MCE upto level 4 to avoid stack overflow). 440 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 441 * 442 * We use paca->in_mce to check whether this is the first entry or 443 * nested machine check. We increment paca->in_mce to track nested 444 * machine checks. 445 * 446 * If this is the first entry then set stack pointer to 447 * paca->mc_emergency_sp, otherwise r1 is already pointing to 448 * stack frame on mc_emergency stack. 449 * 450 * NOTE: We are here with MSR_ME=0 (off), which means we risk a 451 * checkstop if we get another machine check exception before we do 452 * rfid with MSR_ME=1. 453 */ 454 mr r11,r1 /* Save r1 */ 455 lhz r10,PACA_IN_MCE(r13) 456 cmpwi r10,0 /* Are we in nested machine check */ 457 bne 0f /* Yes, we are. */ 458 /* First machine check entry */ 459 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ 4600: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 461 addi r10,r10,1 /* increment paca->in_mce */ 462 sth r10,PACA_IN_MCE(r13) 463 /* Limit nested MCE to level 4 to avoid stack overflow */ 464 cmpwi r10,4 465 bgt 2f /* Check if we hit limit of 4 */ 466 std r11,GPR1(r1) /* Save r1 on the stack. */ 467 std r11,0(r1) /* make stack chain pointer */ 468 mfspr r11,SPRN_SRR0 /* Save SRR0 */ 469 std r11,_NIP(r1) 470 mfspr r11,SPRN_SRR1 /* Save SRR1 */ 471 std r11,_MSR(r1) 472 mfspr r11,SPRN_DAR /* Save DAR */ 473 std r11,_DAR(r1) 474 mfspr r11,SPRN_DSISR /* Save DSISR */ 475 std r11,_DSISR(r1) 476 std r9,_CCR(r1) /* Save CR in stackframe */ 477 /* Save r9 through r13 from EXMC save area to stack frame. */ 478 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) 479 mfmsr r11 /* get MSR value */ 480 ori r11,r11,MSR_ME /* turn on ME bit */ 481 ori r11,r11,MSR_RI /* turn on RI bit */ 482 ld r12,PACAKBASE(r13) /* get high part of &label */ 483 LOAD_HANDLER(r12, machine_check_handle_early) 4841: mtspr SPRN_SRR0,r12 485 mtspr SPRN_SRR1,r11 486 rfid 487 b . /* prevent speculative execution */ 4882: 489 /* Stack overflow. Stay on emergency stack and panic. 490 * Keep the ME bit off while panic-ing, so that if we hit 491 * another machine check we checkstop. 492 */ 493 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ 494 ld r11,PACAKMSR(r13) 495 ld r12,PACAKBASE(r13) 496 LOAD_HANDLER(r12, unrecover_mce) 497 li r10,MSR_ME 498 andc r11,r11,r10 /* Turn off MSR_ME */ 499 b 1b 500 b . /* prevent speculative execution */ 501END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 502 503machine_check_pSeries: 504 .globl machine_check_fwnmi 505machine_check_fwnmi: 506 HMT_MEDIUM_PPR_DISCARD 507 SET_SCRATCH0(r13) /* save r13 */ 508 EXCEPTION_PROLOG_0(PACA_EXMC) 509machine_check_pSeries_0: 510 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) 511 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) 512 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) 513 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) 514 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) 515 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400) 516 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480) 517 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900) 518 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) 519 520#ifdef CONFIG_PPC_DENORMALISATION 521denorm_assist: 522BEGIN_FTR_SECTION 523/* 524 * To denormalise we need to move a copy of the register to itself. 525 * For POWER6 do that here for all FP regs. 526 */ 527 mfmsr r10 528 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) 529 xori r10,r10,(MSR_FE0|MSR_FE1) 530 mtmsrd r10 531 sync 532 533#define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 534#define FMR4(n) FMR2(n) ; FMR2(n+2) 535#define FMR8(n) FMR4(n) ; FMR4(n+4) 536#define FMR16(n) FMR8(n) ; FMR8(n+8) 537#define FMR32(n) FMR16(n) ; FMR16(n+16) 538 FMR32(0) 539 540FTR_SECTION_ELSE 541/* 542 * To denormalise we need to move a copy of the register to itself. 543 * For POWER7 do that here for the first 32 VSX registers only. 544 */ 545 mfmsr r10 546 oris r10,r10,MSR_VSX@h 547 mtmsrd r10 548 sync 549 550#define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) 551#define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) 552#define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) 553#define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) 554#define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) 555 XVCPSGNDP32(0) 556 557ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) 558 559BEGIN_FTR_SECTION 560 b denorm_done 561END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) 562/* 563 * To denormalise we need to move a copy of the register to itself. 564 * For POWER8 we need to do that for all 64 VSX registers 565 */ 566 XVCPSGNDP32(32) 567denorm_done: 568 mtspr SPRN_HSRR0,r11 569 mtcrf 0x80,r9 570 ld r9,PACA_EXGEN+EX_R9(r13) 571 RESTORE_PPR_PACA(PACA_EXGEN, r10) 572BEGIN_FTR_SECTION 573 ld r10,PACA_EXGEN+EX_CFAR(r13) 574 mtspr SPRN_CFAR,r10 575END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 576 ld r10,PACA_EXGEN+EX_R10(r13) 577 ld r11,PACA_EXGEN+EX_R11(r13) 578 ld r12,PACA_EXGEN+EX_R12(r13) 579 ld r13,PACA_EXGEN+EX_R13(r13) 580 HRFID 581 b . 582#endif 583 584 .align 7 585 /* moved from 0xe00 */ 586 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) 587 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) 588 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) 589 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) 590 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) 591 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) 592 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) 593 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) 594 595 .globl hmi_exception_early 596hmi_exception_early: 597 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) 598 mr r10,r1 /* Save r1 */ 599 ld r1,PACAEMERGSP(r13) /* Use emergency stack */ 600 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 601 std r9,_CCR(r1) /* save CR in stackframe */ 602 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ 603 std r11,_NIP(r1) /* save HSRR0 in stackframe */ 604 mfspr r12,SPRN_HSRR1 /* Save SRR1 */ 605 std r12,_MSR(r1) /* save SRR1 in stackframe */ 606 std r10,0(r1) /* make stack chain pointer */ 607 std r0,GPR0(r1) /* save r0 in stackframe */ 608 std r10,GPR1(r1) /* save r1 in stackframe */ 609 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) 610 EXCEPTION_PROLOG_COMMON_3(0xe60) 611 addi r3,r1,STACK_FRAME_OVERHEAD 612 bl hmi_exception_realmode 613 /* Windup the stack. */ 614 /* Clear MSR_RI before setting SRR0 and SRR1. */ 615 li r0,MSR_RI 616 mfmsr r9 /* get MSR value */ 617 andc r9,r9,r0 618 mtmsrd r9,1 /* Clear MSR_RI */ 619 /* Move original HSRR0 and HSRR1 into the respective regs */ 620 ld r9,_MSR(r1) 621 mtspr SPRN_HSRR1,r9 622 ld r3,_NIP(r1) 623 mtspr SPRN_HSRR0,r3 624 ld r9,_CTR(r1) 625 mtctr r9 626 ld r9,_XER(r1) 627 mtxer r9 628 ld r9,_LINK(r1) 629 mtlr r9 630 REST_GPR(0, r1) 631 REST_8GPRS(2, r1) 632 REST_GPR(10, r1) 633 ld r11,_CCR(r1) 634 mtcr r11 635 REST_GPR(11, r1) 636 REST_2GPRS(12, r1) 637 /* restore original r1. */ 638 ld r1,GPR1(r1) 639 640 /* 641 * Go to virtual mode and pull the HMI event information from 642 * firmware. 643 */ 644 .globl hmi_exception_after_realmode 645hmi_exception_after_realmode: 646 SET_SCRATCH0(r13) 647 EXCEPTION_PROLOG_0(PACA_EXGEN) 648 b hmi_exception_hv 649 650 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) 651 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) 652 653 /* moved from 0xf00 */ 654 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 655 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00) 656 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 657 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20) 658 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 659 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40) 660 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 661 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60) 662 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) 663 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) 664 665/* 666 * An interrupt came in while soft-disabled. We set paca->irq_happened, then: 667 * - If it was a decrementer interrupt, we bump the dec to max and and return. 668 * - If it was a doorbell we return immediately since doorbells are edge 669 * triggered and won't automatically refire. 670 * - If it was a HMI we return immediately since we handled it in realmode 671 * and it won't refire. 672 * - else we hard disable and return. 673 * This is called with r10 containing the value to OR to the paca field. 674 */ 675#define MASKED_INTERRUPT(_H) \ 676masked_##_H##interrupt: \ 677 std r11,PACA_EXGEN+EX_R11(r13); \ 678 lbz r11,PACAIRQHAPPENED(r13); \ 679 or r11,r11,r10; \ 680 stb r11,PACAIRQHAPPENED(r13); \ 681 cmpwi r10,PACA_IRQ_DEC; \ 682 bne 1f; \ 683 lis r10,0x7fff; \ 684 ori r10,r10,0xffff; \ 685 mtspr SPRN_DEC,r10; \ 686 b 2f; \ 6871: cmpwi r10,PACA_IRQ_DBELL; \ 688 beq 2f; \ 689 cmpwi r10,PACA_IRQ_HMI; \ 690 beq 2f; \ 691 mfspr r10,SPRN_##_H##SRR1; \ 692 rldicl r10,r10,48,1; /* clear MSR_EE */ \ 693 rotldi r10,r10,16; \ 694 mtspr SPRN_##_H##SRR1,r10; \ 6952: mtcrf 0x80,r9; \ 696 ld r9,PACA_EXGEN+EX_R9(r13); \ 697 ld r10,PACA_EXGEN+EX_R10(r13); \ 698 ld r11,PACA_EXGEN+EX_R11(r13); \ 699 GET_SCRATCH0(r13); \ 700 ##_H##rfid; \ 701 b . 702 703 MASKED_INTERRUPT() 704 MASKED_INTERRUPT(H) 705 706/* 707 * Called from arch_local_irq_enable when an interrupt needs 708 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate 709 * which kind of interrupt. MSR:EE is already off. We generate a 710 * stackframe like if a real interrupt had happened. 711 * 712 * Note: While MSR:EE is off, we need to make sure that _MSR 713 * in the generated frame has EE set to 1 or the exception 714 * handler will not properly re-enable them. 715 */ 716_GLOBAL(__replay_interrupt) 717 /* We are going to jump to the exception common code which 718 * will retrieve various register values from the PACA which 719 * we don't give a damn about, so we don't bother storing them. 720 */ 721 mfmsr r12 722 mflr r11 723 mfcr r9 724 ori r12,r12,MSR_EE 725 cmpwi r3,0x900 726 beq decrementer_common 727 cmpwi r3,0x500 728 beq hardware_interrupt_common 729BEGIN_FTR_SECTION 730 cmpwi r3,0xe80 731 beq h_doorbell_common 732FTR_SECTION_ELSE 733 cmpwi r3,0xa00 734 beq doorbell_super_common 735ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 736 blr 737 738#ifdef CONFIG_PPC_PSERIES 739/* 740 * Vectors for the FWNMI option. Share common code. 741 */ 742 .globl system_reset_fwnmi 743 .align 7 744system_reset_fwnmi: 745 HMT_MEDIUM_PPR_DISCARD 746 SET_SCRATCH0(r13) /* save r13 */ 747 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 748 NOTEST, 0x100) 749 750#endif /* CONFIG_PPC_PSERIES */ 751 752#ifdef __DISABLED__ 753/* 754 * This is used for when the SLB miss handler has to go virtual, 755 * which doesn't happen for now anymore but will once we re-implement 756 * dynamic VSIDs for shared page tables 757 */ 758slb_miss_user_pseries: 759 std r10,PACA_EXGEN+EX_R10(r13) 760 std r11,PACA_EXGEN+EX_R11(r13) 761 std r12,PACA_EXGEN+EX_R12(r13) 762 GET_SCRATCH0(r10) 763 ld r11,PACA_EXSLB+EX_R9(r13) 764 ld r12,PACA_EXSLB+EX_R3(r13) 765 std r10,PACA_EXGEN+EX_R13(r13) 766 std r11,PACA_EXGEN+EX_R9(r13) 767 std r12,PACA_EXGEN+EX_R3(r13) 768 clrrdi r12,r13,32 769 mfmsr r10 770 mfspr r11,SRR0 /* save SRR0 */ 771 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */ 772 ori r10,r10,MSR_IR|MSR_DR|MSR_RI 773 mtspr SRR0,r12 774 mfspr r12,SRR1 /* and SRR1 */ 775 mtspr SRR1,r10 776 rfid 777 b . /* prevent spec. execution */ 778#endif /* __DISABLED__ */ 779 780#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 781kvmppc_skip_interrupt: 782 /* 783 * Here all GPRs are unchanged from when the interrupt happened 784 * except for r13, which is saved in SPRG_SCRATCH0. 785 */ 786 mfspr r13, SPRN_SRR0 787 addi r13, r13, 4 788 mtspr SPRN_SRR0, r13 789 GET_SCRATCH0(r13) 790 rfid 791 b . 792 793kvmppc_skip_Hinterrupt: 794 /* 795 * Here all GPRs are unchanged from when the interrupt happened 796 * except for r13, which is saved in SPRG_SCRATCH0. 797 */ 798 mfspr r13, SPRN_HSRR0 799 addi r13, r13, 4 800 mtspr SPRN_HSRR0, r13 801 GET_SCRATCH0(r13) 802 hrfid 803 b . 804#endif 805 806/* 807 * Code from here down to __end_handlers is invoked from the 808 * exception prologs above. Because the prologs assemble the 809 * addresses of these handlers using the LOAD_HANDLER macro, 810 * which uses an ori instruction, these handlers must be in 811 * the first 64k of the kernel image. 812 */ 813 814/*** Common interrupt handlers ***/ 815 816 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) 817 818 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) 819 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) 820 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) 821#ifdef CONFIG_PPC_DOORBELL 822 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) 823#else 824 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) 825#endif 826 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) 827 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) 828 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) 829 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) 830 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) 831#ifdef CONFIG_PPC_DOORBELL 832 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) 833#else 834 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) 835#endif 836 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) 837 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) 838 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) 839#ifdef CONFIG_ALTIVEC 840 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) 841#else 842 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) 843#endif 844#ifdef CONFIG_CBE_RAS 845 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) 846 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) 847 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) 848#endif /* CONFIG_CBE_RAS */ 849 850 /* 851 * Relocation-on interrupts: A subset of the interrupts can be delivered 852 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering 853 * it. Addresses are the same as the original interrupt addresses, but 854 * offset by 0xc000000000004000. 855 * It's impossible to receive interrupts below 0x300 via this mechanism. 856 * KVM: None of these traps are from the guest ; anything that escalated 857 * to HV=1 from HV=0 is delivered via real mode handlers. 858 */ 859 860 /* 861 * This uses the standard macro, since the original 0x300 vector 862 * only has extra guff for STAB-based processors -- which never 863 * come here. 864 */ 865 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) 866 . = 0x4380 867 .globl data_access_slb_relon_pSeries 868data_access_slb_relon_pSeries: 869 SET_SCRATCH0(r13) 870 EXCEPTION_PROLOG_0(PACA_EXSLB) 871 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) 872 std r3,PACA_EXSLB+EX_R3(r13) 873 mfspr r3,SPRN_DAR 874 mfspr r12,SPRN_SRR1 875#ifndef CONFIG_RELOCATABLE 876 b slb_miss_realmode 877#else 878 /* 879 * We can't just use a direct branch to slb_miss_realmode 880 * because the distance from here to there depends on where 881 * the kernel ends up being put. 882 */ 883 mfctr r11 884 ld r10,PACAKBASE(r13) 885 LOAD_HANDLER(r10, slb_miss_realmode) 886 mtctr r10 887 bctr 888#endif 889 890 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) 891 . = 0x4480 892 .globl instruction_access_slb_relon_pSeries 893instruction_access_slb_relon_pSeries: 894 SET_SCRATCH0(r13) 895 EXCEPTION_PROLOG_0(PACA_EXSLB) 896 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) 897 std r3,PACA_EXSLB+EX_R3(r13) 898 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 899 mfspr r12,SPRN_SRR1 900#ifndef CONFIG_RELOCATABLE 901 b slb_miss_realmode 902#else 903 mfctr r11 904 ld r10,PACAKBASE(r13) 905 LOAD_HANDLER(r10, slb_miss_realmode) 906 mtctr r10 907 bctr 908#endif 909 910 . = 0x4500 911 .globl hardware_interrupt_relon_pSeries; 912 .globl hardware_interrupt_relon_hv; 913hardware_interrupt_relon_pSeries: 914hardware_interrupt_relon_hv: 915 BEGIN_FTR_SECTION 916 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) 917 FTR_SECTION_ELSE 918 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) 919 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 920 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) 921 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) 922 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) 923 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) 924 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) 925 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) 926 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) 927 928 . = 0x4c00 929 .globl system_call_relon_pSeries 930system_call_relon_pSeries: 931 HMT_MEDIUM 932 SYSCALL_PSERIES_1 933 SYSCALL_PSERIES_2_DIRECT 934 SYSCALL_PSERIES_3 935 936 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) 937 938 . = 0x4e00 939 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 940 941 . = 0x4e20 942 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 943 944 . = 0x4e40 945emulation_assist_relon_trampoline: 946 SET_SCRATCH0(r13) 947 EXCEPTION_PROLOG_0(PACA_EXGEN) 948 b emulation_assist_relon_hv 949 950 . = 0x4e60 951 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 952 953 . = 0x4e80 954h_doorbell_relon_trampoline: 955 SET_SCRATCH0(r13) 956 EXCEPTION_PROLOG_0(PACA_EXGEN) 957 b h_doorbell_relon_hv 958 959 . = 0x4f00 960performance_monitor_relon_pseries_trampoline: 961 SET_SCRATCH0(r13) 962 EXCEPTION_PROLOG_0(PACA_EXGEN) 963 b performance_monitor_relon_pSeries 964 965 . = 0x4f20 966altivec_unavailable_relon_pseries_trampoline: 967 SET_SCRATCH0(r13) 968 EXCEPTION_PROLOG_0(PACA_EXGEN) 969 b altivec_unavailable_relon_pSeries 970 971 . = 0x4f40 972vsx_unavailable_relon_pseries_trampoline: 973 SET_SCRATCH0(r13) 974 EXCEPTION_PROLOG_0(PACA_EXGEN) 975 b vsx_unavailable_relon_pSeries 976 977 . = 0x4f60 978facility_unavailable_relon_trampoline: 979 SET_SCRATCH0(r13) 980 EXCEPTION_PROLOG_0(PACA_EXGEN) 981 b facility_unavailable_relon_pSeries 982 983 . = 0x4f80 984hv_facility_unavailable_relon_trampoline: 985 SET_SCRATCH0(r13) 986 EXCEPTION_PROLOG_0(PACA_EXGEN) 987 b hv_facility_unavailable_relon_hv 988 989 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) 990#ifdef CONFIG_PPC_DENORMALISATION 991 . = 0x5500 992 b denorm_exception_hv 993#endif 994 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) 995 996 /* Other future vectors */ 997 .align 7 998 .globl __end_interrupts 999__end_interrupts: 1000 1001 .align 7 1002system_call_entry_direct: 1003#if defined(CONFIG_RELOCATABLE) 1004 /* The first level prologue may have used LR to get here, saving 1005 * orig in r10. To save hacking/ifdeffing common code, restore here. 1006 */ 1007 mtlr r10 1008#endif 1009system_call_entry: 1010 b system_call_common 1011 1012ppc64_runlatch_on_trampoline: 1013 b __ppc64_runlatch_on 1014 1015/* 1016 * Here r13 points to the paca, r9 contains the saved CR, 1017 * SRR0 and SRR1 are saved in r11 and r12, 1018 * r9 - r13 are saved in paca->exgen. 1019 */ 1020 .align 7 1021 .globl data_access_common 1022data_access_common: 1023 mfspr r10,SPRN_DAR 1024 std r10,PACA_EXGEN+EX_DAR(r13) 1025 mfspr r10,SPRN_DSISR 1026 stw r10,PACA_EXGEN+EX_DSISR(r13) 1027 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) 1028 RECONCILE_IRQ_STATE(r10, r11) 1029 ld r12,_MSR(r1) 1030 ld r3,PACA_EXGEN+EX_DAR(r13) 1031 lwz r4,PACA_EXGEN+EX_DSISR(r13) 1032 li r5,0x300 1033 b do_hash_page /* Try to handle as hpte fault */ 1034 1035 .align 7 1036 .globl h_data_storage_common 1037h_data_storage_common: 1038 mfspr r10,SPRN_HDAR 1039 std r10,PACA_EXGEN+EX_DAR(r13) 1040 mfspr r10,SPRN_HDSISR 1041 stw r10,PACA_EXGEN+EX_DSISR(r13) 1042 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) 1043 bl save_nvgprs 1044 RECONCILE_IRQ_STATE(r10, r11) 1045 addi r3,r1,STACK_FRAME_OVERHEAD 1046 bl unknown_exception 1047 b ret_from_except 1048 1049 .align 7 1050 .globl instruction_access_common 1051instruction_access_common: 1052 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) 1053 RECONCILE_IRQ_STATE(r10, r11) 1054 ld r12,_MSR(r1) 1055 ld r3,_NIP(r1) 1056 andis. r4,r12,0x5820 1057 li r5,0x400 1058 b do_hash_page /* Try to handle as hpte fault */ 1059 1060 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) 1061 1062/* 1063 * Here is the common SLB miss user that is used when going to virtual 1064 * mode for SLB misses, that is currently not used 1065 */ 1066#ifdef __DISABLED__ 1067 .align 7 1068 .globl slb_miss_user_common 1069slb_miss_user_common: 1070 mflr r10 1071 std r3,PACA_EXGEN+EX_DAR(r13) 1072 stw r9,PACA_EXGEN+EX_CCR(r13) 1073 std r10,PACA_EXGEN+EX_LR(r13) 1074 std r11,PACA_EXGEN+EX_SRR0(r13) 1075 bl slb_allocate_user 1076 1077 ld r10,PACA_EXGEN+EX_LR(r13) 1078 ld r3,PACA_EXGEN+EX_R3(r13) 1079 lwz r9,PACA_EXGEN+EX_CCR(r13) 1080 ld r11,PACA_EXGEN+EX_SRR0(r13) 1081 mtlr r10 1082 beq- slb_miss_fault 1083 1084 andi. r10,r12,MSR_RI /* check for unrecoverable exception */ 1085 beq- unrecov_user_slb 1086 mfmsr r10 1087 1088.machine push 1089.machine "power4" 1090 mtcrf 0x80,r9 1091.machine pop 1092 1093 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */ 1094 mtmsrd r10,1 1095 1096 mtspr SRR0,r11 1097 mtspr SRR1,r12 1098 1099 ld r9,PACA_EXGEN+EX_R9(r13) 1100 ld r10,PACA_EXGEN+EX_R10(r13) 1101 ld r11,PACA_EXGEN+EX_R11(r13) 1102 ld r12,PACA_EXGEN+EX_R12(r13) 1103 ld r13,PACA_EXGEN+EX_R13(r13) 1104 rfid 1105 b . 1106 1107slb_miss_fault: 1108 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN) 1109 ld r4,PACA_EXGEN+EX_DAR(r13) 1110 li r5,0 1111 std r4,_DAR(r1) 1112 std r5,_DSISR(r1) 1113 b handle_page_fault 1114 1115unrecov_user_slb: 1116 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) 1117 RECONCILE_IRQ_STATE(r10, r11) 1118 bl save_nvgprs 11191: addi r3,r1,STACK_FRAME_OVERHEAD 1120 bl unrecoverable_exception 1121 b 1b 1122 1123#endif /* __DISABLED__ */ 1124 1125 1126 /* 1127 * Machine check is different because we use a different 1128 * save area: PACA_EXMC instead of PACA_EXGEN. 1129 */ 1130 .align 7 1131 .globl machine_check_common 1132machine_check_common: 1133 1134 mfspr r10,SPRN_DAR 1135 std r10,PACA_EXGEN+EX_DAR(r13) 1136 mfspr r10,SPRN_DSISR 1137 stw r10,PACA_EXGEN+EX_DSISR(r13) 1138 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) 1139 FINISH_NAP 1140 RECONCILE_IRQ_STATE(r10, r11) 1141 ld r3,PACA_EXGEN+EX_DAR(r13) 1142 lwz r4,PACA_EXGEN+EX_DSISR(r13) 1143 std r3,_DAR(r1) 1144 std r4,_DSISR(r1) 1145 bl save_nvgprs 1146 addi r3,r1,STACK_FRAME_OVERHEAD 1147 bl machine_check_exception 1148 b ret_from_except 1149 1150 .align 7 1151 .globl alignment_common 1152alignment_common: 1153 mfspr r10,SPRN_DAR 1154 std r10,PACA_EXGEN+EX_DAR(r13) 1155 mfspr r10,SPRN_DSISR 1156 stw r10,PACA_EXGEN+EX_DSISR(r13) 1157 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) 1158 ld r3,PACA_EXGEN+EX_DAR(r13) 1159 lwz r4,PACA_EXGEN+EX_DSISR(r13) 1160 std r3,_DAR(r1) 1161 std r4,_DSISR(r1) 1162 bl save_nvgprs 1163 RECONCILE_IRQ_STATE(r10, r11) 1164 addi r3,r1,STACK_FRAME_OVERHEAD 1165 bl alignment_exception 1166 b ret_from_except 1167 1168 .align 7 1169 .globl program_check_common 1170program_check_common: 1171 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) 1172 bl save_nvgprs 1173 RECONCILE_IRQ_STATE(r10, r11) 1174 addi r3,r1,STACK_FRAME_OVERHEAD 1175 bl program_check_exception 1176 b ret_from_except 1177 1178 .align 7 1179 .globl fp_unavailable_common 1180fp_unavailable_common: 1181 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) 1182 bne 1f /* if from user, just load it up */ 1183 bl save_nvgprs 1184 RECONCILE_IRQ_STATE(r10, r11) 1185 addi r3,r1,STACK_FRAME_OVERHEAD 1186 bl kernel_fp_unavailable_exception 1187 BUG_OPCODE 11881: 1189#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1190BEGIN_FTR_SECTION 1191 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1192 * transaction), go do TM stuff 1193 */ 1194 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1195 bne- 2f 1196END_FTR_SECTION_IFSET(CPU_FTR_TM) 1197#endif 1198 bl load_up_fpu 1199 b fast_exception_return 1200#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 12012: /* User process was in a transaction */ 1202 bl save_nvgprs 1203 RECONCILE_IRQ_STATE(r10, r11) 1204 addi r3,r1,STACK_FRAME_OVERHEAD 1205 bl fp_unavailable_tm 1206 b ret_from_except 1207#endif 1208 .align 7 1209 .globl altivec_unavailable_common 1210altivec_unavailable_common: 1211 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) 1212#ifdef CONFIG_ALTIVEC 1213BEGIN_FTR_SECTION 1214 beq 1f 1215#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1216 BEGIN_FTR_SECTION_NESTED(69) 1217 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1218 * transaction), go do TM stuff 1219 */ 1220 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1221 bne- 2f 1222 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1223#endif 1224 bl load_up_altivec 1225 b fast_exception_return 1226#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 12272: /* User process was in a transaction */ 1228 bl save_nvgprs 1229 RECONCILE_IRQ_STATE(r10, r11) 1230 addi r3,r1,STACK_FRAME_OVERHEAD 1231 bl altivec_unavailable_tm 1232 b ret_from_except 1233#endif 12341: 1235END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 1236#endif 1237 bl save_nvgprs 1238 RECONCILE_IRQ_STATE(r10, r11) 1239 addi r3,r1,STACK_FRAME_OVERHEAD 1240 bl altivec_unavailable_exception 1241 b ret_from_except 1242 1243 .align 7 1244 .globl vsx_unavailable_common 1245vsx_unavailable_common: 1246 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) 1247#ifdef CONFIG_VSX 1248BEGIN_FTR_SECTION 1249 beq 1f 1250#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1251 BEGIN_FTR_SECTION_NESTED(69) 1252 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1253 * transaction), go do TM stuff 1254 */ 1255 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1256 bne- 2f 1257 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1258#endif 1259 b load_up_vsx 1260#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 12612: /* User process was in a transaction */ 1262 bl save_nvgprs 1263 RECONCILE_IRQ_STATE(r10, r11) 1264 addi r3,r1,STACK_FRAME_OVERHEAD 1265 bl vsx_unavailable_tm 1266 b ret_from_except 1267#endif 12681: 1269END_FTR_SECTION_IFSET(CPU_FTR_VSX) 1270#endif 1271 bl save_nvgprs 1272 RECONCILE_IRQ_STATE(r10, r11) 1273 addi r3,r1,STACK_FRAME_OVERHEAD 1274 bl vsx_unavailable_exception 1275 b ret_from_except 1276 1277 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) 1278 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) 1279 1280 .align 7 1281 .globl __end_handlers 1282__end_handlers: 1283 1284 /* Equivalents to the above handlers for relocation-on interrupt vectors */ 1285 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) 1286 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) 1287 1288 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 1289 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 1290 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 1291 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 1292 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) 1293 1294#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) 1295/* 1296 * Data area reserved for FWNMI option. 1297 * This address (0x7000) is fixed by the RPA. 1298 */ 1299 .= 0x7000 1300 .globl fwnmi_data_area 1301fwnmi_data_area: 1302 1303 /* pseries and powernv need to keep the whole page from 1304 * 0x7000 to 0x8000 free for use by the firmware 1305 */ 1306 . = 0x8000 1307#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ 1308 1309#ifdef CONFIG_PPC_POWERNV 1310_GLOBAL(opal_mc_secondary_handler) 1311 HMT_MEDIUM_PPR_DISCARD 1312 SET_SCRATCH0(r13) 1313 GET_PACA(r13) 1314 clrldi r3,r3,2 1315 tovirt(r3,r3) 1316 std r3,PACA_OPAL_MC_EVT(r13) 1317 ld r13,OPAL_MC_SRR0(r3) 1318 mtspr SPRN_SRR0,r13 1319 ld r13,OPAL_MC_SRR1(r3) 1320 mtspr SPRN_SRR1,r13 1321 ld r3,OPAL_MC_GPR3(r3) 1322 GET_SCRATCH0(r13) 1323 b machine_check_pSeries 1324#endif /* CONFIG_PPC_POWERNV */ 1325 1326 1327#define MACHINE_CHECK_HANDLER_WINDUP \ 1328 /* Clear MSR_RI before setting SRR0 and SRR1. */\ 1329 li r0,MSR_RI; \ 1330 mfmsr r9; /* get MSR value */ \ 1331 andc r9,r9,r0; \ 1332 mtmsrd r9,1; /* Clear MSR_RI */ \ 1333 /* Move original SRR0 and SRR1 into the respective regs */ \ 1334 ld r9,_MSR(r1); \ 1335 mtspr SPRN_SRR1,r9; \ 1336 ld r3,_NIP(r1); \ 1337 mtspr SPRN_SRR0,r3; \ 1338 ld r9,_CTR(r1); \ 1339 mtctr r9; \ 1340 ld r9,_XER(r1); \ 1341 mtxer r9; \ 1342 ld r9,_LINK(r1); \ 1343 mtlr r9; \ 1344 REST_GPR(0, r1); \ 1345 REST_8GPRS(2, r1); \ 1346 REST_GPR(10, r1); \ 1347 ld r11,_CCR(r1); \ 1348 mtcr r11; \ 1349 /* Decrement paca->in_mce. */ \ 1350 lhz r12,PACA_IN_MCE(r13); \ 1351 subi r12,r12,1; \ 1352 sth r12,PACA_IN_MCE(r13); \ 1353 REST_GPR(11, r1); \ 1354 REST_2GPRS(12, r1); \ 1355 /* restore original r1. */ \ 1356 ld r1,GPR1(r1) 1357 1358 /* 1359 * Handle machine check early in real mode. We come here with 1360 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. 1361 */ 1362 .align 7 1363 .globl machine_check_handle_early 1364machine_check_handle_early: 1365 std r0,GPR0(r1) /* Save r0 */ 1366 EXCEPTION_PROLOG_COMMON_3(0x200) 1367 bl save_nvgprs 1368 addi r3,r1,STACK_FRAME_OVERHEAD 1369 bl machine_check_early 1370 std r3,RESULT(r1) /* Save result */ 1371 ld r12,_MSR(r1) 1372#ifdef CONFIG_PPC_P7_NAP 1373 /* 1374 * Check if thread was in power saving mode. We come here when any 1375 * of the following is true: 1376 * a. thread wasn't in power saving mode 1377 * b. thread was in power saving mode with no state loss or 1378 * supervisor state loss 1379 * 1380 * Go back to nap again if (b) is true. 1381 */ 1382 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ 1383 beq 4f /* No, it wasn;t */ 1384 /* Thread was in power saving mode. Go back to nap again. */ 1385 cmpwi r11,2 1386 bne 3f 1387 /* Supervisor state loss */ 1388 li r0,1 1389 stb r0,PACA_NAPSTATELOST(r13) 13903: bl machine_check_queue_event 1391 MACHINE_CHECK_HANDLER_WINDUP 1392 GET_PACA(r13) 1393 ld r1,PACAR1(r13) 1394 b power7_enter_nap_mode 13954: 1396#endif 1397 /* 1398 * Check if we are coming from hypervisor userspace. If yes then we 1399 * continue in host kernel in V mode to deliver the MC event. 1400 */ 1401 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ 1402 beq 5f 1403 andi. r11,r12,MSR_PR /* See if coming from user. */ 1404 bne 9f /* continue in V mode if we are. */ 1405 14065: 1407#ifdef CONFIG_KVM_BOOK3S_64_HV 1408 /* 1409 * We are coming from kernel context. Check if we are coming from 1410 * guest. if yes, then we can continue. We will fall through 1411 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. 1412 */ 1413 lbz r11,HSTATE_IN_GUEST(r13) 1414 cmpwi r11,0 /* Check if coming from guest */ 1415 bne 9f /* continue if we are. */ 1416#endif 1417 /* 1418 * At this point we are not sure about what context we come from. 1419 * Queue up the MCE event and return from the interrupt. 1420 * But before that, check if this is an un-recoverable exception. 1421 * If yes, then stay on emergency stack and panic. 1422 */ 1423 andi. r11,r12,MSR_RI 1424 bne 2f 14251: mfspr r11,SPRN_SRR0 1426 ld r10,PACAKBASE(r13) 1427 LOAD_HANDLER(r10,unrecover_mce) 1428 mtspr SPRN_SRR0,r10 1429 ld r10,PACAKMSR(r13) 1430 /* 1431 * We are going down. But there are chances that we might get hit by 1432 * another MCE during panic path and we may run into unstable state 1433 * with no way out. Hence, turn ME bit off while going down, so that 1434 * when another MCE is hit during panic path, system will checkstop 1435 * and hypervisor will get restarted cleanly by SP. 1436 */ 1437 li r3,MSR_ME 1438 andc r10,r10,r3 /* Turn off MSR_ME */ 1439 mtspr SPRN_SRR1,r10 1440 rfid 1441 b . 14422: 1443 /* 1444 * Check if we have successfully handled/recovered from error, if not 1445 * then stay on emergency stack and panic. 1446 */ 1447 ld r3,RESULT(r1) /* Load result */ 1448 cmpdi r3,0 /* see if we handled MCE successfully */ 1449 1450 beq 1b /* if !handled then panic */ 1451 /* 1452 * Return from MC interrupt. 1453 * Queue up the MCE event so that we can log it later, while 1454 * returning from kernel or opal call. 1455 */ 1456 bl machine_check_queue_event 1457 MACHINE_CHECK_HANDLER_WINDUP 1458 rfid 14599: 1460 /* Deliver the machine check to host kernel in V mode. */ 1461 MACHINE_CHECK_HANDLER_WINDUP 1462 b machine_check_pSeries 1463 1464unrecover_mce: 1465 /* Invoke machine_check_exception to print MCE event and panic. */ 1466 addi r3,r1,STACK_FRAME_OVERHEAD 1467 bl machine_check_exception 1468 /* 1469 * We will not reach here. Even if we did, there is no way out. Call 1470 * unrecoverable_exception and die. 1471 */ 14721: addi r3,r1,STACK_FRAME_OVERHEAD 1473 bl unrecoverable_exception 1474 b 1b 1475/* 1476 * r13 points to the PACA, r9 contains the saved CR, 1477 * r12 contain the saved SRR1, SRR0 is still ready for return 1478 * r3 has the faulting address 1479 * r9 - r13 are saved in paca->exslb. 1480 * r3 is saved in paca->slb_r3 1481 * We assume we aren't going to take any exceptions during this procedure. 1482 */ 1483slb_miss_realmode: 1484 mflr r10 1485#ifdef CONFIG_RELOCATABLE 1486 mtctr r11 1487#endif 1488 1489 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ 1490 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ 1491 1492 bl slb_allocate_realmode 1493 1494 /* All done -- return from exception. */ 1495 1496 ld r10,PACA_EXSLB+EX_LR(r13) 1497 ld r3,PACA_EXSLB+EX_R3(r13) 1498 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ 1499 1500 mtlr r10 1501 1502 andi. r10,r12,MSR_RI /* check for unrecoverable exception */ 1503 beq- 2f 1504 1505.machine push 1506.machine "power4" 1507 mtcrf 0x80,r9 1508 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ 1509.machine pop 1510 1511 RESTORE_PPR_PACA(PACA_EXSLB, r9) 1512 ld r9,PACA_EXSLB+EX_R9(r13) 1513 ld r10,PACA_EXSLB+EX_R10(r13) 1514 ld r11,PACA_EXSLB+EX_R11(r13) 1515 ld r12,PACA_EXSLB+EX_R12(r13) 1516 ld r13,PACA_EXSLB+EX_R13(r13) 1517 rfid 1518 b . /* prevent speculative execution */ 1519 15202: mfspr r11,SPRN_SRR0 1521 ld r10,PACAKBASE(r13) 1522 LOAD_HANDLER(r10,unrecov_slb) 1523 mtspr SPRN_SRR0,r10 1524 ld r10,PACAKMSR(r13) 1525 mtspr SPRN_SRR1,r10 1526 rfid 1527 b . 1528 1529unrecov_slb: 1530 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) 1531 RECONCILE_IRQ_STATE(r10, r11) 1532 bl save_nvgprs 15331: addi r3,r1,STACK_FRAME_OVERHEAD 1534 bl unrecoverable_exception 1535 b 1b 1536 1537 1538#ifdef CONFIG_PPC_970_NAP 1539power4_fixup_nap: 1540 andc r9,r9,r10 1541 std r9,TI_LOCAL_FLAGS(r11) 1542 ld r10,_LINK(r1) /* make idle task do the */ 1543 std r10,_NIP(r1) /* equivalent of a blr */ 1544 blr 1545#endif 1546 1547/* 1548 * Hash table stuff 1549 */ 1550 .align 7 1551do_hash_page: 1552 std r3,_DAR(r1) 1553 std r4,_DSISR(r1) 1554 1555 andis. r0,r4,0xa410 /* weird error? */ 1556 bne- handle_page_fault /* if not, try to insert a HPTE */ 1557 andis. r0,r4,DSISR_DABRMATCH@h 1558 bne- handle_dabr_fault 1559 CURRENT_THREAD_INFO(r11, r1) 1560 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ 1561 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ 1562 bne 77f /* then don't call hash_page now */ 1563 /* 1564 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are 1565 * accessing a userspace segment (even from the kernel). We assume 1566 * kernel addresses always have the high bit set. 1567 */ 1568 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */ 1569 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */ 1570 orc r0,r12,r0 /* MSR_PR | ~high_bit */ 1571 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */ 1572 ori r4,r4,1 /* add _PAGE_PRESENT */ 1573 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ 1574 1575 /* 1576 * r3 contains the faulting address 1577 * r4 contains the required access permissions 1578 * r5 contains the trap number 1579 * 1580 * at return r3 = 0 for success, 1 for page fault, negative for error 1581 */ 1582 bl hash_page /* build HPTE if possible */ 1583 cmpdi r3,0 /* see if hash_page succeeded */ 1584 1585 /* Success */ 1586 beq fast_exc_return_irq /* Return from exception on success */ 1587 1588 /* Error */ 1589 blt- 13f 1590 1591/* Here we have a page fault that hash_page can't handle. */ 1592handle_page_fault: 159311: ld r4,_DAR(r1) 1594 ld r5,_DSISR(r1) 1595 addi r3,r1,STACK_FRAME_OVERHEAD 1596 bl do_page_fault 1597 cmpdi r3,0 1598 beq+ 12f 1599 bl save_nvgprs 1600 mr r5,r3 1601 addi r3,r1,STACK_FRAME_OVERHEAD 1602 lwz r4,_DAR(r1) 1603 bl bad_page_fault 1604 b ret_from_except 1605 1606/* We have a data breakpoint exception - handle it */ 1607handle_dabr_fault: 1608 bl save_nvgprs 1609 ld r4,_DAR(r1) 1610 ld r5,_DSISR(r1) 1611 addi r3,r1,STACK_FRAME_OVERHEAD 1612 bl do_break 161312: b ret_from_except_lite 1614 1615 1616/* We have a page fault that hash_page could handle but HV refused 1617 * the PTE insertion 1618 */ 161913: bl save_nvgprs 1620 mr r5,r3 1621 addi r3,r1,STACK_FRAME_OVERHEAD 1622 ld r4,_DAR(r1) 1623 bl low_hash_fault 1624 b ret_from_except 1625 1626/* 1627 * We come here as a result of a DSI at a point where we don't want 1628 * to call hash_page, such as when we are accessing memory (possibly 1629 * user memory) inside a PMU interrupt that occurred while interrupts 1630 * were soft-disabled. We want to invoke the exception handler for 1631 * the access, or panic if there isn't a handler. 1632 */ 163377: bl save_nvgprs 1634 mr r4,r3 1635 addi r3,r1,STACK_FRAME_OVERHEAD 1636 li r5,SIGSEGV 1637 bl bad_page_fault 1638 b ret_from_except 1639 1640/* 1641 * Here we have detected that the kernel stack pointer is bad. 1642 * R9 contains the saved CR, r13 points to the paca, 1643 * r10 contains the (bad) kernel stack pointer, 1644 * r11 and r12 contain the saved SRR0 and SRR1. 1645 * We switch to using an emergency stack, save the registers there, 1646 * and call kernel_bad_stack(), which panics. 1647 */ 1648bad_stack: 1649 ld r1,PACAEMERGSP(r13) 1650 subi r1,r1,64+INT_FRAME_SIZE 1651 std r9,_CCR(r1) 1652 std r10,GPR1(r1) 1653 std r11,_NIP(r1) 1654 std r12,_MSR(r1) 1655 mfspr r11,SPRN_DAR 1656 mfspr r12,SPRN_DSISR 1657 std r11,_DAR(r1) 1658 std r12,_DSISR(r1) 1659 mflr r10 1660 mfctr r11 1661 mfxer r12 1662 std r10,_LINK(r1) 1663 std r11,_CTR(r1) 1664 std r12,_XER(r1) 1665 SAVE_GPR(0,r1) 1666 SAVE_GPR(2,r1) 1667 ld r10,EX_R3(r3) 1668 std r10,GPR3(r1) 1669 SAVE_GPR(4,r1) 1670 SAVE_4GPRS(5,r1) 1671 ld r9,EX_R9(r3) 1672 ld r10,EX_R10(r3) 1673 SAVE_2GPRS(9,r1) 1674 ld r9,EX_R11(r3) 1675 ld r10,EX_R12(r3) 1676 ld r11,EX_R13(r3) 1677 std r9,GPR11(r1) 1678 std r10,GPR12(r1) 1679 std r11,GPR13(r1) 1680BEGIN_FTR_SECTION 1681 ld r10,EX_CFAR(r3) 1682 std r10,ORIG_GPR3(r1) 1683END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 1684 SAVE_8GPRS(14,r1) 1685 SAVE_10GPRS(22,r1) 1686 lhz r12,PACA_TRAP_SAVE(r13) 1687 std r12,_TRAP(r1) 1688 addi r11,r1,INT_FRAME_SIZE 1689 std r11,0(r1) 1690 li r12,0 1691 std r12,0(r11) 1692 ld r2,PACATOC(r13) 1693 ld r11,exception_marker@toc(r2) 1694 std r12,RESULT(r1) 1695 std r11,STACK_FRAME_OVERHEAD-16(r1) 16961: addi r3,r1,STACK_FRAME_OVERHEAD 1697 bl kernel_bad_stack 1698 b 1b 1699