1/* 2 * This file contains the 64-bit "server" PowerPC variant 3 * of the low level exception handling including exception 4 * vectors, exception return, part of the slb and stab 5 * handling and other fixed offset specific things. 6 * 7 * This file is meant to be #included from head_64.S due to 8 * position dependent assembly. 9 * 10 * Most of this originates from head_64.S and thus has the same 11 * copyright history. 12 * 13 */ 14 15#include <asm/hw_irq.h> 16#include <asm/exception-64s.h> 17#include <asm/ptrace.h> 18#include <asm/cpuidle.h> 19 20/* 21 * We layout physical memory as follows: 22 * 0x0000 - 0x00ff : Secondary processor spin code 23 * 0x0100 - 0x17ff : pSeries Interrupt prologs 24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs 25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 27 * 0x7000 - 0x7fff : FWNMI data area 28 * 0x8000 - 0x8fff : Initial (CPU0) segment table 29 * 0x9000 - : Early init and support code 30 */ 31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */ 32#define SYSCALL_PSERIES_1 \ 33BEGIN_FTR_SECTION \ 34 cmpdi r0,0x1ebe ; \ 35 beq- 1f ; \ 36END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ 37 mr r9,r13 ; \ 38 GET_PACA(r13) ; \ 39 mfspr r11,SPRN_SRR0 ; \ 400: 41 42#define SYSCALL_PSERIES_2_RFID \ 43 mfspr r12,SPRN_SRR1 ; \ 44 ld r10,PACAKBASE(r13) ; \ 45 LOAD_HANDLER(r10, system_call_entry) ; \ 46 mtspr SPRN_SRR0,r10 ; \ 47 ld r10,PACAKMSR(r13) ; \ 48 mtspr SPRN_SRR1,r10 ; \ 49 rfid ; \ 50 b . ; /* prevent speculative execution */ 51 52#define SYSCALL_PSERIES_3 \ 53 /* Fast LE/BE switch system call */ \ 541: mfspr r12,SPRN_SRR1 ; \ 55 xori r12,r12,MSR_LE ; \ 56 mtspr SPRN_SRR1,r12 ; \ 57 rfid ; /* return to userspace */ \ 58 b . ; /* prevent speculative execution */ 59 60#if defined(CONFIG_RELOCATABLE) 61 /* 62 * We can't branch directly so we do it via the CTR which 63 * is volatile across system calls. 64 */ 65#define SYSCALL_PSERIES_2_DIRECT \ 66 mflr r10 ; \ 67 ld r12,PACAKBASE(r13) ; \ 68 LOAD_HANDLER(r12, system_call_entry) ; \ 69 mtctr r12 ; \ 70 mfspr r12,SPRN_SRR1 ; \ 71 /* Re-use of r13... No spare regs to do this */ \ 72 li r13,MSR_RI ; \ 73 mtmsrd r13,1 ; \ 74 GET_PACA(r13) ; /* get r13 back */ \ 75 bctr ; 76#else 77 /* We can branch directly */ 78#define SYSCALL_PSERIES_2_DIRECT \ 79 mfspr r12,SPRN_SRR1 ; \ 80 li r10,MSR_RI ; \ 81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \ 82 b system_call_common ; 83#endif 84 85/* 86 * This is the start of the interrupt handlers for pSeries 87 * This code runs with relocation off. 88 * Code from here to __end_interrupts gets copied down to real 89 * address 0x100 when we are running a relocatable kernel. 90 * Therefore any relative branches in this section must only 91 * branch to labels in this section. 92 */ 93 . = 0x100 94 .globl __start_interrupts 95__start_interrupts: 96 97 .globl system_reset_pSeries; 98system_reset_pSeries: 99 SET_SCRATCH0(r13) 100#ifdef CONFIG_PPC_P7_NAP 101BEGIN_FTR_SECTION 102 /* Running native on arch 2.06 or later, check if we are 103 * waking up from nap/sleep/winkle. 104 */ 105 mfspr r13,SPRN_SRR1 106 rlwinm. r13,r13,47-31,30,31 107 beq 9f 108 109 cmpwi cr3,r13,2 110 GET_PACA(r13) 111 bl pnv_restore_hyp_resource 112 113 li r0,PNV_THREAD_RUNNING 114 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ 115 116#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 117 li r0,KVM_HWTHREAD_IN_KERNEL 118 stb r0,HSTATE_HWTHREAD_STATE(r13) 119 /* Order setting hwthread_state vs. testing hwthread_req */ 120 sync 121 lbz r0,HSTATE_HWTHREAD_REQ(r13) 122 cmpwi r0,0 123 beq 1f 124 b kvm_start_guest 1251: 126#endif 127 128 /* Return SRR1 from power7_nap() */ 129 mfspr r3,SPRN_SRR1 130 blt cr3,2f 131 b pnv_wakeup_loss 1322: b pnv_wakeup_noloss 133 1349: 135END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 136#endif /* CONFIG_PPC_P7_NAP */ 137 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 138 NOTEST, 0x100) 139 140 . = 0x200 141machine_check_pSeries_1: 142 /* This is moved out of line as it can be patched by FW, but 143 * some code path might still want to branch into the original 144 * vector 145 */ 146 SET_SCRATCH0(r13) /* save r13 */ 147#ifdef CONFIG_PPC_P7_NAP 148BEGIN_FTR_SECTION 149 /* Running native on arch 2.06 or later, check if we are 150 * waking up from nap. We only handle no state loss and 151 * supervisor state loss. We do -not- handle hypervisor 152 * state loss at this time. 153 */ 154 mfspr r13,SPRN_SRR1 155 rlwinm. r13,r13,47-31,30,31 156 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 157 beq 9f 158 159 mfspr r13,SPRN_SRR1 160 rlwinm. r13,r13,47-31,30,31 161 /* waking up from powersave (nap) state */ 162 cmpwi cr1,r13,2 163 /* Total loss of HV state is fatal. let's just stay stuck here */ 164 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 165 bgt cr1,. 1669: 167 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) 168END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 169#endif /* CONFIG_PPC_P7_NAP */ 170 EXCEPTION_PROLOG_0(PACA_EXMC) 171BEGIN_FTR_SECTION 172 b machine_check_powernv_early 173FTR_SECTION_ELSE 174 b machine_check_pSeries_0 175ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 176 177 . = 0x300 178 .globl data_access_pSeries 179data_access_pSeries: 180 SET_SCRATCH0(r13) 181 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, 182 KVMTEST, 0x300) 183 184 . = 0x380 185 .globl data_access_slb_pSeries 186data_access_slb_pSeries: 187 SET_SCRATCH0(r13) 188 EXCEPTION_PROLOG_0(PACA_EXSLB) 189 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) 190 std r3,PACA_EXSLB+EX_R3(r13) 191 mfspr r3,SPRN_DAR 192 mfspr r12,SPRN_SRR1 193#ifndef CONFIG_RELOCATABLE 194 b slb_miss_realmode 195#else 196 /* 197 * We can't just use a direct branch to slb_miss_realmode 198 * because the distance from here to there depends on where 199 * the kernel ends up being put. 200 */ 201 mfctr r11 202 ld r10,PACAKBASE(r13) 203 LOAD_HANDLER(r10, slb_miss_realmode) 204 mtctr r10 205 bctr 206#endif 207 208 STD_EXCEPTION_PSERIES(0x400, instruction_access) 209 210 . = 0x480 211 .globl instruction_access_slb_pSeries 212instruction_access_slb_pSeries: 213 SET_SCRATCH0(r13) 214 EXCEPTION_PROLOG_0(PACA_EXSLB) 215 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480) 216 std r3,PACA_EXSLB+EX_R3(r13) 217 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 218 mfspr r12,SPRN_SRR1 219#ifndef CONFIG_RELOCATABLE 220 b slb_miss_realmode 221#else 222 mfctr r11 223 ld r10,PACAKBASE(r13) 224 LOAD_HANDLER(r10, slb_miss_realmode) 225 mtctr r10 226 bctr 227#endif 228 229 /* We open code these as we can't have a ". = x" (even with 230 * x = "." within a feature section 231 */ 232 . = 0x500; 233 .globl hardware_interrupt_pSeries; 234 .globl hardware_interrupt_hv; 235hardware_interrupt_pSeries: 236hardware_interrupt_hv: 237 BEGIN_FTR_SECTION 238 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, 239 EXC_HV, SOFTEN_TEST_HV) 240 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) 241 FTR_SECTION_ELSE 242 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, 243 EXC_STD, SOFTEN_TEST_PR) 244 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) 245 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) 246 247 STD_EXCEPTION_PSERIES(0x600, alignment) 248 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600) 249 250 STD_EXCEPTION_PSERIES(0x700, program_check) 251 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700) 252 253 STD_EXCEPTION_PSERIES(0x800, fp_unavailable) 254 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800) 255 256 . = 0x900 257 .globl decrementer_pSeries 258decrementer_pSeries: 259 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) 260 261 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) 262 263 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) 264 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00) 265 266 STD_EXCEPTION_PSERIES(0xb00, trap_0b) 267 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00) 268 269 . = 0xc00 270 .globl system_call_pSeries 271system_call_pSeries: 272 /* 273 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems 274 * that support it) before changing to HMT_MEDIUM. That allows the KVM 275 * code to save that value into the guest state (it is the guest's PPR 276 * value). Otherwise just change to HMT_MEDIUM as userspace has 277 * already saved the PPR. 278 */ 279#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 280 SET_SCRATCH0(r13) 281 GET_PACA(r13) 282 std r9,PACA_EXGEN+EX_R9(r13) 283 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); 284 HMT_MEDIUM; 285 std r10,PACA_EXGEN+EX_R10(r13) 286 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); 287 mfcr r9 288 KVMTEST(0xc00) 289 GET_SCRATCH0(r13) 290#else 291 HMT_MEDIUM; 292#endif 293 SYSCALL_PSERIES_1 294 SYSCALL_PSERIES_2_RFID 295 SYSCALL_PSERIES_3 296 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) 297 298 STD_EXCEPTION_PSERIES(0xd00, single_step) 299 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00) 300 301 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch 302 * out of line to handle them 303 */ 304 . = 0xe00 305hv_data_storage_trampoline: 306 SET_SCRATCH0(r13) 307 EXCEPTION_PROLOG_0(PACA_EXGEN) 308 b h_data_storage_hv 309 310 . = 0xe20 311hv_instr_storage_trampoline: 312 SET_SCRATCH0(r13) 313 EXCEPTION_PROLOG_0(PACA_EXGEN) 314 b h_instr_storage_hv 315 316 . = 0xe40 317emulation_assist_trampoline: 318 SET_SCRATCH0(r13) 319 EXCEPTION_PROLOG_0(PACA_EXGEN) 320 b emulation_assist_hv 321 322 . = 0xe60 323hv_exception_trampoline: 324 SET_SCRATCH0(r13) 325 EXCEPTION_PROLOG_0(PACA_EXGEN) 326 b hmi_exception_early 327 328 . = 0xe80 329hv_doorbell_trampoline: 330 SET_SCRATCH0(r13) 331 EXCEPTION_PROLOG_0(PACA_EXGEN) 332 b h_doorbell_hv 333 334 . = 0xea0 335hv_virt_irq_trampoline: 336 SET_SCRATCH0(r13) 337 EXCEPTION_PROLOG_0(PACA_EXGEN) 338 b h_virt_irq_hv 339 340 /* We need to deal with the Altivec unavailable exception 341 * here which is at 0xf20, thus in the middle of the 342 * prolog code of the PerformanceMonitor one. A little 343 * trickery is thus necessary 344 */ 345 . = 0xf00 346performance_monitor_pseries_trampoline: 347 SET_SCRATCH0(r13) 348 EXCEPTION_PROLOG_0(PACA_EXGEN) 349 b performance_monitor_pSeries 350 351 . = 0xf20 352altivec_unavailable_pseries_trampoline: 353 SET_SCRATCH0(r13) 354 EXCEPTION_PROLOG_0(PACA_EXGEN) 355 b altivec_unavailable_pSeries 356 357 . = 0xf40 358vsx_unavailable_pseries_trampoline: 359 SET_SCRATCH0(r13) 360 EXCEPTION_PROLOG_0(PACA_EXGEN) 361 b vsx_unavailable_pSeries 362 363 . = 0xf60 364facility_unavailable_trampoline: 365 SET_SCRATCH0(r13) 366 EXCEPTION_PROLOG_0(PACA_EXGEN) 367 b facility_unavailable_pSeries 368 369 . = 0xf80 370hv_facility_unavailable_trampoline: 371 SET_SCRATCH0(r13) 372 EXCEPTION_PROLOG_0(PACA_EXGEN) 373 b facility_unavailable_hv 374 375#ifdef CONFIG_CBE_RAS 376 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) 377 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) 378#endif /* CONFIG_CBE_RAS */ 379 380 STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) 381 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300) 382 383 . = 0x1500 384 .global denorm_exception_hv 385denorm_exception_hv: 386 mtspr SPRN_SPRG_HSCRATCH0,r13 387 EXCEPTION_PROLOG_0(PACA_EXGEN) 388 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) 389 390#ifdef CONFIG_PPC_DENORMALISATION 391 mfspr r10,SPRN_HSRR1 392 mfspr r11,SPRN_HSRR0 /* save HSRR0 */ 393 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ 394 addi r11,r11,-4 /* HSRR0 is next instruction */ 395 bne+ denorm_assist 396#endif 397 398 KVMTEST(0x1500) 399 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) 400 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) 401 402#ifdef CONFIG_CBE_RAS 403 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) 404 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) 405#endif /* CONFIG_CBE_RAS */ 406 407 STD_EXCEPTION_PSERIES(0x1700, altivec_assist) 408 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700) 409 410#ifdef CONFIG_CBE_RAS 411 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) 412 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) 413#else 414 . = 0x1800 415#endif /* CONFIG_CBE_RAS */ 416 417 418/*** Out of line interrupts support ***/ 419 420 .align 7 421 /* moved from 0x200 */ 422machine_check_powernv_early: 423BEGIN_FTR_SECTION 424 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) 425 /* 426 * Register contents: 427 * R13 = PACA 428 * R9 = CR 429 * Original R9 to R13 is saved on PACA_EXMC 430 * 431 * Switch to mc_emergency stack and handle re-entrancy (we limit 432 * the nested MCE upto level 4 to avoid stack overflow). 433 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 434 * 435 * We use paca->in_mce to check whether this is the first entry or 436 * nested machine check. We increment paca->in_mce to track nested 437 * machine checks. 438 * 439 * If this is the first entry then set stack pointer to 440 * paca->mc_emergency_sp, otherwise r1 is already pointing to 441 * stack frame on mc_emergency stack. 442 * 443 * NOTE: We are here with MSR_ME=0 (off), which means we risk a 444 * checkstop if we get another machine check exception before we do 445 * rfid with MSR_ME=1. 446 */ 447 mr r11,r1 /* Save r1 */ 448 lhz r10,PACA_IN_MCE(r13) 449 cmpwi r10,0 /* Are we in nested machine check */ 450 bne 0f /* Yes, we are. */ 451 /* First machine check entry */ 452 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ 4530: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 454 addi r10,r10,1 /* increment paca->in_mce */ 455 sth r10,PACA_IN_MCE(r13) 456 /* Limit nested MCE to level 4 to avoid stack overflow */ 457 cmpwi r10,4 458 bgt 2f /* Check if we hit limit of 4 */ 459 std r11,GPR1(r1) /* Save r1 on the stack. */ 460 std r11,0(r1) /* make stack chain pointer */ 461 mfspr r11,SPRN_SRR0 /* Save SRR0 */ 462 std r11,_NIP(r1) 463 mfspr r11,SPRN_SRR1 /* Save SRR1 */ 464 std r11,_MSR(r1) 465 mfspr r11,SPRN_DAR /* Save DAR */ 466 std r11,_DAR(r1) 467 mfspr r11,SPRN_DSISR /* Save DSISR */ 468 std r11,_DSISR(r1) 469 std r9,_CCR(r1) /* Save CR in stackframe */ 470 /* Save r9 through r13 from EXMC save area to stack frame. */ 471 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) 472 mfmsr r11 /* get MSR value */ 473 ori r11,r11,MSR_ME /* turn on ME bit */ 474 ori r11,r11,MSR_RI /* turn on RI bit */ 475 ld r12,PACAKBASE(r13) /* get high part of &label */ 476 LOAD_HANDLER(r12, machine_check_handle_early) 4771: mtspr SPRN_SRR0,r12 478 mtspr SPRN_SRR1,r11 479 rfid 480 b . /* prevent speculative execution */ 4812: 482 /* Stack overflow. Stay on emergency stack and panic. 483 * Keep the ME bit off while panic-ing, so that if we hit 484 * another machine check we checkstop. 485 */ 486 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ 487 ld r11,PACAKMSR(r13) 488 ld r12,PACAKBASE(r13) 489 LOAD_HANDLER(r12, unrecover_mce) 490 li r10,MSR_ME 491 andc r11,r11,r10 /* Turn off MSR_ME */ 492 b 1b 493 b . /* prevent speculative execution */ 494END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 495 496machine_check_pSeries: 497 .globl machine_check_fwnmi 498machine_check_fwnmi: 499 SET_SCRATCH0(r13) /* save r13 */ 500 EXCEPTION_PROLOG_0(PACA_EXMC) 501machine_check_pSeries_0: 502 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) 503 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) 504 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) 505 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) 506 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) 507 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400) 508 KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480) 509 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900) 510 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) 511 512#ifdef CONFIG_PPC_DENORMALISATION 513denorm_assist: 514BEGIN_FTR_SECTION 515/* 516 * To denormalise we need to move a copy of the register to itself. 517 * For POWER6 do that here for all FP regs. 518 */ 519 mfmsr r10 520 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) 521 xori r10,r10,(MSR_FE0|MSR_FE1) 522 mtmsrd r10 523 sync 524 525#define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 526#define FMR4(n) FMR2(n) ; FMR2(n+2) 527#define FMR8(n) FMR4(n) ; FMR4(n+4) 528#define FMR16(n) FMR8(n) ; FMR8(n+8) 529#define FMR32(n) FMR16(n) ; FMR16(n+16) 530 FMR32(0) 531 532FTR_SECTION_ELSE 533/* 534 * To denormalise we need to move a copy of the register to itself. 535 * For POWER7 do that here for the first 32 VSX registers only. 536 */ 537 mfmsr r10 538 oris r10,r10,MSR_VSX@h 539 mtmsrd r10 540 sync 541 542#define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) 543#define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) 544#define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) 545#define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) 546#define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) 547 XVCPSGNDP32(0) 548 549ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) 550 551BEGIN_FTR_SECTION 552 b denorm_done 553END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) 554/* 555 * To denormalise we need to move a copy of the register to itself. 556 * For POWER8 we need to do that for all 64 VSX registers 557 */ 558 XVCPSGNDP32(32) 559denorm_done: 560 mtspr SPRN_HSRR0,r11 561 mtcrf 0x80,r9 562 ld r9,PACA_EXGEN+EX_R9(r13) 563 RESTORE_PPR_PACA(PACA_EXGEN, r10) 564BEGIN_FTR_SECTION 565 ld r10,PACA_EXGEN+EX_CFAR(r13) 566 mtspr SPRN_CFAR,r10 567END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 568 ld r10,PACA_EXGEN+EX_R10(r13) 569 ld r11,PACA_EXGEN+EX_R11(r13) 570 ld r12,PACA_EXGEN+EX_R12(r13) 571 ld r13,PACA_EXGEN+EX_R13(r13) 572 HRFID 573 b . 574#endif 575 576 .align 7 577 /* moved from 0xe00 */ 578 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) 579 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) 580 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) 581 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) 582 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) 583 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) 584 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) 585 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) 586 587 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) 588 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) 589 590 MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq) 591 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2) 592 593 /* moved from 0xf00 */ 594 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 595 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) 596 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 597 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20) 598 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 599 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40) 600 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 601 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60) 602 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) 603 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) 604 605/* 606 * An interrupt came in while soft-disabled. We set paca->irq_happened, then: 607 * - If it was a decrementer interrupt, we bump the dec to max and and return. 608 * - If it was a doorbell we return immediately since doorbells are edge 609 * triggered and won't automatically refire. 610 * - If it was a HMI we return immediately since we handled it in realmode 611 * and it won't refire. 612 * - else we hard disable and return. 613 * This is called with r10 containing the value to OR to the paca field. 614 */ 615#define MASKED_INTERRUPT(_H) \ 616masked_##_H##interrupt: \ 617 std r11,PACA_EXGEN+EX_R11(r13); \ 618 lbz r11,PACAIRQHAPPENED(r13); \ 619 or r11,r11,r10; \ 620 stb r11,PACAIRQHAPPENED(r13); \ 621 cmpwi r10,PACA_IRQ_DEC; \ 622 bne 1f; \ 623 lis r10,0x7fff; \ 624 ori r10,r10,0xffff; \ 625 mtspr SPRN_DEC,r10; \ 626 b 2f; \ 6271: cmpwi r10,PACA_IRQ_DBELL; \ 628 beq 2f; \ 629 cmpwi r10,PACA_IRQ_HMI; \ 630 beq 2f; \ 631 mfspr r10,SPRN_##_H##SRR1; \ 632 rldicl r10,r10,48,1; /* clear MSR_EE */ \ 633 rotldi r10,r10,16; \ 634 mtspr SPRN_##_H##SRR1,r10; \ 6352: mtcrf 0x80,r9; \ 636 ld r9,PACA_EXGEN+EX_R9(r13); \ 637 ld r10,PACA_EXGEN+EX_R10(r13); \ 638 ld r11,PACA_EXGEN+EX_R11(r13); \ 639 GET_SCRATCH0(r13); \ 640 ##_H##rfid; \ 641 b . 642 643 MASKED_INTERRUPT() 644 MASKED_INTERRUPT(H) 645 646/* 647 * Called from arch_local_irq_enable when an interrupt needs 648 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate 649 * which kind of interrupt. MSR:EE is already off. We generate a 650 * stackframe like if a real interrupt had happened. 651 * 652 * Note: While MSR:EE is off, we need to make sure that _MSR 653 * in the generated frame has EE set to 1 or the exception 654 * handler will not properly re-enable them. 655 */ 656_GLOBAL(__replay_interrupt) 657 /* We are going to jump to the exception common code which 658 * will retrieve various register values from the PACA which 659 * we don't give a damn about, so we don't bother storing them. 660 */ 661 mfmsr r12 662 mflr r11 663 mfcr r9 664 ori r12,r12,MSR_EE 665 cmpwi r3,0x900 666 beq decrementer_common 667 cmpwi r3,0x500 668 beq hardware_interrupt_common 669BEGIN_FTR_SECTION 670 cmpwi r3,0xe80 671 beq h_doorbell_common 672 cmpwi r3,0xea0 673 beq h_virt_irq_common 674 cmpwi r3,0xe60 675 beq hmi_exception_common 676FTR_SECTION_ELSE 677 cmpwi r3,0xa00 678 beq doorbell_super_common 679ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 680 blr 681 682#ifdef CONFIG_PPC_PSERIES 683/* 684 * Vectors for the FWNMI option. Share common code. 685 */ 686 .globl system_reset_fwnmi 687 .align 7 688system_reset_fwnmi: 689 SET_SCRATCH0(r13) /* save r13 */ 690 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, 691 NOTEST, 0x100) 692 693#endif /* CONFIG_PPC_PSERIES */ 694 695#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 696kvmppc_skip_interrupt: 697 /* 698 * Here all GPRs are unchanged from when the interrupt happened 699 * except for r13, which is saved in SPRG_SCRATCH0. 700 */ 701 mfspr r13, SPRN_SRR0 702 addi r13, r13, 4 703 mtspr SPRN_SRR0, r13 704 GET_SCRATCH0(r13) 705 rfid 706 b . 707 708kvmppc_skip_Hinterrupt: 709 /* 710 * Here all GPRs are unchanged from when the interrupt happened 711 * except for r13, which is saved in SPRG_SCRATCH0. 712 */ 713 mfspr r13, SPRN_HSRR0 714 addi r13, r13, 4 715 mtspr SPRN_HSRR0, r13 716 GET_SCRATCH0(r13) 717 hrfid 718 b . 719#endif 720 721/* 722 * Ensure that any handlers that get invoked from the exception prologs 723 * above are below the first 64KB (0x10000) of the kernel image because 724 * the prologs assemble the addresses of these handlers using the 725 * LOAD_HANDLER macro, which uses an ori instruction. 726 */ 727 728/*** Common interrupt handlers ***/ 729 730 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) 731 732 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) 733 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) 734 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) 735#ifdef CONFIG_PPC_DOORBELL 736 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) 737#else 738 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) 739#endif 740 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) 741 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) 742 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) 743 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) 744 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) 745#ifdef CONFIG_PPC_DOORBELL 746 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) 747#else 748 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) 749#endif 750 STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ) 751 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) 752 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) 753 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) 754#ifdef CONFIG_ALTIVEC 755 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) 756#else 757 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) 758#endif 759 760 /* 761 * Relocation-on interrupts: A subset of the interrupts can be delivered 762 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering 763 * it. Addresses are the same as the original interrupt addresses, but 764 * offset by 0xc000000000004000. 765 * It's impossible to receive interrupts below 0x300 via this mechanism. 766 * KVM: None of these traps are from the guest ; anything that escalated 767 * to HV=1 from HV=0 is delivered via real mode handlers. 768 */ 769 770 /* 771 * This uses the standard macro, since the original 0x300 vector 772 * only has extra guff for STAB-based processors -- which never 773 * come here. 774 */ 775 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) 776 . = 0x4380 777 .globl data_access_slb_relon_pSeries 778data_access_slb_relon_pSeries: 779 SET_SCRATCH0(r13) 780 EXCEPTION_PROLOG_0(PACA_EXSLB) 781 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) 782 std r3,PACA_EXSLB+EX_R3(r13) 783 mfspr r3,SPRN_DAR 784 mfspr r12,SPRN_SRR1 785#ifndef CONFIG_RELOCATABLE 786 b slb_miss_realmode 787#else 788 /* 789 * We can't just use a direct branch to slb_miss_realmode 790 * because the distance from here to there depends on where 791 * the kernel ends up being put. 792 */ 793 mfctr r11 794 ld r10,PACAKBASE(r13) 795 LOAD_HANDLER(r10, slb_miss_realmode) 796 mtctr r10 797 bctr 798#endif 799 800 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) 801 . = 0x4480 802 .globl instruction_access_slb_relon_pSeries 803instruction_access_slb_relon_pSeries: 804 SET_SCRATCH0(r13) 805 EXCEPTION_PROLOG_0(PACA_EXSLB) 806 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) 807 std r3,PACA_EXSLB+EX_R3(r13) 808 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ 809 mfspr r12,SPRN_SRR1 810#ifndef CONFIG_RELOCATABLE 811 b slb_miss_realmode 812#else 813 mfctr r11 814 ld r10,PACAKBASE(r13) 815 LOAD_HANDLER(r10, slb_miss_realmode) 816 mtctr r10 817 bctr 818#endif 819 820 . = 0x4500 821 .globl hardware_interrupt_relon_pSeries; 822 .globl hardware_interrupt_relon_hv; 823hardware_interrupt_relon_pSeries: 824hardware_interrupt_relon_hv: 825 BEGIN_FTR_SECTION 826 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) 827 FTR_SECTION_ELSE 828 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) 829 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) 830 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) 831 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) 832 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) 833 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) 834 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) 835 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) 836 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) 837 838 . = 0x4c00 839 .globl system_call_relon_pSeries 840system_call_relon_pSeries: 841 HMT_MEDIUM 842 SYSCALL_PSERIES_1 843 SYSCALL_PSERIES_2_DIRECT 844 SYSCALL_PSERIES_3 845 846 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) 847 848 . = 0x4e00 849 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 850 851 . = 0x4e20 852 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 853 854 . = 0x4e40 855emulation_assist_relon_trampoline: 856 SET_SCRATCH0(r13) 857 EXCEPTION_PROLOG_0(PACA_EXGEN) 858 b emulation_assist_relon_hv 859 860 . = 0x4e60 861 b . /* Can't happen, see v2.07 Book III-S section 6.5 */ 862 863 . = 0x4e80 864h_doorbell_relon_trampoline: 865 SET_SCRATCH0(r13) 866 EXCEPTION_PROLOG_0(PACA_EXGEN) 867 b h_doorbell_relon_hv 868 869 . = 0x4ea0 870h_virt_irq_relon_trampoline: 871 SET_SCRATCH0(r13) 872 EXCEPTION_PROLOG_0(PACA_EXGEN) 873 b h_virt_irq_relon_hv 874 875 . = 0x4f00 876performance_monitor_relon_pseries_trampoline: 877 SET_SCRATCH0(r13) 878 EXCEPTION_PROLOG_0(PACA_EXGEN) 879 b performance_monitor_relon_pSeries 880 881 . = 0x4f20 882altivec_unavailable_relon_pseries_trampoline: 883 SET_SCRATCH0(r13) 884 EXCEPTION_PROLOG_0(PACA_EXGEN) 885 b altivec_unavailable_relon_pSeries 886 887 . = 0x4f40 888vsx_unavailable_relon_pseries_trampoline: 889 SET_SCRATCH0(r13) 890 EXCEPTION_PROLOG_0(PACA_EXGEN) 891 b vsx_unavailable_relon_pSeries 892 893 . = 0x4f60 894facility_unavailable_relon_trampoline: 895 SET_SCRATCH0(r13) 896 EXCEPTION_PROLOG_0(PACA_EXGEN) 897 b facility_unavailable_relon_pSeries 898 899 . = 0x4f80 900hv_facility_unavailable_relon_trampoline: 901 SET_SCRATCH0(r13) 902 EXCEPTION_PROLOG_0(PACA_EXGEN) 903 b hv_facility_unavailable_relon_hv 904 905 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) 906#ifdef CONFIG_PPC_DENORMALISATION 907 . = 0x5500 908 b denorm_exception_hv 909#endif 910 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) 911 912 .align 7 913system_call_entry: 914 b system_call_common 915 916ppc64_runlatch_on_trampoline: 917 b __ppc64_runlatch_on 918 919/* 920 * Here r13 points to the paca, r9 contains the saved CR, 921 * SRR0 and SRR1 are saved in r11 and r12, 922 * r9 - r13 are saved in paca->exgen. 923 */ 924 .align 7 925 .globl data_access_common 926data_access_common: 927 mfspr r10,SPRN_DAR 928 std r10,PACA_EXGEN+EX_DAR(r13) 929 mfspr r10,SPRN_DSISR 930 stw r10,PACA_EXGEN+EX_DSISR(r13) 931 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) 932 RECONCILE_IRQ_STATE(r10, r11) 933 ld r12,_MSR(r1) 934 ld r3,PACA_EXGEN+EX_DAR(r13) 935 lwz r4,PACA_EXGEN+EX_DSISR(r13) 936 li r5,0x300 937 std r3,_DAR(r1) 938 std r4,_DSISR(r1) 939BEGIN_MMU_FTR_SECTION 940 b do_hash_page /* Try to handle as hpte fault */ 941MMU_FTR_SECTION_ELSE 942 b handle_page_fault 943ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) 944 945 .align 7 946 .globl h_data_storage_common 947h_data_storage_common: 948 mfspr r10,SPRN_HDAR 949 std r10,PACA_EXGEN+EX_DAR(r13) 950 mfspr r10,SPRN_HDSISR 951 stw r10,PACA_EXGEN+EX_DSISR(r13) 952 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) 953 bl save_nvgprs 954 RECONCILE_IRQ_STATE(r10, r11) 955 addi r3,r1,STACK_FRAME_OVERHEAD 956 bl unknown_exception 957 b ret_from_except 958 959 .align 7 960 .globl instruction_access_common 961instruction_access_common: 962 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) 963 RECONCILE_IRQ_STATE(r10, r11) 964 ld r12,_MSR(r1) 965 ld r3,_NIP(r1) 966 andis. r4,r12,0x5820 967 li r5,0x400 968 std r3,_DAR(r1) 969 std r4,_DSISR(r1) 970BEGIN_MMU_FTR_SECTION 971 b do_hash_page /* Try to handle as hpte fault */ 972MMU_FTR_SECTION_ELSE 973 b handle_page_fault 974ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) 975 976 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) 977 978 /* 979 * Machine check is different because we use a different 980 * save area: PACA_EXMC instead of PACA_EXGEN. 981 */ 982 .align 7 983 .globl machine_check_common 984machine_check_common: 985 986 mfspr r10,SPRN_DAR 987 std r10,PACA_EXGEN+EX_DAR(r13) 988 mfspr r10,SPRN_DSISR 989 stw r10,PACA_EXGEN+EX_DSISR(r13) 990 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) 991 FINISH_NAP 992 RECONCILE_IRQ_STATE(r10, r11) 993 ld r3,PACA_EXGEN+EX_DAR(r13) 994 lwz r4,PACA_EXGEN+EX_DSISR(r13) 995 std r3,_DAR(r1) 996 std r4,_DSISR(r1) 997 bl save_nvgprs 998 addi r3,r1,STACK_FRAME_OVERHEAD 999 bl machine_check_exception 1000 b ret_from_except 1001 1002 .align 7 1003 .globl alignment_common 1004alignment_common: 1005 mfspr r10,SPRN_DAR 1006 std r10,PACA_EXGEN+EX_DAR(r13) 1007 mfspr r10,SPRN_DSISR 1008 stw r10,PACA_EXGEN+EX_DSISR(r13) 1009 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) 1010 ld r3,PACA_EXGEN+EX_DAR(r13) 1011 lwz r4,PACA_EXGEN+EX_DSISR(r13) 1012 std r3,_DAR(r1) 1013 std r4,_DSISR(r1) 1014 bl save_nvgprs 1015 RECONCILE_IRQ_STATE(r10, r11) 1016 addi r3,r1,STACK_FRAME_OVERHEAD 1017 bl alignment_exception 1018 b ret_from_except 1019 1020 .align 7 1021 .globl program_check_common 1022program_check_common: 1023 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) 1024 bl save_nvgprs 1025 RECONCILE_IRQ_STATE(r10, r11) 1026 addi r3,r1,STACK_FRAME_OVERHEAD 1027 bl program_check_exception 1028 b ret_from_except 1029 1030 .align 7 1031 .globl fp_unavailable_common 1032fp_unavailable_common: 1033 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) 1034 bne 1f /* if from user, just load it up */ 1035 bl save_nvgprs 1036 RECONCILE_IRQ_STATE(r10, r11) 1037 addi r3,r1,STACK_FRAME_OVERHEAD 1038 bl kernel_fp_unavailable_exception 1039 BUG_OPCODE 10401: 1041#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1042BEGIN_FTR_SECTION 1043 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1044 * transaction), go do TM stuff 1045 */ 1046 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1047 bne- 2f 1048END_FTR_SECTION_IFSET(CPU_FTR_TM) 1049#endif 1050 bl load_up_fpu 1051 b fast_exception_return 1052#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10532: /* User process was in a transaction */ 1054 bl save_nvgprs 1055 RECONCILE_IRQ_STATE(r10, r11) 1056 addi r3,r1,STACK_FRAME_OVERHEAD 1057 bl fp_unavailable_tm 1058 b ret_from_except 1059#endif 1060 .align 7 1061 .globl altivec_unavailable_common 1062altivec_unavailable_common: 1063 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) 1064#ifdef CONFIG_ALTIVEC 1065BEGIN_FTR_SECTION 1066 beq 1f 1067#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1068 BEGIN_FTR_SECTION_NESTED(69) 1069 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1070 * transaction), go do TM stuff 1071 */ 1072 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1073 bne- 2f 1074 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1075#endif 1076 bl load_up_altivec 1077 b fast_exception_return 1078#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10792: /* User process was in a transaction */ 1080 bl save_nvgprs 1081 RECONCILE_IRQ_STATE(r10, r11) 1082 addi r3,r1,STACK_FRAME_OVERHEAD 1083 bl altivec_unavailable_tm 1084 b ret_from_except 1085#endif 10861: 1087END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 1088#endif 1089 bl save_nvgprs 1090 RECONCILE_IRQ_STATE(r10, r11) 1091 addi r3,r1,STACK_FRAME_OVERHEAD 1092 bl altivec_unavailable_exception 1093 b ret_from_except 1094 1095 .align 7 1096 .globl vsx_unavailable_common 1097vsx_unavailable_common: 1098 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) 1099#ifdef CONFIG_VSX 1100BEGIN_FTR_SECTION 1101 beq 1f 1102#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1103 BEGIN_FTR_SECTION_NESTED(69) 1104 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in 1105 * transaction), go do TM stuff 1106 */ 1107 rldicl. r0, r12, (64-MSR_TS_LG), (64-2) 1108 bne- 2f 1109 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) 1110#endif 1111 b load_up_vsx 1112#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 11132: /* User process was in a transaction */ 1114 bl save_nvgprs 1115 RECONCILE_IRQ_STATE(r10, r11) 1116 addi r3,r1,STACK_FRAME_OVERHEAD 1117 bl vsx_unavailable_tm 1118 b ret_from_except 1119#endif 11201: 1121END_FTR_SECTION_IFSET(CPU_FTR_VSX) 1122#endif 1123 bl save_nvgprs 1124 RECONCILE_IRQ_STATE(r10, r11) 1125 addi r3,r1,STACK_FRAME_OVERHEAD 1126 bl vsx_unavailable_exception 1127 b ret_from_except 1128 1129 /* Equivalents to the above handlers for relocation-on interrupt vectors */ 1130 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) 1131 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) 1132 MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq) 1133 1134 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) 1135 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 1136 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 1137 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 1138 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) 1139 1140 /* 1141 * The __end_interrupts marker must be past the out-of-line (OOL) 1142 * handlers, so that they are copied to real address 0x100 when running 1143 * a relocatable kernel. This ensures they can be reached from the short 1144 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch 1145 * directly, without using LOAD_HANDLER(). 1146 */ 1147 .align 7 1148 .globl __end_interrupts 1149__end_interrupts: 1150 1151#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) 1152/* 1153 * Data area reserved for FWNMI option. 1154 * This address (0x7000) is fixed by the RPA. 1155 */ 1156 .= 0x7000 1157 .globl fwnmi_data_area 1158fwnmi_data_area: 1159 1160 /* pseries and powernv need to keep the whole page from 1161 * 0x7000 to 0x8000 free for use by the firmware 1162 */ 1163 . = 0x8000 1164#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ 1165 1166 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) 1167 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) 1168 1169#ifdef CONFIG_CBE_RAS 1170 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) 1171 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) 1172 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) 1173#endif /* CONFIG_CBE_RAS */ 1174 1175 .globl hmi_exception_early 1176hmi_exception_early: 1177 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, 0xe62) 1178 mr r10,r1 /* Save r1 */ 1179 ld r1,PACAEMERGSP(r13) /* Use emergency stack */ 1180 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ 1181 std r9,_CCR(r1) /* save CR in stackframe */ 1182 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ 1183 std r11,_NIP(r1) /* save HSRR0 in stackframe */ 1184 mfspr r12,SPRN_HSRR1 /* Save SRR1 */ 1185 std r12,_MSR(r1) /* save SRR1 in stackframe */ 1186 std r10,0(r1) /* make stack chain pointer */ 1187 std r0,GPR0(r1) /* save r0 in stackframe */ 1188 std r10,GPR1(r1) /* save r1 in stackframe */ 1189 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) 1190 EXCEPTION_PROLOG_COMMON_3(0xe60) 1191 addi r3,r1,STACK_FRAME_OVERHEAD 1192 bl hmi_exception_realmode 1193 /* Windup the stack. */ 1194 /* Move original HSRR0 and HSRR1 into the respective regs */ 1195 ld r9,_MSR(r1) 1196 mtspr SPRN_HSRR1,r9 1197 ld r3,_NIP(r1) 1198 mtspr SPRN_HSRR0,r3 1199 ld r9,_CTR(r1) 1200 mtctr r9 1201 ld r9,_XER(r1) 1202 mtxer r9 1203 ld r9,_LINK(r1) 1204 mtlr r9 1205 REST_GPR(0, r1) 1206 REST_8GPRS(2, r1) 1207 REST_GPR(10, r1) 1208 ld r11,_CCR(r1) 1209 mtcr r11 1210 REST_GPR(11, r1) 1211 REST_2GPRS(12, r1) 1212 /* restore original r1. */ 1213 ld r1,GPR1(r1) 1214 1215 /* 1216 * Go to virtual mode and pull the HMI event information from 1217 * firmware. 1218 */ 1219 .globl hmi_exception_after_realmode 1220hmi_exception_after_realmode: 1221 SET_SCRATCH0(r13) 1222 EXCEPTION_PROLOG_0(PACA_EXGEN) 1223 b hmi_exception_hv 1224 1225 1226#define MACHINE_CHECK_HANDLER_WINDUP \ 1227 /* Clear MSR_RI before setting SRR0 and SRR1. */\ 1228 li r0,MSR_RI; \ 1229 mfmsr r9; /* get MSR value */ \ 1230 andc r9,r9,r0; \ 1231 mtmsrd r9,1; /* Clear MSR_RI */ \ 1232 /* Move original SRR0 and SRR1 into the respective regs */ \ 1233 ld r9,_MSR(r1); \ 1234 mtspr SPRN_SRR1,r9; \ 1235 ld r3,_NIP(r1); \ 1236 mtspr SPRN_SRR0,r3; \ 1237 ld r9,_CTR(r1); \ 1238 mtctr r9; \ 1239 ld r9,_XER(r1); \ 1240 mtxer r9; \ 1241 ld r9,_LINK(r1); \ 1242 mtlr r9; \ 1243 REST_GPR(0, r1); \ 1244 REST_8GPRS(2, r1); \ 1245 REST_GPR(10, r1); \ 1246 ld r11,_CCR(r1); \ 1247 mtcr r11; \ 1248 /* Decrement paca->in_mce. */ \ 1249 lhz r12,PACA_IN_MCE(r13); \ 1250 subi r12,r12,1; \ 1251 sth r12,PACA_IN_MCE(r13); \ 1252 REST_GPR(11, r1); \ 1253 REST_2GPRS(12, r1); \ 1254 /* restore original r1. */ \ 1255 ld r1,GPR1(r1) 1256 1257 /* 1258 * Handle machine check early in real mode. We come here with 1259 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. 1260 */ 1261 .align 7 1262 .globl machine_check_handle_early 1263machine_check_handle_early: 1264 std r0,GPR0(r1) /* Save r0 */ 1265 EXCEPTION_PROLOG_COMMON_3(0x200) 1266 bl save_nvgprs 1267 addi r3,r1,STACK_FRAME_OVERHEAD 1268 bl machine_check_early 1269 std r3,RESULT(r1) /* Save result */ 1270 ld r12,_MSR(r1) 1271#ifdef CONFIG_PPC_P7_NAP 1272 /* 1273 * Check if thread was in power saving mode. We come here when any 1274 * of the following is true: 1275 * a. thread wasn't in power saving mode 1276 * b. thread was in power saving mode with no state loss or 1277 * supervisor state loss 1278 * 1279 * Go back to nap again if (b) is true. 1280 */ 1281 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ 1282 beq 4f /* No, it wasn;t */ 1283 /* Thread was in power saving mode. Go back to nap again. */ 1284 cmpwi r11,2 1285 bne 3f 1286 /* Supervisor state loss */ 1287 li r0,1 1288 stb r0,PACA_NAPSTATELOST(r13) 12893: bl machine_check_queue_event 1290 MACHINE_CHECK_HANDLER_WINDUP 1291 GET_PACA(r13) 1292 ld r1,PACAR1(r13) 1293 li r3,PNV_THREAD_NAP 1294 b pnv_enter_arch207_idle_mode 12954: 1296#endif 1297 /* 1298 * Check if we are coming from hypervisor userspace. If yes then we 1299 * continue in host kernel in V mode to deliver the MC event. 1300 */ 1301 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ 1302 beq 5f 1303 andi. r11,r12,MSR_PR /* See if coming from user. */ 1304 bne 9f /* continue in V mode if we are. */ 1305 13065: 1307#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 1308 /* 1309 * We are coming from kernel context. Check if we are coming from 1310 * guest. if yes, then we can continue. We will fall through 1311 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. 1312 */ 1313 lbz r11,HSTATE_IN_GUEST(r13) 1314 cmpwi r11,0 /* Check if coming from guest */ 1315 bne 9f /* continue if we are. */ 1316#endif 1317 /* 1318 * At this point we are not sure about what context we come from. 1319 * Queue up the MCE event and return from the interrupt. 1320 * But before that, check if this is an un-recoverable exception. 1321 * If yes, then stay on emergency stack and panic. 1322 */ 1323 andi. r11,r12,MSR_RI 1324 bne 2f 13251: mfspr r11,SPRN_SRR0 1326 ld r10,PACAKBASE(r13) 1327 LOAD_HANDLER(r10,unrecover_mce) 1328 mtspr SPRN_SRR0,r10 1329 ld r10,PACAKMSR(r13) 1330 /* 1331 * We are going down. But there are chances that we might get hit by 1332 * another MCE during panic path and we may run into unstable state 1333 * with no way out. Hence, turn ME bit off while going down, so that 1334 * when another MCE is hit during panic path, system will checkstop 1335 * and hypervisor will get restarted cleanly by SP. 1336 */ 1337 li r3,MSR_ME 1338 andc r10,r10,r3 /* Turn off MSR_ME */ 1339 mtspr SPRN_SRR1,r10 1340 rfid 1341 b . 13422: 1343 /* 1344 * Check if we have successfully handled/recovered from error, if not 1345 * then stay on emergency stack and panic. 1346 */ 1347 ld r3,RESULT(r1) /* Load result */ 1348 cmpdi r3,0 /* see if we handled MCE successfully */ 1349 1350 beq 1b /* if !handled then panic */ 1351 /* 1352 * Return from MC interrupt. 1353 * Queue up the MCE event so that we can log it later, while 1354 * returning from kernel or opal call. 1355 */ 1356 bl machine_check_queue_event 1357 MACHINE_CHECK_HANDLER_WINDUP 1358 rfid 13599: 1360 /* Deliver the machine check to host kernel in V mode. */ 1361 MACHINE_CHECK_HANDLER_WINDUP 1362 b machine_check_pSeries 1363 1364unrecover_mce: 1365 /* Invoke machine_check_exception to print MCE event and panic. */ 1366 addi r3,r1,STACK_FRAME_OVERHEAD 1367 bl machine_check_exception 1368 /* 1369 * We will not reach here. Even if we did, there is no way out. Call 1370 * unrecoverable_exception and die. 1371 */ 13721: addi r3,r1,STACK_FRAME_OVERHEAD 1373 bl unrecoverable_exception 1374 b 1b 1375/* 1376 * r13 points to the PACA, r9 contains the saved CR, 1377 * r12 contain the saved SRR1, SRR0 is still ready for return 1378 * r3 has the faulting address 1379 * r9 - r13 are saved in paca->exslb. 1380 * r3 is saved in paca->slb_r3 1381 * We assume we aren't going to take any exceptions during this procedure. 1382 */ 1383slb_miss_realmode: 1384 mflr r10 1385#ifdef CONFIG_RELOCATABLE 1386 mtctr r11 1387#endif 1388 1389 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ 1390 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ 1391 1392#ifdef CONFIG_PPC_STD_MMU_64 1393BEGIN_MMU_FTR_SECTION 1394 bl slb_allocate_realmode 1395END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX) 1396#endif 1397 /* All done -- return from exception. */ 1398 1399 ld r10,PACA_EXSLB+EX_LR(r13) 1400 ld r3,PACA_EXSLB+EX_R3(r13) 1401 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ 1402 1403 mtlr r10 1404 andi. r10,r12,MSR_RI /* check for unrecoverable exception */ 1405BEGIN_MMU_FTR_SECTION 1406 beq- 2f 1407FTR_SECTION_ELSE 1408 b 2f 1409ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) 1410 1411.machine push 1412.machine "power4" 1413 mtcrf 0x80,r9 1414 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ 1415.machine pop 1416 1417 RESTORE_PPR_PACA(PACA_EXSLB, r9) 1418 ld r9,PACA_EXSLB+EX_R9(r13) 1419 ld r10,PACA_EXSLB+EX_R10(r13) 1420 ld r11,PACA_EXSLB+EX_R11(r13) 1421 ld r12,PACA_EXSLB+EX_R12(r13) 1422 ld r13,PACA_EXSLB+EX_R13(r13) 1423 rfid 1424 b . /* prevent speculative execution */ 1425 14262: mfspr r11,SPRN_SRR0 1427 ld r10,PACAKBASE(r13) 1428 LOAD_HANDLER(r10,unrecov_slb) 1429 mtspr SPRN_SRR0,r10 1430 ld r10,PACAKMSR(r13) 1431 mtspr SPRN_SRR1,r10 1432 rfid 1433 b . 1434 1435unrecov_slb: 1436 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) 1437 RECONCILE_IRQ_STATE(r10, r11) 1438 bl save_nvgprs 14391: addi r3,r1,STACK_FRAME_OVERHEAD 1440 bl unrecoverable_exception 1441 b 1b 1442 1443 1444#ifdef CONFIG_PPC_970_NAP 1445power4_fixup_nap: 1446 andc r9,r9,r10 1447 std r9,TI_LOCAL_FLAGS(r11) 1448 ld r10,_LINK(r1) /* make idle task do the */ 1449 std r10,_NIP(r1) /* equivalent of a blr */ 1450 blr 1451#endif 1452 1453/* 1454 * Hash table stuff 1455 */ 1456 .align 7 1457do_hash_page: 1458#ifdef CONFIG_PPC_STD_MMU_64 1459 andis. r0,r4,0xa410 /* weird error? */ 1460 bne- handle_page_fault /* if not, try to insert a HPTE */ 1461 andis. r0,r4,DSISR_DABRMATCH@h 1462 bne- handle_dabr_fault 1463 CURRENT_THREAD_INFO(r11, r1) 1464 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ 1465 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ 1466 bne 77f /* then don't call hash_page now */ 1467 1468 /* 1469 * r3 contains the faulting address 1470 * r4 msr 1471 * r5 contains the trap number 1472 * r6 contains dsisr 1473 * 1474 * at return r3 = 0 for success, 1 for page fault, negative for error 1475 */ 1476 mr r4,r12 1477 ld r6,_DSISR(r1) 1478 bl __hash_page /* build HPTE if possible */ 1479 cmpdi r3,0 /* see if __hash_page succeeded */ 1480 1481 /* Success */ 1482 beq fast_exc_return_irq /* Return from exception on success */ 1483 1484 /* Error */ 1485 blt- 13f 1486#endif /* CONFIG_PPC_STD_MMU_64 */ 1487 1488/* Here we have a page fault that hash_page can't handle. */ 1489handle_page_fault: 149011: ld r4,_DAR(r1) 1491 ld r5,_DSISR(r1) 1492 addi r3,r1,STACK_FRAME_OVERHEAD 1493 bl do_page_fault 1494 cmpdi r3,0 1495 beq+ 12f 1496 bl save_nvgprs 1497 mr r5,r3 1498 addi r3,r1,STACK_FRAME_OVERHEAD 1499 lwz r4,_DAR(r1) 1500 bl bad_page_fault 1501 b ret_from_except 1502 1503/* We have a data breakpoint exception - handle it */ 1504handle_dabr_fault: 1505 bl save_nvgprs 1506 ld r4,_DAR(r1) 1507 ld r5,_DSISR(r1) 1508 addi r3,r1,STACK_FRAME_OVERHEAD 1509 bl do_break 151012: b ret_from_except_lite 1511 1512 1513#ifdef CONFIG_PPC_STD_MMU_64 1514/* We have a page fault that hash_page could handle but HV refused 1515 * the PTE insertion 1516 */ 151713: bl save_nvgprs 1518 mr r5,r3 1519 addi r3,r1,STACK_FRAME_OVERHEAD 1520 ld r4,_DAR(r1) 1521 bl low_hash_fault 1522 b ret_from_except 1523#endif 1524 1525/* 1526 * We come here as a result of a DSI at a point where we don't want 1527 * to call hash_page, such as when we are accessing memory (possibly 1528 * user memory) inside a PMU interrupt that occurred while interrupts 1529 * were soft-disabled. We want to invoke the exception handler for 1530 * the access, or panic if there isn't a handler. 1531 */ 153277: bl save_nvgprs 1533 mr r4,r3 1534 addi r3,r1,STACK_FRAME_OVERHEAD 1535 li r5,SIGSEGV 1536 bl bad_page_fault 1537 b ret_from_except 1538 1539/* 1540 * Here we have detected that the kernel stack pointer is bad. 1541 * R9 contains the saved CR, r13 points to the paca, 1542 * r10 contains the (bad) kernel stack pointer, 1543 * r11 and r12 contain the saved SRR0 and SRR1. 1544 * We switch to using an emergency stack, save the registers there, 1545 * and call kernel_bad_stack(), which panics. 1546 */ 1547bad_stack: 1548 ld r1,PACAEMERGSP(r13) 1549 subi r1,r1,64+INT_FRAME_SIZE 1550 std r9,_CCR(r1) 1551 std r10,GPR1(r1) 1552 std r11,_NIP(r1) 1553 std r12,_MSR(r1) 1554 mfspr r11,SPRN_DAR 1555 mfspr r12,SPRN_DSISR 1556 std r11,_DAR(r1) 1557 std r12,_DSISR(r1) 1558 mflr r10 1559 mfctr r11 1560 mfxer r12 1561 std r10,_LINK(r1) 1562 std r11,_CTR(r1) 1563 std r12,_XER(r1) 1564 SAVE_GPR(0,r1) 1565 SAVE_GPR(2,r1) 1566 ld r10,EX_R3(r3) 1567 std r10,GPR3(r1) 1568 SAVE_GPR(4,r1) 1569 SAVE_4GPRS(5,r1) 1570 ld r9,EX_R9(r3) 1571 ld r10,EX_R10(r3) 1572 SAVE_2GPRS(9,r1) 1573 ld r9,EX_R11(r3) 1574 ld r10,EX_R12(r3) 1575 ld r11,EX_R13(r3) 1576 std r9,GPR11(r1) 1577 std r10,GPR12(r1) 1578 std r11,GPR13(r1) 1579BEGIN_FTR_SECTION 1580 ld r10,EX_CFAR(r3) 1581 std r10,ORIG_GPR3(r1) 1582END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 1583 SAVE_8GPRS(14,r1) 1584 SAVE_10GPRS(22,r1) 1585 lhz r12,PACA_TRAP_SAVE(r13) 1586 std r12,_TRAP(r1) 1587 addi r11,r1,INT_FRAME_SIZE 1588 std r11,0(r1) 1589 li r12,0 1590 std r12,0(r11) 1591 ld r2,PACATOC(r13) 1592 ld r11,exception_marker@toc(r2) 1593 std r12,RESULT(r1) 1594 std r11,STACK_FRAME_OVERHEAD-16(r1) 15951: addi r3,r1,STACK_FRAME_OVERHEAD 1596 bl kernel_bad_stack 1597 b 1b 1598