1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation 4 * 5 * Provide default implementations of the DMA mapping callbacks for 6 * busses using the iommu infrastructure 7 */ 8 9 #include <linux/dma-direct.h> 10 #include <linux/pci.h> 11 #include <asm/iommu.h> 12 13 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT 14 #define can_map_direct(dev, addr) \ 15 ((dev)->bus_dma_limit >= phys_to_dma((dev), (addr))) 16 17 bool arch_dma_map_phys_direct(struct device *dev, phys_addr_t addr) 18 { 19 if (likely(!dev->bus_dma_limit)) 20 return false; 21 22 return can_map_direct(dev, addr); 23 } 24 25 #define is_direct_handle(dev, h) ((h) >= (dev)->archdata.dma_offset) 26 27 bool arch_dma_unmap_phys_direct(struct device *dev, dma_addr_t dma_handle) 28 { 29 if (likely(!dev->bus_dma_limit)) 30 return false; 31 32 return is_direct_handle(dev, dma_handle); 33 } 34 35 bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg, 36 int nents) 37 { 38 struct scatterlist *s; 39 int i; 40 41 if (likely(!dev->bus_dma_limit)) 42 return false; 43 44 for_each_sg(sg, s, nents, i) { 45 if (!can_map_direct(dev, sg_phys(s) + s->offset + s->length)) 46 return false; 47 } 48 49 return true; 50 } 51 52 bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg, 53 int nents) 54 { 55 struct scatterlist *s; 56 int i; 57 58 if (likely(!dev->bus_dma_limit)) 59 return false; 60 61 for_each_sg(sg, s, nents, i) { 62 if (!is_direct_handle(dev, s->dma_address + s->length)) 63 return false; 64 } 65 66 return true; 67 } 68 bool arch_dma_alloc_direct(struct device *dev) 69 { 70 if (dev->dma_ops_bypass) 71 return true; 72 73 return false; 74 } 75 76 bool arch_dma_free_direct(struct device *dev, dma_addr_t dma_handle) 77 { 78 if (!dev->dma_ops_bypass) 79 return false; 80 81 return is_direct_handle(dev, dma_handle); 82 } 83 #endif /* CONFIG_ARCH_HAS_DMA_MAP_DIRECT */ 84 85 /* 86 * Generic iommu implementation 87 */ 88 89 /* Allocates a contiguous real buffer and creates mappings over it. 90 * Returns the virtual address of the buffer and sets dma_handle 91 * to the dma address (mapping) of the first page. 92 */ 93 static void *dma_iommu_alloc_coherent(struct device *dev, size_t size, 94 dma_addr_t *dma_handle, gfp_t flag, 95 unsigned long attrs) 96 { 97 return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size, 98 dma_handle, dev->coherent_dma_mask, flag, 99 dev_to_node(dev)); 100 } 101 102 static void dma_iommu_free_coherent(struct device *dev, size_t size, 103 void *vaddr, dma_addr_t dma_handle, 104 unsigned long attrs) 105 { 106 iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle); 107 } 108 109 /* Creates TCEs for a user provided buffer. The user buffer must be 110 * contiguous real kernel storage (not vmalloc). The address passed here 111 * is a physical address to that page. The dma_addr_t returned will point 112 * to the same byte within the page as was passed in. 113 */ 114 static dma_addr_t dma_iommu_map_phys(struct device *dev, phys_addr_t phys, 115 size_t size, 116 enum dma_data_direction direction, 117 unsigned long attrs) 118 { 119 return iommu_map_phys(dev, get_iommu_table_base(dev), phys, size, 120 dma_get_mask(dev), direction, attrs); 121 } 122 123 static void dma_iommu_unmap_phys(struct device *dev, dma_addr_t dma_handle, 124 size_t size, enum dma_data_direction direction, 125 unsigned long attrs) 126 { 127 iommu_unmap_phys(get_iommu_table_base(dev), dma_handle, size, direction, 128 attrs); 129 } 130 131 static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist, 132 int nelems, enum dma_data_direction direction, 133 unsigned long attrs) 134 { 135 return ppc_iommu_map_sg(dev, get_iommu_table_base(dev), sglist, nelems, 136 dma_get_mask(dev), direction, attrs); 137 } 138 139 static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist, 140 int nelems, enum dma_data_direction direction, 141 unsigned long attrs) 142 { 143 ppc_iommu_unmap_sg(get_iommu_table_base(dev), sglist, nelems, 144 direction, attrs); 145 } 146 147 static bool dma_iommu_bypass_supported(struct device *dev, u64 mask) 148 { 149 struct pci_dev *pdev = to_pci_dev(dev); 150 struct pci_controller *phb = pci_bus_to_host(pdev->bus); 151 152 if (!phb->controller_ops.iommu_bypass_supported) 153 return false; 154 return phb->controller_ops.iommu_bypass_supported(pdev, mask); 155 } 156 157 /* We support DMA to/from any memory page via the iommu */ 158 int dma_iommu_dma_supported(struct device *dev, u64 mask) 159 { 160 struct iommu_table *tbl; 161 162 if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) { 163 /* 164 * fixed ops will be used for RAM. This is limited by 165 * bus_dma_limit which is set when RAM is pre-mapped. 166 */ 167 dev->dma_ops_bypass = true; 168 dev_info(dev, "iommu: 64-bit OK but direct DMA is limited by %llx\n", 169 dev->bus_dma_limit); 170 return 1; 171 } 172 173 tbl = get_iommu_table_base(dev); 174 175 if (!tbl) { 176 dev_err(dev, "Warning: IOMMU dma not supported: mask 0x%08llx, table unavailable\n", mask); 177 return 0; 178 } 179 180 if (tbl->it_offset > (mask >> tbl->it_page_shift)) { 181 dev_info(dev, "Warning: IOMMU offset too big for device mask\n"); 182 dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n", 183 mask, tbl->it_offset << tbl->it_page_shift); 184 return 0; 185 } 186 187 dev_dbg(dev, "iommu: not 64-bit, using default ops\n"); 188 dev->dma_ops_bypass = false; 189 return 1; 190 } 191 192 u64 dma_iommu_get_required_mask(struct device *dev) 193 { 194 struct iommu_table *tbl = get_iommu_table_base(dev); 195 u64 mask; 196 197 if (dev_is_pci(dev)) { 198 u64 bypass_mask = dma_direct_get_required_mask(dev); 199 200 if (dma_iommu_dma_supported(dev, bypass_mask)) { 201 dev_info(dev, "%s: returning bypass mask 0x%llx\n", __func__, bypass_mask); 202 return bypass_mask; 203 } 204 } 205 206 if (!tbl) 207 return 0; 208 209 mask = 1ULL << (fls_long(tbl->it_offset + tbl->it_size) + 210 tbl->it_page_shift - 1); 211 mask += mask - 1; 212 213 return mask; 214 } 215 216 const struct dma_map_ops dma_iommu_ops = { 217 .alloc = dma_iommu_alloc_coherent, 218 .free = dma_iommu_free_coherent, 219 .map_sg = dma_iommu_map_sg, 220 .unmap_sg = dma_iommu_unmap_sg, 221 .dma_supported = dma_iommu_dma_supported, 222 .map_phys = dma_iommu_map_phys, 223 .unmap_phys = dma_iommu_unmap_phys, 224 .get_required_mask = dma_iommu_get_required_mask, 225 .mmap = dma_common_mmap, 226 .get_sgtable = dma_common_get_sgtable, 227 .alloc_pages_op = dma_common_alloc_pages, 228 .free_pages = dma_common_free_pages, 229 }; 230