xref: /linux/arch/powerpc/kernel/dma-iommu.c (revision 48dea9a700c8728cc31a1dd44588b97578de86ee)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
4  *
5  * Provide default implementations of the DMA mapping callbacks for
6  * busses using the iommu infrastructure
7  */
8 
9 #include <linux/dma-direct.h>
10 #include <linux/pci.h>
11 #include <asm/iommu.h>
12 
13 /*
14  * Generic iommu implementation
15  */
16 
17 /* Allocates a contiguous real buffer and creates mappings over it.
18  * Returns the virtual address of the buffer and sets dma_handle
19  * to the dma address (mapping) of the first page.
20  */
21 static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
22 				      dma_addr_t *dma_handle, gfp_t flag,
23 				      unsigned long attrs)
24 {
25 	return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
26 				    dma_handle, dev->coherent_dma_mask, flag,
27 				    dev_to_node(dev));
28 }
29 
30 static void dma_iommu_free_coherent(struct device *dev, size_t size,
31 				    void *vaddr, dma_addr_t dma_handle,
32 				    unsigned long attrs)
33 {
34 	iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle);
35 }
36 
37 /* Creates TCEs for a user provided buffer.  The user buffer must be
38  * contiguous real kernel storage (not vmalloc).  The address passed here
39  * comprises a page address and offset into that page. The dma_addr_t
40  * returned will point to the same byte within the page as was passed in.
41  */
42 static dma_addr_t dma_iommu_map_page(struct device *dev, struct page *page,
43 				     unsigned long offset, size_t size,
44 				     enum dma_data_direction direction,
45 				     unsigned long attrs)
46 {
47 	return iommu_map_page(dev, get_iommu_table_base(dev), page, offset,
48 			      size, dma_get_mask(dev), direction, attrs);
49 }
50 
51 
52 static void dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
53 				 size_t size, enum dma_data_direction direction,
54 				 unsigned long attrs)
55 {
56 	iommu_unmap_page(get_iommu_table_base(dev), dma_handle, size, direction,
57 			 attrs);
58 }
59 
60 
61 static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
62 			    int nelems, enum dma_data_direction direction,
63 			    unsigned long attrs)
64 {
65 	return ppc_iommu_map_sg(dev, get_iommu_table_base(dev), sglist, nelems,
66 				dma_get_mask(dev), direction, attrs);
67 }
68 
69 static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,
70 		int nelems, enum dma_data_direction direction,
71 		unsigned long attrs)
72 {
73 	ppc_iommu_unmap_sg(get_iommu_table_base(dev), sglist, nelems,
74 			   direction, attrs);
75 }
76 
77 static bool dma_iommu_bypass_supported(struct device *dev, u64 mask)
78 {
79 	struct pci_dev *pdev = to_pci_dev(dev);
80 	struct pci_controller *phb = pci_bus_to_host(pdev->bus);
81 
82 	if (iommu_fixed_is_weak || !phb->controller_ops.iommu_bypass_supported)
83 		return false;
84 	return phb->controller_ops.iommu_bypass_supported(pdev, mask);
85 }
86 
87 /* We support DMA to/from any memory page via the iommu */
88 int dma_iommu_dma_supported(struct device *dev, u64 mask)
89 {
90 	struct iommu_table *tbl = get_iommu_table_base(dev);
91 
92 	if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) {
93 		dev->dma_ops_bypass = true;
94 		dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
95 		return 1;
96 	}
97 
98 	if (!tbl) {
99 		dev_err(dev, "Warning: IOMMU dma not supported: mask 0x%08llx, table unavailable\n", mask);
100 		return 0;
101 	}
102 
103 	if (tbl->it_offset > (mask >> tbl->it_page_shift)) {
104 		dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
105 		dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
106 				mask, tbl->it_offset << tbl->it_page_shift);
107 		return 0;
108 	}
109 
110 	dev_dbg(dev, "iommu: not 64-bit, using default ops\n");
111 	dev->dma_ops_bypass = false;
112 	return 1;
113 }
114 
115 u64 dma_iommu_get_required_mask(struct device *dev)
116 {
117 	struct iommu_table *tbl = get_iommu_table_base(dev);
118 	u64 mask;
119 
120 	if (!tbl)
121 		return 0;
122 
123 	mask = 1ULL < (fls_long(tbl->it_offset + tbl->it_size) - 1);
124 	mask += mask - 1;
125 
126 	return mask;
127 }
128 
129 const struct dma_map_ops dma_iommu_ops = {
130 	.alloc			= dma_iommu_alloc_coherent,
131 	.free			= dma_iommu_free_coherent,
132 	.map_sg			= dma_iommu_map_sg,
133 	.unmap_sg		= dma_iommu_unmap_sg,
134 	.dma_supported		= dma_iommu_dma_supported,
135 	.map_page		= dma_iommu_map_page,
136 	.unmap_page		= dma_iommu_unmap_page,
137 	.get_required_mask	= dma_iommu_get_required_mask,
138 	.mmap			= dma_common_mmap,
139 	.get_sgtable		= dma_common_get_sgtable,
140 };
141