1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mmu.h> 20 #include <asm/setup.h> 21 22 static struct cpu_spec the_cpu_spec __read_mostly; 23 24 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 60 #endif /* CONFIG_PPC32 */ 61 #ifdef CONFIG_PPC64 62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65 extern void __restore_cpu_pa6t(void); 66 extern void __restore_cpu_ppc970(void); 67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 68 extern void __restore_cpu_power7(void); 69 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power8(void); 71 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power9(void); 73 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 74 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 75 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 76 #endif /* CONFIG_PPC64 */ 77 #if defined(CONFIG_E500) 78 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 79 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 80 extern void __restore_cpu_e5500(void); 81 extern void __restore_cpu_e6500(void); 82 #endif /* CONFIG_E500 */ 83 84 /* This table only contains "desktop" CPUs, it need to be filled with embedded 85 * ones as well... 86 */ 87 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 88 PPC_FEATURE_HAS_MMU) 89 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 90 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 91 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 93 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 97 PPC_FEATURE_TRUE_LE | \ 98 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 99 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 104 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 105 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 106 PPC_FEATURE_TRUE_LE | \ 107 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 108 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 109 PPC_FEATURE2_HTM_COMP | \ 110 PPC_FEATURE2_HTM_NOSC_COMP | \ 111 PPC_FEATURE2_DSCR | \ 112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 113 PPC_FEATURE2_VEC_CRYPTO) 114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 115 PPC_FEATURE_TRUE_LE | \ 116 PPC_FEATURE_HAS_ALTIVEC_COMP) 117 #define COMMON_USER_POWER9 COMMON_USER_POWER8 118 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 119 PPC_FEATURE2_ARCH_3_00 | \ 120 PPC_FEATURE2_HAS_IEEE128 | \ 121 PPC_FEATURE2_DARN ) 122 123 #ifdef CONFIG_PPC_BOOK3E_64 124 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 125 #else 126 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 127 PPC_FEATURE_BOOKE) 128 #endif 129 130 static struct cpu_spec __initdata cpu_specs[] = { 131 #ifdef CONFIG_PPC_BOOK3S_64 132 { /* PPC970 */ 133 .pvr_mask = 0xffff0000, 134 .pvr_value = 0x00390000, 135 .cpu_name = "PPC970", 136 .cpu_features = CPU_FTRS_PPC970, 137 .cpu_user_features = COMMON_USER_POWER4 | 138 PPC_FEATURE_HAS_ALTIVEC_COMP, 139 .mmu_features = MMU_FTRS_PPC970, 140 .icache_bsize = 128, 141 .dcache_bsize = 128, 142 .num_pmcs = 8, 143 .pmc_type = PPC_PMC_IBM, 144 .cpu_setup = __setup_cpu_ppc970, 145 .cpu_restore = __restore_cpu_ppc970, 146 .oprofile_cpu_type = "ppc64/970", 147 .oprofile_type = PPC_OPROFILE_POWER4, 148 .platform = "ppc970", 149 }, 150 { /* PPC970FX */ 151 .pvr_mask = 0xffff0000, 152 .pvr_value = 0x003c0000, 153 .cpu_name = "PPC970FX", 154 .cpu_features = CPU_FTRS_PPC970, 155 .cpu_user_features = COMMON_USER_POWER4 | 156 PPC_FEATURE_HAS_ALTIVEC_COMP, 157 .mmu_features = MMU_FTRS_PPC970, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .cpu_setup = __setup_cpu_ppc970, 163 .cpu_restore = __restore_cpu_ppc970, 164 .oprofile_cpu_type = "ppc64/970", 165 .oprofile_type = PPC_OPROFILE_POWER4, 166 .platform = "ppc970", 167 }, 168 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 169 .pvr_mask = 0xffffffff, 170 .pvr_value = 0x00440100, 171 .cpu_name = "PPC970MP", 172 .cpu_features = CPU_FTRS_PPC970, 173 .cpu_user_features = COMMON_USER_POWER4 | 174 PPC_FEATURE_HAS_ALTIVEC_COMP, 175 .mmu_features = MMU_FTRS_PPC970, 176 .icache_bsize = 128, 177 .dcache_bsize = 128, 178 .num_pmcs = 8, 179 .pmc_type = PPC_PMC_IBM, 180 .cpu_setup = __setup_cpu_ppc970, 181 .cpu_restore = __restore_cpu_ppc970, 182 .oprofile_cpu_type = "ppc64/970MP", 183 .oprofile_type = PPC_OPROFILE_POWER4, 184 .platform = "ppc970", 185 }, 186 { /* PPC970MP */ 187 .pvr_mask = 0xffff0000, 188 .pvr_value = 0x00440000, 189 .cpu_name = "PPC970MP", 190 .cpu_features = CPU_FTRS_PPC970, 191 .cpu_user_features = COMMON_USER_POWER4 | 192 PPC_FEATURE_HAS_ALTIVEC_COMP, 193 .mmu_features = MMU_FTRS_PPC970, 194 .icache_bsize = 128, 195 .dcache_bsize = 128, 196 .num_pmcs = 8, 197 .pmc_type = PPC_PMC_IBM, 198 .cpu_setup = __setup_cpu_ppc970MP, 199 .cpu_restore = __restore_cpu_ppc970, 200 .oprofile_cpu_type = "ppc64/970MP", 201 .oprofile_type = PPC_OPROFILE_POWER4, 202 .platform = "ppc970", 203 }, 204 { /* PPC970GX */ 205 .pvr_mask = 0xffff0000, 206 .pvr_value = 0x00450000, 207 .cpu_name = "PPC970GX", 208 .cpu_features = CPU_FTRS_PPC970, 209 .cpu_user_features = COMMON_USER_POWER4 | 210 PPC_FEATURE_HAS_ALTIVEC_COMP, 211 .mmu_features = MMU_FTRS_PPC970, 212 .icache_bsize = 128, 213 .dcache_bsize = 128, 214 .num_pmcs = 8, 215 .pmc_type = PPC_PMC_IBM, 216 .cpu_setup = __setup_cpu_ppc970, 217 .oprofile_cpu_type = "ppc64/970", 218 .oprofile_type = PPC_OPROFILE_POWER4, 219 .platform = "ppc970", 220 }, 221 { /* Power5 GR */ 222 .pvr_mask = 0xffff0000, 223 .pvr_value = 0x003a0000, 224 .cpu_name = "POWER5 (gr)", 225 .cpu_features = CPU_FTRS_POWER5, 226 .cpu_user_features = COMMON_USER_POWER5, 227 .mmu_features = MMU_FTRS_POWER5, 228 .icache_bsize = 128, 229 .dcache_bsize = 128, 230 .num_pmcs = 6, 231 .pmc_type = PPC_PMC_IBM, 232 .oprofile_cpu_type = "ppc64/power5", 233 .oprofile_type = PPC_OPROFILE_POWER4, 234 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 235 * and above but only works on POWER5 and above 236 */ 237 .oprofile_mmcra_sihv = MMCRA_SIHV, 238 .oprofile_mmcra_sipr = MMCRA_SIPR, 239 .platform = "power5", 240 }, 241 { /* Power5++ */ 242 .pvr_mask = 0xffffff00, 243 .pvr_value = 0x003b0300, 244 .cpu_name = "POWER5+ (gs)", 245 .cpu_features = CPU_FTRS_POWER5, 246 .cpu_user_features = COMMON_USER_POWER5_PLUS, 247 .mmu_features = MMU_FTRS_POWER5, 248 .icache_bsize = 128, 249 .dcache_bsize = 128, 250 .num_pmcs = 6, 251 .oprofile_cpu_type = "ppc64/power5++", 252 .oprofile_type = PPC_OPROFILE_POWER4, 253 .oprofile_mmcra_sihv = MMCRA_SIHV, 254 .oprofile_mmcra_sipr = MMCRA_SIPR, 255 .platform = "power5+", 256 }, 257 { /* Power5 GS */ 258 .pvr_mask = 0xffff0000, 259 .pvr_value = 0x003b0000, 260 .cpu_name = "POWER5+ (gs)", 261 .cpu_features = CPU_FTRS_POWER5, 262 .cpu_user_features = COMMON_USER_POWER5_PLUS, 263 .mmu_features = MMU_FTRS_POWER5, 264 .icache_bsize = 128, 265 .dcache_bsize = 128, 266 .num_pmcs = 6, 267 .pmc_type = PPC_PMC_IBM, 268 .oprofile_cpu_type = "ppc64/power5+", 269 .oprofile_type = PPC_OPROFILE_POWER4, 270 .oprofile_mmcra_sihv = MMCRA_SIHV, 271 .oprofile_mmcra_sipr = MMCRA_SIPR, 272 .platform = "power5+", 273 }, 274 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 275 .pvr_mask = 0xffffffff, 276 .pvr_value = 0x0f000001, 277 .cpu_name = "POWER5+", 278 .cpu_features = CPU_FTRS_POWER5, 279 .cpu_user_features = COMMON_USER_POWER5_PLUS, 280 .mmu_features = MMU_FTRS_POWER5, 281 .icache_bsize = 128, 282 .dcache_bsize = 128, 283 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 284 .oprofile_type = PPC_OPROFILE_POWER4, 285 .platform = "power5+", 286 }, 287 { /* Power6 */ 288 .pvr_mask = 0xffff0000, 289 .pvr_value = 0x003e0000, 290 .cpu_name = "POWER6 (raw)", 291 .cpu_features = CPU_FTRS_POWER6, 292 .cpu_user_features = COMMON_USER_POWER6 | 293 PPC_FEATURE_POWER6_EXT, 294 .mmu_features = MMU_FTRS_POWER6, 295 .icache_bsize = 128, 296 .dcache_bsize = 128, 297 .num_pmcs = 6, 298 .pmc_type = PPC_PMC_IBM, 299 .oprofile_cpu_type = "ppc64/power6", 300 .oprofile_type = PPC_OPROFILE_POWER4, 301 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 302 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 303 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 304 POWER6_MMCRA_OTHER, 305 .platform = "power6x", 306 }, 307 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 308 .pvr_mask = 0xffffffff, 309 .pvr_value = 0x0f000002, 310 .cpu_name = "POWER6 (architected)", 311 .cpu_features = CPU_FTRS_POWER6, 312 .cpu_user_features = COMMON_USER_POWER6, 313 .mmu_features = MMU_FTRS_POWER6, 314 .icache_bsize = 128, 315 .dcache_bsize = 128, 316 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 317 .oprofile_type = PPC_OPROFILE_POWER4, 318 .platform = "power6", 319 }, 320 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 321 .pvr_mask = 0xffffffff, 322 .pvr_value = 0x0f000003, 323 .cpu_name = "POWER7 (architected)", 324 .cpu_features = CPU_FTRS_POWER7, 325 .cpu_user_features = COMMON_USER_POWER7, 326 .cpu_user_features2 = COMMON_USER2_POWER7, 327 .mmu_features = MMU_FTRS_POWER7, 328 .icache_bsize = 128, 329 .dcache_bsize = 128, 330 .oprofile_type = PPC_OPROFILE_POWER4, 331 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 332 .cpu_setup = __setup_cpu_power7, 333 .cpu_restore = __restore_cpu_power7, 334 .machine_check_early = __machine_check_early_realmode_p7, 335 .platform = "power7", 336 }, 337 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 338 .pvr_mask = 0xffffffff, 339 .pvr_value = 0x0f000004, 340 .cpu_name = "POWER8 (architected)", 341 .cpu_features = CPU_FTRS_POWER8, 342 .cpu_user_features = COMMON_USER_POWER8, 343 .cpu_user_features2 = COMMON_USER2_POWER8, 344 .mmu_features = MMU_FTRS_POWER8, 345 .icache_bsize = 128, 346 .dcache_bsize = 128, 347 .oprofile_type = PPC_OPROFILE_INVALID, 348 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 349 .cpu_setup = __setup_cpu_power8, 350 .cpu_restore = __restore_cpu_power8, 351 .machine_check_early = __machine_check_early_realmode_p8, 352 .platform = "power8", 353 }, 354 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 355 .pvr_mask = 0xffffffff, 356 .pvr_value = 0x0f000005, 357 .cpu_name = "POWER9 (architected)", 358 .cpu_features = CPU_FTRS_POWER9, 359 .cpu_user_features = COMMON_USER_POWER9, 360 .cpu_user_features2 = COMMON_USER2_POWER9, 361 .mmu_features = MMU_FTRS_POWER9, 362 .icache_bsize = 128, 363 .dcache_bsize = 128, 364 .oprofile_type = PPC_OPROFILE_INVALID, 365 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 366 .cpu_setup = __setup_cpu_power9, 367 .cpu_restore = __restore_cpu_power9, 368 .platform = "power9", 369 }, 370 { /* Power7 */ 371 .pvr_mask = 0xffff0000, 372 .pvr_value = 0x003f0000, 373 .cpu_name = "POWER7 (raw)", 374 .cpu_features = CPU_FTRS_POWER7, 375 .cpu_user_features = COMMON_USER_POWER7, 376 .cpu_user_features2 = COMMON_USER2_POWER7, 377 .mmu_features = MMU_FTRS_POWER7, 378 .icache_bsize = 128, 379 .dcache_bsize = 128, 380 .num_pmcs = 6, 381 .pmc_type = PPC_PMC_IBM, 382 .oprofile_cpu_type = "ppc64/power7", 383 .oprofile_type = PPC_OPROFILE_POWER4, 384 .cpu_setup = __setup_cpu_power7, 385 .cpu_restore = __restore_cpu_power7, 386 .machine_check_early = __machine_check_early_realmode_p7, 387 .platform = "power7", 388 }, 389 { /* Power7+ */ 390 .pvr_mask = 0xffff0000, 391 .pvr_value = 0x004A0000, 392 .cpu_name = "POWER7+ (raw)", 393 .cpu_features = CPU_FTRS_POWER7, 394 .cpu_user_features = COMMON_USER_POWER7, 395 .cpu_user_features2 = COMMON_USER2_POWER7, 396 .mmu_features = MMU_FTRS_POWER7, 397 .icache_bsize = 128, 398 .dcache_bsize = 128, 399 .num_pmcs = 6, 400 .pmc_type = PPC_PMC_IBM, 401 .oprofile_cpu_type = "ppc64/power7", 402 .oprofile_type = PPC_OPROFILE_POWER4, 403 .cpu_setup = __setup_cpu_power7, 404 .cpu_restore = __restore_cpu_power7, 405 .machine_check_early = __machine_check_early_realmode_p7, 406 .platform = "power7+", 407 }, 408 { /* Power8E */ 409 .pvr_mask = 0xffff0000, 410 .pvr_value = 0x004b0000, 411 .cpu_name = "POWER8E (raw)", 412 .cpu_features = CPU_FTRS_POWER8E, 413 .cpu_user_features = COMMON_USER_POWER8, 414 .cpu_user_features2 = COMMON_USER2_POWER8, 415 .mmu_features = MMU_FTRS_POWER8, 416 .icache_bsize = 128, 417 .dcache_bsize = 128, 418 .num_pmcs = 6, 419 .pmc_type = PPC_PMC_IBM, 420 .oprofile_cpu_type = "ppc64/power8", 421 .oprofile_type = PPC_OPROFILE_INVALID, 422 .cpu_setup = __setup_cpu_power8, 423 .cpu_restore = __restore_cpu_power8, 424 .machine_check_early = __machine_check_early_realmode_p8, 425 .platform = "power8", 426 }, 427 { /* Power8NVL */ 428 .pvr_mask = 0xffff0000, 429 .pvr_value = 0x004c0000, 430 .cpu_name = "POWER8NVL (raw)", 431 .cpu_features = CPU_FTRS_POWER8, 432 .cpu_user_features = COMMON_USER_POWER8, 433 .cpu_user_features2 = COMMON_USER2_POWER8, 434 .mmu_features = MMU_FTRS_POWER8, 435 .icache_bsize = 128, 436 .dcache_bsize = 128, 437 .num_pmcs = 6, 438 .pmc_type = PPC_PMC_IBM, 439 .oprofile_cpu_type = "ppc64/power8", 440 .oprofile_type = PPC_OPROFILE_INVALID, 441 .cpu_setup = __setup_cpu_power8, 442 .cpu_restore = __restore_cpu_power8, 443 .machine_check_early = __machine_check_early_realmode_p8, 444 .platform = "power8", 445 }, 446 { /* Power8 */ 447 .pvr_mask = 0xffff0000, 448 .pvr_value = 0x004d0000, 449 .cpu_name = "POWER8 (raw)", 450 .cpu_features = CPU_FTRS_POWER8, 451 .cpu_user_features = COMMON_USER_POWER8, 452 .cpu_user_features2 = COMMON_USER2_POWER8, 453 .mmu_features = MMU_FTRS_POWER8, 454 .icache_bsize = 128, 455 .dcache_bsize = 128, 456 .num_pmcs = 6, 457 .pmc_type = PPC_PMC_IBM, 458 .oprofile_cpu_type = "ppc64/power8", 459 .oprofile_type = PPC_OPROFILE_INVALID, 460 .cpu_setup = __setup_cpu_power8, 461 .cpu_restore = __restore_cpu_power8, 462 .machine_check_early = __machine_check_early_realmode_p8, 463 .platform = "power8", 464 }, 465 { /* Power9 DD2.0 */ 466 .pvr_mask = 0xffffefff, 467 .pvr_value = 0x004e0200, 468 .cpu_name = "POWER9 (raw)", 469 .cpu_features = CPU_FTRS_POWER9_DD2_0, 470 .cpu_user_features = COMMON_USER_POWER9, 471 .cpu_user_features2 = COMMON_USER2_POWER9, 472 .mmu_features = MMU_FTRS_POWER9, 473 .icache_bsize = 128, 474 .dcache_bsize = 128, 475 .num_pmcs = 6, 476 .pmc_type = PPC_PMC_IBM, 477 .oprofile_cpu_type = "ppc64/power9", 478 .oprofile_type = PPC_OPROFILE_INVALID, 479 .cpu_setup = __setup_cpu_power9, 480 .cpu_restore = __restore_cpu_power9, 481 .machine_check_early = __machine_check_early_realmode_p9, 482 .platform = "power9", 483 }, 484 { /* Power9 DD 2.1 */ 485 .pvr_mask = 0xffffefff, 486 .pvr_value = 0x004e0201, 487 .cpu_name = "POWER9 (raw)", 488 .cpu_features = CPU_FTRS_POWER9_DD2_1, 489 .cpu_user_features = COMMON_USER_POWER9, 490 .cpu_user_features2 = COMMON_USER2_POWER9, 491 .mmu_features = MMU_FTRS_POWER9, 492 .icache_bsize = 128, 493 .dcache_bsize = 128, 494 .num_pmcs = 6, 495 .pmc_type = PPC_PMC_IBM, 496 .oprofile_cpu_type = "ppc64/power9", 497 .oprofile_type = PPC_OPROFILE_INVALID, 498 .cpu_setup = __setup_cpu_power9, 499 .cpu_restore = __restore_cpu_power9, 500 .machine_check_early = __machine_check_early_realmode_p9, 501 .platform = "power9", 502 }, 503 { /* Power9 DD2.2 or later */ 504 .pvr_mask = 0xffff0000, 505 .pvr_value = 0x004e0000, 506 .cpu_name = "POWER9 (raw)", 507 .cpu_features = CPU_FTRS_POWER9_DD2_2, 508 .cpu_user_features = COMMON_USER_POWER9, 509 .cpu_user_features2 = COMMON_USER2_POWER9, 510 .mmu_features = MMU_FTRS_POWER9, 511 .icache_bsize = 128, 512 .dcache_bsize = 128, 513 .num_pmcs = 6, 514 .pmc_type = PPC_PMC_IBM, 515 .oprofile_cpu_type = "ppc64/power9", 516 .oprofile_type = PPC_OPROFILE_INVALID, 517 .cpu_setup = __setup_cpu_power9, 518 .cpu_restore = __restore_cpu_power9, 519 .machine_check_early = __machine_check_early_realmode_p9, 520 .platform = "power9", 521 }, 522 { /* Cell Broadband Engine */ 523 .pvr_mask = 0xffff0000, 524 .pvr_value = 0x00700000, 525 .cpu_name = "Cell Broadband Engine", 526 .cpu_features = CPU_FTRS_CELL, 527 .cpu_user_features = COMMON_USER_PPC64 | 528 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 529 PPC_FEATURE_SMT, 530 .mmu_features = MMU_FTRS_CELL, 531 .icache_bsize = 128, 532 .dcache_bsize = 128, 533 .num_pmcs = 4, 534 .pmc_type = PPC_PMC_IBM, 535 .oprofile_cpu_type = "ppc64/cell-be", 536 .oprofile_type = PPC_OPROFILE_CELL, 537 .platform = "ppc-cell-be", 538 }, 539 { /* PA Semi PA6T */ 540 .pvr_mask = 0x7fff0000, 541 .pvr_value = 0x00900000, 542 .cpu_name = "PA6T", 543 .cpu_features = CPU_FTRS_PA6T, 544 .cpu_user_features = COMMON_USER_PA6T, 545 .mmu_features = MMU_FTRS_PA6T, 546 .icache_bsize = 64, 547 .dcache_bsize = 64, 548 .num_pmcs = 6, 549 .pmc_type = PPC_PMC_PA6T, 550 .cpu_setup = __setup_cpu_pa6t, 551 .cpu_restore = __restore_cpu_pa6t, 552 .oprofile_cpu_type = "ppc64/pa6t", 553 .oprofile_type = PPC_OPROFILE_PA6T, 554 .platform = "pa6t", 555 }, 556 { /* default match */ 557 .pvr_mask = 0x00000000, 558 .pvr_value = 0x00000000, 559 .cpu_name = "POWER5 (compatible)", 560 .cpu_features = CPU_FTRS_COMPATIBLE, 561 .cpu_user_features = COMMON_USER_PPC64, 562 .mmu_features = MMU_FTRS_POWER, 563 .icache_bsize = 128, 564 .dcache_bsize = 128, 565 .num_pmcs = 6, 566 .pmc_type = PPC_PMC_IBM, 567 .platform = "power5", 568 } 569 #endif /* CONFIG_PPC_BOOK3S_64 */ 570 571 #ifdef CONFIG_PPC32 572 #ifdef CONFIG_PPC_BOOK3S_32 573 { /* 601 */ 574 .pvr_mask = 0xffff0000, 575 .pvr_value = 0x00010000, 576 .cpu_name = "601", 577 .cpu_features = CPU_FTRS_PPC601, 578 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 579 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 580 .mmu_features = MMU_FTR_HPTE_TABLE, 581 .icache_bsize = 32, 582 .dcache_bsize = 32, 583 .machine_check = machine_check_generic, 584 .platform = "ppc601", 585 }, 586 { /* 603 */ 587 .pvr_mask = 0xffff0000, 588 .pvr_value = 0x00030000, 589 .cpu_name = "603", 590 .cpu_features = CPU_FTRS_603, 591 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 592 .mmu_features = 0, 593 .icache_bsize = 32, 594 .dcache_bsize = 32, 595 .cpu_setup = __setup_cpu_603, 596 .machine_check = machine_check_generic, 597 .platform = "ppc603", 598 }, 599 { /* 603e */ 600 .pvr_mask = 0xffff0000, 601 .pvr_value = 0x00060000, 602 .cpu_name = "603e", 603 .cpu_features = CPU_FTRS_603, 604 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 605 .mmu_features = 0, 606 .icache_bsize = 32, 607 .dcache_bsize = 32, 608 .cpu_setup = __setup_cpu_603, 609 .machine_check = machine_check_generic, 610 .platform = "ppc603", 611 }, 612 { /* 603ev */ 613 .pvr_mask = 0xffff0000, 614 .pvr_value = 0x00070000, 615 .cpu_name = "603ev", 616 .cpu_features = CPU_FTRS_603, 617 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 618 .mmu_features = 0, 619 .icache_bsize = 32, 620 .dcache_bsize = 32, 621 .cpu_setup = __setup_cpu_603, 622 .machine_check = machine_check_generic, 623 .platform = "ppc603", 624 }, 625 { /* 604 */ 626 .pvr_mask = 0xffff0000, 627 .pvr_value = 0x00040000, 628 .cpu_name = "604", 629 .cpu_features = CPU_FTRS_604, 630 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 631 .mmu_features = MMU_FTR_HPTE_TABLE, 632 .icache_bsize = 32, 633 .dcache_bsize = 32, 634 .num_pmcs = 2, 635 .cpu_setup = __setup_cpu_604, 636 .machine_check = machine_check_generic, 637 .platform = "ppc604", 638 }, 639 { /* 604e */ 640 .pvr_mask = 0xfffff000, 641 .pvr_value = 0x00090000, 642 .cpu_name = "604e", 643 .cpu_features = CPU_FTRS_604, 644 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 645 .mmu_features = MMU_FTR_HPTE_TABLE, 646 .icache_bsize = 32, 647 .dcache_bsize = 32, 648 .num_pmcs = 4, 649 .cpu_setup = __setup_cpu_604, 650 .machine_check = machine_check_generic, 651 .platform = "ppc604", 652 }, 653 { /* 604r */ 654 .pvr_mask = 0xffff0000, 655 .pvr_value = 0x00090000, 656 .cpu_name = "604r", 657 .cpu_features = CPU_FTRS_604, 658 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 659 .mmu_features = MMU_FTR_HPTE_TABLE, 660 .icache_bsize = 32, 661 .dcache_bsize = 32, 662 .num_pmcs = 4, 663 .cpu_setup = __setup_cpu_604, 664 .machine_check = machine_check_generic, 665 .platform = "ppc604", 666 }, 667 { /* 604ev */ 668 .pvr_mask = 0xffff0000, 669 .pvr_value = 0x000a0000, 670 .cpu_name = "604ev", 671 .cpu_features = CPU_FTRS_604, 672 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 673 .mmu_features = MMU_FTR_HPTE_TABLE, 674 .icache_bsize = 32, 675 .dcache_bsize = 32, 676 .num_pmcs = 4, 677 .cpu_setup = __setup_cpu_604, 678 .machine_check = machine_check_generic, 679 .platform = "ppc604", 680 }, 681 { /* 740/750 (0x4202, don't support TAU ?) */ 682 .pvr_mask = 0xffffffff, 683 .pvr_value = 0x00084202, 684 .cpu_name = "740/750", 685 .cpu_features = CPU_FTRS_740_NOTAU, 686 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 687 .mmu_features = MMU_FTR_HPTE_TABLE, 688 .icache_bsize = 32, 689 .dcache_bsize = 32, 690 .num_pmcs = 4, 691 .cpu_setup = __setup_cpu_750, 692 .machine_check = machine_check_generic, 693 .platform = "ppc750", 694 }, 695 { /* 750CX (80100 and 8010x?) */ 696 .pvr_mask = 0xfffffff0, 697 .pvr_value = 0x00080100, 698 .cpu_name = "750CX", 699 .cpu_features = CPU_FTRS_750, 700 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 701 .mmu_features = MMU_FTR_HPTE_TABLE, 702 .icache_bsize = 32, 703 .dcache_bsize = 32, 704 .num_pmcs = 4, 705 .cpu_setup = __setup_cpu_750cx, 706 .machine_check = machine_check_generic, 707 .platform = "ppc750", 708 }, 709 { /* 750CX (82201 and 82202) */ 710 .pvr_mask = 0xfffffff0, 711 .pvr_value = 0x00082200, 712 .cpu_name = "750CX", 713 .cpu_features = CPU_FTRS_750, 714 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 715 .mmu_features = MMU_FTR_HPTE_TABLE, 716 .icache_bsize = 32, 717 .dcache_bsize = 32, 718 .num_pmcs = 4, 719 .pmc_type = PPC_PMC_IBM, 720 .cpu_setup = __setup_cpu_750cx, 721 .machine_check = machine_check_generic, 722 .platform = "ppc750", 723 }, 724 { /* 750CXe (82214) */ 725 .pvr_mask = 0xfffffff0, 726 .pvr_value = 0x00082210, 727 .cpu_name = "750CXe", 728 .cpu_features = CPU_FTRS_750, 729 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 730 .mmu_features = MMU_FTR_HPTE_TABLE, 731 .icache_bsize = 32, 732 .dcache_bsize = 32, 733 .num_pmcs = 4, 734 .pmc_type = PPC_PMC_IBM, 735 .cpu_setup = __setup_cpu_750cx, 736 .machine_check = machine_check_generic, 737 .platform = "ppc750", 738 }, 739 { /* 750CXe "Gekko" (83214) */ 740 .pvr_mask = 0xffffffff, 741 .pvr_value = 0x00083214, 742 .cpu_name = "750CXe", 743 .cpu_features = CPU_FTRS_750, 744 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 745 .mmu_features = MMU_FTR_HPTE_TABLE, 746 .icache_bsize = 32, 747 .dcache_bsize = 32, 748 .num_pmcs = 4, 749 .pmc_type = PPC_PMC_IBM, 750 .cpu_setup = __setup_cpu_750cx, 751 .machine_check = machine_check_generic, 752 .platform = "ppc750", 753 }, 754 { /* 750CL (and "Broadway") */ 755 .pvr_mask = 0xfffff0e0, 756 .pvr_value = 0x00087000, 757 .cpu_name = "750CL", 758 .cpu_features = CPU_FTRS_750CL, 759 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 760 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 761 .icache_bsize = 32, 762 .dcache_bsize = 32, 763 .num_pmcs = 4, 764 .pmc_type = PPC_PMC_IBM, 765 .cpu_setup = __setup_cpu_750, 766 .machine_check = machine_check_generic, 767 .platform = "ppc750", 768 .oprofile_cpu_type = "ppc/750", 769 .oprofile_type = PPC_OPROFILE_G4, 770 }, 771 { /* 745/755 */ 772 .pvr_mask = 0xfffff000, 773 .pvr_value = 0x00083000, 774 .cpu_name = "745/755", 775 .cpu_features = CPU_FTRS_750, 776 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 777 .mmu_features = MMU_FTR_HPTE_TABLE, 778 .icache_bsize = 32, 779 .dcache_bsize = 32, 780 .num_pmcs = 4, 781 .pmc_type = PPC_PMC_IBM, 782 .cpu_setup = __setup_cpu_750, 783 .machine_check = machine_check_generic, 784 .platform = "ppc750", 785 }, 786 { /* 750FX rev 1.x */ 787 .pvr_mask = 0xffffff00, 788 .pvr_value = 0x70000100, 789 .cpu_name = "750FX", 790 .cpu_features = CPU_FTRS_750FX1, 791 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 792 .mmu_features = MMU_FTR_HPTE_TABLE, 793 .icache_bsize = 32, 794 .dcache_bsize = 32, 795 .num_pmcs = 4, 796 .pmc_type = PPC_PMC_IBM, 797 .cpu_setup = __setup_cpu_750, 798 .machine_check = machine_check_generic, 799 .platform = "ppc750", 800 .oprofile_cpu_type = "ppc/750", 801 .oprofile_type = PPC_OPROFILE_G4, 802 }, 803 { /* 750FX rev 2.0 must disable HID0[DPM] */ 804 .pvr_mask = 0xffffffff, 805 .pvr_value = 0x70000200, 806 .cpu_name = "750FX", 807 .cpu_features = CPU_FTRS_750FX2, 808 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 809 .mmu_features = MMU_FTR_HPTE_TABLE, 810 .icache_bsize = 32, 811 .dcache_bsize = 32, 812 .num_pmcs = 4, 813 .pmc_type = PPC_PMC_IBM, 814 .cpu_setup = __setup_cpu_750, 815 .machine_check = machine_check_generic, 816 .platform = "ppc750", 817 .oprofile_cpu_type = "ppc/750", 818 .oprofile_type = PPC_OPROFILE_G4, 819 }, 820 { /* 750FX (All revs except 2.0) */ 821 .pvr_mask = 0xffff0000, 822 .pvr_value = 0x70000000, 823 .cpu_name = "750FX", 824 .cpu_features = CPU_FTRS_750FX, 825 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 826 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 827 .icache_bsize = 32, 828 .dcache_bsize = 32, 829 .num_pmcs = 4, 830 .pmc_type = PPC_PMC_IBM, 831 .cpu_setup = __setup_cpu_750fx, 832 .machine_check = machine_check_generic, 833 .platform = "ppc750", 834 .oprofile_cpu_type = "ppc/750", 835 .oprofile_type = PPC_OPROFILE_G4, 836 }, 837 { /* 750GX */ 838 .pvr_mask = 0xffff0000, 839 .pvr_value = 0x70020000, 840 .cpu_name = "750GX", 841 .cpu_features = CPU_FTRS_750GX, 842 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 843 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 844 .icache_bsize = 32, 845 .dcache_bsize = 32, 846 .num_pmcs = 4, 847 .pmc_type = PPC_PMC_IBM, 848 .cpu_setup = __setup_cpu_750fx, 849 .machine_check = machine_check_generic, 850 .platform = "ppc750", 851 .oprofile_cpu_type = "ppc/750", 852 .oprofile_type = PPC_OPROFILE_G4, 853 }, 854 { /* 740/750 (L2CR bit need fixup for 740) */ 855 .pvr_mask = 0xffff0000, 856 .pvr_value = 0x00080000, 857 .cpu_name = "740/750", 858 .cpu_features = CPU_FTRS_740, 859 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 860 .mmu_features = MMU_FTR_HPTE_TABLE, 861 .icache_bsize = 32, 862 .dcache_bsize = 32, 863 .num_pmcs = 4, 864 .pmc_type = PPC_PMC_IBM, 865 .cpu_setup = __setup_cpu_750, 866 .machine_check = machine_check_generic, 867 .platform = "ppc750", 868 }, 869 { /* 7400 rev 1.1 ? (no TAU) */ 870 .pvr_mask = 0xffffffff, 871 .pvr_value = 0x000c1101, 872 .cpu_name = "7400 (1.1)", 873 .cpu_features = CPU_FTRS_7400_NOTAU, 874 .cpu_user_features = COMMON_USER | 875 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 876 .mmu_features = MMU_FTR_HPTE_TABLE, 877 .icache_bsize = 32, 878 .dcache_bsize = 32, 879 .num_pmcs = 4, 880 .pmc_type = PPC_PMC_G4, 881 .cpu_setup = __setup_cpu_7400, 882 .machine_check = machine_check_generic, 883 .platform = "ppc7400", 884 }, 885 { /* 7400 */ 886 .pvr_mask = 0xffff0000, 887 .pvr_value = 0x000c0000, 888 .cpu_name = "7400", 889 .cpu_features = CPU_FTRS_7400, 890 .cpu_user_features = COMMON_USER | 891 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 892 .mmu_features = MMU_FTR_HPTE_TABLE, 893 .icache_bsize = 32, 894 .dcache_bsize = 32, 895 .num_pmcs = 4, 896 .pmc_type = PPC_PMC_G4, 897 .cpu_setup = __setup_cpu_7400, 898 .machine_check = machine_check_generic, 899 .platform = "ppc7400", 900 }, 901 { /* 7410 */ 902 .pvr_mask = 0xffff0000, 903 .pvr_value = 0x800c0000, 904 .cpu_name = "7410", 905 .cpu_features = CPU_FTRS_7400, 906 .cpu_user_features = COMMON_USER | 907 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 908 .mmu_features = MMU_FTR_HPTE_TABLE, 909 .icache_bsize = 32, 910 .dcache_bsize = 32, 911 .num_pmcs = 4, 912 .pmc_type = PPC_PMC_G4, 913 .cpu_setup = __setup_cpu_7410, 914 .machine_check = machine_check_generic, 915 .platform = "ppc7400", 916 }, 917 { /* 7450 2.0 - no doze/nap */ 918 .pvr_mask = 0xffffffff, 919 .pvr_value = 0x80000200, 920 .cpu_name = "7450", 921 .cpu_features = CPU_FTRS_7450_20, 922 .cpu_user_features = COMMON_USER | 923 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 924 .mmu_features = MMU_FTR_HPTE_TABLE, 925 .icache_bsize = 32, 926 .dcache_bsize = 32, 927 .num_pmcs = 6, 928 .pmc_type = PPC_PMC_G4, 929 .cpu_setup = __setup_cpu_745x, 930 .oprofile_cpu_type = "ppc/7450", 931 .oprofile_type = PPC_OPROFILE_G4, 932 .machine_check = machine_check_generic, 933 .platform = "ppc7450", 934 }, 935 { /* 7450 2.1 */ 936 .pvr_mask = 0xffffffff, 937 .pvr_value = 0x80000201, 938 .cpu_name = "7450", 939 .cpu_features = CPU_FTRS_7450_21, 940 .cpu_user_features = COMMON_USER | 941 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 942 .mmu_features = MMU_FTR_HPTE_TABLE, 943 .icache_bsize = 32, 944 .dcache_bsize = 32, 945 .num_pmcs = 6, 946 .pmc_type = PPC_PMC_G4, 947 .cpu_setup = __setup_cpu_745x, 948 .oprofile_cpu_type = "ppc/7450", 949 .oprofile_type = PPC_OPROFILE_G4, 950 .machine_check = machine_check_generic, 951 .platform = "ppc7450", 952 }, 953 { /* 7450 2.3 and newer */ 954 .pvr_mask = 0xffff0000, 955 .pvr_value = 0x80000000, 956 .cpu_name = "7450", 957 .cpu_features = CPU_FTRS_7450_23, 958 .cpu_user_features = COMMON_USER | 959 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 960 .mmu_features = MMU_FTR_HPTE_TABLE, 961 .icache_bsize = 32, 962 .dcache_bsize = 32, 963 .num_pmcs = 6, 964 .pmc_type = PPC_PMC_G4, 965 .cpu_setup = __setup_cpu_745x, 966 .oprofile_cpu_type = "ppc/7450", 967 .oprofile_type = PPC_OPROFILE_G4, 968 .machine_check = machine_check_generic, 969 .platform = "ppc7450", 970 }, 971 { /* 7455 rev 1.x */ 972 .pvr_mask = 0xffffff00, 973 .pvr_value = 0x80010100, 974 .cpu_name = "7455", 975 .cpu_features = CPU_FTRS_7455_1, 976 .cpu_user_features = COMMON_USER | 977 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 978 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 979 .icache_bsize = 32, 980 .dcache_bsize = 32, 981 .num_pmcs = 6, 982 .pmc_type = PPC_PMC_G4, 983 .cpu_setup = __setup_cpu_745x, 984 .oprofile_cpu_type = "ppc/7450", 985 .oprofile_type = PPC_OPROFILE_G4, 986 .machine_check = machine_check_generic, 987 .platform = "ppc7450", 988 }, 989 { /* 7455 rev 2.0 */ 990 .pvr_mask = 0xffffffff, 991 .pvr_value = 0x80010200, 992 .cpu_name = "7455", 993 .cpu_features = CPU_FTRS_7455_20, 994 .cpu_user_features = COMMON_USER | 995 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 996 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 997 .icache_bsize = 32, 998 .dcache_bsize = 32, 999 .num_pmcs = 6, 1000 .pmc_type = PPC_PMC_G4, 1001 .cpu_setup = __setup_cpu_745x, 1002 .oprofile_cpu_type = "ppc/7450", 1003 .oprofile_type = PPC_OPROFILE_G4, 1004 .machine_check = machine_check_generic, 1005 .platform = "ppc7450", 1006 }, 1007 { /* 7455 others */ 1008 .pvr_mask = 0xffff0000, 1009 .pvr_value = 0x80010000, 1010 .cpu_name = "7455", 1011 .cpu_features = CPU_FTRS_7455, 1012 .cpu_user_features = COMMON_USER | 1013 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1014 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1015 .icache_bsize = 32, 1016 .dcache_bsize = 32, 1017 .num_pmcs = 6, 1018 .pmc_type = PPC_PMC_G4, 1019 .cpu_setup = __setup_cpu_745x, 1020 .oprofile_cpu_type = "ppc/7450", 1021 .oprofile_type = PPC_OPROFILE_G4, 1022 .machine_check = machine_check_generic, 1023 .platform = "ppc7450", 1024 }, 1025 { /* 7447/7457 Rev 1.0 */ 1026 .pvr_mask = 0xffffffff, 1027 .pvr_value = 0x80020100, 1028 .cpu_name = "7447/7457", 1029 .cpu_features = CPU_FTRS_7447_10, 1030 .cpu_user_features = COMMON_USER | 1031 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1032 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1033 .icache_bsize = 32, 1034 .dcache_bsize = 32, 1035 .num_pmcs = 6, 1036 .pmc_type = PPC_PMC_G4, 1037 .cpu_setup = __setup_cpu_745x, 1038 .oprofile_cpu_type = "ppc/7450", 1039 .oprofile_type = PPC_OPROFILE_G4, 1040 .machine_check = machine_check_generic, 1041 .platform = "ppc7450", 1042 }, 1043 { /* 7447/7457 Rev 1.1 */ 1044 .pvr_mask = 0xffffffff, 1045 .pvr_value = 0x80020101, 1046 .cpu_name = "7447/7457", 1047 .cpu_features = CPU_FTRS_7447_10, 1048 .cpu_user_features = COMMON_USER | 1049 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1050 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1051 .icache_bsize = 32, 1052 .dcache_bsize = 32, 1053 .num_pmcs = 6, 1054 .pmc_type = PPC_PMC_G4, 1055 .cpu_setup = __setup_cpu_745x, 1056 .oprofile_cpu_type = "ppc/7450", 1057 .oprofile_type = PPC_OPROFILE_G4, 1058 .machine_check = machine_check_generic, 1059 .platform = "ppc7450", 1060 }, 1061 { /* 7447/7457 Rev 1.2 and later */ 1062 .pvr_mask = 0xffff0000, 1063 .pvr_value = 0x80020000, 1064 .cpu_name = "7447/7457", 1065 .cpu_features = CPU_FTRS_7447, 1066 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1067 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1068 .icache_bsize = 32, 1069 .dcache_bsize = 32, 1070 .num_pmcs = 6, 1071 .pmc_type = PPC_PMC_G4, 1072 .cpu_setup = __setup_cpu_745x, 1073 .oprofile_cpu_type = "ppc/7450", 1074 .oprofile_type = PPC_OPROFILE_G4, 1075 .machine_check = machine_check_generic, 1076 .platform = "ppc7450", 1077 }, 1078 { /* 7447A */ 1079 .pvr_mask = 0xffff0000, 1080 .pvr_value = 0x80030000, 1081 .cpu_name = "7447A", 1082 .cpu_features = CPU_FTRS_7447A, 1083 .cpu_user_features = COMMON_USER | 1084 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1085 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1086 .icache_bsize = 32, 1087 .dcache_bsize = 32, 1088 .num_pmcs = 6, 1089 .pmc_type = PPC_PMC_G4, 1090 .cpu_setup = __setup_cpu_745x, 1091 .oprofile_cpu_type = "ppc/7450", 1092 .oprofile_type = PPC_OPROFILE_G4, 1093 .machine_check = machine_check_generic, 1094 .platform = "ppc7450", 1095 }, 1096 { /* 7448 */ 1097 .pvr_mask = 0xffff0000, 1098 .pvr_value = 0x80040000, 1099 .cpu_name = "7448", 1100 .cpu_features = CPU_FTRS_7448, 1101 .cpu_user_features = COMMON_USER | 1102 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1103 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1104 .icache_bsize = 32, 1105 .dcache_bsize = 32, 1106 .num_pmcs = 6, 1107 .pmc_type = PPC_PMC_G4, 1108 .cpu_setup = __setup_cpu_745x, 1109 .oprofile_cpu_type = "ppc/7450", 1110 .oprofile_type = PPC_OPROFILE_G4, 1111 .machine_check = machine_check_generic, 1112 .platform = "ppc7450", 1113 }, 1114 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1115 .pvr_mask = 0x7fff0000, 1116 .pvr_value = 0x00810000, 1117 .cpu_name = "82xx", 1118 .cpu_features = CPU_FTRS_82XX, 1119 .cpu_user_features = COMMON_USER, 1120 .mmu_features = 0, 1121 .icache_bsize = 32, 1122 .dcache_bsize = 32, 1123 .cpu_setup = __setup_cpu_603, 1124 .machine_check = machine_check_generic, 1125 .platform = "ppc603", 1126 }, 1127 { /* All G2_LE (603e core, plus some) have the same pvr */ 1128 .pvr_mask = 0x7fff0000, 1129 .pvr_value = 0x00820000, 1130 .cpu_name = "G2_LE", 1131 .cpu_features = CPU_FTRS_G2_LE, 1132 .cpu_user_features = COMMON_USER, 1133 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1134 .icache_bsize = 32, 1135 .dcache_bsize = 32, 1136 .cpu_setup = __setup_cpu_603, 1137 .machine_check = machine_check_generic, 1138 .platform = "ppc603", 1139 }, 1140 #ifdef CONFIG_PPC_83xx 1141 { /* e300c1 (a 603e core, plus some) on 83xx */ 1142 .pvr_mask = 0x7fff0000, 1143 .pvr_value = 0x00830000, 1144 .cpu_name = "e300c1", 1145 .cpu_features = CPU_FTRS_E300, 1146 .cpu_user_features = COMMON_USER, 1147 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1148 .icache_bsize = 32, 1149 .dcache_bsize = 32, 1150 .cpu_setup = __setup_cpu_603, 1151 .machine_check = machine_check_83xx, 1152 .platform = "ppc603", 1153 }, 1154 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1155 .pvr_mask = 0x7fff0000, 1156 .pvr_value = 0x00840000, 1157 .cpu_name = "e300c2", 1158 .cpu_features = CPU_FTRS_E300C2, 1159 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1160 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1161 MMU_FTR_NEED_DTLB_SW_LRU, 1162 .icache_bsize = 32, 1163 .dcache_bsize = 32, 1164 .cpu_setup = __setup_cpu_603, 1165 .machine_check = machine_check_83xx, 1166 .platform = "ppc603", 1167 }, 1168 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1169 .pvr_mask = 0x7fff0000, 1170 .pvr_value = 0x00850000, 1171 .cpu_name = "e300c3", 1172 .cpu_features = CPU_FTRS_E300, 1173 .cpu_user_features = COMMON_USER, 1174 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1175 MMU_FTR_NEED_DTLB_SW_LRU, 1176 .icache_bsize = 32, 1177 .dcache_bsize = 32, 1178 .cpu_setup = __setup_cpu_603, 1179 .machine_check = machine_check_83xx, 1180 .num_pmcs = 4, 1181 .oprofile_cpu_type = "ppc/e300", 1182 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1183 .platform = "ppc603", 1184 }, 1185 { /* e300c4 (e300c1, plus one IU) */ 1186 .pvr_mask = 0x7fff0000, 1187 .pvr_value = 0x00860000, 1188 .cpu_name = "e300c4", 1189 .cpu_features = CPU_FTRS_E300, 1190 .cpu_user_features = COMMON_USER, 1191 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1192 MMU_FTR_NEED_DTLB_SW_LRU, 1193 .icache_bsize = 32, 1194 .dcache_bsize = 32, 1195 .cpu_setup = __setup_cpu_603, 1196 .machine_check = machine_check_83xx, 1197 .num_pmcs = 4, 1198 .oprofile_cpu_type = "ppc/e300", 1199 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1200 .platform = "ppc603", 1201 }, 1202 #endif 1203 { /* default match, we assume split I/D cache & TB (non-601)... */ 1204 .pvr_mask = 0x00000000, 1205 .pvr_value = 0x00000000, 1206 .cpu_name = "(generic PPC)", 1207 .cpu_features = CPU_FTRS_CLASSIC32, 1208 .cpu_user_features = COMMON_USER, 1209 .mmu_features = MMU_FTR_HPTE_TABLE, 1210 .icache_bsize = 32, 1211 .dcache_bsize = 32, 1212 .machine_check = machine_check_generic, 1213 .platform = "ppc603", 1214 }, 1215 #endif /* CONFIG_PPC_BOOK3S_32 */ 1216 #ifdef CONFIG_PPC_8xx 1217 { /* 8xx */ 1218 .pvr_mask = 0xffff0000, 1219 .pvr_value = PVR_8xx, 1220 .cpu_name = "8xx", 1221 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1222 * if the 8xx code is there.... */ 1223 .cpu_features = CPU_FTRS_8XX, 1224 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1225 .mmu_features = MMU_FTR_TYPE_8xx, 1226 .icache_bsize = 16, 1227 .dcache_bsize = 16, 1228 .machine_check = machine_check_8xx, 1229 .platform = "ppc823", 1230 }, 1231 #endif /* CONFIG_PPC_8xx */ 1232 #ifdef CONFIG_40x 1233 { /* 403GC */ 1234 .pvr_mask = 0xffffff00, 1235 .pvr_value = 0x00200200, 1236 .cpu_name = "403GC", 1237 .cpu_features = CPU_FTRS_40X, 1238 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1239 .mmu_features = MMU_FTR_TYPE_40x, 1240 .icache_bsize = 16, 1241 .dcache_bsize = 16, 1242 .machine_check = machine_check_4xx, 1243 .platform = "ppc403", 1244 }, 1245 { /* 403GCX */ 1246 .pvr_mask = 0xffffff00, 1247 .pvr_value = 0x00201400, 1248 .cpu_name = "403GCX", 1249 .cpu_features = CPU_FTRS_40X, 1250 .cpu_user_features = PPC_FEATURE_32 | 1251 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1252 .mmu_features = MMU_FTR_TYPE_40x, 1253 .icache_bsize = 16, 1254 .dcache_bsize = 16, 1255 .machine_check = machine_check_4xx, 1256 .platform = "ppc403", 1257 }, 1258 { /* 403G ?? */ 1259 .pvr_mask = 0xffff0000, 1260 .pvr_value = 0x00200000, 1261 .cpu_name = "403G ??", 1262 .cpu_features = CPU_FTRS_40X, 1263 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1264 .mmu_features = MMU_FTR_TYPE_40x, 1265 .icache_bsize = 16, 1266 .dcache_bsize = 16, 1267 .machine_check = machine_check_4xx, 1268 .platform = "ppc403", 1269 }, 1270 { /* 405GP */ 1271 .pvr_mask = 0xffff0000, 1272 .pvr_value = 0x40110000, 1273 .cpu_name = "405GP", 1274 .cpu_features = CPU_FTRS_40X, 1275 .cpu_user_features = PPC_FEATURE_32 | 1276 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1277 .mmu_features = MMU_FTR_TYPE_40x, 1278 .icache_bsize = 32, 1279 .dcache_bsize = 32, 1280 .machine_check = machine_check_4xx, 1281 .platform = "ppc405", 1282 }, 1283 { /* STB 03xxx */ 1284 .pvr_mask = 0xffff0000, 1285 .pvr_value = 0x40130000, 1286 .cpu_name = "STB03xxx", 1287 .cpu_features = CPU_FTRS_40X, 1288 .cpu_user_features = PPC_FEATURE_32 | 1289 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1290 .mmu_features = MMU_FTR_TYPE_40x, 1291 .icache_bsize = 32, 1292 .dcache_bsize = 32, 1293 .machine_check = machine_check_4xx, 1294 .platform = "ppc405", 1295 }, 1296 { /* STB 04xxx */ 1297 .pvr_mask = 0xffff0000, 1298 .pvr_value = 0x41810000, 1299 .cpu_name = "STB04xxx", 1300 .cpu_features = CPU_FTRS_40X, 1301 .cpu_user_features = PPC_FEATURE_32 | 1302 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1303 .mmu_features = MMU_FTR_TYPE_40x, 1304 .icache_bsize = 32, 1305 .dcache_bsize = 32, 1306 .machine_check = machine_check_4xx, 1307 .platform = "ppc405", 1308 }, 1309 { /* NP405L */ 1310 .pvr_mask = 0xffff0000, 1311 .pvr_value = 0x41610000, 1312 .cpu_name = "NP405L", 1313 .cpu_features = CPU_FTRS_40X, 1314 .cpu_user_features = PPC_FEATURE_32 | 1315 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1316 .mmu_features = MMU_FTR_TYPE_40x, 1317 .icache_bsize = 32, 1318 .dcache_bsize = 32, 1319 .machine_check = machine_check_4xx, 1320 .platform = "ppc405", 1321 }, 1322 { /* NP4GS3 */ 1323 .pvr_mask = 0xffff0000, 1324 .pvr_value = 0x40B10000, 1325 .cpu_name = "NP4GS3", 1326 .cpu_features = CPU_FTRS_40X, 1327 .cpu_user_features = PPC_FEATURE_32 | 1328 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1329 .mmu_features = MMU_FTR_TYPE_40x, 1330 .icache_bsize = 32, 1331 .dcache_bsize = 32, 1332 .machine_check = machine_check_4xx, 1333 .platform = "ppc405", 1334 }, 1335 { /* NP405H */ 1336 .pvr_mask = 0xffff0000, 1337 .pvr_value = 0x41410000, 1338 .cpu_name = "NP405H", 1339 .cpu_features = CPU_FTRS_40X, 1340 .cpu_user_features = PPC_FEATURE_32 | 1341 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1342 .mmu_features = MMU_FTR_TYPE_40x, 1343 .icache_bsize = 32, 1344 .dcache_bsize = 32, 1345 .machine_check = machine_check_4xx, 1346 .platform = "ppc405", 1347 }, 1348 { /* 405GPr */ 1349 .pvr_mask = 0xffff0000, 1350 .pvr_value = 0x50910000, 1351 .cpu_name = "405GPr", 1352 .cpu_features = CPU_FTRS_40X, 1353 .cpu_user_features = PPC_FEATURE_32 | 1354 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1355 .mmu_features = MMU_FTR_TYPE_40x, 1356 .icache_bsize = 32, 1357 .dcache_bsize = 32, 1358 .machine_check = machine_check_4xx, 1359 .platform = "ppc405", 1360 }, 1361 { /* STBx25xx */ 1362 .pvr_mask = 0xffff0000, 1363 .pvr_value = 0x51510000, 1364 .cpu_name = "STBx25xx", 1365 .cpu_features = CPU_FTRS_40X, 1366 .cpu_user_features = PPC_FEATURE_32 | 1367 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1368 .mmu_features = MMU_FTR_TYPE_40x, 1369 .icache_bsize = 32, 1370 .dcache_bsize = 32, 1371 .machine_check = machine_check_4xx, 1372 .platform = "ppc405", 1373 }, 1374 { /* 405LP */ 1375 .pvr_mask = 0xffff0000, 1376 .pvr_value = 0x41F10000, 1377 .cpu_name = "405LP", 1378 .cpu_features = CPU_FTRS_40X, 1379 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1380 .mmu_features = MMU_FTR_TYPE_40x, 1381 .icache_bsize = 32, 1382 .dcache_bsize = 32, 1383 .machine_check = machine_check_4xx, 1384 .platform = "ppc405", 1385 }, 1386 { /* Xilinx Virtex-II Pro */ 1387 .pvr_mask = 0xfffff000, 1388 .pvr_value = 0x20010000, 1389 .cpu_name = "Virtex-II Pro", 1390 .cpu_features = CPU_FTRS_40X, 1391 .cpu_user_features = PPC_FEATURE_32 | 1392 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1393 .mmu_features = MMU_FTR_TYPE_40x, 1394 .icache_bsize = 32, 1395 .dcache_bsize = 32, 1396 .machine_check = machine_check_4xx, 1397 .platform = "ppc405", 1398 }, 1399 { /* Xilinx Virtex-4 FX */ 1400 .pvr_mask = 0xfffff000, 1401 .pvr_value = 0x20011000, 1402 .cpu_name = "Virtex-4 FX", 1403 .cpu_features = CPU_FTRS_40X, 1404 .cpu_user_features = PPC_FEATURE_32 | 1405 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1406 .mmu_features = MMU_FTR_TYPE_40x, 1407 .icache_bsize = 32, 1408 .dcache_bsize = 32, 1409 .machine_check = machine_check_4xx, 1410 .platform = "ppc405", 1411 }, 1412 { /* 405EP */ 1413 .pvr_mask = 0xffff0000, 1414 .pvr_value = 0x51210000, 1415 .cpu_name = "405EP", 1416 .cpu_features = CPU_FTRS_40X, 1417 .cpu_user_features = PPC_FEATURE_32 | 1418 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1419 .mmu_features = MMU_FTR_TYPE_40x, 1420 .icache_bsize = 32, 1421 .dcache_bsize = 32, 1422 .machine_check = machine_check_4xx, 1423 .platform = "ppc405", 1424 }, 1425 { /* 405EX Rev. A/B with Security */ 1426 .pvr_mask = 0xffff000f, 1427 .pvr_value = 0x12910007, 1428 .cpu_name = "405EX Rev. A/B", 1429 .cpu_features = CPU_FTRS_40X, 1430 .cpu_user_features = PPC_FEATURE_32 | 1431 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1432 .mmu_features = MMU_FTR_TYPE_40x, 1433 .icache_bsize = 32, 1434 .dcache_bsize = 32, 1435 .machine_check = machine_check_4xx, 1436 .platform = "ppc405", 1437 }, 1438 { /* 405EX Rev. C without Security */ 1439 .pvr_mask = 0xffff000f, 1440 .pvr_value = 0x1291000d, 1441 .cpu_name = "405EX Rev. C", 1442 .cpu_features = CPU_FTRS_40X, 1443 .cpu_user_features = PPC_FEATURE_32 | 1444 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1445 .mmu_features = MMU_FTR_TYPE_40x, 1446 .icache_bsize = 32, 1447 .dcache_bsize = 32, 1448 .machine_check = machine_check_4xx, 1449 .platform = "ppc405", 1450 }, 1451 { /* 405EX Rev. C with Security */ 1452 .pvr_mask = 0xffff000f, 1453 .pvr_value = 0x1291000f, 1454 .cpu_name = "405EX Rev. C", 1455 .cpu_features = CPU_FTRS_40X, 1456 .cpu_user_features = PPC_FEATURE_32 | 1457 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1458 .mmu_features = MMU_FTR_TYPE_40x, 1459 .icache_bsize = 32, 1460 .dcache_bsize = 32, 1461 .machine_check = machine_check_4xx, 1462 .platform = "ppc405", 1463 }, 1464 { /* 405EX Rev. D without Security */ 1465 .pvr_mask = 0xffff000f, 1466 .pvr_value = 0x12910003, 1467 .cpu_name = "405EX Rev. D", 1468 .cpu_features = CPU_FTRS_40X, 1469 .cpu_user_features = PPC_FEATURE_32 | 1470 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1471 .mmu_features = MMU_FTR_TYPE_40x, 1472 .icache_bsize = 32, 1473 .dcache_bsize = 32, 1474 .machine_check = machine_check_4xx, 1475 .platform = "ppc405", 1476 }, 1477 { /* 405EX Rev. D with Security */ 1478 .pvr_mask = 0xffff000f, 1479 .pvr_value = 0x12910005, 1480 .cpu_name = "405EX Rev. D", 1481 .cpu_features = CPU_FTRS_40X, 1482 .cpu_user_features = PPC_FEATURE_32 | 1483 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1484 .mmu_features = MMU_FTR_TYPE_40x, 1485 .icache_bsize = 32, 1486 .dcache_bsize = 32, 1487 .machine_check = machine_check_4xx, 1488 .platform = "ppc405", 1489 }, 1490 { /* 405EXr Rev. A/B without Security */ 1491 .pvr_mask = 0xffff000f, 1492 .pvr_value = 0x12910001, 1493 .cpu_name = "405EXr Rev. A/B", 1494 .cpu_features = CPU_FTRS_40X, 1495 .cpu_user_features = PPC_FEATURE_32 | 1496 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1497 .mmu_features = MMU_FTR_TYPE_40x, 1498 .icache_bsize = 32, 1499 .dcache_bsize = 32, 1500 .machine_check = machine_check_4xx, 1501 .platform = "ppc405", 1502 }, 1503 { /* 405EXr Rev. C without Security */ 1504 .pvr_mask = 0xffff000f, 1505 .pvr_value = 0x12910009, 1506 .cpu_name = "405EXr Rev. C", 1507 .cpu_features = CPU_FTRS_40X, 1508 .cpu_user_features = PPC_FEATURE_32 | 1509 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1510 .mmu_features = MMU_FTR_TYPE_40x, 1511 .icache_bsize = 32, 1512 .dcache_bsize = 32, 1513 .machine_check = machine_check_4xx, 1514 .platform = "ppc405", 1515 }, 1516 { /* 405EXr Rev. C with Security */ 1517 .pvr_mask = 0xffff000f, 1518 .pvr_value = 0x1291000b, 1519 .cpu_name = "405EXr Rev. C", 1520 .cpu_features = CPU_FTRS_40X, 1521 .cpu_user_features = PPC_FEATURE_32 | 1522 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1523 .mmu_features = MMU_FTR_TYPE_40x, 1524 .icache_bsize = 32, 1525 .dcache_bsize = 32, 1526 .machine_check = machine_check_4xx, 1527 .platform = "ppc405", 1528 }, 1529 { /* 405EXr Rev. D without Security */ 1530 .pvr_mask = 0xffff000f, 1531 .pvr_value = 0x12910000, 1532 .cpu_name = "405EXr Rev. D", 1533 .cpu_features = CPU_FTRS_40X, 1534 .cpu_user_features = PPC_FEATURE_32 | 1535 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1536 .mmu_features = MMU_FTR_TYPE_40x, 1537 .icache_bsize = 32, 1538 .dcache_bsize = 32, 1539 .machine_check = machine_check_4xx, 1540 .platform = "ppc405", 1541 }, 1542 { /* 405EXr Rev. D with Security */ 1543 .pvr_mask = 0xffff000f, 1544 .pvr_value = 0x12910002, 1545 .cpu_name = "405EXr Rev. D", 1546 .cpu_features = CPU_FTRS_40X, 1547 .cpu_user_features = PPC_FEATURE_32 | 1548 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1549 .mmu_features = MMU_FTR_TYPE_40x, 1550 .icache_bsize = 32, 1551 .dcache_bsize = 32, 1552 .machine_check = machine_check_4xx, 1553 .platform = "ppc405", 1554 }, 1555 { 1556 /* 405EZ */ 1557 .pvr_mask = 0xffff0000, 1558 .pvr_value = 0x41510000, 1559 .cpu_name = "405EZ", 1560 .cpu_features = CPU_FTRS_40X, 1561 .cpu_user_features = PPC_FEATURE_32 | 1562 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1563 .mmu_features = MMU_FTR_TYPE_40x, 1564 .icache_bsize = 32, 1565 .dcache_bsize = 32, 1566 .machine_check = machine_check_4xx, 1567 .platform = "ppc405", 1568 }, 1569 { /* APM8018X */ 1570 .pvr_mask = 0xffff0000, 1571 .pvr_value = 0x7ff11432, 1572 .cpu_name = "APM8018X", 1573 .cpu_features = CPU_FTRS_40X, 1574 .cpu_user_features = PPC_FEATURE_32 | 1575 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1576 .mmu_features = MMU_FTR_TYPE_40x, 1577 .icache_bsize = 32, 1578 .dcache_bsize = 32, 1579 .machine_check = machine_check_4xx, 1580 .platform = "ppc405", 1581 }, 1582 { /* default match */ 1583 .pvr_mask = 0x00000000, 1584 .pvr_value = 0x00000000, 1585 .cpu_name = "(generic 40x PPC)", 1586 .cpu_features = CPU_FTRS_40X, 1587 .cpu_user_features = PPC_FEATURE_32 | 1588 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1589 .mmu_features = MMU_FTR_TYPE_40x, 1590 .icache_bsize = 32, 1591 .dcache_bsize = 32, 1592 .machine_check = machine_check_4xx, 1593 .platform = "ppc405", 1594 } 1595 1596 #endif /* CONFIG_40x */ 1597 #ifdef CONFIG_44x 1598 { 1599 .pvr_mask = 0xf0000fff, 1600 .pvr_value = 0x40000850, 1601 .cpu_name = "440GR Rev. A", 1602 .cpu_features = CPU_FTRS_44X, 1603 .cpu_user_features = COMMON_USER_BOOKE, 1604 .mmu_features = MMU_FTR_TYPE_44x, 1605 .icache_bsize = 32, 1606 .dcache_bsize = 32, 1607 .machine_check = machine_check_4xx, 1608 .platform = "ppc440", 1609 }, 1610 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1611 .pvr_mask = 0xf0000fff, 1612 .pvr_value = 0x40000858, 1613 .cpu_name = "440EP Rev. A", 1614 .cpu_features = CPU_FTRS_44X, 1615 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1616 .mmu_features = MMU_FTR_TYPE_44x, 1617 .icache_bsize = 32, 1618 .dcache_bsize = 32, 1619 .cpu_setup = __setup_cpu_440ep, 1620 .machine_check = machine_check_4xx, 1621 .platform = "ppc440", 1622 }, 1623 { 1624 .pvr_mask = 0xf0000fff, 1625 .pvr_value = 0x400008d3, 1626 .cpu_name = "440GR Rev. B", 1627 .cpu_features = CPU_FTRS_44X, 1628 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1629 .mmu_features = MMU_FTR_TYPE_44x, 1630 .icache_bsize = 32, 1631 .dcache_bsize = 32, 1632 .machine_check = machine_check_4xx, 1633 .platform = "ppc440", 1634 }, 1635 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1636 .pvr_mask = 0xf0000ff7, 1637 .pvr_value = 0x400008d4, 1638 .cpu_name = "440EP Rev. C", 1639 .cpu_features = CPU_FTRS_44X, 1640 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1641 .mmu_features = MMU_FTR_TYPE_44x, 1642 .icache_bsize = 32, 1643 .dcache_bsize = 32, 1644 .cpu_setup = __setup_cpu_440ep, 1645 .machine_check = machine_check_4xx, 1646 .platform = "ppc440", 1647 }, 1648 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1649 .pvr_mask = 0xf0000fff, 1650 .pvr_value = 0x400008db, 1651 .cpu_name = "440EP Rev. B", 1652 .cpu_features = CPU_FTRS_44X, 1653 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1654 .mmu_features = MMU_FTR_TYPE_44x, 1655 .icache_bsize = 32, 1656 .dcache_bsize = 32, 1657 .cpu_setup = __setup_cpu_440ep, 1658 .machine_check = machine_check_4xx, 1659 .platform = "ppc440", 1660 }, 1661 { /* 440GRX */ 1662 .pvr_mask = 0xf0000ffb, 1663 .pvr_value = 0x200008D0, 1664 .cpu_name = "440GRX", 1665 .cpu_features = CPU_FTRS_44X, 1666 .cpu_user_features = COMMON_USER_BOOKE, 1667 .mmu_features = MMU_FTR_TYPE_44x, 1668 .icache_bsize = 32, 1669 .dcache_bsize = 32, 1670 .cpu_setup = __setup_cpu_440grx, 1671 .machine_check = machine_check_440A, 1672 .platform = "ppc440", 1673 }, 1674 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1675 .pvr_mask = 0xf0000ffb, 1676 .pvr_value = 0x200008D8, 1677 .cpu_name = "440EPX", 1678 .cpu_features = CPU_FTRS_44X, 1679 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1680 .mmu_features = MMU_FTR_TYPE_44x, 1681 .icache_bsize = 32, 1682 .dcache_bsize = 32, 1683 .cpu_setup = __setup_cpu_440epx, 1684 .machine_check = machine_check_440A, 1685 .platform = "ppc440", 1686 }, 1687 { /* 440GP Rev. B */ 1688 .pvr_mask = 0xf0000fff, 1689 .pvr_value = 0x40000440, 1690 .cpu_name = "440GP Rev. B", 1691 .cpu_features = CPU_FTRS_44X, 1692 .cpu_user_features = COMMON_USER_BOOKE, 1693 .mmu_features = MMU_FTR_TYPE_44x, 1694 .icache_bsize = 32, 1695 .dcache_bsize = 32, 1696 .machine_check = machine_check_4xx, 1697 .platform = "ppc440gp", 1698 }, 1699 { /* 440GP Rev. C */ 1700 .pvr_mask = 0xf0000fff, 1701 .pvr_value = 0x40000481, 1702 .cpu_name = "440GP Rev. C", 1703 .cpu_features = CPU_FTRS_44X, 1704 .cpu_user_features = COMMON_USER_BOOKE, 1705 .mmu_features = MMU_FTR_TYPE_44x, 1706 .icache_bsize = 32, 1707 .dcache_bsize = 32, 1708 .machine_check = machine_check_4xx, 1709 .platform = "ppc440gp", 1710 }, 1711 { /* 440GX Rev. A */ 1712 .pvr_mask = 0xf0000fff, 1713 .pvr_value = 0x50000850, 1714 .cpu_name = "440GX Rev. A", 1715 .cpu_features = CPU_FTRS_44X, 1716 .cpu_user_features = COMMON_USER_BOOKE, 1717 .mmu_features = MMU_FTR_TYPE_44x, 1718 .icache_bsize = 32, 1719 .dcache_bsize = 32, 1720 .cpu_setup = __setup_cpu_440gx, 1721 .machine_check = machine_check_440A, 1722 .platform = "ppc440", 1723 }, 1724 { /* 440GX Rev. B */ 1725 .pvr_mask = 0xf0000fff, 1726 .pvr_value = 0x50000851, 1727 .cpu_name = "440GX Rev. B", 1728 .cpu_features = CPU_FTRS_44X, 1729 .cpu_user_features = COMMON_USER_BOOKE, 1730 .mmu_features = MMU_FTR_TYPE_44x, 1731 .icache_bsize = 32, 1732 .dcache_bsize = 32, 1733 .cpu_setup = __setup_cpu_440gx, 1734 .machine_check = machine_check_440A, 1735 .platform = "ppc440", 1736 }, 1737 { /* 440GX Rev. C */ 1738 .pvr_mask = 0xf0000fff, 1739 .pvr_value = 0x50000892, 1740 .cpu_name = "440GX Rev. C", 1741 .cpu_features = CPU_FTRS_44X, 1742 .cpu_user_features = COMMON_USER_BOOKE, 1743 .mmu_features = MMU_FTR_TYPE_44x, 1744 .icache_bsize = 32, 1745 .dcache_bsize = 32, 1746 .cpu_setup = __setup_cpu_440gx, 1747 .machine_check = machine_check_440A, 1748 .platform = "ppc440", 1749 }, 1750 { /* 440GX Rev. F */ 1751 .pvr_mask = 0xf0000fff, 1752 .pvr_value = 0x50000894, 1753 .cpu_name = "440GX Rev. F", 1754 .cpu_features = CPU_FTRS_44X, 1755 .cpu_user_features = COMMON_USER_BOOKE, 1756 .mmu_features = MMU_FTR_TYPE_44x, 1757 .icache_bsize = 32, 1758 .dcache_bsize = 32, 1759 .cpu_setup = __setup_cpu_440gx, 1760 .machine_check = machine_check_440A, 1761 .platform = "ppc440", 1762 }, 1763 { /* 440SP Rev. A */ 1764 .pvr_mask = 0xfff00fff, 1765 .pvr_value = 0x53200891, 1766 .cpu_name = "440SP Rev. A", 1767 .cpu_features = CPU_FTRS_44X, 1768 .cpu_user_features = COMMON_USER_BOOKE, 1769 .mmu_features = MMU_FTR_TYPE_44x, 1770 .icache_bsize = 32, 1771 .dcache_bsize = 32, 1772 .machine_check = machine_check_4xx, 1773 .platform = "ppc440", 1774 }, 1775 { /* 440SPe Rev. A */ 1776 .pvr_mask = 0xfff00fff, 1777 .pvr_value = 0x53400890, 1778 .cpu_name = "440SPe Rev. A", 1779 .cpu_features = CPU_FTRS_44X, 1780 .cpu_user_features = COMMON_USER_BOOKE, 1781 .mmu_features = MMU_FTR_TYPE_44x, 1782 .icache_bsize = 32, 1783 .dcache_bsize = 32, 1784 .cpu_setup = __setup_cpu_440spe, 1785 .machine_check = machine_check_440A, 1786 .platform = "ppc440", 1787 }, 1788 { /* 440SPe Rev. B */ 1789 .pvr_mask = 0xfff00fff, 1790 .pvr_value = 0x53400891, 1791 .cpu_name = "440SPe Rev. B", 1792 .cpu_features = CPU_FTRS_44X, 1793 .cpu_user_features = COMMON_USER_BOOKE, 1794 .mmu_features = MMU_FTR_TYPE_44x, 1795 .icache_bsize = 32, 1796 .dcache_bsize = 32, 1797 .cpu_setup = __setup_cpu_440spe, 1798 .machine_check = machine_check_440A, 1799 .platform = "ppc440", 1800 }, 1801 { /* 440 in Xilinx Virtex-5 FXT */ 1802 .pvr_mask = 0xfffffff0, 1803 .pvr_value = 0x7ff21910, 1804 .cpu_name = "440 in Virtex-5 FXT", 1805 .cpu_features = CPU_FTRS_44X, 1806 .cpu_user_features = COMMON_USER_BOOKE, 1807 .mmu_features = MMU_FTR_TYPE_44x, 1808 .icache_bsize = 32, 1809 .dcache_bsize = 32, 1810 .cpu_setup = __setup_cpu_440x5, 1811 .machine_check = machine_check_440A, 1812 .platform = "ppc440", 1813 }, 1814 { /* 460EX */ 1815 .pvr_mask = 0xffff0006, 1816 .pvr_value = 0x13020002, 1817 .cpu_name = "460EX", 1818 .cpu_features = CPU_FTRS_440x6, 1819 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1820 .mmu_features = MMU_FTR_TYPE_44x, 1821 .icache_bsize = 32, 1822 .dcache_bsize = 32, 1823 .cpu_setup = __setup_cpu_460ex, 1824 .machine_check = machine_check_440A, 1825 .platform = "ppc440", 1826 }, 1827 { /* 460EX Rev B */ 1828 .pvr_mask = 0xffff0007, 1829 .pvr_value = 0x13020004, 1830 .cpu_name = "460EX Rev. B", 1831 .cpu_features = CPU_FTRS_440x6, 1832 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1833 .mmu_features = MMU_FTR_TYPE_44x, 1834 .icache_bsize = 32, 1835 .dcache_bsize = 32, 1836 .cpu_setup = __setup_cpu_460ex, 1837 .machine_check = machine_check_440A, 1838 .platform = "ppc440", 1839 }, 1840 { /* 460GT */ 1841 .pvr_mask = 0xffff0006, 1842 .pvr_value = 0x13020000, 1843 .cpu_name = "460GT", 1844 .cpu_features = CPU_FTRS_440x6, 1845 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1846 .mmu_features = MMU_FTR_TYPE_44x, 1847 .icache_bsize = 32, 1848 .dcache_bsize = 32, 1849 .cpu_setup = __setup_cpu_460gt, 1850 .machine_check = machine_check_440A, 1851 .platform = "ppc440", 1852 }, 1853 { /* 460GT Rev B */ 1854 .pvr_mask = 0xffff0007, 1855 .pvr_value = 0x13020005, 1856 .cpu_name = "460GT Rev. B", 1857 .cpu_features = CPU_FTRS_440x6, 1858 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1859 .mmu_features = MMU_FTR_TYPE_44x, 1860 .icache_bsize = 32, 1861 .dcache_bsize = 32, 1862 .cpu_setup = __setup_cpu_460gt, 1863 .machine_check = machine_check_440A, 1864 .platform = "ppc440", 1865 }, 1866 { /* 460SX */ 1867 .pvr_mask = 0xffffff00, 1868 .pvr_value = 0x13541800, 1869 .cpu_name = "460SX", 1870 .cpu_features = CPU_FTRS_44X, 1871 .cpu_user_features = COMMON_USER_BOOKE, 1872 .mmu_features = MMU_FTR_TYPE_44x, 1873 .icache_bsize = 32, 1874 .dcache_bsize = 32, 1875 .cpu_setup = __setup_cpu_460sx, 1876 .machine_check = machine_check_440A, 1877 .platform = "ppc440", 1878 }, 1879 { /* 464 in APM821xx */ 1880 .pvr_mask = 0xfffffff0, 1881 .pvr_value = 0x12C41C80, 1882 .cpu_name = "APM821XX", 1883 .cpu_features = CPU_FTRS_44X, 1884 .cpu_user_features = COMMON_USER_BOOKE | 1885 PPC_FEATURE_HAS_FPU, 1886 .mmu_features = MMU_FTR_TYPE_44x, 1887 .icache_bsize = 32, 1888 .dcache_bsize = 32, 1889 .cpu_setup = __setup_cpu_apm821xx, 1890 .machine_check = machine_check_440A, 1891 .platform = "ppc440", 1892 }, 1893 #ifdef CONFIG_PPC_47x 1894 { /* 476 DD2 core */ 1895 .pvr_mask = 0xffffffff, 1896 .pvr_value = 0x11a52080, 1897 .cpu_name = "476", 1898 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1899 .cpu_user_features = COMMON_USER_BOOKE | 1900 PPC_FEATURE_HAS_FPU, 1901 .mmu_features = MMU_FTR_TYPE_47x | 1902 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1903 .icache_bsize = 32, 1904 .dcache_bsize = 128, 1905 .machine_check = machine_check_47x, 1906 .platform = "ppc470", 1907 }, 1908 { /* 476fpe */ 1909 .pvr_mask = 0xffff0000, 1910 .pvr_value = 0x7ff50000, 1911 .cpu_name = "476fpe", 1912 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1913 .cpu_user_features = COMMON_USER_BOOKE | 1914 PPC_FEATURE_HAS_FPU, 1915 .mmu_features = MMU_FTR_TYPE_47x | 1916 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1917 .icache_bsize = 32, 1918 .dcache_bsize = 128, 1919 .machine_check = machine_check_47x, 1920 .platform = "ppc470", 1921 }, 1922 { /* 476 iss */ 1923 .pvr_mask = 0xffff0000, 1924 .pvr_value = 0x00050000, 1925 .cpu_name = "476", 1926 .cpu_features = CPU_FTRS_47X, 1927 .cpu_user_features = COMMON_USER_BOOKE | 1928 PPC_FEATURE_HAS_FPU, 1929 .mmu_features = MMU_FTR_TYPE_47x | 1930 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1931 .icache_bsize = 32, 1932 .dcache_bsize = 128, 1933 .machine_check = machine_check_47x, 1934 .platform = "ppc470", 1935 }, 1936 { /* 476 others */ 1937 .pvr_mask = 0xffff0000, 1938 .pvr_value = 0x11a50000, 1939 .cpu_name = "476", 1940 .cpu_features = CPU_FTRS_47X, 1941 .cpu_user_features = COMMON_USER_BOOKE | 1942 PPC_FEATURE_HAS_FPU, 1943 .mmu_features = MMU_FTR_TYPE_47x | 1944 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1945 .icache_bsize = 32, 1946 .dcache_bsize = 128, 1947 .machine_check = machine_check_47x, 1948 .platform = "ppc470", 1949 }, 1950 #endif /* CONFIG_PPC_47x */ 1951 { /* default match */ 1952 .pvr_mask = 0x00000000, 1953 .pvr_value = 0x00000000, 1954 .cpu_name = "(generic 44x PPC)", 1955 .cpu_features = CPU_FTRS_44X, 1956 .cpu_user_features = COMMON_USER_BOOKE, 1957 .mmu_features = MMU_FTR_TYPE_44x, 1958 .icache_bsize = 32, 1959 .dcache_bsize = 32, 1960 .machine_check = machine_check_4xx, 1961 .platform = "ppc440", 1962 } 1963 #endif /* CONFIG_44x */ 1964 #ifdef CONFIG_E200 1965 { /* e200z5 */ 1966 .pvr_mask = 0xfff00000, 1967 .pvr_value = 0x81000000, 1968 .cpu_name = "e200z5", 1969 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1970 .cpu_features = CPU_FTRS_E200, 1971 .cpu_user_features = COMMON_USER_BOOKE | 1972 PPC_FEATURE_HAS_EFP_SINGLE | 1973 PPC_FEATURE_UNIFIED_CACHE, 1974 .mmu_features = MMU_FTR_TYPE_FSL_E, 1975 .dcache_bsize = 32, 1976 .machine_check = machine_check_e200, 1977 .platform = "ppc5554", 1978 }, 1979 { /* e200z6 */ 1980 .pvr_mask = 0xfff00000, 1981 .pvr_value = 0x81100000, 1982 .cpu_name = "e200z6", 1983 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1984 .cpu_features = CPU_FTRS_E200, 1985 .cpu_user_features = COMMON_USER_BOOKE | 1986 PPC_FEATURE_HAS_SPE_COMP | 1987 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1988 PPC_FEATURE_UNIFIED_CACHE, 1989 .mmu_features = MMU_FTR_TYPE_FSL_E, 1990 .dcache_bsize = 32, 1991 .machine_check = machine_check_e200, 1992 .platform = "ppc5554", 1993 }, 1994 { /* default match */ 1995 .pvr_mask = 0x00000000, 1996 .pvr_value = 0x00000000, 1997 .cpu_name = "(generic E200 PPC)", 1998 .cpu_features = CPU_FTRS_E200, 1999 .cpu_user_features = COMMON_USER_BOOKE | 2000 PPC_FEATURE_HAS_EFP_SINGLE | 2001 PPC_FEATURE_UNIFIED_CACHE, 2002 .mmu_features = MMU_FTR_TYPE_FSL_E, 2003 .dcache_bsize = 32, 2004 .cpu_setup = __setup_cpu_e200, 2005 .machine_check = machine_check_e200, 2006 .platform = "ppc5554", 2007 } 2008 #endif /* CONFIG_E200 */ 2009 #endif /* CONFIG_PPC32 */ 2010 #ifdef CONFIG_E500 2011 #ifdef CONFIG_PPC32 2012 #ifndef CONFIG_PPC_E500MC 2013 { /* e500 */ 2014 .pvr_mask = 0xffff0000, 2015 .pvr_value = 0x80200000, 2016 .cpu_name = "e500", 2017 .cpu_features = CPU_FTRS_E500, 2018 .cpu_user_features = COMMON_USER_BOOKE | 2019 PPC_FEATURE_HAS_SPE_COMP | 2020 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2021 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2022 .mmu_features = MMU_FTR_TYPE_FSL_E, 2023 .icache_bsize = 32, 2024 .dcache_bsize = 32, 2025 .num_pmcs = 4, 2026 .oprofile_cpu_type = "ppc/e500", 2027 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2028 .cpu_setup = __setup_cpu_e500v1, 2029 .machine_check = machine_check_e500, 2030 .platform = "ppc8540", 2031 }, 2032 { /* e500v2 */ 2033 .pvr_mask = 0xffff0000, 2034 .pvr_value = 0x80210000, 2035 .cpu_name = "e500v2", 2036 .cpu_features = CPU_FTRS_E500_2, 2037 .cpu_user_features = COMMON_USER_BOOKE | 2038 PPC_FEATURE_HAS_SPE_COMP | 2039 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2040 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2041 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2042 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2043 .icache_bsize = 32, 2044 .dcache_bsize = 32, 2045 .num_pmcs = 4, 2046 .oprofile_cpu_type = "ppc/e500", 2047 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2048 .cpu_setup = __setup_cpu_e500v2, 2049 .machine_check = machine_check_e500, 2050 .platform = "ppc8548", 2051 .cpu_down_flush = cpu_down_flush_e500v2, 2052 }, 2053 #else 2054 { /* e500mc */ 2055 .pvr_mask = 0xffff0000, 2056 .pvr_value = 0x80230000, 2057 .cpu_name = "e500mc", 2058 .cpu_features = CPU_FTRS_E500MC, 2059 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2060 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2061 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2062 MMU_FTR_USE_TLBILX, 2063 .icache_bsize = 64, 2064 .dcache_bsize = 64, 2065 .num_pmcs = 4, 2066 .oprofile_cpu_type = "ppc/e500mc", 2067 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2068 .cpu_setup = __setup_cpu_e500mc, 2069 .machine_check = machine_check_e500mc, 2070 .platform = "ppce500mc", 2071 .cpu_down_flush = cpu_down_flush_e500mc, 2072 }, 2073 #endif /* CONFIG_PPC_E500MC */ 2074 #endif /* CONFIG_PPC32 */ 2075 #ifdef CONFIG_PPC_E500MC 2076 { /* e5500 */ 2077 .pvr_mask = 0xffff0000, 2078 .pvr_value = 0x80240000, 2079 .cpu_name = "e5500", 2080 .cpu_features = CPU_FTRS_E5500, 2081 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2082 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2083 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2084 MMU_FTR_USE_TLBILX, 2085 .icache_bsize = 64, 2086 .dcache_bsize = 64, 2087 .num_pmcs = 4, 2088 .oprofile_cpu_type = "ppc/e500mc", 2089 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2090 .cpu_setup = __setup_cpu_e5500, 2091 #ifndef CONFIG_PPC32 2092 .cpu_restore = __restore_cpu_e5500, 2093 #endif 2094 .machine_check = machine_check_e500mc, 2095 .platform = "ppce5500", 2096 .cpu_down_flush = cpu_down_flush_e5500, 2097 }, 2098 { /* e6500 */ 2099 .pvr_mask = 0xffff0000, 2100 .pvr_value = 0x80400000, 2101 .cpu_name = "e6500", 2102 .cpu_features = CPU_FTRS_E6500, 2103 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2104 PPC_FEATURE_HAS_ALTIVEC_COMP, 2105 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2106 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2107 MMU_FTR_USE_TLBILX, 2108 .icache_bsize = 64, 2109 .dcache_bsize = 64, 2110 .num_pmcs = 6, 2111 .oprofile_cpu_type = "ppc/e6500", 2112 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2113 .cpu_setup = __setup_cpu_e6500, 2114 #ifndef CONFIG_PPC32 2115 .cpu_restore = __restore_cpu_e6500, 2116 #endif 2117 .machine_check = machine_check_e500mc, 2118 .platform = "ppce6500", 2119 .cpu_down_flush = cpu_down_flush_e6500, 2120 }, 2121 #endif /* CONFIG_PPC_E500MC */ 2122 #ifdef CONFIG_PPC32 2123 { /* default match */ 2124 .pvr_mask = 0x00000000, 2125 .pvr_value = 0x00000000, 2126 .cpu_name = "(generic E500 PPC)", 2127 .cpu_features = CPU_FTRS_E500, 2128 .cpu_user_features = COMMON_USER_BOOKE | 2129 PPC_FEATURE_HAS_SPE_COMP | 2130 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2131 .mmu_features = MMU_FTR_TYPE_FSL_E, 2132 .icache_bsize = 32, 2133 .dcache_bsize = 32, 2134 .machine_check = machine_check_e500, 2135 .platform = "powerpc", 2136 } 2137 #endif /* CONFIG_PPC32 */ 2138 #endif /* CONFIG_E500 */ 2139 }; 2140 2141 void __init set_cur_cpu_spec(struct cpu_spec *s) 2142 { 2143 struct cpu_spec *t = &the_cpu_spec; 2144 2145 t = PTRRELOC(t); 2146 /* 2147 * use memcpy() instead of *t = *s so that GCC replaces it 2148 * by __memcpy() when KASAN is active 2149 */ 2150 memcpy(t, s, sizeof(*t)); 2151 2152 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2153 } 2154 2155 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2156 struct cpu_spec *s) 2157 { 2158 struct cpu_spec *t = &the_cpu_spec; 2159 struct cpu_spec old; 2160 2161 t = PTRRELOC(t); 2162 old = *t; 2163 2164 /* 2165 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2166 * so that GCC replaces it by __memcpy() when KASAN is active 2167 */ 2168 memcpy(t, s, sizeof(*t)); 2169 2170 /* 2171 * If we are overriding a previous value derived from the real 2172 * PVR with a new value obtained using a logical PVR value, 2173 * don't modify the performance monitor fields. 2174 */ 2175 if (old.num_pmcs && !s->num_pmcs) { 2176 t->num_pmcs = old.num_pmcs; 2177 t->pmc_type = old.pmc_type; 2178 t->oprofile_type = old.oprofile_type; 2179 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2180 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2181 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2182 2183 /* 2184 * If we have passed through this logic once before and 2185 * have pulled the default case because the real PVR was 2186 * not found inside cpu_specs[], then we are possibly 2187 * running in compatibility mode. In that case, let the 2188 * oprofiler know which set of compatibility counters to 2189 * pull from by making sure the oprofile_cpu_type string 2190 * is set to that of compatibility mode. If the 2191 * oprofile_cpu_type already has a value, then we are 2192 * possibly overriding a real PVR with a logical one, 2193 * and, in that case, keep the current value for 2194 * oprofile_cpu_type. 2195 */ 2196 if (old.oprofile_cpu_type != NULL) { 2197 t->oprofile_cpu_type = old.oprofile_cpu_type; 2198 t->oprofile_type = old.oprofile_type; 2199 } 2200 } 2201 2202 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2203 2204 /* 2205 * Set the base platform string once; assumes 2206 * we're called with real pvr first. 2207 */ 2208 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2209 *PTRRELOC(&powerpc_base_platform) = t->platform; 2210 2211 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2212 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2213 * that processor. I will consolidate that at a later time, for now, 2214 * just use #ifdef. We also don't need to PTRRELOC the function 2215 * pointer on ppc64 and booke as we are running at 0 in real mode 2216 * on ppc64 and reloc_offset is always 0 on booke. 2217 */ 2218 if (t->cpu_setup) { 2219 t->cpu_setup(offset, t); 2220 } 2221 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2222 2223 return t; 2224 } 2225 2226 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2227 { 2228 struct cpu_spec *s = cpu_specs; 2229 int i; 2230 2231 s = PTRRELOC(s); 2232 2233 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2234 if ((pvr & s->pvr_mask) == s->pvr_value) 2235 return setup_cpu_spec(offset, s); 2236 } 2237 2238 BUG(); 2239 2240 return NULL; 2241 } 2242 2243 /* 2244 * Used by cpufeatures to get the name for CPUs with a PVR table. 2245 * If they don't hae a PVR table, cpufeatures gets the name from 2246 * cpu device-tree node. 2247 */ 2248 void __init identify_cpu_name(unsigned int pvr) 2249 { 2250 struct cpu_spec *s = cpu_specs; 2251 struct cpu_spec *t = &the_cpu_spec; 2252 int i; 2253 2254 s = PTRRELOC(s); 2255 t = PTRRELOC(t); 2256 2257 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2258 if ((pvr & s->pvr_mask) == s->pvr_value) { 2259 t->cpu_name = s->cpu_name; 2260 return; 2261 } 2262 } 2263 } 2264 2265 2266 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2267 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2268 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2269 }; 2270 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2271 2272 void __init cpu_feature_keys_init(void) 2273 { 2274 int i; 2275 2276 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2277 unsigned long f = 1ul << i; 2278 2279 if (!(cur_cpu_spec->cpu_features & f)) 2280 static_branch_disable(&cpu_feature_keys[i]); 2281 } 2282 } 2283 2284 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2285 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2286 }; 2287 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2288 2289 void __init mmu_feature_keys_init(void) 2290 { 2291 int i; 2292 2293 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2294 unsigned long f = 1ul << i; 2295 2296 if (!(cur_cpu_spec->mmu_features & f)) 2297 static_branch_disable(&mmu_feature_keys[i]); 2298 } 2299 } 2300 #endif 2301