1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 #include <linux/jump_label.h> 19 20 #include <asm/oprofile_impl.h> 21 #include <asm/cputable.h> 22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 23 #include <asm/mmu.h> 24 #include <asm/setup.h> 25 26 static struct cpu_spec the_cpu_spec __read_mostly; 27 28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 29 EXPORT_SYMBOL(cur_cpu_spec); 30 31 /* The platform string corresponding to the real PVR */ 32 const char *powerpc_base_platform; 33 34 /* NOTE: 35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 36 * the responsibility of the appropriate CPU save/restore functions to 37 * eventually copy these settings over. Those save/restore aren't yet 38 * part of the cputable though. That has to be fixed for both ppc32 39 * and ppc64 40 */ 41 #ifdef CONFIG_PPC32 42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 64 #endif /* CONFIG_PPC32 */ 65 #ifdef CONFIG_PPC64 66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 69 extern void __restore_cpu_pa6t(void); 70 extern void __restore_cpu_ppc970(void); 71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power7(void); 73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power8(void); 75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 76 extern void __restore_cpu_power9(void); 77 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 78 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 79 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 80 #endif /* CONFIG_PPC64 */ 81 #if defined(CONFIG_E500) 82 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 83 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 84 extern void __restore_cpu_e5500(void); 85 extern void __restore_cpu_e6500(void); 86 #endif /* CONFIG_E500 */ 87 88 /* This table only contains "desktop" CPUs, it need to be filled with embedded 89 * ones as well... 90 */ 91 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 92 PPC_FEATURE_HAS_MMU) 93 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 94 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 95 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 99 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 101 PPC_FEATURE_TRUE_LE | \ 102 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 103 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 105 PPC_FEATURE_TRUE_LE | \ 106 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 107 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 108 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 110 PPC_FEATURE_TRUE_LE | \ 111 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 112 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 113 PPC_FEATURE2_HTM_COMP | \ 114 PPC_FEATURE2_HTM_NOSC_COMP | \ 115 PPC_FEATURE2_DSCR | \ 116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 117 PPC_FEATURE2_VEC_CRYPTO) 118 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 119 PPC_FEATURE_TRUE_LE | \ 120 PPC_FEATURE_HAS_ALTIVEC_COMP) 121 #define COMMON_USER_POWER9 COMMON_USER_POWER8 122 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 123 PPC_FEATURE2_ARCH_3_00 | \ 124 PPC_FEATURE2_HAS_IEEE128 | \ 125 PPC_FEATURE2_DARN ) 126 127 #ifdef CONFIG_PPC_BOOK3E_64 128 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 129 #else 130 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 131 PPC_FEATURE_BOOKE) 132 #endif 133 134 static struct cpu_spec __initdata cpu_specs[] = { 135 #ifdef CONFIG_PPC_BOOK3S_64 136 { /* PPC970 */ 137 .pvr_mask = 0xffff0000, 138 .pvr_value = 0x00390000, 139 .cpu_name = "PPC970", 140 .cpu_features = CPU_FTRS_PPC970, 141 .cpu_user_features = COMMON_USER_POWER4 | 142 PPC_FEATURE_HAS_ALTIVEC_COMP, 143 .mmu_features = MMU_FTRS_PPC970, 144 .icache_bsize = 128, 145 .dcache_bsize = 128, 146 .num_pmcs = 8, 147 .pmc_type = PPC_PMC_IBM, 148 .cpu_setup = __setup_cpu_ppc970, 149 .cpu_restore = __restore_cpu_ppc970, 150 .oprofile_cpu_type = "ppc64/970", 151 .oprofile_type = PPC_OPROFILE_POWER4, 152 .platform = "ppc970", 153 }, 154 { /* PPC970FX */ 155 .pvr_mask = 0xffff0000, 156 .pvr_value = 0x003c0000, 157 .cpu_name = "PPC970FX", 158 .cpu_features = CPU_FTRS_PPC970, 159 .cpu_user_features = COMMON_USER_POWER4 | 160 PPC_FEATURE_HAS_ALTIVEC_COMP, 161 .mmu_features = MMU_FTRS_PPC970, 162 .icache_bsize = 128, 163 .dcache_bsize = 128, 164 .num_pmcs = 8, 165 .pmc_type = PPC_PMC_IBM, 166 .cpu_setup = __setup_cpu_ppc970, 167 .cpu_restore = __restore_cpu_ppc970, 168 .oprofile_cpu_type = "ppc64/970", 169 .oprofile_type = PPC_OPROFILE_POWER4, 170 .platform = "ppc970", 171 }, 172 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 173 .pvr_mask = 0xffffffff, 174 .pvr_value = 0x00440100, 175 .cpu_name = "PPC970MP", 176 .cpu_features = CPU_FTRS_PPC970, 177 .cpu_user_features = COMMON_USER_POWER4 | 178 PPC_FEATURE_HAS_ALTIVEC_COMP, 179 .mmu_features = MMU_FTRS_PPC970, 180 .icache_bsize = 128, 181 .dcache_bsize = 128, 182 .num_pmcs = 8, 183 .pmc_type = PPC_PMC_IBM, 184 .cpu_setup = __setup_cpu_ppc970, 185 .cpu_restore = __restore_cpu_ppc970, 186 .oprofile_cpu_type = "ppc64/970MP", 187 .oprofile_type = PPC_OPROFILE_POWER4, 188 .platform = "ppc970", 189 }, 190 { /* PPC970MP */ 191 .pvr_mask = 0xffff0000, 192 .pvr_value = 0x00440000, 193 .cpu_name = "PPC970MP", 194 .cpu_features = CPU_FTRS_PPC970, 195 .cpu_user_features = COMMON_USER_POWER4 | 196 PPC_FEATURE_HAS_ALTIVEC_COMP, 197 .mmu_features = MMU_FTRS_PPC970, 198 .icache_bsize = 128, 199 .dcache_bsize = 128, 200 .num_pmcs = 8, 201 .pmc_type = PPC_PMC_IBM, 202 .cpu_setup = __setup_cpu_ppc970MP, 203 .cpu_restore = __restore_cpu_ppc970, 204 .oprofile_cpu_type = "ppc64/970MP", 205 .oprofile_type = PPC_OPROFILE_POWER4, 206 .platform = "ppc970", 207 }, 208 { /* PPC970GX */ 209 .pvr_mask = 0xffff0000, 210 .pvr_value = 0x00450000, 211 .cpu_name = "PPC970GX", 212 .cpu_features = CPU_FTRS_PPC970, 213 .cpu_user_features = COMMON_USER_POWER4 | 214 PPC_FEATURE_HAS_ALTIVEC_COMP, 215 .mmu_features = MMU_FTRS_PPC970, 216 .icache_bsize = 128, 217 .dcache_bsize = 128, 218 .num_pmcs = 8, 219 .pmc_type = PPC_PMC_IBM, 220 .cpu_setup = __setup_cpu_ppc970, 221 .oprofile_cpu_type = "ppc64/970", 222 .oprofile_type = PPC_OPROFILE_POWER4, 223 .platform = "ppc970", 224 }, 225 { /* Power5 GR */ 226 .pvr_mask = 0xffff0000, 227 .pvr_value = 0x003a0000, 228 .cpu_name = "POWER5 (gr)", 229 .cpu_features = CPU_FTRS_POWER5, 230 .cpu_user_features = COMMON_USER_POWER5, 231 .mmu_features = MMU_FTRS_POWER5, 232 .icache_bsize = 128, 233 .dcache_bsize = 128, 234 .num_pmcs = 6, 235 .pmc_type = PPC_PMC_IBM, 236 .oprofile_cpu_type = "ppc64/power5", 237 .oprofile_type = PPC_OPROFILE_POWER4, 238 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 239 * and above but only works on POWER5 and above 240 */ 241 .oprofile_mmcra_sihv = MMCRA_SIHV, 242 .oprofile_mmcra_sipr = MMCRA_SIPR, 243 .platform = "power5", 244 }, 245 { /* Power5++ */ 246 .pvr_mask = 0xffffff00, 247 .pvr_value = 0x003b0300, 248 .cpu_name = "POWER5+ (gs)", 249 .cpu_features = CPU_FTRS_POWER5, 250 .cpu_user_features = COMMON_USER_POWER5_PLUS, 251 .mmu_features = MMU_FTRS_POWER5, 252 .icache_bsize = 128, 253 .dcache_bsize = 128, 254 .num_pmcs = 6, 255 .oprofile_cpu_type = "ppc64/power5++", 256 .oprofile_type = PPC_OPROFILE_POWER4, 257 .oprofile_mmcra_sihv = MMCRA_SIHV, 258 .oprofile_mmcra_sipr = MMCRA_SIPR, 259 .platform = "power5+", 260 }, 261 { /* Power5 GS */ 262 .pvr_mask = 0xffff0000, 263 .pvr_value = 0x003b0000, 264 .cpu_name = "POWER5+ (gs)", 265 .cpu_features = CPU_FTRS_POWER5, 266 .cpu_user_features = COMMON_USER_POWER5_PLUS, 267 .mmu_features = MMU_FTRS_POWER5, 268 .icache_bsize = 128, 269 .dcache_bsize = 128, 270 .num_pmcs = 6, 271 .pmc_type = PPC_PMC_IBM, 272 .oprofile_cpu_type = "ppc64/power5+", 273 .oprofile_type = PPC_OPROFILE_POWER4, 274 .oprofile_mmcra_sihv = MMCRA_SIHV, 275 .oprofile_mmcra_sipr = MMCRA_SIPR, 276 .platform = "power5+", 277 }, 278 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 279 .pvr_mask = 0xffffffff, 280 .pvr_value = 0x0f000001, 281 .cpu_name = "POWER5+", 282 .cpu_features = CPU_FTRS_POWER5, 283 .cpu_user_features = COMMON_USER_POWER5_PLUS, 284 .mmu_features = MMU_FTRS_POWER5, 285 .icache_bsize = 128, 286 .dcache_bsize = 128, 287 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 288 .oprofile_type = PPC_OPROFILE_POWER4, 289 .platform = "power5+", 290 }, 291 { /* Power6 */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x003e0000, 294 .cpu_name = "POWER6 (raw)", 295 .cpu_features = CPU_FTRS_POWER6, 296 .cpu_user_features = COMMON_USER_POWER6 | 297 PPC_FEATURE_POWER6_EXT, 298 .mmu_features = MMU_FTRS_POWER6, 299 .icache_bsize = 128, 300 .dcache_bsize = 128, 301 .num_pmcs = 6, 302 .pmc_type = PPC_PMC_IBM, 303 .oprofile_cpu_type = "ppc64/power6", 304 .oprofile_type = PPC_OPROFILE_POWER4, 305 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 306 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 307 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 308 POWER6_MMCRA_OTHER, 309 .platform = "power6x", 310 }, 311 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 312 .pvr_mask = 0xffffffff, 313 .pvr_value = 0x0f000002, 314 .cpu_name = "POWER6 (architected)", 315 .cpu_features = CPU_FTRS_POWER6, 316 .cpu_user_features = COMMON_USER_POWER6, 317 .mmu_features = MMU_FTRS_POWER6, 318 .icache_bsize = 128, 319 .dcache_bsize = 128, 320 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 321 .oprofile_type = PPC_OPROFILE_POWER4, 322 .platform = "power6", 323 }, 324 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 325 .pvr_mask = 0xffffffff, 326 .pvr_value = 0x0f000003, 327 .cpu_name = "POWER7 (architected)", 328 .cpu_features = CPU_FTRS_POWER7, 329 .cpu_user_features = COMMON_USER_POWER7, 330 .cpu_user_features2 = COMMON_USER2_POWER7, 331 .mmu_features = MMU_FTRS_POWER7, 332 .icache_bsize = 128, 333 .dcache_bsize = 128, 334 .oprofile_type = PPC_OPROFILE_POWER4, 335 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 336 .cpu_setup = __setup_cpu_power7, 337 .cpu_restore = __restore_cpu_power7, 338 .machine_check_early = __machine_check_early_realmode_p7, 339 .platform = "power7", 340 }, 341 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 342 .pvr_mask = 0xffffffff, 343 .pvr_value = 0x0f000004, 344 .cpu_name = "POWER8 (architected)", 345 .cpu_features = CPU_FTRS_POWER8, 346 .cpu_user_features = COMMON_USER_POWER8, 347 .cpu_user_features2 = COMMON_USER2_POWER8, 348 .mmu_features = MMU_FTRS_POWER8, 349 .icache_bsize = 128, 350 .dcache_bsize = 128, 351 .oprofile_type = PPC_OPROFILE_INVALID, 352 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 353 .cpu_setup = __setup_cpu_power8, 354 .cpu_restore = __restore_cpu_power8, 355 .machine_check_early = __machine_check_early_realmode_p8, 356 .platform = "power8", 357 }, 358 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 359 .pvr_mask = 0xffffffff, 360 .pvr_value = 0x0f000005, 361 .cpu_name = "POWER9 (architected)", 362 .cpu_features = CPU_FTRS_POWER9, 363 .cpu_user_features = COMMON_USER_POWER9, 364 .cpu_user_features2 = COMMON_USER2_POWER9, 365 .mmu_features = MMU_FTRS_POWER9, 366 .icache_bsize = 128, 367 .dcache_bsize = 128, 368 .oprofile_type = PPC_OPROFILE_INVALID, 369 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 370 .cpu_setup = __setup_cpu_power9, 371 .cpu_restore = __restore_cpu_power9, 372 .platform = "power9", 373 }, 374 { /* Power7 */ 375 .pvr_mask = 0xffff0000, 376 .pvr_value = 0x003f0000, 377 .cpu_name = "POWER7 (raw)", 378 .cpu_features = CPU_FTRS_POWER7, 379 .cpu_user_features = COMMON_USER_POWER7, 380 .cpu_user_features2 = COMMON_USER2_POWER7, 381 .mmu_features = MMU_FTRS_POWER7, 382 .icache_bsize = 128, 383 .dcache_bsize = 128, 384 .num_pmcs = 6, 385 .pmc_type = PPC_PMC_IBM, 386 .oprofile_cpu_type = "ppc64/power7", 387 .oprofile_type = PPC_OPROFILE_POWER4, 388 .cpu_setup = __setup_cpu_power7, 389 .cpu_restore = __restore_cpu_power7, 390 .machine_check_early = __machine_check_early_realmode_p7, 391 .platform = "power7", 392 }, 393 { /* Power7+ */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x004A0000, 396 .cpu_name = "POWER7+ (raw)", 397 .cpu_features = CPU_FTRS_POWER7, 398 .cpu_user_features = COMMON_USER_POWER7, 399 .cpu_user_features2 = COMMON_USER2_POWER7, 400 .mmu_features = MMU_FTRS_POWER7, 401 .icache_bsize = 128, 402 .dcache_bsize = 128, 403 .num_pmcs = 6, 404 .pmc_type = PPC_PMC_IBM, 405 .oprofile_cpu_type = "ppc64/power7", 406 .oprofile_type = PPC_OPROFILE_POWER4, 407 .cpu_setup = __setup_cpu_power7, 408 .cpu_restore = __restore_cpu_power7, 409 .machine_check_early = __machine_check_early_realmode_p7, 410 .platform = "power7+", 411 }, 412 { /* Power8E */ 413 .pvr_mask = 0xffff0000, 414 .pvr_value = 0x004b0000, 415 .cpu_name = "POWER8E (raw)", 416 .cpu_features = CPU_FTRS_POWER8E, 417 .cpu_user_features = COMMON_USER_POWER8, 418 .cpu_user_features2 = COMMON_USER2_POWER8, 419 .mmu_features = MMU_FTRS_POWER8, 420 .icache_bsize = 128, 421 .dcache_bsize = 128, 422 .num_pmcs = 6, 423 .pmc_type = PPC_PMC_IBM, 424 .oprofile_cpu_type = "ppc64/power8", 425 .oprofile_type = PPC_OPROFILE_INVALID, 426 .cpu_setup = __setup_cpu_power8, 427 .cpu_restore = __restore_cpu_power8, 428 .machine_check_early = __machine_check_early_realmode_p8, 429 .platform = "power8", 430 }, 431 { /* Power8NVL */ 432 .pvr_mask = 0xffff0000, 433 .pvr_value = 0x004c0000, 434 .cpu_name = "POWER8NVL (raw)", 435 .cpu_features = CPU_FTRS_POWER8, 436 .cpu_user_features = COMMON_USER_POWER8, 437 .cpu_user_features2 = COMMON_USER2_POWER8, 438 .mmu_features = MMU_FTRS_POWER8, 439 .icache_bsize = 128, 440 .dcache_bsize = 128, 441 .num_pmcs = 6, 442 .pmc_type = PPC_PMC_IBM, 443 .oprofile_cpu_type = "ppc64/power8", 444 .oprofile_type = PPC_OPROFILE_INVALID, 445 .cpu_setup = __setup_cpu_power8, 446 .cpu_restore = __restore_cpu_power8, 447 .machine_check_early = __machine_check_early_realmode_p8, 448 .platform = "power8", 449 }, 450 { /* Power8 */ 451 .pvr_mask = 0xffff0000, 452 .pvr_value = 0x004d0000, 453 .cpu_name = "POWER8 (raw)", 454 .cpu_features = CPU_FTRS_POWER8, 455 .cpu_user_features = COMMON_USER_POWER8, 456 .cpu_user_features2 = COMMON_USER2_POWER8, 457 .mmu_features = MMU_FTRS_POWER8, 458 .icache_bsize = 128, 459 .dcache_bsize = 128, 460 .num_pmcs = 6, 461 .pmc_type = PPC_PMC_IBM, 462 .oprofile_cpu_type = "ppc64/power8", 463 .oprofile_type = PPC_OPROFILE_INVALID, 464 .cpu_setup = __setup_cpu_power8, 465 .cpu_restore = __restore_cpu_power8, 466 .machine_check_early = __machine_check_early_realmode_p8, 467 .platform = "power8", 468 }, 469 { /* Power9 DD2.0 */ 470 .pvr_mask = 0xffffefff, 471 .pvr_value = 0x004e0200, 472 .cpu_name = "POWER9 (raw)", 473 .cpu_features = CPU_FTRS_POWER9_DD2_0, 474 .cpu_user_features = COMMON_USER_POWER9, 475 .cpu_user_features2 = COMMON_USER2_POWER9, 476 .mmu_features = MMU_FTRS_POWER9, 477 .icache_bsize = 128, 478 .dcache_bsize = 128, 479 .num_pmcs = 6, 480 .pmc_type = PPC_PMC_IBM, 481 .oprofile_cpu_type = "ppc64/power9", 482 .oprofile_type = PPC_OPROFILE_INVALID, 483 .cpu_setup = __setup_cpu_power9, 484 .cpu_restore = __restore_cpu_power9, 485 .machine_check_early = __machine_check_early_realmode_p9, 486 .platform = "power9", 487 }, 488 { /* Power9 DD 2.1 */ 489 .pvr_mask = 0xffffefff, 490 .pvr_value = 0x004e0201, 491 .cpu_name = "POWER9 (raw)", 492 .cpu_features = CPU_FTRS_POWER9_DD2_1, 493 .cpu_user_features = COMMON_USER_POWER9, 494 .cpu_user_features2 = COMMON_USER2_POWER9, 495 .mmu_features = MMU_FTRS_POWER9, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power9", 501 .oprofile_type = PPC_OPROFILE_INVALID, 502 .cpu_setup = __setup_cpu_power9, 503 .cpu_restore = __restore_cpu_power9, 504 .machine_check_early = __machine_check_early_realmode_p9, 505 .platform = "power9", 506 }, 507 { /* Power9 DD2.2 or later */ 508 .pvr_mask = 0xffff0000, 509 .pvr_value = 0x004e0000, 510 .cpu_name = "POWER9 (raw)", 511 .cpu_features = CPU_FTRS_POWER9_DD2_2, 512 .cpu_user_features = COMMON_USER_POWER9, 513 .cpu_user_features2 = COMMON_USER2_POWER9, 514 .mmu_features = MMU_FTRS_POWER9, 515 .icache_bsize = 128, 516 .dcache_bsize = 128, 517 .num_pmcs = 6, 518 .pmc_type = PPC_PMC_IBM, 519 .oprofile_cpu_type = "ppc64/power9", 520 .oprofile_type = PPC_OPROFILE_INVALID, 521 .cpu_setup = __setup_cpu_power9, 522 .cpu_restore = __restore_cpu_power9, 523 .machine_check_early = __machine_check_early_realmode_p9, 524 .platform = "power9", 525 }, 526 { /* Cell Broadband Engine */ 527 .pvr_mask = 0xffff0000, 528 .pvr_value = 0x00700000, 529 .cpu_name = "Cell Broadband Engine", 530 .cpu_features = CPU_FTRS_CELL, 531 .cpu_user_features = COMMON_USER_PPC64 | 532 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 533 PPC_FEATURE_SMT, 534 .mmu_features = MMU_FTRS_CELL, 535 .icache_bsize = 128, 536 .dcache_bsize = 128, 537 .num_pmcs = 4, 538 .pmc_type = PPC_PMC_IBM, 539 .oprofile_cpu_type = "ppc64/cell-be", 540 .oprofile_type = PPC_OPROFILE_CELL, 541 .platform = "ppc-cell-be", 542 }, 543 { /* PA Semi PA6T */ 544 .pvr_mask = 0x7fff0000, 545 .pvr_value = 0x00900000, 546 .cpu_name = "PA6T", 547 .cpu_features = CPU_FTRS_PA6T, 548 .cpu_user_features = COMMON_USER_PA6T, 549 .mmu_features = MMU_FTRS_PA6T, 550 .icache_bsize = 64, 551 .dcache_bsize = 64, 552 .num_pmcs = 6, 553 .pmc_type = PPC_PMC_PA6T, 554 .cpu_setup = __setup_cpu_pa6t, 555 .cpu_restore = __restore_cpu_pa6t, 556 .oprofile_cpu_type = "ppc64/pa6t", 557 .oprofile_type = PPC_OPROFILE_PA6T, 558 .platform = "pa6t", 559 }, 560 { /* default match */ 561 .pvr_mask = 0x00000000, 562 .pvr_value = 0x00000000, 563 .cpu_name = "POWER5 (compatible)", 564 .cpu_features = CPU_FTRS_COMPATIBLE, 565 .cpu_user_features = COMMON_USER_PPC64, 566 .mmu_features = MMU_FTRS_POWER, 567 .icache_bsize = 128, 568 .dcache_bsize = 128, 569 .num_pmcs = 6, 570 .pmc_type = PPC_PMC_IBM, 571 .platform = "power5", 572 } 573 #endif /* CONFIG_PPC_BOOK3S_64 */ 574 575 #ifdef CONFIG_PPC32 576 #ifdef CONFIG_PPC_BOOK3S_32 577 { /* 601 */ 578 .pvr_mask = 0xffff0000, 579 .pvr_value = 0x00010000, 580 .cpu_name = "601", 581 .cpu_features = CPU_FTRS_PPC601, 582 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 583 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 584 .mmu_features = MMU_FTR_HPTE_TABLE, 585 .icache_bsize = 32, 586 .dcache_bsize = 32, 587 .machine_check = machine_check_generic, 588 .platform = "ppc601", 589 }, 590 { /* 603 */ 591 .pvr_mask = 0xffff0000, 592 .pvr_value = 0x00030000, 593 .cpu_name = "603", 594 .cpu_features = CPU_FTRS_603, 595 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 596 .mmu_features = 0, 597 .icache_bsize = 32, 598 .dcache_bsize = 32, 599 .cpu_setup = __setup_cpu_603, 600 .machine_check = machine_check_generic, 601 .platform = "ppc603", 602 }, 603 { /* 603e */ 604 .pvr_mask = 0xffff0000, 605 .pvr_value = 0x00060000, 606 .cpu_name = "603e", 607 .cpu_features = CPU_FTRS_603, 608 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 609 .mmu_features = 0, 610 .icache_bsize = 32, 611 .dcache_bsize = 32, 612 .cpu_setup = __setup_cpu_603, 613 .machine_check = machine_check_generic, 614 .platform = "ppc603", 615 }, 616 { /* 603ev */ 617 .pvr_mask = 0xffff0000, 618 .pvr_value = 0x00070000, 619 .cpu_name = "603ev", 620 .cpu_features = CPU_FTRS_603, 621 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 622 .mmu_features = 0, 623 .icache_bsize = 32, 624 .dcache_bsize = 32, 625 .cpu_setup = __setup_cpu_603, 626 .machine_check = machine_check_generic, 627 .platform = "ppc603", 628 }, 629 { /* 604 */ 630 .pvr_mask = 0xffff0000, 631 .pvr_value = 0x00040000, 632 .cpu_name = "604", 633 .cpu_features = CPU_FTRS_604, 634 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 635 .mmu_features = MMU_FTR_HPTE_TABLE, 636 .icache_bsize = 32, 637 .dcache_bsize = 32, 638 .num_pmcs = 2, 639 .cpu_setup = __setup_cpu_604, 640 .machine_check = machine_check_generic, 641 .platform = "ppc604", 642 }, 643 { /* 604e */ 644 .pvr_mask = 0xfffff000, 645 .pvr_value = 0x00090000, 646 .cpu_name = "604e", 647 .cpu_features = CPU_FTRS_604, 648 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 649 .mmu_features = MMU_FTR_HPTE_TABLE, 650 .icache_bsize = 32, 651 .dcache_bsize = 32, 652 .num_pmcs = 4, 653 .cpu_setup = __setup_cpu_604, 654 .machine_check = machine_check_generic, 655 .platform = "ppc604", 656 }, 657 { /* 604r */ 658 .pvr_mask = 0xffff0000, 659 .pvr_value = 0x00090000, 660 .cpu_name = "604r", 661 .cpu_features = CPU_FTRS_604, 662 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 663 .mmu_features = MMU_FTR_HPTE_TABLE, 664 .icache_bsize = 32, 665 .dcache_bsize = 32, 666 .num_pmcs = 4, 667 .cpu_setup = __setup_cpu_604, 668 .machine_check = machine_check_generic, 669 .platform = "ppc604", 670 }, 671 { /* 604ev */ 672 .pvr_mask = 0xffff0000, 673 .pvr_value = 0x000a0000, 674 .cpu_name = "604ev", 675 .cpu_features = CPU_FTRS_604, 676 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 677 .mmu_features = MMU_FTR_HPTE_TABLE, 678 .icache_bsize = 32, 679 .dcache_bsize = 32, 680 .num_pmcs = 4, 681 .cpu_setup = __setup_cpu_604, 682 .machine_check = machine_check_generic, 683 .platform = "ppc604", 684 }, 685 { /* 740/750 (0x4202, don't support TAU ?) */ 686 .pvr_mask = 0xffffffff, 687 .pvr_value = 0x00084202, 688 .cpu_name = "740/750", 689 .cpu_features = CPU_FTRS_740_NOTAU, 690 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 691 .mmu_features = MMU_FTR_HPTE_TABLE, 692 .icache_bsize = 32, 693 .dcache_bsize = 32, 694 .num_pmcs = 4, 695 .cpu_setup = __setup_cpu_750, 696 .machine_check = machine_check_generic, 697 .platform = "ppc750", 698 }, 699 { /* 750CX (80100 and 8010x?) */ 700 .pvr_mask = 0xfffffff0, 701 .pvr_value = 0x00080100, 702 .cpu_name = "750CX", 703 .cpu_features = CPU_FTRS_750, 704 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 705 .mmu_features = MMU_FTR_HPTE_TABLE, 706 .icache_bsize = 32, 707 .dcache_bsize = 32, 708 .num_pmcs = 4, 709 .cpu_setup = __setup_cpu_750cx, 710 .machine_check = machine_check_generic, 711 .platform = "ppc750", 712 }, 713 { /* 750CX (82201 and 82202) */ 714 .pvr_mask = 0xfffffff0, 715 .pvr_value = 0x00082200, 716 .cpu_name = "750CX", 717 .cpu_features = CPU_FTRS_750, 718 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 719 .mmu_features = MMU_FTR_HPTE_TABLE, 720 .icache_bsize = 32, 721 .dcache_bsize = 32, 722 .num_pmcs = 4, 723 .pmc_type = PPC_PMC_IBM, 724 .cpu_setup = __setup_cpu_750cx, 725 .machine_check = machine_check_generic, 726 .platform = "ppc750", 727 }, 728 { /* 750CXe (82214) */ 729 .pvr_mask = 0xfffffff0, 730 .pvr_value = 0x00082210, 731 .cpu_name = "750CXe", 732 .cpu_features = CPU_FTRS_750, 733 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 734 .mmu_features = MMU_FTR_HPTE_TABLE, 735 .icache_bsize = 32, 736 .dcache_bsize = 32, 737 .num_pmcs = 4, 738 .pmc_type = PPC_PMC_IBM, 739 .cpu_setup = __setup_cpu_750cx, 740 .machine_check = machine_check_generic, 741 .platform = "ppc750", 742 }, 743 { /* 750CXe "Gekko" (83214) */ 744 .pvr_mask = 0xffffffff, 745 .pvr_value = 0x00083214, 746 .cpu_name = "750CXe", 747 .cpu_features = CPU_FTRS_750, 748 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 749 .mmu_features = MMU_FTR_HPTE_TABLE, 750 .icache_bsize = 32, 751 .dcache_bsize = 32, 752 .num_pmcs = 4, 753 .pmc_type = PPC_PMC_IBM, 754 .cpu_setup = __setup_cpu_750cx, 755 .machine_check = machine_check_generic, 756 .platform = "ppc750", 757 }, 758 { /* 750CL (and "Broadway") */ 759 .pvr_mask = 0xfffff0e0, 760 .pvr_value = 0x00087000, 761 .cpu_name = "750CL", 762 .cpu_features = CPU_FTRS_750CL, 763 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 764 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 765 .icache_bsize = 32, 766 .dcache_bsize = 32, 767 .num_pmcs = 4, 768 .pmc_type = PPC_PMC_IBM, 769 .cpu_setup = __setup_cpu_750, 770 .machine_check = machine_check_generic, 771 .platform = "ppc750", 772 .oprofile_cpu_type = "ppc/750", 773 .oprofile_type = PPC_OPROFILE_G4, 774 }, 775 { /* 745/755 */ 776 .pvr_mask = 0xfffff000, 777 .pvr_value = 0x00083000, 778 .cpu_name = "745/755", 779 .cpu_features = CPU_FTRS_750, 780 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 781 .mmu_features = MMU_FTR_HPTE_TABLE, 782 .icache_bsize = 32, 783 .dcache_bsize = 32, 784 .num_pmcs = 4, 785 .pmc_type = PPC_PMC_IBM, 786 .cpu_setup = __setup_cpu_750, 787 .machine_check = machine_check_generic, 788 .platform = "ppc750", 789 }, 790 { /* 750FX rev 1.x */ 791 .pvr_mask = 0xffffff00, 792 .pvr_value = 0x70000100, 793 .cpu_name = "750FX", 794 .cpu_features = CPU_FTRS_750FX1, 795 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 796 .mmu_features = MMU_FTR_HPTE_TABLE, 797 .icache_bsize = 32, 798 .dcache_bsize = 32, 799 .num_pmcs = 4, 800 .pmc_type = PPC_PMC_IBM, 801 .cpu_setup = __setup_cpu_750, 802 .machine_check = machine_check_generic, 803 .platform = "ppc750", 804 .oprofile_cpu_type = "ppc/750", 805 .oprofile_type = PPC_OPROFILE_G4, 806 }, 807 { /* 750FX rev 2.0 must disable HID0[DPM] */ 808 .pvr_mask = 0xffffffff, 809 .pvr_value = 0x70000200, 810 .cpu_name = "750FX", 811 .cpu_features = CPU_FTRS_750FX2, 812 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 813 .mmu_features = MMU_FTR_HPTE_TABLE, 814 .icache_bsize = 32, 815 .dcache_bsize = 32, 816 .num_pmcs = 4, 817 .pmc_type = PPC_PMC_IBM, 818 .cpu_setup = __setup_cpu_750, 819 .machine_check = machine_check_generic, 820 .platform = "ppc750", 821 .oprofile_cpu_type = "ppc/750", 822 .oprofile_type = PPC_OPROFILE_G4, 823 }, 824 { /* 750FX (All revs except 2.0) */ 825 .pvr_mask = 0xffff0000, 826 .pvr_value = 0x70000000, 827 .cpu_name = "750FX", 828 .cpu_features = CPU_FTRS_750FX, 829 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 830 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 831 .icache_bsize = 32, 832 .dcache_bsize = 32, 833 .num_pmcs = 4, 834 .pmc_type = PPC_PMC_IBM, 835 .cpu_setup = __setup_cpu_750fx, 836 .machine_check = machine_check_generic, 837 .platform = "ppc750", 838 .oprofile_cpu_type = "ppc/750", 839 .oprofile_type = PPC_OPROFILE_G4, 840 }, 841 { /* 750GX */ 842 .pvr_mask = 0xffff0000, 843 .pvr_value = 0x70020000, 844 .cpu_name = "750GX", 845 .cpu_features = CPU_FTRS_750GX, 846 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 847 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 848 .icache_bsize = 32, 849 .dcache_bsize = 32, 850 .num_pmcs = 4, 851 .pmc_type = PPC_PMC_IBM, 852 .cpu_setup = __setup_cpu_750fx, 853 .machine_check = machine_check_generic, 854 .platform = "ppc750", 855 .oprofile_cpu_type = "ppc/750", 856 .oprofile_type = PPC_OPROFILE_G4, 857 }, 858 { /* 740/750 (L2CR bit need fixup for 740) */ 859 .pvr_mask = 0xffff0000, 860 .pvr_value = 0x00080000, 861 .cpu_name = "740/750", 862 .cpu_features = CPU_FTRS_740, 863 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 864 .mmu_features = MMU_FTR_HPTE_TABLE, 865 .icache_bsize = 32, 866 .dcache_bsize = 32, 867 .num_pmcs = 4, 868 .pmc_type = PPC_PMC_IBM, 869 .cpu_setup = __setup_cpu_750, 870 .machine_check = machine_check_generic, 871 .platform = "ppc750", 872 }, 873 { /* 7400 rev 1.1 ? (no TAU) */ 874 .pvr_mask = 0xffffffff, 875 .pvr_value = 0x000c1101, 876 .cpu_name = "7400 (1.1)", 877 .cpu_features = CPU_FTRS_7400_NOTAU, 878 .cpu_user_features = COMMON_USER | 879 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 880 .mmu_features = MMU_FTR_HPTE_TABLE, 881 .icache_bsize = 32, 882 .dcache_bsize = 32, 883 .num_pmcs = 4, 884 .pmc_type = PPC_PMC_G4, 885 .cpu_setup = __setup_cpu_7400, 886 .machine_check = machine_check_generic, 887 .platform = "ppc7400", 888 }, 889 { /* 7400 */ 890 .pvr_mask = 0xffff0000, 891 .pvr_value = 0x000c0000, 892 .cpu_name = "7400", 893 .cpu_features = CPU_FTRS_7400, 894 .cpu_user_features = COMMON_USER | 895 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 896 .mmu_features = MMU_FTR_HPTE_TABLE, 897 .icache_bsize = 32, 898 .dcache_bsize = 32, 899 .num_pmcs = 4, 900 .pmc_type = PPC_PMC_G4, 901 .cpu_setup = __setup_cpu_7400, 902 .machine_check = machine_check_generic, 903 .platform = "ppc7400", 904 }, 905 { /* 7410 */ 906 .pvr_mask = 0xffff0000, 907 .pvr_value = 0x800c0000, 908 .cpu_name = "7410", 909 .cpu_features = CPU_FTRS_7400, 910 .cpu_user_features = COMMON_USER | 911 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 912 .mmu_features = MMU_FTR_HPTE_TABLE, 913 .icache_bsize = 32, 914 .dcache_bsize = 32, 915 .num_pmcs = 4, 916 .pmc_type = PPC_PMC_G4, 917 .cpu_setup = __setup_cpu_7410, 918 .machine_check = machine_check_generic, 919 .platform = "ppc7400", 920 }, 921 { /* 7450 2.0 - no doze/nap */ 922 .pvr_mask = 0xffffffff, 923 .pvr_value = 0x80000200, 924 .cpu_name = "7450", 925 .cpu_features = CPU_FTRS_7450_20, 926 .cpu_user_features = COMMON_USER | 927 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 928 .mmu_features = MMU_FTR_HPTE_TABLE, 929 .icache_bsize = 32, 930 .dcache_bsize = 32, 931 .num_pmcs = 6, 932 .pmc_type = PPC_PMC_G4, 933 .cpu_setup = __setup_cpu_745x, 934 .oprofile_cpu_type = "ppc/7450", 935 .oprofile_type = PPC_OPROFILE_G4, 936 .machine_check = machine_check_generic, 937 .platform = "ppc7450", 938 }, 939 { /* 7450 2.1 */ 940 .pvr_mask = 0xffffffff, 941 .pvr_value = 0x80000201, 942 .cpu_name = "7450", 943 .cpu_features = CPU_FTRS_7450_21, 944 .cpu_user_features = COMMON_USER | 945 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 946 .mmu_features = MMU_FTR_HPTE_TABLE, 947 .icache_bsize = 32, 948 .dcache_bsize = 32, 949 .num_pmcs = 6, 950 .pmc_type = PPC_PMC_G4, 951 .cpu_setup = __setup_cpu_745x, 952 .oprofile_cpu_type = "ppc/7450", 953 .oprofile_type = PPC_OPROFILE_G4, 954 .machine_check = machine_check_generic, 955 .platform = "ppc7450", 956 }, 957 { /* 7450 2.3 and newer */ 958 .pvr_mask = 0xffff0000, 959 .pvr_value = 0x80000000, 960 .cpu_name = "7450", 961 .cpu_features = CPU_FTRS_7450_23, 962 .cpu_user_features = COMMON_USER | 963 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 964 .mmu_features = MMU_FTR_HPTE_TABLE, 965 .icache_bsize = 32, 966 .dcache_bsize = 32, 967 .num_pmcs = 6, 968 .pmc_type = PPC_PMC_G4, 969 .cpu_setup = __setup_cpu_745x, 970 .oprofile_cpu_type = "ppc/7450", 971 .oprofile_type = PPC_OPROFILE_G4, 972 .machine_check = machine_check_generic, 973 .platform = "ppc7450", 974 }, 975 { /* 7455 rev 1.x */ 976 .pvr_mask = 0xffffff00, 977 .pvr_value = 0x80010100, 978 .cpu_name = "7455", 979 .cpu_features = CPU_FTRS_7455_1, 980 .cpu_user_features = COMMON_USER | 981 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 982 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 983 .icache_bsize = 32, 984 .dcache_bsize = 32, 985 .num_pmcs = 6, 986 .pmc_type = PPC_PMC_G4, 987 .cpu_setup = __setup_cpu_745x, 988 .oprofile_cpu_type = "ppc/7450", 989 .oprofile_type = PPC_OPROFILE_G4, 990 .machine_check = machine_check_generic, 991 .platform = "ppc7450", 992 }, 993 { /* 7455 rev 2.0 */ 994 .pvr_mask = 0xffffffff, 995 .pvr_value = 0x80010200, 996 .cpu_name = "7455", 997 .cpu_features = CPU_FTRS_7455_20, 998 .cpu_user_features = COMMON_USER | 999 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1000 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1001 .icache_bsize = 32, 1002 .dcache_bsize = 32, 1003 .num_pmcs = 6, 1004 .pmc_type = PPC_PMC_G4, 1005 .cpu_setup = __setup_cpu_745x, 1006 .oprofile_cpu_type = "ppc/7450", 1007 .oprofile_type = PPC_OPROFILE_G4, 1008 .machine_check = machine_check_generic, 1009 .platform = "ppc7450", 1010 }, 1011 { /* 7455 others */ 1012 .pvr_mask = 0xffff0000, 1013 .pvr_value = 0x80010000, 1014 .cpu_name = "7455", 1015 .cpu_features = CPU_FTRS_7455, 1016 .cpu_user_features = COMMON_USER | 1017 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1018 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1019 .icache_bsize = 32, 1020 .dcache_bsize = 32, 1021 .num_pmcs = 6, 1022 .pmc_type = PPC_PMC_G4, 1023 .cpu_setup = __setup_cpu_745x, 1024 .oprofile_cpu_type = "ppc/7450", 1025 .oprofile_type = PPC_OPROFILE_G4, 1026 .machine_check = machine_check_generic, 1027 .platform = "ppc7450", 1028 }, 1029 { /* 7447/7457 Rev 1.0 */ 1030 .pvr_mask = 0xffffffff, 1031 .pvr_value = 0x80020100, 1032 .cpu_name = "7447/7457", 1033 .cpu_features = CPU_FTRS_7447_10, 1034 .cpu_user_features = COMMON_USER | 1035 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1036 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1037 .icache_bsize = 32, 1038 .dcache_bsize = 32, 1039 .num_pmcs = 6, 1040 .pmc_type = PPC_PMC_G4, 1041 .cpu_setup = __setup_cpu_745x, 1042 .oprofile_cpu_type = "ppc/7450", 1043 .oprofile_type = PPC_OPROFILE_G4, 1044 .machine_check = machine_check_generic, 1045 .platform = "ppc7450", 1046 }, 1047 { /* 7447/7457 Rev 1.1 */ 1048 .pvr_mask = 0xffffffff, 1049 .pvr_value = 0x80020101, 1050 .cpu_name = "7447/7457", 1051 .cpu_features = CPU_FTRS_7447_10, 1052 .cpu_user_features = COMMON_USER | 1053 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1054 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1055 .icache_bsize = 32, 1056 .dcache_bsize = 32, 1057 .num_pmcs = 6, 1058 .pmc_type = PPC_PMC_G4, 1059 .cpu_setup = __setup_cpu_745x, 1060 .oprofile_cpu_type = "ppc/7450", 1061 .oprofile_type = PPC_OPROFILE_G4, 1062 .machine_check = machine_check_generic, 1063 .platform = "ppc7450", 1064 }, 1065 { /* 7447/7457 Rev 1.2 and later */ 1066 .pvr_mask = 0xffff0000, 1067 .pvr_value = 0x80020000, 1068 .cpu_name = "7447/7457", 1069 .cpu_features = CPU_FTRS_7447, 1070 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1071 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1072 .icache_bsize = 32, 1073 .dcache_bsize = 32, 1074 .num_pmcs = 6, 1075 .pmc_type = PPC_PMC_G4, 1076 .cpu_setup = __setup_cpu_745x, 1077 .oprofile_cpu_type = "ppc/7450", 1078 .oprofile_type = PPC_OPROFILE_G4, 1079 .machine_check = machine_check_generic, 1080 .platform = "ppc7450", 1081 }, 1082 { /* 7447A */ 1083 .pvr_mask = 0xffff0000, 1084 .pvr_value = 0x80030000, 1085 .cpu_name = "7447A", 1086 .cpu_features = CPU_FTRS_7447A, 1087 .cpu_user_features = COMMON_USER | 1088 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1089 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1090 .icache_bsize = 32, 1091 .dcache_bsize = 32, 1092 .num_pmcs = 6, 1093 .pmc_type = PPC_PMC_G4, 1094 .cpu_setup = __setup_cpu_745x, 1095 .oprofile_cpu_type = "ppc/7450", 1096 .oprofile_type = PPC_OPROFILE_G4, 1097 .machine_check = machine_check_generic, 1098 .platform = "ppc7450", 1099 }, 1100 { /* 7448 */ 1101 .pvr_mask = 0xffff0000, 1102 .pvr_value = 0x80040000, 1103 .cpu_name = "7448", 1104 .cpu_features = CPU_FTRS_7448, 1105 .cpu_user_features = COMMON_USER | 1106 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1107 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1108 .icache_bsize = 32, 1109 .dcache_bsize = 32, 1110 .num_pmcs = 6, 1111 .pmc_type = PPC_PMC_G4, 1112 .cpu_setup = __setup_cpu_745x, 1113 .oprofile_cpu_type = "ppc/7450", 1114 .oprofile_type = PPC_OPROFILE_G4, 1115 .machine_check = machine_check_generic, 1116 .platform = "ppc7450", 1117 }, 1118 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1119 .pvr_mask = 0x7fff0000, 1120 .pvr_value = 0x00810000, 1121 .cpu_name = "82xx", 1122 .cpu_features = CPU_FTRS_82XX, 1123 .cpu_user_features = COMMON_USER, 1124 .mmu_features = 0, 1125 .icache_bsize = 32, 1126 .dcache_bsize = 32, 1127 .cpu_setup = __setup_cpu_603, 1128 .machine_check = machine_check_generic, 1129 .platform = "ppc603", 1130 }, 1131 { /* All G2_LE (603e core, plus some) have the same pvr */ 1132 .pvr_mask = 0x7fff0000, 1133 .pvr_value = 0x00820000, 1134 .cpu_name = "G2_LE", 1135 .cpu_features = CPU_FTRS_G2_LE, 1136 .cpu_user_features = COMMON_USER, 1137 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1138 .icache_bsize = 32, 1139 .dcache_bsize = 32, 1140 .cpu_setup = __setup_cpu_603, 1141 .machine_check = machine_check_generic, 1142 .platform = "ppc603", 1143 }, 1144 { /* e300c1 (a 603e core, plus some) on 83xx */ 1145 .pvr_mask = 0x7fff0000, 1146 .pvr_value = 0x00830000, 1147 .cpu_name = "e300c1", 1148 .cpu_features = CPU_FTRS_E300, 1149 .cpu_user_features = COMMON_USER, 1150 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1151 .icache_bsize = 32, 1152 .dcache_bsize = 32, 1153 .cpu_setup = __setup_cpu_603, 1154 .machine_check = machine_check_generic, 1155 .platform = "ppc603", 1156 }, 1157 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1158 .pvr_mask = 0x7fff0000, 1159 .pvr_value = 0x00840000, 1160 .cpu_name = "e300c2", 1161 .cpu_features = CPU_FTRS_E300C2, 1162 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1163 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1164 MMU_FTR_NEED_DTLB_SW_LRU, 1165 .icache_bsize = 32, 1166 .dcache_bsize = 32, 1167 .cpu_setup = __setup_cpu_603, 1168 .machine_check = machine_check_generic, 1169 .platform = "ppc603", 1170 }, 1171 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1172 .pvr_mask = 0x7fff0000, 1173 .pvr_value = 0x00850000, 1174 .cpu_name = "e300c3", 1175 .cpu_features = CPU_FTRS_E300, 1176 .cpu_user_features = COMMON_USER, 1177 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1178 MMU_FTR_NEED_DTLB_SW_LRU, 1179 .icache_bsize = 32, 1180 .dcache_bsize = 32, 1181 .cpu_setup = __setup_cpu_603, 1182 .machine_check = machine_check_generic, 1183 .num_pmcs = 4, 1184 .oprofile_cpu_type = "ppc/e300", 1185 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1186 .platform = "ppc603", 1187 }, 1188 { /* e300c4 (e300c1, plus one IU) */ 1189 .pvr_mask = 0x7fff0000, 1190 .pvr_value = 0x00860000, 1191 .cpu_name = "e300c4", 1192 .cpu_features = CPU_FTRS_E300, 1193 .cpu_user_features = COMMON_USER, 1194 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1195 MMU_FTR_NEED_DTLB_SW_LRU, 1196 .icache_bsize = 32, 1197 .dcache_bsize = 32, 1198 .cpu_setup = __setup_cpu_603, 1199 .machine_check = machine_check_generic, 1200 .num_pmcs = 4, 1201 .oprofile_cpu_type = "ppc/e300", 1202 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1203 .platform = "ppc603", 1204 }, 1205 { /* default match, we assume split I/D cache & TB (non-601)... */ 1206 .pvr_mask = 0x00000000, 1207 .pvr_value = 0x00000000, 1208 .cpu_name = "(generic PPC)", 1209 .cpu_features = CPU_FTRS_CLASSIC32, 1210 .cpu_user_features = COMMON_USER, 1211 .mmu_features = MMU_FTR_HPTE_TABLE, 1212 .icache_bsize = 32, 1213 .dcache_bsize = 32, 1214 .machine_check = machine_check_generic, 1215 .platform = "ppc603", 1216 }, 1217 #endif /* CONFIG_PPC_BOOK3S_32 */ 1218 #ifdef CONFIG_PPC_8xx 1219 { /* 8xx */ 1220 .pvr_mask = 0xffff0000, 1221 .pvr_value = PVR_8xx, 1222 .cpu_name = "8xx", 1223 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1224 * if the 8xx code is there.... */ 1225 .cpu_features = CPU_FTRS_8XX, 1226 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1227 .mmu_features = MMU_FTR_TYPE_8xx, 1228 .icache_bsize = 16, 1229 .dcache_bsize = 16, 1230 .machine_check = machine_check_8xx, 1231 .platform = "ppc823", 1232 }, 1233 #endif /* CONFIG_PPC_8xx */ 1234 #ifdef CONFIG_40x 1235 { /* 403GC */ 1236 .pvr_mask = 0xffffff00, 1237 .pvr_value = 0x00200200, 1238 .cpu_name = "403GC", 1239 .cpu_features = CPU_FTRS_40X, 1240 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1241 .mmu_features = MMU_FTR_TYPE_40x, 1242 .icache_bsize = 16, 1243 .dcache_bsize = 16, 1244 .machine_check = machine_check_4xx, 1245 .platform = "ppc403", 1246 }, 1247 { /* 403GCX */ 1248 .pvr_mask = 0xffffff00, 1249 .pvr_value = 0x00201400, 1250 .cpu_name = "403GCX", 1251 .cpu_features = CPU_FTRS_40X, 1252 .cpu_user_features = PPC_FEATURE_32 | 1253 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1254 .mmu_features = MMU_FTR_TYPE_40x, 1255 .icache_bsize = 16, 1256 .dcache_bsize = 16, 1257 .machine_check = machine_check_4xx, 1258 .platform = "ppc403", 1259 }, 1260 { /* 403G ?? */ 1261 .pvr_mask = 0xffff0000, 1262 .pvr_value = 0x00200000, 1263 .cpu_name = "403G ??", 1264 .cpu_features = CPU_FTRS_40X, 1265 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1266 .mmu_features = MMU_FTR_TYPE_40x, 1267 .icache_bsize = 16, 1268 .dcache_bsize = 16, 1269 .machine_check = machine_check_4xx, 1270 .platform = "ppc403", 1271 }, 1272 { /* 405GP */ 1273 .pvr_mask = 0xffff0000, 1274 .pvr_value = 0x40110000, 1275 .cpu_name = "405GP", 1276 .cpu_features = CPU_FTRS_40X, 1277 .cpu_user_features = PPC_FEATURE_32 | 1278 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1279 .mmu_features = MMU_FTR_TYPE_40x, 1280 .icache_bsize = 32, 1281 .dcache_bsize = 32, 1282 .machine_check = machine_check_4xx, 1283 .platform = "ppc405", 1284 }, 1285 { /* STB 03xxx */ 1286 .pvr_mask = 0xffff0000, 1287 .pvr_value = 0x40130000, 1288 .cpu_name = "STB03xxx", 1289 .cpu_features = CPU_FTRS_40X, 1290 .cpu_user_features = PPC_FEATURE_32 | 1291 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1292 .mmu_features = MMU_FTR_TYPE_40x, 1293 .icache_bsize = 32, 1294 .dcache_bsize = 32, 1295 .machine_check = machine_check_4xx, 1296 .platform = "ppc405", 1297 }, 1298 { /* STB 04xxx */ 1299 .pvr_mask = 0xffff0000, 1300 .pvr_value = 0x41810000, 1301 .cpu_name = "STB04xxx", 1302 .cpu_features = CPU_FTRS_40X, 1303 .cpu_user_features = PPC_FEATURE_32 | 1304 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1305 .mmu_features = MMU_FTR_TYPE_40x, 1306 .icache_bsize = 32, 1307 .dcache_bsize = 32, 1308 .machine_check = machine_check_4xx, 1309 .platform = "ppc405", 1310 }, 1311 { /* NP405L */ 1312 .pvr_mask = 0xffff0000, 1313 .pvr_value = 0x41610000, 1314 .cpu_name = "NP405L", 1315 .cpu_features = CPU_FTRS_40X, 1316 .cpu_user_features = PPC_FEATURE_32 | 1317 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1318 .mmu_features = MMU_FTR_TYPE_40x, 1319 .icache_bsize = 32, 1320 .dcache_bsize = 32, 1321 .machine_check = machine_check_4xx, 1322 .platform = "ppc405", 1323 }, 1324 { /* NP4GS3 */ 1325 .pvr_mask = 0xffff0000, 1326 .pvr_value = 0x40B10000, 1327 .cpu_name = "NP4GS3", 1328 .cpu_features = CPU_FTRS_40X, 1329 .cpu_user_features = PPC_FEATURE_32 | 1330 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1331 .mmu_features = MMU_FTR_TYPE_40x, 1332 .icache_bsize = 32, 1333 .dcache_bsize = 32, 1334 .machine_check = machine_check_4xx, 1335 .platform = "ppc405", 1336 }, 1337 { /* NP405H */ 1338 .pvr_mask = 0xffff0000, 1339 .pvr_value = 0x41410000, 1340 .cpu_name = "NP405H", 1341 .cpu_features = CPU_FTRS_40X, 1342 .cpu_user_features = PPC_FEATURE_32 | 1343 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1344 .mmu_features = MMU_FTR_TYPE_40x, 1345 .icache_bsize = 32, 1346 .dcache_bsize = 32, 1347 .machine_check = machine_check_4xx, 1348 .platform = "ppc405", 1349 }, 1350 { /* 405GPr */ 1351 .pvr_mask = 0xffff0000, 1352 .pvr_value = 0x50910000, 1353 .cpu_name = "405GPr", 1354 .cpu_features = CPU_FTRS_40X, 1355 .cpu_user_features = PPC_FEATURE_32 | 1356 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1357 .mmu_features = MMU_FTR_TYPE_40x, 1358 .icache_bsize = 32, 1359 .dcache_bsize = 32, 1360 .machine_check = machine_check_4xx, 1361 .platform = "ppc405", 1362 }, 1363 { /* STBx25xx */ 1364 .pvr_mask = 0xffff0000, 1365 .pvr_value = 0x51510000, 1366 .cpu_name = "STBx25xx", 1367 .cpu_features = CPU_FTRS_40X, 1368 .cpu_user_features = PPC_FEATURE_32 | 1369 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1370 .mmu_features = MMU_FTR_TYPE_40x, 1371 .icache_bsize = 32, 1372 .dcache_bsize = 32, 1373 .machine_check = machine_check_4xx, 1374 .platform = "ppc405", 1375 }, 1376 { /* 405LP */ 1377 .pvr_mask = 0xffff0000, 1378 .pvr_value = 0x41F10000, 1379 .cpu_name = "405LP", 1380 .cpu_features = CPU_FTRS_40X, 1381 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1382 .mmu_features = MMU_FTR_TYPE_40x, 1383 .icache_bsize = 32, 1384 .dcache_bsize = 32, 1385 .machine_check = machine_check_4xx, 1386 .platform = "ppc405", 1387 }, 1388 { /* Xilinx Virtex-II Pro */ 1389 .pvr_mask = 0xfffff000, 1390 .pvr_value = 0x20010000, 1391 .cpu_name = "Virtex-II Pro", 1392 .cpu_features = CPU_FTRS_40X, 1393 .cpu_user_features = PPC_FEATURE_32 | 1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1395 .mmu_features = MMU_FTR_TYPE_40x, 1396 .icache_bsize = 32, 1397 .dcache_bsize = 32, 1398 .machine_check = machine_check_4xx, 1399 .platform = "ppc405", 1400 }, 1401 { /* Xilinx Virtex-4 FX */ 1402 .pvr_mask = 0xfffff000, 1403 .pvr_value = 0x20011000, 1404 .cpu_name = "Virtex-4 FX", 1405 .cpu_features = CPU_FTRS_40X, 1406 .cpu_user_features = PPC_FEATURE_32 | 1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1408 .mmu_features = MMU_FTR_TYPE_40x, 1409 .icache_bsize = 32, 1410 .dcache_bsize = 32, 1411 .machine_check = machine_check_4xx, 1412 .platform = "ppc405", 1413 }, 1414 { /* 405EP */ 1415 .pvr_mask = 0xffff0000, 1416 .pvr_value = 0x51210000, 1417 .cpu_name = "405EP", 1418 .cpu_features = CPU_FTRS_40X, 1419 .cpu_user_features = PPC_FEATURE_32 | 1420 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1421 .mmu_features = MMU_FTR_TYPE_40x, 1422 .icache_bsize = 32, 1423 .dcache_bsize = 32, 1424 .machine_check = machine_check_4xx, 1425 .platform = "ppc405", 1426 }, 1427 { /* 405EX Rev. A/B with Security */ 1428 .pvr_mask = 0xffff000f, 1429 .pvr_value = 0x12910007, 1430 .cpu_name = "405EX Rev. A/B", 1431 .cpu_features = CPU_FTRS_40X, 1432 .cpu_user_features = PPC_FEATURE_32 | 1433 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1434 .mmu_features = MMU_FTR_TYPE_40x, 1435 .icache_bsize = 32, 1436 .dcache_bsize = 32, 1437 .machine_check = machine_check_4xx, 1438 .platform = "ppc405", 1439 }, 1440 { /* 405EX Rev. C without Security */ 1441 .pvr_mask = 0xffff000f, 1442 .pvr_value = 0x1291000d, 1443 .cpu_name = "405EX Rev. C", 1444 .cpu_features = CPU_FTRS_40X, 1445 .cpu_user_features = PPC_FEATURE_32 | 1446 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1447 .mmu_features = MMU_FTR_TYPE_40x, 1448 .icache_bsize = 32, 1449 .dcache_bsize = 32, 1450 .machine_check = machine_check_4xx, 1451 .platform = "ppc405", 1452 }, 1453 { /* 405EX Rev. C with Security */ 1454 .pvr_mask = 0xffff000f, 1455 .pvr_value = 0x1291000f, 1456 .cpu_name = "405EX Rev. C", 1457 .cpu_features = CPU_FTRS_40X, 1458 .cpu_user_features = PPC_FEATURE_32 | 1459 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1460 .mmu_features = MMU_FTR_TYPE_40x, 1461 .icache_bsize = 32, 1462 .dcache_bsize = 32, 1463 .machine_check = machine_check_4xx, 1464 .platform = "ppc405", 1465 }, 1466 { /* 405EX Rev. D without Security */ 1467 .pvr_mask = 0xffff000f, 1468 .pvr_value = 0x12910003, 1469 .cpu_name = "405EX Rev. D", 1470 .cpu_features = CPU_FTRS_40X, 1471 .cpu_user_features = PPC_FEATURE_32 | 1472 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1473 .mmu_features = MMU_FTR_TYPE_40x, 1474 .icache_bsize = 32, 1475 .dcache_bsize = 32, 1476 .machine_check = machine_check_4xx, 1477 .platform = "ppc405", 1478 }, 1479 { /* 405EX Rev. D with Security */ 1480 .pvr_mask = 0xffff000f, 1481 .pvr_value = 0x12910005, 1482 .cpu_name = "405EX Rev. D", 1483 .cpu_features = CPU_FTRS_40X, 1484 .cpu_user_features = PPC_FEATURE_32 | 1485 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1486 .mmu_features = MMU_FTR_TYPE_40x, 1487 .icache_bsize = 32, 1488 .dcache_bsize = 32, 1489 .machine_check = machine_check_4xx, 1490 .platform = "ppc405", 1491 }, 1492 { /* 405EXr Rev. A/B without Security */ 1493 .pvr_mask = 0xffff000f, 1494 .pvr_value = 0x12910001, 1495 .cpu_name = "405EXr Rev. A/B", 1496 .cpu_features = CPU_FTRS_40X, 1497 .cpu_user_features = PPC_FEATURE_32 | 1498 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1499 .mmu_features = MMU_FTR_TYPE_40x, 1500 .icache_bsize = 32, 1501 .dcache_bsize = 32, 1502 .machine_check = machine_check_4xx, 1503 .platform = "ppc405", 1504 }, 1505 { /* 405EXr Rev. C without Security */ 1506 .pvr_mask = 0xffff000f, 1507 .pvr_value = 0x12910009, 1508 .cpu_name = "405EXr Rev. C", 1509 .cpu_features = CPU_FTRS_40X, 1510 .cpu_user_features = PPC_FEATURE_32 | 1511 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1512 .mmu_features = MMU_FTR_TYPE_40x, 1513 .icache_bsize = 32, 1514 .dcache_bsize = 32, 1515 .machine_check = machine_check_4xx, 1516 .platform = "ppc405", 1517 }, 1518 { /* 405EXr Rev. C with Security */ 1519 .pvr_mask = 0xffff000f, 1520 .pvr_value = 0x1291000b, 1521 .cpu_name = "405EXr Rev. C", 1522 .cpu_features = CPU_FTRS_40X, 1523 .cpu_user_features = PPC_FEATURE_32 | 1524 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1525 .mmu_features = MMU_FTR_TYPE_40x, 1526 .icache_bsize = 32, 1527 .dcache_bsize = 32, 1528 .machine_check = machine_check_4xx, 1529 .platform = "ppc405", 1530 }, 1531 { /* 405EXr Rev. D without Security */ 1532 .pvr_mask = 0xffff000f, 1533 .pvr_value = 0x12910000, 1534 .cpu_name = "405EXr Rev. D", 1535 .cpu_features = CPU_FTRS_40X, 1536 .cpu_user_features = PPC_FEATURE_32 | 1537 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1538 .mmu_features = MMU_FTR_TYPE_40x, 1539 .icache_bsize = 32, 1540 .dcache_bsize = 32, 1541 .machine_check = machine_check_4xx, 1542 .platform = "ppc405", 1543 }, 1544 { /* 405EXr Rev. D with Security */ 1545 .pvr_mask = 0xffff000f, 1546 .pvr_value = 0x12910002, 1547 .cpu_name = "405EXr Rev. D", 1548 .cpu_features = CPU_FTRS_40X, 1549 .cpu_user_features = PPC_FEATURE_32 | 1550 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1551 .mmu_features = MMU_FTR_TYPE_40x, 1552 .icache_bsize = 32, 1553 .dcache_bsize = 32, 1554 .machine_check = machine_check_4xx, 1555 .platform = "ppc405", 1556 }, 1557 { 1558 /* 405EZ */ 1559 .pvr_mask = 0xffff0000, 1560 .pvr_value = 0x41510000, 1561 .cpu_name = "405EZ", 1562 .cpu_features = CPU_FTRS_40X, 1563 .cpu_user_features = PPC_FEATURE_32 | 1564 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1565 .mmu_features = MMU_FTR_TYPE_40x, 1566 .icache_bsize = 32, 1567 .dcache_bsize = 32, 1568 .machine_check = machine_check_4xx, 1569 .platform = "ppc405", 1570 }, 1571 { /* APM8018X */ 1572 .pvr_mask = 0xffff0000, 1573 .pvr_value = 0x7ff11432, 1574 .cpu_name = "APM8018X", 1575 .cpu_features = CPU_FTRS_40X, 1576 .cpu_user_features = PPC_FEATURE_32 | 1577 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1578 .mmu_features = MMU_FTR_TYPE_40x, 1579 .icache_bsize = 32, 1580 .dcache_bsize = 32, 1581 .machine_check = machine_check_4xx, 1582 .platform = "ppc405", 1583 }, 1584 { /* default match */ 1585 .pvr_mask = 0x00000000, 1586 .pvr_value = 0x00000000, 1587 .cpu_name = "(generic 40x PPC)", 1588 .cpu_features = CPU_FTRS_40X, 1589 .cpu_user_features = PPC_FEATURE_32 | 1590 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1591 .mmu_features = MMU_FTR_TYPE_40x, 1592 .icache_bsize = 32, 1593 .dcache_bsize = 32, 1594 .machine_check = machine_check_4xx, 1595 .platform = "ppc405", 1596 } 1597 1598 #endif /* CONFIG_40x */ 1599 #ifdef CONFIG_44x 1600 { 1601 .pvr_mask = 0xf0000fff, 1602 .pvr_value = 0x40000850, 1603 .cpu_name = "440GR Rev. A", 1604 .cpu_features = CPU_FTRS_44X, 1605 .cpu_user_features = COMMON_USER_BOOKE, 1606 .mmu_features = MMU_FTR_TYPE_44x, 1607 .icache_bsize = 32, 1608 .dcache_bsize = 32, 1609 .machine_check = machine_check_4xx, 1610 .platform = "ppc440", 1611 }, 1612 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1613 .pvr_mask = 0xf0000fff, 1614 .pvr_value = 0x40000858, 1615 .cpu_name = "440EP Rev. A", 1616 .cpu_features = CPU_FTRS_44X, 1617 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1618 .mmu_features = MMU_FTR_TYPE_44x, 1619 .icache_bsize = 32, 1620 .dcache_bsize = 32, 1621 .cpu_setup = __setup_cpu_440ep, 1622 .machine_check = machine_check_4xx, 1623 .platform = "ppc440", 1624 }, 1625 { 1626 .pvr_mask = 0xf0000fff, 1627 .pvr_value = 0x400008d3, 1628 .cpu_name = "440GR Rev. B", 1629 .cpu_features = CPU_FTRS_44X, 1630 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1631 .mmu_features = MMU_FTR_TYPE_44x, 1632 .icache_bsize = 32, 1633 .dcache_bsize = 32, 1634 .machine_check = machine_check_4xx, 1635 .platform = "ppc440", 1636 }, 1637 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1638 .pvr_mask = 0xf0000ff7, 1639 .pvr_value = 0x400008d4, 1640 .cpu_name = "440EP Rev. C", 1641 .cpu_features = CPU_FTRS_44X, 1642 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1643 .mmu_features = MMU_FTR_TYPE_44x, 1644 .icache_bsize = 32, 1645 .dcache_bsize = 32, 1646 .cpu_setup = __setup_cpu_440ep, 1647 .machine_check = machine_check_4xx, 1648 .platform = "ppc440", 1649 }, 1650 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1651 .pvr_mask = 0xf0000fff, 1652 .pvr_value = 0x400008db, 1653 .cpu_name = "440EP Rev. B", 1654 .cpu_features = CPU_FTRS_44X, 1655 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1656 .mmu_features = MMU_FTR_TYPE_44x, 1657 .icache_bsize = 32, 1658 .dcache_bsize = 32, 1659 .cpu_setup = __setup_cpu_440ep, 1660 .machine_check = machine_check_4xx, 1661 .platform = "ppc440", 1662 }, 1663 { /* 440GRX */ 1664 .pvr_mask = 0xf0000ffb, 1665 .pvr_value = 0x200008D0, 1666 .cpu_name = "440GRX", 1667 .cpu_features = CPU_FTRS_44X, 1668 .cpu_user_features = COMMON_USER_BOOKE, 1669 .mmu_features = MMU_FTR_TYPE_44x, 1670 .icache_bsize = 32, 1671 .dcache_bsize = 32, 1672 .cpu_setup = __setup_cpu_440grx, 1673 .machine_check = machine_check_440A, 1674 .platform = "ppc440", 1675 }, 1676 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1677 .pvr_mask = 0xf0000ffb, 1678 .pvr_value = 0x200008D8, 1679 .cpu_name = "440EPX", 1680 .cpu_features = CPU_FTRS_44X, 1681 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1682 .mmu_features = MMU_FTR_TYPE_44x, 1683 .icache_bsize = 32, 1684 .dcache_bsize = 32, 1685 .cpu_setup = __setup_cpu_440epx, 1686 .machine_check = machine_check_440A, 1687 .platform = "ppc440", 1688 }, 1689 { /* 440GP Rev. B */ 1690 .pvr_mask = 0xf0000fff, 1691 .pvr_value = 0x40000440, 1692 .cpu_name = "440GP Rev. B", 1693 .cpu_features = CPU_FTRS_44X, 1694 .cpu_user_features = COMMON_USER_BOOKE, 1695 .mmu_features = MMU_FTR_TYPE_44x, 1696 .icache_bsize = 32, 1697 .dcache_bsize = 32, 1698 .machine_check = machine_check_4xx, 1699 .platform = "ppc440gp", 1700 }, 1701 { /* 440GP Rev. C */ 1702 .pvr_mask = 0xf0000fff, 1703 .pvr_value = 0x40000481, 1704 .cpu_name = "440GP Rev. C", 1705 .cpu_features = CPU_FTRS_44X, 1706 .cpu_user_features = COMMON_USER_BOOKE, 1707 .mmu_features = MMU_FTR_TYPE_44x, 1708 .icache_bsize = 32, 1709 .dcache_bsize = 32, 1710 .machine_check = machine_check_4xx, 1711 .platform = "ppc440gp", 1712 }, 1713 { /* 440GX Rev. A */ 1714 .pvr_mask = 0xf0000fff, 1715 .pvr_value = 0x50000850, 1716 .cpu_name = "440GX Rev. A", 1717 .cpu_features = CPU_FTRS_44X, 1718 .cpu_user_features = COMMON_USER_BOOKE, 1719 .mmu_features = MMU_FTR_TYPE_44x, 1720 .icache_bsize = 32, 1721 .dcache_bsize = 32, 1722 .cpu_setup = __setup_cpu_440gx, 1723 .machine_check = machine_check_440A, 1724 .platform = "ppc440", 1725 }, 1726 { /* 440GX Rev. B */ 1727 .pvr_mask = 0xf0000fff, 1728 .pvr_value = 0x50000851, 1729 .cpu_name = "440GX Rev. B", 1730 .cpu_features = CPU_FTRS_44X, 1731 .cpu_user_features = COMMON_USER_BOOKE, 1732 .mmu_features = MMU_FTR_TYPE_44x, 1733 .icache_bsize = 32, 1734 .dcache_bsize = 32, 1735 .cpu_setup = __setup_cpu_440gx, 1736 .machine_check = machine_check_440A, 1737 .platform = "ppc440", 1738 }, 1739 { /* 440GX Rev. C */ 1740 .pvr_mask = 0xf0000fff, 1741 .pvr_value = 0x50000892, 1742 .cpu_name = "440GX Rev. C", 1743 .cpu_features = CPU_FTRS_44X, 1744 .cpu_user_features = COMMON_USER_BOOKE, 1745 .mmu_features = MMU_FTR_TYPE_44x, 1746 .icache_bsize = 32, 1747 .dcache_bsize = 32, 1748 .cpu_setup = __setup_cpu_440gx, 1749 .machine_check = machine_check_440A, 1750 .platform = "ppc440", 1751 }, 1752 { /* 440GX Rev. F */ 1753 .pvr_mask = 0xf0000fff, 1754 .pvr_value = 0x50000894, 1755 .cpu_name = "440GX Rev. F", 1756 .cpu_features = CPU_FTRS_44X, 1757 .cpu_user_features = COMMON_USER_BOOKE, 1758 .mmu_features = MMU_FTR_TYPE_44x, 1759 .icache_bsize = 32, 1760 .dcache_bsize = 32, 1761 .cpu_setup = __setup_cpu_440gx, 1762 .machine_check = machine_check_440A, 1763 .platform = "ppc440", 1764 }, 1765 { /* 440SP Rev. A */ 1766 .pvr_mask = 0xfff00fff, 1767 .pvr_value = 0x53200891, 1768 .cpu_name = "440SP Rev. A", 1769 .cpu_features = CPU_FTRS_44X, 1770 .cpu_user_features = COMMON_USER_BOOKE, 1771 .mmu_features = MMU_FTR_TYPE_44x, 1772 .icache_bsize = 32, 1773 .dcache_bsize = 32, 1774 .machine_check = machine_check_4xx, 1775 .platform = "ppc440", 1776 }, 1777 { /* 440SPe Rev. A */ 1778 .pvr_mask = 0xfff00fff, 1779 .pvr_value = 0x53400890, 1780 .cpu_name = "440SPe Rev. A", 1781 .cpu_features = CPU_FTRS_44X, 1782 .cpu_user_features = COMMON_USER_BOOKE, 1783 .mmu_features = MMU_FTR_TYPE_44x, 1784 .icache_bsize = 32, 1785 .dcache_bsize = 32, 1786 .cpu_setup = __setup_cpu_440spe, 1787 .machine_check = machine_check_440A, 1788 .platform = "ppc440", 1789 }, 1790 { /* 440SPe Rev. B */ 1791 .pvr_mask = 0xfff00fff, 1792 .pvr_value = 0x53400891, 1793 .cpu_name = "440SPe Rev. B", 1794 .cpu_features = CPU_FTRS_44X, 1795 .cpu_user_features = COMMON_USER_BOOKE, 1796 .mmu_features = MMU_FTR_TYPE_44x, 1797 .icache_bsize = 32, 1798 .dcache_bsize = 32, 1799 .cpu_setup = __setup_cpu_440spe, 1800 .machine_check = machine_check_440A, 1801 .platform = "ppc440", 1802 }, 1803 { /* 440 in Xilinx Virtex-5 FXT */ 1804 .pvr_mask = 0xfffffff0, 1805 .pvr_value = 0x7ff21910, 1806 .cpu_name = "440 in Virtex-5 FXT", 1807 .cpu_features = CPU_FTRS_44X, 1808 .cpu_user_features = COMMON_USER_BOOKE, 1809 .mmu_features = MMU_FTR_TYPE_44x, 1810 .icache_bsize = 32, 1811 .dcache_bsize = 32, 1812 .cpu_setup = __setup_cpu_440x5, 1813 .machine_check = machine_check_440A, 1814 .platform = "ppc440", 1815 }, 1816 { /* 460EX */ 1817 .pvr_mask = 0xffff0006, 1818 .pvr_value = 0x13020002, 1819 .cpu_name = "460EX", 1820 .cpu_features = CPU_FTRS_440x6, 1821 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1822 .mmu_features = MMU_FTR_TYPE_44x, 1823 .icache_bsize = 32, 1824 .dcache_bsize = 32, 1825 .cpu_setup = __setup_cpu_460ex, 1826 .machine_check = machine_check_440A, 1827 .platform = "ppc440", 1828 }, 1829 { /* 460EX Rev B */ 1830 .pvr_mask = 0xffff0007, 1831 .pvr_value = 0x13020004, 1832 .cpu_name = "460EX Rev. B", 1833 .cpu_features = CPU_FTRS_440x6, 1834 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1835 .mmu_features = MMU_FTR_TYPE_44x, 1836 .icache_bsize = 32, 1837 .dcache_bsize = 32, 1838 .cpu_setup = __setup_cpu_460ex, 1839 .machine_check = machine_check_440A, 1840 .platform = "ppc440", 1841 }, 1842 { /* 460GT */ 1843 .pvr_mask = 0xffff0006, 1844 .pvr_value = 0x13020000, 1845 .cpu_name = "460GT", 1846 .cpu_features = CPU_FTRS_440x6, 1847 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1848 .mmu_features = MMU_FTR_TYPE_44x, 1849 .icache_bsize = 32, 1850 .dcache_bsize = 32, 1851 .cpu_setup = __setup_cpu_460gt, 1852 .machine_check = machine_check_440A, 1853 .platform = "ppc440", 1854 }, 1855 { /* 460GT Rev B */ 1856 .pvr_mask = 0xffff0007, 1857 .pvr_value = 0x13020005, 1858 .cpu_name = "460GT Rev. B", 1859 .cpu_features = CPU_FTRS_440x6, 1860 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1861 .mmu_features = MMU_FTR_TYPE_44x, 1862 .icache_bsize = 32, 1863 .dcache_bsize = 32, 1864 .cpu_setup = __setup_cpu_460gt, 1865 .machine_check = machine_check_440A, 1866 .platform = "ppc440", 1867 }, 1868 { /* 460SX */ 1869 .pvr_mask = 0xffffff00, 1870 .pvr_value = 0x13541800, 1871 .cpu_name = "460SX", 1872 .cpu_features = CPU_FTRS_44X, 1873 .cpu_user_features = COMMON_USER_BOOKE, 1874 .mmu_features = MMU_FTR_TYPE_44x, 1875 .icache_bsize = 32, 1876 .dcache_bsize = 32, 1877 .cpu_setup = __setup_cpu_460sx, 1878 .machine_check = machine_check_440A, 1879 .platform = "ppc440", 1880 }, 1881 { /* 464 in APM821xx */ 1882 .pvr_mask = 0xfffffff0, 1883 .pvr_value = 0x12C41C80, 1884 .cpu_name = "APM821XX", 1885 .cpu_features = CPU_FTRS_44X, 1886 .cpu_user_features = COMMON_USER_BOOKE | 1887 PPC_FEATURE_HAS_FPU, 1888 .mmu_features = MMU_FTR_TYPE_44x, 1889 .icache_bsize = 32, 1890 .dcache_bsize = 32, 1891 .cpu_setup = __setup_cpu_apm821xx, 1892 .machine_check = machine_check_440A, 1893 .platform = "ppc440", 1894 }, 1895 #ifdef CONFIG_PPC_47x 1896 { /* 476 DD2 core */ 1897 .pvr_mask = 0xffffffff, 1898 .pvr_value = 0x11a52080, 1899 .cpu_name = "476", 1900 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1901 .cpu_user_features = COMMON_USER_BOOKE | 1902 PPC_FEATURE_HAS_FPU, 1903 .mmu_features = MMU_FTR_TYPE_47x | 1904 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1905 .icache_bsize = 32, 1906 .dcache_bsize = 128, 1907 .machine_check = machine_check_47x, 1908 .platform = "ppc470", 1909 }, 1910 { /* 476fpe */ 1911 .pvr_mask = 0xffff0000, 1912 .pvr_value = 0x7ff50000, 1913 .cpu_name = "476fpe", 1914 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1915 .cpu_user_features = COMMON_USER_BOOKE | 1916 PPC_FEATURE_HAS_FPU, 1917 .mmu_features = MMU_FTR_TYPE_47x | 1918 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1919 .icache_bsize = 32, 1920 .dcache_bsize = 128, 1921 .machine_check = machine_check_47x, 1922 .platform = "ppc470", 1923 }, 1924 { /* 476 iss */ 1925 .pvr_mask = 0xffff0000, 1926 .pvr_value = 0x00050000, 1927 .cpu_name = "476", 1928 .cpu_features = CPU_FTRS_47X, 1929 .cpu_user_features = COMMON_USER_BOOKE | 1930 PPC_FEATURE_HAS_FPU, 1931 .mmu_features = MMU_FTR_TYPE_47x | 1932 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1933 .icache_bsize = 32, 1934 .dcache_bsize = 128, 1935 .machine_check = machine_check_47x, 1936 .platform = "ppc470", 1937 }, 1938 { /* 476 others */ 1939 .pvr_mask = 0xffff0000, 1940 .pvr_value = 0x11a50000, 1941 .cpu_name = "476", 1942 .cpu_features = CPU_FTRS_47X, 1943 .cpu_user_features = COMMON_USER_BOOKE | 1944 PPC_FEATURE_HAS_FPU, 1945 .mmu_features = MMU_FTR_TYPE_47x | 1946 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1947 .icache_bsize = 32, 1948 .dcache_bsize = 128, 1949 .machine_check = machine_check_47x, 1950 .platform = "ppc470", 1951 }, 1952 #endif /* CONFIG_PPC_47x */ 1953 { /* default match */ 1954 .pvr_mask = 0x00000000, 1955 .pvr_value = 0x00000000, 1956 .cpu_name = "(generic 44x PPC)", 1957 .cpu_features = CPU_FTRS_44X, 1958 .cpu_user_features = COMMON_USER_BOOKE, 1959 .mmu_features = MMU_FTR_TYPE_44x, 1960 .icache_bsize = 32, 1961 .dcache_bsize = 32, 1962 .machine_check = machine_check_4xx, 1963 .platform = "ppc440", 1964 } 1965 #endif /* CONFIG_44x */ 1966 #ifdef CONFIG_E200 1967 { /* e200z5 */ 1968 .pvr_mask = 0xfff00000, 1969 .pvr_value = 0x81000000, 1970 .cpu_name = "e200z5", 1971 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1972 .cpu_features = CPU_FTRS_E200, 1973 .cpu_user_features = COMMON_USER_BOOKE | 1974 PPC_FEATURE_HAS_EFP_SINGLE | 1975 PPC_FEATURE_UNIFIED_CACHE, 1976 .mmu_features = MMU_FTR_TYPE_FSL_E, 1977 .dcache_bsize = 32, 1978 .machine_check = machine_check_e200, 1979 .platform = "ppc5554", 1980 }, 1981 { /* e200z6 */ 1982 .pvr_mask = 0xfff00000, 1983 .pvr_value = 0x81100000, 1984 .cpu_name = "e200z6", 1985 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1986 .cpu_features = CPU_FTRS_E200, 1987 .cpu_user_features = COMMON_USER_BOOKE | 1988 PPC_FEATURE_HAS_SPE_COMP | 1989 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1990 PPC_FEATURE_UNIFIED_CACHE, 1991 .mmu_features = MMU_FTR_TYPE_FSL_E, 1992 .dcache_bsize = 32, 1993 .machine_check = machine_check_e200, 1994 .platform = "ppc5554", 1995 }, 1996 { /* default match */ 1997 .pvr_mask = 0x00000000, 1998 .pvr_value = 0x00000000, 1999 .cpu_name = "(generic E200 PPC)", 2000 .cpu_features = CPU_FTRS_E200, 2001 .cpu_user_features = COMMON_USER_BOOKE | 2002 PPC_FEATURE_HAS_EFP_SINGLE | 2003 PPC_FEATURE_UNIFIED_CACHE, 2004 .mmu_features = MMU_FTR_TYPE_FSL_E, 2005 .dcache_bsize = 32, 2006 .cpu_setup = __setup_cpu_e200, 2007 .machine_check = machine_check_e200, 2008 .platform = "ppc5554", 2009 } 2010 #endif /* CONFIG_E200 */ 2011 #endif /* CONFIG_PPC32 */ 2012 #ifdef CONFIG_E500 2013 #ifdef CONFIG_PPC32 2014 #ifndef CONFIG_PPC_E500MC 2015 { /* e500 */ 2016 .pvr_mask = 0xffff0000, 2017 .pvr_value = 0x80200000, 2018 .cpu_name = "e500", 2019 .cpu_features = CPU_FTRS_E500, 2020 .cpu_user_features = COMMON_USER_BOOKE | 2021 PPC_FEATURE_HAS_SPE_COMP | 2022 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2023 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2024 .mmu_features = MMU_FTR_TYPE_FSL_E, 2025 .icache_bsize = 32, 2026 .dcache_bsize = 32, 2027 .num_pmcs = 4, 2028 .oprofile_cpu_type = "ppc/e500", 2029 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2030 .cpu_setup = __setup_cpu_e500v1, 2031 .machine_check = machine_check_e500, 2032 .platform = "ppc8540", 2033 }, 2034 { /* e500v2 */ 2035 .pvr_mask = 0xffff0000, 2036 .pvr_value = 0x80210000, 2037 .cpu_name = "e500v2", 2038 .cpu_features = CPU_FTRS_E500_2, 2039 .cpu_user_features = COMMON_USER_BOOKE | 2040 PPC_FEATURE_HAS_SPE_COMP | 2041 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2042 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2043 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2044 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2045 .icache_bsize = 32, 2046 .dcache_bsize = 32, 2047 .num_pmcs = 4, 2048 .oprofile_cpu_type = "ppc/e500", 2049 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2050 .cpu_setup = __setup_cpu_e500v2, 2051 .machine_check = machine_check_e500, 2052 .platform = "ppc8548", 2053 .cpu_down_flush = cpu_down_flush_e500v2, 2054 }, 2055 #else 2056 { /* e500mc */ 2057 .pvr_mask = 0xffff0000, 2058 .pvr_value = 0x80230000, 2059 .cpu_name = "e500mc", 2060 .cpu_features = CPU_FTRS_E500MC, 2061 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2062 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2063 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2064 MMU_FTR_USE_TLBILX, 2065 .icache_bsize = 64, 2066 .dcache_bsize = 64, 2067 .num_pmcs = 4, 2068 .oprofile_cpu_type = "ppc/e500mc", 2069 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2070 .cpu_setup = __setup_cpu_e500mc, 2071 .machine_check = machine_check_e500mc, 2072 .platform = "ppce500mc", 2073 .cpu_down_flush = cpu_down_flush_e500mc, 2074 }, 2075 #endif /* CONFIG_PPC_E500MC */ 2076 #endif /* CONFIG_PPC32 */ 2077 #ifdef CONFIG_PPC_E500MC 2078 { /* e5500 */ 2079 .pvr_mask = 0xffff0000, 2080 .pvr_value = 0x80240000, 2081 .cpu_name = "e5500", 2082 .cpu_features = CPU_FTRS_E5500, 2083 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2084 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2085 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2086 MMU_FTR_USE_TLBILX, 2087 .icache_bsize = 64, 2088 .dcache_bsize = 64, 2089 .num_pmcs = 4, 2090 .oprofile_cpu_type = "ppc/e500mc", 2091 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2092 .cpu_setup = __setup_cpu_e5500, 2093 #ifndef CONFIG_PPC32 2094 .cpu_restore = __restore_cpu_e5500, 2095 #endif 2096 .machine_check = machine_check_e500mc, 2097 .platform = "ppce5500", 2098 .cpu_down_flush = cpu_down_flush_e5500, 2099 }, 2100 { /* e6500 */ 2101 .pvr_mask = 0xffff0000, 2102 .pvr_value = 0x80400000, 2103 .cpu_name = "e6500", 2104 .cpu_features = CPU_FTRS_E6500, 2105 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2106 PPC_FEATURE_HAS_ALTIVEC_COMP, 2107 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2108 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2109 MMU_FTR_USE_TLBILX, 2110 .icache_bsize = 64, 2111 .dcache_bsize = 64, 2112 .num_pmcs = 6, 2113 .oprofile_cpu_type = "ppc/e6500", 2114 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2115 .cpu_setup = __setup_cpu_e6500, 2116 #ifndef CONFIG_PPC32 2117 .cpu_restore = __restore_cpu_e6500, 2118 #endif 2119 .machine_check = machine_check_e500mc, 2120 .platform = "ppce6500", 2121 .cpu_down_flush = cpu_down_flush_e6500, 2122 }, 2123 #endif /* CONFIG_PPC_E500MC */ 2124 #ifdef CONFIG_PPC32 2125 { /* default match */ 2126 .pvr_mask = 0x00000000, 2127 .pvr_value = 0x00000000, 2128 .cpu_name = "(generic E500 PPC)", 2129 .cpu_features = CPU_FTRS_E500, 2130 .cpu_user_features = COMMON_USER_BOOKE | 2131 PPC_FEATURE_HAS_SPE_COMP | 2132 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2133 .mmu_features = MMU_FTR_TYPE_FSL_E, 2134 .icache_bsize = 32, 2135 .dcache_bsize = 32, 2136 .machine_check = machine_check_e500, 2137 .platform = "powerpc", 2138 } 2139 #endif /* CONFIG_PPC32 */ 2140 #endif /* CONFIG_E500 */ 2141 }; 2142 2143 void __init set_cur_cpu_spec(struct cpu_spec *s) 2144 { 2145 struct cpu_spec *t = &the_cpu_spec; 2146 2147 t = PTRRELOC(t); 2148 *t = *s; 2149 2150 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2151 } 2152 2153 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2154 struct cpu_spec *s) 2155 { 2156 struct cpu_spec *t = &the_cpu_spec; 2157 struct cpu_spec old; 2158 2159 t = PTRRELOC(t); 2160 old = *t; 2161 2162 /* Copy everything, then do fixups */ 2163 *t = *s; 2164 2165 /* 2166 * If we are overriding a previous value derived from the real 2167 * PVR with a new value obtained using a logical PVR value, 2168 * don't modify the performance monitor fields. 2169 */ 2170 if (old.num_pmcs && !s->num_pmcs) { 2171 t->num_pmcs = old.num_pmcs; 2172 t->pmc_type = old.pmc_type; 2173 t->oprofile_type = old.oprofile_type; 2174 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2175 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2176 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2177 2178 /* 2179 * If we have passed through this logic once before and 2180 * have pulled the default case because the real PVR was 2181 * not found inside cpu_specs[], then we are possibly 2182 * running in compatibility mode. In that case, let the 2183 * oprofiler know which set of compatibility counters to 2184 * pull from by making sure the oprofile_cpu_type string 2185 * is set to that of compatibility mode. If the 2186 * oprofile_cpu_type already has a value, then we are 2187 * possibly overriding a real PVR with a logical one, 2188 * and, in that case, keep the current value for 2189 * oprofile_cpu_type. 2190 */ 2191 if (old.oprofile_cpu_type != NULL) { 2192 t->oprofile_cpu_type = old.oprofile_cpu_type; 2193 t->oprofile_type = old.oprofile_type; 2194 } 2195 } 2196 2197 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2198 2199 /* 2200 * Set the base platform string once; assumes 2201 * we're called with real pvr first. 2202 */ 2203 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2204 *PTRRELOC(&powerpc_base_platform) = t->platform; 2205 2206 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2207 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2208 * that processor. I will consolidate that at a later time, for now, 2209 * just use #ifdef. We also don't need to PTRRELOC the function 2210 * pointer on ppc64 and booke as we are running at 0 in real mode 2211 * on ppc64 and reloc_offset is always 0 on booke. 2212 */ 2213 if (t->cpu_setup) { 2214 t->cpu_setup(offset, t); 2215 } 2216 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2217 2218 return t; 2219 } 2220 2221 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2222 { 2223 struct cpu_spec *s = cpu_specs; 2224 int i; 2225 2226 s = PTRRELOC(s); 2227 2228 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2229 if ((pvr & s->pvr_mask) == s->pvr_value) 2230 return setup_cpu_spec(offset, s); 2231 } 2232 2233 BUG(); 2234 2235 return NULL; 2236 } 2237 2238 /* 2239 * Used by cpufeatures to get the name for CPUs with a PVR table. 2240 * If they don't hae a PVR table, cpufeatures gets the name from 2241 * cpu device-tree node. 2242 */ 2243 void __init identify_cpu_name(unsigned int pvr) 2244 { 2245 struct cpu_spec *s = cpu_specs; 2246 struct cpu_spec *t = &the_cpu_spec; 2247 int i; 2248 2249 s = PTRRELOC(s); 2250 t = PTRRELOC(t); 2251 2252 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2253 if ((pvr & s->pvr_mask) == s->pvr_value) { 2254 t->cpu_name = s->cpu_name; 2255 return; 2256 } 2257 } 2258 } 2259 2260 2261 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2262 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2263 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2264 }; 2265 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2266 2267 void __init cpu_feature_keys_init(void) 2268 { 2269 int i; 2270 2271 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2272 unsigned long f = 1ul << i; 2273 2274 if (!(cur_cpu_spec->cpu_features & f)) 2275 static_branch_disable(&cpu_feature_keys[i]); 2276 } 2277 } 2278 2279 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2280 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2281 }; 2282 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2283 2284 void __init mmu_feature_keys_init(void) 2285 { 2286 int i; 2287 2288 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2289 unsigned long f = 1ul << i; 2290 2291 if (!(cur_cpu_spec->mmu_features & f)) 2292 static_branch_disable(&mmu_feature_keys[i]); 2293 } 2294 } 2295 #endif 2296