1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9 #include <linux/string.h> 10 #include <linux/sched.h> 11 #include <linux/threads.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/jump_label.h> 15 16 #include <asm/oprofile_impl.h> 17 #include <asm/cputable.h> 18 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 19 #include <asm/mmu.h> 20 #include <asm/setup.h> 21 22 static struct cpu_spec the_cpu_spec __read_mostly; 23 24 struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 25 EXPORT_SYMBOL(cur_cpu_spec); 26 27 /* The platform string corresponding to the real PVR */ 28 const char *powerpc_base_platform; 29 30 /* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37 #ifdef CONFIG_PPC32 38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 60 #endif /* CONFIG_PPC32 */ 61 #ifdef CONFIG_PPC64 62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65 extern void __restore_cpu_pa6t(void); 66 extern void __restore_cpu_ppc970(void); 67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 68 extern void __restore_cpu_power7(void); 69 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power8(void); 71 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power9(void); 73 extern void __setup_cpu_power10(unsigned long offset, struct cpu_spec* spec); 74 extern void __restore_cpu_power10(void); 75 extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 76 extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 77 extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 78 #endif /* CONFIG_PPC64 */ 79 #if defined(CONFIG_E500) 80 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 81 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 82 extern void __restore_cpu_e5500(void); 83 extern void __restore_cpu_e6500(void); 84 #endif /* CONFIG_E500 */ 85 86 /* This table only contains "desktop" CPUs, it need to be filled with embedded 87 * ones as well... 88 */ 89 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 90 PPC_FEATURE_HAS_MMU) 91 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 92 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 93 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 95 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 97 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 99 PPC_FEATURE_TRUE_LE | \ 100 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 101 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 103 PPC_FEATURE_TRUE_LE | \ 104 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 105 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 106 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 108 PPC_FEATURE_TRUE_LE | \ 109 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 110 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 111 PPC_FEATURE2_HTM_COMP | \ 112 PPC_FEATURE2_HTM_NOSC_COMP | \ 113 PPC_FEATURE2_DSCR | \ 114 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 115 PPC_FEATURE2_VEC_CRYPTO) 116 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 117 PPC_FEATURE_TRUE_LE | \ 118 PPC_FEATURE_HAS_ALTIVEC_COMP) 119 #define COMMON_USER_POWER9 COMMON_USER_POWER8 120 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 121 PPC_FEATURE2_ARCH_3_00 | \ 122 PPC_FEATURE2_HAS_IEEE128 | \ 123 PPC_FEATURE2_DARN ) 124 #define COMMON_USER_POWER10 COMMON_USER_POWER9 125 #define COMMON_USER2_POWER10 (COMMON_USER2_POWER9 | \ 126 PPC_FEATURE2_ARCH_3_1 | \ 127 PPC_FEATURE2_MMA) 128 129 #ifdef CONFIG_PPC_BOOK3E_64 130 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 131 #else 132 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 133 PPC_FEATURE_BOOKE) 134 #endif 135 136 static struct cpu_spec __initdata cpu_specs[] = { 137 #ifdef CONFIG_PPC_BOOK3S_64 138 { /* PPC970 */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00390000, 141 .cpu_name = "PPC970", 142 .cpu_features = CPU_FTRS_PPC970, 143 .cpu_user_features = COMMON_USER_POWER4 | 144 PPC_FEATURE_HAS_ALTIVEC_COMP, 145 .mmu_features = MMU_FTRS_PPC970, 146 .icache_bsize = 128, 147 .dcache_bsize = 128, 148 .num_pmcs = 8, 149 .pmc_type = PPC_PMC_IBM, 150 .cpu_setup = __setup_cpu_ppc970, 151 .cpu_restore = __restore_cpu_ppc970, 152 .oprofile_cpu_type = "ppc64/970", 153 .oprofile_type = PPC_OPROFILE_POWER4, 154 .platform = "ppc970", 155 }, 156 { /* PPC970FX */ 157 .pvr_mask = 0xffff0000, 158 .pvr_value = 0x003c0000, 159 .cpu_name = "PPC970FX", 160 .cpu_features = CPU_FTRS_PPC970, 161 .cpu_user_features = COMMON_USER_POWER4 | 162 PPC_FEATURE_HAS_ALTIVEC_COMP, 163 .mmu_features = MMU_FTRS_PPC970, 164 .icache_bsize = 128, 165 .dcache_bsize = 128, 166 .num_pmcs = 8, 167 .pmc_type = PPC_PMC_IBM, 168 .cpu_setup = __setup_cpu_ppc970, 169 .cpu_restore = __restore_cpu_ppc970, 170 .oprofile_cpu_type = "ppc64/970", 171 .oprofile_type = PPC_OPROFILE_POWER4, 172 .platform = "ppc970", 173 }, 174 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 175 .pvr_mask = 0xffffffff, 176 .pvr_value = 0x00440100, 177 .cpu_name = "PPC970MP", 178 .cpu_features = CPU_FTRS_PPC970, 179 .cpu_user_features = COMMON_USER_POWER4 | 180 PPC_FEATURE_HAS_ALTIVEC_COMP, 181 .mmu_features = MMU_FTRS_PPC970, 182 .icache_bsize = 128, 183 .dcache_bsize = 128, 184 .num_pmcs = 8, 185 .pmc_type = PPC_PMC_IBM, 186 .cpu_setup = __setup_cpu_ppc970, 187 .cpu_restore = __restore_cpu_ppc970, 188 .oprofile_cpu_type = "ppc64/970MP", 189 .oprofile_type = PPC_OPROFILE_POWER4, 190 .platform = "ppc970", 191 }, 192 { /* PPC970MP */ 193 .pvr_mask = 0xffff0000, 194 .pvr_value = 0x00440000, 195 .cpu_name = "PPC970MP", 196 .cpu_features = CPU_FTRS_PPC970, 197 .cpu_user_features = COMMON_USER_POWER4 | 198 PPC_FEATURE_HAS_ALTIVEC_COMP, 199 .mmu_features = MMU_FTRS_PPC970, 200 .icache_bsize = 128, 201 .dcache_bsize = 128, 202 .num_pmcs = 8, 203 .pmc_type = PPC_PMC_IBM, 204 .cpu_setup = __setup_cpu_ppc970MP, 205 .cpu_restore = __restore_cpu_ppc970, 206 .oprofile_cpu_type = "ppc64/970MP", 207 .oprofile_type = PPC_OPROFILE_POWER4, 208 .platform = "ppc970", 209 }, 210 { /* PPC970GX */ 211 .pvr_mask = 0xffff0000, 212 .pvr_value = 0x00450000, 213 .cpu_name = "PPC970GX", 214 .cpu_features = CPU_FTRS_PPC970, 215 .cpu_user_features = COMMON_USER_POWER4 | 216 PPC_FEATURE_HAS_ALTIVEC_COMP, 217 .mmu_features = MMU_FTRS_PPC970, 218 .icache_bsize = 128, 219 .dcache_bsize = 128, 220 .num_pmcs = 8, 221 .pmc_type = PPC_PMC_IBM, 222 .cpu_setup = __setup_cpu_ppc970, 223 .oprofile_cpu_type = "ppc64/970", 224 .oprofile_type = PPC_OPROFILE_POWER4, 225 .platform = "ppc970", 226 }, 227 { /* Power5 GR */ 228 .pvr_mask = 0xffff0000, 229 .pvr_value = 0x003a0000, 230 .cpu_name = "POWER5 (gr)", 231 .cpu_features = CPU_FTRS_POWER5, 232 .cpu_user_features = COMMON_USER_POWER5, 233 .mmu_features = MMU_FTRS_POWER5, 234 .icache_bsize = 128, 235 .dcache_bsize = 128, 236 .num_pmcs = 6, 237 .pmc_type = PPC_PMC_IBM, 238 .oprofile_cpu_type = "ppc64/power5", 239 .oprofile_type = PPC_OPROFILE_POWER4, 240 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 241 * and above but only works on POWER5 and above 242 */ 243 .oprofile_mmcra_sihv = MMCRA_SIHV, 244 .oprofile_mmcra_sipr = MMCRA_SIPR, 245 .platform = "power5", 246 }, 247 { /* Power5++ */ 248 .pvr_mask = 0xffffff00, 249 .pvr_value = 0x003b0300, 250 .cpu_name = "POWER5+ (gs)", 251 .cpu_features = CPU_FTRS_POWER5, 252 .cpu_user_features = COMMON_USER_POWER5_PLUS, 253 .mmu_features = MMU_FTRS_POWER5, 254 .icache_bsize = 128, 255 .dcache_bsize = 128, 256 .num_pmcs = 6, 257 .oprofile_cpu_type = "ppc64/power5++", 258 .oprofile_type = PPC_OPROFILE_POWER4, 259 .oprofile_mmcra_sihv = MMCRA_SIHV, 260 .oprofile_mmcra_sipr = MMCRA_SIPR, 261 .platform = "power5+", 262 }, 263 { /* Power5 GS */ 264 .pvr_mask = 0xffff0000, 265 .pvr_value = 0x003b0000, 266 .cpu_name = "POWER5+ (gs)", 267 .cpu_features = CPU_FTRS_POWER5, 268 .cpu_user_features = COMMON_USER_POWER5_PLUS, 269 .mmu_features = MMU_FTRS_POWER5, 270 .icache_bsize = 128, 271 .dcache_bsize = 128, 272 .num_pmcs = 6, 273 .pmc_type = PPC_PMC_IBM, 274 .oprofile_cpu_type = "ppc64/power5+", 275 .oprofile_type = PPC_OPROFILE_POWER4, 276 .oprofile_mmcra_sihv = MMCRA_SIHV, 277 .oprofile_mmcra_sipr = MMCRA_SIPR, 278 .platform = "power5+", 279 }, 280 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 281 .pvr_mask = 0xffffffff, 282 .pvr_value = 0x0f000001, 283 .cpu_name = "POWER5+", 284 .cpu_features = CPU_FTRS_POWER5, 285 .cpu_user_features = COMMON_USER_POWER5_PLUS, 286 .mmu_features = MMU_FTRS_POWER5, 287 .icache_bsize = 128, 288 .dcache_bsize = 128, 289 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 290 .oprofile_type = PPC_OPROFILE_POWER4, 291 .platform = "power5+", 292 }, 293 { /* Power6 */ 294 .pvr_mask = 0xffff0000, 295 .pvr_value = 0x003e0000, 296 .cpu_name = "POWER6 (raw)", 297 .cpu_features = CPU_FTRS_POWER6, 298 .cpu_user_features = COMMON_USER_POWER6 | 299 PPC_FEATURE_POWER6_EXT, 300 .mmu_features = MMU_FTRS_POWER6, 301 .icache_bsize = 128, 302 .dcache_bsize = 128, 303 .num_pmcs = 6, 304 .pmc_type = PPC_PMC_IBM, 305 .oprofile_cpu_type = "ppc64/power6", 306 .oprofile_type = PPC_OPROFILE_POWER4, 307 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 308 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 309 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 310 POWER6_MMCRA_OTHER, 311 .platform = "power6x", 312 }, 313 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 314 .pvr_mask = 0xffffffff, 315 .pvr_value = 0x0f000002, 316 .cpu_name = "POWER6 (architected)", 317 .cpu_features = CPU_FTRS_POWER6, 318 .cpu_user_features = COMMON_USER_POWER6, 319 .mmu_features = MMU_FTRS_POWER6, 320 .icache_bsize = 128, 321 .dcache_bsize = 128, 322 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 323 .oprofile_type = PPC_OPROFILE_POWER4, 324 .platform = "power6", 325 }, 326 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 327 .pvr_mask = 0xffffffff, 328 .pvr_value = 0x0f000003, 329 .cpu_name = "POWER7 (architected)", 330 .cpu_features = CPU_FTRS_POWER7, 331 .cpu_user_features = COMMON_USER_POWER7, 332 .cpu_user_features2 = COMMON_USER2_POWER7, 333 .mmu_features = MMU_FTRS_POWER7, 334 .icache_bsize = 128, 335 .dcache_bsize = 128, 336 .oprofile_type = PPC_OPROFILE_POWER4, 337 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 338 .cpu_setup = __setup_cpu_power7, 339 .cpu_restore = __restore_cpu_power7, 340 .machine_check_early = __machine_check_early_realmode_p7, 341 .platform = "power7", 342 }, 343 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 344 .pvr_mask = 0xffffffff, 345 .pvr_value = 0x0f000004, 346 .cpu_name = "POWER8 (architected)", 347 .cpu_features = CPU_FTRS_POWER8, 348 .cpu_user_features = COMMON_USER_POWER8, 349 .cpu_user_features2 = COMMON_USER2_POWER8, 350 .mmu_features = MMU_FTRS_POWER8, 351 .icache_bsize = 128, 352 .dcache_bsize = 128, 353 .oprofile_type = PPC_OPROFILE_INVALID, 354 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 355 .cpu_setup = __setup_cpu_power8, 356 .cpu_restore = __restore_cpu_power8, 357 .machine_check_early = __machine_check_early_realmode_p8, 358 .platform = "power8", 359 }, 360 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 361 .pvr_mask = 0xffffffff, 362 .pvr_value = 0x0f000005, 363 .cpu_name = "POWER9 (architected)", 364 .cpu_features = CPU_FTRS_POWER9, 365 .cpu_user_features = COMMON_USER_POWER9, 366 .cpu_user_features2 = COMMON_USER2_POWER9, 367 .mmu_features = MMU_FTRS_POWER9, 368 .icache_bsize = 128, 369 .dcache_bsize = 128, 370 .oprofile_type = PPC_OPROFILE_INVALID, 371 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 372 .cpu_setup = __setup_cpu_power9, 373 .cpu_restore = __restore_cpu_power9, 374 .platform = "power9", 375 }, 376 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 377 .pvr_mask = 0xffffffff, 378 .pvr_value = 0x0f000006, 379 .cpu_name = "POWER10 (architected)", 380 .cpu_features = CPU_FTRS_POWER10, 381 .cpu_user_features = COMMON_USER_POWER10, 382 .cpu_user_features2 = COMMON_USER2_POWER10, 383 .mmu_features = MMU_FTRS_POWER10, 384 .icache_bsize = 128, 385 .dcache_bsize = 128, 386 .oprofile_type = PPC_OPROFILE_INVALID, 387 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 388 .cpu_setup = __setup_cpu_power10, 389 .cpu_restore = __restore_cpu_power10, 390 .platform = "power10", 391 }, 392 { /* Power7 */ 393 .pvr_mask = 0xffff0000, 394 .pvr_value = 0x003f0000, 395 .cpu_name = "POWER7 (raw)", 396 .cpu_features = CPU_FTRS_POWER7, 397 .cpu_user_features = COMMON_USER_POWER7, 398 .cpu_user_features2 = COMMON_USER2_POWER7, 399 .mmu_features = MMU_FTRS_POWER7, 400 .icache_bsize = 128, 401 .dcache_bsize = 128, 402 .num_pmcs = 6, 403 .pmc_type = PPC_PMC_IBM, 404 .oprofile_cpu_type = "ppc64/power7", 405 .oprofile_type = PPC_OPROFILE_POWER4, 406 .cpu_setup = __setup_cpu_power7, 407 .cpu_restore = __restore_cpu_power7, 408 .machine_check_early = __machine_check_early_realmode_p7, 409 .platform = "power7", 410 }, 411 { /* Power7+ */ 412 .pvr_mask = 0xffff0000, 413 .pvr_value = 0x004A0000, 414 .cpu_name = "POWER7+ (raw)", 415 .cpu_features = CPU_FTRS_POWER7, 416 .cpu_user_features = COMMON_USER_POWER7, 417 .cpu_user_features2 = COMMON_USER2_POWER7, 418 .mmu_features = MMU_FTRS_POWER7, 419 .icache_bsize = 128, 420 .dcache_bsize = 128, 421 .num_pmcs = 6, 422 .pmc_type = PPC_PMC_IBM, 423 .oprofile_cpu_type = "ppc64/power7", 424 .oprofile_type = PPC_OPROFILE_POWER4, 425 .cpu_setup = __setup_cpu_power7, 426 .cpu_restore = __restore_cpu_power7, 427 .machine_check_early = __machine_check_early_realmode_p7, 428 .platform = "power7+", 429 }, 430 { /* Power8E */ 431 .pvr_mask = 0xffff0000, 432 .pvr_value = 0x004b0000, 433 .cpu_name = "POWER8E (raw)", 434 .cpu_features = CPU_FTRS_POWER8E, 435 .cpu_user_features = COMMON_USER_POWER8, 436 .cpu_user_features2 = COMMON_USER2_POWER8, 437 .mmu_features = MMU_FTRS_POWER8, 438 .icache_bsize = 128, 439 .dcache_bsize = 128, 440 .num_pmcs = 6, 441 .pmc_type = PPC_PMC_IBM, 442 .oprofile_cpu_type = "ppc64/power8", 443 .oprofile_type = PPC_OPROFILE_INVALID, 444 .cpu_setup = __setup_cpu_power8, 445 .cpu_restore = __restore_cpu_power8, 446 .machine_check_early = __machine_check_early_realmode_p8, 447 .platform = "power8", 448 }, 449 { /* Power8NVL */ 450 .pvr_mask = 0xffff0000, 451 .pvr_value = 0x004c0000, 452 .cpu_name = "POWER8NVL (raw)", 453 .cpu_features = CPU_FTRS_POWER8, 454 .cpu_user_features = COMMON_USER_POWER8, 455 .cpu_user_features2 = COMMON_USER2_POWER8, 456 .mmu_features = MMU_FTRS_POWER8, 457 .icache_bsize = 128, 458 .dcache_bsize = 128, 459 .num_pmcs = 6, 460 .pmc_type = PPC_PMC_IBM, 461 .oprofile_cpu_type = "ppc64/power8", 462 .oprofile_type = PPC_OPROFILE_INVALID, 463 .cpu_setup = __setup_cpu_power8, 464 .cpu_restore = __restore_cpu_power8, 465 .machine_check_early = __machine_check_early_realmode_p8, 466 .platform = "power8", 467 }, 468 { /* Power8 */ 469 .pvr_mask = 0xffff0000, 470 .pvr_value = 0x004d0000, 471 .cpu_name = "POWER8 (raw)", 472 .cpu_features = CPU_FTRS_POWER8, 473 .cpu_user_features = COMMON_USER_POWER8, 474 .cpu_user_features2 = COMMON_USER2_POWER8, 475 .mmu_features = MMU_FTRS_POWER8, 476 .icache_bsize = 128, 477 .dcache_bsize = 128, 478 .num_pmcs = 6, 479 .pmc_type = PPC_PMC_IBM, 480 .oprofile_cpu_type = "ppc64/power8", 481 .oprofile_type = PPC_OPROFILE_INVALID, 482 .cpu_setup = __setup_cpu_power8, 483 .cpu_restore = __restore_cpu_power8, 484 .machine_check_early = __machine_check_early_realmode_p8, 485 .platform = "power8", 486 }, 487 { /* Power9 DD2.0 */ 488 .pvr_mask = 0xffffefff, 489 .pvr_value = 0x004e0200, 490 .cpu_name = "POWER9 (raw)", 491 .cpu_features = CPU_FTRS_POWER9_DD2_0, 492 .cpu_user_features = COMMON_USER_POWER9, 493 .cpu_user_features2 = COMMON_USER2_POWER9, 494 .mmu_features = MMU_FTRS_POWER9, 495 .icache_bsize = 128, 496 .dcache_bsize = 128, 497 .num_pmcs = 6, 498 .pmc_type = PPC_PMC_IBM, 499 .oprofile_cpu_type = "ppc64/power9", 500 .oprofile_type = PPC_OPROFILE_INVALID, 501 .cpu_setup = __setup_cpu_power9, 502 .cpu_restore = __restore_cpu_power9, 503 .machine_check_early = __machine_check_early_realmode_p9, 504 .platform = "power9", 505 }, 506 { /* Power9 DD 2.1 */ 507 .pvr_mask = 0xffffefff, 508 .pvr_value = 0x004e0201, 509 .cpu_name = "POWER9 (raw)", 510 .cpu_features = CPU_FTRS_POWER9_DD2_1, 511 .cpu_user_features = COMMON_USER_POWER9, 512 .cpu_user_features2 = COMMON_USER2_POWER9, 513 .mmu_features = MMU_FTRS_POWER9, 514 .icache_bsize = 128, 515 .dcache_bsize = 128, 516 .num_pmcs = 6, 517 .pmc_type = PPC_PMC_IBM, 518 .oprofile_cpu_type = "ppc64/power9", 519 .oprofile_type = PPC_OPROFILE_INVALID, 520 .cpu_setup = __setup_cpu_power9, 521 .cpu_restore = __restore_cpu_power9, 522 .machine_check_early = __machine_check_early_realmode_p9, 523 .platform = "power9", 524 }, 525 { /* Power9 DD2.2 or later */ 526 .pvr_mask = 0xffff0000, 527 .pvr_value = 0x004e0000, 528 .cpu_name = "POWER9 (raw)", 529 .cpu_features = CPU_FTRS_POWER9_DD2_2, 530 .cpu_user_features = COMMON_USER_POWER9, 531 .cpu_user_features2 = COMMON_USER2_POWER9, 532 .mmu_features = MMU_FTRS_POWER9, 533 .icache_bsize = 128, 534 .dcache_bsize = 128, 535 .num_pmcs = 6, 536 .pmc_type = PPC_PMC_IBM, 537 .oprofile_cpu_type = "ppc64/power9", 538 .oprofile_type = PPC_OPROFILE_INVALID, 539 .cpu_setup = __setup_cpu_power9, 540 .cpu_restore = __restore_cpu_power9, 541 .machine_check_early = __machine_check_early_realmode_p9, 542 .platform = "power9", 543 }, 544 { /* Cell Broadband Engine */ 545 .pvr_mask = 0xffff0000, 546 .pvr_value = 0x00700000, 547 .cpu_name = "Cell Broadband Engine", 548 .cpu_features = CPU_FTRS_CELL, 549 .cpu_user_features = COMMON_USER_PPC64 | 550 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 551 PPC_FEATURE_SMT, 552 .mmu_features = MMU_FTRS_CELL, 553 .icache_bsize = 128, 554 .dcache_bsize = 128, 555 .num_pmcs = 4, 556 .pmc_type = PPC_PMC_IBM, 557 .oprofile_cpu_type = "ppc64/cell-be", 558 .oprofile_type = PPC_OPROFILE_CELL, 559 .platform = "ppc-cell-be", 560 }, 561 { /* PA Semi PA6T */ 562 .pvr_mask = 0x7fff0000, 563 .pvr_value = 0x00900000, 564 .cpu_name = "PA6T", 565 .cpu_features = CPU_FTRS_PA6T, 566 .cpu_user_features = COMMON_USER_PA6T, 567 .mmu_features = MMU_FTRS_PA6T, 568 .icache_bsize = 64, 569 .dcache_bsize = 64, 570 .num_pmcs = 6, 571 .pmc_type = PPC_PMC_PA6T, 572 .cpu_setup = __setup_cpu_pa6t, 573 .cpu_restore = __restore_cpu_pa6t, 574 .oprofile_cpu_type = "ppc64/pa6t", 575 .oprofile_type = PPC_OPROFILE_PA6T, 576 .platform = "pa6t", 577 }, 578 { /* default match */ 579 .pvr_mask = 0x00000000, 580 .pvr_value = 0x00000000, 581 .cpu_name = "POWER5 (compatible)", 582 .cpu_features = CPU_FTRS_COMPATIBLE, 583 .cpu_user_features = COMMON_USER_PPC64, 584 .mmu_features = MMU_FTRS_POWER, 585 .icache_bsize = 128, 586 .dcache_bsize = 128, 587 .num_pmcs = 6, 588 .pmc_type = PPC_PMC_IBM, 589 .platform = "power5", 590 } 591 #endif /* CONFIG_PPC_BOOK3S_64 */ 592 593 #ifdef CONFIG_PPC32 594 #ifdef CONFIG_PPC_BOOK3S_601 595 { /* 601 */ 596 .pvr_mask = 0xffff0000, 597 .pvr_value = 0x00010000, 598 .cpu_name = "601", 599 .cpu_features = CPU_FTRS_PPC601, 600 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 601 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 602 .mmu_features = MMU_FTR_HPTE_TABLE, 603 .icache_bsize = 32, 604 .dcache_bsize = 32, 605 .machine_check = machine_check_generic, 606 .platform = "ppc601", 607 }, 608 #endif /* CONFIG_PPC_BOOK3S_601 */ 609 #ifdef CONFIG_PPC_BOOK3S_6xx 610 { /* 603 */ 611 .pvr_mask = 0xffff0000, 612 .pvr_value = 0x00030000, 613 .cpu_name = "603", 614 .cpu_features = CPU_FTRS_603, 615 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 616 .mmu_features = 0, 617 .icache_bsize = 32, 618 .dcache_bsize = 32, 619 .cpu_setup = __setup_cpu_603, 620 .machine_check = machine_check_generic, 621 .platform = "ppc603", 622 }, 623 { /* 603e */ 624 .pvr_mask = 0xffff0000, 625 .pvr_value = 0x00060000, 626 .cpu_name = "603e", 627 .cpu_features = CPU_FTRS_603, 628 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 629 .mmu_features = 0, 630 .icache_bsize = 32, 631 .dcache_bsize = 32, 632 .cpu_setup = __setup_cpu_603, 633 .machine_check = machine_check_generic, 634 .platform = "ppc603", 635 }, 636 { /* 603ev */ 637 .pvr_mask = 0xffff0000, 638 .pvr_value = 0x00070000, 639 .cpu_name = "603ev", 640 .cpu_features = CPU_FTRS_603, 641 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 642 .mmu_features = 0, 643 .icache_bsize = 32, 644 .dcache_bsize = 32, 645 .cpu_setup = __setup_cpu_603, 646 .machine_check = machine_check_generic, 647 .platform = "ppc603", 648 }, 649 { /* 604 */ 650 .pvr_mask = 0xffff0000, 651 .pvr_value = 0x00040000, 652 .cpu_name = "604", 653 .cpu_features = CPU_FTRS_604, 654 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 655 .mmu_features = MMU_FTR_HPTE_TABLE, 656 .icache_bsize = 32, 657 .dcache_bsize = 32, 658 .num_pmcs = 2, 659 .cpu_setup = __setup_cpu_604, 660 .machine_check = machine_check_generic, 661 .platform = "ppc604", 662 }, 663 { /* 604e */ 664 .pvr_mask = 0xfffff000, 665 .pvr_value = 0x00090000, 666 .cpu_name = "604e", 667 .cpu_features = CPU_FTRS_604, 668 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 669 .mmu_features = MMU_FTR_HPTE_TABLE, 670 .icache_bsize = 32, 671 .dcache_bsize = 32, 672 .num_pmcs = 4, 673 .cpu_setup = __setup_cpu_604, 674 .machine_check = machine_check_generic, 675 .platform = "ppc604", 676 }, 677 { /* 604r */ 678 .pvr_mask = 0xffff0000, 679 .pvr_value = 0x00090000, 680 .cpu_name = "604r", 681 .cpu_features = CPU_FTRS_604, 682 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 683 .mmu_features = MMU_FTR_HPTE_TABLE, 684 .icache_bsize = 32, 685 .dcache_bsize = 32, 686 .num_pmcs = 4, 687 .cpu_setup = __setup_cpu_604, 688 .machine_check = machine_check_generic, 689 .platform = "ppc604", 690 }, 691 { /* 604ev */ 692 .pvr_mask = 0xffff0000, 693 .pvr_value = 0x000a0000, 694 .cpu_name = "604ev", 695 .cpu_features = CPU_FTRS_604, 696 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 697 .mmu_features = MMU_FTR_HPTE_TABLE, 698 .icache_bsize = 32, 699 .dcache_bsize = 32, 700 .num_pmcs = 4, 701 .cpu_setup = __setup_cpu_604, 702 .machine_check = machine_check_generic, 703 .platform = "ppc604", 704 }, 705 { /* 740/750 (0x4202, don't support TAU ?) */ 706 .pvr_mask = 0xffffffff, 707 .pvr_value = 0x00084202, 708 .cpu_name = "740/750", 709 .cpu_features = CPU_FTRS_740_NOTAU, 710 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 711 .mmu_features = MMU_FTR_HPTE_TABLE, 712 .icache_bsize = 32, 713 .dcache_bsize = 32, 714 .num_pmcs = 4, 715 .cpu_setup = __setup_cpu_750, 716 .machine_check = machine_check_generic, 717 .platform = "ppc750", 718 }, 719 { /* 750CX (80100 and 8010x?) */ 720 .pvr_mask = 0xfffffff0, 721 .pvr_value = 0x00080100, 722 .cpu_name = "750CX", 723 .cpu_features = CPU_FTRS_750, 724 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 725 .mmu_features = MMU_FTR_HPTE_TABLE, 726 .icache_bsize = 32, 727 .dcache_bsize = 32, 728 .num_pmcs = 4, 729 .cpu_setup = __setup_cpu_750cx, 730 .machine_check = machine_check_generic, 731 .platform = "ppc750", 732 }, 733 { /* 750CX (82201 and 82202) */ 734 .pvr_mask = 0xfffffff0, 735 .pvr_value = 0x00082200, 736 .cpu_name = "750CX", 737 .cpu_features = CPU_FTRS_750, 738 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 739 .mmu_features = MMU_FTR_HPTE_TABLE, 740 .icache_bsize = 32, 741 .dcache_bsize = 32, 742 .num_pmcs = 4, 743 .pmc_type = PPC_PMC_IBM, 744 .cpu_setup = __setup_cpu_750cx, 745 .machine_check = machine_check_generic, 746 .platform = "ppc750", 747 }, 748 { /* 750CXe (82214) */ 749 .pvr_mask = 0xfffffff0, 750 .pvr_value = 0x00082210, 751 .cpu_name = "750CXe", 752 .cpu_features = CPU_FTRS_750, 753 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 754 .mmu_features = MMU_FTR_HPTE_TABLE, 755 .icache_bsize = 32, 756 .dcache_bsize = 32, 757 .num_pmcs = 4, 758 .pmc_type = PPC_PMC_IBM, 759 .cpu_setup = __setup_cpu_750cx, 760 .machine_check = machine_check_generic, 761 .platform = "ppc750", 762 }, 763 { /* 750CXe "Gekko" (83214) */ 764 .pvr_mask = 0xffffffff, 765 .pvr_value = 0x00083214, 766 .cpu_name = "750CXe", 767 .cpu_features = CPU_FTRS_750, 768 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 769 .mmu_features = MMU_FTR_HPTE_TABLE, 770 .icache_bsize = 32, 771 .dcache_bsize = 32, 772 .num_pmcs = 4, 773 .pmc_type = PPC_PMC_IBM, 774 .cpu_setup = __setup_cpu_750cx, 775 .machine_check = machine_check_generic, 776 .platform = "ppc750", 777 }, 778 { /* 750CL (and "Broadway") */ 779 .pvr_mask = 0xfffff0e0, 780 .pvr_value = 0x00087000, 781 .cpu_name = "750CL", 782 .cpu_features = CPU_FTRS_750CL, 783 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 784 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 785 .icache_bsize = 32, 786 .dcache_bsize = 32, 787 .num_pmcs = 4, 788 .pmc_type = PPC_PMC_IBM, 789 .cpu_setup = __setup_cpu_750, 790 .machine_check = machine_check_generic, 791 .platform = "ppc750", 792 .oprofile_cpu_type = "ppc/750", 793 .oprofile_type = PPC_OPROFILE_G4, 794 }, 795 { /* 745/755 */ 796 .pvr_mask = 0xfffff000, 797 .pvr_value = 0x00083000, 798 .cpu_name = "745/755", 799 .cpu_features = CPU_FTRS_750, 800 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 801 .mmu_features = MMU_FTR_HPTE_TABLE, 802 .icache_bsize = 32, 803 .dcache_bsize = 32, 804 .num_pmcs = 4, 805 .pmc_type = PPC_PMC_IBM, 806 .cpu_setup = __setup_cpu_750, 807 .machine_check = machine_check_generic, 808 .platform = "ppc750", 809 }, 810 { /* 750FX rev 1.x */ 811 .pvr_mask = 0xffffff00, 812 .pvr_value = 0x70000100, 813 .cpu_name = "750FX", 814 .cpu_features = CPU_FTRS_750FX1, 815 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 816 .mmu_features = MMU_FTR_HPTE_TABLE, 817 .icache_bsize = 32, 818 .dcache_bsize = 32, 819 .num_pmcs = 4, 820 .pmc_type = PPC_PMC_IBM, 821 .cpu_setup = __setup_cpu_750, 822 .machine_check = machine_check_generic, 823 .platform = "ppc750", 824 .oprofile_cpu_type = "ppc/750", 825 .oprofile_type = PPC_OPROFILE_G4, 826 }, 827 { /* 750FX rev 2.0 must disable HID0[DPM] */ 828 .pvr_mask = 0xffffffff, 829 .pvr_value = 0x70000200, 830 .cpu_name = "750FX", 831 .cpu_features = CPU_FTRS_750FX2, 832 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 833 .mmu_features = MMU_FTR_HPTE_TABLE, 834 .icache_bsize = 32, 835 .dcache_bsize = 32, 836 .num_pmcs = 4, 837 .pmc_type = PPC_PMC_IBM, 838 .cpu_setup = __setup_cpu_750, 839 .machine_check = machine_check_generic, 840 .platform = "ppc750", 841 .oprofile_cpu_type = "ppc/750", 842 .oprofile_type = PPC_OPROFILE_G4, 843 }, 844 { /* 750FX (All revs except 2.0) */ 845 .pvr_mask = 0xffff0000, 846 .pvr_value = 0x70000000, 847 .cpu_name = "750FX", 848 .cpu_features = CPU_FTRS_750FX, 849 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 850 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 851 .icache_bsize = 32, 852 .dcache_bsize = 32, 853 .num_pmcs = 4, 854 .pmc_type = PPC_PMC_IBM, 855 .cpu_setup = __setup_cpu_750fx, 856 .machine_check = machine_check_generic, 857 .platform = "ppc750", 858 .oprofile_cpu_type = "ppc/750", 859 .oprofile_type = PPC_OPROFILE_G4, 860 }, 861 { /* 750GX */ 862 .pvr_mask = 0xffff0000, 863 .pvr_value = 0x70020000, 864 .cpu_name = "750GX", 865 .cpu_features = CPU_FTRS_750GX, 866 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 867 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 868 .icache_bsize = 32, 869 .dcache_bsize = 32, 870 .num_pmcs = 4, 871 .pmc_type = PPC_PMC_IBM, 872 .cpu_setup = __setup_cpu_750fx, 873 .machine_check = machine_check_generic, 874 .platform = "ppc750", 875 .oprofile_cpu_type = "ppc/750", 876 .oprofile_type = PPC_OPROFILE_G4, 877 }, 878 { /* 740/750 (L2CR bit need fixup for 740) */ 879 .pvr_mask = 0xffff0000, 880 .pvr_value = 0x00080000, 881 .cpu_name = "740/750", 882 .cpu_features = CPU_FTRS_740, 883 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 884 .mmu_features = MMU_FTR_HPTE_TABLE, 885 .icache_bsize = 32, 886 .dcache_bsize = 32, 887 .num_pmcs = 4, 888 .pmc_type = PPC_PMC_IBM, 889 .cpu_setup = __setup_cpu_750, 890 .machine_check = machine_check_generic, 891 .platform = "ppc750", 892 }, 893 { /* 7400 rev 1.1 ? (no TAU) */ 894 .pvr_mask = 0xffffffff, 895 .pvr_value = 0x000c1101, 896 .cpu_name = "7400 (1.1)", 897 .cpu_features = CPU_FTRS_7400_NOTAU, 898 .cpu_user_features = COMMON_USER | 899 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 900 .mmu_features = MMU_FTR_HPTE_TABLE, 901 .icache_bsize = 32, 902 .dcache_bsize = 32, 903 .num_pmcs = 4, 904 .pmc_type = PPC_PMC_G4, 905 .cpu_setup = __setup_cpu_7400, 906 .machine_check = machine_check_generic, 907 .platform = "ppc7400", 908 }, 909 { /* 7400 */ 910 .pvr_mask = 0xffff0000, 911 .pvr_value = 0x000c0000, 912 .cpu_name = "7400", 913 .cpu_features = CPU_FTRS_7400, 914 .cpu_user_features = COMMON_USER | 915 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 916 .mmu_features = MMU_FTR_HPTE_TABLE, 917 .icache_bsize = 32, 918 .dcache_bsize = 32, 919 .num_pmcs = 4, 920 .pmc_type = PPC_PMC_G4, 921 .cpu_setup = __setup_cpu_7400, 922 .machine_check = machine_check_generic, 923 .platform = "ppc7400", 924 }, 925 { /* 7410 */ 926 .pvr_mask = 0xffff0000, 927 .pvr_value = 0x800c0000, 928 .cpu_name = "7410", 929 .cpu_features = CPU_FTRS_7400, 930 .cpu_user_features = COMMON_USER | 931 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 932 .mmu_features = MMU_FTR_HPTE_TABLE, 933 .icache_bsize = 32, 934 .dcache_bsize = 32, 935 .num_pmcs = 4, 936 .pmc_type = PPC_PMC_G4, 937 .cpu_setup = __setup_cpu_7410, 938 .machine_check = machine_check_generic, 939 .platform = "ppc7400", 940 }, 941 { /* 7450 2.0 - no doze/nap */ 942 .pvr_mask = 0xffffffff, 943 .pvr_value = 0x80000200, 944 .cpu_name = "7450", 945 .cpu_features = CPU_FTRS_7450_20, 946 .cpu_user_features = COMMON_USER | 947 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 948 .mmu_features = MMU_FTR_HPTE_TABLE, 949 .icache_bsize = 32, 950 .dcache_bsize = 32, 951 .num_pmcs = 6, 952 .pmc_type = PPC_PMC_G4, 953 .cpu_setup = __setup_cpu_745x, 954 .oprofile_cpu_type = "ppc/7450", 955 .oprofile_type = PPC_OPROFILE_G4, 956 .machine_check = machine_check_generic, 957 .platform = "ppc7450", 958 }, 959 { /* 7450 2.1 */ 960 .pvr_mask = 0xffffffff, 961 .pvr_value = 0x80000201, 962 .cpu_name = "7450", 963 .cpu_features = CPU_FTRS_7450_21, 964 .cpu_user_features = COMMON_USER | 965 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 966 .mmu_features = MMU_FTR_HPTE_TABLE, 967 .icache_bsize = 32, 968 .dcache_bsize = 32, 969 .num_pmcs = 6, 970 .pmc_type = PPC_PMC_G4, 971 .cpu_setup = __setup_cpu_745x, 972 .oprofile_cpu_type = "ppc/7450", 973 .oprofile_type = PPC_OPROFILE_G4, 974 .machine_check = machine_check_generic, 975 .platform = "ppc7450", 976 }, 977 { /* 7450 2.3 and newer */ 978 .pvr_mask = 0xffff0000, 979 .pvr_value = 0x80000000, 980 .cpu_name = "7450", 981 .cpu_features = CPU_FTRS_7450_23, 982 .cpu_user_features = COMMON_USER | 983 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 984 .mmu_features = MMU_FTR_HPTE_TABLE, 985 .icache_bsize = 32, 986 .dcache_bsize = 32, 987 .num_pmcs = 6, 988 .pmc_type = PPC_PMC_G4, 989 .cpu_setup = __setup_cpu_745x, 990 .oprofile_cpu_type = "ppc/7450", 991 .oprofile_type = PPC_OPROFILE_G4, 992 .machine_check = machine_check_generic, 993 .platform = "ppc7450", 994 }, 995 { /* 7455 rev 1.x */ 996 .pvr_mask = 0xffffff00, 997 .pvr_value = 0x80010100, 998 .cpu_name = "7455", 999 .cpu_features = CPU_FTRS_7455_1, 1000 .cpu_user_features = COMMON_USER | 1001 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1002 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1003 .icache_bsize = 32, 1004 .dcache_bsize = 32, 1005 .num_pmcs = 6, 1006 .pmc_type = PPC_PMC_G4, 1007 .cpu_setup = __setup_cpu_745x, 1008 .oprofile_cpu_type = "ppc/7450", 1009 .oprofile_type = PPC_OPROFILE_G4, 1010 .machine_check = machine_check_generic, 1011 .platform = "ppc7450", 1012 }, 1013 { /* 7455 rev 2.0 */ 1014 .pvr_mask = 0xffffffff, 1015 .pvr_value = 0x80010200, 1016 .cpu_name = "7455", 1017 .cpu_features = CPU_FTRS_7455_20, 1018 .cpu_user_features = COMMON_USER | 1019 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1020 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1021 .icache_bsize = 32, 1022 .dcache_bsize = 32, 1023 .num_pmcs = 6, 1024 .pmc_type = PPC_PMC_G4, 1025 .cpu_setup = __setup_cpu_745x, 1026 .oprofile_cpu_type = "ppc/7450", 1027 .oprofile_type = PPC_OPROFILE_G4, 1028 .machine_check = machine_check_generic, 1029 .platform = "ppc7450", 1030 }, 1031 { /* 7455 others */ 1032 .pvr_mask = 0xffff0000, 1033 .pvr_value = 0x80010000, 1034 .cpu_name = "7455", 1035 .cpu_features = CPU_FTRS_7455, 1036 .cpu_user_features = COMMON_USER | 1037 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1038 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1039 .icache_bsize = 32, 1040 .dcache_bsize = 32, 1041 .num_pmcs = 6, 1042 .pmc_type = PPC_PMC_G4, 1043 .cpu_setup = __setup_cpu_745x, 1044 .oprofile_cpu_type = "ppc/7450", 1045 .oprofile_type = PPC_OPROFILE_G4, 1046 .machine_check = machine_check_generic, 1047 .platform = "ppc7450", 1048 }, 1049 { /* 7447/7457 Rev 1.0 */ 1050 .pvr_mask = 0xffffffff, 1051 .pvr_value = 0x80020100, 1052 .cpu_name = "7447/7457", 1053 .cpu_features = CPU_FTRS_7447_10, 1054 .cpu_user_features = COMMON_USER | 1055 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1056 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1057 .icache_bsize = 32, 1058 .dcache_bsize = 32, 1059 .num_pmcs = 6, 1060 .pmc_type = PPC_PMC_G4, 1061 .cpu_setup = __setup_cpu_745x, 1062 .oprofile_cpu_type = "ppc/7450", 1063 .oprofile_type = PPC_OPROFILE_G4, 1064 .machine_check = machine_check_generic, 1065 .platform = "ppc7450", 1066 }, 1067 { /* 7447/7457 Rev 1.1 */ 1068 .pvr_mask = 0xffffffff, 1069 .pvr_value = 0x80020101, 1070 .cpu_name = "7447/7457", 1071 .cpu_features = CPU_FTRS_7447_10, 1072 .cpu_user_features = COMMON_USER | 1073 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1074 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1075 .icache_bsize = 32, 1076 .dcache_bsize = 32, 1077 .num_pmcs = 6, 1078 .pmc_type = PPC_PMC_G4, 1079 .cpu_setup = __setup_cpu_745x, 1080 .oprofile_cpu_type = "ppc/7450", 1081 .oprofile_type = PPC_OPROFILE_G4, 1082 .machine_check = machine_check_generic, 1083 .platform = "ppc7450", 1084 }, 1085 { /* 7447/7457 Rev 1.2 and later */ 1086 .pvr_mask = 0xffff0000, 1087 .pvr_value = 0x80020000, 1088 .cpu_name = "7447/7457", 1089 .cpu_features = CPU_FTRS_7447, 1090 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1091 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1092 .icache_bsize = 32, 1093 .dcache_bsize = 32, 1094 .num_pmcs = 6, 1095 .pmc_type = PPC_PMC_G4, 1096 .cpu_setup = __setup_cpu_745x, 1097 .oprofile_cpu_type = "ppc/7450", 1098 .oprofile_type = PPC_OPROFILE_G4, 1099 .machine_check = machine_check_generic, 1100 .platform = "ppc7450", 1101 }, 1102 { /* 7447A */ 1103 .pvr_mask = 0xffff0000, 1104 .pvr_value = 0x80030000, 1105 .cpu_name = "7447A", 1106 .cpu_features = CPU_FTRS_7447A, 1107 .cpu_user_features = COMMON_USER | 1108 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1109 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1110 .icache_bsize = 32, 1111 .dcache_bsize = 32, 1112 .num_pmcs = 6, 1113 .pmc_type = PPC_PMC_G4, 1114 .cpu_setup = __setup_cpu_745x, 1115 .oprofile_cpu_type = "ppc/7450", 1116 .oprofile_type = PPC_OPROFILE_G4, 1117 .machine_check = machine_check_generic, 1118 .platform = "ppc7450", 1119 }, 1120 { /* 7448 */ 1121 .pvr_mask = 0xffff0000, 1122 .pvr_value = 0x80040000, 1123 .cpu_name = "7448", 1124 .cpu_features = CPU_FTRS_7448, 1125 .cpu_user_features = COMMON_USER | 1126 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1127 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1128 .icache_bsize = 32, 1129 .dcache_bsize = 32, 1130 .num_pmcs = 6, 1131 .pmc_type = PPC_PMC_G4, 1132 .cpu_setup = __setup_cpu_745x, 1133 .oprofile_cpu_type = "ppc/7450", 1134 .oprofile_type = PPC_OPROFILE_G4, 1135 .machine_check = machine_check_generic, 1136 .platform = "ppc7450", 1137 }, 1138 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1139 .pvr_mask = 0x7fff0000, 1140 .pvr_value = 0x00810000, 1141 .cpu_name = "82xx", 1142 .cpu_features = CPU_FTRS_82XX, 1143 .cpu_user_features = COMMON_USER, 1144 .mmu_features = 0, 1145 .icache_bsize = 32, 1146 .dcache_bsize = 32, 1147 .cpu_setup = __setup_cpu_603, 1148 .machine_check = machine_check_generic, 1149 .platform = "ppc603", 1150 }, 1151 { /* All G2_LE (603e core, plus some) have the same pvr */ 1152 .pvr_mask = 0x7fff0000, 1153 .pvr_value = 0x00820000, 1154 .cpu_name = "G2_LE", 1155 .cpu_features = CPU_FTRS_G2_LE, 1156 .cpu_user_features = COMMON_USER, 1157 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1158 .icache_bsize = 32, 1159 .dcache_bsize = 32, 1160 .cpu_setup = __setup_cpu_603, 1161 .machine_check = machine_check_generic, 1162 .platform = "ppc603", 1163 }, 1164 #ifdef CONFIG_PPC_83xx 1165 { /* e300c1 (a 603e core, plus some) on 83xx */ 1166 .pvr_mask = 0x7fff0000, 1167 .pvr_value = 0x00830000, 1168 .cpu_name = "e300c1", 1169 .cpu_features = CPU_FTRS_E300, 1170 .cpu_user_features = COMMON_USER, 1171 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1172 .icache_bsize = 32, 1173 .dcache_bsize = 32, 1174 .cpu_setup = __setup_cpu_603, 1175 .machine_check = machine_check_83xx, 1176 .platform = "ppc603", 1177 }, 1178 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1179 .pvr_mask = 0x7fff0000, 1180 .pvr_value = 0x00840000, 1181 .cpu_name = "e300c2", 1182 .cpu_features = CPU_FTRS_E300C2, 1183 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1184 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1185 MMU_FTR_NEED_DTLB_SW_LRU, 1186 .icache_bsize = 32, 1187 .dcache_bsize = 32, 1188 .cpu_setup = __setup_cpu_603, 1189 .machine_check = machine_check_83xx, 1190 .platform = "ppc603", 1191 }, 1192 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1193 .pvr_mask = 0x7fff0000, 1194 .pvr_value = 0x00850000, 1195 .cpu_name = "e300c3", 1196 .cpu_features = CPU_FTRS_E300, 1197 .cpu_user_features = COMMON_USER, 1198 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1199 MMU_FTR_NEED_DTLB_SW_LRU, 1200 .icache_bsize = 32, 1201 .dcache_bsize = 32, 1202 .cpu_setup = __setup_cpu_603, 1203 .machine_check = machine_check_83xx, 1204 .num_pmcs = 4, 1205 .oprofile_cpu_type = "ppc/e300", 1206 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1207 .platform = "ppc603", 1208 }, 1209 { /* e300c4 (e300c1, plus one IU) */ 1210 .pvr_mask = 0x7fff0000, 1211 .pvr_value = 0x00860000, 1212 .cpu_name = "e300c4", 1213 .cpu_features = CPU_FTRS_E300, 1214 .cpu_user_features = COMMON_USER, 1215 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1216 MMU_FTR_NEED_DTLB_SW_LRU, 1217 .icache_bsize = 32, 1218 .dcache_bsize = 32, 1219 .cpu_setup = __setup_cpu_603, 1220 .machine_check = machine_check_83xx, 1221 .num_pmcs = 4, 1222 .oprofile_cpu_type = "ppc/e300", 1223 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1224 .platform = "ppc603", 1225 }, 1226 #endif 1227 { /* default match, we assume split I/D cache & TB (non-601)... */ 1228 .pvr_mask = 0x00000000, 1229 .pvr_value = 0x00000000, 1230 .cpu_name = "(generic PPC)", 1231 .cpu_features = CPU_FTRS_CLASSIC32, 1232 .cpu_user_features = COMMON_USER, 1233 .mmu_features = MMU_FTR_HPTE_TABLE, 1234 .icache_bsize = 32, 1235 .dcache_bsize = 32, 1236 .machine_check = machine_check_generic, 1237 .platform = "ppc603", 1238 }, 1239 #endif /* CONFIG_PPC_BOOK3S_6xx */ 1240 #ifdef CONFIG_PPC_8xx 1241 { /* 8xx */ 1242 .pvr_mask = 0xffff0000, 1243 .pvr_value = PVR_8xx, 1244 .cpu_name = "8xx", 1245 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1246 * if the 8xx code is there.... */ 1247 .cpu_features = CPU_FTRS_8XX, 1248 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1249 .mmu_features = MMU_FTR_TYPE_8xx, 1250 .icache_bsize = 16, 1251 .dcache_bsize = 16, 1252 .machine_check = machine_check_8xx, 1253 .platform = "ppc823", 1254 }, 1255 #endif /* CONFIG_PPC_8xx */ 1256 #ifdef CONFIG_40x 1257 { /* STB 04xxx */ 1258 .pvr_mask = 0xffff0000, 1259 .pvr_value = 0x41810000, 1260 .cpu_name = "STB04xxx", 1261 .cpu_features = CPU_FTRS_40X, 1262 .cpu_user_features = PPC_FEATURE_32 | 1263 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1264 .mmu_features = MMU_FTR_TYPE_40x, 1265 .icache_bsize = 32, 1266 .dcache_bsize = 32, 1267 .machine_check = machine_check_4xx, 1268 .platform = "ppc405", 1269 }, 1270 { /* NP405L */ 1271 .pvr_mask = 0xffff0000, 1272 .pvr_value = 0x41610000, 1273 .cpu_name = "NP405L", 1274 .cpu_features = CPU_FTRS_40X, 1275 .cpu_user_features = PPC_FEATURE_32 | 1276 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1277 .mmu_features = MMU_FTR_TYPE_40x, 1278 .icache_bsize = 32, 1279 .dcache_bsize = 32, 1280 .machine_check = machine_check_4xx, 1281 .platform = "ppc405", 1282 }, 1283 { /* NP4GS3 */ 1284 .pvr_mask = 0xffff0000, 1285 .pvr_value = 0x40B10000, 1286 .cpu_name = "NP4GS3", 1287 .cpu_features = CPU_FTRS_40X, 1288 .cpu_user_features = PPC_FEATURE_32 | 1289 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1290 .mmu_features = MMU_FTR_TYPE_40x, 1291 .icache_bsize = 32, 1292 .dcache_bsize = 32, 1293 .machine_check = machine_check_4xx, 1294 .platform = "ppc405", 1295 }, 1296 { /* NP405H */ 1297 .pvr_mask = 0xffff0000, 1298 .pvr_value = 0x41410000, 1299 .cpu_name = "NP405H", 1300 .cpu_features = CPU_FTRS_40X, 1301 .cpu_user_features = PPC_FEATURE_32 | 1302 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1303 .mmu_features = MMU_FTR_TYPE_40x, 1304 .icache_bsize = 32, 1305 .dcache_bsize = 32, 1306 .machine_check = machine_check_4xx, 1307 .platform = "ppc405", 1308 }, 1309 { /* 405GPr */ 1310 .pvr_mask = 0xffff0000, 1311 .pvr_value = 0x50910000, 1312 .cpu_name = "405GPr", 1313 .cpu_features = CPU_FTRS_40X, 1314 .cpu_user_features = PPC_FEATURE_32 | 1315 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1316 .mmu_features = MMU_FTR_TYPE_40x, 1317 .icache_bsize = 32, 1318 .dcache_bsize = 32, 1319 .machine_check = machine_check_4xx, 1320 .platform = "ppc405", 1321 }, 1322 { /* STBx25xx */ 1323 .pvr_mask = 0xffff0000, 1324 .pvr_value = 0x51510000, 1325 .cpu_name = "STBx25xx", 1326 .cpu_features = CPU_FTRS_40X, 1327 .cpu_user_features = PPC_FEATURE_32 | 1328 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1329 .mmu_features = MMU_FTR_TYPE_40x, 1330 .icache_bsize = 32, 1331 .dcache_bsize = 32, 1332 .machine_check = machine_check_4xx, 1333 .platform = "ppc405", 1334 }, 1335 { /* 405LP */ 1336 .pvr_mask = 0xffff0000, 1337 .pvr_value = 0x41F10000, 1338 .cpu_name = "405LP", 1339 .cpu_features = CPU_FTRS_40X, 1340 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1341 .mmu_features = MMU_FTR_TYPE_40x, 1342 .icache_bsize = 32, 1343 .dcache_bsize = 32, 1344 .machine_check = machine_check_4xx, 1345 .platform = "ppc405", 1346 }, 1347 { /* 405EP */ 1348 .pvr_mask = 0xffff0000, 1349 .pvr_value = 0x51210000, 1350 .cpu_name = "405EP", 1351 .cpu_features = CPU_FTRS_40X, 1352 .cpu_user_features = PPC_FEATURE_32 | 1353 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1354 .mmu_features = MMU_FTR_TYPE_40x, 1355 .icache_bsize = 32, 1356 .dcache_bsize = 32, 1357 .machine_check = machine_check_4xx, 1358 .platform = "ppc405", 1359 }, 1360 { /* 405EX Rev. A/B with Security */ 1361 .pvr_mask = 0xffff000f, 1362 .pvr_value = 0x12910007, 1363 .cpu_name = "405EX Rev. A/B", 1364 .cpu_features = CPU_FTRS_40X, 1365 .cpu_user_features = PPC_FEATURE_32 | 1366 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1367 .mmu_features = MMU_FTR_TYPE_40x, 1368 .icache_bsize = 32, 1369 .dcache_bsize = 32, 1370 .machine_check = machine_check_4xx, 1371 .platform = "ppc405", 1372 }, 1373 { /* 405EX Rev. C without Security */ 1374 .pvr_mask = 0xffff000f, 1375 .pvr_value = 0x1291000d, 1376 .cpu_name = "405EX Rev. C", 1377 .cpu_features = CPU_FTRS_40X, 1378 .cpu_user_features = PPC_FEATURE_32 | 1379 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1380 .mmu_features = MMU_FTR_TYPE_40x, 1381 .icache_bsize = 32, 1382 .dcache_bsize = 32, 1383 .machine_check = machine_check_4xx, 1384 .platform = "ppc405", 1385 }, 1386 { /* 405EX Rev. C with Security */ 1387 .pvr_mask = 0xffff000f, 1388 .pvr_value = 0x1291000f, 1389 .cpu_name = "405EX Rev. C", 1390 .cpu_features = CPU_FTRS_40X, 1391 .cpu_user_features = PPC_FEATURE_32 | 1392 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1393 .mmu_features = MMU_FTR_TYPE_40x, 1394 .icache_bsize = 32, 1395 .dcache_bsize = 32, 1396 .machine_check = machine_check_4xx, 1397 .platform = "ppc405", 1398 }, 1399 { /* 405EX Rev. D without Security */ 1400 .pvr_mask = 0xffff000f, 1401 .pvr_value = 0x12910003, 1402 .cpu_name = "405EX Rev. D", 1403 .cpu_features = CPU_FTRS_40X, 1404 .cpu_user_features = PPC_FEATURE_32 | 1405 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1406 .mmu_features = MMU_FTR_TYPE_40x, 1407 .icache_bsize = 32, 1408 .dcache_bsize = 32, 1409 .machine_check = machine_check_4xx, 1410 .platform = "ppc405", 1411 }, 1412 { /* 405EX Rev. D with Security */ 1413 .pvr_mask = 0xffff000f, 1414 .pvr_value = 0x12910005, 1415 .cpu_name = "405EX Rev. D", 1416 .cpu_features = CPU_FTRS_40X, 1417 .cpu_user_features = PPC_FEATURE_32 | 1418 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1419 .mmu_features = MMU_FTR_TYPE_40x, 1420 .icache_bsize = 32, 1421 .dcache_bsize = 32, 1422 .machine_check = machine_check_4xx, 1423 .platform = "ppc405", 1424 }, 1425 { /* 405EXr Rev. A/B without Security */ 1426 .pvr_mask = 0xffff000f, 1427 .pvr_value = 0x12910001, 1428 .cpu_name = "405EXr Rev. A/B", 1429 .cpu_features = CPU_FTRS_40X, 1430 .cpu_user_features = PPC_FEATURE_32 | 1431 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1432 .mmu_features = MMU_FTR_TYPE_40x, 1433 .icache_bsize = 32, 1434 .dcache_bsize = 32, 1435 .machine_check = machine_check_4xx, 1436 .platform = "ppc405", 1437 }, 1438 { /* 405EXr Rev. C without Security */ 1439 .pvr_mask = 0xffff000f, 1440 .pvr_value = 0x12910009, 1441 .cpu_name = "405EXr Rev. C", 1442 .cpu_features = CPU_FTRS_40X, 1443 .cpu_user_features = PPC_FEATURE_32 | 1444 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1445 .mmu_features = MMU_FTR_TYPE_40x, 1446 .icache_bsize = 32, 1447 .dcache_bsize = 32, 1448 .machine_check = machine_check_4xx, 1449 .platform = "ppc405", 1450 }, 1451 { /* 405EXr Rev. C with Security */ 1452 .pvr_mask = 0xffff000f, 1453 .pvr_value = 0x1291000b, 1454 .cpu_name = "405EXr Rev. C", 1455 .cpu_features = CPU_FTRS_40X, 1456 .cpu_user_features = PPC_FEATURE_32 | 1457 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1458 .mmu_features = MMU_FTR_TYPE_40x, 1459 .icache_bsize = 32, 1460 .dcache_bsize = 32, 1461 .machine_check = machine_check_4xx, 1462 .platform = "ppc405", 1463 }, 1464 { /* 405EXr Rev. D without Security */ 1465 .pvr_mask = 0xffff000f, 1466 .pvr_value = 0x12910000, 1467 .cpu_name = "405EXr Rev. D", 1468 .cpu_features = CPU_FTRS_40X, 1469 .cpu_user_features = PPC_FEATURE_32 | 1470 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1471 .mmu_features = MMU_FTR_TYPE_40x, 1472 .icache_bsize = 32, 1473 .dcache_bsize = 32, 1474 .machine_check = machine_check_4xx, 1475 .platform = "ppc405", 1476 }, 1477 { /* 405EXr Rev. D with Security */ 1478 .pvr_mask = 0xffff000f, 1479 .pvr_value = 0x12910002, 1480 .cpu_name = "405EXr Rev. D", 1481 .cpu_features = CPU_FTRS_40X, 1482 .cpu_user_features = PPC_FEATURE_32 | 1483 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1484 .mmu_features = MMU_FTR_TYPE_40x, 1485 .icache_bsize = 32, 1486 .dcache_bsize = 32, 1487 .machine_check = machine_check_4xx, 1488 .platform = "ppc405", 1489 }, 1490 { 1491 /* 405EZ */ 1492 .pvr_mask = 0xffff0000, 1493 .pvr_value = 0x41510000, 1494 .cpu_name = "405EZ", 1495 .cpu_features = CPU_FTRS_40X, 1496 .cpu_user_features = PPC_FEATURE_32 | 1497 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1498 .mmu_features = MMU_FTR_TYPE_40x, 1499 .icache_bsize = 32, 1500 .dcache_bsize = 32, 1501 .machine_check = machine_check_4xx, 1502 .platform = "ppc405", 1503 }, 1504 { /* APM8018X */ 1505 .pvr_mask = 0xffff0000, 1506 .pvr_value = 0x7ff11432, 1507 .cpu_name = "APM8018X", 1508 .cpu_features = CPU_FTRS_40X, 1509 .cpu_user_features = PPC_FEATURE_32 | 1510 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1511 .mmu_features = MMU_FTR_TYPE_40x, 1512 .icache_bsize = 32, 1513 .dcache_bsize = 32, 1514 .machine_check = machine_check_4xx, 1515 .platform = "ppc405", 1516 }, 1517 { /* default match */ 1518 .pvr_mask = 0x00000000, 1519 .pvr_value = 0x00000000, 1520 .cpu_name = "(generic 40x PPC)", 1521 .cpu_features = CPU_FTRS_40X, 1522 .cpu_user_features = PPC_FEATURE_32 | 1523 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1524 .mmu_features = MMU_FTR_TYPE_40x, 1525 .icache_bsize = 32, 1526 .dcache_bsize = 32, 1527 .machine_check = machine_check_4xx, 1528 .platform = "ppc405", 1529 } 1530 1531 #endif /* CONFIG_40x */ 1532 #ifdef CONFIG_44x 1533 { 1534 .pvr_mask = 0xf0000fff, 1535 .pvr_value = 0x40000850, 1536 .cpu_name = "440GR Rev. A", 1537 .cpu_features = CPU_FTRS_44X, 1538 .cpu_user_features = COMMON_USER_BOOKE, 1539 .mmu_features = MMU_FTR_TYPE_44x, 1540 .icache_bsize = 32, 1541 .dcache_bsize = 32, 1542 .machine_check = machine_check_4xx, 1543 .platform = "ppc440", 1544 }, 1545 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1546 .pvr_mask = 0xf0000fff, 1547 .pvr_value = 0x40000858, 1548 .cpu_name = "440EP Rev. A", 1549 .cpu_features = CPU_FTRS_44X, 1550 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1551 .mmu_features = MMU_FTR_TYPE_44x, 1552 .icache_bsize = 32, 1553 .dcache_bsize = 32, 1554 .cpu_setup = __setup_cpu_440ep, 1555 .machine_check = machine_check_4xx, 1556 .platform = "ppc440", 1557 }, 1558 { 1559 .pvr_mask = 0xf0000fff, 1560 .pvr_value = 0x400008d3, 1561 .cpu_name = "440GR Rev. B", 1562 .cpu_features = CPU_FTRS_44X, 1563 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1564 .mmu_features = MMU_FTR_TYPE_44x, 1565 .icache_bsize = 32, 1566 .dcache_bsize = 32, 1567 .machine_check = machine_check_4xx, 1568 .platform = "ppc440", 1569 }, 1570 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1571 .pvr_mask = 0xf0000ff7, 1572 .pvr_value = 0x400008d4, 1573 .cpu_name = "440EP Rev. C", 1574 .cpu_features = CPU_FTRS_44X, 1575 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1576 .mmu_features = MMU_FTR_TYPE_44x, 1577 .icache_bsize = 32, 1578 .dcache_bsize = 32, 1579 .cpu_setup = __setup_cpu_440ep, 1580 .machine_check = machine_check_4xx, 1581 .platform = "ppc440", 1582 }, 1583 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1584 .pvr_mask = 0xf0000fff, 1585 .pvr_value = 0x400008db, 1586 .cpu_name = "440EP Rev. B", 1587 .cpu_features = CPU_FTRS_44X, 1588 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1589 .mmu_features = MMU_FTR_TYPE_44x, 1590 .icache_bsize = 32, 1591 .dcache_bsize = 32, 1592 .cpu_setup = __setup_cpu_440ep, 1593 .machine_check = machine_check_4xx, 1594 .platform = "ppc440", 1595 }, 1596 { /* 440GRX */ 1597 .pvr_mask = 0xf0000ffb, 1598 .pvr_value = 0x200008D0, 1599 .cpu_name = "440GRX", 1600 .cpu_features = CPU_FTRS_44X, 1601 .cpu_user_features = COMMON_USER_BOOKE, 1602 .mmu_features = MMU_FTR_TYPE_44x, 1603 .icache_bsize = 32, 1604 .dcache_bsize = 32, 1605 .cpu_setup = __setup_cpu_440grx, 1606 .machine_check = machine_check_440A, 1607 .platform = "ppc440", 1608 }, 1609 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1610 .pvr_mask = 0xf0000ffb, 1611 .pvr_value = 0x200008D8, 1612 .cpu_name = "440EPX", 1613 .cpu_features = CPU_FTRS_44X, 1614 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1615 .mmu_features = MMU_FTR_TYPE_44x, 1616 .icache_bsize = 32, 1617 .dcache_bsize = 32, 1618 .cpu_setup = __setup_cpu_440epx, 1619 .machine_check = machine_check_440A, 1620 .platform = "ppc440", 1621 }, 1622 { /* 440GP Rev. B */ 1623 .pvr_mask = 0xf0000fff, 1624 .pvr_value = 0x40000440, 1625 .cpu_name = "440GP Rev. B", 1626 .cpu_features = CPU_FTRS_44X, 1627 .cpu_user_features = COMMON_USER_BOOKE, 1628 .mmu_features = MMU_FTR_TYPE_44x, 1629 .icache_bsize = 32, 1630 .dcache_bsize = 32, 1631 .machine_check = machine_check_4xx, 1632 .platform = "ppc440gp", 1633 }, 1634 { /* 440GP Rev. C */ 1635 .pvr_mask = 0xf0000fff, 1636 .pvr_value = 0x40000481, 1637 .cpu_name = "440GP Rev. C", 1638 .cpu_features = CPU_FTRS_44X, 1639 .cpu_user_features = COMMON_USER_BOOKE, 1640 .mmu_features = MMU_FTR_TYPE_44x, 1641 .icache_bsize = 32, 1642 .dcache_bsize = 32, 1643 .machine_check = machine_check_4xx, 1644 .platform = "ppc440gp", 1645 }, 1646 { /* 440GX Rev. A */ 1647 .pvr_mask = 0xf0000fff, 1648 .pvr_value = 0x50000850, 1649 .cpu_name = "440GX Rev. A", 1650 .cpu_features = CPU_FTRS_44X, 1651 .cpu_user_features = COMMON_USER_BOOKE, 1652 .mmu_features = MMU_FTR_TYPE_44x, 1653 .icache_bsize = 32, 1654 .dcache_bsize = 32, 1655 .cpu_setup = __setup_cpu_440gx, 1656 .machine_check = machine_check_440A, 1657 .platform = "ppc440", 1658 }, 1659 { /* 440GX Rev. B */ 1660 .pvr_mask = 0xf0000fff, 1661 .pvr_value = 0x50000851, 1662 .cpu_name = "440GX Rev. B", 1663 .cpu_features = CPU_FTRS_44X, 1664 .cpu_user_features = COMMON_USER_BOOKE, 1665 .mmu_features = MMU_FTR_TYPE_44x, 1666 .icache_bsize = 32, 1667 .dcache_bsize = 32, 1668 .cpu_setup = __setup_cpu_440gx, 1669 .machine_check = machine_check_440A, 1670 .platform = "ppc440", 1671 }, 1672 { /* 440GX Rev. C */ 1673 .pvr_mask = 0xf0000fff, 1674 .pvr_value = 0x50000892, 1675 .cpu_name = "440GX Rev. C", 1676 .cpu_features = CPU_FTRS_44X, 1677 .cpu_user_features = COMMON_USER_BOOKE, 1678 .mmu_features = MMU_FTR_TYPE_44x, 1679 .icache_bsize = 32, 1680 .dcache_bsize = 32, 1681 .cpu_setup = __setup_cpu_440gx, 1682 .machine_check = machine_check_440A, 1683 .platform = "ppc440", 1684 }, 1685 { /* 440GX Rev. F */ 1686 .pvr_mask = 0xf0000fff, 1687 .pvr_value = 0x50000894, 1688 .cpu_name = "440GX Rev. F", 1689 .cpu_features = CPU_FTRS_44X, 1690 .cpu_user_features = COMMON_USER_BOOKE, 1691 .mmu_features = MMU_FTR_TYPE_44x, 1692 .icache_bsize = 32, 1693 .dcache_bsize = 32, 1694 .cpu_setup = __setup_cpu_440gx, 1695 .machine_check = machine_check_440A, 1696 .platform = "ppc440", 1697 }, 1698 { /* 440SP Rev. A */ 1699 .pvr_mask = 0xfff00fff, 1700 .pvr_value = 0x53200891, 1701 .cpu_name = "440SP Rev. A", 1702 .cpu_features = CPU_FTRS_44X, 1703 .cpu_user_features = COMMON_USER_BOOKE, 1704 .mmu_features = MMU_FTR_TYPE_44x, 1705 .icache_bsize = 32, 1706 .dcache_bsize = 32, 1707 .machine_check = machine_check_4xx, 1708 .platform = "ppc440", 1709 }, 1710 { /* 440SPe Rev. A */ 1711 .pvr_mask = 0xfff00fff, 1712 .pvr_value = 0x53400890, 1713 .cpu_name = "440SPe Rev. A", 1714 .cpu_features = CPU_FTRS_44X, 1715 .cpu_user_features = COMMON_USER_BOOKE, 1716 .mmu_features = MMU_FTR_TYPE_44x, 1717 .icache_bsize = 32, 1718 .dcache_bsize = 32, 1719 .cpu_setup = __setup_cpu_440spe, 1720 .machine_check = machine_check_440A, 1721 .platform = "ppc440", 1722 }, 1723 { /* 440SPe Rev. B */ 1724 .pvr_mask = 0xfff00fff, 1725 .pvr_value = 0x53400891, 1726 .cpu_name = "440SPe Rev. B", 1727 .cpu_features = CPU_FTRS_44X, 1728 .cpu_user_features = COMMON_USER_BOOKE, 1729 .mmu_features = MMU_FTR_TYPE_44x, 1730 .icache_bsize = 32, 1731 .dcache_bsize = 32, 1732 .cpu_setup = __setup_cpu_440spe, 1733 .machine_check = machine_check_440A, 1734 .platform = "ppc440", 1735 }, 1736 { /* 460EX */ 1737 .pvr_mask = 0xffff0006, 1738 .pvr_value = 0x13020002, 1739 .cpu_name = "460EX", 1740 .cpu_features = CPU_FTRS_440x6, 1741 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1742 .mmu_features = MMU_FTR_TYPE_44x, 1743 .icache_bsize = 32, 1744 .dcache_bsize = 32, 1745 .cpu_setup = __setup_cpu_460ex, 1746 .machine_check = machine_check_440A, 1747 .platform = "ppc440", 1748 }, 1749 { /* 460EX Rev B */ 1750 .pvr_mask = 0xffff0007, 1751 .pvr_value = 0x13020004, 1752 .cpu_name = "460EX Rev. B", 1753 .cpu_features = CPU_FTRS_440x6, 1754 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1755 .mmu_features = MMU_FTR_TYPE_44x, 1756 .icache_bsize = 32, 1757 .dcache_bsize = 32, 1758 .cpu_setup = __setup_cpu_460ex, 1759 .machine_check = machine_check_440A, 1760 .platform = "ppc440", 1761 }, 1762 { /* 460GT */ 1763 .pvr_mask = 0xffff0006, 1764 .pvr_value = 0x13020000, 1765 .cpu_name = "460GT", 1766 .cpu_features = CPU_FTRS_440x6, 1767 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1768 .mmu_features = MMU_FTR_TYPE_44x, 1769 .icache_bsize = 32, 1770 .dcache_bsize = 32, 1771 .cpu_setup = __setup_cpu_460gt, 1772 .machine_check = machine_check_440A, 1773 .platform = "ppc440", 1774 }, 1775 { /* 460GT Rev B */ 1776 .pvr_mask = 0xffff0007, 1777 .pvr_value = 0x13020005, 1778 .cpu_name = "460GT Rev. B", 1779 .cpu_features = CPU_FTRS_440x6, 1780 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1781 .mmu_features = MMU_FTR_TYPE_44x, 1782 .icache_bsize = 32, 1783 .dcache_bsize = 32, 1784 .cpu_setup = __setup_cpu_460gt, 1785 .machine_check = machine_check_440A, 1786 .platform = "ppc440", 1787 }, 1788 { /* 460SX */ 1789 .pvr_mask = 0xffffff00, 1790 .pvr_value = 0x13541800, 1791 .cpu_name = "460SX", 1792 .cpu_features = CPU_FTRS_44X, 1793 .cpu_user_features = COMMON_USER_BOOKE, 1794 .mmu_features = MMU_FTR_TYPE_44x, 1795 .icache_bsize = 32, 1796 .dcache_bsize = 32, 1797 .cpu_setup = __setup_cpu_460sx, 1798 .machine_check = machine_check_440A, 1799 .platform = "ppc440", 1800 }, 1801 { /* 464 in APM821xx */ 1802 .pvr_mask = 0xfffffff0, 1803 .pvr_value = 0x12C41C80, 1804 .cpu_name = "APM821XX", 1805 .cpu_features = CPU_FTRS_44X, 1806 .cpu_user_features = COMMON_USER_BOOKE | 1807 PPC_FEATURE_HAS_FPU, 1808 .mmu_features = MMU_FTR_TYPE_44x, 1809 .icache_bsize = 32, 1810 .dcache_bsize = 32, 1811 .cpu_setup = __setup_cpu_apm821xx, 1812 .machine_check = machine_check_440A, 1813 .platform = "ppc440", 1814 }, 1815 #ifdef CONFIG_PPC_47x 1816 { /* 476 DD2 core */ 1817 .pvr_mask = 0xffffffff, 1818 .pvr_value = 0x11a52080, 1819 .cpu_name = "476", 1820 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1821 .cpu_user_features = COMMON_USER_BOOKE | 1822 PPC_FEATURE_HAS_FPU, 1823 .mmu_features = MMU_FTR_TYPE_47x | 1824 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1825 .icache_bsize = 32, 1826 .dcache_bsize = 128, 1827 .machine_check = machine_check_47x, 1828 .platform = "ppc470", 1829 }, 1830 { /* 476fpe */ 1831 .pvr_mask = 0xffff0000, 1832 .pvr_value = 0x7ff50000, 1833 .cpu_name = "476fpe", 1834 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1835 .cpu_user_features = COMMON_USER_BOOKE | 1836 PPC_FEATURE_HAS_FPU, 1837 .mmu_features = MMU_FTR_TYPE_47x | 1838 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1839 .icache_bsize = 32, 1840 .dcache_bsize = 128, 1841 .machine_check = machine_check_47x, 1842 .platform = "ppc470", 1843 }, 1844 { /* 476 iss */ 1845 .pvr_mask = 0xffff0000, 1846 .pvr_value = 0x00050000, 1847 .cpu_name = "476", 1848 .cpu_features = CPU_FTRS_47X, 1849 .cpu_user_features = COMMON_USER_BOOKE | 1850 PPC_FEATURE_HAS_FPU, 1851 .mmu_features = MMU_FTR_TYPE_47x | 1852 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1853 .icache_bsize = 32, 1854 .dcache_bsize = 128, 1855 .machine_check = machine_check_47x, 1856 .platform = "ppc470", 1857 }, 1858 { /* 476 others */ 1859 .pvr_mask = 0xffff0000, 1860 .pvr_value = 0x11a50000, 1861 .cpu_name = "476", 1862 .cpu_features = CPU_FTRS_47X, 1863 .cpu_user_features = COMMON_USER_BOOKE | 1864 PPC_FEATURE_HAS_FPU, 1865 .mmu_features = MMU_FTR_TYPE_47x | 1866 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1867 .icache_bsize = 32, 1868 .dcache_bsize = 128, 1869 .machine_check = machine_check_47x, 1870 .platform = "ppc470", 1871 }, 1872 #endif /* CONFIG_PPC_47x */ 1873 { /* default match */ 1874 .pvr_mask = 0x00000000, 1875 .pvr_value = 0x00000000, 1876 .cpu_name = "(generic 44x PPC)", 1877 .cpu_features = CPU_FTRS_44X, 1878 .cpu_user_features = COMMON_USER_BOOKE, 1879 .mmu_features = MMU_FTR_TYPE_44x, 1880 .icache_bsize = 32, 1881 .dcache_bsize = 32, 1882 .machine_check = machine_check_4xx, 1883 .platform = "ppc440", 1884 } 1885 #endif /* CONFIG_44x */ 1886 #ifdef CONFIG_E200 1887 { /* e200z5 */ 1888 .pvr_mask = 0xfff00000, 1889 .pvr_value = 0x81000000, 1890 .cpu_name = "e200z5", 1891 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1892 .cpu_features = CPU_FTRS_E200, 1893 .cpu_user_features = COMMON_USER_BOOKE | 1894 PPC_FEATURE_HAS_EFP_SINGLE | 1895 PPC_FEATURE_UNIFIED_CACHE, 1896 .mmu_features = MMU_FTR_TYPE_FSL_E, 1897 .dcache_bsize = 32, 1898 .machine_check = machine_check_e200, 1899 .platform = "ppc5554", 1900 }, 1901 { /* e200z6 */ 1902 .pvr_mask = 0xfff00000, 1903 .pvr_value = 0x81100000, 1904 .cpu_name = "e200z6", 1905 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1906 .cpu_features = CPU_FTRS_E200, 1907 .cpu_user_features = COMMON_USER_BOOKE | 1908 PPC_FEATURE_HAS_SPE_COMP | 1909 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1910 PPC_FEATURE_UNIFIED_CACHE, 1911 .mmu_features = MMU_FTR_TYPE_FSL_E, 1912 .dcache_bsize = 32, 1913 .machine_check = machine_check_e200, 1914 .platform = "ppc5554", 1915 }, 1916 { /* default match */ 1917 .pvr_mask = 0x00000000, 1918 .pvr_value = 0x00000000, 1919 .cpu_name = "(generic E200 PPC)", 1920 .cpu_features = CPU_FTRS_E200, 1921 .cpu_user_features = COMMON_USER_BOOKE | 1922 PPC_FEATURE_HAS_EFP_SINGLE | 1923 PPC_FEATURE_UNIFIED_CACHE, 1924 .mmu_features = MMU_FTR_TYPE_FSL_E, 1925 .dcache_bsize = 32, 1926 .cpu_setup = __setup_cpu_e200, 1927 .machine_check = machine_check_e200, 1928 .platform = "ppc5554", 1929 } 1930 #endif /* CONFIG_E200 */ 1931 #endif /* CONFIG_PPC32 */ 1932 #ifdef CONFIG_E500 1933 #ifdef CONFIG_PPC32 1934 #ifndef CONFIG_PPC_E500MC 1935 { /* e500 */ 1936 .pvr_mask = 0xffff0000, 1937 .pvr_value = 0x80200000, 1938 .cpu_name = "e500", 1939 .cpu_features = CPU_FTRS_E500, 1940 .cpu_user_features = COMMON_USER_BOOKE | 1941 PPC_FEATURE_HAS_SPE_COMP | 1942 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1943 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1944 .mmu_features = MMU_FTR_TYPE_FSL_E, 1945 .icache_bsize = 32, 1946 .dcache_bsize = 32, 1947 .num_pmcs = 4, 1948 .oprofile_cpu_type = "ppc/e500", 1949 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1950 .cpu_setup = __setup_cpu_e500v1, 1951 .machine_check = machine_check_e500, 1952 .platform = "ppc8540", 1953 }, 1954 { /* e500v2 */ 1955 .pvr_mask = 0xffff0000, 1956 .pvr_value = 0x80210000, 1957 .cpu_name = "e500v2", 1958 .cpu_features = CPU_FTRS_E500_2, 1959 .cpu_user_features = COMMON_USER_BOOKE | 1960 PPC_FEATURE_HAS_SPE_COMP | 1961 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1962 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1963 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1964 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1965 .icache_bsize = 32, 1966 .dcache_bsize = 32, 1967 .num_pmcs = 4, 1968 .oprofile_cpu_type = "ppc/e500", 1969 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1970 .cpu_setup = __setup_cpu_e500v2, 1971 .machine_check = machine_check_e500, 1972 .platform = "ppc8548", 1973 .cpu_down_flush = cpu_down_flush_e500v2, 1974 }, 1975 #else 1976 { /* e500mc */ 1977 .pvr_mask = 0xffff0000, 1978 .pvr_value = 0x80230000, 1979 .cpu_name = "e500mc", 1980 .cpu_features = CPU_FTRS_E500MC, 1981 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1982 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1983 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1984 MMU_FTR_USE_TLBILX, 1985 .icache_bsize = 64, 1986 .dcache_bsize = 64, 1987 .num_pmcs = 4, 1988 .oprofile_cpu_type = "ppc/e500mc", 1989 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1990 .cpu_setup = __setup_cpu_e500mc, 1991 .machine_check = machine_check_e500mc, 1992 .platform = "ppce500mc", 1993 .cpu_down_flush = cpu_down_flush_e500mc, 1994 }, 1995 #endif /* CONFIG_PPC_E500MC */ 1996 #endif /* CONFIG_PPC32 */ 1997 #ifdef CONFIG_PPC_E500MC 1998 { /* e5500 */ 1999 .pvr_mask = 0xffff0000, 2000 .pvr_value = 0x80240000, 2001 .cpu_name = "e5500", 2002 .cpu_features = CPU_FTRS_E5500, 2003 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2004 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2005 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2006 MMU_FTR_USE_TLBILX, 2007 .icache_bsize = 64, 2008 .dcache_bsize = 64, 2009 .num_pmcs = 4, 2010 .oprofile_cpu_type = "ppc/e500mc", 2011 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2012 .cpu_setup = __setup_cpu_e5500, 2013 #ifndef CONFIG_PPC32 2014 .cpu_restore = __restore_cpu_e5500, 2015 #endif 2016 .machine_check = machine_check_e500mc, 2017 .platform = "ppce5500", 2018 .cpu_down_flush = cpu_down_flush_e5500, 2019 }, 2020 { /* e6500 */ 2021 .pvr_mask = 0xffff0000, 2022 .pvr_value = 0x80400000, 2023 .cpu_name = "e6500", 2024 .cpu_features = CPU_FTRS_E6500, 2025 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2026 PPC_FEATURE_HAS_ALTIVEC_COMP, 2027 .cpu_user_features2 = PPC_FEATURE2_ISEL, 2028 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2029 MMU_FTR_USE_TLBILX, 2030 .icache_bsize = 64, 2031 .dcache_bsize = 64, 2032 .num_pmcs = 6, 2033 .oprofile_cpu_type = "ppc/e6500", 2034 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2035 .cpu_setup = __setup_cpu_e6500, 2036 #ifndef CONFIG_PPC32 2037 .cpu_restore = __restore_cpu_e6500, 2038 #endif 2039 .machine_check = machine_check_e500mc, 2040 .platform = "ppce6500", 2041 .cpu_down_flush = cpu_down_flush_e6500, 2042 }, 2043 #endif /* CONFIG_PPC_E500MC */ 2044 #ifdef CONFIG_PPC32 2045 { /* default match */ 2046 .pvr_mask = 0x00000000, 2047 .pvr_value = 0x00000000, 2048 .cpu_name = "(generic E500 PPC)", 2049 .cpu_features = CPU_FTRS_E500, 2050 .cpu_user_features = COMMON_USER_BOOKE | 2051 PPC_FEATURE_HAS_SPE_COMP | 2052 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2053 .mmu_features = MMU_FTR_TYPE_FSL_E, 2054 .icache_bsize = 32, 2055 .dcache_bsize = 32, 2056 .machine_check = machine_check_e500, 2057 .platform = "powerpc", 2058 } 2059 #endif /* CONFIG_PPC32 */ 2060 #endif /* CONFIG_E500 */ 2061 }; 2062 2063 void __init set_cur_cpu_spec(struct cpu_spec *s) 2064 { 2065 struct cpu_spec *t = &the_cpu_spec; 2066 2067 t = PTRRELOC(t); 2068 /* 2069 * use memcpy() instead of *t = *s so that GCC replaces it 2070 * by __memcpy() when KASAN is active 2071 */ 2072 memcpy(t, s, sizeof(*t)); 2073 2074 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2075 } 2076 2077 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2078 struct cpu_spec *s) 2079 { 2080 struct cpu_spec *t = &the_cpu_spec; 2081 struct cpu_spec old; 2082 2083 t = PTRRELOC(t); 2084 old = *t; 2085 2086 /* 2087 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2088 * so that GCC replaces it by __memcpy() when KASAN is active 2089 */ 2090 memcpy(t, s, sizeof(*t)); 2091 2092 /* 2093 * If we are overriding a previous value derived from the real 2094 * PVR with a new value obtained using a logical PVR value, 2095 * don't modify the performance monitor fields. 2096 */ 2097 if (old.num_pmcs && !s->num_pmcs) { 2098 t->num_pmcs = old.num_pmcs; 2099 t->pmc_type = old.pmc_type; 2100 t->oprofile_type = old.oprofile_type; 2101 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2102 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2103 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2104 2105 /* 2106 * If we have passed through this logic once before and 2107 * have pulled the default case because the real PVR was 2108 * not found inside cpu_specs[], then we are possibly 2109 * running in compatibility mode. In that case, let the 2110 * oprofiler know which set of compatibility counters to 2111 * pull from by making sure the oprofile_cpu_type string 2112 * is set to that of compatibility mode. If the 2113 * oprofile_cpu_type already has a value, then we are 2114 * possibly overriding a real PVR with a logical one, 2115 * and, in that case, keep the current value for 2116 * oprofile_cpu_type. Futhermore, let's ensure that the 2117 * fix for the PMAO bug is enabled on compatibility mode. 2118 */ 2119 if (old.oprofile_cpu_type != NULL) { 2120 t->oprofile_cpu_type = old.oprofile_cpu_type; 2121 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2122 } 2123 } 2124 2125 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2126 2127 /* 2128 * Set the base platform string once; assumes 2129 * we're called with real pvr first. 2130 */ 2131 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2132 *PTRRELOC(&powerpc_base_platform) = t->platform; 2133 2134 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2135 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2136 * that processor. I will consolidate that at a later time, for now, 2137 * just use #ifdef. We also don't need to PTRRELOC the function 2138 * pointer on ppc64 and booke as we are running at 0 in real mode 2139 * on ppc64 and reloc_offset is always 0 on booke. 2140 */ 2141 if (t->cpu_setup) { 2142 t->cpu_setup(offset, t); 2143 } 2144 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2145 2146 return t; 2147 } 2148 2149 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2150 { 2151 struct cpu_spec *s = cpu_specs; 2152 int i; 2153 2154 s = PTRRELOC(s); 2155 2156 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2157 if ((pvr & s->pvr_mask) == s->pvr_value) 2158 return setup_cpu_spec(offset, s); 2159 } 2160 2161 BUG(); 2162 2163 return NULL; 2164 } 2165 2166 /* 2167 * Used by cpufeatures to get the name for CPUs with a PVR table. 2168 * If they don't hae a PVR table, cpufeatures gets the name from 2169 * cpu device-tree node. 2170 */ 2171 void __init identify_cpu_name(unsigned int pvr) 2172 { 2173 struct cpu_spec *s = cpu_specs; 2174 struct cpu_spec *t = &the_cpu_spec; 2175 int i; 2176 2177 s = PTRRELOC(s); 2178 t = PTRRELOC(t); 2179 2180 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2181 if ((pvr & s->pvr_mask) == s->pvr_value) { 2182 t->cpu_name = s->cpu_name; 2183 return; 2184 } 2185 } 2186 } 2187 2188 2189 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2190 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2191 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2192 }; 2193 EXPORT_SYMBOL_GPL(cpu_feature_keys); 2194 2195 void __init cpu_feature_keys_init(void) 2196 { 2197 int i; 2198 2199 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2200 unsigned long f = 1ul << i; 2201 2202 if (!(cur_cpu_spec->cpu_features & f)) 2203 static_branch_disable(&cpu_feature_keys[i]); 2204 } 2205 } 2206 2207 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2208 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2209 }; 2210 EXPORT_SYMBOL_GPL(mmu_feature_keys); 2211 2212 void __init mmu_feature_keys_init(void) 2213 { 2214 int i; 2215 2216 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2217 unsigned long f = 1ul << i; 2218 2219 if (!(cur_cpu_spec->mmu_features & f)) 2220 static_branch_disable(&mmu_feature_keys[i]); 2221 } 2222 } 2223 #endif 2224