1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 23 struct cpu_spec* cur_cpu_spec = NULL; 24 EXPORT_SYMBOL(cur_cpu_spec); 25 26 /* NOTE: 27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 28 * the responsibility of the appropriate CPU save/restore functions to 29 * eventually copy these settings over. Those save/restore aren't yet 30 * part of the cputable though. That has to be fixed for both ppc32 31 * and ppc64 32 */ 33 #ifdef CONFIG_PPC32 34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 42 #endif /* CONFIG_PPC32 */ 43 #ifdef CONFIG_PPC64 44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 47 extern void __restore_cpu_pa6t(void); 48 extern void __restore_cpu_ppc970(void); 49 #endif /* CONFIG_PPC64 */ 50 51 /* This table only contains "desktop" CPUs, it need to be filled with embedded 52 * ones as well... 53 */ 54 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 55 PPC_FEATURE_HAS_MMU) 56 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 57 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 58 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 60 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 62 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 63 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 64 PPC_FEATURE_TRUE_LE) 65 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 66 PPC_FEATURE_TRUE_LE | \ 67 PPC_FEATURE_HAS_ALTIVEC_COMP) 68 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 69 PPC_FEATURE_BOOKE) 70 71 /* We only set the spe features if the kernel was compiled with 72 * spe support 73 */ 74 #ifdef CONFIG_SPE 75 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE 76 #else 77 #define PPC_FEATURE_SPE_COMP 0 78 #endif 79 80 static struct cpu_spec cpu_specs[] = { 81 #ifdef CONFIG_PPC64 82 { /* Power3 */ 83 .pvr_mask = 0xffff0000, 84 .pvr_value = 0x00400000, 85 .cpu_name = "POWER3 (630)", 86 .cpu_features = CPU_FTRS_POWER3, 87 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 88 .icache_bsize = 128, 89 .dcache_bsize = 128, 90 .num_pmcs = 8, 91 .pmc_type = PPC_PMC_IBM, 92 .oprofile_cpu_type = "ppc64/power3", 93 .oprofile_type = PPC_OPROFILE_RS64, 94 .platform = "power3", 95 }, 96 { /* Power3+ */ 97 .pvr_mask = 0xffff0000, 98 .pvr_value = 0x00410000, 99 .cpu_name = "POWER3 (630+)", 100 .cpu_features = CPU_FTRS_POWER3, 101 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 102 .icache_bsize = 128, 103 .dcache_bsize = 128, 104 .num_pmcs = 8, 105 .pmc_type = PPC_PMC_IBM, 106 .oprofile_cpu_type = "ppc64/power3", 107 .oprofile_type = PPC_OPROFILE_RS64, 108 .platform = "power3", 109 }, 110 { /* Northstar */ 111 .pvr_mask = 0xffff0000, 112 .pvr_value = 0x00330000, 113 .cpu_name = "RS64-II (northstar)", 114 .cpu_features = CPU_FTRS_RS64, 115 .cpu_user_features = COMMON_USER_PPC64, 116 .icache_bsize = 128, 117 .dcache_bsize = 128, 118 .num_pmcs = 8, 119 .pmc_type = PPC_PMC_IBM, 120 .oprofile_cpu_type = "ppc64/rs64", 121 .oprofile_type = PPC_OPROFILE_RS64, 122 .platform = "rs64", 123 }, 124 { /* Pulsar */ 125 .pvr_mask = 0xffff0000, 126 .pvr_value = 0x00340000, 127 .cpu_name = "RS64-III (pulsar)", 128 .cpu_features = CPU_FTRS_RS64, 129 .cpu_user_features = COMMON_USER_PPC64, 130 .icache_bsize = 128, 131 .dcache_bsize = 128, 132 .num_pmcs = 8, 133 .pmc_type = PPC_PMC_IBM, 134 .oprofile_cpu_type = "ppc64/rs64", 135 .oprofile_type = PPC_OPROFILE_RS64, 136 .platform = "rs64", 137 }, 138 { /* I-star */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00360000, 141 .cpu_name = "RS64-III (icestar)", 142 .cpu_features = CPU_FTRS_RS64, 143 .cpu_user_features = COMMON_USER_PPC64, 144 .icache_bsize = 128, 145 .dcache_bsize = 128, 146 .num_pmcs = 8, 147 .pmc_type = PPC_PMC_IBM, 148 .oprofile_cpu_type = "ppc64/rs64", 149 .oprofile_type = PPC_OPROFILE_RS64, 150 .platform = "rs64", 151 }, 152 { /* S-star */ 153 .pvr_mask = 0xffff0000, 154 .pvr_value = 0x00370000, 155 .cpu_name = "RS64-IV (sstar)", 156 .cpu_features = CPU_FTRS_RS64, 157 .cpu_user_features = COMMON_USER_PPC64, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .oprofile_cpu_type = "ppc64/rs64", 163 .oprofile_type = PPC_OPROFILE_RS64, 164 .platform = "rs64", 165 }, 166 { /* Power4 */ 167 .pvr_mask = 0xffff0000, 168 .pvr_value = 0x00350000, 169 .cpu_name = "POWER4 (gp)", 170 .cpu_features = CPU_FTRS_POWER4, 171 .cpu_user_features = COMMON_USER_POWER4, 172 .icache_bsize = 128, 173 .dcache_bsize = 128, 174 .num_pmcs = 8, 175 .pmc_type = PPC_PMC_IBM, 176 .oprofile_cpu_type = "ppc64/power4", 177 .oprofile_type = PPC_OPROFILE_POWER4, 178 .platform = "power4", 179 }, 180 { /* Power4+ */ 181 .pvr_mask = 0xffff0000, 182 .pvr_value = 0x00380000, 183 .cpu_name = "POWER4+ (gq)", 184 .cpu_features = CPU_FTRS_POWER4, 185 .cpu_user_features = COMMON_USER_POWER4, 186 .icache_bsize = 128, 187 .dcache_bsize = 128, 188 .num_pmcs = 8, 189 .pmc_type = PPC_PMC_IBM, 190 .oprofile_cpu_type = "ppc64/power4", 191 .oprofile_type = PPC_OPROFILE_POWER4, 192 .platform = "power4", 193 }, 194 { /* PPC970 */ 195 .pvr_mask = 0xffff0000, 196 .pvr_value = 0x00390000, 197 .cpu_name = "PPC970", 198 .cpu_features = CPU_FTRS_PPC970, 199 .cpu_user_features = COMMON_USER_POWER4 | 200 PPC_FEATURE_HAS_ALTIVEC_COMP, 201 .icache_bsize = 128, 202 .dcache_bsize = 128, 203 .num_pmcs = 8, 204 .pmc_type = PPC_PMC_IBM, 205 .cpu_setup = __setup_cpu_ppc970, 206 .cpu_restore = __restore_cpu_ppc970, 207 .oprofile_cpu_type = "ppc64/970", 208 .oprofile_type = PPC_OPROFILE_POWER4, 209 .platform = "ppc970", 210 }, 211 { /* PPC970FX */ 212 .pvr_mask = 0xffff0000, 213 .pvr_value = 0x003c0000, 214 .cpu_name = "PPC970FX", 215 .cpu_features = CPU_FTRS_PPC970, 216 .cpu_user_features = COMMON_USER_POWER4 | 217 PPC_FEATURE_HAS_ALTIVEC_COMP, 218 .icache_bsize = 128, 219 .dcache_bsize = 128, 220 .num_pmcs = 8, 221 .pmc_type = PPC_PMC_IBM, 222 .cpu_setup = __setup_cpu_ppc970, 223 .cpu_restore = __restore_cpu_ppc970, 224 .oprofile_cpu_type = "ppc64/970", 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .platform = "ppc970", 227 }, 228 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 229 .pvr_mask = 0xffffffff, 230 .pvr_value = 0x00440100, 231 .cpu_name = "PPC970MP", 232 .cpu_features = CPU_FTRS_PPC970, 233 .cpu_user_features = COMMON_USER_POWER4 | 234 PPC_FEATURE_HAS_ALTIVEC_COMP, 235 .icache_bsize = 128, 236 .dcache_bsize = 128, 237 .num_pmcs = 8, 238 .cpu_setup = __setup_cpu_ppc970, 239 .cpu_restore = __restore_cpu_ppc970, 240 .oprofile_cpu_type = "ppc64/970MP", 241 .oprofile_type = PPC_OPROFILE_POWER4, 242 .platform = "ppc970", 243 }, 244 { /* PPC970MP */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x00440000, 247 .cpu_name = "PPC970MP", 248 .cpu_features = CPU_FTRS_PPC970, 249 .cpu_user_features = COMMON_USER_POWER4 | 250 PPC_FEATURE_HAS_ALTIVEC_COMP, 251 .icache_bsize = 128, 252 .dcache_bsize = 128, 253 .num_pmcs = 8, 254 .cpu_setup = __setup_cpu_ppc970MP, 255 .cpu_restore = __restore_cpu_ppc970, 256 .oprofile_cpu_type = "ppc64/970MP", 257 .oprofile_type = PPC_OPROFILE_POWER4, 258 .platform = "ppc970", 259 }, 260 { /* PPC970GX */ 261 .pvr_mask = 0xffff0000, 262 .pvr_value = 0x00450000, 263 .cpu_name = "PPC970GX", 264 .cpu_features = CPU_FTRS_PPC970, 265 .cpu_user_features = COMMON_USER_POWER4 | 266 PPC_FEATURE_HAS_ALTIVEC_COMP, 267 .icache_bsize = 128, 268 .dcache_bsize = 128, 269 .num_pmcs = 8, 270 .pmc_type = PPC_PMC_IBM, 271 .cpu_setup = __setup_cpu_ppc970, 272 .oprofile_cpu_type = "ppc64/970", 273 .oprofile_type = PPC_OPROFILE_POWER4, 274 .platform = "ppc970", 275 }, 276 { /* Power5 GR */ 277 .pvr_mask = 0xffff0000, 278 .pvr_value = 0x003a0000, 279 .cpu_name = "POWER5 (gr)", 280 .cpu_features = CPU_FTRS_POWER5, 281 .cpu_user_features = COMMON_USER_POWER5, 282 .icache_bsize = 128, 283 .dcache_bsize = 128, 284 .num_pmcs = 6, 285 .pmc_type = PPC_PMC_IBM, 286 .oprofile_cpu_type = "ppc64/power5", 287 .oprofile_type = PPC_OPROFILE_POWER4, 288 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 289 * and above but only works on POWER5 and above 290 */ 291 .oprofile_mmcra_sihv = MMCRA_SIHV, 292 .oprofile_mmcra_sipr = MMCRA_SIPR, 293 .platform = "power5", 294 }, 295 { /* Power5 GS */ 296 .pvr_mask = 0xffff0000, 297 .pvr_value = 0x003b0000, 298 .cpu_name = "POWER5+ (gs)", 299 .cpu_features = CPU_FTRS_POWER5, 300 .cpu_user_features = COMMON_USER_POWER5_PLUS, 301 .icache_bsize = 128, 302 .dcache_bsize = 128, 303 .num_pmcs = 6, 304 .pmc_type = PPC_PMC_IBM, 305 .oprofile_cpu_type = "ppc64/power5+", 306 .oprofile_type = PPC_OPROFILE_POWER4, 307 .oprofile_mmcra_sihv = MMCRA_SIHV, 308 .oprofile_mmcra_sipr = MMCRA_SIPR, 309 .platform = "power5+", 310 }, 311 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 312 .pvr_mask = 0xffffffff, 313 .pvr_value = 0x0f000001, 314 .cpu_name = "POWER5+", 315 .cpu_features = CPU_FTRS_POWER5, 316 .cpu_user_features = COMMON_USER_POWER5_PLUS, 317 .icache_bsize = 128, 318 .dcache_bsize = 128, 319 .num_pmcs = 6, 320 .oprofile_cpu_type = "ppc64/power6", 321 .oprofile_type = PPC_OPROFILE_POWER4, 322 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 323 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 324 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 325 POWER6_MMCRA_OTHER, 326 .platform = "power5+", 327 }, 328 { /* Power6 */ 329 .pvr_mask = 0xffff0000, 330 .pvr_value = 0x003e0000, 331 .cpu_name = "POWER6 (raw)", 332 .cpu_features = CPU_FTRS_POWER6, 333 .cpu_user_features = COMMON_USER_POWER6 | 334 PPC_FEATURE_POWER6_EXT, 335 .icache_bsize = 128, 336 .dcache_bsize = 128, 337 .num_pmcs = 6, 338 .oprofile_cpu_type = "ppc64/power6", 339 .oprofile_type = PPC_OPROFILE_POWER4, 340 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 341 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 342 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 343 POWER6_MMCRA_OTHER, 344 .platform = "power6x", 345 }, 346 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 347 .pvr_mask = 0xffffffff, 348 .pvr_value = 0x0f000002, 349 .cpu_name = "POWER6 (architected)", 350 .cpu_features = CPU_FTRS_POWER6, 351 .cpu_user_features = COMMON_USER_POWER6, 352 .icache_bsize = 128, 353 .dcache_bsize = 128, 354 .num_pmcs = 6, 355 .pmc_type = PPC_PMC_IBM, 356 .oprofile_cpu_type = "ppc64/power6", 357 .oprofile_type = PPC_OPROFILE_POWER4, 358 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 359 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 360 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 361 POWER6_MMCRA_OTHER, 362 .platform = "power6", 363 }, 364 { /* Cell Broadband Engine */ 365 .pvr_mask = 0xffff0000, 366 .pvr_value = 0x00700000, 367 .cpu_name = "Cell Broadband Engine", 368 .cpu_features = CPU_FTRS_CELL, 369 .cpu_user_features = COMMON_USER_PPC64 | 370 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 371 PPC_FEATURE_SMT, 372 .icache_bsize = 128, 373 .dcache_bsize = 128, 374 .num_pmcs = 4, 375 .pmc_type = PPC_PMC_IBM, 376 .oprofile_cpu_type = "ppc64/cell-be", 377 .oprofile_type = PPC_OPROFILE_CELL, 378 .platform = "ppc-cell-be", 379 }, 380 { /* PA Semi PA6T */ 381 .pvr_mask = 0x7fff0000, 382 .pvr_value = 0x00900000, 383 .cpu_name = "PA6T", 384 .cpu_features = CPU_FTRS_PA6T, 385 .cpu_user_features = COMMON_USER_PA6T, 386 .icache_bsize = 64, 387 .dcache_bsize = 64, 388 .num_pmcs = 6, 389 .pmc_type = PPC_PMC_PA6T, 390 .cpu_setup = __setup_cpu_pa6t, 391 .cpu_restore = __restore_cpu_pa6t, 392 .platform = "pa6t", 393 }, 394 { /* default match */ 395 .pvr_mask = 0x00000000, 396 .pvr_value = 0x00000000, 397 .cpu_name = "POWER4 (compatible)", 398 .cpu_features = CPU_FTRS_COMPATIBLE, 399 .cpu_user_features = COMMON_USER_PPC64, 400 .icache_bsize = 128, 401 .dcache_bsize = 128, 402 .num_pmcs = 6, 403 .pmc_type = PPC_PMC_IBM, 404 .platform = "power4", 405 } 406 #endif /* CONFIG_PPC64 */ 407 #ifdef CONFIG_PPC32 408 #if CLASSIC_PPC 409 { /* 601 */ 410 .pvr_mask = 0xffff0000, 411 .pvr_value = 0x00010000, 412 .cpu_name = "601", 413 .cpu_features = CPU_FTRS_PPC601, 414 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 415 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 416 .icache_bsize = 32, 417 .dcache_bsize = 32, 418 .platform = "ppc601", 419 }, 420 { /* 603 */ 421 .pvr_mask = 0xffff0000, 422 .pvr_value = 0x00030000, 423 .cpu_name = "603", 424 .cpu_features = CPU_FTRS_603, 425 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 426 .icache_bsize = 32, 427 .dcache_bsize = 32, 428 .cpu_setup = __setup_cpu_603, 429 .platform = "ppc603", 430 }, 431 { /* 603e */ 432 .pvr_mask = 0xffff0000, 433 .pvr_value = 0x00060000, 434 .cpu_name = "603e", 435 .cpu_features = CPU_FTRS_603, 436 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 437 .icache_bsize = 32, 438 .dcache_bsize = 32, 439 .cpu_setup = __setup_cpu_603, 440 .platform = "ppc603", 441 }, 442 { /* 603ev */ 443 .pvr_mask = 0xffff0000, 444 .pvr_value = 0x00070000, 445 .cpu_name = "603ev", 446 .cpu_features = CPU_FTRS_603, 447 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 448 .icache_bsize = 32, 449 .dcache_bsize = 32, 450 .cpu_setup = __setup_cpu_603, 451 .platform = "ppc603", 452 }, 453 { /* 604 */ 454 .pvr_mask = 0xffff0000, 455 .pvr_value = 0x00040000, 456 .cpu_name = "604", 457 .cpu_features = CPU_FTRS_604, 458 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 459 .icache_bsize = 32, 460 .dcache_bsize = 32, 461 .num_pmcs = 2, 462 .cpu_setup = __setup_cpu_604, 463 .platform = "ppc604", 464 }, 465 { /* 604e */ 466 .pvr_mask = 0xfffff000, 467 .pvr_value = 0x00090000, 468 .cpu_name = "604e", 469 .cpu_features = CPU_FTRS_604, 470 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 471 .icache_bsize = 32, 472 .dcache_bsize = 32, 473 .num_pmcs = 4, 474 .cpu_setup = __setup_cpu_604, 475 .platform = "ppc604", 476 }, 477 { /* 604r */ 478 .pvr_mask = 0xffff0000, 479 .pvr_value = 0x00090000, 480 .cpu_name = "604r", 481 .cpu_features = CPU_FTRS_604, 482 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 483 .icache_bsize = 32, 484 .dcache_bsize = 32, 485 .num_pmcs = 4, 486 .cpu_setup = __setup_cpu_604, 487 .platform = "ppc604", 488 }, 489 { /* 604ev */ 490 .pvr_mask = 0xffff0000, 491 .pvr_value = 0x000a0000, 492 .cpu_name = "604ev", 493 .cpu_features = CPU_FTRS_604, 494 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 495 .icache_bsize = 32, 496 .dcache_bsize = 32, 497 .num_pmcs = 4, 498 .cpu_setup = __setup_cpu_604, 499 .platform = "ppc604", 500 }, 501 { /* 740/750 (0x4202, don't support TAU ?) */ 502 .pvr_mask = 0xffffffff, 503 .pvr_value = 0x00084202, 504 .cpu_name = "740/750", 505 .cpu_features = CPU_FTRS_740_NOTAU, 506 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 507 .icache_bsize = 32, 508 .dcache_bsize = 32, 509 .num_pmcs = 4, 510 .cpu_setup = __setup_cpu_750, 511 .platform = "ppc750", 512 }, 513 { /* 750CX (80100 and 8010x?) */ 514 .pvr_mask = 0xfffffff0, 515 .pvr_value = 0x00080100, 516 .cpu_name = "750CX", 517 .cpu_features = CPU_FTRS_750, 518 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 519 .icache_bsize = 32, 520 .dcache_bsize = 32, 521 .num_pmcs = 4, 522 .cpu_setup = __setup_cpu_750cx, 523 .platform = "ppc750", 524 }, 525 { /* 750CX (82201 and 82202) */ 526 .pvr_mask = 0xfffffff0, 527 .pvr_value = 0x00082200, 528 .cpu_name = "750CX", 529 .cpu_features = CPU_FTRS_750, 530 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 531 .icache_bsize = 32, 532 .dcache_bsize = 32, 533 .num_pmcs = 4, 534 .cpu_setup = __setup_cpu_750cx, 535 .platform = "ppc750", 536 }, 537 { /* 750CXe (82214) */ 538 .pvr_mask = 0xfffffff0, 539 .pvr_value = 0x00082210, 540 .cpu_name = "750CXe", 541 .cpu_features = CPU_FTRS_750, 542 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 543 .icache_bsize = 32, 544 .dcache_bsize = 32, 545 .num_pmcs = 4, 546 .cpu_setup = __setup_cpu_750cx, 547 .platform = "ppc750", 548 }, 549 { /* 750CXe "Gekko" (83214) */ 550 .pvr_mask = 0xffffffff, 551 .pvr_value = 0x00083214, 552 .cpu_name = "750CXe", 553 .cpu_features = CPU_FTRS_750, 554 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 555 .icache_bsize = 32, 556 .dcache_bsize = 32, 557 .num_pmcs = 4, 558 .cpu_setup = __setup_cpu_750cx, 559 .platform = "ppc750", 560 }, 561 { /* 745/755 */ 562 .pvr_mask = 0xfffff000, 563 .pvr_value = 0x00083000, 564 .cpu_name = "745/755", 565 .cpu_features = CPU_FTRS_750, 566 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 567 .icache_bsize = 32, 568 .dcache_bsize = 32, 569 .num_pmcs = 4, 570 .cpu_setup = __setup_cpu_750, 571 .platform = "ppc750", 572 }, 573 { /* 750FX rev 1.x */ 574 .pvr_mask = 0xffffff00, 575 .pvr_value = 0x70000100, 576 .cpu_name = "750FX", 577 .cpu_features = CPU_FTRS_750FX1, 578 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 579 .icache_bsize = 32, 580 .dcache_bsize = 32, 581 .num_pmcs = 4, 582 .cpu_setup = __setup_cpu_750, 583 .platform = "ppc750", 584 }, 585 { /* 750FX rev 2.0 must disable HID0[DPM] */ 586 .pvr_mask = 0xffffffff, 587 .pvr_value = 0x70000200, 588 .cpu_name = "750FX", 589 .cpu_features = CPU_FTRS_750FX2, 590 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 591 .icache_bsize = 32, 592 .dcache_bsize = 32, 593 .num_pmcs = 4, 594 .cpu_setup = __setup_cpu_750, 595 .platform = "ppc750", 596 }, 597 { /* 750FX (All revs except 2.0) */ 598 .pvr_mask = 0xffff0000, 599 .pvr_value = 0x70000000, 600 .cpu_name = "750FX", 601 .cpu_features = CPU_FTRS_750FX, 602 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 603 .icache_bsize = 32, 604 .dcache_bsize = 32, 605 .num_pmcs = 4, 606 .cpu_setup = __setup_cpu_750fx, 607 .platform = "ppc750", 608 }, 609 { /* 750GX */ 610 .pvr_mask = 0xffff0000, 611 .pvr_value = 0x70020000, 612 .cpu_name = "750GX", 613 .cpu_features = CPU_FTRS_750GX, 614 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 615 .icache_bsize = 32, 616 .dcache_bsize = 32, 617 .num_pmcs = 4, 618 .cpu_setup = __setup_cpu_750fx, 619 .platform = "ppc750", 620 }, 621 { /* 740/750 (L2CR bit need fixup for 740) */ 622 .pvr_mask = 0xffff0000, 623 .pvr_value = 0x00080000, 624 .cpu_name = "740/750", 625 .cpu_features = CPU_FTRS_740, 626 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 627 .icache_bsize = 32, 628 .dcache_bsize = 32, 629 .num_pmcs = 4, 630 .cpu_setup = __setup_cpu_750, 631 .platform = "ppc750", 632 }, 633 { /* 7400 rev 1.1 ? (no TAU) */ 634 .pvr_mask = 0xffffffff, 635 .pvr_value = 0x000c1101, 636 .cpu_name = "7400 (1.1)", 637 .cpu_features = CPU_FTRS_7400_NOTAU, 638 .cpu_user_features = COMMON_USER | 639 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 640 .icache_bsize = 32, 641 .dcache_bsize = 32, 642 .num_pmcs = 4, 643 .cpu_setup = __setup_cpu_7400, 644 .platform = "ppc7400", 645 }, 646 { /* 7400 */ 647 .pvr_mask = 0xffff0000, 648 .pvr_value = 0x000c0000, 649 .cpu_name = "7400", 650 .cpu_features = CPU_FTRS_7400, 651 .cpu_user_features = COMMON_USER | 652 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 653 .icache_bsize = 32, 654 .dcache_bsize = 32, 655 .num_pmcs = 4, 656 .cpu_setup = __setup_cpu_7400, 657 .platform = "ppc7400", 658 }, 659 { /* 7410 */ 660 .pvr_mask = 0xffff0000, 661 .pvr_value = 0x800c0000, 662 .cpu_name = "7410", 663 .cpu_features = CPU_FTRS_7400, 664 .cpu_user_features = COMMON_USER | 665 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 666 .icache_bsize = 32, 667 .dcache_bsize = 32, 668 .num_pmcs = 4, 669 .cpu_setup = __setup_cpu_7410, 670 .platform = "ppc7400", 671 }, 672 { /* 7450 2.0 - no doze/nap */ 673 .pvr_mask = 0xffffffff, 674 .pvr_value = 0x80000200, 675 .cpu_name = "7450", 676 .cpu_features = CPU_FTRS_7450_20, 677 .cpu_user_features = COMMON_USER | 678 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 679 .icache_bsize = 32, 680 .dcache_bsize = 32, 681 .num_pmcs = 6, 682 .cpu_setup = __setup_cpu_745x, 683 .oprofile_cpu_type = "ppc/7450", 684 .oprofile_type = PPC_OPROFILE_G4, 685 .platform = "ppc7450", 686 }, 687 { /* 7450 2.1 */ 688 .pvr_mask = 0xffffffff, 689 .pvr_value = 0x80000201, 690 .cpu_name = "7450", 691 .cpu_features = CPU_FTRS_7450_21, 692 .cpu_user_features = COMMON_USER | 693 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 694 .icache_bsize = 32, 695 .dcache_bsize = 32, 696 .num_pmcs = 6, 697 .cpu_setup = __setup_cpu_745x, 698 .oprofile_cpu_type = "ppc/7450", 699 .oprofile_type = PPC_OPROFILE_G4, 700 .platform = "ppc7450", 701 }, 702 { /* 7450 2.3 and newer */ 703 .pvr_mask = 0xffff0000, 704 .pvr_value = 0x80000000, 705 .cpu_name = "7450", 706 .cpu_features = CPU_FTRS_7450_23, 707 .cpu_user_features = COMMON_USER | 708 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 709 .icache_bsize = 32, 710 .dcache_bsize = 32, 711 .num_pmcs = 6, 712 .cpu_setup = __setup_cpu_745x, 713 .oprofile_cpu_type = "ppc/7450", 714 .oprofile_type = PPC_OPROFILE_G4, 715 .platform = "ppc7450", 716 }, 717 { /* 7455 rev 1.x */ 718 .pvr_mask = 0xffffff00, 719 .pvr_value = 0x80010100, 720 .cpu_name = "7455", 721 .cpu_features = CPU_FTRS_7455_1, 722 .cpu_user_features = COMMON_USER | 723 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 724 .icache_bsize = 32, 725 .dcache_bsize = 32, 726 .num_pmcs = 6, 727 .cpu_setup = __setup_cpu_745x, 728 .oprofile_cpu_type = "ppc/7450", 729 .oprofile_type = PPC_OPROFILE_G4, 730 .platform = "ppc7450", 731 }, 732 { /* 7455 rev 2.0 */ 733 .pvr_mask = 0xffffffff, 734 .pvr_value = 0x80010200, 735 .cpu_name = "7455", 736 .cpu_features = CPU_FTRS_7455_20, 737 .cpu_user_features = COMMON_USER | 738 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 739 .icache_bsize = 32, 740 .dcache_bsize = 32, 741 .num_pmcs = 6, 742 .cpu_setup = __setup_cpu_745x, 743 .oprofile_cpu_type = "ppc/7450", 744 .oprofile_type = PPC_OPROFILE_G4, 745 .platform = "ppc7450", 746 }, 747 { /* 7455 others */ 748 .pvr_mask = 0xffff0000, 749 .pvr_value = 0x80010000, 750 .cpu_name = "7455", 751 .cpu_features = CPU_FTRS_7455, 752 .cpu_user_features = COMMON_USER | 753 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 754 .icache_bsize = 32, 755 .dcache_bsize = 32, 756 .num_pmcs = 6, 757 .cpu_setup = __setup_cpu_745x, 758 .oprofile_cpu_type = "ppc/7450", 759 .oprofile_type = PPC_OPROFILE_G4, 760 .platform = "ppc7450", 761 }, 762 { /* 7447/7457 Rev 1.0 */ 763 .pvr_mask = 0xffffffff, 764 .pvr_value = 0x80020100, 765 .cpu_name = "7447/7457", 766 .cpu_features = CPU_FTRS_7447_10, 767 .cpu_user_features = COMMON_USER | 768 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 769 .icache_bsize = 32, 770 .dcache_bsize = 32, 771 .num_pmcs = 6, 772 .cpu_setup = __setup_cpu_745x, 773 .oprofile_cpu_type = "ppc/7450", 774 .oprofile_type = PPC_OPROFILE_G4, 775 .platform = "ppc7450", 776 }, 777 { /* 7447/7457 Rev 1.1 */ 778 .pvr_mask = 0xffffffff, 779 .pvr_value = 0x80020101, 780 .cpu_name = "7447/7457", 781 .cpu_features = CPU_FTRS_7447_10, 782 .cpu_user_features = COMMON_USER | 783 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 784 .icache_bsize = 32, 785 .dcache_bsize = 32, 786 .num_pmcs = 6, 787 .cpu_setup = __setup_cpu_745x, 788 .oprofile_cpu_type = "ppc/7450", 789 .oprofile_type = PPC_OPROFILE_G4, 790 .platform = "ppc7450", 791 }, 792 { /* 7447/7457 Rev 1.2 and later */ 793 .pvr_mask = 0xffff0000, 794 .pvr_value = 0x80020000, 795 .cpu_name = "7447/7457", 796 .cpu_features = CPU_FTRS_7447, 797 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 798 .icache_bsize = 32, 799 .dcache_bsize = 32, 800 .num_pmcs = 6, 801 .cpu_setup = __setup_cpu_745x, 802 .oprofile_cpu_type = "ppc/7450", 803 .oprofile_type = PPC_OPROFILE_G4, 804 .platform = "ppc7450", 805 }, 806 { /* 7447A */ 807 .pvr_mask = 0xffff0000, 808 .pvr_value = 0x80030000, 809 .cpu_name = "7447A", 810 .cpu_features = CPU_FTRS_7447A, 811 .cpu_user_features = COMMON_USER | 812 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 813 .icache_bsize = 32, 814 .dcache_bsize = 32, 815 .num_pmcs = 6, 816 .cpu_setup = __setup_cpu_745x, 817 .oprofile_cpu_type = "ppc/7450", 818 .oprofile_type = PPC_OPROFILE_G4, 819 .platform = "ppc7450", 820 }, 821 { /* 7448 */ 822 .pvr_mask = 0xffff0000, 823 .pvr_value = 0x80040000, 824 .cpu_name = "7448", 825 .cpu_features = CPU_FTRS_7447A, 826 .cpu_user_features = COMMON_USER | 827 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 828 .icache_bsize = 32, 829 .dcache_bsize = 32, 830 .num_pmcs = 6, 831 .cpu_setup = __setup_cpu_745x, 832 .oprofile_cpu_type = "ppc/7450", 833 .oprofile_type = PPC_OPROFILE_G4, 834 .platform = "ppc7450", 835 }, 836 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 837 .pvr_mask = 0x7fff0000, 838 .pvr_value = 0x00810000, 839 .cpu_name = "82xx", 840 .cpu_features = CPU_FTRS_82XX, 841 .cpu_user_features = COMMON_USER, 842 .icache_bsize = 32, 843 .dcache_bsize = 32, 844 .cpu_setup = __setup_cpu_603, 845 .platform = "ppc603", 846 }, 847 { /* All G2_LE (603e core, plus some) have the same pvr */ 848 .pvr_mask = 0x7fff0000, 849 .pvr_value = 0x00820000, 850 .cpu_name = "G2_LE", 851 .cpu_features = CPU_FTRS_G2_LE, 852 .cpu_user_features = COMMON_USER, 853 .icache_bsize = 32, 854 .dcache_bsize = 32, 855 .cpu_setup = __setup_cpu_603, 856 .platform = "ppc603", 857 }, 858 { /* e300c1 (a 603e core, plus some) on 83xx */ 859 .pvr_mask = 0x7fff0000, 860 .pvr_value = 0x00830000, 861 .cpu_name = "e300c1", 862 .cpu_features = CPU_FTRS_E300, 863 .cpu_user_features = COMMON_USER, 864 .icache_bsize = 32, 865 .dcache_bsize = 32, 866 .cpu_setup = __setup_cpu_603, 867 .platform = "ppc603", 868 }, 869 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 870 .pvr_mask = 0x7fff0000, 871 .pvr_value = 0x00840000, 872 .cpu_name = "e300c2", 873 .cpu_features = CPU_FTRS_E300C2, 874 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 875 .icache_bsize = 32, 876 .dcache_bsize = 32, 877 .cpu_setup = __setup_cpu_603, 878 .platform = "ppc603", 879 }, 880 { /* e300c3 on 83xx */ 881 .pvr_mask = 0x7fff0000, 882 .pvr_value = 0x00850000, 883 .cpu_name = "e300c3", 884 .cpu_features = CPU_FTRS_E300, 885 .cpu_user_features = COMMON_USER, 886 .icache_bsize = 32, 887 .dcache_bsize = 32, 888 .cpu_setup = __setup_cpu_603, 889 .platform = "ppc603", 890 }, 891 { /* default match, we assume split I/D cache & TB (non-601)... */ 892 .pvr_mask = 0x00000000, 893 .pvr_value = 0x00000000, 894 .cpu_name = "(generic PPC)", 895 .cpu_features = CPU_FTRS_CLASSIC32, 896 .cpu_user_features = COMMON_USER, 897 .icache_bsize = 32, 898 .dcache_bsize = 32, 899 .platform = "ppc603", 900 }, 901 #endif /* CLASSIC_PPC */ 902 #ifdef CONFIG_8xx 903 { /* 8xx */ 904 .pvr_mask = 0xffff0000, 905 .pvr_value = 0x00500000, 906 .cpu_name = "8xx", 907 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 908 * if the 8xx code is there.... */ 909 .cpu_features = CPU_FTRS_8XX, 910 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 911 .icache_bsize = 16, 912 .dcache_bsize = 16, 913 .platform = "ppc823", 914 }, 915 #endif /* CONFIG_8xx */ 916 #ifdef CONFIG_40x 917 { /* 403GC */ 918 .pvr_mask = 0xffffff00, 919 .pvr_value = 0x00200200, 920 .cpu_name = "403GC", 921 .cpu_features = CPU_FTRS_40X, 922 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 923 .icache_bsize = 16, 924 .dcache_bsize = 16, 925 .platform = "ppc403", 926 }, 927 { /* 403GCX */ 928 .pvr_mask = 0xffffff00, 929 .pvr_value = 0x00201400, 930 .cpu_name = "403GCX", 931 .cpu_features = CPU_FTRS_40X, 932 .cpu_user_features = PPC_FEATURE_32 | 933 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 934 .icache_bsize = 16, 935 .dcache_bsize = 16, 936 .platform = "ppc403", 937 }, 938 { /* 403G ?? */ 939 .pvr_mask = 0xffff0000, 940 .pvr_value = 0x00200000, 941 .cpu_name = "403G ??", 942 .cpu_features = CPU_FTRS_40X, 943 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 944 .icache_bsize = 16, 945 .dcache_bsize = 16, 946 .platform = "ppc403", 947 }, 948 { /* 405GP */ 949 .pvr_mask = 0xffff0000, 950 .pvr_value = 0x40110000, 951 .cpu_name = "405GP", 952 .cpu_features = CPU_FTRS_40X, 953 .cpu_user_features = PPC_FEATURE_32 | 954 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 955 .icache_bsize = 32, 956 .dcache_bsize = 32, 957 .platform = "ppc405", 958 }, 959 { /* STB 03xxx */ 960 .pvr_mask = 0xffff0000, 961 .pvr_value = 0x40130000, 962 .cpu_name = "STB03xxx", 963 .cpu_features = CPU_FTRS_40X, 964 .cpu_user_features = PPC_FEATURE_32 | 965 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 966 .icache_bsize = 32, 967 .dcache_bsize = 32, 968 .platform = "ppc405", 969 }, 970 { /* STB 04xxx */ 971 .pvr_mask = 0xffff0000, 972 .pvr_value = 0x41810000, 973 .cpu_name = "STB04xxx", 974 .cpu_features = CPU_FTRS_40X, 975 .cpu_user_features = PPC_FEATURE_32 | 976 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 977 .icache_bsize = 32, 978 .dcache_bsize = 32, 979 .platform = "ppc405", 980 }, 981 { /* NP405L */ 982 .pvr_mask = 0xffff0000, 983 .pvr_value = 0x41610000, 984 .cpu_name = "NP405L", 985 .cpu_features = CPU_FTRS_40X, 986 .cpu_user_features = PPC_FEATURE_32 | 987 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 988 .icache_bsize = 32, 989 .dcache_bsize = 32, 990 .platform = "ppc405", 991 }, 992 { /* NP4GS3 */ 993 .pvr_mask = 0xffff0000, 994 .pvr_value = 0x40B10000, 995 .cpu_name = "NP4GS3", 996 .cpu_features = CPU_FTRS_40X, 997 .cpu_user_features = PPC_FEATURE_32 | 998 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 999 .icache_bsize = 32, 1000 .dcache_bsize = 32, 1001 .platform = "ppc405", 1002 }, 1003 { /* NP405H */ 1004 .pvr_mask = 0xffff0000, 1005 .pvr_value = 0x41410000, 1006 .cpu_name = "NP405H", 1007 .cpu_features = CPU_FTRS_40X, 1008 .cpu_user_features = PPC_FEATURE_32 | 1009 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1010 .icache_bsize = 32, 1011 .dcache_bsize = 32, 1012 .platform = "ppc405", 1013 }, 1014 { /* 405GPr */ 1015 .pvr_mask = 0xffff0000, 1016 .pvr_value = 0x50910000, 1017 .cpu_name = "405GPr", 1018 .cpu_features = CPU_FTRS_40X, 1019 .cpu_user_features = PPC_FEATURE_32 | 1020 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1021 .icache_bsize = 32, 1022 .dcache_bsize = 32, 1023 .platform = "ppc405", 1024 }, 1025 { /* STBx25xx */ 1026 .pvr_mask = 0xffff0000, 1027 .pvr_value = 0x51510000, 1028 .cpu_name = "STBx25xx", 1029 .cpu_features = CPU_FTRS_40X, 1030 .cpu_user_features = PPC_FEATURE_32 | 1031 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1032 .icache_bsize = 32, 1033 .dcache_bsize = 32, 1034 .platform = "ppc405", 1035 }, 1036 { /* 405LP */ 1037 .pvr_mask = 0xffff0000, 1038 .pvr_value = 0x41F10000, 1039 .cpu_name = "405LP", 1040 .cpu_features = CPU_FTRS_40X, 1041 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1042 .icache_bsize = 32, 1043 .dcache_bsize = 32, 1044 .platform = "ppc405", 1045 }, 1046 { /* Xilinx Virtex-II Pro */ 1047 .pvr_mask = 0xfffff000, 1048 .pvr_value = 0x20010000, 1049 .cpu_name = "Virtex-II Pro", 1050 .cpu_features = CPU_FTRS_40X, 1051 .cpu_user_features = PPC_FEATURE_32 | 1052 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1053 .icache_bsize = 32, 1054 .dcache_bsize = 32, 1055 .platform = "ppc405", 1056 }, 1057 { /* Xilinx Virtex-4 FX */ 1058 .pvr_mask = 0xfffff000, 1059 .pvr_value = 0x20011000, 1060 .cpu_name = "Virtex-4 FX", 1061 .cpu_features = CPU_FTRS_40X, 1062 .cpu_user_features = PPC_FEATURE_32 | 1063 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1064 .icache_bsize = 32, 1065 .dcache_bsize = 32, 1066 .platform = "ppc405", 1067 }, 1068 { /* 405EP */ 1069 .pvr_mask = 0xffff0000, 1070 .pvr_value = 0x51210000, 1071 .cpu_name = "405EP", 1072 .cpu_features = CPU_FTRS_40X, 1073 .cpu_user_features = PPC_FEATURE_32 | 1074 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1075 .icache_bsize = 32, 1076 .dcache_bsize = 32, 1077 .platform = "ppc405", 1078 }, 1079 1080 #endif /* CONFIG_40x */ 1081 #ifdef CONFIG_44x 1082 { 1083 .pvr_mask = 0xf0000fff, 1084 .pvr_value = 0x40000850, 1085 .cpu_name = "440EP Rev. A", 1086 .cpu_features = CPU_FTRS_44X, 1087 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1088 .icache_bsize = 32, 1089 .dcache_bsize = 32, 1090 .platform = "ppc440", 1091 }, 1092 { 1093 .pvr_mask = 0xf0000fff, 1094 .pvr_value = 0x400008d3, 1095 .cpu_name = "440EP Rev. B", 1096 .cpu_features = CPU_FTRS_44X, 1097 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1098 .icache_bsize = 32, 1099 .dcache_bsize = 32, 1100 .platform = "ppc440", 1101 }, 1102 { /* 440GP Rev. B */ 1103 .pvr_mask = 0xf0000fff, 1104 .pvr_value = 0x40000440, 1105 .cpu_name = "440GP Rev. B", 1106 .cpu_features = CPU_FTRS_44X, 1107 .cpu_user_features = COMMON_USER_BOOKE, 1108 .icache_bsize = 32, 1109 .dcache_bsize = 32, 1110 .platform = "ppc440gp", 1111 }, 1112 { /* 440GP Rev. C */ 1113 .pvr_mask = 0xf0000fff, 1114 .pvr_value = 0x40000481, 1115 .cpu_name = "440GP Rev. C", 1116 .cpu_features = CPU_FTRS_44X, 1117 .cpu_user_features = COMMON_USER_BOOKE, 1118 .icache_bsize = 32, 1119 .dcache_bsize = 32, 1120 .platform = "ppc440gp", 1121 }, 1122 { /* 440GX Rev. A */ 1123 .pvr_mask = 0xf0000fff, 1124 .pvr_value = 0x50000850, 1125 .cpu_name = "440GX Rev. A", 1126 .cpu_features = CPU_FTRS_44X, 1127 .cpu_user_features = COMMON_USER_BOOKE, 1128 .icache_bsize = 32, 1129 .dcache_bsize = 32, 1130 .platform = "ppc440", 1131 }, 1132 { /* 440GX Rev. B */ 1133 .pvr_mask = 0xf0000fff, 1134 .pvr_value = 0x50000851, 1135 .cpu_name = "440GX Rev. B", 1136 .cpu_features = CPU_FTRS_44X, 1137 .cpu_user_features = COMMON_USER_BOOKE, 1138 .icache_bsize = 32, 1139 .dcache_bsize = 32, 1140 .platform = "ppc440", 1141 }, 1142 { /* 440GX Rev. C */ 1143 .pvr_mask = 0xf0000fff, 1144 .pvr_value = 0x50000892, 1145 .cpu_name = "440GX Rev. C", 1146 .cpu_features = CPU_FTRS_44X, 1147 .cpu_user_features = COMMON_USER_BOOKE, 1148 .icache_bsize = 32, 1149 .dcache_bsize = 32, 1150 .platform = "ppc440", 1151 }, 1152 { /* 440GX Rev. F */ 1153 .pvr_mask = 0xf0000fff, 1154 .pvr_value = 0x50000894, 1155 .cpu_name = "440GX Rev. F", 1156 .cpu_features = CPU_FTRS_44X, 1157 .cpu_user_features = COMMON_USER_BOOKE, 1158 .icache_bsize = 32, 1159 .dcache_bsize = 32, 1160 .platform = "ppc440", 1161 }, 1162 { /* 440SP Rev. A */ 1163 .pvr_mask = 0xff000fff, 1164 .pvr_value = 0x53000891, 1165 .cpu_name = "440SP Rev. A", 1166 .cpu_features = CPU_FTRS_44X, 1167 .cpu_user_features = COMMON_USER_BOOKE, 1168 .icache_bsize = 32, 1169 .dcache_bsize = 32, 1170 .platform = "ppc440", 1171 }, 1172 { /* 440SPe Rev. A */ 1173 .pvr_mask = 0xff000fff, 1174 .pvr_value = 0x53000890, 1175 .cpu_name = "440SPe Rev. A", 1176 .cpu_features = CPU_FTRS_44X, 1177 .cpu_user_features = COMMON_USER_BOOKE, 1178 .icache_bsize = 32, 1179 .dcache_bsize = 32, 1180 .platform = "ppc440", 1181 }, 1182 #endif /* CONFIG_44x */ 1183 #ifdef CONFIG_FSL_BOOKE 1184 { /* e200z5 */ 1185 .pvr_mask = 0xfff00000, 1186 .pvr_value = 0x81000000, 1187 .cpu_name = "e200z5", 1188 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1189 .cpu_features = CPU_FTRS_E200, 1190 .cpu_user_features = COMMON_USER_BOOKE | 1191 PPC_FEATURE_HAS_EFP_SINGLE | 1192 PPC_FEATURE_UNIFIED_CACHE, 1193 .dcache_bsize = 32, 1194 .platform = "ppc5554", 1195 }, 1196 { /* e200z6 */ 1197 .pvr_mask = 0xfff00000, 1198 .pvr_value = 0x81100000, 1199 .cpu_name = "e200z6", 1200 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1201 .cpu_features = CPU_FTRS_E200, 1202 .cpu_user_features = COMMON_USER_BOOKE | 1203 PPC_FEATURE_SPE_COMP | 1204 PPC_FEATURE_HAS_EFP_SINGLE | 1205 PPC_FEATURE_UNIFIED_CACHE, 1206 .dcache_bsize = 32, 1207 .platform = "ppc5554", 1208 }, 1209 { /* e500 */ 1210 .pvr_mask = 0xffff0000, 1211 .pvr_value = 0x80200000, 1212 .cpu_name = "e500", 1213 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1214 .cpu_features = CPU_FTRS_E500, 1215 .cpu_user_features = COMMON_USER_BOOKE | 1216 PPC_FEATURE_SPE_COMP | 1217 PPC_FEATURE_HAS_EFP_SINGLE, 1218 .icache_bsize = 32, 1219 .dcache_bsize = 32, 1220 .num_pmcs = 4, 1221 .oprofile_cpu_type = "ppc/e500", 1222 .oprofile_type = PPC_OPROFILE_BOOKE, 1223 .platform = "ppc8540", 1224 }, 1225 { /* e500v2 */ 1226 .pvr_mask = 0xffff0000, 1227 .pvr_value = 0x80210000, 1228 .cpu_name = "e500v2", 1229 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1230 .cpu_features = CPU_FTRS_E500_2, 1231 .cpu_user_features = COMMON_USER_BOOKE | 1232 PPC_FEATURE_SPE_COMP | 1233 PPC_FEATURE_HAS_EFP_SINGLE | 1234 PPC_FEATURE_HAS_EFP_DOUBLE, 1235 .icache_bsize = 32, 1236 .dcache_bsize = 32, 1237 .num_pmcs = 4, 1238 .oprofile_cpu_type = "ppc/e500", 1239 .oprofile_type = PPC_OPROFILE_BOOKE, 1240 .platform = "ppc8548", 1241 }, 1242 #endif 1243 #if !CLASSIC_PPC 1244 { /* default match */ 1245 .pvr_mask = 0x00000000, 1246 .pvr_value = 0x00000000, 1247 .cpu_name = "(generic PPC)", 1248 .cpu_features = CPU_FTRS_GENERIC_32, 1249 .cpu_user_features = PPC_FEATURE_32, 1250 .icache_bsize = 32, 1251 .dcache_bsize = 32, 1252 .platform = "powerpc", 1253 } 1254 #endif /* !CLASSIC_PPC */ 1255 #endif /* CONFIG_PPC32 */ 1256 }; 1257 1258 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr) 1259 { 1260 struct cpu_spec *s = cpu_specs; 1261 struct cpu_spec **cur = &cur_cpu_spec; 1262 int i; 1263 1264 s = PTRRELOC(s); 1265 cur = PTRRELOC(cur); 1266 1267 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) 1268 if ((pvr & s->pvr_mask) == s->pvr_value) { 1269 *cur = cpu_specs + i; 1270 #ifdef CONFIG_PPC64 1271 /* ppc64 expects identify_cpu to also call setup_cpu 1272 * for that processor. I will consolidate that at a 1273 * later time, for now, just use our friend #ifdef. 1274 * we also don't need to PTRRELOC the function pointer 1275 * on ppc64 as we are running at 0 in real mode. 1276 */ 1277 if (s->cpu_setup) { 1278 s->cpu_setup(offset, s); 1279 } 1280 #endif /* CONFIG_PPC64 */ 1281 return s; 1282 } 1283 BUG(); 1284 return NULL; 1285 } 1286 1287 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end) 1288 { 1289 struct fixup_entry { 1290 unsigned long mask; 1291 unsigned long value; 1292 long start_off; 1293 long end_off; 1294 } *fcur, *fend; 1295 1296 fcur = fixup_start; 1297 fend = fixup_end; 1298 1299 for (; fcur < fend; fcur++) { 1300 unsigned int *pstart, *pend, *p; 1301 1302 if ((value & fcur->mask) == fcur->value) 1303 continue; 1304 1305 /* These PTRRELOCs will disappear once the new scheme for 1306 * modules and vdso is implemented 1307 */ 1308 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4); 1309 pend = ((unsigned int *)fcur) + (fcur->end_off / 4); 1310 1311 for (p = pstart; p < pend; p++) { 1312 *p = 0x60000000u; 1313 asm volatile ("dcbst 0, %0" : : "r" (p)); 1314 } 1315 asm volatile ("sync" : : : "memory"); 1316 for (p = pstart; p < pend; p++) 1317 asm volatile ("icbi 0,%0" : : "r" (p)); 1318 asm volatile ("sync; isync" : : : "memory"); 1319 } 1320 } 1321