1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/export.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 #include <asm/mmu.h> 23 #include <asm/setup.h> 24 25 struct cpu_spec* cur_cpu_spec = NULL; 26 EXPORT_SYMBOL(cur_cpu_spec); 27 28 /* The platform string corresponding to the real PVR */ 29 const char *powerpc_base_platform; 30 31 /* NOTE: 32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 33 * the responsibility of the appropriate CPU save/restore functions to 34 * eventually copy these settings over. Those save/restore aren't yet 35 * part of the cputable though. That has to be fixed for both ppc32 36 * and ppc64 37 */ 38 #ifdef CONFIG_PPC32 39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 61 #endif /* CONFIG_PPC32 */ 62 #ifdef CONFIG_PPC64 63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec); 67 extern void __restore_cpu_pa6t(void); 68 extern void __restore_cpu_ppc970(void); 69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); 70 extern void __restore_cpu_power7(void); 71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); 72 extern void __restore_cpu_power8(void); 73 extern void __restore_cpu_a2(void); 74 #endif /* CONFIG_PPC64 */ 75 #if defined(CONFIG_E500) 76 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 77 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 78 extern void __restore_cpu_e5500(void); 79 extern void __restore_cpu_e6500(void); 80 #endif /* CONFIG_E500 */ 81 82 /* This table only contains "desktop" CPUs, it need to be filled with embedded 83 * ones as well... 84 */ 85 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 86 PPC_FEATURE_HAS_MMU) 87 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 88 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 89 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 91 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 93 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 95 PPC_FEATURE_TRUE_LE | \ 96 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 97 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 99 PPC_FEATURE_TRUE_LE | \ 100 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 101 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 103 PPC_FEATURE_TRUE_LE | \ 104 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 105 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 106 PPC_FEATURE_TRUE_LE | \ 107 PPC_FEATURE_HAS_ALTIVEC_COMP) 108 #ifdef CONFIG_PPC_BOOK3E_64 109 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 110 #else 111 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 112 PPC_FEATURE_BOOKE) 113 #endif 114 115 static struct cpu_spec __initdata cpu_specs[] = { 116 #ifdef CONFIG_PPC_BOOK3S_64 117 { /* Power3 */ 118 .pvr_mask = 0xffff0000, 119 .pvr_value = 0x00400000, 120 .cpu_name = "POWER3 (630)", 121 .cpu_features = CPU_FTRS_POWER3, 122 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 123 .mmu_features = MMU_FTR_HPTE_TABLE, 124 .icache_bsize = 128, 125 .dcache_bsize = 128, 126 .num_pmcs = 8, 127 .pmc_type = PPC_PMC_IBM, 128 .oprofile_cpu_type = "ppc64/power3", 129 .oprofile_type = PPC_OPROFILE_RS64, 130 .platform = "power3", 131 }, 132 { /* Power3+ */ 133 .pvr_mask = 0xffff0000, 134 .pvr_value = 0x00410000, 135 .cpu_name = "POWER3 (630+)", 136 .cpu_features = CPU_FTRS_POWER3, 137 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 138 .mmu_features = MMU_FTR_HPTE_TABLE, 139 .icache_bsize = 128, 140 .dcache_bsize = 128, 141 .num_pmcs = 8, 142 .pmc_type = PPC_PMC_IBM, 143 .oprofile_cpu_type = "ppc64/power3", 144 .oprofile_type = PPC_OPROFILE_RS64, 145 .platform = "power3", 146 }, 147 { /* Northstar */ 148 .pvr_mask = 0xffff0000, 149 .pvr_value = 0x00330000, 150 .cpu_name = "RS64-II (northstar)", 151 .cpu_features = CPU_FTRS_RS64, 152 .cpu_user_features = COMMON_USER_PPC64, 153 .mmu_features = MMU_FTR_HPTE_TABLE, 154 .icache_bsize = 128, 155 .dcache_bsize = 128, 156 .num_pmcs = 8, 157 .pmc_type = PPC_PMC_IBM, 158 .oprofile_cpu_type = "ppc64/rs64", 159 .oprofile_type = PPC_OPROFILE_RS64, 160 .platform = "rs64", 161 }, 162 { /* Pulsar */ 163 .pvr_mask = 0xffff0000, 164 .pvr_value = 0x00340000, 165 .cpu_name = "RS64-III (pulsar)", 166 .cpu_features = CPU_FTRS_RS64, 167 .cpu_user_features = COMMON_USER_PPC64, 168 .mmu_features = MMU_FTR_HPTE_TABLE, 169 .icache_bsize = 128, 170 .dcache_bsize = 128, 171 .num_pmcs = 8, 172 .pmc_type = PPC_PMC_IBM, 173 .oprofile_cpu_type = "ppc64/rs64", 174 .oprofile_type = PPC_OPROFILE_RS64, 175 .platform = "rs64", 176 }, 177 { /* I-star */ 178 .pvr_mask = 0xffff0000, 179 .pvr_value = 0x00360000, 180 .cpu_name = "RS64-III (icestar)", 181 .cpu_features = CPU_FTRS_RS64, 182 .cpu_user_features = COMMON_USER_PPC64, 183 .mmu_features = MMU_FTR_HPTE_TABLE, 184 .icache_bsize = 128, 185 .dcache_bsize = 128, 186 .num_pmcs = 8, 187 .pmc_type = PPC_PMC_IBM, 188 .oprofile_cpu_type = "ppc64/rs64", 189 .oprofile_type = PPC_OPROFILE_RS64, 190 .platform = "rs64", 191 }, 192 { /* S-star */ 193 .pvr_mask = 0xffff0000, 194 .pvr_value = 0x00370000, 195 .cpu_name = "RS64-IV (sstar)", 196 .cpu_features = CPU_FTRS_RS64, 197 .cpu_user_features = COMMON_USER_PPC64, 198 .mmu_features = MMU_FTR_HPTE_TABLE, 199 .icache_bsize = 128, 200 .dcache_bsize = 128, 201 .num_pmcs = 8, 202 .pmc_type = PPC_PMC_IBM, 203 .oprofile_cpu_type = "ppc64/rs64", 204 .oprofile_type = PPC_OPROFILE_RS64, 205 .platform = "rs64", 206 }, 207 { /* Power4 */ 208 .pvr_mask = 0xffff0000, 209 .pvr_value = 0x00350000, 210 .cpu_name = "POWER4 (gp)", 211 .cpu_features = CPU_FTRS_POWER4, 212 .cpu_user_features = COMMON_USER_POWER4, 213 .mmu_features = MMU_FTRS_POWER4, 214 .icache_bsize = 128, 215 .dcache_bsize = 128, 216 .num_pmcs = 8, 217 .pmc_type = PPC_PMC_IBM, 218 .oprofile_cpu_type = "ppc64/power4", 219 .oprofile_type = PPC_OPROFILE_POWER4, 220 .platform = "power4", 221 }, 222 { /* Power4+ */ 223 .pvr_mask = 0xffff0000, 224 .pvr_value = 0x00380000, 225 .cpu_name = "POWER4+ (gq)", 226 .cpu_features = CPU_FTRS_POWER4, 227 .cpu_user_features = COMMON_USER_POWER4, 228 .mmu_features = MMU_FTRS_POWER4, 229 .icache_bsize = 128, 230 .dcache_bsize = 128, 231 .num_pmcs = 8, 232 .pmc_type = PPC_PMC_IBM, 233 .oprofile_cpu_type = "ppc64/power4", 234 .oprofile_type = PPC_OPROFILE_POWER4, 235 .platform = "power4", 236 }, 237 { /* PPC970 */ 238 .pvr_mask = 0xffff0000, 239 .pvr_value = 0x00390000, 240 .cpu_name = "PPC970", 241 .cpu_features = CPU_FTRS_PPC970, 242 .cpu_user_features = COMMON_USER_POWER4 | 243 PPC_FEATURE_HAS_ALTIVEC_COMP, 244 .mmu_features = MMU_FTRS_PPC970, 245 .icache_bsize = 128, 246 .dcache_bsize = 128, 247 .num_pmcs = 8, 248 .pmc_type = PPC_PMC_IBM, 249 .cpu_setup = __setup_cpu_ppc970, 250 .cpu_restore = __restore_cpu_ppc970, 251 .oprofile_cpu_type = "ppc64/970", 252 .oprofile_type = PPC_OPROFILE_POWER4, 253 .platform = "ppc970", 254 }, 255 { /* PPC970FX */ 256 .pvr_mask = 0xffff0000, 257 .pvr_value = 0x003c0000, 258 .cpu_name = "PPC970FX", 259 .cpu_features = CPU_FTRS_PPC970, 260 .cpu_user_features = COMMON_USER_POWER4 | 261 PPC_FEATURE_HAS_ALTIVEC_COMP, 262 .mmu_features = MMU_FTRS_PPC970, 263 .icache_bsize = 128, 264 .dcache_bsize = 128, 265 .num_pmcs = 8, 266 .pmc_type = PPC_PMC_IBM, 267 .cpu_setup = __setup_cpu_ppc970, 268 .cpu_restore = __restore_cpu_ppc970, 269 .oprofile_cpu_type = "ppc64/970", 270 .oprofile_type = PPC_OPROFILE_POWER4, 271 .platform = "ppc970", 272 }, 273 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 274 .pvr_mask = 0xffffffff, 275 .pvr_value = 0x00440100, 276 .cpu_name = "PPC970MP", 277 .cpu_features = CPU_FTRS_PPC970, 278 .cpu_user_features = COMMON_USER_POWER4 | 279 PPC_FEATURE_HAS_ALTIVEC_COMP, 280 .mmu_features = MMU_FTRS_PPC970, 281 .icache_bsize = 128, 282 .dcache_bsize = 128, 283 .num_pmcs = 8, 284 .pmc_type = PPC_PMC_IBM, 285 .cpu_setup = __setup_cpu_ppc970, 286 .cpu_restore = __restore_cpu_ppc970, 287 .oprofile_cpu_type = "ppc64/970MP", 288 .oprofile_type = PPC_OPROFILE_POWER4, 289 .platform = "ppc970", 290 }, 291 { /* PPC970MP */ 292 .pvr_mask = 0xffff0000, 293 .pvr_value = 0x00440000, 294 .cpu_name = "PPC970MP", 295 .cpu_features = CPU_FTRS_PPC970, 296 .cpu_user_features = COMMON_USER_POWER4 | 297 PPC_FEATURE_HAS_ALTIVEC_COMP, 298 .mmu_features = MMU_FTRS_PPC970, 299 .icache_bsize = 128, 300 .dcache_bsize = 128, 301 .num_pmcs = 8, 302 .pmc_type = PPC_PMC_IBM, 303 .cpu_setup = __setup_cpu_ppc970MP, 304 .cpu_restore = __restore_cpu_ppc970, 305 .oprofile_cpu_type = "ppc64/970MP", 306 .oprofile_type = PPC_OPROFILE_POWER4, 307 .platform = "ppc970", 308 }, 309 { /* PPC970GX */ 310 .pvr_mask = 0xffff0000, 311 .pvr_value = 0x00450000, 312 .cpu_name = "PPC970GX", 313 .cpu_features = CPU_FTRS_PPC970, 314 .cpu_user_features = COMMON_USER_POWER4 | 315 PPC_FEATURE_HAS_ALTIVEC_COMP, 316 .mmu_features = MMU_FTRS_PPC970, 317 .icache_bsize = 128, 318 .dcache_bsize = 128, 319 .num_pmcs = 8, 320 .pmc_type = PPC_PMC_IBM, 321 .cpu_setup = __setup_cpu_ppc970, 322 .oprofile_cpu_type = "ppc64/970", 323 .oprofile_type = PPC_OPROFILE_POWER4, 324 .platform = "ppc970", 325 }, 326 { /* Power5 GR */ 327 .pvr_mask = 0xffff0000, 328 .pvr_value = 0x003a0000, 329 .cpu_name = "POWER5 (gr)", 330 .cpu_features = CPU_FTRS_POWER5, 331 .cpu_user_features = COMMON_USER_POWER5, 332 .mmu_features = MMU_FTRS_POWER5, 333 .icache_bsize = 128, 334 .dcache_bsize = 128, 335 .num_pmcs = 6, 336 .pmc_type = PPC_PMC_IBM, 337 .oprofile_cpu_type = "ppc64/power5", 338 .oprofile_type = PPC_OPROFILE_POWER4, 339 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 340 * and above but only works on POWER5 and above 341 */ 342 .oprofile_mmcra_sihv = MMCRA_SIHV, 343 .oprofile_mmcra_sipr = MMCRA_SIPR, 344 .platform = "power5", 345 }, 346 { /* Power5++ */ 347 .pvr_mask = 0xffffff00, 348 .pvr_value = 0x003b0300, 349 .cpu_name = "POWER5+ (gs)", 350 .cpu_features = CPU_FTRS_POWER5, 351 .cpu_user_features = COMMON_USER_POWER5_PLUS, 352 .mmu_features = MMU_FTRS_POWER5, 353 .icache_bsize = 128, 354 .dcache_bsize = 128, 355 .num_pmcs = 6, 356 .oprofile_cpu_type = "ppc64/power5++", 357 .oprofile_type = PPC_OPROFILE_POWER4, 358 .oprofile_mmcra_sihv = MMCRA_SIHV, 359 .oprofile_mmcra_sipr = MMCRA_SIPR, 360 .platform = "power5+", 361 }, 362 { /* Power5 GS */ 363 .pvr_mask = 0xffff0000, 364 .pvr_value = 0x003b0000, 365 .cpu_name = "POWER5+ (gs)", 366 .cpu_features = CPU_FTRS_POWER5, 367 .cpu_user_features = COMMON_USER_POWER5_PLUS, 368 .mmu_features = MMU_FTRS_POWER5, 369 .icache_bsize = 128, 370 .dcache_bsize = 128, 371 .num_pmcs = 6, 372 .pmc_type = PPC_PMC_IBM, 373 .oprofile_cpu_type = "ppc64/power5+", 374 .oprofile_type = PPC_OPROFILE_POWER4, 375 .oprofile_mmcra_sihv = MMCRA_SIHV, 376 .oprofile_mmcra_sipr = MMCRA_SIPR, 377 .platform = "power5+", 378 }, 379 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 380 .pvr_mask = 0xffffffff, 381 .pvr_value = 0x0f000001, 382 .cpu_name = "POWER5+", 383 .cpu_features = CPU_FTRS_POWER5, 384 .cpu_user_features = COMMON_USER_POWER5_PLUS, 385 .mmu_features = MMU_FTRS_POWER5, 386 .icache_bsize = 128, 387 .dcache_bsize = 128, 388 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 389 .oprofile_type = PPC_OPROFILE_POWER4, 390 .platform = "power5+", 391 }, 392 { /* Power6 */ 393 .pvr_mask = 0xffff0000, 394 .pvr_value = 0x003e0000, 395 .cpu_name = "POWER6 (raw)", 396 .cpu_features = CPU_FTRS_POWER6, 397 .cpu_user_features = COMMON_USER_POWER6 | 398 PPC_FEATURE_POWER6_EXT, 399 .mmu_features = MMU_FTRS_POWER6, 400 .icache_bsize = 128, 401 .dcache_bsize = 128, 402 .num_pmcs = 6, 403 .pmc_type = PPC_PMC_IBM, 404 .oprofile_cpu_type = "ppc64/power6", 405 .oprofile_type = PPC_OPROFILE_POWER4, 406 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 407 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 408 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 409 POWER6_MMCRA_OTHER, 410 .platform = "power6x", 411 }, 412 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 413 .pvr_mask = 0xffffffff, 414 .pvr_value = 0x0f000002, 415 .cpu_name = "POWER6 (architected)", 416 .cpu_features = CPU_FTRS_POWER6, 417 .cpu_user_features = COMMON_USER_POWER6, 418 .mmu_features = MMU_FTRS_POWER6, 419 .icache_bsize = 128, 420 .dcache_bsize = 128, 421 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 422 .oprofile_type = PPC_OPROFILE_POWER4, 423 .platform = "power6", 424 }, 425 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 426 .pvr_mask = 0xffffffff, 427 .pvr_value = 0x0f000003, 428 .cpu_name = "POWER7 (architected)", 429 .cpu_features = CPU_FTRS_POWER7, 430 .cpu_user_features = COMMON_USER_POWER7, 431 .mmu_features = MMU_FTRS_POWER7, 432 .icache_bsize = 128, 433 .dcache_bsize = 128, 434 .oprofile_type = PPC_OPROFILE_POWER4, 435 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 436 .cpu_setup = __setup_cpu_power7, 437 .cpu_restore = __restore_cpu_power7, 438 .platform = "power7", 439 }, 440 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 441 .pvr_mask = 0xffffffff, 442 .pvr_value = 0x0f000004, 443 .cpu_name = "POWER8 (architected)", 444 .cpu_features = CPU_FTRS_POWER8, 445 .cpu_user_features = COMMON_USER_POWER8, 446 .mmu_features = MMU_FTRS_POWER8, 447 .icache_bsize = 128, 448 .dcache_bsize = 128, 449 .oprofile_type = PPC_OPROFILE_POWER4, 450 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 451 .cpu_setup = __setup_cpu_power8, 452 .cpu_restore = __restore_cpu_power8, 453 .platform = "power8", 454 }, 455 { /* Power7 */ 456 .pvr_mask = 0xffff0000, 457 .pvr_value = 0x003f0000, 458 .cpu_name = "POWER7 (raw)", 459 .cpu_features = CPU_FTRS_POWER7, 460 .cpu_user_features = COMMON_USER_POWER7, 461 .mmu_features = MMU_FTRS_POWER7, 462 .icache_bsize = 128, 463 .dcache_bsize = 128, 464 .num_pmcs = 6, 465 .pmc_type = PPC_PMC_IBM, 466 .oprofile_cpu_type = "ppc64/power7", 467 .oprofile_type = PPC_OPROFILE_POWER4, 468 .cpu_setup = __setup_cpu_power7, 469 .cpu_restore = __restore_cpu_power7, 470 .platform = "power7", 471 }, 472 { /* Power7+ */ 473 .pvr_mask = 0xffff0000, 474 .pvr_value = 0x004A0000, 475 .cpu_name = "POWER7+ (raw)", 476 .cpu_features = CPU_FTRS_POWER7, 477 .cpu_user_features = COMMON_USER_POWER7, 478 .mmu_features = MMU_FTRS_POWER7, 479 .icache_bsize = 128, 480 .dcache_bsize = 128, 481 .num_pmcs = 6, 482 .pmc_type = PPC_PMC_IBM, 483 .oprofile_cpu_type = "ppc64/power7", 484 .oprofile_type = PPC_OPROFILE_POWER4, 485 .cpu_setup = __setup_cpu_power7, 486 .cpu_restore = __restore_cpu_power7, 487 .platform = "power7+", 488 }, 489 { /* Power8 */ 490 .pvr_mask = 0xffff0000, 491 .pvr_value = 0x004b0000, 492 .cpu_name = "POWER8 (raw)", 493 .cpu_features = CPU_FTRS_POWER8, 494 .cpu_user_features = COMMON_USER_POWER8, 495 .mmu_features = MMU_FTRS_POWER8, 496 .icache_bsize = 128, 497 .dcache_bsize = 128, 498 .num_pmcs = 6, 499 .pmc_type = PPC_PMC_IBM, 500 .oprofile_cpu_type = "ppc64/power8", 501 .oprofile_type = PPC_OPROFILE_POWER4, 502 .cpu_setup = __setup_cpu_power8, 503 .cpu_restore = __restore_cpu_power8, 504 .platform = "power8", 505 }, 506 { /* Cell Broadband Engine */ 507 .pvr_mask = 0xffff0000, 508 .pvr_value = 0x00700000, 509 .cpu_name = "Cell Broadband Engine", 510 .cpu_features = CPU_FTRS_CELL, 511 .cpu_user_features = COMMON_USER_PPC64 | 512 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 513 PPC_FEATURE_SMT, 514 .mmu_features = MMU_FTRS_CELL, 515 .icache_bsize = 128, 516 .dcache_bsize = 128, 517 .num_pmcs = 4, 518 .pmc_type = PPC_PMC_IBM, 519 .oprofile_cpu_type = "ppc64/cell-be", 520 .oprofile_type = PPC_OPROFILE_CELL, 521 .platform = "ppc-cell-be", 522 }, 523 { /* PA Semi PA6T */ 524 .pvr_mask = 0x7fff0000, 525 .pvr_value = 0x00900000, 526 .cpu_name = "PA6T", 527 .cpu_features = CPU_FTRS_PA6T, 528 .cpu_user_features = COMMON_USER_PA6T, 529 .mmu_features = MMU_FTRS_PA6T, 530 .icache_bsize = 64, 531 .dcache_bsize = 64, 532 .num_pmcs = 6, 533 .pmc_type = PPC_PMC_PA6T, 534 .cpu_setup = __setup_cpu_pa6t, 535 .cpu_restore = __restore_cpu_pa6t, 536 .oprofile_cpu_type = "ppc64/pa6t", 537 .oprofile_type = PPC_OPROFILE_PA6T, 538 .platform = "pa6t", 539 }, 540 { /* default match */ 541 .pvr_mask = 0x00000000, 542 .pvr_value = 0x00000000, 543 .cpu_name = "POWER4 (compatible)", 544 .cpu_features = CPU_FTRS_COMPATIBLE, 545 .cpu_user_features = COMMON_USER_PPC64, 546 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, 547 .icache_bsize = 128, 548 .dcache_bsize = 128, 549 .num_pmcs = 6, 550 .pmc_type = PPC_PMC_IBM, 551 .platform = "power4", 552 } 553 #endif /* CONFIG_PPC_BOOK3S_64 */ 554 555 #ifdef CONFIG_PPC32 556 #if CLASSIC_PPC 557 { /* 601 */ 558 .pvr_mask = 0xffff0000, 559 .pvr_value = 0x00010000, 560 .cpu_name = "601", 561 .cpu_features = CPU_FTRS_PPC601, 562 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 563 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 564 .mmu_features = MMU_FTR_HPTE_TABLE, 565 .icache_bsize = 32, 566 .dcache_bsize = 32, 567 .machine_check = machine_check_generic, 568 .platform = "ppc601", 569 }, 570 { /* 603 */ 571 .pvr_mask = 0xffff0000, 572 .pvr_value = 0x00030000, 573 .cpu_name = "603", 574 .cpu_features = CPU_FTRS_603, 575 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 576 .mmu_features = 0, 577 .icache_bsize = 32, 578 .dcache_bsize = 32, 579 .cpu_setup = __setup_cpu_603, 580 .machine_check = machine_check_generic, 581 .platform = "ppc603", 582 }, 583 { /* 603e */ 584 .pvr_mask = 0xffff0000, 585 .pvr_value = 0x00060000, 586 .cpu_name = "603e", 587 .cpu_features = CPU_FTRS_603, 588 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 589 .mmu_features = 0, 590 .icache_bsize = 32, 591 .dcache_bsize = 32, 592 .cpu_setup = __setup_cpu_603, 593 .machine_check = machine_check_generic, 594 .platform = "ppc603", 595 }, 596 { /* 603ev */ 597 .pvr_mask = 0xffff0000, 598 .pvr_value = 0x00070000, 599 .cpu_name = "603ev", 600 .cpu_features = CPU_FTRS_603, 601 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 602 .mmu_features = 0, 603 .icache_bsize = 32, 604 .dcache_bsize = 32, 605 .cpu_setup = __setup_cpu_603, 606 .machine_check = machine_check_generic, 607 .platform = "ppc603", 608 }, 609 { /* 604 */ 610 .pvr_mask = 0xffff0000, 611 .pvr_value = 0x00040000, 612 .cpu_name = "604", 613 .cpu_features = CPU_FTRS_604, 614 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 615 .mmu_features = MMU_FTR_HPTE_TABLE, 616 .icache_bsize = 32, 617 .dcache_bsize = 32, 618 .num_pmcs = 2, 619 .cpu_setup = __setup_cpu_604, 620 .machine_check = machine_check_generic, 621 .platform = "ppc604", 622 }, 623 { /* 604e */ 624 .pvr_mask = 0xfffff000, 625 .pvr_value = 0x00090000, 626 .cpu_name = "604e", 627 .cpu_features = CPU_FTRS_604, 628 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 629 .mmu_features = MMU_FTR_HPTE_TABLE, 630 .icache_bsize = 32, 631 .dcache_bsize = 32, 632 .num_pmcs = 4, 633 .cpu_setup = __setup_cpu_604, 634 .machine_check = machine_check_generic, 635 .platform = "ppc604", 636 }, 637 { /* 604r */ 638 .pvr_mask = 0xffff0000, 639 .pvr_value = 0x00090000, 640 .cpu_name = "604r", 641 .cpu_features = CPU_FTRS_604, 642 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 643 .mmu_features = MMU_FTR_HPTE_TABLE, 644 .icache_bsize = 32, 645 .dcache_bsize = 32, 646 .num_pmcs = 4, 647 .cpu_setup = __setup_cpu_604, 648 .machine_check = machine_check_generic, 649 .platform = "ppc604", 650 }, 651 { /* 604ev */ 652 .pvr_mask = 0xffff0000, 653 .pvr_value = 0x000a0000, 654 .cpu_name = "604ev", 655 .cpu_features = CPU_FTRS_604, 656 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 657 .mmu_features = MMU_FTR_HPTE_TABLE, 658 .icache_bsize = 32, 659 .dcache_bsize = 32, 660 .num_pmcs = 4, 661 .cpu_setup = __setup_cpu_604, 662 .machine_check = machine_check_generic, 663 .platform = "ppc604", 664 }, 665 { /* 740/750 (0x4202, don't support TAU ?) */ 666 .pvr_mask = 0xffffffff, 667 .pvr_value = 0x00084202, 668 .cpu_name = "740/750", 669 .cpu_features = CPU_FTRS_740_NOTAU, 670 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 671 .mmu_features = MMU_FTR_HPTE_TABLE, 672 .icache_bsize = 32, 673 .dcache_bsize = 32, 674 .num_pmcs = 4, 675 .cpu_setup = __setup_cpu_750, 676 .machine_check = machine_check_generic, 677 .platform = "ppc750", 678 }, 679 { /* 750CX (80100 and 8010x?) */ 680 .pvr_mask = 0xfffffff0, 681 .pvr_value = 0x00080100, 682 .cpu_name = "750CX", 683 .cpu_features = CPU_FTRS_750, 684 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 685 .mmu_features = MMU_FTR_HPTE_TABLE, 686 .icache_bsize = 32, 687 .dcache_bsize = 32, 688 .num_pmcs = 4, 689 .cpu_setup = __setup_cpu_750cx, 690 .machine_check = machine_check_generic, 691 .platform = "ppc750", 692 }, 693 { /* 750CX (82201 and 82202) */ 694 .pvr_mask = 0xfffffff0, 695 .pvr_value = 0x00082200, 696 .cpu_name = "750CX", 697 .cpu_features = CPU_FTRS_750, 698 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 699 .mmu_features = MMU_FTR_HPTE_TABLE, 700 .icache_bsize = 32, 701 .dcache_bsize = 32, 702 .num_pmcs = 4, 703 .pmc_type = PPC_PMC_IBM, 704 .cpu_setup = __setup_cpu_750cx, 705 .machine_check = machine_check_generic, 706 .platform = "ppc750", 707 }, 708 { /* 750CXe (82214) */ 709 .pvr_mask = 0xfffffff0, 710 .pvr_value = 0x00082210, 711 .cpu_name = "750CXe", 712 .cpu_features = CPU_FTRS_750, 713 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 714 .mmu_features = MMU_FTR_HPTE_TABLE, 715 .icache_bsize = 32, 716 .dcache_bsize = 32, 717 .num_pmcs = 4, 718 .pmc_type = PPC_PMC_IBM, 719 .cpu_setup = __setup_cpu_750cx, 720 .machine_check = machine_check_generic, 721 .platform = "ppc750", 722 }, 723 { /* 750CXe "Gekko" (83214) */ 724 .pvr_mask = 0xffffffff, 725 .pvr_value = 0x00083214, 726 .cpu_name = "750CXe", 727 .cpu_features = CPU_FTRS_750, 728 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 729 .mmu_features = MMU_FTR_HPTE_TABLE, 730 .icache_bsize = 32, 731 .dcache_bsize = 32, 732 .num_pmcs = 4, 733 .pmc_type = PPC_PMC_IBM, 734 .cpu_setup = __setup_cpu_750cx, 735 .machine_check = machine_check_generic, 736 .platform = "ppc750", 737 }, 738 { /* 750CL (and "Broadway") */ 739 .pvr_mask = 0xfffff0e0, 740 .pvr_value = 0x00087000, 741 .cpu_name = "750CL", 742 .cpu_features = CPU_FTRS_750CL, 743 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 744 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 745 .icache_bsize = 32, 746 .dcache_bsize = 32, 747 .num_pmcs = 4, 748 .pmc_type = PPC_PMC_IBM, 749 .cpu_setup = __setup_cpu_750, 750 .machine_check = machine_check_generic, 751 .platform = "ppc750", 752 .oprofile_cpu_type = "ppc/750", 753 .oprofile_type = PPC_OPROFILE_G4, 754 }, 755 { /* 745/755 */ 756 .pvr_mask = 0xfffff000, 757 .pvr_value = 0x00083000, 758 .cpu_name = "745/755", 759 .cpu_features = CPU_FTRS_750, 760 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 761 .mmu_features = MMU_FTR_HPTE_TABLE, 762 .icache_bsize = 32, 763 .dcache_bsize = 32, 764 .num_pmcs = 4, 765 .pmc_type = PPC_PMC_IBM, 766 .cpu_setup = __setup_cpu_750, 767 .machine_check = machine_check_generic, 768 .platform = "ppc750", 769 }, 770 { /* 750FX rev 1.x */ 771 .pvr_mask = 0xffffff00, 772 .pvr_value = 0x70000100, 773 .cpu_name = "750FX", 774 .cpu_features = CPU_FTRS_750FX1, 775 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 776 .mmu_features = MMU_FTR_HPTE_TABLE, 777 .icache_bsize = 32, 778 .dcache_bsize = 32, 779 .num_pmcs = 4, 780 .pmc_type = PPC_PMC_IBM, 781 .cpu_setup = __setup_cpu_750, 782 .machine_check = machine_check_generic, 783 .platform = "ppc750", 784 .oprofile_cpu_type = "ppc/750", 785 .oprofile_type = PPC_OPROFILE_G4, 786 }, 787 { /* 750FX rev 2.0 must disable HID0[DPM] */ 788 .pvr_mask = 0xffffffff, 789 .pvr_value = 0x70000200, 790 .cpu_name = "750FX", 791 .cpu_features = CPU_FTRS_750FX2, 792 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 793 .mmu_features = MMU_FTR_HPTE_TABLE, 794 .icache_bsize = 32, 795 .dcache_bsize = 32, 796 .num_pmcs = 4, 797 .pmc_type = PPC_PMC_IBM, 798 .cpu_setup = __setup_cpu_750, 799 .machine_check = machine_check_generic, 800 .platform = "ppc750", 801 .oprofile_cpu_type = "ppc/750", 802 .oprofile_type = PPC_OPROFILE_G4, 803 }, 804 { /* 750FX (All revs except 2.0) */ 805 .pvr_mask = 0xffff0000, 806 .pvr_value = 0x70000000, 807 .cpu_name = "750FX", 808 .cpu_features = CPU_FTRS_750FX, 809 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 810 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 811 .icache_bsize = 32, 812 .dcache_bsize = 32, 813 .num_pmcs = 4, 814 .pmc_type = PPC_PMC_IBM, 815 .cpu_setup = __setup_cpu_750fx, 816 .machine_check = machine_check_generic, 817 .platform = "ppc750", 818 .oprofile_cpu_type = "ppc/750", 819 .oprofile_type = PPC_OPROFILE_G4, 820 }, 821 { /* 750GX */ 822 .pvr_mask = 0xffff0000, 823 .pvr_value = 0x70020000, 824 .cpu_name = "750GX", 825 .cpu_features = CPU_FTRS_750GX, 826 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 827 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 828 .icache_bsize = 32, 829 .dcache_bsize = 32, 830 .num_pmcs = 4, 831 .pmc_type = PPC_PMC_IBM, 832 .cpu_setup = __setup_cpu_750fx, 833 .machine_check = machine_check_generic, 834 .platform = "ppc750", 835 .oprofile_cpu_type = "ppc/750", 836 .oprofile_type = PPC_OPROFILE_G4, 837 }, 838 { /* 740/750 (L2CR bit need fixup for 740) */ 839 .pvr_mask = 0xffff0000, 840 .pvr_value = 0x00080000, 841 .cpu_name = "740/750", 842 .cpu_features = CPU_FTRS_740, 843 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 844 .mmu_features = MMU_FTR_HPTE_TABLE, 845 .icache_bsize = 32, 846 .dcache_bsize = 32, 847 .num_pmcs = 4, 848 .pmc_type = PPC_PMC_IBM, 849 .cpu_setup = __setup_cpu_750, 850 .machine_check = machine_check_generic, 851 .platform = "ppc750", 852 }, 853 { /* 7400 rev 1.1 ? (no TAU) */ 854 .pvr_mask = 0xffffffff, 855 .pvr_value = 0x000c1101, 856 .cpu_name = "7400 (1.1)", 857 .cpu_features = CPU_FTRS_7400_NOTAU, 858 .cpu_user_features = COMMON_USER | 859 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 860 .mmu_features = MMU_FTR_HPTE_TABLE, 861 .icache_bsize = 32, 862 .dcache_bsize = 32, 863 .num_pmcs = 4, 864 .pmc_type = PPC_PMC_G4, 865 .cpu_setup = __setup_cpu_7400, 866 .machine_check = machine_check_generic, 867 .platform = "ppc7400", 868 }, 869 { /* 7400 */ 870 .pvr_mask = 0xffff0000, 871 .pvr_value = 0x000c0000, 872 .cpu_name = "7400", 873 .cpu_features = CPU_FTRS_7400, 874 .cpu_user_features = COMMON_USER | 875 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 876 .mmu_features = MMU_FTR_HPTE_TABLE, 877 .icache_bsize = 32, 878 .dcache_bsize = 32, 879 .num_pmcs = 4, 880 .pmc_type = PPC_PMC_G4, 881 .cpu_setup = __setup_cpu_7400, 882 .machine_check = machine_check_generic, 883 .platform = "ppc7400", 884 }, 885 { /* 7410 */ 886 .pvr_mask = 0xffff0000, 887 .pvr_value = 0x800c0000, 888 .cpu_name = "7410", 889 .cpu_features = CPU_FTRS_7400, 890 .cpu_user_features = COMMON_USER | 891 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 892 .mmu_features = MMU_FTR_HPTE_TABLE, 893 .icache_bsize = 32, 894 .dcache_bsize = 32, 895 .num_pmcs = 4, 896 .pmc_type = PPC_PMC_G4, 897 .cpu_setup = __setup_cpu_7410, 898 .machine_check = machine_check_generic, 899 .platform = "ppc7400", 900 }, 901 { /* 7450 2.0 - no doze/nap */ 902 .pvr_mask = 0xffffffff, 903 .pvr_value = 0x80000200, 904 .cpu_name = "7450", 905 .cpu_features = CPU_FTRS_7450_20, 906 .cpu_user_features = COMMON_USER | 907 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 908 .mmu_features = MMU_FTR_HPTE_TABLE, 909 .icache_bsize = 32, 910 .dcache_bsize = 32, 911 .num_pmcs = 6, 912 .pmc_type = PPC_PMC_G4, 913 .cpu_setup = __setup_cpu_745x, 914 .oprofile_cpu_type = "ppc/7450", 915 .oprofile_type = PPC_OPROFILE_G4, 916 .machine_check = machine_check_generic, 917 .platform = "ppc7450", 918 }, 919 { /* 7450 2.1 */ 920 .pvr_mask = 0xffffffff, 921 .pvr_value = 0x80000201, 922 .cpu_name = "7450", 923 .cpu_features = CPU_FTRS_7450_21, 924 .cpu_user_features = COMMON_USER | 925 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 926 .mmu_features = MMU_FTR_HPTE_TABLE, 927 .icache_bsize = 32, 928 .dcache_bsize = 32, 929 .num_pmcs = 6, 930 .pmc_type = PPC_PMC_G4, 931 .cpu_setup = __setup_cpu_745x, 932 .oprofile_cpu_type = "ppc/7450", 933 .oprofile_type = PPC_OPROFILE_G4, 934 .machine_check = machine_check_generic, 935 .platform = "ppc7450", 936 }, 937 { /* 7450 2.3 and newer */ 938 .pvr_mask = 0xffff0000, 939 .pvr_value = 0x80000000, 940 .cpu_name = "7450", 941 .cpu_features = CPU_FTRS_7450_23, 942 .cpu_user_features = COMMON_USER | 943 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 944 .mmu_features = MMU_FTR_HPTE_TABLE, 945 .icache_bsize = 32, 946 .dcache_bsize = 32, 947 .num_pmcs = 6, 948 .pmc_type = PPC_PMC_G4, 949 .cpu_setup = __setup_cpu_745x, 950 .oprofile_cpu_type = "ppc/7450", 951 .oprofile_type = PPC_OPROFILE_G4, 952 .machine_check = machine_check_generic, 953 .platform = "ppc7450", 954 }, 955 { /* 7455 rev 1.x */ 956 .pvr_mask = 0xffffff00, 957 .pvr_value = 0x80010100, 958 .cpu_name = "7455", 959 .cpu_features = CPU_FTRS_7455_1, 960 .cpu_user_features = COMMON_USER | 961 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 962 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 963 .icache_bsize = 32, 964 .dcache_bsize = 32, 965 .num_pmcs = 6, 966 .pmc_type = PPC_PMC_G4, 967 .cpu_setup = __setup_cpu_745x, 968 .oprofile_cpu_type = "ppc/7450", 969 .oprofile_type = PPC_OPROFILE_G4, 970 .machine_check = machine_check_generic, 971 .platform = "ppc7450", 972 }, 973 { /* 7455 rev 2.0 */ 974 .pvr_mask = 0xffffffff, 975 .pvr_value = 0x80010200, 976 .cpu_name = "7455", 977 .cpu_features = CPU_FTRS_7455_20, 978 .cpu_user_features = COMMON_USER | 979 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 980 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 981 .icache_bsize = 32, 982 .dcache_bsize = 32, 983 .num_pmcs = 6, 984 .pmc_type = PPC_PMC_G4, 985 .cpu_setup = __setup_cpu_745x, 986 .oprofile_cpu_type = "ppc/7450", 987 .oprofile_type = PPC_OPROFILE_G4, 988 .machine_check = machine_check_generic, 989 .platform = "ppc7450", 990 }, 991 { /* 7455 others */ 992 .pvr_mask = 0xffff0000, 993 .pvr_value = 0x80010000, 994 .cpu_name = "7455", 995 .cpu_features = CPU_FTRS_7455, 996 .cpu_user_features = COMMON_USER | 997 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 998 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 999 .icache_bsize = 32, 1000 .dcache_bsize = 32, 1001 .num_pmcs = 6, 1002 .pmc_type = PPC_PMC_G4, 1003 .cpu_setup = __setup_cpu_745x, 1004 .oprofile_cpu_type = "ppc/7450", 1005 .oprofile_type = PPC_OPROFILE_G4, 1006 .machine_check = machine_check_generic, 1007 .platform = "ppc7450", 1008 }, 1009 { /* 7447/7457 Rev 1.0 */ 1010 .pvr_mask = 0xffffffff, 1011 .pvr_value = 0x80020100, 1012 .cpu_name = "7447/7457", 1013 .cpu_features = CPU_FTRS_7447_10, 1014 .cpu_user_features = COMMON_USER | 1015 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1016 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1017 .icache_bsize = 32, 1018 .dcache_bsize = 32, 1019 .num_pmcs = 6, 1020 .pmc_type = PPC_PMC_G4, 1021 .cpu_setup = __setup_cpu_745x, 1022 .oprofile_cpu_type = "ppc/7450", 1023 .oprofile_type = PPC_OPROFILE_G4, 1024 .machine_check = machine_check_generic, 1025 .platform = "ppc7450", 1026 }, 1027 { /* 7447/7457 Rev 1.1 */ 1028 .pvr_mask = 0xffffffff, 1029 .pvr_value = 0x80020101, 1030 .cpu_name = "7447/7457", 1031 .cpu_features = CPU_FTRS_7447_10, 1032 .cpu_user_features = COMMON_USER | 1033 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1034 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1035 .icache_bsize = 32, 1036 .dcache_bsize = 32, 1037 .num_pmcs = 6, 1038 .pmc_type = PPC_PMC_G4, 1039 .cpu_setup = __setup_cpu_745x, 1040 .oprofile_cpu_type = "ppc/7450", 1041 .oprofile_type = PPC_OPROFILE_G4, 1042 .machine_check = machine_check_generic, 1043 .platform = "ppc7450", 1044 }, 1045 { /* 7447/7457 Rev 1.2 and later */ 1046 .pvr_mask = 0xffff0000, 1047 .pvr_value = 0x80020000, 1048 .cpu_name = "7447/7457", 1049 .cpu_features = CPU_FTRS_7447, 1050 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1051 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1052 .icache_bsize = 32, 1053 .dcache_bsize = 32, 1054 .num_pmcs = 6, 1055 .pmc_type = PPC_PMC_G4, 1056 .cpu_setup = __setup_cpu_745x, 1057 .oprofile_cpu_type = "ppc/7450", 1058 .oprofile_type = PPC_OPROFILE_G4, 1059 .machine_check = machine_check_generic, 1060 .platform = "ppc7450", 1061 }, 1062 { /* 7447A */ 1063 .pvr_mask = 0xffff0000, 1064 .pvr_value = 0x80030000, 1065 .cpu_name = "7447A", 1066 .cpu_features = CPU_FTRS_7447A, 1067 .cpu_user_features = COMMON_USER | 1068 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1069 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1070 .icache_bsize = 32, 1071 .dcache_bsize = 32, 1072 .num_pmcs = 6, 1073 .pmc_type = PPC_PMC_G4, 1074 .cpu_setup = __setup_cpu_745x, 1075 .oprofile_cpu_type = "ppc/7450", 1076 .oprofile_type = PPC_OPROFILE_G4, 1077 .machine_check = machine_check_generic, 1078 .platform = "ppc7450", 1079 }, 1080 { /* 7448 */ 1081 .pvr_mask = 0xffff0000, 1082 .pvr_value = 0x80040000, 1083 .cpu_name = "7448", 1084 .cpu_features = CPU_FTRS_7448, 1085 .cpu_user_features = COMMON_USER | 1086 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1087 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1088 .icache_bsize = 32, 1089 .dcache_bsize = 32, 1090 .num_pmcs = 6, 1091 .pmc_type = PPC_PMC_G4, 1092 .cpu_setup = __setup_cpu_745x, 1093 .oprofile_cpu_type = "ppc/7450", 1094 .oprofile_type = PPC_OPROFILE_G4, 1095 .machine_check = machine_check_generic, 1096 .platform = "ppc7450", 1097 }, 1098 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1099 .pvr_mask = 0x7fff0000, 1100 .pvr_value = 0x00810000, 1101 .cpu_name = "82xx", 1102 .cpu_features = CPU_FTRS_82XX, 1103 .cpu_user_features = COMMON_USER, 1104 .mmu_features = 0, 1105 .icache_bsize = 32, 1106 .dcache_bsize = 32, 1107 .cpu_setup = __setup_cpu_603, 1108 .machine_check = machine_check_generic, 1109 .platform = "ppc603", 1110 }, 1111 { /* All G2_LE (603e core, plus some) have the same pvr */ 1112 .pvr_mask = 0x7fff0000, 1113 .pvr_value = 0x00820000, 1114 .cpu_name = "G2_LE", 1115 .cpu_features = CPU_FTRS_G2_LE, 1116 .cpu_user_features = COMMON_USER, 1117 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1118 .icache_bsize = 32, 1119 .dcache_bsize = 32, 1120 .cpu_setup = __setup_cpu_603, 1121 .machine_check = machine_check_generic, 1122 .platform = "ppc603", 1123 }, 1124 { /* e300c1 (a 603e core, plus some) on 83xx */ 1125 .pvr_mask = 0x7fff0000, 1126 .pvr_value = 0x00830000, 1127 .cpu_name = "e300c1", 1128 .cpu_features = CPU_FTRS_E300, 1129 .cpu_user_features = COMMON_USER, 1130 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1131 .icache_bsize = 32, 1132 .dcache_bsize = 32, 1133 .cpu_setup = __setup_cpu_603, 1134 .machine_check = machine_check_generic, 1135 .platform = "ppc603", 1136 }, 1137 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1138 .pvr_mask = 0x7fff0000, 1139 .pvr_value = 0x00840000, 1140 .cpu_name = "e300c2", 1141 .cpu_features = CPU_FTRS_E300C2, 1142 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1143 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1144 MMU_FTR_NEED_DTLB_SW_LRU, 1145 .icache_bsize = 32, 1146 .dcache_bsize = 32, 1147 .cpu_setup = __setup_cpu_603, 1148 .machine_check = machine_check_generic, 1149 .platform = "ppc603", 1150 }, 1151 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1152 .pvr_mask = 0x7fff0000, 1153 .pvr_value = 0x00850000, 1154 .cpu_name = "e300c3", 1155 .cpu_features = CPU_FTRS_E300, 1156 .cpu_user_features = COMMON_USER, 1157 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1158 MMU_FTR_NEED_DTLB_SW_LRU, 1159 .icache_bsize = 32, 1160 .dcache_bsize = 32, 1161 .cpu_setup = __setup_cpu_603, 1162 .num_pmcs = 4, 1163 .oprofile_cpu_type = "ppc/e300", 1164 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1165 .platform = "ppc603", 1166 }, 1167 { /* e300c4 (e300c1, plus one IU) */ 1168 .pvr_mask = 0x7fff0000, 1169 .pvr_value = 0x00860000, 1170 .cpu_name = "e300c4", 1171 .cpu_features = CPU_FTRS_E300, 1172 .cpu_user_features = COMMON_USER, 1173 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1174 MMU_FTR_NEED_DTLB_SW_LRU, 1175 .icache_bsize = 32, 1176 .dcache_bsize = 32, 1177 .cpu_setup = __setup_cpu_603, 1178 .machine_check = machine_check_generic, 1179 .num_pmcs = 4, 1180 .oprofile_cpu_type = "ppc/e300", 1181 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1182 .platform = "ppc603", 1183 }, 1184 { /* default match, we assume split I/D cache & TB (non-601)... */ 1185 .pvr_mask = 0x00000000, 1186 .pvr_value = 0x00000000, 1187 .cpu_name = "(generic PPC)", 1188 .cpu_features = CPU_FTRS_CLASSIC32, 1189 .cpu_user_features = COMMON_USER, 1190 .mmu_features = MMU_FTR_HPTE_TABLE, 1191 .icache_bsize = 32, 1192 .dcache_bsize = 32, 1193 .machine_check = machine_check_generic, 1194 .platform = "ppc603", 1195 }, 1196 #endif /* CLASSIC_PPC */ 1197 #ifdef CONFIG_8xx 1198 { /* 8xx */ 1199 .pvr_mask = 0xffff0000, 1200 .pvr_value = 0x00500000, 1201 .cpu_name = "8xx", 1202 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1203 * if the 8xx code is there.... */ 1204 .cpu_features = CPU_FTRS_8XX, 1205 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1206 .mmu_features = MMU_FTR_TYPE_8xx, 1207 .icache_bsize = 16, 1208 .dcache_bsize = 16, 1209 .platform = "ppc823", 1210 }, 1211 #endif /* CONFIG_8xx */ 1212 #ifdef CONFIG_40x 1213 { /* 403GC */ 1214 .pvr_mask = 0xffffff00, 1215 .pvr_value = 0x00200200, 1216 .cpu_name = "403GC", 1217 .cpu_features = CPU_FTRS_40X, 1218 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1219 .mmu_features = MMU_FTR_TYPE_40x, 1220 .icache_bsize = 16, 1221 .dcache_bsize = 16, 1222 .machine_check = machine_check_4xx, 1223 .platform = "ppc403", 1224 }, 1225 { /* 403GCX */ 1226 .pvr_mask = 0xffffff00, 1227 .pvr_value = 0x00201400, 1228 .cpu_name = "403GCX", 1229 .cpu_features = CPU_FTRS_40X, 1230 .cpu_user_features = PPC_FEATURE_32 | 1231 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 1232 .mmu_features = MMU_FTR_TYPE_40x, 1233 .icache_bsize = 16, 1234 .dcache_bsize = 16, 1235 .machine_check = machine_check_4xx, 1236 .platform = "ppc403", 1237 }, 1238 { /* 403G ?? */ 1239 .pvr_mask = 0xffff0000, 1240 .pvr_value = 0x00200000, 1241 .cpu_name = "403G ??", 1242 .cpu_features = CPU_FTRS_40X, 1243 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1244 .mmu_features = MMU_FTR_TYPE_40x, 1245 .icache_bsize = 16, 1246 .dcache_bsize = 16, 1247 .machine_check = machine_check_4xx, 1248 .platform = "ppc403", 1249 }, 1250 { /* 405GP */ 1251 .pvr_mask = 0xffff0000, 1252 .pvr_value = 0x40110000, 1253 .cpu_name = "405GP", 1254 .cpu_features = CPU_FTRS_40X, 1255 .cpu_user_features = PPC_FEATURE_32 | 1256 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1257 .mmu_features = MMU_FTR_TYPE_40x, 1258 .icache_bsize = 32, 1259 .dcache_bsize = 32, 1260 .machine_check = machine_check_4xx, 1261 .platform = "ppc405", 1262 }, 1263 { /* STB 03xxx */ 1264 .pvr_mask = 0xffff0000, 1265 .pvr_value = 0x40130000, 1266 .cpu_name = "STB03xxx", 1267 .cpu_features = CPU_FTRS_40X, 1268 .cpu_user_features = PPC_FEATURE_32 | 1269 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1270 .mmu_features = MMU_FTR_TYPE_40x, 1271 .icache_bsize = 32, 1272 .dcache_bsize = 32, 1273 .machine_check = machine_check_4xx, 1274 .platform = "ppc405", 1275 }, 1276 { /* STB 04xxx */ 1277 .pvr_mask = 0xffff0000, 1278 .pvr_value = 0x41810000, 1279 .cpu_name = "STB04xxx", 1280 .cpu_features = CPU_FTRS_40X, 1281 .cpu_user_features = PPC_FEATURE_32 | 1282 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1283 .mmu_features = MMU_FTR_TYPE_40x, 1284 .icache_bsize = 32, 1285 .dcache_bsize = 32, 1286 .machine_check = machine_check_4xx, 1287 .platform = "ppc405", 1288 }, 1289 { /* NP405L */ 1290 .pvr_mask = 0xffff0000, 1291 .pvr_value = 0x41610000, 1292 .cpu_name = "NP405L", 1293 .cpu_features = CPU_FTRS_40X, 1294 .cpu_user_features = PPC_FEATURE_32 | 1295 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1296 .mmu_features = MMU_FTR_TYPE_40x, 1297 .icache_bsize = 32, 1298 .dcache_bsize = 32, 1299 .machine_check = machine_check_4xx, 1300 .platform = "ppc405", 1301 }, 1302 { /* NP4GS3 */ 1303 .pvr_mask = 0xffff0000, 1304 .pvr_value = 0x40B10000, 1305 .cpu_name = "NP4GS3", 1306 .cpu_features = CPU_FTRS_40X, 1307 .cpu_user_features = PPC_FEATURE_32 | 1308 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1309 .mmu_features = MMU_FTR_TYPE_40x, 1310 .icache_bsize = 32, 1311 .dcache_bsize = 32, 1312 .machine_check = machine_check_4xx, 1313 .platform = "ppc405", 1314 }, 1315 { /* NP405H */ 1316 .pvr_mask = 0xffff0000, 1317 .pvr_value = 0x41410000, 1318 .cpu_name = "NP405H", 1319 .cpu_features = CPU_FTRS_40X, 1320 .cpu_user_features = PPC_FEATURE_32 | 1321 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1322 .mmu_features = MMU_FTR_TYPE_40x, 1323 .icache_bsize = 32, 1324 .dcache_bsize = 32, 1325 .machine_check = machine_check_4xx, 1326 .platform = "ppc405", 1327 }, 1328 { /* 405GPr */ 1329 .pvr_mask = 0xffff0000, 1330 .pvr_value = 0x50910000, 1331 .cpu_name = "405GPr", 1332 .cpu_features = CPU_FTRS_40X, 1333 .cpu_user_features = PPC_FEATURE_32 | 1334 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1335 .mmu_features = MMU_FTR_TYPE_40x, 1336 .icache_bsize = 32, 1337 .dcache_bsize = 32, 1338 .machine_check = machine_check_4xx, 1339 .platform = "ppc405", 1340 }, 1341 { /* STBx25xx */ 1342 .pvr_mask = 0xffff0000, 1343 .pvr_value = 0x51510000, 1344 .cpu_name = "STBx25xx", 1345 .cpu_features = CPU_FTRS_40X, 1346 .cpu_user_features = PPC_FEATURE_32 | 1347 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1348 .mmu_features = MMU_FTR_TYPE_40x, 1349 .icache_bsize = 32, 1350 .dcache_bsize = 32, 1351 .machine_check = machine_check_4xx, 1352 .platform = "ppc405", 1353 }, 1354 { /* 405LP */ 1355 .pvr_mask = 0xffff0000, 1356 .pvr_value = 0x41F10000, 1357 .cpu_name = "405LP", 1358 .cpu_features = CPU_FTRS_40X, 1359 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1360 .mmu_features = MMU_FTR_TYPE_40x, 1361 .icache_bsize = 32, 1362 .dcache_bsize = 32, 1363 .machine_check = machine_check_4xx, 1364 .platform = "ppc405", 1365 }, 1366 { /* Xilinx Virtex-II Pro */ 1367 .pvr_mask = 0xfffff000, 1368 .pvr_value = 0x20010000, 1369 .cpu_name = "Virtex-II Pro", 1370 .cpu_features = CPU_FTRS_40X, 1371 .cpu_user_features = PPC_FEATURE_32 | 1372 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1373 .mmu_features = MMU_FTR_TYPE_40x, 1374 .icache_bsize = 32, 1375 .dcache_bsize = 32, 1376 .machine_check = machine_check_4xx, 1377 .platform = "ppc405", 1378 }, 1379 { /* Xilinx Virtex-4 FX */ 1380 .pvr_mask = 0xfffff000, 1381 .pvr_value = 0x20011000, 1382 .cpu_name = "Virtex-4 FX", 1383 .cpu_features = CPU_FTRS_40X, 1384 .cpu_user_features = PPC_FEATURE_32 | 1385 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1386 .mmu_features = MMU_FTR_TYPE_40x, 1387 .icache_bsize = 32, 1388 .dcache_bsize = 32, 1389 .machine_check = machine_check_4xx, 1390 .platform = "ppc405", 1391 }, 1392 { /* 405EP */ 1393 .pvr_mask = 0xffff0000, 1394 .pvr_value = 0x51210000, 1395 .cpu_name = "405EP", 1396 .cpu_features = CPU_FTRS_40X, 1397 .cpu_user_features = PPC_FEATURE_32 | 1398 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1399 .mmu_features = MMU_FTR_TYPE_40x, 1400 .icache_bsize = 32, 1401 .dcache_bsize = 32, 1402 .machine_check = machine_check_4xx, 1403 .platform = "ppc405", 1404 }, 1405 { /* 405EX Rev. A/B with Security */ 1406 .pvr_mask = 0xffff000f, 1407 .pvr_value = 0x12910007, 1408 .cpu_name = "405EX Rev. A/B", 1409 .cpu_features = CPU_FTRS_40X, 1410 .cpu_user_features = PPC_FEATURE_32 | 1411 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1412 .mmu_features = MMU_FTR_TYPE_40x, 1413 .icache_bsize = 32, 1414 .dcache_bsize = 32, 1415 .machine_check = machine_check_4xx, 1416 .platform = "ppc405", 1417 }, 1418 { /* 405EX Rev. C without Security */ 1419 .pvr_mask = 0xffff000f, 1420 .pvr_value = 0x1291000d, 1421 .cpu_name = "405EX Rev. C", 1422 .cpu_features = CPU_FTRS_40X, 1423 .cpu_user_features = PPC_FEATURE_32 | 1424 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1425 .mmu_features = MMU_FTR_TYPE_40x, 1426 .icache_bsize = 32, 1427 .dcache_bsize = 32, 1428 .machine_check = machine_check_4xx, 1429 .platform = "ppc405", 1430 }, 1431 { /* 405EX Rev. C with Security */ 1432 .pvr_mask = 0xffff000f, 1433 .pvr_value = 0x1291000f, 1434 .cpu_name = "405EX Rev. C", 1435 .cpu_features = CPU_FTRS_40X, 1436 .cpu_user_features = PPC_FEATURE_32 | 1437 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1438 .mmu_features = MMU_FTR_TYPE_40x, 1439 .icache_bsize = 32, 1440 .dcache_bsize = 32, 1441 .machine_check = machine_check_4xx, 1442 .platform = "ppc405", 1443 }, 1444 { /* 405EX Rev. D without Security */ 1445 .pvr_mask = 0xffff000f, 1446 .pvr_value = 0x12910003, 1447 .cpu_name = "405EX Rev. D", 1448 .cpu_features = CPU_FTRS_40X, 1449 .cpu_user_features = PPC_FEATURE_32 | 1450 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1451 .mmu_features = MMU_FTR_TYPE_40x, 1452 .icache_bsize = 32, 1453 .dcache_bsize = 32, 1454 .machine_check = machine_check_4xx, 1455 .platform = "ppc405", 1456 }, 1457 { /* 405EX Rev. D with Security */ 1458 .pvr_mask = 0xffff000f, 1459 .pvr_value = 0x12910005, 1460 .cpu_name = "405EX Rev. D", 1461 .cpu_features = CPU_FTRS_40X, 1462 .cpu_user_features = PPC_FEATURE_32 | 1463 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1464 .mmu_features = MMU_FTR_TYPE_40x, 1465 .icache_bsize = 32, 1466 .dcache_bsize = 32, 1467 .machine_check = machine_check_4xx, 1468 .platform = "ppc405", 1469 }, 1470 { /* 405EXr Rev. A/B without Security */ 1471 .pvr_mask = 0xffff000f, 1472 .pvr_value = 0x12910001, 1473 .cpu_name = "405EXr Rev. A/B", 1474 .cpu_features = CPU_FTRS_40X, 1475 .cpu_user_features = PPC_FEATURE_32 | 1476 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1477 .mmu_features = MMU_FTR_TYPE_40x, 1478 .icache_bsize = 32, 1479 .dcache_bsize = 32, 1480 .machine_check = machine_check_4xx, 1481 .platform = "ppc405", 1482 }, 1483 { /* 405EXr Rev. C without Security */ 1484 .pvr_mask = 0xffff000f, 1485 .pvr_value = 0x12910009, 1486 .cpu_name = "405EXr Rev. C", 1487 .cpu_features = CPU_FTRS_40X, 1488 .cpu_user_features = PPC_FEATURE_32 | 1489 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1490 .mmu_features = MMU_FTR_TYPE_40x, 1491 .icache_bsize = 32, 1492 .dcache_bsize = 32, 1493 .machine_check = machine_check_4xx, 1494 .platform = "ppc405", 1495 }, 1496 { /* 405EXr Rev. C with Security */ 1497 .pvr_mask = 0xffff000f, 1498 .pvr_value = 0x1291000b, 1499 .cpu_name = "405EXr Rev. C", 1500 .cpu_features = CPU_FTRS_40X, 1501 .cpu_user_features = PPC_FEATURE_32 | 1502 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1503 .mmu_features = MMU_FTR_TYPE_40x, 1504 .icache_bsize = 32, 1505 .dcache_bsize = 32, 1506 .machine_check = machine_check_4xx, 1507 .platform = "ppc405", 1508 }, 1509 { /* 405EXr Rev. D without Security */ 1510 .pvr_mask = 0xffff000f, 1511 .pvr_value = 0x12910000, 1512 .cpu_name = "405EXr Rev. D", 1513 .cpu_features = CPU_FTRS_40X, 1514 .cpu_user_features = PPC_FEATURE_32 | 1515 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1516 .mmu_features = MMU_FTR_TYPE_40x, 1517 .icache_bsize = 32, 1518 .dcache_bsize = 32, 1519 .machine_check = machine_check_4xx, 1520 .platform = "ppc405", 1521 }, 1522 { /* 405EXr Rev. D with Security */ 1523 .pvr_mask = 0xffff000f, 1524 .pvr_value = 0x12910002, 1525 .cpu_name = "405EXr Rev. D", 1526 .cpu_features = CPU_FTRS_40X, 1527 .cpu_user_features = PPC_FEATURE_32 | 1528 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1529 .mmu_features = MMU_FTR_TYPE_40x, 1530 .icache_bsize = 32, 1531 .dcache_bsize = 32, 1532 .machine_check = machine_check_4xx, 1533 .platform = "ppc405", 1534 }, 1535 { 1536 /* 405EZ */ 1537 .pvr_mask = 0xffff0000, 1538 .pvr_value = 0x41510000, 1539 .cpu_name = "405EZ", 1540 .cpu_features = CPU_FTRS_40X, 1541 .cpu_user_features = PPC_FEATURE_32 | 1542 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1543 .mmu_features = MMU_FTR_TYPE_40x, 1544 .icache_bsize = 32, 1545 .dcache_bsize = 32, 1546 .machine_check = machine_check_4xx, 1547 .platform = "ppc405", 1548 }, 1549 { /* APM8018X */ 1550 .pvr_mask = 0xffff0000, 1551 .pvr_value = 0x7ff11432, 1552 .cpu_name = "APM8018X", 1553 .cpu_features = CPU_FTRS_40X, 1554 .cpu_user_features = PPC_FEATURE_32 | 1555 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1556 .mmu_features = MMU_FTR_TYPE_40x, 1557 .icache_bsize = 32, 1558 .dcache_bsize = 32, 1559 .machine_check = machine_check_4xx, 1560 .platform = "ppc405", 1561 }, 1562 { /* default match */ 1563 .pvr_mask = 0x00000000, 1564 .pvr_value = 0x00000000, 1565 .cpu_name = "(generic 40x PPC)", 1566 .cpu_features = CPU_FTRS_40X, 1567 .cpu_user_features = PPC_FEATURE_32 | 1568 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1569 .mmu_features = MMU_FTR_TYPE_40x, 1570 .icache_bsize = 32, 1571 .dcache_bsize = 32, 1572 .machine_check = machine_check_4xx, 1573 .platform = "ppc405", 1574 } 1575 1576 #endif /* CONFIG_40x */ 1577 #ifdef CONFIG_44x 1578 { 1579 .pvr_mask = 0xf0000fff, 1580 .pvr_value = 0x40000850, 1581 .cpu_name = "440GR Rev. A", 1582 .cpu_features = CPU_FTRS_44X, 1583 .cpu_user_features = COMMON_USER_BOOKE, 1584 .mmu_features = MMU_FTR_TYPE_44x, 1585 .icache_bsize = 32, 1586 .dcache_bsize = 32, 1587 .machine_check = machine_check_4xx, 1588 .platform = "ppc440", 1589 }, 1590 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1591 .pvr_mask = 0xf0000fff, 1592 .pvr_value = 0x40000858, 1593 .cpu_name = "440EP Rev. A", 1594 .cpu_features = CPU_FTRS_44X, 1595 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1596 .mmu_features = MMU_FTR_TYPE_44x, 1597 .icache_bsize = 32, 1598 .dcache_bsize = 32, 1599 .cpu_setup = __setup_cpu_440ep, 1600 .machine_check = machine_check_4xx, 1601 .platform = "ppc440", 1602 }, 1603 { 1604 .pvr_mask = 0xf0000fff, 1605 .pvr_value = 0x400008d3, 1606 .cpu_name = "440GR Rev. B", 1607 .cpu_features = CPU_FTRS_44X, 1608 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1609 .mmu_features = MMU_FTR_TYPE_44x, 1610 .icache_bsize = 32, 1611 .dcache_bsize = 32, 1612 .machine_check = machine_check_4xx, 1613 .platform = "ppc440", 1614 }, 1615 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1616 .pvr_mask = 0xf0000ff7, 1617 .pvr_value = 0x400008d4, 1618 .cpu_name = "440EP Rev. C", 1619 .cpu_features = CPU_FTRS_44X, 1620 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1621 .mmu_features = MMU_FTR_TYPE_44x, 1622 .icache_bsize = 32, 1623 .dcache_bsize = 32, 1624 .cpu_setup = __setup_cpu_440ep, 1625 .machine_check = machine_check_4xx, 1626 .platform = "ppc440", 1627 }, 1628 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1629 .pvr_mask = 0xf0000fff, 1630 .pvr_value = 0x400008db, 1631 .cpu_name = "440EP Rev. B", 1632 .cpu_features = CPU_FTRS_44X, 1633 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1634 .mmu_features = MMU_FTR_TYPE_44x, 1635 .icache_bsize = 32, 1636 .dcache_bsize = 32, 1637 .cpu_setup = __setup_cpu_440ep, 1638 .machine_check = machine_check_4xx, 1639 .platform = "ppc440", 1640 }, 1641 { /* 440GRX */ 1642 .pvr_mask = 0xf0000ffb, 1643 .pvr_value = 0x200008D0, 1644 .cpu_name = "440GRX", 1645 .cpu_features = CPU_FTRS_44X, 1646 .cpu_user_features = COMMON_USER_BOOKE, 1647 .mmu_features = MMU_FTR_TYPE_44x, 1648 .icache_bsize = 32, 1649 .dcache_bsize = 32, 1650 .cpu_setup = __setup_cpu_440grx, 1651 .machine_check = machine_check_440A, 1652 .platform = "ppc440", 1653 }, 1654 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1655 .pvr_mask = 0xf0000ffb, 1656 .pvr_value = 0x200008D8, 1657 .cpu_name = "440EPX", 1658 .cpu_features = CPU_FTRS_44X, 1659 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1660 .mmu_features = MMU_FTR_TYPE_44x, 1661 .icache_bsize = 32, 1662 .dcache_bsize = 32, 1663 .cpu_setup = __setup_cpu_440epx, 1664 .machine_check = machine_check_440A, 1665 .platform = "ppc440", 1666 }, 1667 { /* 440GP Rev. B */ 1668 .pvr_mask = 0xf0000fff, 1669 .pvr_value = 0x40000440, 1670 .cpu_name = "440GP Rev. B", 1671 .cpu_features = CPU_FTRS_44X, 1672 .cpu_user_features = COMMON_USER_BOOKE, 1673 .mmu_features = MMU_FTR_TYPE_44x, 1674 .icache_bsize = 32, 1675 .dcache_bsize = 32, 1676 .machine_check = machine_check_4xx, 1677 .platform = "ppc440gp", 1678 }, 1679 { /* 440GP Rev. C */ 1680 .pvr_mask = 0xf0000fff, 1681 .pvr_value = 0x40000481, 1682 .cpu_name = "440GP Rev. C", 1683 .cpu_features = CPU_FTRS_44X, 1684 .cpu_user_features = COMMON_USER_BOOKE, 1685 .mmu_features = MMU_FTR_TYPE_44x, 1686 .icache_bsize = 32, 1687 .dcache_bsize = 32, 1688 .machine_check = machine_check_4xx, 1689 .platform = "ppc440gp", 1690 }, 1691 { /* 440GX Rev. A */ 1692 .pvr_mask = 0xf0000fff, 1693 .pvr_value = 0x50000850, 1694 .cpu_name = "440GX Rev. A", 1695 .cpu_features = CPU_FTRS_44X, 1696 .cpu_user_features = COMMON_USER_BOOKE, 1697 .mmu_features = MMU_FTR_TYPE_44x, 1698 .icache_bsize = 32, 1699 .dcache_bsize = 32, 1700 .cpu_setup = __setup_cpu_440gx, 1701 .machine_check = machine_check_440A, 1702 .platform = "ppc440", 1703 }, 1704 { /* 440GX Rev. B */ 1705 .pvr_mask = 0xf0000fff, 1706 .pvr_value = 0x50000851, 1707 .cpu_name = "440GX Rev. B", 1708 .cpu_features = CPU_FTRS_44X, 1709 .cpu_user_features = COMMON_USER_BOOKE, 1710 .mmu_features = MMU_FTR_TYPE_44x, 1711 .icache_bsize = 32, 1712 .dcache_bsize = 32, 1713 .cpu_setup = __setup_cpu_440gx, 1714 .machine_check = machine_check_440A, 1715 .platform = "ppc440", 1716 }, 1717 { /* 440GX Rev. C */ 1718 .pvr_mask = 0xf0000fff, 1719 .pvr_value = 0x50000892, 1720 .cpu_name = "440GX Rev. C", 1721 .cpu_features = CPU_FTRS_44X, 1722 .cpu_user_features = COMMON_USER_BOOKE, 1723 .mmu_features = MMU_FTR_TYPE_44x, 1724 .icache_bsize = 32, 1725 .dcache_bsize = 32, 1726 .cpu_setup = __setup_cpu_440gx, 1727 .machine_check = machine_check_440A, 1728 .platform = "ppc440", 1729 }, 1730 { /* 440GX Rev. F */ 1731 .pvr_mask = 0xf0000fff, 1732 .pvr_value = 0x50000894, 1733 .cpu_name = "440GX Rev. F", 1734 .cpu_features = CPU_FTRS_44X, 1735 .cpu_user_features = COMMON_USER_BOOKE, 1736 .mmu_features = MMU_FTR_TYPE_44x, 1737 .icache_bsize = 32, 1738 .dcache_bsize = 32, 1739 .cpu_setup = __setup_cpu_440gx, 1740 .machine_check = machine_check_440A, 1741 .platform = "ppc440", 1742 }, 1743 { /* 440SP Rev. A */ 1744 .pvr_mask = 0xfff00fff, 1745 .pvr_value = 0x53200891, 1746 .cpu_name = "440SP Rev. A", 1747 .cpu_features = CPU_FTRS_44X, 1748 .cpu_user_features = COMMON_USER_BOOKE, 1749 .mmu_features = MMU_FTR_TYPE_44x, 1750 .icache_bsize = 32, 1751 .dcache_bsize = 32, 1752 .machine_check = machine_check_4xx, 1753 .platform = "ppc440", 1754 }, 1755 { /* 440SPe Rev. A */ 1756 .pvr_mask = 0xfff00fff, 1757 .pvr_value = 0x53400890, 1758 .cpu_name = "440SPe Rev. A", 1759 .cpu_features = CPU_FTRS_44X, 1760 .cpu_user_features = COMMON_USER_BOOKE, 1761 .mmu_features = MMU_FTR_TYPE_44x, 1762 .icache_bsize = 32, 1763 .dcache_bsize = 32, 1764 .cpu_setup = __setup_cpu_440spe, 1765 .machine_check = machine_check_440A, 1766 .platform = "ppc440", 1767 }, 1768 { /* 440SPe Rev. B */ 1769 .pvr_mask = 0xfff00fff, 1770 .pvr_value = 0x53400891, 1771 .cpu_name = "440SPe Rev. B", 1772 .cpu_features = CPU_FTRS_44X, 1773 .cpu_user_features = COMMON_USER_BOOKE, 1774 .mmu_features = MMU_FTR_TYPE_44x, 1775 .icache_bsize = 32, 1776 .dcache_bsize = 32, 1777 .cpu_setup = __setup_cpu_440spe, 1778 .machine_check = machine_check_440A, 1779 .platform = "ppc440", 1780 }, 1781 { /* 440 in Xilinx Virtex-5 FXT */ 1782 .pvr_mask = 0xfffffff0, 1783 .pvr_value = 0x7ff21910, 1784 .cpu_name = "440 in Virtex-5 FXT", 1785 .cpu_features = CPU_FTRS_44X, 1786 .cpu_user_features = COMMON_USER_BOOKE, 1787 .mmu_features = MMU_FTR_TYPE_44x, 1788 .icache_bsize = 32, 1789 .dcache_bsize = 32, 1790 .cpu_setup = __setup_cpu_440x5, 1791 .machine_check = machine_check_440A, 1792 .platform = "ppc440", 1793 }, 1794 { /* 460EX */ 1795 .pvr_mask = 0xffff0006, 1796 .pvr_value = 0x13020002, 1797 .cpu_name = "460EX", 1798 .cpu_features = CPU_FTRS_440x6, 1799 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1800 .mmu_features = MMU_FTR_TYPE_44x, 1801 .icache_bsize = 32, 1802 .dcache_bsize = 32, 1803 .cpu_setup = __setup_cpu_460ex, 1804 .machine_check = machine_check_440A, 1805 .platform = "ppc440", 1806 }, 1807 { /* 460EX Rev B */ 1808 .pvr_mask = 0xffff0007, 1809 .pvr_value = 0x13020004, 1810 .cpu_name = "460EX Rev. B", 1811 .cpu_features = CPU_FTRS_440x6, 1812 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1813 .mmu_features = MMU_FTR_TYPE_44x, 1814 .icache_bsize = 32, 1815 .dcache_bsize = 32, 1816 .cpu_setup = __setup_cpu_460ex, 1817 .machine_check = machine_check_440A, 1818 .platform = "ppc440", 1819 }, 1820 { /* 460GT */ 1821 .pvr_mask = 0xffff0006, 1822 .pvr_value = 0x13020000, 1823 .cpu_name = "460GT", 1824 .cpu_features = CPU_FTRS_440x6, 1825 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1826 .mmu_features = MMU_FTR_TYPE_44x, 1827 .icache_bsize = 32, 1828 .dcache_bsize = 32, 1829 .cpu_setup = __setup_cpu_460gt, 1830 .machine_check = machine_check_440A, 1831 .platform = "ppc440", 1832 }, 1833 { /* 460GT Rev B */ 1834 .pvr_mask = 0xffff0007, 1835 .pvr_value = 0x13020005, 1836 .cpu_name = "460GT Rev. B", 1837 .cpu_features = CPU_FTRS_440x6, 1838 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1839 .mmu_features = MMU_FTR_TYPE_44x, 1840 .icache_bsize = 32, 1841 .dcache_bsize = 32, 1842 .cpu_setup = __setup_cpu_460gt, 1843 .machine_check = machine_check_440A, 1844 .platform = "ppc440", 1845 }, 1846 { /* 460SX */ 1847 .pvr_mask = 0xffffff00, 1848 .pvr_value = 0x13541800, 1849 .cpu_name = "460SX", 1850 .cpu_features = CPU_FTRS_44X, 1851 .cpu_user_features = COMMON_USER_BOOKE, 1852 .mmu_features = MMU_FTR_TYPE_44x, 1853 .icache_bsize = 32, 1854 .dcache_bsize = 32, 1855 .cpu_setup = __setup_cpu_460sx, 1856 .machine_check = machine_check_440A, 1857 .platform = "ppc440", 1858 }, 1859 { /* 464 in APM821xx */ 1860 .pvr_mask = 0xfffffff0, 1861 .pvr_value = 0x12C41C80, 1862 .cpu_name = "APM821XX", 1863 .cpu_features = CPU_FTRS_44X, 1864 .cpu_user_features = COMMON_USER_BOOKE | 1865 PPC_FEATURE_HAS_FPU, 1866 .mmu_features = MMU_FTR_TYPE_44x, 1867 .icache_bsize = 32, 1868 .dcache_bsize = 32, 1869 .cpu_setup = __setup_cpu_apm821xx, 1870 .machine_check = machine_check_440A, 1871 .platform = "ppc440", 1872 }, 1873 { /* 476 DD2 core */ 1874 .pvr_mask = 0xffffffff, 1875 .pvr_value = 0x11a52080, 1876 .cpu_name = "476", 1877 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1878 .cpu_user_features = COMMON_USER_BOOKE | 1879 PPC_FEATURE_HAS_FPU, 1880 .mmu_features = MMU_FTR_TYPE_47x | 1881 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1882 .icache_bsize = 32, 1883 .dcache_bsize = 128, 1884 .machine_check = machine_check_47x, 1885 .platform = "ppc470", 1886 }, 1887 { /* 476fpe */ 1888 .pvr_mask = 0xffff0000, 1889 .pvr_value = 0x7ff50000, 1890 .cpu_name = "476fpe", 1891 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1892 .cpu_user_features = COMMON_USER_BOOKE | 1893 PPC_FEATURE_HAS_FPU, 1894 .mmu_features = MMU_FTR_TYPE_47x | 1895 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1896 .icache_bsize = 32, 1897 .dcache_bsize = 128, 1898 .machine_check = machine_check_47x, 1899 .platform = "ppc470", 1900 }, 1901 { /* 476 iss */ 1902 .pvr_mask = 0xffff0000, 1903 .pvr_value = 0x00050000, 1904 .cpu_name = "476", 1905 .cpu_features = CPU_FTRS_47X, 1906 .cpu_user_features = COMMON_USER_BOOKE | 1907 PPC_FEATURE_HAS_FPU, 1908 .mmu_features = MMU_FTR_TYPE_47x | 1909 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1910 .icache_bsize = 32, 1911 .dcache_bsize = 128, 1912 .machine_check = machine_check_47x, 1913 .platform = "ppc470", 1914 }, 1915 { /* 476 others */ 1916 .pvr_mask = 0xffff0000, 1917 .pvr_value = 0x11a50000, 1918 .cpu_name = "476", 1919 .cpu_features = CPU_FTRS_47X, 1920 .cpu_user_features = COMMON_USER_BOOKE | 1921 PPC_FEATURE_HAS_FPU, 1922 .mmu_features = MMU_FTR_TYPE_47x | 1923 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1924 .icache_bsize = 32, 1925 .dcache_bsize = 128, 1926 .machine_check = machine_check_47x, 1927 .platform = "ppc470", 1928 }, 1929 { /* default match */ 1930 .pvr_mask = 0x00000000, 1931 .pvr_value = 0x00000000, 1932 .cpu_name = "(generic 44x PPC)", 1933 .cpu_features = CPU_FTRS_44X, 1934 .cpu_user_features = COMMON_USER_BOOKE, 1935 .mmu_features = MMU_FTR_TYPE_44x, 1936 .icache_bsize = 32, 1937 .dcache_bsize = 32, 1938 .machine_check = machine_check_4xx, 1939 .platform = "ppc440", 1940 } 1941 #endif /* CONFIG_44x */ 1942 #ifdef CONFIG_E200 1943 { /* e200z5 */ 1944 .pvr_mask = 0xfff00000, 1945 .pvr_value = 0x81000000, 1946 .cpu_name = "e200z5", 1947 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1948 .cpu_features = CPU_FTRS_E200, 1949 .cpu_user_features = COMMON_USER_BOOKE | 1950 PPC_FEATURE_HAS_EFP_SINGLE | 1951 PPC_FEATURE_UNIFIED_CACHE, 1952 .mmu_features = MMU_FTR_TYPE_FSL_E, 1953 .dcache_bsize = 32, 1954 .machine_check = machine_check_e200, 1955 .platform = "ppc5554", 1956 }, 1957 { /* e200z6 */ 1958 .pvr_mask = 0xfff00000, 1959 .pvr_value = 0x81100000, 1960 .cpu_name = "e200z6", 1961 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1962 .cpu_features = CPU_FTRS_E200, 1963 .cpu_user_features = COMMON_USER_BOOKE | 1964 PPC_FEATURE_HAS_SPE_COMP | 1965 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1966 PPC_FEATURE_UNIFIED_CACHE, 1967 .mmu_features = MMU_FTR_TYPE_FSL_E, 1968 .dcache_bsize = 32, 1969 .machine_check = machine_check_e200, 1970 .platform = "ppc5554", 1971 }, 1972 { /* default match */ 1973 .pvr_mask = 0x00000000, 1974 .pvr_value = 0x00000000, 1975 .cpu_name = "(generic E200 PPC)", 1976 .cpu_features = CPU_FTRS_E200, 1977 .cpu_user_features = COMMON_USER_BOOKE | 1978 PPC_FEATURE_HAS_EFP_SINGLE | 1979 PPC_FEATURE_UNIFIED_CACHE, 1980 .mmu_features = MMU_FTR_TYPE_FSL_E, 1981 .dcache_bsize = 32, 1982 .cpu_setup = __setup_cpu_e200, 1983 .machine_check = machine_check_e200, 1984 .platform = "ppc5554", 1985 } 1986 #endif /* CONFIG_E200 */ 1987 #endif /* CONFIG_PPC32 */ 1988 #ifdef CONFIG_E500 1989 #ifdef CONFIG_PPC32 1990 { /* e500 */ 1991 .pvr_mask = 0xffff0000, 1992 .pvr_value = 0x80200000, 1993 .cpu_name = "e500", 1994 .cpu_features = CPU_FTRS_E500, 1995 .cpu_user_features = COMMON_USER_BOOKE | 1996 PPC_FEATURE_HAS_SPE_COMP | 1997 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1998 .mmu_features = MMU_FTR_TYPE_FSL_E, 1999 .icache_bsize = 32, 2000 .dcache_bsize = 32, 2001 .num_pmcs = 4, 2002 .oprofile_cpu_type = "ppc/e500", 2003 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2004 .cpu_setup = __setup_cpu_e500v1, 2005 .machine_check = machine_check_e500, 2006 .platform = "ppc8540", 2007 }, 2008 { /* e500v2 */ 2009 .pvr_mask = 0xffff0000, 2010 .pvr_value = 0x80210000, 2011 .cpu_name = "e500v2", 2012 .cpu_features = CPU_FTRS_E500_2, 2013 .cpu_user_features = COMMON_USER_BOOKE | 2014 PPC_FEATURE_HAS_SPE_COMP | 2015 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 2016 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 2017 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 2018 .icache_bsize = 32, 2019 .dcache_bsize = 32, 2020 .num_pmcs = 4, 2021 .oprofile_cpu_type = "ppc/e500", 2022 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2023 .cpu_setup = __setup_cpu_e500v2, 2024 .machine_check = machine_check_e500, 2025 .platform = "ppc8548", 2026 }, 2027 { /* e500mc */ 2028 .pvr_mask = 0xffff0000, 2029 .pvr_value = 0x80230000, 2030 .cpu_name = "e500mc", 2031 .cpu_features = CPU_FTRS_E500MC, 2032 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2033 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2034 MMU_FTR_USE_TLBILX, 2035 .icache_bsize = 64, 2036 .dcache_bsize = 64, 2037 .num_pmcs = 4, 2038 .oprofile_cpu_type = "ppc/e500mc", 2039 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2040 .cpu_setup = __setup_cpu_e500mc, 2041 .machine_check = machine_check_e500mc, 2042 .platform = "ppce500mc", 2043 }, 2044 #endif /* CONFIG_PPC32 */ 2045 { /* e5500 */ 2046 .pvr_mask = 0xffff0000, 2047 .pvr_value = 0x80240000, 2048 .cpu_name = "e5500", 2049 .cpu_features = CPU_FTRS_E5500, 2050 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 2051 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2052 MMU_FTR_USE_TLBILX, 2053 .icache_bsize = 64, 2054 .dcache_bsize = 64, 2055 .num_pmcs = 4, 2056 .oprofile_cpu_type = "ppc/e500mc", 2057 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2058 .cpu_setup = __setup_cpu_e5500, 2059 #ifndef CONFIG_PPC32 2060 .cpu_restore = __restore_cpu_e5500, 2061 #endif 2062 .machine_check = machine_check_e500mc, 2063 .platform = "ppce5500", 2064 }, 2065 { /* e6500 */ 2066 .pvr_mask = 0xffff0000, 2067 .pvr_value = 0x80400000, 2068 .cpu_name = "e6500", 2069 .cpu_features = CPU_FTRS_E6500, 2070 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 2071 PPC_FEATURE_HAS_ALTIVEC_COMP, 2072 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 2073 MMU_FTR_USE_TLBILX, 2074 .icache_bsize = 64, 2075 .dcache_bsize = 64, 2076 .num_pmcs = 4, 2077 .oprofile_cpu_type = "ppc/e6500", 2078 .oprofile_type = PPC_OPROFILE_FSL_EMB, 2079 .cpu_setup = __setup_cpu_e6500, 2080 #ifndef CONFIG_PPC32 2081 .cpu_restore = __restore_cpu_e6500, 2082 #endif 2083 .machine_check = machine_check_e500mc, 2084 .platform = "ppce6500", 2085 }, 2086 #ifdef CONFIG_PPC32 2087 { /* default match */ 2088 .pvr_mask = 0x00000000, 2089 .pvr_value = 0x00000000, 2090 .cpu_name = "(generic E500 PPC)", 2091 .cpu_features = CPU_FTRS_E500, 2092 .cpu_user_features = COMMON_USER_BOOKE | 2093 PPC_FEATURE_HAS_SPE_COMP | 2094 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 2095 .mmu_features = MMU_FTR_TYPE_FSL_E, 2096 .icache_bsize = 32, 2097 .dcache_bsize = 32, 2098 .machine_check = machine_check_e500, 2099 .platform = "powerpc", 2100 } 2101 #endif /* CONFIG_PPC32 */ 2102 #endif /* CONFIG_E500 */ 2103 2104 #ifdef CONFIG_PPC_A2 2105 { /* Standard A2 (>= DD2) + FPU core */ 2106 .pvr_mask = 0xffff0000, 2107 .pvr_value = 0x00480000, 2108 .cpu_name = "A2 (>= DD2)", 2109 .cpu_features = CPU_FTRS_A2, 2110 .cpu_user_features = COMMON_USER_PPC64, 2111 .mmu_features = MMU_FTRS_A2, 2112 .icache_bsize = 64, 2113 .dcache_bsize = 64, 2114 .num_pmcs = 0, 2115 .cpu_setup = __setup_cpu_a2, 2116 .cpu_restore = __restore_cpu_a2, 2117 .machine_check = machine_check_generic, 2118 .platform = "ppca2", 2119 }, 2120 { /* This is a default entry to get going, to be replaced by 2121 * a real one at some stage 2122 */ 2123 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ 2124 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ 2125 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 2126 .pvr_mask = 0x00000000, 2127 .pvr_value = 0x00000000, 2128 .cpu_name = "Book3E", 2129 .cpu_features = CPU_FTRS_BASE_BOOK3E, 2130 .cpu_user_features = COMMON_USER_PPC64, 2131 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | 2132 MMU_FTR_USE_TLBIVAX_BCAST | 2133 MMU_FTR_LOCK_BCAST_INVAL, 2134 .icache_bsize = 64, 2135 .dcache_bsize = 64, 2136 .num_pmcs = 0, 2137 .machine_check = machine_check_generic, 2138 .platform = "power6", 2139 }, 2140 #endif /* CONFIG_PPC_A2 */ 2141 }; 2142 2143 static struct cpu_spec the_cpu_spec; 2144 2145 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2146 struct cpu_spec *s) 2147 { 2148 struct cpu_spec *t = &the_cpu_spec; 2149 struct cpu_spec old; 2150 2151 t = PTRRELOC(t); 2152 old = *t; 2153 2154 /* Copy everything, then do fixups */ 2155 *t = *s; 2156 2157 /* 2158 * If we are overriding a previous value derived from the real 2159 * PVR with a new value obtained using a logical PVR value, 2160 * don't modify the performance monitor fields. 2161 */ 2162 if (old.num_pmcs && !s->num_pmcs) { 2163 t->num_pmcs = old.num_pmcs; 2164 t->pmc_type = old.pmc_type; 2165 t->oprofile_type = old.oprofile_type; 2166 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; 2167 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; 2168 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; 2169 2170 /* 2171 * If we have passed through this logic once before and 2172 * have pulled the default case because the real PVR was 2173 * not found inside cpu_specs[], then we are possibly 2174 * running in compatibility mode. In that case, let the 2175 * oprofiler know which set of compatibility counters to 2176 * pull from by making sure the oprofile_cpu_type string 2177 * is set to that of compatibility mode. If the 2178 * oprofile_cpu_type already has a value, then we are 2179 * possibly overriding a real PVR with a logical one, 2180 * and, in that case, keep the current value for 2181 * oprofile_cpu_type. 2182 */ 2183 if (old.oprofile_cpu_type != NULL) { 2184 t->oprofile_cpu_type = old.oprofile_cpu_type; 2185 t->oprofile_type = old.oprofile_type; 2186 } 2187 } 2188 2189 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2190 2191 /* 2192 * Set the base platform string once; assumes 2193 * we're called with real pvr first. 2194 */ 2195 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2196 *PTRRELOC(&powerpc_base_platform) = t->platform; 2197 2198 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2199 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2200 * that processor. I will consolidate that at a later time, for now, 2201 * just use #ifdef. We also don't need to PTRRELOC the function 2202 * pointer on ppc64 and booke as we are running at 0 in real mode 2203 * on ppc64 and reloc_offset is always 0 on booke. 2204 */ 2205 if (t->cpu_setup) { 2206 t->cpu_setup(offset, t); 2207 } 2208 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2209 2210 return t; 2211 } 2212 2213 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2214 { 2215 struct cpu_spec *s = cpu_specs; 2216 int i; 2217 2218 s = PTRRELOC(s); 2219 2220 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2221 if ((pvr & s->pvr_mask) == s->pvr_value) 2222 return setup_cpu_spec(offset, s); 2223 } 2224 2225 BUG(); 2226 2227 return NULL; 2228 } 2229