1 /* 2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 3 * 4 * Modifications for ppc64: 5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/threads.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 19 #include <asm/oprofile_impl.h> 20 #include <asm/cputable.h> 21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ 22 23 struct cpu_spec* cur_cpu_spec = NULL; 24 EXPORT_SYMBOL(cur_cpu_spec); 25 26 /* NOTE: 27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 28 * the responsibility of the appropriate CPU save/restore functions to 29 * eventually copy these settings over. Those save/restore aren't yet 30 * part of the cputable though. That has to be fixed for both ppc32 31 * and ppc64 32 */ 33 #ifdef CONFIG_PPC32 34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 42 #endif /* CONFIG_PPC32 */ 43 #ifdef CONFIG_PPC64 44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 46 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 47 extern void __restore_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 48 extern void __restore_cpu_ppc970(void); 49 #endif /* CONFIG_PPC64 */ 50 51 /* This table only contains "desktop" CPUs, it need to be filled with embedded 52 * ones as well... 53 */ 54 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 55 PPC_FEATURE_HAS_MMU) 56 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 57 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 58 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 60 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 62 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 63 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 64 PPC_FEATURE_TRUE_LE) 65 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 66 PPC_FEATURE_TRUE_LE | \ 67 PPC_FEATURE_HAS_ALTIVEC_COMP) 68 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 69 PPC_FEATURE_BOOKE) 70 71 /* We only set the spe features if the kernel was compiled with 72 * spe support 73 */ 74 #ifdef CONFIG_SPE 75 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE 76 #else 77 #define PPC_FEATURE_SPE_COMP 0 78 #endif 79 80 static struct cpu_spec cpu_specs[] = { 81 #ifdef CONFIG_PPC64 82 { /* Power3 */ 83 .pvr_mask = 0xffff0000, 84 .pvr_value = 0x00400000, 85 .cpu_name = "POWER3 (630)", 86 .cpu_features = CPU_FTRS_POWER3, 87 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 88 .icache_bsize = 128, 89 .dcache_bsize = 128, 90 .num_pmcs = 8, 91 .pmc_type = PPC_PMC_IBM, 92 .oprofile_cpu_type = "ppc64/power3", 93 .oprofile_type = PPC_OPROFILE_RS64, 94 .platform = "power3", 95 }, 96 { /* Power3+ */ 97 .pvr_mask = 0xffff0000, 98 .pvr_value = 0x00410000, 99 .cpu_name = "POWER3 (630+)", 100 .cpu_features = CPU_FTRS_POWER3, 101 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE, 102 .icache_bsize = 128, 103 .dcache_bsize = 128, 104 .num_pmcs = 8, 105 .pmc_type = PPC_PMC_IBM, 106 .oprofile_cpu_type = "ppc64/power3", 107 .oprofile_type = PPC_OPROFILE_RS64, 108 .platform = "power3", 109 }, 110 { /* Northstar */ 111 .pvr_mask = 0xffff0000, 112 .pvr_value = 0x00330000, 113 .cpu_name = "RS64-II (northstar)", 114 .cpu_features = CPU_FTRS_RS64, 115 .cpu_user_features = COMMON_USER_PPC64, 116 .icache_bsize = 128, 117 .dcache_bsize = 128, 118 .num_pmcs = 8, 119 .pmc_type = PPC_PMC_IBM, 120 .oprofile_cpu_type = "ppc64/rs64", 121 .oprofile_type = PPC_OPROFILE_RS64, 122 .platform = "rs64", 123 }, 124 { /* Pulsar */ 125 .pvr_mask = 0xffff0000, 126 .pvr_value = 0x00340000, 127 .cpu_name = "RS64-III (pulsar)", 128 .cpu_features = CPU_FTRS_RS64, 129 .cpu_user_features = COMMON_USER_PPC64, 130 .icache_bsize = 128, 131 .dcache_bsize = 128, 132 .num_pmcs = 8, 133 .pmc_type = PPC_PMC_IBM, 134 .oprofile_cpu_type = "ppc64/rs64", 135 .oprofile_type = PPC_OPROFILE_RS64, 136 .platform = "rs64", 137 }, 138 { /* I-star */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00360000, 141 .cpu_name = "RS64-III (icestar)", 142 .cpu_features = CPU_FTRS_RS64, 143 .cpu_user_features = COMMON_USER_PPC64, 144 .icache_bsize = 128, 145 .dcache_bsize = 128, 146 .num_pmcs = 8, 147 .pmc_type = PPC_PMC_IBM, 148 .oprofile_cpu_type = "ppc64/rs64", 149 .oprofile_type = PPC_OPROFILE_RS64, 150 .platform = "rs64", 151 }, 152 { /* S-star */ 153 .pvr_mask = 0xffff0000, 154 .pvr_value = 0x00370000, 155 .cpu_name = "RS64-IV (sstar)", 156 .cpu_features = CPU_FTRS_RS64, 157 .cpu_user_features = COMMON_USER_PPC64, 158 .icache_bsize = 128, 159 .dcache_bsize = 128, 160 .num_pmcs = 8, 161 .pmc_type = PPC_PMC_IBM, 162 .oprofile_cpu_type = "ppc64/rs64", 163 .oprofile_type = PPC_OPROFILE_RS64, 164 .platform = "rs64", 165 }, 166 { /* Power4 */ 167 .pvr_mask = 0xffff0000, 168 .pvr_value = 0x00350000, 169 .cpu_name = "POWER4 (gp)", 170 .cpu_features = CPU_FTRS_POWER4, 171 .cpu_user_features = COMMON_USER_POWER4, 172 .icache_bsize = 128, 173 .dcache_bsize = 128, 174 .num_pmcs = 8, 175 .pmc_type = PPC_PMC_IBM, 176 .oprofile_cpu_type = "ppc64/power4", 177 .oprofile_type = PPC_OPROFILE_POWER4, 178 .platform = "power4", 179 }, 180 { /* Power4+ */ 181 .pvr_mask = 0xffff0000, 182 .pvr_value = 0x00380000, 183 .cpu_name = "POWER4+ (gq)", 184 .cpu_features = CPU_FTRS_POWER4, 185 .cpu_user_features = COMMON_USER_POWER4, 186 .icache_bsize = 128, 187 .dcache_bsize = 128, 188 .num_pmcs = 8, 189 .pmc_type = PPC_PMC_IBM, 190 .oprofile_cpu_type = "ppc64/power4", 191 .oprofile_type = PPC_OPROFILE_POWER4, 192 .platform = "power4", 193 }, 194 { /* PPC970 */ 195 .pvr_mask = 0xffff0000, 196 .pvr_value = 0x00390000, 197 .cpu_name = "PPC970", 198 .cpu_features = CPU_FTRS_PPC970, 199 .cpu_user_features = COMMON_USER_POWER4 | 200 PPC_FEATURE_HAS_ALTIVEC_COMP, 201 .icache_bsize = 128, 202 .dcache_bsize = 128, 203 .num_pmcs = 8, 204 .pmc_type = PPC_PMC_IBM, 205 .cpu_setup = __setup_cpu_ppc970, 206 .cpu_restore = __restore_cpu_ppc970, 207 .oprofile_cpu_type = "ppc64/970", 208 .oprofile_type = PPC_OPROFILE_POWER4, 209 .platform = "ppc970", 210 }, 211 { /* PPC970FX */ 212 .pvr_mask = 0xffff0000, 213 .pvr_value = 0x003c0000, 214 .cpu_name = "PPC970FX", 215 .cpu_features = CPU_FTRS_PPC970, 216 .cpu_user_features = COMMON_USER_POWER4 | 217 PPC_FEATURE_HAS_ALTIVEC_COMP, 218 .icache_bsize = 128, 219 .dcache_bsize = 128, 220 .num_pmcs = 8, 221 .pmc_type = PPC_PMC_IBM, 222 .cpu_setup = __setup_cpu_ppc970, 223 .cpu_restore = __restore_cpu_ppc970, 224 .oprofile_cpu_type = "ppc64/970", 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .platform = "ppc970", 227 }, 228 { /* PPC970MP */ 229 .pvr_mask = 0xffff0000, 230 .pvr_value = 0x00440000, 231 .cpu_name = "PPC970MP", 232 .cpu_features = CPU_FTRS_PPC970, 233 .cpu_user_features = COMMON_USER_POWER4 | 234 PPC_FEATURE_HAS_ALTIVEC_COMP, 235 .icache_bsize = 128, 236 .dcache_bsize = 128, 237 .num_pmcs = 8, 238 .cpu_setup = __setup_cpu_ppc970MP, 239 .cpu_restore = __restore_cpu_ppc970, 240 .oprofile_cpu_type = "ppc64/970MP", 241 .oprofile_type = PPC_OPROFILE_POWER4, 242 .platform = "ppc970", 243 }, 244 { /* PPC970GX */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x00450000, 247 .cpu_name = "PPC970GX", 248 .cpu_features = CPU_FTRS_PPC970, 249 .cpu_user_features = COMMON_USER_POWER4 | 250 PPC_FEATURE_HAS_ALTIVEC_COMP, 251 .icache_bsize = 128, 252 .dcache_bsize = 128, 253 .num_pmcs = 8, 254 .pmc_type = PPC_PMC_IBM, 255 .cpu_setup = __setup_cpu_ppc970, 256 .oprofile_cpu_type = "ppc64/970", 257 .oprofile_type = PPC_OPROFILE_POWER4, 258 .platform = "ppc970", 259 }, 260 { /* Power5 GR */ 261 .pvr_mask = 0xffff0000, 262 .pvr_value = 0x003a0000, 263 .cpu_name = "POWER5 (gr)", 264 .cpu_features = CPU_FTRS_POWER5, 265 .cpu_user_features = COMMON_USER_POWER5, 266 .icache_bsize = 128, 267 .dcache_bsize = 128, 268 .num_pmcs = 6, 269 .pmc_type = PPC_PMC_IBM, 270 .oprofile_cpu_type = "ppc64/power5", 271 .oprofile_type = PPC_OPROFILE_POWER4, 272 /* SIHV / SIPR bits are implemented on POWER4+ (GQ) 273 * and above but only works on POWER5 and above 274 */ 275 .oprofile_mmcra_sihv = MMCRA_SIHV, 276 .oprofile_mmcra_sipr = MMCRA_SIPR, 277 .platform = "power5", 278 }, 279 { /* Power5 GS */ 280 .pvr_mask = 0xffff0000, 281 .pvr_value = 0x003b0000, 282 .cpu_name = "POWER5+ (gs)", 283 .cpu_features = CPU_FTRS_POWER5, 284 .cpu_user_features = COMMON_USER_POWER5_PLUS, 285 .icache_bsize = 128, 286 .dcache_bsize = 128, 287 .num_pmcs = 6, 288 .pmc_type = PPC_PMC_IBM, 289 .oprofile_cpu_type = "ppc64/power5+", 290 .oprofile_type = PPC_OPROFILE_POWER4, 291 .oprofile_mmcra_sihv = MMCRA_SIHV, 292 .oprofile_mmcra_sipr = MMCRA_SIPR, 293 .platform = "power5+", 294 }, 295 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 296 .pvr_mask = 0xffffffff, 297 .pvr_value = 0x0f000001, 298 .cpu_name = "POWER5+", 299 .cpu_features = CPU_FTRS_POWER5, 300 .cpu_user_features = COMMON_USER_POWER5_PLUS, 301 .icache_bsize = 128, 302 .dcache_bsize = 128, 303 .num_pmcs = 6, 304 .oprofile_cpu_type = "ppc64/power6", 305 .oprofile_type = PPC_OPROFILE_POWER4, 306 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 307 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 308 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 309 POWER6_MMCRA_OTHER, 310 .platform = "power5+", 311 }, 312 { /* Power6 */ 313 .pvr_mask = 0xffff0000, 314 .pvr_value = 0x003e0000, 315 .cpu_name = "POWER6 (raw)", 316 .cpu_features = CPU_FTRS_POWER6, 317 .cpu_user_features = COMMON_USER_POWER6 | 318 PPC_FEATURE_POWER6_EXT, 319 .icache_bsize = 128, 320 .dcache_bsize = 128, 321 .num_pmcs = 6, 322 .oprofile_cpu_type = "ppc64/power6", 323 .oprofile_type = PPC_OPROFILE_POWER4, 324 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 325 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 326 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 327 POWER6_MMCRA_OTHER, 328 .platform = "power6x", 329 }, 330 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 331 .pvr_mask = 0xffffffff, 332 .pvr_value = 0x0f000002, 333 .cpu_name = "POWER6 (architected)", 334 .cpu_features = CPU_FTRS_POWER6, 335 .cpu_user_features = COMMON_USER_POWER6, 336 .icache_bsize = 128, 337 .dcache_bsize = 128, 338 .num_pmcs = 6, 339 .pmc_type = PPC_PMC_IBM, 340 .oprofile_cpu_type = "ppc64/power6", 341 .oprofile_type = PPC_OPROFILE_POWER4, 342 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, 343 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 344 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 345 POWER6_MMCRA_OTHER, 346 .platform = "power6", 347 }, 348 { /* Cell Broadband Engine */ 349 .pvr_mask = 0xffff0000, 350 .pvr_value = 0x00700000, 351 .cpu_name = "Cell Broadband Engine", 352 .cpu_features = CPU_FTRS_CELL, 353 .cpu_user_features = COMMON_USER_PPC64 | 354 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 355 PPC_FEATURE_SMT, 356 .icache_bsize = 128, 357 .dcache_bsize = 128, 358 .num_pmcs = 4, 359 .pmc_type = PPC_PMC_IBM, 360 .oprofile_cpu_type = "ppc64/cell-be", 361 .oprofile_type = PPC_OPROFILE_CELL, 362 .platform = "ppc-cell-be", 363 }, 364 { /* PA Semi PA6T */ 365 .pvr_mask = 0x7fff0000, 366 .pvr_value = 0x00900000, 367 .cpu_name = "PA6T", 368 .cpu_features = CPU_FTRS_PA6T, 369 .cpu_user_features = COMMON_USER_PA6T, 370 .icache_bsize = 64, 371 .dcache_bsize = 64, 372 .num_pmcs = 6, 373 .pmc_type = PPC_PMC_PA6T, 374 .cpu_setup = __setup_cpu_pa6t, 375 .cpu_restore = __restore_cpu_pa6t, 376 .platform = "pa6t", 377 }, 378 { /* default match */ 379 .pvr_mask = 0x00000000, 380 .pvr_value = 0x00000000, 381 .cpu_name = "POWER4 (compatible)", 382 .cpu_features = CPU_FTRS_COMPATIBLE, 383 .cpu_user_features = COMMON_USER_PPC64, 384 .icache_bsize = 128, 385 .dcache_bsize = 128, 386 .num_pmcs = 6, 387 .pmc_type = PPC_PMC_IBM, 388 .platform = "power4", 389 } 390 #endif /* CONFIG_PPC64 */ 391 #ifdef CONFIG_PPC32 392 #if CLASSIC_PPC 393 { /* 601 */ 394 .pvr_mask = 0xffff0000, 395 .pvr_value = 0x00010000, 396 .cpu_name = "601", 397 .cpu_features = CPU_FTRS_PPC601, 398 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | 399 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, 400 .icache_bsize = 32, 401 .dcache_bsize = 32, 402 .platform = "ppc601", 403 }, 404 { /* 603 */ 405 .pvr_mask = 0xffff0000, 406 .pvr_value = 0x00030000, 407 .cpu_name = "603", 408 .cpu_features = CPU_FTRS_603, 409 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 410 .icache_bsize = 32, 411 .dcache_bsize = 32, 412 .cpu_setup = __setup_cpu_603, 413 .platform = "ppc603", 414 }, 415 { /* 603e */ 416 .pvr_mask = 0xffff0000, 417 .pvr_value = 0x00060000, 418 .cpu_name = "603e", 419 .cpu_features = CPU_FTRS_603, 420 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 421 .icache_bsize = 32, 422 .dcache_bsize = 32, 423 .cpu_setup = __setup_cpu_603, 424 .platform = "ppc603", 425 }, 426 { /* 603ev */ 427 .pvr_mask = 0xffff0000, 428 .pvr_value = 0x00070000, 429 .cpu_name = "603ev", 430 .cpu_features = CPU_FTRS_603, 431 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 432 .icache_bsize = 32, 433 .dcache_bsize = 32, 434 .cpu_setup = __setup_cpu_603, 435 .platform = "ppc603", 436 }, 437 { /* 604 */ 438 .pvr_mask = 0xffff0000, 439 .pvr_value = 0x00040000, 440 .cpu_name = "604", 441 .cpu_features = CPU_FTRS_604, 442 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 443 .icache_bsize = 32, 444 .dcache_bsize = 32, 445 .num_pmcs = 2, 446 .cpu_setup = __setup_cpu_604, 447 .platform = "ppc604", 448 }, 449 { /* 604e */ 450 .pvr_mask = 0xfffff000, 451 .pvr_value = 0x00090000, 452 .cpu_name = "604e", 453 .cpu_features = CPU_FTRS_604, 454 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 455 .icache_bsize = 32, 456 .dcache_bsize = 32, 457 .num_pmcs = 4, 458 .cpu_setup = __setup_cpu_604, 459 .platform = "ppc604", 460 }, 461 { /* 604r */ 462 .pvr_mask = 0xffff0000, 463 .pvr_value = 0x00090000, 464 .cpu_name = "604r", 465 .cpu_features = CPU_FTRS_604, 466 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 467 .icache_bsize = 32, 468 .dcache_bsize = 32, 469 .num_pmcs = 4, 470 .cpu_setup = __setup_cpu_604, 471 .platform = "ppc604", 472 }, 473 { /* 604ev */ 474 .pvr_mask = 0xffff0000, 475 .pvr_value = 0x000a0000, 476 .cpu_name = "604ev", 477 .cpu_features = CPU_FTRS_604, 478 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 479 .icache_bsize = 32, 480 .dcache_bsize = 32, 481 .num_pmcs = 4, 482 .cpu_setup = __setup_cpu_604, 483 .platform = "ppc604", 484 }, 485 { /* 740/750 (0x4202, don't support TAU ?) */ 486 .pvr_mask = 0xffffffff, 487 .pvr_value = 0x00084202, 488 .cpu_name = "740/750", 489 .cpu_features = CPU_FTRS_740_NOTAU, 490 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 491 .icache_bsize = 32, 492 .dcache_bsize = 32, 493 .num_pmcs = 4, 494 .cpu_setup = __setup_cpu_750, 495 .platform = "ppc750", 496 }, 497 { /* 750CX (80100 and 8010x?) */ 498 .pvr_mask = 0xfffffff0, 499 .pvr_value = 0x00080100, 500 .cpu_name = "750CX", 501 .cpu_features = CPU_FTRS_750, 502 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 503 .icache_bsize = 32, 504 .dcache_bsize = 32, 505 .num_pmcs = 4, 506 .cpu_setup = __setup_cpu_750cx, 507 .platform = "ppc750", 508 }, 509 { /* 750CX (82201 and 82202) */ 510 .pvr_mask = 0xfffffff0, 511 .pvr_value = 0x00082200, 512 .cpu_name = "750CX", 513 .cpu_features = CPU_FTRS_750, 514 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 515 .icache_bsize = 32, 516 .dcache_bsize = 32, 517 .num_pmcs = 4, 518 .cpu_setup = __setup_cpu_750cx, 519 .platform = "ppc750", 520 }, 521 { /* 750CXe (82214) */ 522 .pvr_mask = 0xfffffff0, 523 .pvr_value = 0x00082210, 524 .cpu_name = "750CXe", 525 .cpu_features = CPU_FTRS_750, 526 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 527 .icache_bsize = 32, 528 .dcache_bsize = 32, 529 .num_pmcs = 4, 530 .cpu_setup = __setup_cpu_750cx, 531 .platform = "ppc750", 532 }, 533 { /* 750CXe "Gekko" (83214) */ 534 .pvr_mask = 0xffffffff, 535 .pvr_value = 0x00083214, 536 .cpu_name = "750CXe", 537 .cpu_features = CPU_FTRS_750, 538 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 539 .icache_bsize = 32, 540 .dcache_bsize = 32, 541 .num_pmcs = 4, 542 .cpu_setup = __setup_cpu_750cx, 543 .platform = "ppc750", 544 }, 545 { /* 745/755 */ 546 .pvr_mask = 0xfffff000, 547 .pvr_value = 0x00083000, 548 .cpu_name = "745/755", 549 .cpu_features = CPU_FTRS_750, 550 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 551 .icache_bsize = 32, 552 .dcache_bsize = 32, 553 .num_pmcs = 4, 554 .cpu_setup = __setup_cpu_750, 555 .platform = "ppc750", 556 }, 557 { /* 750FX rev 1.x */ 558 .pvr_mask = 0xffffff00, 559 .pvr_value = 0x70000100, 560 .cpu_name = "750FX", 561 .cpu_features = CPU_FTRS_750FX1, 562 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 563 .icache_bsize = 32, 564 .dcache_bsize = 32, 565 .num_pmcs = 4, 566 .cpu_setup = __setup_cpu_750, 567 .platform = "ppc750", 568 }, 569 { /* 750FX rev 2.0 must disable HID0[DPM] */ 570 .pvr_mask = 0xffffffff, 571 .pvr_value = 0x70000200, 572 .cpu_name = "750FX", 573 .cpu_features = CPU_FTRS_750FX2, 574 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 575 .icache_bsize = 32, 576 .dcache_bsize = 32, 577 .num_pmcs = 4, 578 .cpu_setup = __setup_cpu_750, 579 .platform = "ppc750", 580 }, 581 { /* 750FX (All revs except 2.0) */ 582 .pvr_mask = 0xffff0000, 583 .pvr_value = 0x70000000, 584 .cpu_name = "750FX", 585 .cpu_features = CPU_FTRS_750FX, 586 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 587 .icache_bsize = 32, 588 .dcache_bsize = 32, 589 .num_pmcs = 4, 590 .cpu_setup = __setup_cpu_750fx, 591 .platform = "ppc750", 592 }, 593 { /* 750GX */ 594 .pvr_mask = 0xffff0000, 595 .pvr_value = 0x70020000, 596 .cpu_name = "750GX", 597 .cpu_features = CPU_FTRS_750GX, 598 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 599 .icache_bsize = 32, 600 .dcache_bsize = 32, 601 .num_pmcs = 4, 602 .cpu_setup = __setup_cpu_750fx, 603 .platform = "ppc750", 604 }, 605 { /* 740/750 (L2CR bit need fixup for 740) */ 606 .pvr_mask = 0xffff0000, 607 .pvr_value = 0x00080000, 608 .cpu_name = "740/750", 609 .cpu_features = CPU_FTRS_740, 610 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 611 .icache_bsize = 32, 612 .dcache_bsize = 32, 613 .num_pmcs = 4, 614 .cpu_setup = __setup_cpu_750, 615 .platform = "ppc750", 616 }, 617 { /* 7400 rev 1.1 ? (no TAU) */ 618 .pvr_mask = 0xffffffff, 619 .pvr_value = 0x000c1101, 620 .cpu_name = "7400 (1.1)", 621 .cpu_features = CPU_FTRS_7400_NOTAU, 622 .cpu_user_features = COMMON_USER | 623 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 624 .icache_bsize = 32, 625 .dcache_bsize = 32, 626 .num_pmcs = 4, 627 .cpu_setup = __setup_cpu_7400, 628 .platform = "ppc7400", 629 }, 630 { /* 7400 */ 631 .pvr_mask = 0xffff0000, 632 .pvr_value = 0x000c0000, 633 .cpu_name = "7400", 634 .cpu_features = CPU_FTRS_7400, 635 .cpu_user_features = COMMON_USER | 636 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 637 .icache_bsize = 32, 638 .dcache_bsize = 32, 639 .num_pmcs = 4, 640 .cpu_setup = __setup_cpu_7400, 641 .platform = "ppc7400", 642 }, 643 { /* 7410 */ 644 .pvr_mask = 0xffff0000, 645 .pvr_value = 0x800c0000, 646 .cpu_name = "7410", 647 .cpu_features = CPU_FTRS_7400, 648 .cpu_user_features = COMMON_USER | 649 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 650 .icache_bsize = 32, 651 .dcache_bsize = 32, 652 .num_pmcs = 4, 653 .cpu_setup = __setup_cpu_7410, 654 .platform = "ppc7400", 655 }, 656 { /* 7450 2.0 - no doze/nap */ 657 .pvr_mask = 0xffffffff, 658 .pvr_value = 0x80000200, 659 .cpu_name = "7450", 660 .cpu_features = CPU_FTRS_7450_20, 661 .cpu_user_features = COMMON_USER | 662 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 663 .icache_bsize = 32, 664 .dcache_bsize = 32, 665 .num_pmcs = 6, 666 .cpu_setup = __setup_cpu_745x, 667 .oprofile_cpu_type = "ppc/7450", 668 .oprofile_type = PPC_OPROFILE_G4, 669 .platform = "ppc7450", 670 }, 671 { /* 7450 2.1 */ 672 .pvr_mask = 0xffffffff, 673 .pvr_value = 0x80000201, 674 .cpu_name = "7450", 675 .cpu_features = CPU_FTRS_7450_21, 676 .cpu_user_features = COMMON_USER | 677 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 678 .icache_bsize = 32, 679 .dcache_bsize = 32, 680 .num_pmcs = 6, 681 .cpu_setup = __setup_cpu_745x, 682 .oprofile_cpu_type = "ppc/7450", 683 .oprofile_type = PPC_OPROFILE_G4, 684 .platform = "ppc7450", 685 }, 686 { /* 7450 2.3 and newer */ 687 .pvr_mask = 0xffff0000, 688 .pvr_value = 0x80000000, 689 .cpu_name = "7450", 690 .cpu_features = CPU_FTRS_7450_23, 691 .cpu_user_features = COMMON_USER | 692 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 693 .icache_bsize = 32, 694 .dcache_bsize = 32, 695 .num_pmcs = 6, 696 .cpu_setup = __setup_cpu_745x, 697 .oprofile_cpu_type = "ppc/7450", 698 .oprofile_type = PPC_OPROFILE_G4, 699 .platform = "ppc7450", 700 }, 701 { /* 7455 rev 1.x */ 702 .pvr_mask = 0xffffff00, 703 .pvr_value = 0x80010100, 704 .cpu_name = "7455", 705 .cpu_features = CPU_FTRS_7455_1, 706 .cpu_user_features = COMMON_USER | 707 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 708 .icache_bsize = 32, 709 .dcache_bsize = 32, 710 .num_pmcs = 6, 711 .cpu_setup = __setup_cpu_745x, 712 .oprofile_cpu_type = "ppc/7450", 713 .oprofile_type = PPC_OPROFILE_G4, 714 .platform = "ppc7450", 715 }, 716 { /* 7455 rev 2.0 */ 717 .pvr_mask = 0xffffffff, 718 .pvr_value = 0x80010200, 719 .cpu_name = "7455", 720 .cpu_features = CPU_FTRS_7455_20, 721 .cpu_user_features = COMMON_USER | 722 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 723 .icache_bsize = 32, 724 .dcache_bsize = 32, 725 .num_pmcs = 6, 726 .cpu_setup = __setup_cpu_745x, 727 .oprofile_cpu_type = "ppc/7450", 728 .oprofile_type = PPC_OPROFILE_G4, 729 .platform = "ppc7450", 730 }, 731 { /* 7455 others */ 732 .pvr_mask = 0xffff0000, 733 .pvr_value = 0x80010000, 734 .cpu_name = "7455", 735 .cpu_features = CPU_FTRS_7455, 736 .cpu_user_features = COMMON_USER | 737 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 738 .icache_bsize = 32, 739 .dcache_bsize = 32, 740 .num_pmcs = 6, 741 .cpu_setup = __setup_cpu_745x, 742 .oprofile_cpu_type = "ppc/7450", 743 .oprofile_type = PPC_OPROFILE_G4, 744 .platform = "ppc7450", 745 }, 746 { /* 7447/7457 Rev 1.0 */ 747 .pvr_mask = 0xffffffff, 748 .pvr_value = 0x80020100, 749 .cpu_name = "7447/7457", 750 .cpu_features = CPU_FTRS_7447_10, 751 .cpu_user_features = COMMON_USER | 752 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 753 .icache_bsize = 32, 754 .dcache_bsize = 32, 755 .num_pmcs = 6, 756 .cpu_setup = __setup_cpu_745x, 757 .oprofile_cpu_type = "ppc/7450", 758 .oprofile_type = PPC_OPROFILE_G4, 759 .platform = "ppc7450", 760 }, 761 { /* 7447/7457 Rev 1.1 */ 762 .pvr_mask = 0xffffffff, 763 .pvr_value = 0x80020101, 764 .cpu_name = "7447/7457", 765 .cpu_features = CPU_FTRS_7447_10, 766 .cpu_user_features = COMMON_USER | 767 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 768 .icache_bsize = 32, 769 .dcache_bsize = 32, 770 .num_pmcs = 6, 771 .cpu_setup = __setup_cpu_745x, 772 .oprofile_cpu_type = "ppc/7450", 773 .oprofile_type = PPC_OPROFILE_G4, 774 .platform = "ppc7450", 775 }, 776 { /* 7447/7457 Rev 1.2 and later */ 777 .pvr_mask = 0xffff0000, 778 .pvr_value = 0x80020000, 779 .cpu_name = "7447/7457", 780 .cpu_features = CPU_FTRS_7447, 781 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 782 .icache_bsize = 32, 783 .dcache_bsize = 32, 784 .num_pmcs = 6, 785 .cpu_setup = __setup_cpu_745x, 786 .oprofile_cpu_type = "ppc/7450", 787 .oprofile_type = PPC_OPROFILE_G4, 788 .platform = "ppc7450", 789 }, 790 { /* 7447A */ 791 .pvr_mask = 0xffff0000, 792 .pvr_value = 0x80030000, 793 .cpu_name = "7447A", 794 .cpu_features = CPU_FTRS_7447A, 795 .cpu_user_features = COMMON_USER | 796 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 797 .icache_bsize = 32, 798 .dcache_bsize = 32, 799 .num_pmcs = 6, 800 .cpu_setup = __setup_cpu_745x, 801 .oprofile_cpu_type = "ppc/7450", 802 .oprofile_type = PPC_OPROFILE_G4, 803 .platform = "ppc7450", 804 }, 805 { /* 7448 */ 806 .pvr_mask = 0xffff0000, 807 .pvr_value = 0x80040000, 808 .cpu_name = "7448", 809 .cpu_features = CPU_FTRS_7447A, 810 .cpu_user_features = COMMON_USER | 811 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 812 .icache_bsize = 32, 813 .dcache_bsize = 32, 814 .num_pmcs = 6, 815 .cpu_setup = __setup_cpu_745x, 816 .oprofile_cpu_type = "ppc/7450", 817 .oprofile_type = PPC_OPROFILE_G4, 818 .platform = "ppc7450", 819 }, 820 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 821 .pvr_mask = 0x7fff0000, 822 .pvr_value = 0x00810000, 823 .cpu_name = "82xx", 824 .cpu_features = CPU_FTRS_82XX, 825 .cpu_user_features = COMMON_USER, 826 .icache_bsize = 32, 827 .dcache_bsize = 32, 828 .cpu_setup = __setup_cpu_603, 829 .platform = "ppc603", 830 }, 831 { /* All G2_LE (603e core, plus some) have the same pvr */ 832 .pvr_mask = 0x7fff0000, 833 .pvr_value = 0x00820000, 834 .cpu_name = "G2_LE", 835 .cpu_features = CPU_FTRS_G2_LE, 836 .cpu_user_features = COMMON_USER, 837 .icache_bsize = 32, 838 .dcache_bsize = 32, 839 .cpu_setup = __setup_cpu_603, 840 .platform = "ppc603", 841 }, 842 { /* e300c1 (a 603e core, plus some) on 83xx */ 843 .pvr_mask = 0x7fff0000, 844 .pvr_value = 0x00830000, 845 .cpu_name = "e300c1", 846 .cpu_features = CPU_FTRS_E300, 847 .cpu_user_features = COMMON_USER, 848 .icache_bsize = 32, 849 .dcache_bsize = 32, 850 .cpu_setup = __setup_cpu_603, 851 .platform = "ppc603", 852 }, 853 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 854 .pvr_mask = 0x7fff0000, 855 .pvr_value = 0x00840000, 856 .cpu_name = "e300c2", 857 .cpu_features = CPU_FTRS_E300C2, 858 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 859 .icache_bsize = 32, 860 .dcache_bsize = 32, 861 .cpu_setup = __setup_cpu_603, 862 .platform = "ppc603", 863 }, 864 { /* e300c3 on 83xx */ 865 .pvr_mask = 0x7fff0000, 866 .pvr_value = 0x00850000, 867 .cpu_name = "e300c3", 868 .cpu_features = CPU_FTRS_E300, 869 .cpu_user_features = COMMON_USER, 870 .icache_bsize = 32, 871 .dcache_bsize = 32, 872 .cpu_setup = __setup_cpu_603, 873 .platform = "ppc603", 874 }, 875 { /* default match, we assume split I/D cache & TB (non-601)... */ 876 .pvr_mask = 0x00000000, 877 .pvr_value = 0x00000000, 878 .cpu_name = "(generic PPC)", 879 .cpu_features = CPU_FTRS_CLASSIC32, 880 .cpu_user_features = COMMON_USER, 881 .icache_bsize = 32, 882 .dcache_bsize = 32, 883 .platform = "ppc603", 884 }, 885 #endif /* CLASSIC_PPC */ 886 #ifdef CONFIG_8xx 887 { /* 8xx */ 888 .pvr_mask = 0xffff0000, 889 .pvr_value = 0x00500000, 890 .cpu_name = "8xx", 891 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 892 * if the 8xx code is there.... */ 893 .cpu_features = CPU_FTRS_8XX, 894 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 895 .icache_bsize = 16, 896 .dcache_bsize = 16, 897 .platform = "ppc823", 898 }, 899 #endif /* CONFIG_8xx */ 900 #ifdef CONFIG_40x 901 { /* 403GC */ 902 .pvr_mask = 0xffffff00, 903 .pvr_value = 0x00200200, 904 .cpu_name = "403GC", 905 .cpu_features = CPU_FTRS_40X, 906 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 907 .icache_bsize = 16, 908 .dcache_bsize = 16, 909 .platform = "ppc403", 910 }, 911 { /* 403GCX */ 912 .pvr_mask = 0xffffff00, 913 .pvr_value = 0x00201400, 914 .cpu_name = "403GCX", 915 .cpu_features = CPU_FTRS_40X, 916 .cpu_user_features = PPC_FEATURE_32 | 917 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, 918 .icache_bsize = 16, 919 .dcache_bsize = 16, 920 .platform = "ppc403", 921 }, 922 { /* 403G ?? */ 923 .pvr_mask = 0xffff0000, 924 .pvr_value = 0x00200000, 925 .cpu_name = "403G ??", 926 .cpu_features = CPU_FTRS_40X, 927 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 928 .icache_bsize = 16, 929 .dcache_bsize = 16, 930 .platform = "ppc403", 931 }, 932 { /* 405GP */ 933 .pvr_mask = 0xffff0000, 934 .pvr_value = 0x40110000, 935 .cpu_name = "405GP", 936 .cpu_features = CPU_FTRS_40X, 937 .cpu_user_features = PPC_FEATURE_32 | 938 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 939 .icache_bsize = 32, 940 .dcache_bsize = 32, 941 .platform = "ppc405", 942 }, 943 { /* STB 03xxx */ 944 .pvr_mask = 0xffff0000, 945 .pvr_value = 0x40130000, 946 .cpu_name = "STB03xxx", 947 .cpu_features = CPU_FTRS_40X, 948 .cpu_user_features = PPC_FEATURE_32 | 949 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 950 .icache_bsize = 32, 951 .dcache_bsize = 32, 952 .platform = "ppc405", 953 }, 954 { /* STB 04xxx */ 955 .pvr_mask = 0xffff0000, 956 .pvr_value = 0x41810000, 957 .cpu_name = "STB04xxx", 958 .cpu_features = CPU_FTRS_40X, 959 .cpu_user_features = PPC_FEATURE_32 | 960 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 961 .icache_bsize = 32, 962 .dcache_bsize = 32, 963 .platform = "ppc405", 964 }, 965 { /* NP405L */ 966 .pvr_mask = 0xffff0000, 967 .pvr_value = 0x41610000, 968 .cpu_name = "NP405L", 969 .cpu_features = CPU_FTRS_40X, 970 .cpu_user_features = PPC_FEATURE_32 | 971 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 972 .icache_bsize = 32, 973 .dcache_bsize = 32, 974 .platform = "ppc405", 975 }, 976 { /* NP4GS3 */ 977 .pvr_mask = 0xffff0000, 978 .pvr_value = 0x40B10000, 979 .cpu_name = "NP4GS3", 980 .cpu_features = CPU_FTRS_40X, 981 .cpu_user_features = PPC_FEATURE_32 | 982 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 983 .icache_bsize = 32, 984 .dcache_bsize = 32, 985 .platform = "ppc405", 986 }, 987 { /* NP405H */ 988 .pvr_mask = 0xffff0000, 989 .pvr_value = 0x41410000, 990 .cpu_name = "NP405H", 991 .cpu_features = CPU_FTRS_40X, 992 .cpu_user_features = PPC_FEATURE_32 | 993 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 994 .icache_bsize = 32, 995 .dcache_bsize = 32, 996 .platform = "ppc405", 997 }, 998 { /* 405GPr */ 999 .pvr_mask = 0xffff0000, 1000 .pvr_value = 0x50910000, 1001 .cpu_name = "405GPr", 1002 .cpu_features = CPU_FTRS_40X, 1003 .cpu_user_features = PPC_FEATURE_32 | 1004 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1005 .icache_bsize = 32, 1006 .dcache_bsize = 32, 1007 .platform = "ppc405", 1008 }, 1009 { /* STBx25xx */ 1010 .pvr_mask = 0xffff0000, 1011 .pvr_value = 0x51510000, 1012 .cpu_name = "STBx25xx", 1013 .cpu_features = CPU_FTRS_40X, 1014 .cpu_user_features = PPC_FEATURE_32 | 1015 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1016 .icache_bsize = 32, 1017 .dcache_bsize = 32, 1018 .platform = "ppc405", 1019 }, 1020 { /* 405LP */ 1021 .pvr_mask = 0xffff0000, 1022 .pvr_value = 0x41F10000, 1023 .cpu_name = "405LP", 1024 .cpu_features = CPU_FTRS_40X, 1025 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1026 .icache_bsize = 32, 1027 .dcache_bsize = 32, 1028 .platform = "ppc405", 1029 }, 1030 { /* Xilinx Virtex-II Pro */ 1031 .pvr_mask = 0xfffff000, 1032 .pvr_value = 0x20010000, 1033 .cpu_name = "Virtex-II Pro", 1034 .cpu_features = CPU_FTRS_40X, 1035 .cpu_user_features = PPC_FEATURE_32 | 1036 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1037 .icache_bsize = 32, 1038 .dcache_bsize = 32, 1039 .platform = "ppc405", 1040 }, 1041 { /* Xilinx Virtex-4 FX */ 1042 .pvr_mask = 0xfffff000, 1043 .pvr_value = 0x20011000, 1044 .cpu_name = "Virtex-4 FX", 1045 .cpu_features = CPU_FTRS_40X, 1046 .cpu_user_features = PPC_FEATURE_32 | 1047 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1048 .icache_bsize = 32, 1049 .dcache_bsize = 32, 1050 .platform = "ppc405", 1051 }, 1052 { /* 405EP */ 1053 .pvr_mask = 0xffff0000, 1054 .pvr_value = 0x51210000, 1055 .cpu_name = "405EP", 1056 .cpu_features = CPU_FTRS_40X, 1057 .cpu_user_features = PPC_FEATURE_32 | 1058 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1059 .icache_bsize = 32, 1060 .dcache_bsize = 32, 1061 .platform = "ppc405", 1062 }, 1063 1064 #endif /* CONFIG_40x */ 1065 #ifdef CONFIG_44x 1066 { 1067 .pvr_mask = 0xf0000fff, 1068 .pvr_value = 0x40000850, 1069 .cpu_name = "440EP Rev. A", 1070 .cpu_features = CPU_FTRS_44X, 1071 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1072 .icache_bsize = 32, 1073 .dcache_bsize = 32, 1074 .platform = "ppc440", 1075 }, 1076 { 1077 .pvr_mask = 0xf0000fff, 1078 .pvr_value = 0x400008d3, 1079 .cpu_name = "440EP Rev. B", 1080 .cpu_features = CPU_FTRS_44X, 1081 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1082 .icache_bsize = 32, 1083 .dcache_bsize = 32, 1084 .platform = "ppc440", 1085 }, 1086 { /* 440GP Rev. B */ 1087 .pvr_mask = 0xf0000fff, 1088 .pvr_value = 0x40000440, 1089 .cpu_name = "440GP Rev. B", 1090 .cpu_features = CPU_FTRS_44X, 1091 .cpu_user_features = COMMON_USER_BOOKE, 1092 .icache_bsize = 32, 1093 .dcache_bsize = 32, 1094 .platform = "ppc440gp", 1095 }, 1096 { /* 440GP Rev. C */ 1097 .pvr_mask = 0xf0000fff, 1098 .pvr_value = 0x40000481, 1099 .cpu_name = "440GP Rev. C", 1100 .cpu_features = CPU_FTRS_44X, 1101 .cpu_user_features = COMMON_USER_BOOKE, 1102 .icache_bsize = 32, 1103 .dcache_bsize = 32, 1104 .platform = "ppc440gp", 1105 }, 1106 { /* 440GX Rev. A */ 1107 .pvr_mask = 0xf0000fff, 1108 .pvr_value = 0x50000850, 1109 .cpu_name = "440GX Rev. A", 1110 .cpu_features = CPU_FTRS_44X, 1111 .cpu_user_features = COMMON_USER_BOOKE, 1112 .icache_bsize = 32, 1113 .dcache_bsize = 32, 1114 .platform = "ppc440", 1115 }, 1116 { /* 440GX Rev. B */ 1117 .pvr_mask = 0xf0000fff, 1118 .pvr_value = 0x50000851, 1119 .cpu_name = "440GX Rev. B", 1120 .cpu_features = CPU_FTRS_44X, 1121 .cpu_user_features = COMMON_USER_BOOKE, 1122 .icache_bsize = 32, 1123 .dcache_bsize = 32, 1124 .platform = "ppc440", 1125 }, 1126 { /* 440GX Rev. C */ 1127 .pvr_mask = 0xf0000fff, 1128 .pvr_value = 0x50000892, 1129 .cpu_name = "440GX Rev. C", 1130 .cpu_features = CPU_FTRS_44X, 1131 .cpu_user_features = COMMON_USER_BOOKE, 1132 .icache_bsize = 32, 1133 .dcache_bsize = 32, 1134 .platform = "ppc440", 1135 }, 1136 { /* 440GX Rev. F */ 1137 .pvr_mask = 0xf0000fff, 1138 .pvr_value = 0x50000894, 1139 .cpu_name = "440GX Rev. F", 1140 .cpu_features = CPU_FTRS_44X, 1141 .cpu_user_features = COMMON_USER_BOOKE, 1142 .icache_bsize = 32, 1143 .dcache_bsize = 32, 1144 .platform = "ppc440", 1145 }, 1146 { /* 440SP Rev. A */ 1147 .pvr_mask = 0xff000fff, 1148 .pvr_value = 0x53000891, 1149 .cpu_name = "440SP Rev. A", 1150 .cpu_features = CPU_FTRS_44X, 1151 .cpu_user_features = COMMON_USER_BOOKE, 1152 .icache_bsize = 32, 1153 .dcache_bsize = 32, 1154 .platform = "ppc440", 1155 }, 1156 { /* 440SPe Rev. A */ 1157 .pvr_mask = 0xff000fff, 1158 .pvr_value = 0x53000890, 1159 .cpu_name = "440SPe Rev. A", 1160 .cpu_features = CPU_FTRS_44X, 1161 .cpu_user_features = COMMON_USER_BOOKE, 1162 .icache_bsize = 32, 1163 .dcache_bsize = 32, 1164 .platform = "ppc440", 1165 }, 1166 #endif /* CONFIG_44x */ 1167 #ifdef CONFIG_FSL_BOOKE 1168 { /* e200z5 */ 1169 .pvr_mask = 0xfff00000, 1170 .pvr_value = 0x81000000, 1171 .cpu_name = "e200z5", 1172 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1173 .cpu_features = CPU_FTRS_E200, 1174 .cpu_user_features = COMMON_USER_BOOKE | 1175 PPC_FEATURE_HAS_EFP_SINGLE | 1176 PPC_FEATURE_UNIFIED_CACHE, 1177 .dcache_bsize = 32, 1178 .platform = "ppc5554", 1179 }, 1180 { /* e200z6 */ 1181 .pvr_mask = 0xfff00000, 1182 .pvr_value = 0x81100000, 1183 .cpu_name = "e200z6", 1184 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1185 .cpu_features = CPU_FTRS_E200, 1186 .cpu_user_features = COMMON_USER_BOOKE | 1187 PPC_FEATURE_SPE_COMP | 1188 PPC_FEATURE_HAS_EFP_SINGLE | 1189 PPC_FEATURE_UNIFIED_CACHE, 1190 .dcache_bsize = 32, 1191 .platform = "ppc5554", 1192 }, 1193 { /* e500 */ 1194 .pvr_mask = 0xffff0000, 1195 .pvr_value = 0x80200000, 1196 .cpu_name = "e500", 1197 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1198 .cpu_features = CPU_FTRS_E500, 1199 .cpu_user_features = COMMON_USER_BOOKE | 1200 PPC_FEATURE_SPE_COMP | 1201 PPC_FEATURE_HAS_EFP_SINGLE, 1202 .icache_bsize = 32, 1203 .dcache_bsize = 32, 1204 .num_pmcs = 4, 1205 .oprofile_cpu_type = "ppc/e500", 1206 .oprofile_type = PPC_OPROFILE_BOOKE, 1207 .platform = "ppc8540", 1208 }, 1209 { /* e500v2 */ 1210 .pvr_mask = 0xffff0000, 1211 .pvr_value = 0x80210000, 1212 .cpu_name = "e500v2", 1213 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 1214 .cpu_features = CPU_FTRS_E500_2, 1215 .cpu_user_features = COMMON_USER_BOOKE | 1216 PPC_FEATURE_SPE_COMP | 1217 PPC_FEATURE_HAS_EFP_SINGLE | 1218 PPC_FEATURE_HAS_EFP_DOUBLE, 1219 .icache_bsize = 32, 1220 .dcache_bsize = 32, 1221 .num_pmcs = 4, 1222 .oprofile_cpu_type = "ppc/e500", 1223 .oprofile_type = PPC_OPROFILE_BOOKE, 1224 .platform = "ppc8548", 1225 }, 1226 #endif 1227 #if !CLASSIC_PPC 1228 { /* default match */ 1229 .pvr_mask = 0x00000000, 1230 .pvr_value = 0x00000000, 1231 .cpu_name = "(generic PPC)", 1232 .cpu_features = CPU_FTRS_GENERIC_32, 1233 .cpu_user_features = PPC_FEATURE_32, 1234 .icache_bsize = 32, 1235 .dcache_bsize = 32, 1236 .platform = "powerpc", 1237 } 1238 #endif /* !CLASSIC_PPC */ 1239 #endif /* CONFIG_PPC32 */ 1240 }; 1241 1242 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr) 1243 { 1244 struct cpu_spec *s = cpu_specs; 1245 struct cpu_spec **cur = &cur_cpu_spec; 1246 int i; 1247 1248 s = PTRRELOC(s); 1249 cur = PTRRELOC(cur); 1250 1251 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) 1252 if ((pvr & s->pvr_mask) == s->pvr_value) { 1253 *cur = cpu_specs + i; 1254 #ifdef CONFIG_PPC64 1255 /* ppc64 expects identify_cpu to also call setup_cpu 1256 * for that processor. I will consolidate that at a 1257 * later time, for now, just use our friend #ifdef. 1258 * we also don't need to PTRRELOC the function pointer 1259 * on ppc64 as we are running at 0 in real mode. 1260 */ 1261 if (s->cpu_setup) { 1262 s->cpu_setup(offset, s); 1263 } 1264 #endif /* CONFIG_PPC64 */ 1265 return s; 1266 } 1267 BUG(); 1268 return NULL; 1269 } 1270 1271 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end) 1272 { 1273 struct fixup_entry { 1274 unsigned long mask; 1275 unsigned long value; 1276 long start_off; 1277 long end_off; 1278 } *fcur, *fend; 1279 1280 fcur = fixup_start; 1281 fend = fixup_end; 1282 1283 for (; fcur < fend; fcur++) { 1284 unsigned int *pstart, *pend, *p; 1285 1286 if ((value & fcur->mask) == fcur->value) 1287 continue; 1288 1289 /* These PTRRELOCs will disappear once the new scheme for 1290 * modules and vdso is implemented 1291 */ 1292 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4); 1293 pend = ((unsigned int *)fcur) + (fcur->end_off / 4); 1294 1295 for (p = pstart; p < pend; p++) { 1296 *p = 0x60000000u; 1297 asm volatile ("dcbst 0, %0" : : "r" (p)); 1298 } 1299 asm volatile ("sync" : : : "memory"); 1300 for (p = pstart; p < pend; p++) 1301 asm volatile ("icbi 0,%0" : : "r" (p)); 1302 asm volatile ("sync; isync" : : : "memory"); 1303 } 1304 } 1305